./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 567c779f4de19a2058420c225a74f6c179939efc .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 08:00:44,048 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 08:00:44,049 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 08:00:44,055 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 08:00:44,055 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 08:00:44,056 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 08:00:44,056 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 08:00:44,057 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 08:00:44,058 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 08:00:44,058 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 08:00:44,059 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 08:00:44,059 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 08:00:44,059 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 08:00:44,060 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 08:00:44,060 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 08:00:44,061 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 08:00:44,061 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 08:00:44,062 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 08:00:44,063 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 08:00:44,063 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 08:00:44,064 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 08:00:44,064 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 08:00:44,065 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 08:00:44,066 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 08:00:44,066 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 08:00:44,066 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 08:00:44,067 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 08:00:44,067 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 08:00:44,068 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 08:00:44,068 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 08:00:44,068 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 08:00:44,069 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 08:00:44,069 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 08:00:44,069 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 08:00:44,069 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 08:00:44,070 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 08:00:44,070 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-12-08 08:00:44,076 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 08:00:44,076 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 08:00:44,077 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 08:00:44,077 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 08:00:44,077 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 08:00:44,078 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 08:00:44,078 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 08:00:44,079 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 08:00:44,079 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 08:00:44,079 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 08:00:44,079 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 08:00:44,079 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 08:00:44,079 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 08:00:44,079 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 08:00:44,080 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-08 08:00:44,080 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 08:00:44,081 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 08:00:44,081 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 567c779f4de19a2058420c225a74f6c179939efc [2018-12-08 08:00:44,098 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 08:00:44,104 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 08:00:44,106 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 08:00:44,107 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 08:00:44,107 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 08:00:44,107 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i [2018-12-08 08:00:44,141 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/data/3ab36517a/23cd6ef7692244f394f5b7433a03d950/FLAG380c6bc87 [2018-12-08 08:00:44,517 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 08:00:44,517 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/sv-benchmarks/c/pthread-wmm/safe007_power.opt_false-unreach-call.i [2018-12-08 08:00:44,526 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/data/3ab36517a/23cd6ef7692244f394f5b7433a03d950/FLAG380c6bc87 [2018-12-08 08:00:44,878 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/data/3ab36517a/23cd6ef7692244f394f5b7433a03d950 [2018-12-08 08:00:44,882 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 08:00:44,884 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 08:00:44,885 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 08:00:44,885 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 08:00:44,889 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 08:00:44,890 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 08:00:44" (1/1) ... [2018-12-08 08:00:44,892 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1813fc51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:44, skipping insertion in model container [2018-12-08 08:00:44,892 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 08:00:44" (1/1) ... [2018-12-08 08:00:44,896 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 08:00:44,919 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 08:00:45,102 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 08:00:45,110 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 08:00:45,198 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 08:00:45,227 INFO L195 MainTranslator]: Completed translation [2018-12-08 08:00:45,227 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45 WrapperNode [2018-12-08 08:00:45,228 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 08:00:45,228 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 08:00:45,228 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 08:00:45,228 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 08:00:45,233 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,244 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,260 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 08:00:45,261 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 08:00:45,261 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 08:00:45,261 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 08:00:45,267 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,267 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,270 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,270 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,277 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,279 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,281 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... [2018-12-08 08:00:45,284 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 08:00:45,284 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 08:00:45,284 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 08:00:45,284 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 08:00:45,285 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 08:00:45,323 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-08 08:00:45,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-08 08:00:45,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-12-08 08:00:45,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-08 08:00:45,324 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 08:00:45,325 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 08:00:45,325 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-08 08:00:45,709 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 08:00:45,709 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-08 08:00:45,709 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:00:45 BoogieIcfgContainer [2018-12-08 08:00:45,709 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 08:00:45,709 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 08:00:45,710 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 08:00:45,711 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 08:00:45,711 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 08:00:44" (1/3) ... [2018-12-08 08:00:45,712 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@20eda681 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 08:00:45, skipping insertion in model container [2018-12-08 08:00:45,712 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:00:45" (2/3) ... [2018-12-08 08:00:45,712 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@20eda681 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 08:00:45, skipping insertion in model container [2018-12-08 08:00:45,712 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:00:45" (3/3) ... [2018-12-08 08:00:45,713 INFO L112 eAbstractionObserver]: Analyzing ICFG safe007_power.opt_false-unreach-call.i [2018-12-08 08:00:45,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,740 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,740 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,740 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,741 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,746 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,746 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,746 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,747 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,748 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,749 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,750 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,751 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,752 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,753 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,754 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,755 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,756 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,757 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,758 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,759 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,760 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,761 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,762 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,763 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,764 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,765 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-08 08:00:45,770 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-08 08:00:45,770 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 08:00:45,776 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-08 08:00:45,786 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-08 08:00:45,801 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 08:00:45,801 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 08:00:45,801 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 08:00:45,801 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 08:00:45,801 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 08:00:45,801 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 08:00:45,801 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 08:00:45,802 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 08:00:45,802 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 08:00:45,810 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-12-08 08:02:12,177 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-12-08 08:02:12,179 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-12-08 08:02:12,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-12-08 08:02:12,184 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:12,185 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:12,186 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:12,190 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:12,190 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-12-08 08:02:12,191 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:12,191 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:12,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:12,226 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:12,226 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:12,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:12,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:12,339 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:12,339 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:02:12,341 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:02:12,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:02:12,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:02:12,350 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-12-08 08:02:15,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:15,668 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-12-08 08:02:15,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 08:02:15,669 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-12-08 08:02:15,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:17,164 INFO L225 Difference]: With dead ends: 604682 [2018-12-08 08:02:17,165 INFO L226 Difference]: Without dead ends: 434932 [2018-12-08 08:02:17,166 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:02:20,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-12-08 08:02:28,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-12-08 08:02:28,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-12-08 08:02:29,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-12-08 08:02:29,630 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-12-08 08:02:29,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:29,630 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-12-08 08:02:29,630 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:02:29,630 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-12-08 08:02:29,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 08:02:29,643 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:29,644 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:29,644 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:29,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:29,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-12-08 08:02:29,644 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:29,644 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:29,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:29,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:29,647 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:29,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:29,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:29,724 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:29,724 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:02:29,725 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:02:29,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:02:29,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:02:29,725 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-12-08 08:02:34,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:34,245 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-12-08 08:02:34,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 08:02:34,246 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-12-08 08:02:34,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:34,897 INFO L225 Difference]: With dead ends: 237806 [2018-12-08 08:02:34,897 INFO L226 Difference]: Without dead ends: 229076 [2018-12-08 08:02:34,897 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:02:36,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-12-08 08:02:39,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-12-08 08:02:39,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-12-08 08:02:40,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-12-08 08:02:40,330 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-12-08 08:02:40,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:40,330 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-12-08 08:02:40,330 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:02:40,331 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-12-08 08:02:40,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 08:02:40,337 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:40,337 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:40,337 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:40,338 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:40,338 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-12-08 08:02:40,338 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:40,338 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:40,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:40,339 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:40,339 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:40,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:40,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:40,395 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:40,395 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:02:40,395 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:02:40,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:02:40,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:02:40,395 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-12-08 08:02:40,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:40,639 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-12-08 08:02:40,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:02:40,639 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-08 08:02:40,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:40,781 INFO L225 Difference]: With dead ends: 62964 [2018-12-08 08:02:40,781 INFO L226 Difference]: Without dead ends: 55536 [2018-12-08 08:02:40,781 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:02:40,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-12-08 08:02:41,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-12-08 08:02:41,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-12-08 08:02:41,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-12-08 08:02:41,551 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-12-08 08:02:41,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:41,551 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-12-08 08:02:41,551 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:02:41,551 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-12-08 08:02:41,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 08:02:41,553 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:41,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:41,553 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:41,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:41,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-12-08 08:02:41,554 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:41,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:41,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:41,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:41,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:41,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:41,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:41,621 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:41,621 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:02:41,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:02:41,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:02:41,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:02:41,622 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-12-08 08:02:42,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:42,720 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-12-08 08:02:42,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 08:02:42,720 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-12-08 08:02:42,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:42,963 INFO L225 Difference]: With dead ends: 117028 [2018-12-08 08:02:42,964 INFO L226 Difference]: Without dead ends: 116528 [2018-12-08 08:02:42,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:02:43,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-12-08 08:02:44,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-12-08 08:02:44,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-12-08 08:02:44,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-12-08 08:02:44,524 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-12-08 08:02:44,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:44,524 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-12-08 08:02:44,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:02:44,525 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-12-08 08:02:44,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-08 08:02:44,528 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:44,528 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:44,528 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:44,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:44,528 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-12-08 08:02:44,529 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:44,529 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:44,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:44,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:44,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:44,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:44,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:44,557 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:44,557 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 08:02:44,557 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 08:02:44,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 08:02:44,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:02:44,558 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-12-08 08:02:44,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:44,918 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-12-08 08:02:44,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 08:02:44,919 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-12-08 08:02:44,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:45,123 INFO L225 Difference]: With dead ends: 99897 [2018-12-08 08:02:45,123 INFO L226 Difference]: Without dead ends: 99897 [2018-12-08 08:02:45,124 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:02:45,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-12-08 08:02:47,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-12-08 08:02:47,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-12-08 08:02:48,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-12-08 08:02:48,000 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-12-08 08:02:48,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:48,001 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-12-08 08:02:48,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 08:02:48,001 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-12-08 08:02:48,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-08 08:02:48,006 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:48,007 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:48,007 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:48,007 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:48,007 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-12-08 08:02:48,007 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:48,007 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:48,008 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:48,009 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:48,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:48,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:48,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:48,072 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:48,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 08:02:48,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 08:02:48,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 08:02:48,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:02:48,072 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-12-08 08:02:48,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:48,863 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-12-08 08:02:48,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 08:02:48,864 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-12-08 08:02:48,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:49,083 INFO L225 Difference]: With dead ends: 104973 [2018-12-08 08:02:49,083 INFO L226 Difference]: Without dead ends: 104443 [2018-12-08 08:02:49,083 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-12-08 08:02:49,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-12-08 08:02:50,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-12-08 08:02:50,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-12-08 08:02:50,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-12-08 08:02:50,455 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-12-08 08:02:50,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:50,455 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-12-08 08:02:50,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 08:02:50,455 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-12-08 08:02:50,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 08:02:50,471 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:50,471 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:50,472 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:50,472 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:50,472 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-12-08 08:02:50,472 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:50,472 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:50,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:50,473 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:50,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:50,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:50,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:50,510 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:50,510 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:02:50,510 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:02:50,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:02:50,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:02:50,510 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-12-08 08:02:50,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:50,874 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-12-08 08:02:50,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 08:02:50,874 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-12-08 08:02:50,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:51,041 INFO L225 Difference]: With dead ends: 85627 [2018-12-08 08:02:51,041 INFO L226 Difference]: Without dead ends: 85627 [2018-12-08 08:02:51,041 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:02:51,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-12-08 08:02:52,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-12-08 08:02:52,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-12-08 08:02:52,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-12-08 08:02:52,368 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-12-08 08:02:52,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:52,368 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-12-08 08:02:52,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:02:52,369 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-12-08 08:02:52,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 08:02:52,385 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:52,385 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:52,385 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:52,385 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:52,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-12-08 08:02:52,385 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:52,386 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:52,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:52,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:52,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:52,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:52,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:52,543 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:52,543 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 08:02:52,544 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 08:02:52,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 08:02:52,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:02:52,544 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-12-08 08:02:53,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:53,574 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-12-08 08:02:53,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 08:02:53,575 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-12-08 08:02:53,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:53,803 INFO L225 Difference]: With dead ends: 111736 [2018-12-08 08:02:53,804 INFO L226 Difference]: Without dead ends: 111381 [2018-12-08 08:02:53,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-12-08 08:02:54,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-12-08 08:02:55,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-12-08 08:02:55,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-12-08 08:02:55,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-12-08 08:02:55,346 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-12-08 08:02:55,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:55,346 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-12-08 08:02:55,346 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 08:02:55,346 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-12-08 08:02:55,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-08 08:02:55,379 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:55,380 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:55,380 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:55,380 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:55,380 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-12-08 08:02:55,380 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:55,380 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:55,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:55,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:55,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:55,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:55,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:55,410 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:55,410 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 08:02:55,410 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 08:02:55,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 08:02:55,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:02:55,411 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-12-08 08:02:55,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:55,815 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-12-08 08:02:55,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 08:02:55,815 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-12-08 08:02:55,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:56,037 INFO L225 Difference]: With dead ends: 110538 [2018-12-08 08:02:56,037 INFO L226 Difference]: Without dead ends: 110538 [2018-12-08 08:02:56,037 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:02:56,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-12-08 08:02:57,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-12-08 08:02:57,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-12-08 08:02:57,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-12-08 08:02:57,523 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-12-08 08:02:57,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:02:57,523 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-12-08 08:02:57,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 08:02:57,523 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-12-08 08:02:57,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-08 08:02:57,555 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:02:57,555 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:02:57,555 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:02:57,555 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:02:57,555 INFO L82 PathProgramCache]: Analyzing trace with hash 192568783, now seen corresponding path program 1 times [2018-12-08 08:02:57,555 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:02:57,556 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:02:57,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:57,557 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:02:57,557 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:02:57,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:02:57,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:02:57,587 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:02:57,587 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:02:57,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:02:57,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:02:57,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:02:57,587 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-12-08 08:02:58,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:02:58,201 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-12-08 08:02:58,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 08:02:58,202 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-12-08 08:02:58,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:02:58,437 INFO L225 Difference]: With dead ends: 119085 [2018-12-08 08:02:58,438 INFO L226 Difference]: Without dead ends: 119085 [2018-12-08 08:02:58,438 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:02:58,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-12-08 08:02:59,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-12-08 08:02:59,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-12-08 08:03:00,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-12-08 08:03:00,142 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-12-08 08:03:00,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:00,142 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-12-08 08:03:00,142 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:03:00,142 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-12-08 08:03:00,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-12-08 08:03:00,186 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:00,186 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:00,186 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:00,187 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:00,187 INFO L82 PathProgramCache]: Analyzing trace with hash 203884910, now seen corresponding path program 1 times [2018-12-08 08:03:00,187 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:00,187 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:00,188 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:00,188 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:00,188 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:00,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:00,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:00,212 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:00,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 08:03:00,212 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 08:03:00,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 08:03:00,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:03:00,213 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-12-08 08:03:00,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:00,722 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-12-08 08:03:00,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 08:03:00,722 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-12-08 08:03:00,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:00,931 INFO L225 Difference]: With dead ends: 107236 [2018-12-08 08:03:00,932 INFO L226 Difference]: Without dead ends: 107236 [2018-12-08 08:03:00,932 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:03:01,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-12-08 08:03:02,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-12-08 08:03:02,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-12-08 08:03:02,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-12-08 08:03:02,565 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-12-08 08:03:02,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:02,565 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-12-08 08:03:02,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 08:03:02,565 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-12-08 08:03:02,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:02,610 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:02,610 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:02,610 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:02,610 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:02,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1562608461, now seen corresponding path program 1 times [2018-12-08 08:03:02,611 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:02,611 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:02,612 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:02,612 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:02,612 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:02,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:02,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:02,676 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:02,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:03:02,677 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:03:02,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:03:02,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:02,677 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-12-08 08:03:03,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:03,780 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-12-08 08:03:03,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:03,780 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-08 08:03:03,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:04,261 INFO L225 Difference]: With dead ends: 138332 [2018-12-08 08:03:04,262 INFO L226 Difference]: Without dead ends: 137832 [2018-12-08 08:03:04,262 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:04,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-12-08 08:03:05,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-12-08 08:03:05,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-12-08 08:03:05,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-12-08 08:03:05,951 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-12-08 08:03:05,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:05,951 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-12-08 08:03:05,951 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:03:05,951 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-12-08 08:03:06,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:06,001 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:06,001 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:06,001 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:06,002 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:06,002 INFO L82 PathProgramCache]: Analyzing trace with hash -1551292334, now seen corresponding path program 1 times [2018-12-08 08:03:06,002 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:06,002 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:06,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:06,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:06,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:06,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:06,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:06,066 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:06,066 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:03:06,067 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:03:06,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:03:06,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:06,067 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-12-08 08:03:06,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:06,985 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-12-08 08:03:06,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:03:06,986 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-08 08:03:06,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:07,231 INFO L225 Difference]: With dead ends: 133218 [2018-12-08 08:03:07,231 INFO L226 Difference]: Without dead ends: 133218 [2018-12-08 08:03:07,231 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:03:07,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-12-08 08:03:08,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-12-08 08:03:08,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-12-08 08:03:09,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-12-08 08:03:09,004 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-12-08 08:03:09,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:09,004 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-12-08 08:03:09,004 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:03:09,004 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-12-08 08:03:09,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:09,055 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:09,055 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:09,056 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:09,056 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:09,056 INFO L82 PathProgramCache]: Analyzing trace with hash -1520272527, now seen corresponding path program 1 times [2018-12-08 08:03:09,056 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:09,056 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:09,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:09,057 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:09,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:09,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:09,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:09,105 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:09,105 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:09,105 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:09,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:09,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:09,106 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-12-08 08:03:09,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:09,981 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-12-08 08:03:09,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:09,981 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-08 08:03:09,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:10,270 INFO L225 Difference]: With dead ends: 151316 [2018-12-08 08:03:10,270 INFO L226 Difference]: Without dead ends: 151316 [2018-12-08 08:03:10,271 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:10,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-12-08 08:03:11,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-12-08 08:03:11,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-12-08 08:03:12,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-12-08 08:03:12,671 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-12-08 08:03:12,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:12,672 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-12-08 08:03:12,672 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:12,672 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-12-08 08:03:12,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:12,728 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:12,728 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:12,729 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:12,729 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:12,729 INFO L82 PathProgramCache]: Analyzing trace with hash 1777622416, now seen corresponding path program 1 times [2018-12-08 08:03:12,729 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:12,729 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:12,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:12,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:12,731 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:12,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:12,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:12,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:12,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:12,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:12,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:12,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:12,773 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-12-08 08:03:13,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:13,775 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-12-08 08:03:13,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:03:13,776 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-12-08 08:03:13,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:14,201 INFO L225 Difference]: With dead ends: 206315 [2018-12-08 08:03:14,201 INFO L226 Difference]: Without dead ends: 206315 [2018-12-08 08:03:14,201 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:03:14,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-12-08 08:03:16,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-12-08 08:03:16,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-12-08 08:03:16,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-12-08 08:03:16,980 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-12-08 08:03:16,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:16,980 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-12-08 08:03:16,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:16,980 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-12-08 08:03:17,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:17,051 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:17,051 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:17,052 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:17,052 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:17,052 INFO L82 PathProgramCache]: Analyzing trace with hash -19328943, now seen corresponding path program 1 times [2018-12-08 08:03:17,052 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:17,052 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:17,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:17,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:17,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:17,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:17,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:17,085 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:17,086 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:03:17,086 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:03:17,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:03:17,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:03:17,086 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 4 states. [2018-12-08 08:03:18,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:18,604 INFO L93 Difference]: Finished difference Result 229302 states and 852725 transitions. [2018-12-08 08:03:18,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 08:03:18,604 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2018-12-08 08:03:18,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:19,076 INFO L225 Difference]: With dead ends: 229302 [2018-12-08 08:03:19,076 INFO L226 Difference]: Without dead ends: 226678 [2018-12-08 08:03:19,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:19,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226678 states. [2018-12-08 08:03:21,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226678 to 213350. [2018-12-08 08:03:21,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213350 states. [2018-12-08 08:03:22,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213350 states to 213350 states and 794333 transitions. [2018-12-08 08:03:22,452 INFO L78 Accepts]: Start accepts. Automaton has 213350 states and 794333 transitions. Word has length 95 [2018-12-08 08:03:22,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:22,452 INFO L480 AbstractCegarLoop]: Abstraction has 213350 states and 794333 transitions. [2018-12-08 08:03:22,453 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:03:22,453 INFO L276 IsEmpty]: Start isEmpty. Operand 213350 states and 794333 transitions. [2018-12-08 08:03:22,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:22,531 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:22,531 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:22,532 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:22,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:22,532 INFO L82 PathProgramCache]: Analyzing trace with hash -312731950, now seen corresponding path program 1 times [2018-12-08 08:03:22,532 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:22,532 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:22,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:22,533 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:22,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:22,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:22,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:22,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:22,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 08:03:22,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 08:03:22,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 08:03:22,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:22,607 INFO L87 Difference]: Start difference. First operand 213350 states and 794333 transitions. Second operand 7 states. [2018-12-08 08:03:23,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:23,848 INFO L93 Difference]: Finished difference Result 189931 states and 685766 transitions. [2018-12-08 08:03:23,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:03:23,848 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-12-08 08:03:23,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:24,225 INFO L225 Difference]: With dead ends: 189931 [2018-12-08 08:03:24,225 INFO L226 Difference]: Without dead ends: 189931 [2018-12-08 08:03:24,226 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:03:24,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189931 states. [2018-12-08 08:03:26,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189931 to 162086. [2018-12-08 08:03:26,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162086 states. [2018-12-08 08:03:26,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162086 states to 162086 states and 586268 transitions. [2018-12-08 08:03:26,827 INFO L78 Accepts]: Start accepts. Automaton has 162086 states and 586268 transitions. Word has length 95 [2018-12-08 08:03:26,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:26,827 INFO L480 AbstractCegarLoop]: Abstraction has 162086 states and 586268 transitions. [2018-12-08 08:03:26,827 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 08:03:26,827 INFO L276 IsEmpty]: Start isEmpty. Operand 162086 states and 586268 transitions. [2018-12-08 08:03:26,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-12-08 08:03:26,892 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:26,892 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:26,892 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:26,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:26,892 INFO L82 PathProgramCache]: Analyzing trace with hash -2120186413, now seen corresponding path program 1 times [2018-12-08 08:03:26,892 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:26,892 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:26,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:26,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:26,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:26,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:26,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:26,933 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:26,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:03:26,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:03:26,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:03:26,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:26,934 INFO L87 Difference]: Start difference. First operand 162086 states and 586268 transitions. Second operand 6 states. [2018-12-08 08:03:27,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:27,079 INFO L93 Difference]: Finished difference Result 46438 states and 144284 transitions. [2018-12-08 08:03:27,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:27,079 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-12-08 08:03:27,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:27,123 INFO L225 Difference]: With dead ends: 46438 [2018-12-08 08:03:27,123 INFO L226 Difference]: Without dead ends: 39377 [2018-12-08 08:03:27,123 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:03:27,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39377 states. [2018-12-08 08:03:27,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39377 to 35862. [2018-12-08 08:03:27,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35862 states. [2018-12-08 08:03:27,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35862 states to 35862 states and 109114 transitions. [2018-12-08 08:03:27,737 INFO L78 Accepts]: Start accepts. Automaton has 35862 states and 109114 transitions. Word has length 95 [2018-12-08 08:03:27,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:27,737 INFO L480 AbstractCegarLoop]: Abstraction has 35862 states and 109114 transitions. [2018-12-08 08:03:27,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:03:27,738 INFO L276 IsEmpty]: Start isEmpty. Operand 35862 states and 109114 transitions. [2018-12-08 08:03:27,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 08:03:27,761 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:27,761 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:27,761 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:27,761 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:27,761 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-12-08 08:03:27,761 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:27,761 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:27,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:27,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:27,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:27,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:27,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:27,802 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:27,802 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:27,802 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:27,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:27,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:27,802 INFO L87 Difference]: Start difference. First operand 35862 states and 109114 transitions. Second operand 5 states. [2018-12-08 08:03:27,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:27,987 INFO L93 Difference]: Finished difference Result 40412 states and 123284 transitions. [2018-12-08 08:03:27,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:03:27,988 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-08 08:03:27,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:28,031 INFO L225 Difference]: With dead ends: 40412 [2018-12-08 08:03:28,031 INFO L226 Difference]: Without dead ends: 40412 [2018-12-08 08:03:28,032 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:03:28,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40412 states. [2018-12-08 08:03:28,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40412 to 35977. [2018-12-08 08:03:28,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35977 states. [2018-12-08 08:03:28,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35977 states to 35977 states and 109436 transitions. [2018-12-08 08:03:28,422 INFO L78 Accepts]: Start accepts. Automaton has 35977 states and 109436 transitions. Word has length 98 [2018-12-08 08:03:28,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:28,422 INFO L480 AbstractCegarLoop]: Abstraction has 35977 states and 109436 transitions. [2018-12-08 08:03:28,422 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:28,422 INFO L276 IsEmpty]: Start isEmpty. Operand 35977 states and 109436 transitions. [2018-12-08 08:03:28,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 08:03:28,448 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:28,448 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:28,448 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:28,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:28,448 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-12-08 08:03:28,448 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:28,448 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:28,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:28,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:28,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:28,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:28,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:28,524 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:28,524 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:28,525 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:28,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:28,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:28,525 INFO L87 Difference]: Start difference. First operand 35977 states and 109436 transitions. Second operand 5 states. [2018-12-08 08:03:28,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:28,645 INFO L93 Difference]: Finished difference Result 44527 states and 136285 transitions. [2018-12-08 08:03:28,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:03:28,646 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-12-08 08:03:28,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:28,690 INFO L225 Difference]: With dead ends: 44527 [2018-12-08 08:03:28,690 INFO L226 Difference]: Without dead ends: 44527 [2018-12-08 08:03:28,691 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:28,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44527 states. [2018-12-08 08:03:29,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44527 to 36847. [2018-12-08 08:03:29,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36847 states. [2018-12-08 08:03:29,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36847 states to 36847 states and 111882 transitions. [2018-12-08 08:03:29,107 INFO L78 Accepts]: Start accepts. Automaton has 36847 states and 111882 transitions. Word has length 98 [2018-12-08 08:03:29,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:29,107 INFO L480 AbstractCegarLoop]: Abstraction has 36847 states and 111882 transitions. [2018-12-08 08:03:29,107 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:29,107 INFO L276 IsEmpty]: Start isEmpty. Operand 36847 states and 111882 transitions. [2018-12-08 08:03:29,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-08 08:03:29,133 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:29,133 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:29,134 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:29,134 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:29,134 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-12-08 08:03:29,134 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:29,134 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:29,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:29,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:29,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:29,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:29,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:29,197 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:29,197 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:03:29,198 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:03:29,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:03:29,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:29,198 INFO L87 Difference]: Start difference. First operand 36847 states and 111882 transitions. Second operand 6 states. [2018-12-08 08:03:29,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:29,633 INFO L93 Difference]: Finished difference Result 69663 states and 211622 transitions. [2018-12-08 08:03:29,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 08:03:29,634 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-12-08 08:03:29,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:29,712 INFO L225 Difference]: With dead ends: 69663 [2018-12-08 08:03:29,712 INFO L226 Difference]: Without dead ends: 69153 [2018-12-08 08:03:29,712 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:03:29,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69153 states. [2018-12-08 08:03:30,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69153 to 40017. [2018-12-08 08:03:30,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40017 states. [2018-12-08 08:03:30,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40017 states to 40017 states and 121143 transitions. [2018-12-08 08:03:30,307 INFO L78 Accepts]: Start accepts. Automaton has 40017 states and 121143 transitions. Word has length 98 [2018-12-08 08:03:30,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:30,307 INFO L480 AbstractCegarLoop]: Abstraction has 40017 states and 121143 transitions. [2018-12-08 08:03:30,307 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:03:30,307 INFO L276 IsEmpty]: Start isEmpty. Operand 40017 states and 121143 transitions. [2018-12-08 08:03:30,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-08 08:03:30,339 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:30,339 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:30,340 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:30,340 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:30,340 INFO L82 PathProgramCache]: Analyzing trace with hash -888938277, now seen corresponding path program 1 times [2018-12-08 08:03:30,340 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:30,340 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:30,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:30,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:30,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:30,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:30,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:30,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:30,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 08:03:30,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 08:03:30,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 08:03:30,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:30,399 INFO L87 Difference]: Start difference. First operand 40017 states and 121143 transitions. Second operand 7 states. [2018-12-08 08:03:30,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:30,947 INFO L93 Difference]: Finished difference Result 54150 states and 162666 transitions. [2018-12-08 08:03:30,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:30,948 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-08 08:03:30,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:31,007 INFO L225 Difference]: With dead ends: 54150 [2018-12-08 08:03:31,008 INFO L226 Difference]: Without dead ends: 54150 [2018-12-08 08:03:31,008 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:31,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54150 states. [2018-12-08 08:03:31,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54150 to 42062. [2018-12-08 08:03:31,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42062 states. [2018-12-08 08:03:31,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42062 states to 42062 states and 127579 transitions. [2018-12-08 08:03:31,497 INFO L78 Accepts]: Start accepts. Automaton has 42062 states and 127579 transitions. Word has length 122 [2018-12-08 08:03:31,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:31,497 INFO L480 AbstractCegarLoop]: Abstraction has 42062 states and 127579 transitions. [2018-12-08 08:03:31,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 08:03:31,497 INFO L276 IsEmpty]: Start isEmpty. Operand 42062 states and 127579 transitions. [2018-12-08 08:03:31,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-08 08:03:31,531 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:31,532 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:31,532 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:31,532 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:31,532 INFO L82 PathProgramCache]: Analyzing trace with hash 909121578, now seen corresponding path program 1 times [2018-12-08 08:03:31,532 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:31,532 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:31,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:31,533 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:31,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:31,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:31,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:31,575 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:31,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:03:31,575 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:03:31,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:03:31,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:03:31,576 INFO L87 Difference]: Start difference. First operand 42062 states and 127579 transitions. Second operand 4 states. [2018-12-08 08:03:31,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:31,725 INFO L93 Difference]: Finished difference Result 46672 states and 140462 transitions. [2018-12-08 08:03:31,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 08:03:31,725 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 122 [2018-12-08 08:03:31,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:31,774 INFO L225 Difference]: With dead ends: 46672 [2018-12-08 08:03:31,774 INFO L226 Difference]: Without dead ends: 46672 [2018-12-08 08:03:31,774 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:31,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46672 states. [2018-12-08 08:03:32,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46672 to 42917. [2018-12-08 08:03:32,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42917 states. [2018-12-08 08:03:32,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42917 states to 42917 states and 129538 transitions. [2018-12-08 08:03:32,294 INFO L78 Accepts]: Start accepts. Automaton has 42917 states and 129538 transitions. Word has length 122 [2018-12-08 08:03:32,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:32,294 INFO L480 AbstractCegarLoop]: Abstraction has 42917 states and 129538 transitions. [2018-12-08 08:03:32,294 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:03:32,294 INFO L276 IsEmpty]: Start isEmpty. Operand 42917 states and 129538 transitions. [2018-12-08 08:03:32,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-08 08:03:32,329 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:32,329 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:32,329 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:32,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:32,329 INFO L82 PathProgramCache]: Analyzing trace with hash 1143872236, now seen corresponding path program 1 times [2018-12-08 08:03:32,330 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:32,330 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:32,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:32,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:32,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:32,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:32,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:32,363 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:32,363 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:32,364 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:32,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:32,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:32,364 INFO L87 Difference]: Start difference. First operand 42917 states and 129538 transitions. Second operand 5 states. [2018-12-08 08:03:32,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:32,544 INFO L93 Difference]: Finished difference Result 50492 states and 152208 transitions. [2018-12-08 08:03:32,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:32,544 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-08 08:03:32,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:32,601 INFO L225 Difference]: With dead ends: 50492 [2018-12-08 08:03:32,601 INFO L226 Difference]: Without dead ends: 50492 [2018-12-08 08:03:32,601 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:32,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50492 states. [2018-12-08 08:03:33,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50492 to 43222. [2018-12-08 08:03:33,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43222 states. [2018-12-08 08:03:33,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43222 states to 43222 states and 130232 transitions. [2018-12-08 08:03:33,079 INFO L78 Accepts]: Start accepts. Automaton has 43222 states and 130232 transitions. Word has length 124 [2018-12-08 08:03:33,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:33,079 INFO L480 AbstractCegarLoop]: Abstraction has 43222 states and 130232 transitions. [2018-12-08 08:03:33,080 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:33,080 INFO L276 IsEmpty]: Start isEmpty. Operand 43222 states and 130232 transitions. [2018-12-08 08:03:33,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-08 08:03:33,114 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:33,114 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:33,114 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:33,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:33,114 INFO L82 PathProgramCache]: Analyzing trace with hash -866231605, now seen corresponding path program 1 times [2018-12-08 08:03:33,114 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:33,114 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:33,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:33,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:33,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:33,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:33,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:33,145 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:33,145 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 08:03:33,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 08:03:33,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 08:03:33,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 08:03:33,146 INFO L87 Difference]: Start difference. First operand 43222 states and 130232 transitions. Second operand 4 states. [2018-12-08 08:03:33,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:33,421 INFO L93 Difference]: Finished difference Result 55152 states and 165626 transitions. [2018-12-08 08:03:33,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 08:03:33,422 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-12-08 08:03:33,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:33,482 INFO L225 Difference]: With dead ends: 55152 [2018-12-08 08:03:33,483 INFO L226 Difference]: Without dead ends: 54817 [2018-12-08 08:03:33,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:33,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54817 states. [2018-12-08 08:03:33,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54817 to 48347. [2018-12-08 08:03:33,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48347 states. [2018-12-08 08:03:34,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48347 states to 48347 states and 145392 transitions. [2018-12-08 08:03:34,037 INFO L78 Accepts]: Start accepts. Automaton has 48347 states and 145392 transitions. Word has length 124 [2018-12-08 08:03:34,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:34,037 INFO L480 AbstractCegarLoop]: Abstraction has 48347 states and 145392 transitions. [2018-12-08 08:03:34,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 08:03:34,037 INFO L276 IsEmpty]: Start isEmpty. Operand 48347 states and 145392 transitions. [2018-12-08 08:03:34,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-08 08:03:34,075 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:34,075 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:34,075 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:34,076 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:34,076 INFO L82 PathProgramCache]: Analyzing trace with hash 95382412, now seen corresponding path program 1 times [2018-12-08 08:03:34,076 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:34,076 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:34,077 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:34,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:34,077 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:34,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:34,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:34,147 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:34,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 08:03:34,147 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 08:03:34,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 08:03:34,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:03:34,148 INFO L87 Difference]: Start difference. First operand 48347 states and 145392 transitions. Second operand 10 states. [2018-12-08 08:03:34,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:34,783 INFO L93 Difference]: Finished difference Result 63504 states and 191277 transitions. [2018-12-08 08:03:34,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 08:03:34,784 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-12-08 08:03:34,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:34,852 INFO L225 Difference]: With dead ends: 63504 [2018-12-08 08:03:34,852 INFO L226 Difference]: Without dead ends: 63504 [2018-12-08 08:03:34,852 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:03:34,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63504 states. [2018-12-08 08:03:35,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63504 to 54007. [2018-12-08 08:03:35,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54007 states. [2018-12-08 08:03:35,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54007 states to 54007 states and 162680 transitions. [2018-12-08 08:03:35,488 INFO L78 Accepts]: Start accepts. Automaton has 54007 states and 162680 transitions. Word has length 124 [2018-12-08 08:03:35,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:35,488 INFO L480 AbstractCegarLoop]: Abstraction has 54007 states and 162680 transitions. [2018-12-08 08:03:35,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 08:03:35,488 INFO L276 IsEmpty]: Start isEmpty. Operand 54007 states and 162680 transitions. [2018-12-08 08:03:35,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-08 08:03:35,538 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:35,538 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:35,538 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:35,538 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:35,538 INFO L82 PathProgramCache]: Analyzing trace with hash 1340146893, now seen corresponding path program 1 times [2018-12-08 08:03:35,539 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:35,539 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:35,539 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:35,539 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:35,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:35,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:35,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:35,604 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:35,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:35,604 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:35,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:35,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:35,604 INFO L87 Difference]: Start difference. First operand 54007 states and 162680 transitions. Second operand 5 states. [2018-12-08 08:03:35,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:35,791 INFO L93 Difference]: Finished difference Result 54007 states and 162616 transitions. [2018-12-08 08:03:35,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 08:03:35,791 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-12-08 08:03:35,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:35,847 INFO L225 Difference]: With dead ends: 54007 [2018-12-08 08:03:35,847 INFO L226 Difference]: Without dead ends: 54007 [2018-12-08 08:03:35,847 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:35,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54007 states. [2018-12-08 08:03:36,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54007 to 52354. [2018-12-08 08:03:36,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52354 states. [2018-12-08 08:03:36,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52354 states to 52354 states and 157453 transitions. [2018-12-08 08:03:36,414 INFO L78 Accepts]: Start accepts. Automaton has 52354 states and 157453 transitions. Word has length 124 [2018-12-08 08:03:36,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:36,415 INFO L480 AbstractCegarLoop]: Abstraction has 52354 states and 157453 transitions. [2018-12-08 08:03:36,415 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:36,415 INFO L276 IsEmpty]: Start isEmpty. Operand 52354 states and 157453 transitions. [2018-12-08 08:03:36,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-12-08 08:03:36,462 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:36,462 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:36,462 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:36,462 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:36,462 INFO L82 PathProgramCache]: Analyzing trace with hash -467307570, now seen corresponding path program 1 times [2018-12-08 08:03:36,463 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:36,463 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:36,463 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:36,464 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:36,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:36,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:36,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:36,487 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:36,487 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 08:03:36,488 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 08:03:36,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 08:03:36,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:03:36,488 INFO L87 Difference]: Start difference. First operand 52354 states and 157453 transitions. Second operand 3 states. [2018-12-08 08:03:36,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:36,603 INFO L93 Difference]: Finished difference Result 52354 states and 157389 transitions. [2018-12-08 08:03:36,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 08:03:36,603 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-12-08 08:03:36,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:36,667 INFO L225 Difference]: With dead ends: 52354 [2018-12-08 08:03:36,667 INFO L226 Difference]: Without dead ends: 52354 [2018-12-08 08:03:36,667 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 08:03:36,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52354 states. [2018-12-08 08:03:37,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52354 to 52354. [2018-12-08 08:03:37,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52354 states. [2018-12-08 08:03:37,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52354 states to 52354 states and 157389 transitions. [2018-12-08 08:03:37,210 INFO L78 Accepts]: Start accepts. Automaton has 52354 states and 157389 transitions. Word has length 124 [2018-12-08 08:03:37,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:37,210 INFO L480 AbstractCegarLoop]: Abstraction has 52354 states and 157389 transitions. [2018-12-08 08:03:37,210 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 08:03:37,210 INFO L276 IsEmpty]: Start isEmpty. Operand 52354 states and 157389 transitions. [2018-12-08 08:03:37,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 08:03:37,259 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:37,259 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:37,259 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:37,260 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:37,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1639599003, now seen corresponding path program 1 times [2018-12-08 08:03:37,260 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:37,260 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:37,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:37,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:37,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:37,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:37,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:37,345 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:37,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 08:03:37,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 08:03:37,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 08:03:37,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:03:37,345 INFO L87 Difference]: Start difference. First operand 52354 states and 157389 transitions. Second operand 10 states. [2018-12-08 08:03:37,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:37,853 INFO L93 Difference]: Finished difference Result 68937 states and 207176 transitions. [2018-12-08 08:03:37,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:03:37,853 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-12-08 08:03:37,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:37,877 INFO L225 Difference]: With dead ends: 68937 [2018-12-08 08:03:37,877 INFO L226 Difference]: Without dead ends: 24597 [2018-12-08 08:03:37,877 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:03:37,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24597 states. [2018-12-08 08:03:38,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24597 to 24014. [2018-12-08 08:03:38,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24014 states. [2018-12-08 08:03:38,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24014 states to 24014 states and 67369 transitions. [2018-12-08 08:03:38,096 INFO L78 Accepts]: Start accepts. Automaton has 24014 states and 67369 transitions. Word has length 126 [2018-12-08 08:03:38,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:38,097 INFO L480 AbstractCegarLoop]: Abstraction has 24014 states and 67369 transitions. [2018-12-08 08:03:38,097 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 08:03:38,097 INFO L276 IsEmpty]: Start isEmpty. Operand 24014 states and 67369 transitions. [2018-12-08 08:03:38,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 08:03:38,114 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:38,114 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:38,114 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:38,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:38,115 INFO L82 PathProgramCache]: Analyzing trace with hash 936758017, now seen corresponding path program 2 times [2018-12-08 08:03:38,115 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:38,115 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:38,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:38,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:38,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:38,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:38,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:38,204 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:38,205 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 08:03:38,205 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 08:03:38,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 08:03:38,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:03:38,205 INFO L87 Difference]: Start difference. First operand 24014 states and 67369 transitions. Second operand 9 states. [2018-12-08 08:03:38,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:38,578 INFO L93 Difference]: Finished difference Result 34229 states and 97985 transitions. [2018-12-08 08:03:38,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:03:38,578 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-12-08 08:03:38,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:38,587 INFO L225 Difference]: With dead ends: 34229 [2018-12-08 08:03:38,587 INFO L226 Difference]: Without dead ends: 8775 [2018-12-08 08:03:38,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:03:38,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8775 states. [2018-12-08 08:03:38,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8775 to 8775. [2018-12-08 08:03:38,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8775 states. [2018-12-08 08:03:38,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8775 states to 8775 states and 26541 transitions. [2018-12-08 08:03:38,659 INFO L78 Accepts]: Start accepts. Automaton has 8775 states and 26541 transitions. Word has length 126 [2018-12-08 08:03:38,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:38,660 INFO L480 AbstractCegarLoop]: Abstraction has 8775 states and 26541 transitions. [2018-12-08 08:03:38,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 08:03:38,660 INFO L276 IsEmpty]: Start isEmpty. Operand 8775 states and 26541 transitions. [2018-12-08 08:03:38,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 08:03:38,666 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:38,666 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:38,667 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:38,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:38,667 INFO L82 PathProgramCache]: Analyzing trace with hash 932642473, now seen corresponding path program 1 times [2018-12-08 08:03:38,667 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:38,667 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:38,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:38,668 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:03:38,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:38,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:38,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:38,730 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:38,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:03:38,730 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:03:38,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:03:38,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:38,731 INFO L87 Difference]: Start difference. First operand 8775 states and 26541 transitions. Second operand 6 states. [2018-12-08 08:03:38,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:38,801 INFO L93 Difference]: Finished difference Result 9879 states and 29561 transitions. [2018-12-08 08:03:38,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:38,801 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-12-08 08:03:38,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:38,809 INFO L225 Difference]: With dead ends: 9879 [2018-12-08 08:03:38,810 INFO L226 Difference]: Without dead ends: 9743 [2018-12-08 08:03:38,810 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:38,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9743 states. [2018-12-08 08:03:38,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9743 to 8383. [2018-12-08 08:03:38,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8383 states. [2018-12-08 08:03:38,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8383 states to 8383 states and 25267 transitions. [2018-12-08 08:03:38,887 INFO L78 Accepts]: Start accepts. Automaton has 8383 states and 25267 transitions. Word has length 126 [2018-12-08 08:03:38,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:38,887 INFO L480 AbstractCegarLoop]: Abstraction has 8383 states and 25267 transitions. [2018-12-08 08:03:38,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:03:38,887 INFO L276 IsEmpty]: Start isEmpty. Operand 8383 states and 25267 transitions. [2018-12-08 08:03:38,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 08:03:38,893 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:38,894 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:38,894 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:38,894 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:38,894 INFO L82 PathProgramCache]: Analyzing trace with hash -1251034454, now seen corresponding path program 1 times [2018-12-08 08:03:38,894 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:38,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:38,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:38,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:38,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:38,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:38,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:38,947 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:38,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 08:03:38,947 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 08:03:38,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 08:03:38,947 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-08 08:03:38,947 INFO L87 Difference]: Start difference. First operand 8383 states and 25267 transitions. Second operand 5 states. [2018-12-08 08:03:39,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:39,014 INFO L93 Difference]: Finished difference Result 8963 states and 26726 transitions. [2018-12-08 08:03:39,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-08 08:03:39,014 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-12-08 08:03:39,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:39,021 INFO L225 Difference]: With dead ends: 8963 [2018-12-08 08:03:39,021 INFO L226 Difference]: Without dead ends: 8963 [2018-12-08 08:03:39,022 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:03:39,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8963 states. [2018-12-08 08:03:39,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8963 to 7759. [2018-12-08 08:03:39,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7759 states. [2018-12-08 08:03:39,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7759 states to 7759 states and 23287 transitions. [2018-12-08 08:03:39,092 INFO L78 Accepts]: Start accepts. Automaton has 7759 states and 23287 transitions. Word has length 126 [2018-12-08 08:03:39,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:39,092 INFO L480 AbstractCegarLoop]: Abstraction has 7759 states and 23287 transitions. [2018-12-08 08:03:39,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 08:03:39,093 INFO L276 IsEmpty]: Start isEmpty. Operand 7759 states and 23287 transitions. [2018-12-08 08:03:39,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 08:03:39,098 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:39,098 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:39,098 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:39,098 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:39,098 INFO L82 PathProgramCache]: Analyzing trace with hash 573363246, now seen corresponding path program 1 times [2018-12-08 08:03:39,099 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:39,099 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:39,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:39,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:39,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:39,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:03:39,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 08:03:39,156 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:03:39,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-08 08:03:39,157 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 08:03:39,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 08:03:39,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:03:39,157 INFO L87 Difference]: Start difference. First operand 7759 states and 23287 transitions. Second operand 7 states. [2018-12-08 08:03:39,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:03:39,252 INFO L93 Difference]: Finished difference Result 12292 states and 37120 transitions. [2018-12-08 08:03:39,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:03:39,253 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-12-08 08:03:39,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:03:39,264 INFO L225 Difference]: With dead ends: 12292 [2018-12-08 08:03:39,264 INFO L226 Difference]: Without dead ends: 12292 [2018-12-08 08:03:39,265 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:03:39,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12292 states. [2018-12-08 08:03:39,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12292 to 7259. [2018-12-08 08:03:39,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7259 states. [2018-12-08 08:03:39,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7259 states to 7259 states and 21780 transitions. [2018-12-08 08:03:39,350 INFO L78 Accepts]: Start accepts. Automaton has 7259 states and 21780 transitions. Word has length 126 [2018-12-08 08:03:39,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:03:39,350 INFO L480 AbstractCegarLoop]: Abstraction has 7259 states and 21780 transitions. [2018-12-08 08:03:39,350 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 08:03:39,350 INFO L276 IsEmpty]: Start isEmpty. Operand 7259 states and 21780 transitions. [2018-12-08 08:03:39,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 08:03:39,355 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:03:39,356 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:03:39,356 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:03:39,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:03:39,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1771303795, now seen corresponding path program 3 times [2018-12-08 08:03:39,356 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:03:39,356 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:03:39,357 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:39,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:03:39,357 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:03:39,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 08:03:39,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 08:03:39,425 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 08:03:39,541 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-08 08:03:39,542 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 08:03:39 BasicIcfg [2018-12-08 08:03:39,542 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 08:03:39,542 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 08:03:39,542 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 08:03:39,542 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 08:03:39,543 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:00:45" (3/4) ... [2018-12-08 08:03:39,544 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-08 08:03:39,687 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_385657bf-0497-48c2-9b20-d821e8728834/bin-2019/uautomizer/witness.graphml [2018-12-08 08:03:39,687 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 08:03:39,688 INFO L168 Benchmark]: Toolchain (without parser) took 174805.67 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 950.6 MB in the beginning and 5.5 GB in the end (delta: -4.5 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,689 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 08:03:39,689 INFO L168 Benchmark]: CACSL2BoogieTranslator took 343.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -112.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,689 INFO L168 Benchmark]: Boogie Procedure Inliner took 32.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,689 INFO L168 Benchmark]: Boogie Preprocessor took 23.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,689 INFO L168 Benchmark]: RCFGBuilder took 424.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.0 MB in the end (delta: 63.4 MB). Peak memory consumption was 63.4 MB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,690 INFO L168 Benchmark]: TraceAbstraction took 173832.54 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 994.0 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,690 INFO L168 Benchmark]: Witness Printer took 144.99 ms. Allocated memory was 7.5 GB in the beginning and 7.5 GB in the end (delta: -6.3 MB). Free memory was 4.0 GB in the beginning and 5.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 55.8 MB. Max. memory is 11.5 GB. [2018-12-08 08:03:39,691 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 979.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 343.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 950.6 MB in the beginning and 1.1 GB in the end (delta: -112.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 32.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 424.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.0 MB in the end (delta: 63.4 MB). Peak memory consumption was 63.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 173832.54 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 994.0 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 144.99 ms. Allocated memory was 7.5 GB in the beginning and 7.5 GB in the end (delta: -6.3 MB). Free memory was 4.0 GB in the beginning and 5.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 55.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t1942; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t1942, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t1943; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t1943, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t1944; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t1944, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={8:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={8:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={8:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 173.7s OverallTime, 34 OverallIterations, 1 TraceHistogramMax, 31.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11971 SDtfs, 18162 SDslu, 24144 SDs, 0 SdLazy, 9594 SolverSat, 685 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 326 GetRequests, 78 SyntacticMatches, 34 SemanticMatches, 214 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 53.0s AutomataMinimizationTime, 33 MinimizatonAttempts, 529685 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 3455 NumberOfCodeBlocks, 3455 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 3296 ConstructedInterpolants, 0 QuantifiedInterpolants, 852475 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...