./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ee05cb2d66f71fb2277986b04bb223cfc634fed1 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: TRUE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 08:40:14,473 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 08:40:14,474 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 08:40:14,480 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 08:40:14,480 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 08:40:14,480 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 08:40:14,481 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 08:40:14,482 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 08:40:14,483 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 08:40:14,483 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 08:40:14,484 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 08:40:14,484 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 08:40:14,484 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 08:40:14,485 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 08:40:14,486 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 08:40:14,486 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 08:40:14,486 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 08:40:14,487 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 08:40:14,488 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 08:40:14,489 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 08:40:14,490 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 08:40:14,490 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 08:40:14,491 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 08:40:14,492 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 08:40:14,492 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 08:40:14,492 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 08:40:14,493 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 08:40:14,493 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 08:40:14,494 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 08:40:14,494 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 08:40:14,494 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 08:40:14,495 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 08:40:14,495 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 08:40:14,495 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 08:40:14,495 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 08:40:14,496 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 08:40:14,496 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-12-08 08:40:14,503 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 08:40:14,504 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 08:40:14,504 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 08:40:14,504 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 08:40:14,505 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 08:40:14,505 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 08:40:14,505 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 08:40:14,506 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 08:40:14,506 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 08:40:14,506 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 08:40:14,507 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 08:40:14,507 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 08:40:14,507 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-08 08:40:14,507 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 08:40:14,507 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 08:40:14,507 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-12-08 08:40:14,524 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 08:40:14,531 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 08:40:14,533 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 08:40:14,534 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 08:40:14,534 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 08:40:14,535 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 08:40:14,570 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/9494e0260/94589ae823454afe9719500a9ee30a83/FLAG3af15f091 [2018-12-08 08:40:14,909 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 08:40:14,910 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 08:40:14,916 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/9494e0260/94589ae823454afe9719500a9ee30a83/FLAG3af15f091 [2018-12-08 08:40:14,925 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/9494e0260/94589ae823454afe9719500a9ee30a83 [2018-12-08 08:40:14,927 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 08:40:14,928 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 08:40:14,929 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 08:40:14,929 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 08:40:14,931 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 08:40:14,931 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 08:40:14" (1/1) ... [2018-12-08 08:40:14,933 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47e9f86c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:14, skipping insertion in model container [2018-12-08 08:40:14,933 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 08:40:14" (1/1) ... [2018-12-08 08:40:14,937 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 08:40:14,950 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 08:40:15,051 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 08:40:15,054 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 08:40:15,075 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 08:40:15,083 INFO L195 MainTranslator]: Completed translation [2018-12-08 08:40:15,084 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15 WrapperNode [2018-12-08 08:40:15,084 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 08:40:15,084 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 08:40:15,084 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 08:40:15,084 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 08:40:15,089 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,093 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,097 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 08:40:15,097 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 08:40:15,097 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 08:40:15,097 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 08:40:15,133 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,133 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,134 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,134 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,138 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,141 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,142 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... [2018-12-08 08:40:15,143 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 08:40:15,144 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 08:40:15,144 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 08:40:15,144 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 08:40:15,144 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 08:40:15,176 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 08:40:15,176 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 08:40:15,176 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-12-08 08:40:15,176 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-12-08 08:40:15,176 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 08:40:15,176 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 08:40:15,176 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 08:40:15,176 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 08:40:15,177 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-12-08 08:40:15,177 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-12-08 08:40:15,177 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-08 08:40:15,177 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-08 08:40:15,338 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 08:40:15,338 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-08 08:40:15,338 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:40:15 BoogieIcfgContainer [2018-12-08 08:40:15,339 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 08:40:15,339 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 08:40:15,339 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 08:40:15,341 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 08:40:15,341 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 08:40:14" (1/3) ... [2018-12-08 08:40:15,342 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34b937f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 08:40:15, skipping insertion in model container [2018-12-08 08:40:15,342 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:15" (2/3) ... [2018-12-08 08:40:15,342 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34b937f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 08:40:15, skipping insertion in model container [2018-12-08 08:40:15,342 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:40:15" (3/3) ... [2018-12-08 08:40:15,343 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 08:40:15,349 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 08:40:15,354 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-08 08:40:15,364 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-08 08:40:15,382 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 08:40:15,382 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 08:40:15,382 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 08:40:15,383 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 08:40:15,383 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 08:40:15,383 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 08:40:15,383 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 08:40:15,383 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 08:40:15,383 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 08:40:15,394 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-12-08 08:40:15,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 08:40:15,398 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:15,399 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:15,400 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:15,403 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:15,403 INFO L82 PathProgramCache]: Analyzing trace with hash 1457053844, now seen corresponding path program 1 times [2018-12-08 08:40:15,404 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:15,405 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:15,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:15,433 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:15,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:15,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:15,607 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:15,608 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:40:15,609 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:40:15,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:15,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:15,636 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:15,687 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-08 08:40:15,709 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:15,709 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11] total 12 [2018-12-08 08:40:15,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 08:40:15,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 08:40:15,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:40:15,721 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 12 states. [2018-12-08 08:40:15,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:15,943 INFO L93 Difference]: Finished difference Result 157 states and 243 transitions. [2018-12-08 08:40:15,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 08:40:15,944 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 34 [2018-12-08 08:40:15,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:15,951 INFO L225 Difference]: With dead ends: 157 [2018-12-08 08:40:15,951 INFO L226 Difference]: Without dead ends: 99 [2018-12-08 08:40:15,953 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=312, Unknown=0, NotChecked=0, Total=380 [2018-12-08 08:40:15,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-12-08 08:40:15,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 77. [2018-12-08 08:40:15,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-08 08:40:15,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 106 transitions. [2018-12-08 08:40:15,985 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 106 transitions. Word has length 34 [2018-12-08 08:40:15,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:15,985 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 106 transitions. [2018-12-08 08:40:15,986 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 08:40:15,986 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 106 transitions. [2018-12-08 08:40:15,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 08:40:15,987 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:15,987 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:15,987 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:15,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:15,988 INFO L82 PathProgramCache]: Analyzing trace with hash 1514312146, now seen corresponding path program 1 times [2018-12-08 08:40:15,988 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:15,988 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:15,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:15,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:15,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:16,087 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:16,087 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:16,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 08:40:16,088 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:40:16,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:40:16,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:16,089 INFO L87 Difference]: Start difference. First operand 77 states and 106 transitions. Second operand 8 states. [2018-12-08 08:40:16,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:16,147 INFO L93 Difference]: Finished difference Result 137 states and 187 transitions. [2018-12-08 08:40:16,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:40:16,147 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-12-08 08:40:16,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:16,148 INFO L225 Difference]: With dead ends: 137 [2018-12-08 08:40:16,148 INFO L226 Difference]: Without dead ends: 100 [2018-12-08 08:40:16,149 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:16,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-12-08 08:40:16,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 85. [2018-12-08 08:40:16,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-08 08:40:16,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 114 transitions. [2018-12-08 08:40:16,157 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 114 transitions. Word has length 34 [2018-12-08 08:40:16,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:16,157 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 114 transitions. [2018-12-08 08:40:16,158 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:40:16,158 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 114 transitions. [2018-12-08 08:40:16,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 08:40:16,158 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:16,159 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:16,159 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:16,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:16,159 INFO L82 PathProgramCache]: Analyzing trace with hash 1748410243, now seen corresponding path program 1 times [2018-12-08 08:40:16,159 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:16,159 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:16,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,160 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:16,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:16,271 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:16,271 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:40:16,271 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:40:16,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:16,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:16,294 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:16,352 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-08 08:40:16,366 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:16,366 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11] total 13 [2018-12-08 08:40:16,367 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 08:40:16,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 08:40:16,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:40:16,367 INFO L87 Difference]: Start difference. First operand 85 states and 114 transitions. Second operand 13 states. [2018-12-08 08:40:16,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:16,580 INFO L93 Difference]: Finished difference Result 147 states and 196 transitions. [2018-12-08 08:40:16,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 08:40:16,580 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 38 [2018-12-08 08:40:16,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:16,582 INFO L225 Difference]: With dead ends: 147 [2018-12-08 08:40:16,582 INFO L226 Difference]: Without dead ends: 111 [2018-12-08 08:40:16,583 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:40:16,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-08 08:40:16,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 77. [2018-12-08 08:40:16,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-08 08:40:16,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 100 transitions. [2018-12-08 08:40:16,595 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 100 transitions. Word has length 38 [2018-12-08 08:40:16,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:16,595 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 100 transitions. [2018-12-08 08:40:16,595 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 08:40:16,596 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 100 transitions. [2018-12-08 08:40:16,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:16,597 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:16,597 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:16,597 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:16,597 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:16,597 INFO L82 PathProgramCache]: Analyzing trace with hash -977604237, now seen corresponding path program 1 times [2018-12-08 08:40:16,597 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:16,598 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:16,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,598 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:16,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:16,714 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:16,714 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:16,714 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 08:40:16,714 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 08:40:16,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 08:40:16,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:40:16,714 INFO L87 Difference]: Start difference. First operand 77 states and 100 transitions. Second operand 9 states. [2018-12-08 08:40:16,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:16,790 INFO L93 Difference]: Finished difference Result 122 states and 161 transitions. [2018-12-08 08:40:16,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:40:16,790 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-12-08 08:40:16,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:16,791 INFO L225 Difference]: With dead ends: 122 [2018-12-08 08:40:16,791 INFO L226 Difference]: Without dead ends: 101 [2018-12-08 08:40:16,791 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:40:16,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-12-08 08:40:16,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 93. [2018-12-08 08:40:16,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-12-08 08:40:16,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 123 transitions. [2018-12-08 08:40:16,798 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 123 transitions. Word has length 42 [2018-12-08 08:40:16,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:16,798 INFO L480 AbstractCegarLoop]: Abstraction has 93 states and 123 transitions. [2018-12-08 08:40:16,798 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 08:40:16,798 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 123 transitions. [2018-12-08 08:40:16,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:16,799 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:16,799 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:16,800 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:16,800 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:16,800 INFO L82 PathProgramCache]: Analyzing trace with hash -920345935, now seen corresponding path program 1 times [2018-12-08 08:40:16,800 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:16,800 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:16,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:16,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:16,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:16,880 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:16,880 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:40:16,880 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:40:16,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:16,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:16,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:16,929 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-12-08 08:40:16,943 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:16,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 11 [2018-12-08 08:40:16,943 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:40:16,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:40:16,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:40:16,944 INFO L87 Difference]: Start difference. First operand 93 states and 123 transitions. Second operand 11 states. [2018-12-08 08:40:17,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:17,095 INFO L93 Difference]: Finished difference Result 161 states and 217 transitions. [2018-12-08 08:40:17,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 08:40:17,096 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-12-08 08:40:17,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:17,096 INFO L225 Difference]: With dead ends: 161 [2018-12-08 08:40:17,097 INFO L226 Difference]: Without dead ends: 128 [2018-12-08 08:40:17,097 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 39 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=244, Unknown=0, NotChecked=0, Total=306 [2018-12-08 08:40:17,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-08 08:40:17,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 103. [2018-12-08 08:40:17,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-08 08:40:17,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 134 transitions. [2018-12-08 08:40:17,104 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 134 transitions. Word has length 42 [2018-12-08 08:40:17,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:17,104 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 134 transitions. [2018-12-08 08:40:17,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:40:17,105 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 134 transitions. [2018-12-08 08:40:17,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:17,105 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:17,105 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:17,106 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:17,106 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:17,106 INFO L82 PathProgramCache]: Analyzing trace with hash -774274828, now seen corresponding path program 1 times [2018-12-08 08:40:17,106 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:17,106 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:17,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:17,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:17,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:17,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:17,189 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 08:40:17,189 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:17,189 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-08 08:40:17,189 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 08:40:17,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 08:40:17,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:17,190 INFO L87 Difference]: Start difference. First operand 103 states and 134 transitions. Second operand 10 states. [2018-12-08 08:40:19,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:19,541 INFO L93 Difference]: Finished difference Result 162 states and 222 transitions. [2018-12-08 08:40:19,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 08:40:19,541 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-12-08 08:40:19,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:19,542 INFO L225 Difference]: With dead ends: 162 [2018-12-08 08:40:19,542 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 08:40:19,543 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-12-08 08:40:19,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 08:40:19,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 118. [2018-12-08 08:40:19,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-12-08 08:40:19,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 159 transitions. [2018-12-08 08:40:19,556 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 159 transitions. Word has length 42 [2018-12-08 08:40:19,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:19,556 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 159 transitions. [2018-12-08 08:40:19,556 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 08:40:19,556 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 159 transitions. [2018-12-08 08:40:19,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:19,557 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:19,558 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:19,558 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:19,558 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:19,558 INFO L82 PathProgramCache]: Analyzing trace with hash -717016526, now seen corresponding path program 2 times [2018-12-08 08:40:19,559 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:19,559 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:19,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:19,560 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:19,560 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:19,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:19,703 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 08:40:19,703 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:19,703 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 08:40:19,703 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 08:40:19,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 08:40:19,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:40:19,703 INFO L87 Difference]: Start difference. First operand 118 states and 159 transitions. Second operand 13 states. [2018-12-08 08:40:19,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:19,882 INFO L93 Difference]: Finished difference Result 152 states and 204 transitions. [2018-12-08 08:40:19,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 08:40:19,882 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-08 08:40:19,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:19,884 INFO L225 Difference]: With dead ends: 152 [2018-12-08 08:40:19,884 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 08:40:19,884 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:40:19,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 08:40:19,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 129. [2018-12-08 08:40:19,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-08 08:40:19,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 172 transitions. [2018-12-08 08:40:19,892 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 172 transitions. Word has length 42 [2018-12-08 08:40:19,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:19,892 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 172 transitions. [2018-12-08 08:40:19,892 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 08:40:19,892 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 172 transitions. [2018-12-08 08:40:19,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:19,893 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:19,893 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:19,894 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:19,894 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:19,894 INFO L82 PathProgramCache]: Analyzing trace with hash 749157176, now seen corresponding path program 1 times [2018-12-08 08:40:19,894 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:19,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:19,894 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:19,895 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:40:19,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:19,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:19,944 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:19,944 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:40:19,944 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:40:19,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:19,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:19,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:19,977 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:20,002 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:20,002 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-08 08:40:20,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:40:20,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:40:20,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:20,003 INFO L87 Difference]: Start difference. First operand 129 states and 172 transitions. Second operand 8 states. [2018-12-08 08:40:20,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:20,064 INFO L93 Difference]: Finished difference Result 200 states and 268 transitions. [2018-12-08 08:40:20,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:40:20,065 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-12-08 08:40:20,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:20,066 INFO L225 Difference]: With dead ends: 200 [2018-12-08 08:40:20,066 INFO L226 Difference]: Without dead ends: 174 [2018-12-08 08:40:20,067 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 41 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:20,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-12-08 08:40:20,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 165. [2018-12-08 08:40:20,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-12-08 08:40:20,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 219 transitions. [2018-12-08 08:40:20,079 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 219 transitions. Word has length 42 [2018-12-08 08:40:20,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:20,080 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 219 transitions. [2018-12-08 08:40:20,080 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:40:20,080 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 219 transitions. [2018-12-08 08:40:20,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:20,081 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:20,081 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:20,081 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:20,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:20,081 INFO L82 PathProgramCache]: Analyzing trace with hash 806415478, now seen corresponding path program 1 times [2018-12-08 08:40:20,081 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 08:40:20,081 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 08:40:20,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:20,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:20,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 08:40:20,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 08:40:20,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 08:40:20,111 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 08:40:20,138 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 08:40:20 BoogieIcfgContainer [2018-12-08 08:40:20,138 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 08:40:20,138 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 08:40:20,138 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 08:40:20,138 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 08:40:20,139 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:40:15" (3/4) ... [2018-12-08 08:40:20,142 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 08:40:20,142 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 08:40:20,143 INFO L168 Benchmark]: Toolchain (without parser) took 5215.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 198.2 MB). Free memory was 961.4 MB in the beginning and 971.4 MB in the end (delta: -10.1 MB). Peak memory consumption was 188.1 MB. Max. memory is 11.5 GB. [2018-12-08 08:40:20,144 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 08:40:20,144 INFO L168 Benchmark]: CACSL2BoogieTranslator took 155.07 ms. Allocated memory is still 1.0 GB. Free memory was 961.4 MB in the beginning and 945.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-12-08 08:40:20,145 INFO L168 Benchmark]: Boogie Procedure Inliner took 13.12 ms. Allocated memory is still 1.0 GB. Free memory is still 945.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 08:40:20,145 INFO L168 Benchmark]: Boogie Preprocessor took 46.06 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 945.3 MB in the beginning and 1.1 GB in the end (delta: -171.7 MB). Peak memory consumption was 13.0 MB. Max. memory is 11.5 GB. [2018-12-08 08:40:20,146 INFO L168 Benchmark]: RCFGBuilder took 195.00 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 22.0 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. [2018-12-08 08:40:20,146 INFO L168 Benchmark]: TraceAbstraction took 4798.84 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 76.0 MB). Free memory was 1.1 GB in the beginning and 971.4 MB in the end (delta: 123.6 MB). Peak memory consumption was 199.6 MB. Max. memory is 11.5 GB. [2018-12-08 08:40:20,146 INFO L168 Benchmark]: Witness Printer took 4.10 ms. Allocated memory is still 1.2 GB. Free memory is still 971.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 08:40:20,149 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 155.07 ms. Allocated memory is still 1.0 GB. Free memory was 961.4 MB in the beginning and 945.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 13.12 ms. Allocated memory is still 1.0 GB. Free memory is still 945.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 46.06 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.2 MB). Free memory was 945.3 MB in the beginning and 1.1 GB in the end (delta: -171.7 MB). Peak memory consumption was 13.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 195.00 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 22.0 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 4798.84 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 76.0 MB). Free memory was 1.1 GB in the beginning and 971.4 MB in the end (delta: 123.6 MB). Peak memory consumption was 199.6 MB. Max. memory is 11.5 GB. * Witness Printer took 4.10 ms. Allocated memory is still 1.2 GB. Free memory is still 971.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 100, overapproximation of bitwiseAnd at line 98. Possible FailurePath: [L215] unsigned int a ; [L216] unsigned int ma = __VERIFIER_nondet_uint(); [L217] signed char ea = __VERIFIER_nondet_char(); [L218] unsigned int b ; [L219] unsigned int mb = __VERIFIER_nondet_uint(); [L220] signed char eb = __VERIFIER_nondet_char(); [L221] unsigned int r_add1 ; [L222] unsigned int r_add2 ; [L223] unsigned int zero ; [L224] int tmp ; [L225] int tmp___0 ; [L226] int __retres14 ; VAL [ea=127, eb=0, ma=33554432, mb=16777216] [L230] CALL, EXPR base2flt(0, 0) VAL [\old(e)=0, \old(m)=0] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=0, e=0, m=0] [L19] COND TRUE ! m [L20] __retres4 = 0U VAL [\old(e)=0, \old(m)=0, __retres4=0, e=0, m=0] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=0, \result=0, __retres4=0, e=0, m=0] [L230] RET, EXPR base2flt(0, 0) VAL [base2flt(0, 0)=0, ea=127, eb=0, ma=33554432, mb=16777216] [L230] zero = base2flt(0, 0) [L231] CALL, EXPR base2flt(ma, ea) VAL [\old(e)=127, \old(m)=33554432] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L19] COND FALSE !(! m) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L47] COND TRUE 1 VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L49] COND TRUE m >= 1U << 25U VAL [\old(e)=127, \old(m)=33554432, e=127, m=33554432] [L54] COND TRUE e >= 127 [L55] __retres4 = 4294967295U VAL [\old(e)=127, \old(m)=33554432, __retres4=4294967295, e=127, m=33554432] [L70] return (__retres4); VAL [\old(e)=127, \old(m)=33554432, \result=4294967295, __retres4=4294967295, e=127, m=33554432] [L231] RET, EXPR base2flt(ma, ea) VAL [base2flt(ma, ea)=4294967295, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L231] a = base2flt(ma, ea) [L232] CALL, EXPR base2flt(mb, eb) VAL [\old(e)=0, \old(m)=16777216] [L15] unsigned int res ; [L16] unsigned int __retres4 ; VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L19] COND FALSE !(! m) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L25] COND FALSE !(m < 1U << 24U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L47] COND TRUE 1 VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L49] COND FALSE !(m >= 1U << 25U) VAL [\old(e)=0, \old(m)=16777216, e=0, m=16777216] [L66] m = m & ~ (1U << 24U) [L67] res = m | (unsigned int )((e + 128) << 24U) [L68] __retres4 = res VAL [\old(e)=0, \old(m)=16777216, __retres4=4278190080, e=0, res=4278190080] [L70] return (__retres4); VAL [\old(e)=0, \old(m)=16777216, \result=36028797002186752, __retres4=4278190080, e=0, res=4278190080] [L232] RET, EXPR base2flt(mb, eb) VAL [a=4294967295, base2flt(mb, eb)=36028797002186752, ea=127, eb=0, ma=33554432, mb=16777216, zero=0] [L232] b = base2flt(mb, eb) [L233] CALL addflt(a, b) VAL [\old(a)=4294967295, \old(b)=4278190080] [L74] unsigned int res ; [L75] unsigned int ma ; [L76] unsigned int mb ; [L77] unsigned int delta ; [L78] int ea ; [L79] int eb ; [L80] unsigned int tmp ; [L81] unsigned int __retres10 ; VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L84] COND FALSE !(a < b) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080] [L91] COND FALSE !(! b) [L98] ma = a & ((1U << 24U) - 1U) [L99] ea = (int )(a >> 24U) - 128 [L100] ma = ma | (1U << 24U) [L101] mb = b & ((1U << 24U) - 1U) [L102] eb = (int )(b >> 24U) - 128 [L103] mb = mb | (1U << 24U) VAL [\old(a)=4294967295, \old(b)=4278190080, a=4294967295, b=4278190080, ea=127, eb=2147483519] [L104] CALL __VERIFIER_assert(ea >= eb) VAL [\old(cond)=0] [L6] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L7] __VERIFIER_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 1 error locations. UNSAFE Result, 4.7s OverallTime, 9 OverallIterations, 3 TraceHistogramMax, 3.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 619 SDtfs, 334 SDslu, 4534 SDs, 0 SdLazy, 1149 SolverSat, 50 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 273 GetRequests, 159 SyntacticMatches, 7 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=165occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 8 MinimizatonAttempts, 152 StatesRemovedByMinimization, 8 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 514 NumberOfCodeBlocks, 514 NumberOfCodeBlocksAsserted, 13 NumberOfCheckSat, 460 ConstructedInterpolants, 1 QuantifiedInterpolants, 52168 SizeOfPredicates, 17 NumberOfNonLiveVariables, 482 ConjunctsInSsa, 77 ConjunctsInUnsatCore, 12 InterpolantComputations, 4 PerfectInterpolantSequences, 155/203 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-08 08:40:21,441 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 08:40:21,442 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 08:40:21,448 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 08:40:21,448 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 08:40:21,449 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 08:40:21,449 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 08:40:21,450 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 08:40:21,451 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 08:40:21,451 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 08:40:21,452 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 08:40:21,452 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 08:40:21,452 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 08:40:21,453 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 08:40:21,453 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 08:40:21,454 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 08:40:21,454 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 08:40:21,455 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 08:40:21,456 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 08:40:21,457 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 08:40:21,457 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 08:40:21,458 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 08:40:21,459 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 08:40:21,459 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 08:40:21,459 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 08:40:21,460 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 08:40:21,460 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 08:40:21,460 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 08:40:21,461 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 08:40:21,461 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 08:40:21,462 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 08:40:21,462 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 08:40:21,462 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 08:40:21,462 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 08:40:21,463 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 08:40:21,463 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 08:40:21,463 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-12-08 08:40:21,470 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 08:40:21,470 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 08:40:21,471 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 08:40:21,471 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 08:40:21,471 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 08:40:21,471 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 08:40:21,472 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 08:40:21,472 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 08:40:21,473 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-08 08:40:21,473 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-08 08:40:21,473 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-08 08:40:21,473 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 08:40:21,473 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 08:40:21,473 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 08:40:21,473 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 08:40:21,474 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 08:40:21,474 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-08 08:40:21,475 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 08:40:21,475 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-08 08:40:21,475 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-12-08 08:40:21,475 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ee05cb2d66f71fb2277986b04bb223cfc634fed1 [2018-12-08 08:40:21,493 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 08:40:21,503 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 08:40:21,505 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 08:40:21,506 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 08:40:21,507 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 08:40:21,507 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/../../sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 08:40:21,550 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/1220405a6/90a0a24d5f244c3b8a4f908decb1c66b/FLAG7e508cedd [2018-12-08 08:40:22,015 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 08:40:22,016 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/sv-benchmarks/c/bitvector/soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 08:40:22,020 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/1220405a6/90a0a24d5f244c3b8a4f908decb1c66b/FLAG7e508cedd [2018-12-08 08:40:22,029 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/data/1220405a6/90a0a24d5f244c3b8a4f908decb1c66b [2018-12-08 08:40:22,031 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 08:40:22,032 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 08:40:22,033 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 08:40:22,033 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 08:40:22,036 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 08:40:22,036 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,038 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@284ba15b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22, skipping insertion in model container [2018-12-08 08:40:22,038 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,043 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 08:40:22,061 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 08:40:22,177 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 08:40:22,180 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 08:40:22,206 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 08:40:22,214 INFO L195 MainTranslator]: Completed translation [2018-12-08 08:40:22,215 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22 WrapperNode [2018-12-08 08:40:22,215 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 08:40:22,215 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 08:40:22,215 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 08:40:22,215 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 08:40:22,220 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,226 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,230 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 08:40:22,230 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 08:40:22,230 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 08:40:22,230 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 08:40:22,236 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,236 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,237 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,238 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,275 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,280 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,281 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... [2018-12-08 08:40:22,283 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 08:40:22,284 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 08:40:22,284 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 08:40:22,284 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 08:40:22,285 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 08:40:22,317 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 08:40:22,317 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 08:40:22,317 INFO L130 BoogieDeclarations]: Found specification of procedure base2flt [2018-12-08 08:40:22,318 INFO L138 BoogieDeclarations]: Found implementation of procedure base2flt [2018-12-08 08:40:22,318 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 08:40:22,318 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 08:40:22,318 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 08:40:22,318 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 08:40:22,318 INFO L130 BoogieDeclarations]: Found specification of procedure addflt [2018-12-08 08:40:22,318 INFO L138 BoogieDeclarations]: Found implementation of procedure addflt [2018-12-08 08:40:22,318 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-12-08 08:40:22,318 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-12-08 08:40:22,469 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 08:40:22,469 INFO L280 CfgBuilder]: Removed 2 assue(true) statements. [2018-12-08 08:40:22,470 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:40:22 BoogieIcfgContainer [2018-12-08 08:40:22,470 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 08:40:22,470 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 08:40:22,470 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 08:40:22,472 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 08:40:22,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 08:40:22" (1/3) ... [2018-12-08 08:40:22,473 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@621e63bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 08:40:22, skipping insertion in model container [2018-12-08 08:40:22,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 08:40:22" (2/3) ... [2018-12-08 08:40:22,473 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@621e63bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 08:40:22, skipping insertion in model container [2018-12-08 08:40:22,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:40:22" (3/3) ... [2018-12-08 08:40:22,474 INFO L112 eAbstractionObserver]: Analyzing ICFG soft_float_4_true-unreach-call_true-no-overflow_true-termination.c.cil.c [2018-12-08 08:40:22,480 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 08:40:22,484 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-08 08:40:22,493 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-08 08:40:22,509 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 08:40:22,510 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 08:40:22,510 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 08:40:22,510 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 08:40:22,510 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 08:40:22,510 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 08:40:22,510 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 08:40:22,510 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 08:40:22,510 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 08:40:22,521 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states. [2018-12-08 08:40:22,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-08 08:40:22,524 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:22,525 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:22,526 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:22,529 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:22,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1457053844, now seen corresponding path program 1 times [2018-12-08 08:40:22,531 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:22,532 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:22,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:22,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:22,583 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:22,649 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:22,649 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:22,679 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:22,682 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:22,682 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-12-08 08:40:22,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 08:40:22,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 08:40:22,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:40:22,694 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 9 states. [2018-12-08 08:40:22,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:22,815 INFO L93 Difference]: Finished difference Result 136 states and 204 transitions. [2018-12-08 08:40:22,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:40:22,816 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-12-08 08:40:22,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:22,823 INFO L225 Difference]: With dead ends: 136 [2018-12-08 08:40:22,823 INFO L226 Difference]: Without dead ends: 78 [2018-12-08 08:40:22,826 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:40:22,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-12-08 08:40:22,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 64. [2018-12-08 08:40:22,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-12-08 08:40:22,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 86 transitions. [2018-12-08 08:40:22,863 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 86 transitions. Word has length 34 [2018-12-08 08:40:22,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:22,863 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 86 transitions. [2018-12-08 08:40:22,863 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 08:40:22,863 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 86 transitions. [2018-12-08 08:40:22,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 08:40:22,865 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:22,865 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:22,865 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:22,866 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:22,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1790976707, now seen corresponding path program 1 times [2018-12-08 08:40:22,866 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:22,866 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:22,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:22,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:22,902 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:22,940 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:22,940 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:23,003 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:23,004 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:23,004 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-12-08 08:40:23,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:40:23,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:40:23,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:23,005 INFO L87 Difference]: Start difference. First operand 64 states and 86 transitions. Second operand 8 states. [2018-12-08 08:40:23,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:23,099 INFO L93 Difference]: Finished difference Result 117 states and 164 transitions. [2018-12-08 08:40:23,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:40:23,099 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-12-08 08:40:23,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:23,101 INFO L225 Difference]: With dead ends: 117 [2018-12-08 08:40:23,102 INFO L226 Difference]: Without dead ends: 91 [2018-12-08 08:40:23,102 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:23,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-12-08 08:40:23,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 84. [2018-12-08 08:40:23,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-12-08 08:40:23,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 118 transitions. [2018-12-08 08:40:23,115 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 118 transitions. Word has length 38 [2018-12-08 08:40:23,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:23,115 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 118 transitions. [2018-12-08 08:40:23,115 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:40:23,116 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 118 transitions. [2018-12-08 08:40:23,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-08 08:40:23,117 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:23,117 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:23,117 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:23,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:23,118 INFO L82 PathProgramCache]: Analyzing trace with hash 1848235009, now seen corresponding path program 1 times [2018-12-08 08:40:23,118 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:23,118 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:23,131 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:23,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:23,150 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:23,181 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:23,181 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:23,182 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:23,182 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 08:40:23,183 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:40:23,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:40:23,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:23,183 INFO L87 Difference]: Start difference. First operand 84 states and 118 transitions. Second operand 8 states. [2018-12-08 08:40:23,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:23,243 INFO L93 Difference]: Finished difference Result 161 states and 218 transitions. [2018-12-08 08:40:23,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:40:23,244 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-12-08 08:40:23,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:23,245 INFO L225 Difference]: With dead ends: 161 [2018-12-08 08:40:23,246 INFO L226 Difference]: Without dead ends: 121 [2018-12-08 08:40:23,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:23,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-08 08:40:23,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 92. [2018-12-08 08:40:23,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-12-08 08:40:23,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 126 transitions. [2018-12-08 08:40:23,261 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 126 transitions. Word has length 38 [2018-12-08 08:40:23,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:23,261 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 126 transitions. [2018-12-08 08:40:23,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:40:23,262 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 126 transitions. [2018-12-08 08:40:23,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:23,263 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:23,263 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:23,263 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:23,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:23,264 INFO L82 PathProgramCache]: Analyzing trace with hash -977604237, now seen corresponding path program 1 times [2018-12-08 08:40:23,264 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:23,264 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:23,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:23,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:23,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:23,343 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 08:40:23,343 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:23,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:23,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-08 08:40:23,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 08:40:23,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 08:40:23,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:40:23,345 INFO L87 Difference]: Start difference. First operand 92 states and 126 transitions. Second operand 9 states. [2018-12-08 08:40:23,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:23,438 INFO L93 Difference]: Finished difference Result 136 states and 182 transitions. [2018-12-08 08:40:23,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:40:23,439 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-12-08 08:40:23,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:23,440 INFO L225 Difference]: With dead ends: 136 [2018-12-08 08:40:23,440 INFO L226 Difference]: Without dead ends: 115 [2018-12-08 08:40:23,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:40:23,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-08 08:40:23,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 100. [2018-12-08 08:40:23,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-12-08 08:40:23,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 135 transitions. [2018-12-08 08:40:23,449 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 135 transitions. Word has length 42 [2018-12-08 08:40:23,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:23,449 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 135 transitions. [2018-12-08 08:40:23,449 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 08:40:23,449 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 135 transitions. [2018-12-08 08:40:23,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:23,451 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:23,451 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:23,451 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:23,451 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:23,451 INFO L82 PathProgramCache]: Analyzing trace with hash -717016526, now seen corresponding path program 2 times [2018-12-08 08:40:23,451 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:23,451 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:23,463 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:40:23,485 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 08:40:23,485 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:40:23,487 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:23,568 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 08:40:23,569 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:23,570 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:23,570 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 08:40:23,570 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 08:40:23,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 08:40:23,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:40:23,571 INFO L87 Difference]: Start difference. First operand 100 states and 135 transitions. Second operand 12 states. [2018-12-08 08:40:23,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:23,771 INFO L93 Difference]: Finished difference Result 195 states and 263 transitions. [2018-12-08 08:40:23,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 08:40:23,771 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-12-08 08:40:23,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:23,772 INFO L225 Difference]: With dead ends: 195 [2018-12-08 08:40:23,772 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 08:40:23,773 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:40:23,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 08:40:23,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-08 08:40:23,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 08:40:23,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 196 transitions. [2018-12-08 08:40:23,789 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 196 transitions. Word has length 42 [2018-12-08 08:40:23,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:23,789 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 196 transitions. [2018-12-08 08:40:23,789 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 08:40:23,790 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 196 transitions. [2018-12-08 08:40:23,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:23,791 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:23,791 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:23,791 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:23,791 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:23,792 INFO L82 PathProgramCache]: Analyzing trace with hash 806415478, now seen corresponding path program 1 times [2018-12-08 08:40:23,792 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:23,792 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:23,807 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:40:23,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:23,836 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:23,895 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:23,895 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:24,064 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:40:24,064 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:40:24,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:24,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:24,083 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:24,093 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:24,093 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:24,113 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:24,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-12-08 08:40:24,114 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:40:24,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:40:24,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:40:24,114 INFO L87 Difference]: Start difference. First operand 148 states and 196 transitions. Second operand 11 states. [2018-12-08 08:40:24,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:24,316 INFO L93 Difference]: Finished difference Result 207 states and 267 transitions. [2018-12-08 08:40:24,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:40:24,316 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-12-08 08:40:24,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:24,317 INFO L225 Difference]: With dead ends: 207 [2018-12-08 08:40:24,317 INFO L226 Difference]: Without dead ends: 176 [2018-12-08 08:40:24,318 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2018-12-08 08:40:24,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-08 08:40:24,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 156. [2018-12-08 08:40:24,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-12-08 08:40:24,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 201 transitions. [2018-12-08 08:40:24,328 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 201 transitions. Word has length 42 [2018-12-08 08:40:24,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:24,328 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 201 transitions. [2018-12-08 08:40:24,328 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:40:24,328 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 201 transitions. [2018-12-08 08:40:24,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:24,329 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:24,329 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:24,329 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:24,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:24,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1035766736, now seen corresponding path program 1 times [2018-12-08 08:40:24,329 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:24,329 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:24,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:24,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:24,379 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:24,448 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:24,449 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:24,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:24,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 08:40:24,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 08:40:24,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 08:40:24,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:40:24,450 INFO L87 Difference]: Start difference. First operand 156 states and 201 transitions. Second operand 12 states. [2018-12-08 08:40:24,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:24,702 INFO L93 Difference]: Finished difference Result 206 states and 264 transitions. [2018-12-08 08:40:24,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 08:40:24,702 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-12-08 08:40:24,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:24,703 INFO L225 Difference]: With dead ends: 206 [2018-12-08 08:40:24,703 INFO L226 Difference]: Without dead ends: 175 [2018-12-08 08:40:24,704 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2018-12-08 08:40:24,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-12-08 08:40:24,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 151. [2018-12-08 08:40:24,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 08:40:24,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 192 transitions. [2018-12-08 08:40:24,713 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 192 transitions. Word has length 42 [2018-12-08 08:40:24,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:24,713 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 192 transitions. [2018-12-08 08:40:24,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 08:40:24,713 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 192 transitions. [2018-12-08 08:40:24,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:24,714 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:24,714 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:24,714 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:24,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:24,715 INFO L82 PathProgramCache]: Analyzing trace with hash 487665268, now seen corresponding path program 1 times [2018-12-08 08:40:24,715 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:24,715 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:24,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:24,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:24,772 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:24,806 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:40:24,806 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:24,808 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:24,808 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:40:24,808 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:40:24,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:40:24,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:40:24,809 INFO L87 Difference]: Start difference. First operand 151 states and 192 transitions. Second operand 6 states. [2018-12-08 08:40:25,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:25,906 INFO L93 Difference]: Finished difference Result 196 states and 247 transitions. [2018-12-08 08:40:25,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:40:25,907 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-12-08 08:40:25,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:25,907 INFO L225 Difference]: With dead ends: 196 [2018-12-08 08:40:25,908 INFO L226 Difference]: Without dead ends: 194 [2018-12-08 08:40:25,908 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:25,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-12-08 08:40:25,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 157. [2018-12-08 08:40:25,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-08 08:40:25,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 199 transitions. [2018-12-08 08:40:25,921 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 199 transitions. Word has length 42 [2018-12-08 08:40:25,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:25,922 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 199 transitions. [2018-12-08 08:40:25,922 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:40:25,922 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 199 transitions. [2018-12-08 08:40:25,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-08 08:40:25,923 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:25,923 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:25,923 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:25,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:25,923 INFO L82 PathProgramCache]: Analyzing trace with hash 544923570, now seen corresponding path program 1 times [2018-12-08 08:40:25,923 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:25,923 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:25,936 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:25,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:25,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:25,999 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:40:25,999 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:26,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:26,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:40:26,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:40:26,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:40:26,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:40:26,002 INFO L87 Difference]: Start difference. First operand 157 states and 199 transitions. Second operand 6 states. [2018-12-08 08:40:29,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:29,062 INFO L93 Difference]: Finished difference Result 174 states and 217 transitions. [2018-12-08 08:40:29,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:40:29,062 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-12-08 08:40:29,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:29,063 INFO L225 Difference]: With dead ends: 174 [2018-12-08 08:40:29,063 INFO L226 Difference]: Without dead ends: 172 [2018-12-08 08:40:29,064 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:29,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-12-08 08:40:29,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 155. [2018-12-08 08:40:29,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:40:29,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 195 transitions. [2018-12-08 08:40:29,077 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 195 transitions. Word has length 42 [2018-12-08 08:40:29,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:29,077 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 195 transitions. [2018-12-08 08:40:29,077 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:40:29,078 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 195 transitions. [2018-12-08 08:40:29,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 08:40:29,078 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:29,078 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:29,079 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:29,079 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:29,079 INFO L82 PathProgramCache]: Analyzing trace with hash -1597355174, now seen corresponding path program 1 times [2018-12-08 08:40:29,079 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:29,079 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:29,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:29,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:29,109 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:29,136 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 08:40:29,136 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:29,188 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 08:40:29,189 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:29,189 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2018-12-08 08:40:29,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 08:40:29,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 08:40:29,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:29,190 INFO L87 Difference]: Start difference. First operand 155 states and 195 transitions. Second operand 10 states. [2018-12-08 08:40:29,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:29,365 INFO L93 Difference]: Finished difference Result 212 states and 273 transitions. [2018-12-08 08:40:29,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:40:29,366 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 47 [2018-12-08 08:40:29,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:29,367 INFO L225 Difference]: With dead ends: 212 [2018-12-08 08:40:29,367 INFO L226 Difference]: Without dead ends: 201 [2018-12-08 08:40:29,367 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 84 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:40:29,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-12-08 08:40:29,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 169. [2018-12-08 08:40:29,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-12-08 08:40:29,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 214 transitions. [2018-12-08 08:40:29,378 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 214 transitions. Word has length 47 [2018-12-08 08:40:29,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:29,378 INFO L480 AbstractCegarLoop]: Abstraction has 169 states and 214 transitions. [2018-12-08 08:40:29,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 08:40:29,378 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 214 transitions. [2018-12-08 08:40:29,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 08:40:29,379 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:29,379 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:29,379 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:29,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:29,379 INFO L82 PathProgramCache]: Analyzing trace with hash -896290596, now seen corresponding path program 1 times [2018-12-08 08:40:29,379 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:29,379 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:29,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:29,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:29,407 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:29,446 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:40:29,446 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:29,557 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:40:29,558 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:29,558 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 14 [2018-12-08 08:40:29,558 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 08:40:29,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 08:40:29,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2018-12-08 08:40:29,559 INFO L87 Difference]: Start difference. First operand 169 states and 214 transitions. Second operand 14 states. [2018-12-08 08:40:29,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:29,761 INFO L93 Difference]: Finished difference Result 235 states and 301 transitions. [2018-12-08 08:40:29,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:40:29,762 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 47 [2018-12-08 08:40:29,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:29,763 INFO L225 Difference]: With dead ends: 235 [2018-12-08 08:40:29,763 INFO L226 Difference]: Without dead ends: 228 [2018-12-08 08:40:29,764 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 80 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2018-12-08 08:40:29,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-12-08 08:40:29,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 188. [2018-12-08 08:40:29,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-12-08 08:40:29,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 240 transitions. [2018-12-08 08:40:29,776 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 240 transitions. Word has length 47 [2018-12-08 08:40:29,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:29,776 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 240 transitions. [2018-12-08 08:40:29,776 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 08:40:29,776 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 240 transitions. [2018-12-08 08:40:29,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-08 08:40:29,777 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:29,777 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:29,778 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:29,778 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:29,778 INFO L82 PathProgramCache]: Analyzing trace with hash 1716473666, now seen corresponding path program 1 times [2018-12-08 08:40:29,778 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:29,778 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:29,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:29,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:29,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:29,861 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:40:29,861 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:29,982 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:40:29,984 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:29,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 16 [2018-12-08 08:40:29,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 08:40:29,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 08:40:29,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:40:29,985 INFO L87 Difference]: Start difference. First operand 188 states and 240 transitions. Second operand 16 states. [2018-12-08 08:40:30,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:30,274 INFO L93 Difference]: Finished difference Result 244 states and 315 transitions. [2018-12-08 08:40:30,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 08:40:30,274 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 49 [2018-12-08 08:40:30,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:30,275 INFO L225 Difference]: With dead ends: 244 [2018-12-08 08:40:30,275 INFO L226 Difference]: Without dead ends: 236 [2018-12-08 08:40:30,275 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 82 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2018-12-08 08:40:30,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-12-08 08:40:30,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 207. [2018-12-08 08:40:30,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-08 08:40:30,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 265 transitions. [2018-12-08 08:40:30,288 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 265 transitions. Word has length 49 [2018-12-08 08:40:30,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:30,288 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 265 transitions. [2018-12-08 08:40:30,288 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 08:40:30,288 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 265 transitions. [2018-12-08 08:40:30,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-08 08:40:30,289 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:30,289 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:30,289 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:30,289 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:30,290 INFO L82 PathProgramCache]: Analyzing trace with hash 1773731968, now seen corresponding path program 1 times [2018-12-08 08:40:30,290 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:30,290 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:30,303 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:30,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:30,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:30,360 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 08:40:30,360 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:30,362 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:30,362 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:40:30,362 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:40:30,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:40:30,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:40:30,362 INFO L87 Difference]: Start difference. First operand 207 states and 265 transitions. Second operand 6 states. [2018-12-08 08:40:30,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:30,399 INFO L93 Difference]: Finished difference Result 215 states and 272 transitions. [2018-12-08 08:40:30,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:40:30,400 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 49 [2018-12-08 08:40:30,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:30,401 INFO L225 Difference]: With dead ends: 215 [2018-12-08 08:40:30,401 INFO L226 Difference]: Without dead ends: 196 [2018-12-08 08:40:30,401 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:30,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-12-08 08:40:30,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2018-12-08 08:40:30,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-12-08 08:40:30,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 246 transitions. [2018-12-08 08:40:30,413 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 246 transitions. Word has length 49 [2018-12-08 08:40:30,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:30,413 INFO L480 AbstractCegarLoop]: Abstraction has 196 states and 246 transitions. [2018-12-08 08:40:30,413 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:40:30,413 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 246 transitions. [2018-12-08 08:40:30,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 08:40:30,414 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:30,414 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:30,414 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:30,414 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:30,415 INFO L82 PathProgramCache]: Analyzing trace with hash 2005355055, now seen corresponding path program 1 times [2018-12-08 08:40:30,415 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:30,415 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:30,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:30,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:30,489 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:30,579 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 08:40:30,579 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:30,581 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:30,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-12-08 08:40:30,581 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 08:40:30,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 08:40:30,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:40:30,582 INFO L87 Difference]: Start difference. First operand 196 states and 246 transitions. Second operand 13 states. [2018-12-08 08:40:30,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:30,740 INFO L93 Difference]: Finished difference Result 285 states and 369 transitions. [2018-12-08 08:40:30,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 08:40:30,741 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 50 [2018-12-08 08:40:30,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:30,742 INFO L225 Difference]: With dead ends: 285 [2018-12-08 08:40:30,742 INFO L226 Difference]: Without dead ends: 233 [2018-12-08 08:40:30,742 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:40:30,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-12-08 08:40:30,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 206. [2018-12-08 08:40:30,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-12-08 08:40:30,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 256 transitions. [2018-12-08 08:40:30,755 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 256 transitions. Word has length 50 [2018-12-08 08:40:30,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:30,755 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 256 transitions. [2018-12-08 08:40:30,755 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 08:40:30,755 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 256 transitions. [2018-12-08 08:40:30,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 08:40:30,756 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:30,756 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:30,756 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:30,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:30,756 INFO L82 PathProgramCache]: Analyzing trace with hash -802652045, now seen corresponding path program 1 times [2018-12-08 08:40:30,756 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:30,756 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:30,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:30,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:30,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:30,918 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:30,919 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:31,050 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:40:31,050 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:40:31,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:31,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:31,070 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:31,077 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:31,078 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:31,149 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:31,149 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-12-08 08:40:31,149 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:40:31,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:40:31,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-12-08 08:40:31,149 INFO L87 Difference]: Start difference. First operand 206 states and 256 transitions. Second operand 11 states. [2018-12-08 08:40:32,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:32,011 INFO L93 Difference]: Finished difference Result 274 states and 343 transitions. [2018-12-08 08:40:32,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:40:32,012 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2018-12-08 08:40:32,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:32,012 INFO L225 Difference]: With dead ends: 274 [2018-12-08 08:40:32,013 INFO L226 Difference]: Without dead ends: 229 [2018-12-08 08:40:32,013 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 101 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-12-08 08:40:32,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-12-08 08:40:32,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 204. [2018-12-08 08:40:32,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-12-08 08:40:32,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 252 transitions. [2018-12-08 08:40:32,034 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 252 transitions. Word has length 50 [2018-12-08 08:40:32,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:32,034 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 252 transitions. [2018-12-08 08:40:32,034 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:40:32,034 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 252 transitions. [2018-12-08 08:40:32,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 08:40:32,035 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:32,035 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:32,035 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:32,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:32,036 INFO L82 PathProgramCache]: Analyzing trace with hash -526602707, now seen corresponding path program 1 times [2018-12-08 08:40:32,036 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:32,036 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:32,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:32,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:32,089 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:34,199 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 08:40:34,199 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:34,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:34,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-08 08:40:34,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 08:40:34,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 08:40:34,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=110, Unknown=1, NotChecked=0, Total=132 [2018-12-08 08:40:34,201 INFO L87 Difference]: Start difference. First operand 204 states and 252 transitions. Second operand 12 states. [2018-12-08 08:40:48,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:48,634 INFO L93 Difference]: Finished difference Result 271 states and 337 transitions. [2018-12-08 08:40:48,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 08:40:48,634 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 50 [2018-12-08 08:40:48,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:48,636 INFO L225 Difference]: With dead ends: 271 [2018-12-08 08:40:48,636 INFO L226 Difference]: Without dead ends: 226 [2018-12-08 08:40:48,636 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=98, Invalid=401, Unknown=7, NotChecked=0, Total=506 [2018-12-08 08:40:48,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-12-08 08:40:48,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 202. [2018-12-08 08:40:48,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-12-08 08:40:48,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 248 transitions. [2018-12-08 08:40:48,654 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 248 transitions. Word has length 50 [2018-12-08 08:40:48,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:48,654 INFO L480 AbstractCegarLoop]: Abstraction has 202 states and 248 transitions. [2018-12-08 08:40:48,654 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 08:40:48,654 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 248 transitions. [2018-12-08 08:40:48,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-12-08 08:40:48,655 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:48,655 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:48,655 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:48,655 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:48,655 INFO L82 PathProgramCache]: Analyzing trace with hash -1278128413, now seen corresponding path program 1 times [2018-12-08 08:40:48,655 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:48,655 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:48,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:48,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:48,684 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:48,710 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-12-08 08:40:48,710 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:48,712 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:48,712 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 08:40:48,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:40:48,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:40:48,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-12-08 08:40:48,712 INFO L87 Difference]: Start difference. First operand 202 states and 248 transitions. Second operand 8 states. [2018-12-08 08:40:48,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:48,770 INFO L93 Difference]: Finished difference Result 260 states and 324 transitions. [2018-12-08 08:40:48,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:40:48,771 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 54 [2018-12-08 08:40:48,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:48,772 INFO L225 Difference]: With dead ends: 260 [2018-12-08 08:40:48,772 INFO L226 Difference]: Without dead ends: 234 [2018-12-08 08:40:48,773 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-12-08 08:40:48,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-12-08 08:40:48,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 224. [2018-12-08 08:40:48,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-12-08 08:40:48,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 279 transitions. [2018-12-08 08:40:48,795 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 279 transitions. Word has length 54 [2018-12-08 08:40:48,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:48,795 INFO L480 AbstractCegarLoop]: Abstraction has 224 states and 279 transitions. [2018-12-08 08:40:48,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:40:48,795 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 279 transitions. [2018-12-08 08:40:48,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-12-08 08:40:48,796 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:48,796 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:48,797 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:48,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:48,797 INFO L82 PathProgramCache]: Analyzing trace with hash -1172998555, now seen corresponding path program 1 times [2018-12-08 08:40:48,797 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:48,797 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:48,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:48,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:48,829 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:48,856 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 08:40:48,856 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:48,890 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 08:40:48,891 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:40:48,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-08 08:40:48,892 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 08:40:48,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 08:40:48,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-12-08 08:40:48,892 INFO L87 Difference]: Start difference. First operand 224 states and 279 transitions. Second operand 9 states. [2018-12-08 08:40:49,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:49,037 INFO L93 Difference]: Finished difference Result 288 states and 357 transitions. [2018-12-08 08:40:49,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:40:49,037 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 54 [2018-12-08 08:40:49,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:49,038 INFO L225 Difference]: With dead ends: 288 [2018-12-08 08:40:49,038 INFO L226 Difference]: Without dead ends: 245 [2018-12-08 08:40:49,038 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 100 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:40:49,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-12-08 08:40:49,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 214. [2018-12-08 08:40:49,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-12-08 08:40:49,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 266 transitions. [2018-12-08 08:40:49,050 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 266 transitions. Word has length 54 [2018-12-08 08:40:49,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:49,050 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 266 transitions. [2018-12-08 08:40:49,051 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 08:40:49,051 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 266 transitions. [2018-12-08 08:40:49,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-12-08 08:40:49,051 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:49,051 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:49,051 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:49,051 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:49,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1391853273, now seen corresponding path program 1 times [2018-12-08 08:40:49,052 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:49,052 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:49,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:49,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:49,085 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:49,144 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 08:40:49,144 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:40:49,249 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 08:40:49,250 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 08:40:49,250 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [7] total 12 [2018-12-08 08:40:49,251 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-08 08:40:49,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-08 08:40:49,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-12-08 08:40:49,251 INFO L87 Difference]: Start difference. First operand 214 states and 266 transitions. Second operand 12 states. [2018-12-08 08:40:49,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:40:49,456 INFO L93 Difference]: Finished difference Result 301 states and 378 transitions. [2018-12-08 08:40:49,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:40:49,457 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2018-12-08 08:40:49,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:40:49,458 INFO L225 Difference]: With dead ends: 301 [2018-12-08 08:40:49,458 INFO L226 Difference]: Without dead ends: 275 [2018-12-08 08:40:49,458 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 96 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:40:49,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-12-08 08:40:49,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 234. [2018-12-08 08:40:49,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-12-08 08:40:49,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 296 transitions. [2018-12-08 08:40:49,484 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 296 transitions. Word has length 54 [2018-12-08 08:40:49,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:40:49,485 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 296 transitions. [2018-12-08 08:40:49,485 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-08 08:40:49,485 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 296 transitions. [2018-12-08 08:40:49,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 08:40:49,486 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:40:49,486 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:40:49,486 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:40:49,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:40:49,486 INFO L82 PathProgramCache]: Analyzing trace with hash 960357489, now seen corresponding path program 1 times [2018-12-08 08:40:49,486 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:40:49,486 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:40:49,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:40:49,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:40:49,544 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:40:56,605 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:40:56,605 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:40:56,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:40:56,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 08:40:56,607 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:40:56,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:40:56,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=37, Unknown=3, NotChecked=0, Total=56 [2018-12-08 08:40:56,607 INFO L87 Difference]: Start difference. First operand 234 states and 296 transitions. Second operand 8 states. [2018-12-08 08:41:09,511 WARN L180 SmtUtils]: Spent 5.75 s on a formula simplification. DAG size of input: 25 DAG size of output: 21 [2018-12-08 08:41:11,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:11,626 INFO L93 Difference]: Finished difference Result 278 states and 351 transitions. [2018-12-08 08:41:11,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:41:11,627 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 50 [2018-12-08 08:41:11,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:11,628 INFO L225 Difference]: With dead ends: 278 [2018-12-08 08:41:11,628 INFO L226 Difference]: Without dead ends: 276 [2018-12-08 08:41:11,629 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 12.8s TimeCoverageRelationStatistics Valid=25, Invalid=62, Unknown=3, NotChecked=0, Total=90 [2018-12-08 08:41:11,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-12-08 08:41:11,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 242. [2018-12-08 08:41:11,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-12-08 08:41:11,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 307 transitions. [2018-12-08 08:41:11,646 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 307 transitions. Word has length 50 [2018-12-08 08:41:11,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:11,647 INFO L480 AbstractCegarLoop]: Abstraction has 242 states and 307 transitions. [2018-12-08 08:41:11,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:41:11,647 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 307 transitions. [2018-12-08 08:41:11,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 08:41:11,648 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:11,648 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:11,648 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:11,648 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:11,648 INFO L82 PathProgramCache]: Analyzing trace with hash -614439095, now seen corresponding path program 1 times [2018-12-08 08:41:11,648 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:11,648 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:11,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:11,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:11,677 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:11,730 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 08:41:11,730 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:11,852 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 08:41:11,853 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:11,853 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 16 [2018-12-08 08:41:11,853 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 08:41:11,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 08:41:11,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:41:11,854 INFO L87 Difference]: Start difference. First operand 242 states and 307 transitions. Second operand 16 states. [2018-12-08 08:41:12,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:12,194 INFO L93 Difference]: Finished difference Result 283 states and 360 transitions. [2018-12-08 08:41:12,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 08:41:12,194 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 51 [2018-12-08 08:41:12,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:12,195 INFO L225 Difference]: With dead ends: 283 [2018-12-08 08:41:12,195 INFO L226 Difference]: Without dead ends: 274 [2018-12-08 08:41:12,196 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 86 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=554, Unknown=0, NotChecked=0, Total=650 [2018-12-08 08:41:12,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-12-08 08:41:12,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 250. [2018-12-08 08:41:12,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250 states. [2018-12-08 08:41:12,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250 states to 250 states and 318 transitions. [2018-12-08 08:41:12,214 INFO L78 Accepts]: Start accepts. Automaton has 250 states and 318 transitions. Word has length 51 [2018-12-08 08:41:12,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:12,214 INFO L480 AbstractCegarLoop]: Abstraction has 250 states and 318 transitions. [2018-12-08 08:41:12,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 08:41:12,215 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 318 transitions. [2018-12-08 08:41:12,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 08:41:12,215 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:12,215 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:12,215 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:12,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:12,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1494907781, now seen corresponding path program 1 times [2018-12-08 08:41:12,216 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:12,216 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:12,230 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:12,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:12,246 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:12,322 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:41:12,322 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:12,596 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:41:12,597 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:12,597 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-12-08 08:41:12,597 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:41:12,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:41:12,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:41:12,598 INFO L87 Difference]: Start difference. First operand 250 states and 318 transitions. Second operand 24 states. [2018-12-08 08:41:13,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:13,577 INFO L93 Difference]: Finished difference Result 317 states and 417 transitions. [2018-12-08 08:41:13,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 08:41:13,578 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-12-08 08:41:13,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:13,579 INFO L225 Difference]: With dead ends: 317 [2018-12-08 08:41:13,579 INFO L226 Difference]: Without dead ends: 302 [2018-12-08 08:41:13,579 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=199, Invalid=1361, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 08:41:13,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302 states. [2018-12-08 08:41:13,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302 to 264. [2018-12-08 08:41:13,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2018-12-08 08:41:13,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 345 transitions. [2018-12-08 08:41:13,601 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 345 transitions. Word has length 51 [2018-12-08 08:41:13,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:13,601 INFO L480 AbstractCegarLoop]: Abstraction has 264 states and 345 transitions. [2018-12-08 08:41:13,601 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:41:13,601 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 345 transitions. [2018-12-08 08:41:13,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 08:41:13,602 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:13,602 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:13,602 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:13,602 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:13,602 INFO L82 PathProgramCache]: Analyzing trace with hash 32918923, now seen corresponding path program 2 times [2018-12-08 08:41:13,602 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:13,602 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:13,615 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:41:13,630 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:41:13,630 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:41:13,631 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:13,675 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 08:41:13,675 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:13,777 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-08 08:41:13,778 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:13,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 14 [2018-12-08 08:41:13,778 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 08:41:13,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 08:41:13,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-12-08 08:41:13,778 INFO L87 Difference]: Start difference. First operand 264 states and 345 transitions. Second operand 14 states. [2018-12-08 08:41:14,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:14,106 INFO L93 Difference]: Finished difference Result 298 states and 400 transitions. [2018-12-08 08:41:14,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 08:41:14,106 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 51 [2018-12-08 08:41:14,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:14,107 INFO L225 Difference]: With dead ends: 298 [2018-12-08 08:41:14,107 INFO L226 Difference]: Without dead ends: 291 [2018-12-08 08:41:14,107 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 89 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2018-12-08 08:41:14,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-12-08 08:41:14,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 272. [2018-12-08 08:41:14,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272 states. [2018-12-08 08:41:14,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 368 transitions. [2018-12-08 08:41:14,131 INFO L78 Accepts]: Start accepts. Automaton has 272 states and 368 transitions. Word has length 51 [2018-12-08 08:41:14,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:14,131 INFO L480 AbstractCegarLoop]: Abstraction has 272 states and 368 transitions. [2018-12-08 08:41:14,131 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 08:41:14,131 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 368 transitions. [2018-12-08 08:41:14,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 08:41:14,131 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:14,132 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:14,132 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:14,132 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:14,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1866743247, now seen corresponding path program 2 times [2018-12-08 08:41:14,132 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:14,132 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:14,146 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:41:14,161 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:41:14,161 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:41:14,162 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:14,252 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:41:14,252 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:14,522 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 08:41:14,523 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:14,523 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-12-08 08:41:14,523 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:41:14,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:41:14,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:41:14,524 INFO L87 Difference]: Start difference. First operand 272 states and 368 transitions. Second operand 24 states. [2018-12-08 08:41:15,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:15,655 INFO L93 Difference]: Finished difference Result 316 states and 421 transitions. [2018-12-08 08:41:15,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-08 08:41:15,656 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-12-08 08:41:15,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:15,657 INFO L225 Difference]: With dead ends: 316 [2018-12-08 08:41:15,657 INFO L226 Difference]: Without dead ends: 280 [2018-12-08 08:41:15,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=184, Invalid=1298, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 08:41:15,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2018-12-08 08:41:15,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 249. [2018-12-08 08:41:15,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-12-08 08:41:15,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 337 transitions. [2018-12-08 08:41:15,679 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 337 transitions. Word has length 51 [2018-12-08 08:41:15,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:15,680 INFO L480 AbstractCegarLoop]: Abstraction has 249 states and 337 transitions. [2018-12-08 08:41:15,680 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:41:15,680 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 337 transitions. [2018-12-08 08:41:15,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-12-08 08:41:15,680 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:15,680 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:15,680 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:15,680 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:15,681 INFO L82 PathProgramCache]: Analyzing trace with hash -528325640, now seen corresponding path program 1 times [2018-12-08 08:41:15,681 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:15,681 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:15,695 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:41:15,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:15,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:25,884 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:41:25,884 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:41:25,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:41:25,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-08 08:41:25,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 08:41:25,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 08:41:25,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=37, Unknown=5, NotChecked=0, Total=56 [2018-12-08 08:41:25,886 INFO L87 Difference]: Start difference. First operand 249 states and 337 transitions. Second operand 8 states. [2018-12-08 08:41:42,062 WARN L180 SmtUtils]: Spent 2.06 s on a formula simplification that was a NOOP. DAG size: 21 [2018-12-08 08:41:50,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:50,376 INFO L93 Difference]: Finished difference Result 280 states and 378 transitions. [2018-12-08 08:41:50,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 08:41:50,376 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-12-08 08:41:50,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:50,377 INFO L225 Difference]: With dead ends: 280 [2018-12-08 08:41:50,377 INFO L226 Difference]: Without dead ends: 264 [2018-12-08 08:41:50,377 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 14.2s TimeCoverageRelationStatistics Valid=22, Invalid=62, Unknown=6, NotChecked=0, Total=90 [2018-12-08 08:41:50,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-12-08 08:41:50,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 239. [2018-12-08 08:41:50,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-12-08 08:41:50,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 323 transitions. [2018-12-08 08:41:50,399 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 323 transitions. Word has length 51 [2018-12-08 08:41:50,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:50,399 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 323 transitions. [2018-12-08 08:41:50,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 08:41:50,399 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 323 transitions. [2018-12-08 08:41:50,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-08 08:41:50,400 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:50,400 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:50,400 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:50,400 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:50,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1835326830, now seen corresponding path program 1 times [2018-12-08 08:41:50,400 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:50,400 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:50,418 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:50,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:50,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:50,470 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 08:41:50,471 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:50,531 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-12-08 08:41:50,533 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:50,533 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 11 [2018-12-08 08:41:50,533 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:41:50,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:41:50,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:41:50,533 INFO L87 Difference]: Start difference. First operand 239 states and 323 transitions. Second operand 11 states. [2018-12-08 08:41:50,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:50,673 INFO L93 Difference]: Finished difference Result 263 states and 354 transitions. [2018-12-08 08:41:50,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:41:50,673 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 64 [2018-12-08 08:41:50,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:50,674 INFO L225 Difference]: With dead ends: 263 [2018-12-08 08:41:50,674 INFO L226 Difference]: Without dead ends: 245 [2018-12-08 08:41:50,674 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:41:50,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-12-08 08:41:50,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 239. [2018-12-08 08:41:50,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-12-08 08:41:50,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 322 transitions. [2018-12-08 08:41:50,696 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 322 transitions. Word has length 64 [2018-12-08 08:41:50,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:50,696 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 322 transitions. [2018-12-08 08:41:50,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:41:50,696 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 322 transitions. [2018-12-08 08:41:50,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-08 08:41:50,697 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:50,697 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:50,697 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:50,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:50,697 INFO L82 PathProgramCache]: Analyzing trace with hash 218346458, now seen corresponding path program 1 times [2018-12-08 08:41:50,698 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:50,698 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:50,723 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:50,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:50,740 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:50,764 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:41:50,764 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:50,824 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:41:50,825 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:50,826 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 11 [2018-12-08 08:41:50,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:41:50,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:41:50,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:41:50,826 INFO L87 Difference]: Start difference. First operand 239 states and 322 transitions. Second operand 11 states. [2018-12-08 08:41:50,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:50,955 INFO L93 Difference]: Finished difference Result 256 states and 343 transitions. [2018-12-08 08:41:50,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 08:41:50,956 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-12-08 08:41:50,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:50,957 INFO L225 Difference]: With dead ends: 256 [2018-12-08 08:41:50,957 INFO L226 Difference]: Without dead ends: 242 [2018-12-08 08:41:50,957 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:41:50,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-12-08 08:41:50,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 239. [2018-12-08 08:41:50,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-12-08 08:41:50,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 321 transitions. [2018-12-08 08:41:50,980 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 321 transitions. Word has length 66 [2018-12-08 08:41:50,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:50,980 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 321 transitions. [2018-12-08 08:41:50,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:41:50,981 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 321 transitions. [2018-12-08 08:41:50,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-08 08:41:50,982 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:50,982 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:50,982 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:50,982 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:50,982 INFO L82 PathProgramCache]: Analyzing trace with hash -368459556, now seen corresponding path program 1 times [2018-12-08 08:41:50,983 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:50,983 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 31 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:50,996 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:51,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:51,015 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:51,041 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 08:41:51,041 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:51,105 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 08:41:51,106 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:51,106 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-12-08 08:41:51,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 08:41:51,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 08:41:51,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-12-08 08:41:51,107 INFO L87 Difference]: Start difference. First operand 239 states and 321 transitions. Second operand 13 states. [2018-12-08 08:41:51,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:51,236 INFO L93 Difference]: Finished difference Result 256 states and 339 transitions. [2018-12-08 08:41:51,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:41:51,237 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2018-12-08 08:41:51,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:51,238 INFO L225 Difference]: With dead ends: 256 [2018-12-08 08:41:51,238 INFO L226 Difference]: Without dead ends: 247 [2018-12-08 08:41:51,238 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:41:51,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-12-08 08:41:51,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 239. [2018-12-08 08:41:51,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-12-08 08:41:51,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 320 transitions. [2018-12-08 08:41:51,260 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 320 transitions. Word has length 66 [2018-12-08 08:41:51,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:51,260 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 320 transitions. [2018-12-08 08:41:51,260 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 08:41:51,260 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 320 transitions. [2018-12-08 08:41:51,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-12-08 08:41:51,261 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:51,261 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:51,261 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:51,261 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:51,261 INFO L82 PathProgramCache]: Analyzing trace with hash 166673046, now seen corresponding path program 2 times [2018-12-08 08:41:51,261 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:51,261 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:51,275 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:41:51,305 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:41:51,305 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:41:51,306 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:51,335 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:41:51,336 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:51,397 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:41:51,398 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:51,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 11 [2018-12-08 08:41:51,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:41:51,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:41:51,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:41:51,399 INFO L87 Difference]: Start difference. First operand 239 states and 320 transitions. Second operand 11 states. [2018-12-08 08:41:51,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:51,530 INFO L93 Difference]: Finished difference Result 253 states and 336 transitions. [2018-12-08 08:41:51,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:41:51,530 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-12-08 08:41:51,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:51,531 INFO L225 Difference]: With dead ends: 253 [2018-12-08 08:41:51,531 INFO L226 Difference]: Without dead ends: 233 [2018-12-08 08:41:51,531 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:41:51,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-12-08 08:41:51,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 228. [2018-12-08 08:41:51,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-12-08 08:41:51,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 304 transitions. [2018-12-08 08:41:51,553 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 304 transitions. Word has length 66 [2018-12-08 08:41:51,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:51,553 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 304 transitions. [2018-12-08 08:41:51,553 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:41:51,553 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 304 transitions. [2018-12-08 08:41:51,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 08:41:51,553 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:51,554 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:51,554 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:51,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:51,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1109140964, now seen corresponding path program 1 times [2018-12-08 08:41:51,554 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:51,554 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:51,567 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:41:51,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:51,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:51,652 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 08:41:51,652 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:51,812 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 08:41:51,813 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:51,813 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 16 [2018-12-08 08:41:51,813 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 08:41:51,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 08:41:51,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:41:51,813 INFO L87 Difference]: Start difference. First operand 228 states and 304 transitions. Second operand 16 states. [2018-12-08 08:41:52,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:52,239 INFO L93 Difference]: Finished difference Result 251 states and 330 transitions. [2018-12-08 08:41:52,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 08:41:52,239 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 71 [2018-12-08 08:41:52,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:52,240 INFO L225 Difference]: With dead ends: 251 [2018-12-08 08:41:52,240 INFO L226 Difference]: Without dead ends: 239 [2018-12-08 08:41:52,241 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 127 SyntacticMatches, 3 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=462, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:41:52,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-12-08 08:41:52,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 223. [2018-12-08 08:41:52,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-12-08 08:41:52,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 289 transitions. [2018-12-08 08:41:52,260 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 289 transitions. Word has length 71 [2018-12-08 08:41:52,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:52,260 INFO L480 AbstractCegarLoop]: Abstraction has 223 states and 289 transitions. [2018-12-08 08:41:52,260 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 08:41:52,260 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 289 transitions. [2018-12-08 08:41:52,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 08:41:52,261 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:52,261 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:52,261 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:52,261 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:52,261 INFO L82 PathProgramCache]: Analyzing trace with hash 1017205495, now seen corresponding path program 1 times [2018-12-08 08:41:52,261 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:52,261 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:52,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:52,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:52,345 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:52,654 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:41:52,654 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:53,836 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:41:53,838 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:53,838 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13] total 22 [2018-12-08 08:41:53,838 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 08:41:53,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 08:41:53,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:41:53,839 INFO L87 Difference]: Start difference. First operand 223 states and 289 transitions. Second operand 22 states. [2018-12-08 08:41:54,305 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 40 [2018-12-08 08:41:54,666 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 42 [2018-12-08 08:41:54,875 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 37 [2018-12-08 08:41:56,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:56,172 INFO L93 Difference]: Finished difference Result 267 states and 346 transitions. [2018-12-08 08:41:56,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 08:41:56,174 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 71 [2018-12-08 08:41:56,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:56,175 INFO L225 Difference]: With dead ends: 267 [2018-12-08 08:41:56,175 INFO L226 Difference]: Without dead ends: 256 [2018-12-08 08:41:56,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 118 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=186, Invalid=806, Unknown=0, NotChecked=0, Total=992 [2018-12-08 08:41:56,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-12-08 08:41:56,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 232. [2018-12-08 08:41:56,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-12-08 08:41:56,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 302 transitions. [2018-12-08 08:41:56,197 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 302 transitions. Word has length 71 [2018-12-08 08:41:56,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:56,197 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 302 transitions. [2018-12-08 08:41:56,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 08:41:56,197 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 302 transitions. [2018-12-08 08:41:56,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 08:41:56,197 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:56,197 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:56,198 INFO L423 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:56,198 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:56,198 INFO L82 PathProgramCache]: Analyzing trace with hash 199557045, now seen corresponding path program 1 times [2018-12-08 08:41:56,198 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:56,198 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:56,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:56,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:56,267 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:56,538 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:41:56,538 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:57,103 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:41:57,104 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:41:57,104 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-12-08 08:41:57,104 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-08 08:41:57,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-08 08:41:57,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=284, Unknown=0, NotChecked=0, Total=342 [2018-12-08 08:41:57,105 INFO L87 Difference]: Start difference. First operand 232 states and 302 transitions. Second operand 19 states. [2018-12-08 08:41:58,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:41:58,173 INFO L93 Difference]: Finished difference Result 283 states and 380 transitions. [2018-12-08 08:41:58,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 08:41:58,174 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 71 [2018-12-08 08:41:58,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:41:58,175 INFO L225 Difference]: With dead ends: 283 [2018-12-08 08:41:58,175 INFO L226 Difference]: Without dead ends: 272 [2018-12-08 08:41:58,175 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 121 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=155, Invalid=495, Unknown=0, NotChecked=0, Total=650 [2018-12-08 08:41:58,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2018-12-08 08:41:58,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 246. [2018-12-08 08:41:58,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-12-08 08:41:58,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 328 transitions. [2018-12-08 08:41:58,201 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 328 transitions. Word has length 71 [2018-12-08 08:41:58,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:41:58,201 INFO L480 AbstractCegarLoop]: Abstraction has 246 states and 328 transitions. [2018-12-08 08:41:58,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-08 08:41:58,201 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 328 transitions. [2018-12-08 08:41:58,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 08:41:58,202 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:41:58,202 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:41:58,202 INFO L423 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:41:58,202 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:41:58,202 INFO L82 PathProgramCache]: Analyzing trace with hash 1098580064, now seen corresponding path program 1 times [2018-12-08 08:41:58,202 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:41:58,202 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 36 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:41:58,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:58,236 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:58,327 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:41:58,327 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:41:58,398 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:41:58,398 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:41:58,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:41:58,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:41:58,455 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:41:59,564 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-08 08:41:59,564 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:41:59,579 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 08:41:59,579 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [13] total 29 [2018-12-08 08:41:59,579 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-08 08:41:59,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-08 08:41:59,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=785, Unknown=0, NotChecked=0, Total=870 [2018-12-08 08:41:59,580 INFO L87 Difference]: Start difference. First operand 246 states and 328 transitions. Second operand 29 states. [2018-12-08 08:42:01,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:01,121 INFO L93 Difference]: Finished difference Result 274 states and 361 transitions. [2018-12-08 08:42:01,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-08 08:42:01,121 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 71 [2018-12-08 08:42:01,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:01,123 INFO L225 Difference]: With dead ends: 274 [2018-12-08 08:42:01,123 INFO L226 Difference]: Without dead ends: 265 [2018-12-08 08:42:01,123 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 118 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=204, Invalid=1518, Unknown=0, NotChecked=0, Total=1722 [2018-12-08 08:42:01,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states. [2018-12-08 08:42:01,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 246. [2018-12-08 08:42:01,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-12-08 08:42:01,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 327 transitions. [2018-12-08 08:42:01,156 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 327 transitions. Word has length 71 [2018-12-08 08:42:01,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:01,156 INFO L480 AbstractCegarLoop]: Abstraction has 246 states and 327 transitions. [2018-12-08 08:42:01,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-08 08:42:01,156 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 327 transitions. [2018-12-08 08:42:01,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-08 08:42:01,156 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:01,157 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:01,157 INFO L423 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:01,157 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:01,157 INFO L82 PathProgramCache]: Analyzing trace with hash -1669060429, now seen corresponding path program 1 times [2018-12-08 08:42:01,157 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:01,157 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:01,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:01,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:01,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:01,852 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 08:42:01,852 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:02,114 WARN L180 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 56 [2018-12-08 08:42:03,128 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:42:03,128 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:42:03,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:03,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:03,211 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:04,229 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 08:42:04,229 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:04,457 WARN L180 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 63 [2018-12-08 08:42:04,906 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:04,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18] total 23 [2018-12-08 08:42:04,906 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-12-08 08:42:04,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-12-08 08:42:04,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=741, Unknown=0, NotChecked=0, Total=812 [2018-12-08 08:42:04,907 INFO L87 Difference]: Start difference. First operand 246 states and 327 transitions. Second operand 23 states. [2018-12-08 08:42:06,282 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 39 [2018-12-08 08:42:07,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:07,939 INFO L93 Difference]: Finished difference Result 284 states and 375 transitions. [2018-12-08 08:42:07,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 08:42:07,940 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 76 [2018-12-08 08:42:07,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:07,941 INFO L225 Difference]: With dead ends: 284 [2018-12-08 08:42:07,941 INFO L226 Difference]: Without dead ends: 268 [2018-12-08 08:42:07,942 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 142 SyntacticMatches, 5 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=161, Invalid=1321, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 08:42:07,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-12-08 08:42:07,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 238. [2018-12-08 08:42:07,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-12-08 08:42:07,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 313 transitions. [2018-12-08 08:42:07,966 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 313 transitions. Word has length 76 [2018-12-08 08:42:07,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:07,966 INFO L480 AbstractCegarLoop]: Abstraction has 238 states and 313 transitions. [2018-12-08 08:42:07,966 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-12-08 08:42:07,966 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 313 transitions. [2018-12-08 08:42:07,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 08:42:07,966 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:07,967 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:07,967 INFO L423 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:07,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:07,967 INFO L82 PathProgramCache]: Analyzing trace with hash -1779240676, now seen corresponding path program 1 times [2018-12-08 08:42:07,967 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:07,967 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:07,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:07,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:08,000 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:08,013 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 08:42:08,013 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:08,053 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 08:42:08,055 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:08,055 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-12-08 08:42:08,055 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:42:08,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:42:08,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:42:08,055 INFO L87 Difference]: Start difference. First operand 238 states and 313 transitions. Second operand 6 states. [2018-12-08 08:42:08,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:08,122 INFO L93 Difference]: Finished difference Result 256 states and 335 transitions. [2018-12-08 08:42:08,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:42:08,122 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2018-12-08 08:42:08,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:08,123 INFO L225 Difference]: With dead ends: 256 [2018-12-08 08:42:08,123 INFO L226 Difference]: Without dead ends: 251 [2018-12-08 08:42:08,123 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 139 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:42:08,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2018-12-08 08:42:08,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 236. [2018-12-08 08:42:08,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-12-08 08:42:08,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 309 transitions. [2018-12-08 08:42:08,148 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 309 transitions. Word has length 73 [2018-12-08 08:42:08,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:08,148 INFO L480 AbstractCegarLoop]: Abstraction has 236 states and 309 transitions. [2018-12-08 08:42:08,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:42:08,148 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 309 transitions. [2018-12-08 08:42:08,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 08:42:08,149 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:08,149 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:08,149 INFO L423 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:08,149 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:08,149 INFO L82 PathProgramCache]: Analyzing trace with hash -880217657, now seen corresponding path program 1 times [2018-12-08 08:42:08,149 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:08,149 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:08,168 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:08,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:08,250 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:08,569 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:42:08,569 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:09,677 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:42:09,679 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:09,679 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13] total 22 [2018-12-08 08:42:09,679 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 08:42:09,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 08:42:09,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:42:09,679 INFO L87 Difference]: Start difference. First operand 236 states and 309 transitions. Second operand 22 states. [2018-12-08 08:42:10,183 WARN L180 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 41 [2018-12-08 08:42:10,690 WARN L180 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 38 [2018-12-08 08:42:11,008 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 40 [2018-12-08 08:42:11,347 WARN L180 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 43 [2018-12-08 08:42:12,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:12,382 INFO L93 Difference]: Finished difference Result 276 states and 357 transitions. [2018-12-08 08:42:12,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 08:42:12,383 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-12-08 08:42:12,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:12,384 INFO L225 Difference]: With dead ends: 276 [2018-12-08 08:42:12,384 INFO L226 Difference]: Without dead ends: 262 [2018-12-08 08:42:12,384 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 124 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=192, Invalid=800, Unknown=0, NotChecked=0, Total=992 [2018-12-08 08:42:12,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-12-08 08:42:12,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 236. [2018-12-08 08:42:12,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-12-08 08:42:12,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 302 transitions. [2018-12-08 08:42:12,410 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 302 transitions. Word has length 73 [2018-12-08 08:42:12,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:12,410 INFO L480 AbstractCegarLoop]: Abstraction has 236 states and 302 transitions. [2018-12-08 08:42:12,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 08:42:12,410 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 302 transitions. [2018-12-08 08:42:12,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-08 08:42:12,410 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:12,410 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:12,411 INFO L423 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:12,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:12,411 INFO L82 PathProgramCache]: Analyzing trace with hash -1211717294, now seen corresponding path program 1 times [2018-12-08 08:42:12,411 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:12,411 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:12,428 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:12,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:12,511 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:12,772 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 08:42:12,772 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:13,898 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:42:13,900 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:13,900 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13] total 22 [2018-12-08 08:42:13,900 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 08:42:13,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 08:42:13,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:42:13,901 INFO L87 Difference]: Start difference. First operand 236 states and 302 transitions. Second operand 22 states. [2018-12-08 08:42:14,424 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 39 [2018-12-08 08:42:14,920 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 37 [2018-12-08 08:42:15,129 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 39 [2018-12-08 08:42:16,342 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 30 [2018-12-08 08:42:16,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:16,983 INFO L93 Difference]: Finished difference Result 302 states and 374 transitions. [2018-12-08 08:42:16,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-12-08 08:42:16,984 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 77 [2018-12-08 08:42:16,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:16,985 INFO L225 Difference]: With dead ends: 302 [2018-12-08 08:42:16,985 INFO L226 Difference]: Without dead ends: 233 [2018-12-08 08:42:16,985 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=275, Invalid=1057, Unknown=0, NotChecked=0, Total=1332 [2018-12-08 08:42:16,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-12-08 08:42:17,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 222. [2018-12-08 08:42:17,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-12-08 08:42:17,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 280 transitions. [2018-12-08 08:42:17,008 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 280 transitions. Word has length 77 [2018-12-08 08:42:17,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:17,009 INFO L480 AbstractCegarLoop]: Abstraction has 222 states and 280 transitions. [2018-12-08 08:42:17,009 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 08:42:17,009 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 280 transitions. [2018-12-08 08:42:17,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 08:42:17,009 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:17,009 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:17,009 INFO L423 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:17,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:17,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1043562547, now seen corresponding path program 2 times [2018-12-08 08:42:17,010 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:17,010 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:17,023 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:42:17,085 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:42:17,085 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:42:17,087 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:17,386 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:42:17,386 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:18,499 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:42:18,501 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:18,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13] total 22 [2018-12-08 08:42:18,501 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 08:42:18,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 08:42:18,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:42:18,501 INFO L87 Difference]: Start difference. First operand 222 states and 280 transitions. Second operand 22 states. [2018-12-08 08:42:18,844 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 46 [2018-12-08 08:42:19,261 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 43 [2018-12-08 08:42:19,559 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 38 [2018-12-08 08:42:19,868 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 40 [2018-12-08 08:42:20,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:20,669 INFO L93 Difference]: Finished difference Result 259 states and 325 transitions. [2018-12-08 08:42:20,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 08:42:20,670 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 71 [2018-12-08 08:42:20,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:20,671 INFO L225 Difference]: With dead ends: 259 [2018-12-08 08:42:20,671 INFO L226 Difference]: Without dead ends: 248 [2018-12-08 08:42:20,672 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 118 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=185, Invalid=807, Unknown=0, NotChecked=0, Total=992 [2018-12-08 08:42:20,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-12-08 08:42:20,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 223. [2018-12-08 08:42:20,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-12-08 08:42:20,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 281 transitions. [2018-12-08 08:42:20,696 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 281 transitions. Word has length 71 [2018-12-08 08:42:20,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:20,696 INFO L480 AbstractCegarLoop]: Abstraction has 223 states and 281 transitions. [2018-12-08 08:42:20,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 08:42:20,696 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 281 transitions. [2018-12-08 08:42:20,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 08:42:20,696 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:20,696 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:20,696 INFO L423 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:20,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:20,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1397687737, now seen corresponding path program 1 times [2018-12-08 08:42:20,697 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:20,697 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:20,709 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:42:20,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:20,730 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:20,777 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 08:42:20,777 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:42:20,778 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:42:20,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-08 08:42:20,778 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:42:20,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:42:20,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:42:20,779 INFO L87 Difference]: Start difference. First operand 223 states and 281 transitions. Second operand 11 states. [2018-12-08 08:42:20,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:20,970 INFO L93 Difference]: Finished difference Result 242 states and 303 transitions. [2018-12-08 08:42:20,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:42:20,970 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 73 [2018-12-08 08:42:20,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:20,971 INFO L225 Difference]: With dead ends: 242 [2018-12-08 08:42:20,971 INFO L226 Difference]: Without dead ends: 233 [2018-12-08 08:42:20,971 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:42:20,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-12-08 08:42:20,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 228. [2018-12-08 08:42:20,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-12-08 08:42:20,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 289 transitions. [2018-12-08 08:42:20,997 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 289 transitions. Word has length 73 [2018-12-08 08:42:20,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:20,997 INFO L480 AbstractCegarLoop]: Abstraction has 228 states and 289 transitions. [2018-12-08 08:42:20,998 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:42:20,998 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 289 transitions. [2018-12-08 08:42:20,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 08:42:20,998 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:20,998 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:20,999 INFO L423 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:20,999 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:20,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1937569667, now seen corresponding path program 2 times [2018-12-08 08:42:20,999 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:20,999 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:21,011 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:42:21,077 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:42:21,077 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:42:21,079 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:21,410 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:42:21,411 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:22,934 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 7 proven. 5 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-12-08 08:42:22,936 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:22,936 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 24 [2018-12-08 08:42:22,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:42:22,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:42:22,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=441, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:42:22,936 INFO L87 Difference]: Start difference. First operand 228 states and 289 transitions. Second operand 24 states. [2018-12-08 08:42:24,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:24,785 INFO L93 Difference]: Finished difference Result 257 states and 323 transitions. [2018-12-08 08:42:24,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 08:42:24,787 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 73 [2018-12-08 08:42:24,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:24,787 INFO L225 Difference]: With dead ends: 257 [2018-12-08 08:42:24,788 INFO L226 Difference]: Without dead ends: 243 [2018-12-08 08:42:24,788 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 121 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=233, Invalid=823, Unknown=0, NotChecked=0, Total=1056 [2018-12-08 08:42:24,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-12-08 08:42:24,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 223. [2018-12-08 08:42:24,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-12-08 08:42:24,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 280 transitions. [2018-12-08 08:42:24,812 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 280 transitions. Word has length 73 [2018-12-08 08:42:24,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:24,812 INFO L480 AbstractCegarLoop]: Abstraction has 223 states and 280 transitions. [2018-12-08 08:42:24,812 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:42:24,812 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 280 transitions. [2018-12-08 08:42:24,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-12-08 08:42:24,813 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:24,813 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:24,813 INFO L423 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:24,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:24,813 INFO L82 PathProgramCache]: Analyzing trace with hash -689995902, now seen corresponding path program 1 times [2018-12-08 08:42:24,813 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:24,813 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:24,827 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:42:24,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:24,847 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:24,864 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-12-08 08:42:24,864 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:42:24,865 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:42:24,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-08 08:42:24,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 08:42:24,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 08:42:24,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-08 08:42:24,866 INFO L87 Difference]: Start difference. First operand 223 states and 280 transitions. Second operand 6 states. [2018-12-08 08:42:24,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:24,913 INFO L93 Difference]: Finished difference Result 241 states and 299 transitions. [2018-12-08 08:42:24,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 08:42:24,913 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2018-12-08 08:42:24,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:24,914 INFO L225 Difference]: With dead ends: 241 [2018-12-08 08:42:24,914 INFO L226 Difference]: Without dead ends: 229 [2018-12-08 08:42:24,914 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 70 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-08 08:42:24,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-12-08 08:42:24,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 226. [2018-12-08 08:42:24,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-12-08 08:42:24,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 277 transitions. [2018-12-08 08:42:24,939 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 277 transitions. Word has length 75 [2018-12-08 08:42:24,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:24,939 INFO L480 AbstractCegarLoop]: Abstraction has 226 states and 277 transitions. [2018-12-08 08:42:24,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 08:42:24,939 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 277 transitions. [2018-12-08 08:42:24,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 08:42:24,939 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:24,939 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:24,940 INFO L423 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:24,940 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:24,940 INFO L82 PathProgramCache]: Analyzing trace with hash 1637188566, now seen corresponding path program 1 times [2018-12-08 08:42:24,940 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:24,940 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:24,959 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:25,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:25,027 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:25,204 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:42:25,204 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:25,335 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:42:25,335 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:42:25,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:25,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:25,359 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:25,528 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 24 proven. 3 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:42:25,529 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:25,747 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:25,747 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15] total 15 [2018-12-08 08:42:25,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 08:42:25,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 08:42:25,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-12-08 08:42:25,747 INFO L87 Difference]: Start difference. First operand 226 states and 277 transitions. Second operand 15 states. [2018-12-08 08:42:26,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:26,717 INFO L93 Difference]: Finished difference Result 248 states and 305 transitions. [2018-12-08 08:42:26,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 08:42:26,718 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 80 [2018-12-08 08:42:26,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:26,719 INFO L225 Difference]: With dead ends: 248 [2018-12-08 08:42:26,719 INFO L226 Difference]: Without dead ends: 239 [2018-12-08 08:42:26,719 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=67, Invalid=439, Unknown=0, NotChecked=0, Total=506 [2018-12-08 08:42:26,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-12-08 08:42:26,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 232. [2018-12-08 08:42:26,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-12-08 08:42:26,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 289 transitions. [2018-12-08 08:42:26,745 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 289 transitions. Word has length 80 [2018-12-08 08:42:26,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:26,745 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 289 transitions. [2018-12-08 08:42:26,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 08:42:26,745 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 289 transitions. [2018-12-08 08:42:26,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 08:42:26,746 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:26,746 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:26,746 INFO L423 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:26,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:26,746 INFO L82 PathProgramCache]: Analyzing trace with hash -734550696, now seen corresponding path program 1 times [2018-12-08 08:42:26,746 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:26,746 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:26,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:26,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:26,824 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:27,873 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:42:27,873 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:28,357 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:42:28,357 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:42:28,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:28,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:28,383 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:28,507 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-08 08:42:28,507 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:28,657 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 48 [2018-12-08 08:42:28,948 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:28,948 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14] total 14 [2018-12-08 08:42:28,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 08:42:28,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 08:42:28,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:42:28,948 INFO L87 Difference]: Start difference. First operand 232 states and 289 transitions. Second operand 14 states. [2018-12-08 08:42:42,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:42,375 INFO L93 Difference]: Finished difference Result 254 states and 310 transitions. [2018-12-08 08:42:42,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 08:42:42,376 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 80 [2018-12-08 08:42:42,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:42,377 INFO L225 Difference]: With dead ends: 254 [2018-12-08 08:42:42,377 INFO L226 Difference]: Without dead ends: 245 [2018-12-08 08:42:42,378 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 9.6s TimeCoverageRelationStatistics Valid=65, Invalid=394, Unknown=3, NotChecked=0, Total=462 [2018-12-08 08:42:42,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-12-08 08:42:42,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 232. [2018-12-08 08:42:42,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-12-08 08:42:42,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 288 transitions. [2018-12-08 08:42:42,404 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 288 transitions. Word has length 80 [2018-12-08 08:42:42,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:42,405 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 288 transitions. [2018-12-08 08:42:42,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 08:42:42,405 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 288 transitions. [2018-12-08 08:42:42,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 08:42:42,405 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:42,405 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:42,405 INFO L423 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:42,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:42,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1037358574, now seen corresponding path program 1 times [2018-12-08 08:42:42,406 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:42,406 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:42,420 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:42,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:42,528 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:43,651 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 08:42:43,651 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:43,928 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-08 08:42:45,396 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:42:45,397 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:42:45,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:45,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:45,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:45,877 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 12 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-08 08:42:45,877 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:46,094 WARN L180 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-12-08 08:42:47,075 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:47,075 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 20] total 20 [2018-12-08 08:42:47,075 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 08:42:47,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 08:42:47,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=640, Unknown=0, NotChecked=0, Total=702 [2018-12-08 08:42:47,075 INFO L87 Difference]: Start difference. First operand 232 states and 288 transitions. Second operand 20 states. [2018-12-08 08:42:50,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:42:50,623 INFO L93 Difference]: Finished difference Result 249 states and 304 transitions. [2018-12-08 08:42:50,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 08:42:50,624 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 80 [2018-12-08 08:42:50,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:42:50,625 INFO L225 Difference]: With dead ends: 249 [2018-12-08 08:42:50,625 INFO L226 Difference]: Without dead ends: 240 [2018-12-08 08:42:50,626 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 158 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=142, Invalid=1418, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 08:42:50,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-12-08 08:42:50,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 232. [2018-12-08 08:42:50,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-12-08 08:42:50,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 287 transitions. [2018-12-08 08:42:50,652 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 287 transitions. Word has length 80 [2018-12-08 08:42:50,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:42:50,653 INFO L480 AbstractCegarLoop]: Abstraction has 232 states and 287 transitions. [2018-12-08 08:42:50,653 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 08:42:50,653 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 287 transitions. [2018-12-08 08:42:50,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 08:42:50,653 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:42:50,653 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:42:50,653 INFO L423 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:42:50,653 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:42:50,653 INFO L82 PathProgramCache]: Analyzing trace with hash 885869460, now seen corresponding path program 1 times [2018-12-08 08:42:50,654 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:42:50,654 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:42:50,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:42:50,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:42:50,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:42:57,150 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:42:57,150 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:42:57,939 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:42:57,941 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:42:57,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 20 [2018-12-08 08:42:57,941 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 08:42:57,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 08:42:57,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=316, Unknown=3, NotChecked=0, Total=380 [2018-12-08 08:42:57,942 INFO L87 Difference]: Start difference. First operand 232 states and 287 transitions. Second operand 20 states. [2018-12-08 08:43:03,806 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 40 [2018-12-08 08:43:04,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:04,351 INFO L93 Difference]: Finished difference Result 250 states and 304 transitions. [2018-12-08 08:43:04,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 08:43:04,352 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 80 [2018-12-08 08:43:04,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:04,353 INFO L225 Difference]: With dead ends: 250 [2018-12-08 08:43:04,353 INFO L226 Difference]: Without dead ends: 180 [2018-12-08 08:43:04,354 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 137 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 10.4s TimeCoverageRelationStatistics Valid=190, Invalid=619, Unknown=3, NotChecked=0, Total=812 [2018-12-08 08:43:04,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-12-08 08:43:04,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 173. [2018-12-08 08:43:04,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-12-08 08:43:04,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 215 transitions. [2018-12-08 08:43:04,374 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 215 transitions. Word has length 80 [2018-12-08 08:43:04,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:04,375 INFO L480 AbstractCegarLoop]: Abstraction has 173 states and 215 transitions. [2018-12-08 08:43:04,375 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 08:43:04,375 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 215 transitions. [2018-12-08 08:43:04,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 08:43:04,375 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:04,375 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:04,376 INFO L423 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:04,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:04,376 INFO L82 PathProgramCache]: Analyzing trace with hash 1128172057, now seen corresponding path program 1 times [2018-12-08 08:43:04,376 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:04,376 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:04,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:04,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:04,410 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:04,492 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 17 proven. 5 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:43:04,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:04,635 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:43:04,636 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:04,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 18 [2018-12-08 08:43:04,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-08 08:43:04,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-08 08:43:04,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2018-12-08 08:43:04,636 INFO L87 Difference]: Start difference. First operand 173 states and 215 transitions. Second operand 18 states. [2018-12-08 08:43:05,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:05,082 INFO L93 Difference]: Finished difference Result 184 states and 226 transitions. [2018-12-08 08:43:05,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 08:43:05,082 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 81 [2018-12-08 08:43:05,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:05,083 INFO L225 Difference]: With dead ends: 184 [2018-12-08 08:43:05,083 INFO L226 Difference]: Without dead ends: 154 [2018-12-08 08:43:05,083 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=506, Unknown=0, NotChecked=0, Total=600 [2018-12-08 08:43:05,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-08 08:43:05,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2018-12-08 08:43:05,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-12-08 08:43:05,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 194 transitions. [2018-12-08 08:43:05,102 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 194 transitions. Word has length 81 [2018-12-08 08:43:05,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:05,102 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 194 transitions. [2018-12-08 08:43:05,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-08 08:43:05,102 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 194 transitions. [2018-12-08 08:43:05,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-08 08:43:05,102 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:05,103 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:05,103 INFO L423 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:05,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:05,103 INFO L82 PathProgramCache]: Analyzing trace with hash 1716375510, now seen corresponding path program 1 times [2018-12-08 08:43:05,103 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:05,103 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:05,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:05,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:05,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:06,348 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 08:43:06,348 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:06,652 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 49 [2018-12-08 08:43:08,516 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-08 08:43:10,883 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:43:10,885 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:10,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 21] total 37 [2018-12-08 08:43:10,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-12-08 08:43:10,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-12-08 08:43:10,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1186, Unknown=0, NotChecked=0, Total=1332 [2018-12-08 08:43:10,886 INFO L87 Difference]: Start difference. First operand 154 states and 194 transitions. Second operand 37 states. [2018-12-08 08:43:13,077 WARN L180 SmtUtils]: Spent 1.02 s on a formula simplification. DAG size of input: 106 DAG size of output: 65 [2018-12-08 08:43:14,960 WARN L180 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 52 [2018-12-08 08:43:16,134 WARN L180 SmtUtils]: Spent 392.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 75 [2018-12-08 08:43:17,296 WARN L180 SmtUtils]: Spent 619.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2018-12-08 08:43:18,293 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 66 [2018-12-08 08:43:19,261 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 33 [2018-12-08 08:43:20,190 WARN L180 SmtUtils]: Spent 611.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 106 [2018-12-08 08:43:20,959 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 41 [2018-12-08 08:43:21,290 WARN L180 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 43 [2018-12-08 08:43:22,729 WARN L180 SmtUtils]: Spent 508.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 107 [2018-12-08 08:43:23,621 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification that was a NOOP. DAG size: 83 [2018-12-08 08:43:24,266 WARN L180 SmtUtils]: Spent 257.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 63 [2018-12-08 08:43:25,151 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 47 [2018-12-08 08:43:26,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:26,818 INFO L93 Difference]: Finished difference Result 186 states and 233 transitions. [2018-12-08 08:43:26,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-12-08 08:43:26,819 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 78 [2018-12-08 08:43:26,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:26,820 INFO L225 Difference]: With dead ends: 186 [2018-12-08 08:43:26,820 INFO L226 Difference]: Without dead ends: 173 [2018-12-08 08:43:26,821 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 637 ImplicationChecksByTransitivity, 15.3s TimeCoverageRelationStatistics Valid=567, Invalid=4125, Unknown=0, NotChecked=0, Total=4692 [2018-12-08 08:43:26,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-08 08:43:26,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 145. [2018-12-08 08:43:26,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-08 08:43:26,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 177 transitions. [2018-12-08 08:43:26,841 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 177 transitions. Word has length 78 [2018-12-08 08:43:26,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:26,841 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 177 transitions. [2018-12-08 08:43:26,841 INFO L481 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-12-08 08:43:26,842 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 177 transitions. [2018-12-08 08:43:26,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 08:43:26,842 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:26,842 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:26,842 INFO L423 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:26,842 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:26,842 INFO L82 PathProgramCache]: Analyzing trace with hash -178410659, now seen corresponding path program 1 times [2018-12-08 08:43:26,842 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:26,842 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:26,855 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:26,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:26,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:26,963 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:43:26,963 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:27,091 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:43:27,092 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:27,092 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 15 [2018-12-08 08:43:27,092 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 08:43:27,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 08:43:27,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:43:27,093 INFO L87 Difference]: Start difference. First operand 145 states and 177 transitions. Second operand 15 states. [2018-12-08 08:43:27,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:27,601 INFO L93 Difference]: Finished difference Result 158 states and 190 transitions. [2018-12-08 08:43:27,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:43:27,602 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-12-08 08:43:27,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:27,602 INFO L225 Difference]: With dead ends: 158 [2018-12-08 08:43:27,602 INFO L226 Difference]: Without dead ends: 144 [2018-12-08 08:43:27,603 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 145 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=360, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:43:27,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-12-08 08:43:27,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 136. [2018-12-08 08:43:27,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-08 08:43:27,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 165 transitions. [2018-12-08 08:43:27,621 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 165 transitions. Word has length 81 [2018-12-08 08:43:27,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:27,621 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 165 transitions. [2018-12-08 08:43:27,621 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 08:43:27,621 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 165 transitions. [2018-12-08 08:43:27,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-08 08:43:27,622 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:27,622 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:27,622 INFO L423 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:27,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:27,622 INFO L82 PathProgramCache]: Analyzing trace with hash -1512796842, now seen corresponding path program 2 times [2018-12-08 08:43:27,623 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:27,623 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:27,635 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:43:27,729 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:43:27,729 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:43:27,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:28,361 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 08:43:28,361 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:28,473 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 50 [2018-12-08 08:43:30,646 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:43:30,648 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:30,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2018-12-08 08:43:30,648 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-08 08:43:30,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-08 08:43:30,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=558, Unknown=0, NotChecked=0, Total=650 [2018-12-08 08:43:30,649 INFO L87 Difference]: Start difference. First operand 136 states and 165 transitions. Second operand 26 states. [2018-12-08 08:43:31,160 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 55 [2018-12-08 08:43:31,776 WARN L180 SmtUtils]: Spent 269.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 68 [2018-12-08 08:43:32,453 WARN L180 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 41 [2018-12-08 08:43:32,929 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 38 [2018-12-08 08:43:34,694 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 33 [2018-12-08 08:43:34,961 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 50 [2018-12-08 08:43:35,839 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 40 [2018-12-08 08:43:36,167 WARN L180 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 40 [2018-12-08 08:43:36,642 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 44 [2018-12-08 08:43:36,956 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 44 [2018-12-08 08:43:37,216 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 35 [2018-12-08 08:43:37,458 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 41 [2018-12-08 08:43:37,711 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 41 [2018-12-08 08:43:38,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:38,429 INFO L93 Difference]: Finished difference Result 188 states and 230 transitions. [2018-12-08 08:43:38,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-12-08 08:43:38,431 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 78 [2018-12-08 08:43:38,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:38,431 INFO L225 Difference]: With dead ends: 188 [2018-12-08 08:43:38,431 INFO L226 Difference]: Without dead ends: 174 [2018-12-08 08:43:38,432 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 128 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 318 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=447, Invalid=2103, Unknown=0, NotChecked=0, Total=2550 [2018-12-08 08:43:38,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-12-08 08:43:38,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 161. [2018-12-08 08:43:38,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-12-08 08:43:38,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 199 transitions. [2018-12-08 08:43:38,455 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 199 transitions. Word has length 78 [2018-12-08 08:43:38,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:38,455 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 199 transitions. [2018-12-08 08:43:38,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-08 08:43:38,455 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 199 transitions. [2018-12-08 08:43:38,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-08 08:43:38,456 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:38,456 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:38,456 INFO L423 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:38,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:38,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1418902222, now seen corresponding path program 1 times [2018-12-08 08:43:38,456 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:38,456 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 58 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:38,469 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:43:38,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:38,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:40,475 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:43:40,475 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:42,153 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:43:42,153 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:43:42,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:42,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:42,908 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:42,936 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:43:42,936 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:43,564 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:43,564 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-12-08 08:43:43,564 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-08 08:43:43,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-08 08:43:43,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=593, Unknown=0, NotChecked=0, Total=650 [2018-12-08 08:43:43,565 INFO L87 Difference]: Start difference. First operand 161 states and 199 transitions. Second operand 20 states. [2018-12-08 08:43:47,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:47,525 INFO L93 Difference]: Finished difference Result 181 states and 224 transitions. [2018-12-08 08:43:47,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-08 08:43:47,526 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 83 [2018-12-08 08:43:47,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:47,527 INFO L225 Difference]: With dead ends: 181 [2018-12-08 08:43:47,527 INFO L226 Difference]: Without dead ends: 172 [2018-12-08 08:43:47,528 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 163 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=129, Invalid=1431, Unknown=0, NotChecked=0, Total=1560 [2018-12-08 08:43:47,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-12-08 08:43:47,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 165. [2018-12-08 08:43:47,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-12-08 08:43:47,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 205 transitions. [2018-12-08 08:43:47,558 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 205 transitions. Word has length 83 [2018-12-08 08:43:47,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:47,559 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 205 transitions. [2018-12-08 08:43:47,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-08 08:43:47,559 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 205 transitions. [2018-12-08 08:43:47,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-12-08 08:43:47,559 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:47,559 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:47,559 INFO L423 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:47,559 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:47,559 INFO L82 PathProgramCache]: Analyzing trace with hash -1504804959, now seen corresponding path program 1 times [2018-12-08 08:43:47,560 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:47,560 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 60 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:47,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:47,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:47,595 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:47,654 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:43:47,654 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:47,784 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:43:47,785 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:47,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 15 [2018-12-08 08:43:47,785 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 08:43:47,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 08:43:47,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:43:47,785 INFO L87 Difference]: Start difference. First operand 165 states and 205 transitions. Second operand 15 states. [2018-12-08 08:43:48,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:48,340 INFO L93 Difference]: Finished difference Result 175 states and 215 transitions. [2018-12-08 08:43:48,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 08:43:48,341 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 79 [2018-12-08 08:43:48,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:48,343 INFO L225 Difference]: With dead ends: 175 [2018-12-08 08:43:48,343 INFO L226 Difference]: Without dead ends: 168 [2018-12-08 08:43:48,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-12-08 08:43:48,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-12-08 08:43:48,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 163. [2018-12-08 08:43:48,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-08 08:43:48,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 202 transitions. [2018-12-08 08:43:48,378 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 202 transitions. Word has length 79 [2018-12-08 08:43:48,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:48,378 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 202 transitions. [2018-12-08 08:43:48,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 08:43:48,378 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 202 transitions. [2018-12-08 08:43:48,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-12-08 08:43:48,379 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:48,379 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:48,379 INFO L423 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:48,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:48,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1573324402, now seen corresponding path program 2 times [2018-12-08 08:43:48,379 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:48,379 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:48,393 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:43:48,463 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:43:48,463 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:43:48,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:48,829 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-12-08 08:43:48,830 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:49,457 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-12-08 08:43:50,450 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-12-08 08:43:50,452 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:50,452 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15] total 24 [2018-12-08 08:43:50,452 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:43:50,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:43:50,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:43:50,453 INFO L87 Difference]: Start difference. First operand 163 states and 202 transitions. Second operand 24 states. [2018-12-08 08:43:52,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:52,446 INFO L93 Difference]: Finished difference Result 196 states and 238 transitions. [2018-12-08 08:43:52,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 08:43:52,447 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 77 [2018-12-08 08:43:52,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:52,447 INFO L225 Difference]: With dead ends: 196 [2018-12-08 08:43:52,448 INFO L226 Difference]: Without dead ends: 157 [2018-12-08 08:43:52,448 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 130 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 124 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=235, Invalid=1097, Unknown=0, NotChecked=0, Total=1332 [2018-12-08 08:43:52,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-08 08:43:52,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 155. [2018-12-08 08:43:52,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:43:52,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 190 transitions. [2018-12-08 08:43:52,470 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 190 transitions. Word has length 77 [2018-12-08 08:43:52,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:52,470 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 190 transitions. [2018-12-08 08:43:52,470 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:43:52,470 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 190 transitions. [2018-12-08 08:43:52,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 08:43:52,471 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:52,471 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:52,471 INFO L423 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:52,471 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:52,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1709816903, now seen corresponding path program 1 times [2018-12-08 08:43:52,471 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:52,471 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 62 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:52,486 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:43:52,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:52,569 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:52,916 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:43:52,916 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:53,188 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:43:53,188 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:43:53,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:53,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:53,220 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:53,281 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:43:53,281 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:53,469 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:53,469 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-12-08 08:43:53,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 08:43:53,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 08:43:53,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=304, Unknown=0, NotChecked=0, Total=342 [2018-12-08 08:43:53,470 INFO L87 Difference]: Start difference. First operand 155 states and 190 transitions. Second operand 16 states. [2018-12-08 08:43:56,226 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 31 [2018-12-08 08:43:56,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:56,921 INFO L93 Difference]: Finished difference Result 170 states and 206 transitions. [2018-12-08 08:43:56,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 08:43:56,922 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 84 [2018-12-08 08:43:56,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:56,923 INFO L225 Difference]: With dead ends: 170 [2018-12-08 08:43:56,923 INFO L226 Difference]: Without dead ends: 165 [2018-12-08 08:43:56,923 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 160 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=102, Invalid=710, Unknown=0, NotChecked=0, Total=812 [2018-12-08 08:43:56,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-08 08:43:56,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 155. [2018-12-08 08:43:56,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:43:56,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 190 transitions. [2018-12-08 08:43:56,946 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 190 transitions. Word has length 84 [2018-12-08 08:43:56,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:56,946 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 190 transitions. [2018-12-08 08:43:56,946 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 08:43:56,946 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 190 transitions. [2018-12-08 08:43:56,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 08:43:56,947 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:56,947 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:56,947 INFO L423 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:56,947 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:56,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1850365513, now seen corresponding path program 1 times [2018-12-08 08:43:56,947 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:56,948 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 64 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:56,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:43:57,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:43:57,045 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:57,307 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-12-08 08:43:57,307 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:43:57,309 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:43:57,309 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-08 08:43:57,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:43:57,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:43:57,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:43:57,310 INFO L87 Difference]: Start difference. First operand 155 states and 190 transitions. Second operand 11 states. [2018-12-08 08:43:57,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:43:57,919 INFO L93 Difference]: Finished difference Result 171 states and 207 transitions. [2018-12-08 08:43:57,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-08 08:43:57,920 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-12-08 08:43:57,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:43:57,921 INFO L225 Difference]: With dead ends: 171 [2018-12-08 08:43:57,921 INFO L226 Difference]: Without dead ends: 162 [2018-12-08 08:43:57,921 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:43:57,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-08 08:43:57,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 155. [2018-12-08 08:43:57,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:43:57,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 189 transitions. [2018-12-08 08:43:57,943 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 189 transitions. Word has length 84 [2018-12-08 08:43:57,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:43:57,943 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 189 transitions. [2018-12-08 08:43:57,943 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:43:57,943 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 189 transitions. [2018-12-08 08:43:57,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 08:43:57,944 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:43:57,944 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:43:57,944 INFO L423 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:43:57,944 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:43:57,944 INFO L82 PathProgramCache]: Analyzing trace with hash -88796533, now seen corresponding path program 2 times [2018-12-08 08:43:57,944 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:43:57,944 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 65 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:43:57,957 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:43:58,028 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:43:58,028 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:43:58,031 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:58,397 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:43:58,397 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:58,675 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:43:58,675 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:43:58,681 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:43:58,710 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:43:58,710 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:43:58,712 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:43:58,773 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:43:58,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:43:58,952 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:43:58,952 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-12-08 08:43:58,952 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-08 08:43:58,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-08 08:43:58,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=304, Unknown=0, NotChecked=0, Total=342 [2018-12-08 08:43:58,952 INFO L87 Difference]: Start difference. First operand 155 states and 189 transitions. Second operand 16 states. [2018-12-08 08:44:00,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:00,387 INFO L93 Difference]: Finished difference Result 170 states and 205 transitions. [2018-12-08 08:44:00,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-08 08:44:00,387 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 84 [2018-12-08 08:44:00,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:00,388 INFO L225 Difference]: With dead ends: 170 [2018-12-08 08:44:00,388 INFO L226 Difference]: Without dead ends: 165 [2018-12-08 08:44:00,388 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 161 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=100, Invalid=712, Unknown=0, NotChecked=0, Total=812 [2018-12-08 08:44:00,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-08 08:44:00,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 155. [2018-12-08 08:44:00,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:44:00,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 189 transitions. [2018-12-08 08:44:00,412 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 189 transitions. Word has length 84 [2018-12-08 08:44:00,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:00,412 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 189 transitions. [2018-12-08 08:44:00,412 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-08 08:44:00,412 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 189 transitions. [2018-12-08 08:44:00,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 08:44:00,412 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:00,413 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:00,413 INFO L423 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:00,413 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:00,413 INFO L82 PathProgramCache]: Analyzing trace with hash 516304508, now seen corresponding path program 1 times [2018-12-08 08:44:00,413 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:00,413 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 67 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:00,426 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:44:00,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:44:00,788 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:02,819 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:44:02,819 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:03,311 WARN L180 SmtUtils]: Spent 279.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 68 [2018-12-08 08:44:03,488 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 60 [2018-12-08 08:44:03,590 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 60 [2018-12-08 08:44:04,663 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:44:04,663 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:44:04,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 08:44:05,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:44:05,459 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:08,005 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 08:44:08,006 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:08,309 WARN L180 SmtUtils]: Spent 300.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 71 [2018-12-08 08:44:10,254 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:44:10,254 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 32 [2018-12-08 08:44:10,255 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-12-08 08:44:10,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-12-08 08:44:10,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1612, Unknown=0, NotChecked=0, Total=1722 [2018-12-08 08:44:10,255 INFO L87 Difference]: Start difference. First operand 155 states and 189 transitions. Second operand 32 states. [2018-12-08 08:44:17,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:17,091 INFO L93 Difference]: Finished difference Result 169 states and 203 transitions. [2018-12-08 08:44:17,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 08:44:17,093 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 85 [2018-12-08 08:44:17,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:17,094 INFO L225 Difference]: With dead ends: 169 [2018-12-08 08:44:17,094 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 08:44:17,094 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 151 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 517 ImplicationChecksByTransitivity, 10.8s TimeCoverageRelationStatistics Valid=210, Invalid=3212, Unknown=0, NotChecked=0, Total=3422 [2018-12-08 08:44:17,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 08:44:17,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 155. [2018-12-08 08:44:17,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:44:17,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 187 transitions. [2018-12-08 08:44:17,116 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 187 transitions. Word has length 85 [2018-12-08 08:44:17,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:17,116 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 187 transitions. [2018-12-08 08:44:17,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-12-08 08:44:17,116 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 187 transitions. [2018-12-08 08:44:17,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 08:44:17,117 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:17,117 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:17,117 INFO L423 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:17,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:17,117 INFO L82 PathProgramCache]: Analyzing trace with hash 593862840, now seen corresponding path program 2 times [2018-12-08 08:44:17,117 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:17,117 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 69 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:17,130 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:44:17,454 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:44:17,454 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:17,456 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:19,488 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:44:19,489 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:19,938 WARN L180 SmtUtils]: Spent 245.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2018-12-08 08:44:21,298 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:44:21,299 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:44:21,305 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:44:22,084 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:44:22,085 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:22,088 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:22,389 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 08:44:22,389 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:22,602 WARN L180 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2018-12-08 08:44:23,138 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:44:23,138 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24] total 24 [2018-12-08 08:44:23,139 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:44:23,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:44:23,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=805, Unknown=0, NotChecked=0, Total=870 [2018-12-08 08:44:23,139 INFO L87 Difference]: Start difference. First operand 155 states and 187 transitions. Second operand 24 states. [2018-12-08 08:44:29,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:29,040 INFO L93 Difference]: Finished difference Result 169 states and 201 transitions. [2018-12-08 08:44:29,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 08:44:29,041 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 85 [2018-12-08 08:44:29,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:29,041 INFO L225 Difference]: With dead ends: 169 [2018-12-08 08:44:29,041 INFO L226 Difference]: Without dead ends: 160 [2018-12-08 08:44:29,042 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=149, Invalid=2013, Unknown=0, NotChecked=0, Total=2162 [2018-12-08 08:44:29,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-08 08:44:29,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 155. [2018-12-08 08:44:29,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-12-08 08:44:29,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 186 transitions. [2018-12-08 08:44:29,064 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 186 transitions. Word has length 85 [2018-12-08 08:44:29,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:29,064 INFO L480 AbstractCegarLoop]: Abstraction has 155 states and 186 transitions. [2018-12-08 08:44:29,064 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:44:29,064 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 186 transitions. [2018-12-08 08:44:29,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 08:44:29,064 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:29,064 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:29,065 INFO L423 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:29,065 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:29,065 INFO L82 PathProgramCache]: Analyzing trace with hash -1984707855, now seen corresponding path program 3 times [2018-12-08 08:44:29,065 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:29,065 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 71 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:29,077 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-12-08 08:44:29,185 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-12-08 08:44:29,185 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:29,187 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:29,636 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:44:29,636 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:29,753 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 42 [2018-12-08 08:44:31,678 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:44:31,679 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:44:31,680 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 24 [2018-12-08 08:44:31,680 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:44:31,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:44:31,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=470, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:44:31,680 INFO L87 Difference]: Start difference. First operand 155 states and 186 transitions. Second operand 24 states. [2018-12-08 08:44:35,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:35,727 INFO L93 Difference]: Finished difference Result 182 states and 215 transitions. [2018-12-08 08:44:35,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-08 08:44:35,729 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 84 [2018-12-08 08:44:35,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:35,729 INFO L225 Difference]: With dead ends: 182 [2018-12-08 08:44:35,729 INFO L226 Difference]: Without dead ends: 147 [2018-12-08 08:44:35,730 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 188 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=308, Invalid=1414, Unknown=0, NotChecked=0, Total=1722 [2018-12-08 08:44:35,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-08 08:44:35,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 142. [2018-12-08 08:44:35,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 08:44:35,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 167 transitions. [2018-12-08 08:44:35,752 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 167 transitions. Word has length 84 [2018-12-08 08:44:35,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:35,753 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 167 transitions. [2018-12-08 08:44:35,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:44:35,753 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 167 transitions. [2018-12-08 08:44:35,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 08:44:35,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:35,753 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:35,753 INFO L423 AbstractCegarLoop]: === Iteration 59 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:35,753 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:35,753 INFO L82 PathProgramCache]: Analyzing trace with hash -2075120659, now seen corresponding path program 1 times [2018-12-08 08:44:35,754 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:35,754 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 72 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:35,766 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 08:44:35,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 08:44:35,885 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:36,372 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:44:36,372 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:37,486 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 42 [2018-12-08 08:44:38,460 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 13 proven. 6 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:44:38,462 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:44:38,462 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 24 [2018-12-08 08:44:38,462 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:44:38,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:44:38,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=462, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:44:38,462 INFO L87 Difference]: Start difference. First operand 142 states and 167 transitions. Second operand 24 states. [2018-12-08 08:44:38,755 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 29 [2018-12-08 08:44:39,126 WARN L180 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 38 [2018-12-08 08:44:39,452 WARN L180 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 37 [2018-12-08 08:44:40,403 WARN L180 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 40 [2018-12-08 08:44:41,719 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 29 [2018-12-08 08:44:42,186 WARN L180 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 38 [2018-12-08 08:44:42,556 WARN L180 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 33 [2018-12-08 08:44:42,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:42,685 INFO L93 Difference]: Finished difference Result 170 states and 196 transitions. [2018-12-08 08:44:42,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 08:44:42,686 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 86 [2018-12-08 08:44:42,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:42,686 INFO L225 Difference]: With dead ends: 170 [2018-12-08 08:44:42,687 INFO L226 Difference]: Without dead ends: 137 [2018-12-08 08:44:42,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 148 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=279, Invalid=1203, Unknown=0, NotChecked=0, Total=1482 [2018-12-08 08:44:42,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-08 08:44:42,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 134. [2018-12-08 08:44:42,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-08 08:44:42,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 156 transitions. [2018-12-08 08:44:42,705 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 156 transitions. Word has length 86 [2018-12-08 08:44:42,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:42,705 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 156 transitions. [2018-12-08 08:44:42,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:44:42,705 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 156 transitions. [2018-12-08 08:44:42,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-12-08 08:44:42,706 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:42,706 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:42,706 INFO L423 AbstractCegarLoop]: === Iteration 60 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:42,706 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:42,706 INFO L82 PathProgramCache]: Analyzing trace with hash -1912539214, now seen corresponding path program 2 times [2018-12-08 08:44:42,706 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:42,706 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 73 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:42,719 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:44:43,128 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:44:43,128 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:43,131 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:44,683 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:44:44,683 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:44,978 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-12-08 08:44:46,337 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 08:44:46,337 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 08:44:46,343 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:44:47,163 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:44:47,163 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:47,167 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:47,510 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-08 08:44:47,510 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:47,784 WARN L180 SmtUtils]: Spent 258.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 69 [2018-12-08 08:44:47,984 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-08 08:44:48,107 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-08 08:44:48,921 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:44:48,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 22] total 22 [2018-12-08 08:44:48,921 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-12-08 08:44:48,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-12-08 08:44:48,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=746, Unknown=0, NotChecked=0, Total=812 [2018-12-08 08:44:48,921 INFO L87 Difference]: Start difference. First operand 134 states and 156 transitions. Second operand 22 states. [2018-12-08 08:44:53,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:53,280 INFO L93 Difference]: Finished difference Result 146 states and 168 transitions. [2018-12-08 08:44:53,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-08 08:44:53,282 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 83 [2018-12-08 08:44:53,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:53,282 INFO L225 Difference]: With dead ends: 146 [2018-12-08 08:44:53,282 INFO L226 Difference]: Without dead ends: 132 [2018-12-08 08:44:53,282 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 157 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=144, Invalid=1748, Unknown=0, NotChecked=0, Total=1892 [2018-12-08 08:44:53,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-12-08 08:44:53,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 129. [2018-12-08 08:44:53,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-12-08 08:44:53,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 148 transitions. [2018-12-08 08:44:53,299 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 148 transitions. Word has length 83 [2018-12-08 08:44:53,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:53,300 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 148 transitions. [2018-12-08 08:44:53,300 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-12-08 08:44:53,300 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 148 transitions. [2018-12-08 08:44:53,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 08:44:53,300 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:53,300 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:53,300 INFO L423 AbstractCegarLoop]: === Iteration 61 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:53,300 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:53,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1107258990, now seen corresponding path program 2 times [2018-12-08 08:44:53,300 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:53,300 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 75 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:53,315 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:44:53,382 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:44:53,382 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:53,384 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:53,550 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:44:53,550 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 08:44:53,552 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 08:44:53,552 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-12-08 08:44:53,553 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 08:44:53,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 08:44:53,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-12-08 08:44:53,553 INFO L87 Difference]: Start difference. First operand 129 states and 148 transitions. Second operand 11 states. [2018-12-08 08:44:56,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:44:56,069 INFO L93 Difference]: Finished difference Result 145 states and 165 transitions. [2018-12-08 08:44:56,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 08:44:56,069 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 80 [2018-12-08 08:44:56,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:44:56,070 INFO L225 Difference]: With dead ends: 145 [2018-12-08 08:44:56,070 INFO L226 Difference]: Without dead ends: 136 [2018-12-08 08:44:56,070 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:44:56,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-08 08:44:56,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 131. [2018-12-08 08:44:56,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-12-08 08:44:56,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 151 transitions. [2018-12-08 08:44:56,088 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 151 transitions. Word has length 80 [2018-12-08 08:44:56,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:44:56,088 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 151 transitions. [2018-12-08 08:44:56,088 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 08:44:56,088 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 151 transitions. [2018-12-08 08:44:56,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 08:44:56,088 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:44:56,088 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:44:56,088 INFO L423 AbstractCegarLoop]: === Iteration 62 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:44:56,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:44:56,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1359709994, now seen corresponding path program 2 times [2018-12-08 08:44:56,088 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:44:56,089 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 76 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:44:56,102 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:44:56,197 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:44:56,197 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:44:56,200 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:44:56,851 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2018-12-08 08:44:56,852 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:44:59,206 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:44:59,209 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:44:59,209 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2018-12-08 08:44:59,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-08 08:44:59,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-08 08:44:59,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=536, Unknown=0, NotChecked=0, Total=650 [2018-12-08 08:44:59,209 INFO L87 Difference]: Start difference. First operand 131 states and 151 transitions. Second operand 26 states. [2018-12-08 08:45:00,127 WARN L180 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 32 [2018-12-08 08:45:00,438 WARN L180 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 38 [2018-12-08 08:45:02,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:45:02,122 INFO L93 Difference]: Finished difference Result 145 states and 164 transitions. [2018-12-08 08:45:02,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 08:45:02,124 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 80 [2018-12-08 08:45:02,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:45:02,125 INFO L225 Difference]: With dead ends: 145 [2018-12-08 08:45:02,125 INFO L226 Difference]: Without dead ends: 127 [2018-12-08 08:45:02,125 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=273, Invalid=1133, Unknown=0, NotChecked=0, Total=1406 [2018-12-08 08:45:02,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-12-08 08:45:02,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 122. [2018-12-08 08:45:02,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-08 08:45:02,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 137 transitions. [2018-12-08 08:45:02,142 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 137 transitions. Word has length 80 [2018-12-08 08:45:02,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:45:02,142 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 137 transitions. [2018-12-08 08:45:02,142 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-08 08:45:02,142 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 137 transitions. [2018-12-08 08:45:02,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-08 08:45:02,142 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:45:02,142 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:45:02,143 INFO L423 AbstractCegarLoop]: === Iteration 63 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:45:02,143 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:45:02,143 INFO L82 PathProgramCache]: Analyzing trace with hash -107585423, now seen corresponding path program 4 times [2018-12-08 08:45:02,143 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:45:02,143 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 77 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:45:02,159 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-08 08:45:02,280 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-08 08:45:02,280 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:45:02,282 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:45:02,755 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-08 08:45:02,756 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:45:04,648 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-12-08 08:45:04,650 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:45:04,650 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 24 [2018-12-08 08:45:04,650 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-08 08:45:04,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-08 08:45:04,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2018-12-08 08:45:04,650 INFO L87 Difference]: Start difference. First operand 122 states and 137 transitions. Second operand 24 states. [2018-12-08 08:45:05,724 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification that was a NOOP. DAG size: 63 [2018-12-08 08:45:08,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:45:08,822 INFO L93 Difference]: Finished difference Result 134 states and 148 transitions. [2018-12-08 08:45:08,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-08 08:45:08,823 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 84 [2018-12-08 08:45:08,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:45:08,824 INFO L225 Difference]: With dead ends: 134 [2018-12-08 08:45:08,824 INFO L226 Difference]: Without dead ends: 91 [2018-12-08 08:45:08,824 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 194 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=317, Invalid=1489, Unknown=0, NotChecked=0, Total=1806 [2018-12-08 08:45:08,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-12-08 08:45:08,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2018-12-08 08:45:08,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-12-08 08:45:08,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2018-12-08 08:45:08,833 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 100 transitions. Word has length 84 [2018-12-08 08:45:08,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:45:08,834 INFO L480 AbstractCegarLoop]: Abstraction has 91 states and 100 transitions. [2018-12-08 08:45:08,834 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-08 08:45:08,834 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 100 transitions. [2018-12-08 08:45:08,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 08:45:08,834 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:45:08,834 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:45:08,834 INFO L423 AbstractCegarLoop]: === Iteration 64 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:45:08,834 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:45:08,834 INFO L82 PathProgramCache]: Analyzing trace with hash 1949643741, now seen corresponding path program 2 times [2018-12-08 08:45:08,834 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:45:08,834 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 78 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:45:08,847 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 08:45:08,882 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:45:08,882 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:45:08,884 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:45:08,943 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:45:08,943 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:45:09,083 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 08:45:09,084 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 08:45:09,084 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [11] total 17 [2018-12-08 08:45:09,084 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-08 08:45:09,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-08 08:45:09,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-12-08 08:45:09,085 INFO L87 Difference]: Start difference. First operand 91 states and 100 transitions. Second operand 17 states. [2018-12-08 08:45:09,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:45:09,370 INFO L93 Difference]: Finished difference Result 102 states and 111 transitions. [2018-12-08 08:45:09,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 08:45:09,370 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 81 [2018-12-08 08:45:09,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:45:09,371 INFO L225 Difference]: With dead ends: 102 [2018-12-08 08:45:09,371 INFO L226 Difference]: Without dead ends: 74 [2018-12-08 08:45:09,371 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 146 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=430, Unknown=0, NotChecked=0, Total=506 [2018-12-08 08:45:09,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-12-08 08:45:09,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 71. [2018-12-08 08:45:09,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-08 08:45:09,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 79 transitions. [2018-12-08 08:45:09,379 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 79 transitions. Word has length 81 [2018-12-08 08:45:09,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:45:09,379 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 79 transitions. [2018-12-08 08:45:09,379 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-08 08:45:09,379 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 79 transitions. [2018-12-08 08:45:09,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-12-08 08:45:09,380 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 08:45:09,380 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 08:45:09,380 INFO L423 AbstractCegarLoop]: === Iteration 65 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 08:45:09,380 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 08:45:09,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1581370087, now seen corresponding path program 2 times [2018-12-08 08:45:09,380 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 08:45:09,380 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/cvc4 Starting monitored process 79 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 08:45:09,394 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 08:45:09,429 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 08:45:09,429 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 08:45:09,431 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 08:45:09,485 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:45:09,485 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 08:45:09,615 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-12-08 08:45:09,616 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 08:45:09,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 15 [2018-12-08 08:45:09,617 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 08:45:09,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 08:45:09,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-12-08 08:45:09,617 INFO L87 Difference]: Start difference. First operand 71 states and 79 transitions. Second operand 15 states. [2018-12-08 08:45:09,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 08:45:09,916 INFO L93 Difference]: Finished difference Result 71 states and 79 transitions. [2018-12-08 08:45:09,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 08:45:09,917 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 81 [2018-12-08 08:45:09,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 08:45:09,917 INFO L225 Difference]: With dead ends: 71 [2018-12-08 08:45:09,917 INFO L226 Difference]: Without dead ends: 0 [2018-12-08 08:45:09,918 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 146 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=330, Unknown=0, NotChecked=0, Total=420 [2018-12-08 08:45:09,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-12-08 08:45:09,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-12-08 08:45:09,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-12-08 08:45:09,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-12-08 08:45:09,918 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 81 [2018-12-08 08:45:09,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 08:45:09,918 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-12-08 08:45:09,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 08:45:09,918 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-12-08 08:45:09,918 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-12-08 08:45:09,922 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-12-08 08:45:10,013 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:10,196 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:10,202 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:10,347 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 251 DAG size of output: 230 [2018-12-08 08:45:10,484 WARN L180 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 331 DAG size of output: 276 [2018-12-08 08:45:10,658 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 334 DAG size of output: 277 [2018-12-08 08:45:10,839 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:10,932 WARN L180 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 316 DAG size of output: 255 [2018-12-08 08:45:11,097 WARN L180 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 410 DAG size of output: 383 [2018-12-08 08:45:11,211 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:11,327 WARN L180 SmtUtils]: Spent 229.00 ms on a formula simplification. DAG size of input: 339 DAG size of output: 280 [2018-12-08 08:45:11,531 WARN L180 SmtUtils]: Spent 198.00 ms on a formula simplification. DAG size of input: 370 DAG size of output: 345 [2018-12-08 08:45:11,688 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 327 DAG size of output: 300 [2018-12-08 08:45:11,720 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:11,831 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 334 DAG size of output: 277 [2018-12-08 08:45:12,020 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:12,123 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 249 DAG size of output: 229 [2018-12-08 08:45:12,245 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:12,336 WARN L180 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 316 DAG size of output: 255 [2018-12-08 08:45:12,446 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:45:12,482 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 407 DAG size of output: 379 [2018-12-08 08:45:12,485 WARN L250 erpolLogProxyWrapper]: Already inconsistent. [2018-12-08 08:46:32,644 WARN L180 SmtUtils]: Spent 1.33 m on a formula simplification. DAG size of input: 329 DAG size of output: 53 [2018-12-08 08:46:32,801 WARN L180 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 161 DAG size of output: 1 [2018-12-08 08:51:20,717 WARN L180 SmtUtils]: Spent 4.80 m on a formula simplification. DAG size of input: 862 DAG size of output: 229 [2018-12-08 08:51:35,540 WARN L180 SmtUtils]: Spent 14.82 s on a formula simplification. DAG size of input: 159 DAG size of output: 102 [2018-12-08 08:51:57,008 WARN L180 SmtUtils]: Spent 21.46 s on a formula simplification. DAG size of input: 409 DAG size of output: 90 [2018-12-08 08:51:57,011 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.initFINAL(line -1) the Hoare annotation is: true [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point L19(lines 19 24) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point L48(lines 47 62) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L451 ceAbstractionStarter]: At program point L69(lines 18 71) the Hoare annotation is: true [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point L28(lines 27 42) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point L49(lines 47 62) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point L37(lines 37 41) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L451 ceAbstractionStarter]: At program point L37-1(lines 27 42) the Hoare annotation is: true [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point L25(lines 25 65) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L451 ceAbstractionStarter]: At program point base2fltENTRY(lines 14 72) the Hoare annotation is: true [2018-12-08 08:51:57,011 INFO L448 ceAbstractionStarter]: For program point base2fltFINAL(lines 14 72) no Hoare annotation was computed. [2018-12-08 08:51:57,011 INFO L451 ceAbstractionStarter]: At program point L63(lines 25 65) the Hoare annotation is: true [2018-12-08 08:51:57,012 INFO L448 ceAbstractionStarter]: For program point base2fltEXIT(lines 14 72) no Hoare annotation was computed. [2018-12-08 08:51:57,012 INFO L451 ceAbstractionStarter]: At program point L47-2(lines 47 62) the Hoare annotation is: true [2018-12-08 08:51:57,012 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-12-08 08:51:57,012 INFO L451 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-12-08 08:51:57,012 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-12-08 08:51:57,012 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-12-08 08:51:57,012 INFO L448 ceAbstractionStarter]: For program point mainEXIT(lines 214 252) no Hoare annotation was computed. [2018-12-08 08:51:57,012 INFO L448 ceAbstractionStarter]: For program point mainFINAL(lines 214 252) no Hoare annotation was computed. [2018-12-08 08:51:57,012 INFO L448 ceAbstractionStarter]: For program point L236(lines 236 245) no Hoare annotation was computed. [2018-12-08 08:51:57,012 INFO L444 ceAbstractionStarter]: At program point L234(line 234) the Hoare annotation is: (let ((.cse14 (bvlshr main_~a~0 (_ bv24 32)))) (let ((.cse24 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~b~0))) (.cse22 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) main_~a~0))) (.cse6 (bvlshr main_~b~0 (_ bv24 32))) (.cse23 (bvneg (bvadd .cse14 (_ bv4294967168 32))))) (let ((.cse25 (bvlshr .cse22 (bvadd .cse6 .cse23 (_ bv4294967168 32)))) (.cse21 (bvlshr .cse24 (bvadd (bvneg (bvadd .cse6 (_ bv4294967168 32))) .cse14 (_ bv4294967168 32))))) (let ((.cse18 (= main_~a~0 (_ bv0 32))) (.cse13 (bvadd .cse22 .cse21)) (.cse5 (bvadd .cse25 .cse24))) (let ((.cse10 (= (_ bv0 32) (bvand (_ bv33554432 32) .cse5))) (.cse20 (= main_~b~0 (_ bv0 32))) (.cse15 (= (bvand (_ bv33554432 32) .cse13) (_ bv0 32))) (.cse12 (not .cse18)) (.cse17 (= (bvadd .cse6 (_ bv4294967041 32)) (_ bv0 32))) (.cse8 (bvult main_~a~0 main_~b~0)) (.cse7 (= .cse25 (_ bv0 32)))) (let ((.cse4 (and .cse12 (or (not .cse17) (= (_ bv0 32) (bvand (_ bv33554432 32) (bvadd (bvlshr .cse22 (bvadd .cse23 (_ bv127 32))) .cse24)))) .cse8 (not .cse7))) (.cse0 (not .cse15)) (.cse1 (= (bvadd .cse14 (_ bv4294967041 32)) (_ bv0 32))) (.cse11 (not .cse20)) (.cse3 (not .cse10)) (.cse2 (= (_ bv4294967295 32) main_~r_add1~0)) (.cse9 (= main_~b~0 main_~r_add1~0)) (.cse16 (= .cse21 (_ bv0 32))) (.cse19 (= main_~a~0 main_~r_add1~0))) (or (and .cse0 .cse1 .cse2) (and .cse3 .cse4 (exists ((addflt_~ma~0 (_ BitVec 32))) (= main_~r_add1~0 (bvor addflt_~ma~0 (bvshl (bvadd (bvlshr main_~b~0 (_ bv24 32)) (_ bv1 32)) (_ bv24 32))))) (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse5 (_ bv1 32))) (bvshl (bvadd .cse6 (_ bv1 32)) (_ bv24 32))))) (or (and .cse7 .cse8 .cse9) (and .cse10 .cse4 (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) .cse5) (bvshl .cse6 (_ bv24 32)))))) (and .cse11 .cse12 .cse0 (exists ((v_addflt_~ma~0_481 (_ BitVec 32))) (= (bvor (bvand (_ bv16777215 32) v_addflt_~ma~0_481) (bvshl (bvadd (bvlshr main_~a~0 (_ bv24 32)) (_ bv1 32)) (_ bv24 32))) main_~r_add1~0)) (= main_~r_add1~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse13 (_ bv1 32))) (bvshl (bvadd .cse14 (_ bv1 32)) (_ bv24 32)))) (not .cse1)) (and .cse15 (= (bvor (bvand (_ bv16777215 32) .cse13) (bvshl .cse14 (_ bv24 32))) main_~r_add1~0) .cse11 (not .cse16)) (and .cse3 .cse2 .cse17) (and .cse18 .cse9) (and .cse19 .cse16 (not .cse8)) (and .cse20 .cse19)))))))) [2018-12-08 08:51:57,012 INFO L444 ceAbstractionStarter]: At program point L236-2(lines 236 245) the Hoare annotation is: (and (= main_~tmp___0~0 (_ bv0 32)) (= main_~tmp~2 (_ bv0 32))) [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L234-1(line 234) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L451 ceAbstractionStarter]: At program point L232(line 232) the Hoare annotation is: true [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L232-1(line 232) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L451 ceAbstractionStarter]: At program point L230(line 230) the Hoare annotation is: true [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L230-1(line 230) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L451 ceAbstractionStarter]: At program point mainENTRY(lines 214 252) the Hoare annotation is: true [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L247(line 247) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L239(lines 239 243) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L239-2(lines 239 243) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L451 ceAbstractionStarter]: At program point L233(line 233) the Hoare annotation is: true [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L233-1(line 233) no Hoare annotation was computed. [2018-12-08 08:51:57,013 INFO L451 ceAbstractionStarter]: At program point L231(line 231) the Hoare annotation is: true [2018-12-08 08:51:57,013 INFO L448 ceAbstractionStarter]: For program point L231-1(line 231) no Hoare annotation was computed. [2018-12-08 08:51:57,014 INFO L448 ceAbstractionStarter]: For program point L128(line 128) no Hoare annotation was computed. [2018-12-08 08:51:57,014 INFO L451 ceAbstractionStarter]: At program point addfltENTRY(lines 73 136) the Hoare annotation is: true [2018-12-08 08:51:57,014 INFO L448 ceAbstractionStarter]: For program point addfltFINAL(lines 73 136) no Hoare annotation was computed. [2018-12-08 08:51:57,014 INFO L448 ceAbstractionStarter]: For program point L116(lines 116 121) no Hoare annotation was computed. [2018-12-08 08:51:57,014 INFO L448 ceAbstractionStarter]: For program point L108(lines 108 113) no Hoare annotation was computed. [2018-12-08 08:51:57,014 INFO L444 ceAbstractionStarter]: At program point L104(line 104) the Hoare annotation is: (and (not (= (_ bv0 32) |addflt_#in~b|)) (let ((.cse2 (and (exists ((addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (and (= (bvadd addflt_~eb~0 (_ bv128 32)) (bvlshr addflt_~b (_ bv24 32))) (not (bvult addflt_~a addflt_~b)) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0))) (not (bvult addflt_~a addflt_~b)))) (.cse0 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse3 (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv4294967168 32))) (.cse1 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|)))) (or (and (= .cse0 addflt_~ma~0) (= .cse1 addflt_~mb~0) (= addflt_~b |addflt_#in~a|) (= (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv4294967168 32)) addflt_~eb~0) (= addflt_~a |addflt_#in~b|) .cse2 (= .cse3 addflt_~ea~0) (bvult addflt_~b addflt_~a)) (and .cse2 (= addflt_~b |addflt_#in~b|) (= .cse0 addflt_~mb~0) (= addflt_~a |addflt_#in~a|) (= .cse3 addflt_~eb~0) (= .cse1 addflt_~ma~0) (= (bvadd (bvlshr addflt_~a (_ bv24 32)) (_ bv4294967168 32)) addflt_~ea~0)))) (not (= (_ bv0 32) |addflt_#in~a|))) [2018-12-08 08:51:57,014 INFO L448 ceAbstractionStarter]: For program point L104-1(line 104) no Hoare annotation was computed. [2018-12-08 08:51:57,015 INFO L444 ceAbstractionStarter]: At program point L133(lines 83 135) the Hoare annotation is: (let ((.cse33 (bvlshr |addflt_#in~a| (_ bv24 32))) (.cse43 (bvlshr |addflt_#in~b| (_ bv24 32)))) (let ((.cse50 (bvadd .cse43 (_ bv4294967168 32))) (.cse55 (bvadd .cse33 (_ bv4294967168 32)))) (let ((.cse25 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse48 (bvneg .cse55)) (.cse7 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|))) (.cse8 (bvneg .cse50))) (let ((.cse26 (bvlshr .cse7 (bvadd .cse33 .cse8 (_ bv4294967168 32)))) (.cse51 (bvlshr .cse25 (bvadd .cse43 .cse48 (_ bv4294967168 32)))) (.cse10 (bvult addflt_~b addflt_~a))) (let ((.cse54 (= addflt_~__retres10~0 |addflt_#in~a|)) (.cse27 (bvlshr .cse7 (bvadd .cse8 addflt_~ea~0))) (.cse1 (and (and (bvult |addflt_#in~a| |addflt_#in~b|) .cse10) (= addflt_~a |addflt_#in~b|))) (.cse42 (bvadd .cse51 .cse7)) (.cse32 (bvadd .cse26 .cse25)) (.cse35 (= (bvadd .cse43 (_ bv4294967041 32)) (_ bv0 32))) (.cse53 (= (_ bv0 32) |addflt_#in~b|))) (let ((.cse44 (= .cse51 (_ bv0 32))) (.cse15 (= (_ bv0 32) (bvand (_ bv33554432 32) addflt_~ma~0))) (.cse52 (= (_ bv255 32) .cse33)) (.cse3 (and (not .cse53) (not (bvult addflt_~a addflt_~b)))) (.cse22 (= .cse55 addflt_~ea~0)) (.cse20 (= (bvadd .cse33 (_ bv4294967041 32)) (_ bv0 32))) (.cse49 (not (= (_ bv0 32) (bvlshr addflt_~mb~0 (bvadd addflt_~ea~0 (bvneg addflt_~eb~0)))))) (.cse6 (not .cse35)) (.cse29 (= (bvand (_ bv33554432 32) .cse32) (_ bv0 32))) (.cse39 (= (bvand (_ bv33554432 32) .cse42) (_ bv0 32))) (.cse13 (= addflt_~a |addflt_#in~a|)) (.cse4 (= addflt_~b |addflt_#in~b|)) (.cse11 (= (_ bv0 32) |addflt_#in~a|)) (.cse14 (and .cse1 (= addflt_~__retres10~0 |addflt_#in~b|))) (.cse0 (= addflt_~b |addflt_#in~a|)) (.cse31 (bvadd .cse27 .cse25)) (.cse23 (and .cse10 .cse54))) (let ((.cse17 (not (bvult |addflt_#in~b| |addflt_#in~a|))) (.cse21 (and .cse23 .cse53)) (.cse18 (= .cse31 addflt_~ma~0)) (.cse2 (or (and .cse13 .cse53 .cse4 .cse54) (and .cse11 .cse14 .cse0))) (.cse30 (= (bvor (bvand (_ bv16777215 32) .cse32) (bvshl .cse33 (_ bv24 32))) addflt_~__retres10~0)) (.cse28 (not .cse39)) (.cse19 (not .cse29)) (.cse9 (and (= .cse26 addflt_~mb~0) .cse3 .cse22 (exists ((addflt_~delta~0 (_ BitVec 32)) (addflt_~b (_ BitVec 32)) (addflt_~a (_ BitVec 32))) (= (bvadd (bvneg (bvlshr (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~b)) addflt_~delta~0)) addflt_~ma~0) (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) addflt_~a)))) (not (bvult addflt_~__retres10~0 |addflt_#in~a|)) .cse4 .cse20 .cse13 (or .cse49 .cse6))) (.cse5 (or (not (= (_ bv127 32) addflt_~ea~0)) .cse15 (and .cse52 (not (= (_ bv0 32) (bvand (_ bv33554432 32) (bvadd (bvlshr .cse7 (bvadd .cse8 (_ bv127 32))) .cse25))))))) (.cse12 (not .cse44))) (and (or (and .cse0 .cse1) .cse2 (and .cse3 .cse4 .cse5 .cse6 (= (bvlshr .cse7 (bvadd (bvlshr addflt_~a (_ bv24 32)) .cse8 (_ bv4294967168 32))) addflt_~mb~0)) .cse9) (or .cse10 (not .cse11)) (or .cse12 .cse13 .cse14) (let ((.cse16 (let ((.cse24 (= addflt_~mb~0 .cse27))) (or (and .cse22 .cse23 .cse24 (= .cse25 addflt_~ma~0)) (and (and (not (= .cse26 (_ bv0 32))) .cse10) .cse4 .cse24))))) (or (and (exists ((v_addflt_~ma~0_502 (_ BitVec 32))) (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) v_addflt_~ma~0_502) (bvshl (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv24 32))))) .cse15 .cse16) .cse17 (and .cse18 (or (not (bvult |addflt_#res| (_ bv4294967295 32))) .cse6) .cse16) (and .cse19 (not .cse20)) .cse21)) (or (or .cse15 .cse28) .cse17 .cse21 .cse20) (or (and .cse29 .cse30) (exists ((v_addflt_~ma~0_481 (_ BitVec 32))) (= (bvor (bvand (_ bv16777215 32) v_addflt_~ma~0_481) (bvshl (bvadd (bvlshr |addflt_#in~a| (_ bv24 32)) (_ bv1 32)) (_ bv24 32))) addflt_~__retres10~0)) .cse2 .cse1 (and .cse18 (= (bvadd addflt_~__retres10~0 (_ bv1 32)) (_ bv0 32)) (not (= (_ bv0 32) (bvand (_ bv33554432 32) .cse31))))) (let ((.cse47 (not .cse52))) (let ((.cse40 (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) .cse42) (bvshl .cse43 (_ bv24 32))))) (.cse37 (= .cse51 addflt_~mb~0)) (.cse36 (= .cse50 addflt_~ea~0)) (.cse34 (or .cse49 .cse47)) (.cse38 (bvlshr .cse25 (bvadd .cse48 addflt_~ea~0)))) (let ((.cse41 (let ((.cse45 (and .cse37 (let ((.cse46 (not (= (_ bv0 32) addflt_~b)))) (or (and .cse36 .cse46 .cse34 .cse1 (not (= (_ bv0 32) .cse38))) (and .cse47 .cse46 .cse12 .cse1)))))) (or (and .cse45 .cse5 .cse6) (and .cse45 .cse39 .cse36 .cse15 .cse40))))) (or (and (= (bvor (bvand (_ bv16777215 32) (bvlshr .cse32 (_ bv1 32))) (bvshl (bvadd .cse33 (_ bv1 32)) (_ bv24 32))) addflt_~__retres10~0) (= (bvadd .cse33 (_ bv4294967169 32)) addflt_~ea~0) .cse13) .cse2 (and .cse34 (not (bvult addflt_~__retres10~0 (_ bv4294967295 32))) .cse35 .cse36 .cse37 .cse28 (= (bvadd .cse7 .cse38) addflt_~ma~0)) (and .cse13 .cse30) (and (exists ((v_addflt_~ma~0_482 (_ BitVec 32))) (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) v_addflt_~ma~0_482) (bvshl (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv24 32))))) .cse15 .cse39 .cse36 .cse40 .cse41) (and (= addflt_~__retres10~0 (bvor (bvand (_ bv16777215 32) (bvlshr .cse42 (_ bv1 32))) (bvshl (bvadd .cse43 (_ bv1 32)) (_ bv24 32)))) (= (bvadd .cse43 (_ bv4294967169 32)) addflt_~ea~0) .cse28 (exists ((addflt_~ma~0 (_ BitVec 32))) (= addflt_~__retres10~0 (bvor addflt_~ma~0 (bvshl (bvadd (bvlshr |addflt_#in~b| (_ bv24 32)) (_ bv1 32)) (_ bv24 32))))) (or .cse19 .cse15) .cse41) (and (= .cse7 addflt_~ma~0) .cse44 .cse36 .cse37) .cse9)))) (or (not (= (_ bv4294967295 32) |addflt_#in~b|)) (= (_ bv127 32) addflt_~eb~0) (not (= (bvadd |addflt_#in~a| (_ bv1 32)) (_ bv0 32)))))))))))) [2018-12-08 08:51:57,015 INFO L448 ceAbstractionStarter]: For program point addfltEXIT(lines 73 136) no Hoare annotation was computed. [2018-12-08 08:51:57,015 INFO L448 ceAbstractionStarter]: For program point L84(lines 84 90) no Hoare annotation was computed. [2018-12-08 08:51:57,015 INFO L448 ceAbstractionStarter]: For program point L115(lines 115 126) no Hoare annotation was computed. [2018-12-08 08:51:57,015 INFO L448 ceAbstractionStarter]: For program point L84-2(lines 83 135) no Hoare annotation was computed. [2018-12-08 08:51:57,015 INFO L444 ceAbstractionStarter]: At program point L115-2(lines 115 126) the Hoare annotation is: (and (let ((.cse11 (bvlshr |addflt_#in~a| (_ bv24 32)))) (let ((.cse13 (bvlshr |addflt_#in~b| (_ bv24 32))) (.cse4 (bvadd .cse11 (_ bv4294967168 32)))) (let ((.cse1 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~a|))) (.cse19 (bvneg .cse4)) (.cse18 (bvadd .cse13 (_ bv4294967168 32)))) (let ((.cse9 (bvneg .cse18)) (.cse20 (bvlshr .cse1 (bvadd .cse13 .cse19 (_ bv4294967168 32)))) (.cse8 (bvor (_ bv16777216 32) (bvand (_ bv16777215 32) |addflt_#in~b|)))) (let ((.cse15 (bvadd .cse20 .cse8)) (.cse10 (bvadd (bvlshr .cse8 (bvadd .cse11 .cse9 (_ bv4294967168 32))) .cse1))) (let ((.cse2 (= (bvand (_ bv33554432 32) .cse10) (_ bv0 32))) (.cse3 (not (= (_ bv0 32) |addflt_#in~b|))) (.cse5 (= addflt_~b |addflt_#in~b|)) (.cse6 (= (bvlshr .cse8 (bvadd (bvlshr addflt_~a (_ bv24 32)) .cse9 (_ bv4294967168 32))) addflt_~mb~0)) (.cse7 (= addflt_~a |addflt_#in~a|)) (.cse17 (= (bvand (_ bv33554432 32) .cse15) (_ bv0 32))) (.cse12 (= addflt_~b |addflt_#in~a|)) (.cse14 (= addflt_~a |addflt_#in~b|)) (.cse16 (= .cse20 addflt_~mb~0))) (or (let ((.cse0 (bvlshr .cse8 (bvadd .cse9 addflt_~ea~0)))) (and (= (bvadd .cse0 .cse1) addflt_~ma~0) .cse2 .cse3 (= .cse4 addflt_~ea~0) (not (= (_ bv0 32) .cse0)) .cse5 .cse6 .cse7)) (and (not .cse2) .cse3 (= (bvlshr .cse10 (_ bv1 32)) addflt_~ma~0) (= (bvadd .cse11 (_ bv4294967169 32)) addflt_~ea~0) .cse5 (not (bvult addflt_~a addflt_~b)) .cse6 (not (= (bvadd .cse11 (_ bv4294967041 32)) (_ bv0 32))) .cse7) (and .cse12 (= (bvadd .cse13 (_ bv4294967169 32)) addflt_~ea~0) .cse14 (= (bvlshr .cse15 (_ bv1 32)) addflt_~ma~0) (not (= (bvadd .cse13 (_ bv4294967041 32)) (_ bv0 32))) .cse16 (not .cse17) (bvult addflt_~b addflt_~a)) (and .cse17 .cse12 .cse14 (= .cse18 addflt_~ea~0) .cse16 (not (= (_ bv0 32) (bvadd (bvneg .cse8) addflt_~ma~0))) (= (bvadd .cse8 (bvlshr .cse1 (bvadd .cse19 addflt_~ea~0))) addflt_~ma~0))))))))) (not (= (_ bv0 32) |addflt_#in~a|))) [2018-12-08 08:51:57,015 INFO L451 ceAbstractionStarter]: At program point __VERIFIER_assertENTRY(lines 5 10) the Hoare annotation is: true [2018-12-08 08:51:57,016 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertEXIT(lines 5 10) no Hoare annotation was computed. [2018-12-08 08:51:57,016 INFO L448 ceAbstractionStarter]: For program point L7(line 7) no Hoare annotation was computed. [2018-12-08 08:51:57,016 INFO L448 ceAbstractionStarter]: For program point L6(lines 6 8) no Hoare annotation was computed. [2018-12-08 08:51:57,016 INFO L448 ceAbstractionStarter]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 7) no Hoare annotation was computed. [2018-12-08 08:51:57,016 INFO L448 ceAbstractionStarter]: For program point L6-2(lines 5 10) no Hoare annotation was computed. [2018-12-08 08:51:57,025 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,026 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,026 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,026 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_502,QUANTIFIED] [2018-12-08 08:51:57,027 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_481,QUANTIFIED] [2018-12-08 08:51:57,028 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_482,QUANTIFIED] [2018-12-08 08:51:57,029 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-12-08 08:51:57,029 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,029 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,030 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,046 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,046 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,046 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,046 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_502,QUANTIFIED] [2018-12-08 08:51:57,047 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_481,QUANTIFIED] [2018-12-08 08:51:57,047 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_482,QUANTIFIED] [2018-12-08 08:51:57,048 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-12-08 08:51:57,048 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,048 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,048 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,054 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 08:51:57 BoogieIcfgContainer [2018-12-08 08:51:57,054 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 08:51:57,054 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 08:51:57,054 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 08:51:57,055 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 08:51:57,055 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 08:40:22" (3/4) ... [2018-12-08 08:51:57,058 INFO L144 WitnessPrinter]: Generating witness for correct program [2018-12-08 08:51:57,065 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ULTIMATE.init [2018-12-08 08:51:57,065 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure base2flt [2018-12-08 08:51:57,065 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure main [2018-12-08 08:51:57,065 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure addflt [2018-12-08 08:51:57,065 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure __VERIFIER_assert [2018-12-08 08:51:57,070 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 11 nodes and edges [2018-12-08 08:51:57,070 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2018-12-08 08:51:57,070 INFO L905 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2018-12-08 08:51:57,090 WARN L221 nessWitnessGenerator]: Not writing invariant because ACSL is forbidden: ((((((((((b == \old(a) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((0bv32 == \old(a) && ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)) && b == \old(a))) || (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (255bv32 == ~bvlshr64(\old(a), 24bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 127bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((((((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && !(0bv32 == \old(b)) && !~bvult64(a, b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))) && !~bvult64(__retres10, \old(a))) && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && a == \old(a)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)))) && (~bvult64(b, a) || !(0bv32 == \old(a)))) && ((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || a == \old(a)) || (((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)))) && (((((((\exists v_addflt_~ma~0_502 : bv32 :: __retres10 == ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_502), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32))) && 0bv32 == ~bvand64(33554432bv32, ma)) && ((((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvult64(b, a) && __retres10 == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma) || (((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvult64(b, a)) && b == \old(b)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))))) || !~bvult64(\old(b), \old(a))) || ((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && (!~bvult64(\result, 4294967295bv32) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32))) && ((((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvult64(b, a) && __retres10 == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma) || (((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvult64(b, a)) && b == \old(b)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)))))) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) || ((~bvult64(b, a) && __retres10 == \old(a)) && 0bv32 == \old(b)))) && ((((0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) || !~bvult64(\old(b), \old(a))) || ((~bvult64(b, a) && __retres10 == \old(a)) && 0bv32 == \old(b))) || ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && (((((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32 && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10) || (\exists v_addflt_~ma~0_481 : bv32 :: ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_481), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((0bv32 == \old(a) && ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)) && b == \old(a))) || ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b))) || ((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(__retres10, 1bv32) == 0bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && (((((((((~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10 && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967169bv32) == ea) && a == \old(a)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((0bv32 == \old(a) && ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)) && b == \old(a))) || (((((((!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32))) && !~bvult64(__retres10, 4294967295bv32)) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma)) || (a == \old(a) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || ((((((\exists v_addflt_~ma~0_482 : bv32 :: __retres10 == ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_482), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))) && 0bv32 == ~bvand64(33554432bv32, ma)) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))) && ((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (255bv32 == ~bvlshr64(\old(a), 24bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 127bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) || (((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && 0bv32 == ~bvand64(33554432bv32, ma)) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))))) || (((((__retres10 == ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967169bv32) == ea) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && (\exists addflt_~ma~0 : bv32 :: __retres10 == ~bvor32(addflt_~ma~0, ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)))) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma))) && ((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (255bv32 == ~bvlshr64(\old(a), 24bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 127bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) || (((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && 0bv32 == ~bvand64(33554432bv32, ma)) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))))) || (((~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))) == ma && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((((((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && !(0bv32 == \old(b)) && !~bvult64(a, b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))) && !~bvult64(__retres10, \old(a))) && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && a == \old(a)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32))))) && ((!(4294967295bv32 == \old(b)) || 127bv32 == eb) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) [2018-12-08 08:51:57,104 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_64f20af2-86c9-4897-8ece-9cf6cab53b5a/bin-2019/uautomizer/witness.graphml [2018-12-08 08:51:57,104 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 08:51:57,105 INFO L168 Benchmark]: Toolchain (without parser) took 695073.27 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.1 MB). Free memory was 943.4 MB in the beginning and 917.1 MB in the end (delta: 26.3 MB). Peak memory consumption was 168.4 MB. Max. memory is 11.5 GB. [2018-12-08 08:51:57,105 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 08:51:57,106 INFO L168 Benchmark]: CACSL2BoogieTranslator took 182.28 ms. Allocated memory is still 1.0 GB. Free memory was 943.4 MB in the beginning and 927.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-12-08 08:51:57,106 INFO L168 Benchmark]: Boogie Procedure Inliner took 14.54 ms. Allocated memory is still 1.0 GB. Free memory is still 927.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 08:51:57,106 INFO L168 Benchmark]: Boogie Preprocessor took 53.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 927.3 MB in the beginning and 1.1 GB in the end (delta: -208.8 MB). Peak memory consumption was 13.7 MB. Max. memory is 11.5 GB. [2018-12-08 08:51:57,106 INFO L168 Benchmark]: RCFGBuilder took 186.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 24.7 MB). Peak memory consumption was 24.7 MB. Max. memory is 11.5 GB. [2018-12-08 08:51:57,106 INFO L168 Benchmark]: TraceAbstraction took 694583.77 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 1.0 MB). Free memory was 1.1 GB in the beginning and 923.8 MB in the end (delta: 187.5 MB). Peak memory consumption was 343.1 MB. Max. memory is 11.5 GB. [2018-12-08 08:51:57,107 INFO L168 Benchmark]: Witness Printer took 49.96 ms. Allocated memory is still 1.2 GB. Free memory was 923.8 MB in the beginning and 917.1 MB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-12-08 08:51:57,108 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 182.28 ms. Allocated memory is still 1.0 GB. Free memory was 943.4 MB in the beginning and 927.3 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 14.54 ms. Allocated memory is still 1.0 GB. Free memory is still 927.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 53.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 927.3 MB in the beginning and 1.1 GB in the end (delta: -208.8 MB). Peak memory consumption was 13.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 186.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 24.7 MB). Peak memory consumption was 24.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 694583.77 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 1.0 MB). Free memory was 1.1 GB in the beginning and 923.8 MB in the end (delta: 187.5 MB). Peak memory consumption was 343.1 MB. Max. memory is 11.5 GB. * Witness Printer took 49.96 ms. Allocated memory is still 1.2 GB. Free memory was 923.8 MB in the beginning and 917.1 MB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_502,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_481,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_482,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_502,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_481,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_482,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 7]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 25]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 18]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 83]: Loop Invariant [2018-12-08 08:51:57,111 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_502,QUANTIFIED] [2018-12-08 08:51:57,112 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_481,QUANTIFIED] [2018-12-08 08:51:57,113 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_482,QUANTIFIED] [2018-12-08 08:51:57,113 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-12-08 08:51:57,113 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,113 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,113 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,116 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,117 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,117 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] [2018-12-08 08:51:57,117 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_502,QUANTIFIED] [2018-12-08 08:51:57,117 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_481,QUANTIFIED] [2018-12-08 08:51:57,118 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_addflt_~ma~0_482,QUANTIFIED] [2018-12-08 08:51:57,118 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~ma~0,QUANTIFIED] [2018-12-08 08:51:57,118 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~b,QUANTIFIED] [2018-12-08 08:51:57,118 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~delta~0,QUANTIFIED] [2018-12-08 08:51:57,118 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[addflt_~a,QUANTIFIED] Derived loop invariant: ((((((((((b == \old(a) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((0bv32 == \old(a) && ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)) && b == \old(a))) || (((((!(0bv32 == \old(b)) && !~bvult64(a, b)) && b == \old(b)) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (255bv32 == ~bvlshr64(\old(a), 24bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 127bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(a, 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((((((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && !(0bv32 == \old(b)) && !~bvult64(a, b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))) && !~bvult64(__retres10, \old(a))) && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && a == \old(a)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)))) && (~bvult64(b, a) || !(0bv32 == \old(a)))) && ((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) || a == \old(a)) || (((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)))) && (((((((\exists v_addflt_~ma~0_502 : bv32 :: __retres10 == ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_502), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32))) && 0bv32 == ~bvand64(33554432bv32, ma)) && ((((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvult64(b, a) && __retres10 == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma) || (((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvult64(b, a)) && b == \old(b)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))))) || !~bvult64(\old(b), \old(a))) || ((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && (!~bvult64(\result, 4294967295bv32) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32))) && ((((~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea && ~bvult64(b, a) && __retres10 == \old(a)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea))) && ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))) == ma) || (((!(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvult64(b, a)) && b == \old(b)) && mb == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)))))) || (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) && !(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32))) || ((~bvult64(b, a) && __retres10 == \old(a)) && 0bv32 == \old(b)))) && ((((0bv32 == ~bvand64(33554432bv32, ma) || !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) || !~bvult64(\old(b), \old(a))) || ((~bvult64(b, a) && __retres10 == \old(a)) && 0bv32 == \old(b))) || ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32)) && (((((~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32 && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10) || (\exists v_addflt_~ma~0_481 : bv32 :: ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_481), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((0bv32 == \old(a) && ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)) && b == \old(a))) || ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b))) || ((~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))) == ma && ~bvadd64(__retres10, 1bv32) == 0bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), ea)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && (((((((((~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(a), 24bv32), 1bv32), 24bv32)) == __retres10 && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967169bv32) == ea) && a == \old(a)) || (((a == \old(a) && 0bv32 == \old(b)) && b == \old(b)) && __retres10 == \old(a)) || ((0bv32 == \old(a) && ((~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && __retres10 == \old(b)) && b == \old(a))) || (((((((!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32))) && !~bvult64(__retres10, 4294967295bv32)) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && ~bvadd64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea))) == ma)) || (a == \old(a) && ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))), ~bvshl32(~bvlshr64(\old(a), 24bv32), 24bv32)) == __retres10)) || ((((((\exists v_addflt_~ma~0_482 : bv32 :: __retres10 == ~bvor32(~bvand64(16777215bv32, v_addflt_~ma~0_482), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))) && 0bv32 == ~bvand64(33554432bv32, ma)) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32))) && ((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (255bv32 == ~bvlshr64(\old(a), 24bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 127bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) || (((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && 0bv32 == ~bvand64(33554432bv32, ma)) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))))) || (((((__retres10 == ~bvor32(~bvand64(16777215bv32, ~bvlshr64(~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b)))), 1bv32)), ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967169bv32) == ea) && !(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32)) && (\exists addflt_~ma~0 : bv32 :: __retres10 == ~bvor32(addflt_~ma~0, ~bvshl32(~bvadd64(~bvlshr64(\old(b), 24bv32), 1bv32), 24bv32)))) && (!(~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))) == 0bv32) || 0bv32 == ~bvand64(33554432bv32, ma))) && ((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ((!(127bv32 == ea) || 0bv32 == ~bvand64(33554432bv32, ma)) || (255bv32 == ~bvlshr64(\old(a), 24bv32) && !(0bv32 == ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 127bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))))))))) && !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32)) || (((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && (((((~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea && !(0bv32 == b)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(255bv32 == ~bvlshr64(\old(a), 24bv32)))) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)) && !(0bv32 == ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), ea)))) || (((!(255bv32 == ~bvlshr64(\old(a), 24bv32)) && !(0bv32 == b)) && !(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32)) && (~bvult64(\old(a), \old(b)) && ~bvult64(b, a)) && a == \old(b)))) && ~bvand64(33554432bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && 0bv32 == ~bvand64(33554432bv32, ma)) && __retres10 == ~bvor32(~bvand64(16777215bv32, ~bvadd64(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)), ~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))))), ~bvshl32(~bvlshr64(\old(b), 24bv32), 24bv32)))))) || (((~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))) == ma && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == 0bv32) && ~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32) == ea) && ~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(a))), ~bvadd64(~bvlshr64(\old(b), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb)) || ((((((((~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, \old(b))), ~bvadd64(~bvlshr64(\old(a), 24bv32), ~bvneg32(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967168bv32)), 4294967168bv32)) == mb && !(0bv32 == \old(b)) && !~bvult64(a, b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967168bv32) == ea) && (\exists addflt_~delta~0 : bv32, addflt_~b : bv32, addflt_~a : bv32 :: ~bvadd64(~bvneg32(~bvlshr64(~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~b)), addflt_~delta~0)), ma) == ~bvor32(16777216bv32, ~bvand64(16777215bv32, addflt_~a)))) && !~bvult64(__retres10, \old(a))) && b == \old(b)) && ~bvadd64(~bvlshr64(\old(a), 24bv32), 4294967041bv32) == 0bv32) && a == \old(a)) && (!(0bv32 == ~bvlshr64(mb, ~bvadd64(ea, ~bvneg32(eb)))) || !(~bvadd64(~bvlshr64(\old(b), 24bv32), 4294967041bv32) == 0bv32))))) && ((!(4294967295bv32 == \old(b)) || 127bv32 == eb) || !(~bvadd64(\old(a), 1bv32) == 0bv32)) - InvariantResult [Line: 47]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 27]: Loop Invariant Derived loop invariant: 1 - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 1 error locations. SAFE Result, 694.5s OverallTime, 65 OverallIterations, 5 TraceHistogramMax, 179.8s AutomataDifference, 0.0s DeadEndRemovalTime, 407.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4738 SDtfs, 4446 SDslu, 44300 SDs, 0 SdLazy, 19810 SolverSat, 1769 SolverUnsat, 20 SolverUnknown, 0 SolverNotchecked, 84.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 8415 GetRequests, 6817 SyntacticMatches, 84 SemanticMatches, 1514 ConstructedPredicates, 0 IntricatePredicates, 2 DeprecatedPredicates, 5096 ImplicationChecksByTransitivity, 169.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=272occurred in iteration=23, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 1.2s AutomataMinimizationTime, 65 MinimizatonAttempts, 1006 StatesRemovedByMinimization, 61 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 20 LocationsWithAnnotation, 343 PreInvPairs, 990 NumberOfFragments, 3233 HoareAnnotationTreeSize, 343 FomulaSimplifications, 9848366174 FormulaSimplificationTreeSizeReduction, 2.8s HoareSimplificationTime, 20 FomulaSimplificationsInter, 150684040 FormulaSimplificationTreeSizeReductionInter, 404.2s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 7.3s SatisfiabilityAnalysisTime, 97.0s InterpolantComputationTime, 5249 NumberOfCodeBlocks, 5231 NumberOfCodeBlocksAsserted, 97 NumberOfCheckSat, 7554 ConstructedInterpolants, 168 QuantifiedInterpolants, 3711777 SizeOfPredicates, 823 NumberOfNonLiveVariables, 9360 ConjunctsInSsa, 1509 ConjunctsInUnsatCore, 114 InterpolantComputations, 19 PerfectInterpolantSequences, 3601/4256 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...