./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/transmitter.02_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/transmitter.02_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0c244c639ec9718adcbacffa967b748c52a23cd0 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 07:47:26,167 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 07:47:26,168 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 07:47:26,174 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 07:47:26,174 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 07:47:26,175 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 07:47:26,175 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 07:47:26,176 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 07:47:26,177 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 07:47:26,177 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 07:47:26,178 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 07:47:26,178 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 07:47:26,178 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 07:47:26,179 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 07:47:26,179 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 07:47:26,180 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 07:47:26,180 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 07:47:26,181 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 07:47:26,182 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 07:47:26,182 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 07:47:26,183 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 07:47:26,183 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 07:47:26,185 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 07:47:26,185 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 07:47:26,185 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 07:47:26,185 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 07:47:26,186 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 07:47:26,186 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 07:47:26,186 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 07:47:26,187 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 07:47:26,187 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 07:47:26,187 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 07:47:26,188 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 07:47:26,188 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 07:47:26,188 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 07:47:26,188 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 07:47:26,189 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf [2018-12-09 07:47:26,196 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 07:47:26,196 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 07:47:26,197 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 07:47:26,197 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 07:47:26,197 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 07:47:26,197 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2018-12-09 07:47:26,197 INFO L133 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Use old map elimination=false [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2018-12-09 07:47:26,198 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2018-12-09 07:47:26,198 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2018-12-09 07:47:26,199 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2018-12-09 07:47:26,199 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 07:47:26,199 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 07:47:26,200 INFO L133 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2018-12-09 07:47:26,200 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-12-09 07:47:26,200 INFO L133 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0c244c639ec9718adcbacffa967b748c52a23cd0 [2018-12-09 07:47:26,217 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 07:47:26,224 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 07:47:26,225 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 07:47:26,226 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 07:47:26,227 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 07:47:26,227 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/transmitter.02_false-unreach-call_false-termination.cil.c [2018-12-09 07:47:26,261 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/data/582e3575d/6f0b64d8ad7b41cb95b4258ef685da04/FLAGb6110863b [2018-12-09 07:47:26,704 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 07:47:26,705 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/sv-benchmarks/c/systemc/transmitter.02_false-unreach-call_false-termination.cil.c [2018-12-09 07:47:26,709 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/data/582e3575d/6f0b64d8ad7b41cb95b4258ef685da04/FLAGb6110863b [2018-12-09 07:47:26,717 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/data/582e3575d/6f0b64d8ad7b41cb95b4258ef685da04 [2018-12-09 07:47:26,719 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 07:47:26,720 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 07:47:26,720 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 07:47:26,720 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 07:47:26,722 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 07:47:26,723 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,724 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cdf4af6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26, skipping insertion in model container [2018-12-09 07:47:26,724 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,728 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 07:47:26,744 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 07:47:26,845 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 07:47:26,849 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 07:47:26,870 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 07:47:26,879 INFO L195 MainTranslator]: Completed translation [2018-12-09 07:47:26,879 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26 WrapperNode [2018-12-09 07:47:26,880 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 07:47:26,880 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 07:47:26,880 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 07:47:26,880 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 07:47:26,885 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,889 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,937 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 07:47:26,937 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 07:47:26,937 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 07:47:26,937 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 07:47:26,943 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,943 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,945 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,945 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,948 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,954 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,955 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... [2018-12-09 07:47:26,957 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 07:47:26,957 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 07:47:26,957 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 07:47:26,957 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 07:47:26,958 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:26,998 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 07:47:26,998 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 07:47:27,319 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 07:47:27,320 INFO L280 CfgBuilder]: Removed 94 assue(true) statements. [2018-12-09 07:47:27,320 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 07:47:27 BoogieIcfgContainer [2018-12-09 07:47:27,320 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 07:47:27,320 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2018-12-09 07:47:27,320 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2018-12-09 07:47:27,322 INFO L276 PluginConnector]: BuchiAutomizer initialized [2018-12-09 07:47:27,323 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-12-09 07:47:27,323 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.12 07:47:26" (1/3) ... [2018-12-09 07:47:27,324 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@12bdcd2e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.12 07:47:27, skipping insertion in model container [2018-12-09 07:47:27,324 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-12-09 07:47:27,324 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 07:47:26" (2/3) ... [2018-12-09 07:47:27,324 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@12bdcd2e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.12 07:47:27, skipping insertion in model container [2018-12-09 07:47:27,324 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-12-09 07:47:27,324 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 07:47:27" (3/3) ... [2018-12-09 07:47:27,325 INFO L375 chiAutomizerObserver]: Analyzing ICFG transmitter.02_false-unreach-call_false-termination.cil.c [2018-12-09 07:47:27,355 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 07:47:27,355 INFO L374 BuchiCegarLoop]: Interprodecural is true [2018-12-09 07:47:27,355 INFO L375 BuchiCegarLoop]: Hoare is false [2018-12-09 07:47:27,355 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2018-12-09 07:47:27,355 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 07:47:27,355 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 07:47:27,355 INFO L379 BuchiCegarLoop]: Difference is false [2018-12-09 07:47:27,355 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 07:47:27,355 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2018-12-09 07:47:27,366 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states. [2018-12-09 07:47:27,384 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 150 [2018-12-09 07:47:27,384 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,384 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,390 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,390 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,390 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ [2018-12-09 07:47:27,390 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states. [2018-12-09 07:47:27,394 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 150 [2018-12-09 07:47:27,394 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,394 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,395 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,395 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,400 INFO L794 eck$LassoCheckResult]: Stem: 157#ULTIMATE.startENTRYtrue ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 13#L-1true havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 184#L481true havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 130#L204true assume !(1 == ~m_i~0);~m_st~0 := 2; 185#L211-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 54#L216-1true assume !(1 == ~t2_i~0);~t2_st~0 := 2; 71#L221-1true assume !(0 == ~M_E~0); 180#L324-1true assume !(0 == ~T1_E~0); 18#L329-1true assume !(0 == ~T2_E~0); 68#L334-1true assume !(0 == ~E_1~0); 99#L339-1true assume !(0 == ~E_2~0); 146#L344-1true havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 122#L146true assume !(1 == ~m_pc~0); 116#L146-2true is_master_triggered_~__retres1~0 := 0; 123#L157true is_master_triggered_#res := is_master_triggered_~__retres1~0; 47#L158true activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 44#L395true assume !(0 != activate_threads_~tmp~1); 14#L395-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 141#L165true assume 1 == ~t1_pc~0; 69#L166true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 142#L176true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 70#L177true activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 50#L403true assume !(0 != activate_threads_~tmp___0~0); 55#L403-2true havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 176#L184true assume !(1 == ~t2_pc~0); 172#L184-2true is_transmit2_triggered_~__retres1~2 := 0; 177#L195true is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 110#L196true activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 80#L411true assume !(0 != activate_threads_~tmp___1~0); 63#L411-2true assume !(1 == ~M_E~0); 178#L357-1true assume !(1 == ~T1_E~0); 15#L362-1true assume !(1 == ~T2_E~0); 64#L367-1true assume !(1 == ~E_1~0); 95#L372-1true assume !(1 == ~E_2~0); 107#L518-1true [2018-12-09 07:47:27,400 INFO L796 eck$LassoCheckResult]: Loop: 107#L518-1true assume !false; 22#L519true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 19#L299true assume false; 136#L314true start_simulation_~kernel_st~0 := 2; 129#L204-1true start_simulation_~kernel_st~0 := 3; 181#L324-2true assume 0 == ~M_E~0;~M_E~0 := 1; 186#L324-4true assume 0 == ~T1_E~0;~T1_E~0 := 1; 25#L329-3true assume 0 == ~T2_E~0;~T2_E~0 := 1; 74#L334-3true assume 0 == ~E_1~0;~E_1~0 := 1; 105#L339-3true assume !(0 == ~E_2~0); 152#L344-3true havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 92#L146-9true assume 1 == ~m_pc~0; 34#L147-3true assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 113#L157-3true is_master_triggered_#res := is_master_triggered_~__retres1~0; 35#L158-3true activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 6#L395-9true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 11#L395-11true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 121#L165-9true assume !(1 == ~t1_pc~0); 114#L165-11true is_transmit1_triggered_~__retres1~1 := 0; 162#L176-3true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 85#L177-3true activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 48#L403-9true assume !(0 != activate_threads_~tmp___0~0); 21#L403-11true havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 140#L184-9true assume 1 == ~t2_pc~0; 98#L185-3true assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 171#L195-3true is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 100#L196-3true activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 52#L411-9true assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 59#L411-11true assume 1 == ~M_E~0;~M_E~0 := 2; 182#L357-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 23#L362-3true assume 1 == ~T2_E~0;~T2_E~0 := 2; 72#L367-3true assume !(1 == ~E_1~0); 103#L372-3true assume 1 == ~E_2~0;~E_2~0 := 2; 150#L377-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 127#L234-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 87#L251-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 5#L252-1true start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 115#L537true assume !(0 == start_simulation_~tmp~3); 118#L537-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 125#L234-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 109#L251-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3#L252-2true stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 183#L492true assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 76#L499true stop_simulation_#res := stop_simulation_~__retres2~0; 190#L500true start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 175#L550true assume !(0 != start_simulation_~tmp___0~1); 107#L518-1true [2018-12-09 07:47:27,403 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1765217540, now seen corresponding path program 1 times [2018-12-09 07:47:27,405 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,405 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,486 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:27,488 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:27,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,489 INFO L82 PathProgramCache]: Analyzing trace with hash 1231104429, now seen corresponding path program 1 times [2018-12-09 07:47:27,489 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,489 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,489 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,497 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,497 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 07:47:27,498 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:27,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:27,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:27,508 INFO L87 Difference]: Start difference. First operand 191 states. Second operand 3 states. [2018-12-09 07:47:27,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:27,525 INFO L93 Difference]: Finished difference Result 191 states and 286 transitions. [2018-12-09 07:47:27,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:27,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 191 states and 286 transitions. [2018-12-09 07:47:27,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 149 [2018-12-09 07:47:27,532 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 191 states to 186 states and 281 transitions. [2018-12-09 07:47:27,533 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2018-12-09 07:47:27,534 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2018-12-09 07:47:27,534 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 281 transitions. [2018-12-09 07:47:27,535 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:27,535 INFO L705 BuchiCegarLoop]: Abstraction has 186 states and 281 transitions. [2018-12-09 07:47:27,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 281 transitions. [2018-12-09 07:47:27,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-12-09 07:47:27,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-12-09 07:47:27,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 281 transitions. [2018-12-09 07:47:27,557 INFO L728 BuchiCegarLoop]: Abstraction has 186 states and 281 transitions. [2018-12-09 07:47:27,557 INFO L608 BuchiCegarLoop]: Abstraction has 186 states and 281 transitions. [2018-12-09 07:47:27,557 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ [2018-12-09 07:47:27,557 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 281 transitions. [2018-12-09 07:47:27,558 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 149 [2018-12-09 07:47:27,559 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,559 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,559 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,560 INFO L794 eck$LassoCheckResult]: Stem: 573#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 413#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 414#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 569#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 570#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 481#L216-1 assume !(1 == ~t2_i~0);~t2_st~0 := 2; 482#L221-1 assume !(0 == ~M_E~0); 508#L324-1 assume !(0 == ~T1_E~0); 427#L329-1 assume !(0 == ~T2_E~0); 428#L334-1 assume !(0 == ~E_1~0); 503#L339-1 assume !(0 == ~E_2~0); 543#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 563#L146 assume !(1 == ~m_pc~0); 469#L146-2 is_master_triggered_~__retres1~0 := 0; 470#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 471#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 467#L395 assume !(0 != activate_threads_~tmp~1); 415#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 416#L165 assume 1 == ~t1_pc~0; 504#L166 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 505#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 507#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 474#L403 assume !(0 != activate_threads_~tmp___0~0); 475#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 483#L184 assume !(1 == ~t2_pc~0); 556#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 555#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 557#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 521#L411 assume !(0 != activate_threads_~tmp___1~0); 494#L411-2 assume !(1 == ~M_E~0); 495#L357-1 assume !(1 == ~T1_E~0); 417#L362-1 assume !(1 == ~T2_E~0); 418#L367-1 assume !(1 == ~E_1~0); 499#L372-1 assume !(1 == ~E_2~0); 538#L518-1 [2018-12-09 07:47:27,560 INFO L796 eck$LassoCheckResult]: Loop: 538#L518-1 assume !false; 434#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 406#L299 assume !false; 429#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 530#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 490#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 399#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 400#L266 assume !(0 != eval_~tmp~0); 420#L314 start_simulation_~kernel_st~0 := 2; 566#L204-1 start_simulation_~kernel_st~0 := 3; 567#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 576#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 435#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 436#L334-3 assume 0 == ~E_1~0;~E_1~0 := 1; 510#L339-3 assume !(0 == ~E_2~0); 552#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 531#L146-9 assume !(1 == ~m_pc~0); 448#L146-11 is_master_triggered_~__retres1~0 := 0; 447#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 449#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 397#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 398#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 410#L165-9 assume 1 == ~t1_pc~0; 522#L166-3 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 523#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 525#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 472#L403-9 assume !(0 != activate_threads_~tmp___0~0); 425#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 426#L184-9 assume 1 == ~t2_pc~0; 539#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 540#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 542#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 476#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 477#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 488#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 430#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 431#L367-3 assume !(1 == ~E_1~0); 509#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 548#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 565#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 485#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 395#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 396#L537 assume !(0 == start_simulation_~tmp~3); 559#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 561#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 479#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 391#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 392#L492 assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 512#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 513#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 575#L550 assume !(0 != start_simulation_~tmp___0~1); 538#L518-1 [2018-12-09 07:47:27,560 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1063617666, now seen corresponding path program 1 times [2018-12-09 07:47:27,560 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,560 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,582 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:27,582 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:27,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,583 INFO L82 PathProgramCache]: Analyzing trace with hash -1036257152, now seen corresponding path program 1 times [2018-12-09 07:47:27,583 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:27,613 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:27,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:27,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:27,614 INFO L87 Difference]: Start difference. First operand 186 states and 281 transitions. cyclomatic complexity: 96 Second operand 3 states. [2018-12-09 07:47:27,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:27,623 INFO L93 Difference]: Finished difference Result 186 states and 280 transitions. [2018-12-09 07:47:27,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:27,624 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 280 transitions. [2018-12-09 07:47:27,625 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 149 [2018-12-09 07:47:27,626 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 280 transitions. [2018-12-09 07:47:27,627 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2018-12-09 07:47:27,627 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2018-12-09 07:47:27,627 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 280 transitions. [2018-12-09 07:47:27,627 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:27,628 INFO L705 BuchiCegarLoop]: Abstraction has 186 states and 280 transitions. [2018-12-09 07:47:27,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 280 transitions. [2018-12-09 07:47:27,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-12-09 07:47:27,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-12-09 07:47:27,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 280 transitions. [2018-12-09 07:47:27,632 INFO L728 BuchiCegarLoop]: Abstraction has 186 states and 280 transitions. [2018-12-09 07:47:27,632 INFO L608 BuchiCegarLoop]: Abstraction has 186 states and 280 transitions. [2018-12-09 07:47:27,632 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ [2018-12-09 07:47:27,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 280 transitions. [2018-12-09 07:47:27,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 149 [2018-12-09 07:47:27,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,633 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,633 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,634 INFO L794 eck$LassoCheckResult]: Stem: 952#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 792#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 793#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 947#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 948#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 860#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 861#L221-1 assume !(0 == ~M_E~0); 887#L324-1 assume !(0 == ~T1_E~0); 802#L329-1 assume !(0 == ~T2_E~0); 803#L334-1 assume !(0 == ~E_1~0); 882#L339-1 assume !(0 == ~E_2~0); 921#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 942#L146 assume !(1 == ~m_pc~0); 848#L146-2 is_master_triggered_~__retres1~0 := 0; 849#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 850#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 845#L395 assume !(0 != activate_threads_~tmp~1); 794#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 795#L165 assume 1 == ~t1_pc~0; 883#L166 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 884#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 886#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 852#L403 assume !(0 != activate_threads_~tmp___0~0); 853#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 862#L184 assume !(1 == ~t2_pc~0); 935#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 934#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 936#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 898#L411 assume !(0 != activate_threads_~tmp___1~0); 873#L411-2 assume !(1 == ~M_E~0); 874#L357-1 assume !(1 == ~T1_E~0); 796#L362-1 assume !(1 == ~T2_E~0); 797#L367-1 assume !(1 == ~E_1~0); 875#L372-1 assume !(1 == ~E_2~0); 915#L518-1 [2018-12-09 07:47:27,634 INFO L796 eck$LassoCheckResult]: Loop: 915#L518-1 assume !false; 809#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 785#L299 assume !false; 804#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 908#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 869#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 778#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 779#L266 assume !(0 != eval_~tmp~0); 799#L314 start_simulation_~kernel_st~0 := 2; 945#L204-1 start_simulation_~kernel_st~0 := 3; 946#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 955#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 814#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 815#L334-3 assume 0 == ~E_1~0;~E_1~0 := 1; 889#L339-3 assume !(0 == ~E_2~0); 931#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 910#L146-9 assume 1 == ~m_pc~0; 825#L147-3 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 826#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 828#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 776#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 777#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 789#L165-9 assume 1 == ~t1_pc~0; 901#L166-3 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 902#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 904#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 851#L403-9 assume !(0 != activate_threads_~tmp___0~0); 807#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 808#L184-9 assume 1 == ~t2_pc~0; 918#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 919#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 922#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 855#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 856#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 867#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 810#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 811#L367-3 assume !(1 == ~E_1~0); 888#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 927#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 944#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 864#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 774#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 775#L537 assume !(0 == start_simulation_~tmp~3); 938#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 940#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 858#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 770#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 771#L492 assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 891#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 892#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 954#L550 assume !(0 != start_simulation_~tmp___0~1); 915#L518-1 [2018-12-09 07:47:27,634 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,634 INFO L82 PathProgramCache]: Analyzing trace with hash -322585728, now seen corresponding path program 1 times [2018-12-09 07:47:27,634 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,634 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,662 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,662 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 07:47:27,662 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:27,662 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,662 INFO L82 PathProgramCache]: Analyzing trace with hash -2087706241, now seen corresponding path program 1 times [2018-12-09 07:47:27,662 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,662 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,663 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,687 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,687 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:27,687 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:27,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:27,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:27,688 INFO L87 Difference]: Start difference. First operand 186 states and 280 transitions. cyclomatic complexity: 95 Second operand 3 states. [2018-12-09 07:47:27,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:27,714 INFO L93 Difference]: Finished difference Result 309 states and 459 transitions. [2018-12-09 07:47:27,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:27,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 309 states and 459 transitions. [2018-12-09 07:47:27,715 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 271 [2018-12-09 07:47:27,716 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 309 states to 309 states and 459 transitions. [2018-12-09 07:47:27,717 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 309 [2018-12-09 07:47:27,717 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 309 [2018-12-09 07:47:27,717 INFO L73 IsDeterministic]: Start isDeterministic. Operand 309 states and 459 transitions. [2018-12-09 07:47:27,718 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:27,718 INFO L705 BuchiCegarLoop]: Abstraction has 309 states and 459 transitions. [2018-12-09 07:47:27,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states and 459 transitions. [2018-12-09 07:47:27,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 307. [2018-12-09 07:47:27,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-12-09 07:47:27,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 457 transitions. [2018-12-09 07:47:27,724 INFO L728 BuchiCegarLoop]: Abstraction has 307 states and 457 transitions. [2018-12-09 07:47:27,724 INFO L608 BuchiCegarLoop]: Abstraction has 307 states and 457 transitions. [2018-12-09 07:47:27,724 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ [2018-12-09 07:47:27,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 307 states and 457 transitions. [2018-12-09 07:47:27,725 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 269 [2018-12-09 07:47:27,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,725 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,725 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,726 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,726 INFO L794 eck$LassoCheckResult]: Stem: 1460#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 1294#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 1295#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1451#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 1452#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1361#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 1362#L221-1 assume !(0 == ~M_E~0); 1385#L324-1 assume !(0 == ~T1_E~0); 1309#L329-1 assume !(0 == ~T2_E~0); 1310#L334-1 assume !(0 == ~E_1~0); 1383#L339-1 assume !(0 == ~E_2~0); 1421#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1445#L146 assume !(1 == ~m_pc~0); 1349#L146-2 is_master_triggered_~__retres1~0 := 0; 1350#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1351#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 1347#L395 assume !(0 != activate_threads_~tmp~1); 1298#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1299#L165 assume !(1 == ~t1_pc~0); 1456#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 1457#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1384#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 1354#L403 assume !(0 != activate_threads_~tmp___0~0); 1355#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 1363#L184 assume !(1 == ~t2_pc~0); 1436#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 1435#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 1437#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 1399#L411 assume !(0 != activate_threads_~tmp___1~0); 1374#L411-2 assume !(1 == ~M_E~0); 1375#L357-1 assume !(1 == ~T1_E~0); 1300#L362-1 assume !(1 == ~T2_E~0); 1301#L367-1 assume !(1 == ~E_1~0); 1379#L372-1 assume !(1 == ~E_2~0); 1416#L518-1 [2018-12-09 07:47:27,726 INFO L796 eck$LassoCheckResult]: Loop: 1416#L518-1 assume !false; 1315#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 1287#L299 assume !false; 1304#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1407#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 1370#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1280#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 1281#L266 assume !(0 != eval_~tmp~0); 1297#L314 start_simulation_~kernel_st~0 := 2; 1448#L204-1 start_simulation_~kernel_st~0 := 3; 1449#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1465#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 1316#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 1317#L334-3 assume 0 == ~E_1~0;~E_1~0 := 1; 1387#L339-3 assume !(0 == ~E_2~0); 1431#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1409#L146-9 assume !(1 == ~m_pc~0); 1329#L146-11 is_master_triggered_~__retres1~0 := 0; 1328#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1330#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 1278#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 1279#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1291#L165-9 assume !(1 == ~t1_pc~0); 1444#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 1578#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1577#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 1576#L403-9 assume !(0 != activate_threads_~tmp___0~0); 1575#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 1574#L184-9 assume 1 == ~t2_pc~0; 1571#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 1569#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 1567#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 1565#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 1563#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 1560#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1558#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 1556#L367-3 assume !(1 == ~E_1~0); 1425#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 1426#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1447#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 1365#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1276#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 1277#L537 assume !(0 == start_simulation_~tmp~3); 1439#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1549#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 1433#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1272#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 1273#L492 assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 1389#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 1390#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 1463#L550 assume !(0 != start_simulation_~tmp___0~1); 1416#L518-1 [2018-12-09 07:47:27,726 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,726 INFO L82 PathProgramCache]: Analyzing trace with hash 854018591, now seen corresponding path program 1 times [2018-12-09 07:47:27,726 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,726 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:27,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:27,749 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,749 INFO L82 PathProgramCache]: Analyzing trace with hash -2007931839, now seen corresponding path program 1 times [2018-12-09 07:47:27,749 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,749 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,750 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,767 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:27,768 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:27,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:27,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:27,768 INFO L87 Difference]: Start difference. First operand 307 states and 457 transitions. cyclomatic complexity: 152 Second operand 3 states. [2018-12-09 07:47:27,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:27,813 INFO L93 Difference]: Finished difference Result 453 states and 669 transitions. [2018-12-09 07:47:27,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:27,813 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 453 states and 669 transitions. [2018-12-09 07:47:27,815 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 390 [2018-12-09 07:47:27,816 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 453 states to 453 states and 669 transitions. [2018-12-09 07:47:27,817 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 453 [2018-12-09 07:47:27,817 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 453 [2018-12-09 07:47:27,817 INFO L73 IsDeterministic]: Start isDeterministic. Operand 453 states and 669 transitions. [2018-12-09 07:47:27,818 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:27,818 INFO L705 BuchiCegarLoop]: Abstraction has 453 states and 669 transitions. [2018-12-09 07:47:27,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 453 states and 669 transitions. [2018-12-09 07:47:27,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 453 to 451. [2018-12-09 07:47:27,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 451 states. [2018-12-09 07:47:27,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 667 transitions. [2018-12-09 07:47:27,827 INFO L728 BuchiCegarLoop]: Abstraction has 451 states and 667 transitions. [2018-12-09 07:47:27,827 INFO L608 BuchiCegarLoop]: Abstraction has 451 states and 667 transitions. [2018-12-09 07:47:27,827 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ [2018-12-09 07:47:27,827 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 451 states and 667 transitions. [2018-12-09 07:47:27,829 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 388 [2018-12-09 07:47:27,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,830 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,830 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,830 INFO L794 eck$LassoCheckResult]: Stem: 2231#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 2060#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 2061#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2220#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 2221#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2129#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 2130#L221-1 assume !(0 == ~M_E~0); 2153#L324-1 assume !(0 == ~T1_E~0); 2070#L329-1 assume !(0 == ~T2_E~0); 2071#L334-1 assume 0 == ~E_1~0;~E_1~0 := 1; 2150#L339-1 assume !(0 == ~E_2~0); 2189#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2213#L146 assume !(1 == ~m_pc~0); 2117#L146-2 is_master_triggered_~__retres1~0 := 0; 2118#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2119#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 2114#L395 assume !(0 != activate_threads_~tmp~1); 2062#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2063#L165 assume !(1 == ~t1_pc~0); 2226#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 2227#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2152#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 2121#L403 assume !(0 != activate_threads_~tmp___0~0); 2122#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2131#L184 assume !(1 == ~t2_pc~0); 2203#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 2202#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2204#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 2166#L411 assume !(0 != activate_threads_~tmp___1~0); 2142#L411-2 assume !(1 == ~M_E~0); 2143#L357-1 assume !(1 == ~T1_E~0); 2064#L362-1 assume !(1 == ~T2_E~0); 2065#L367-1 assume 1 == ~E_1~0;~E_1~0 := 2; 2144#L372-1 assume !(1 == ~E_2~0); 2183#L518-1 [2018-12-09 07:47:27,831 INFO L796 eck$LassoCheckResult]: Loop: 2183#L518-1 assume !false; 2077#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 2053#L299 assume !false; 2072#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2176#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2175#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2046#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 2047#L266 assume !(0 != eval_~tmp~0); 2067#L314 start_simulation_~kernel_st~0 := 2; 2218#L204-1 start_simulation_~kernel_st~0 := 3; 2219#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2241#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 2082#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 2083#L334-3 assume 0 == ~E_1~0;~E_1~0 := 1; 2156#L339-3 assume !(0 == ~E_2~0); 2199#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2178#L146-9 assume !(1 == ~m_pc~0); 2096#L146-11 is_master_triggered_~__retres1~0 := 0; 2095#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2097#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 2044#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 2045#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2057#L165-9 assume !(1 == ~t1_pc~0); 2206#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 2207#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2172#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 2120#L403-9 assume !(0 != activate_threads_~tmp___0~0); 2075#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2076#L184-9 assume 1 == ~t2_pc~0; 2186#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 2187#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2190#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 2124#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 2125#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 2136#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2078#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 2079#L367-3 assume 1 == ~E_1~0;~E_1~0 := 2; 2154#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 2194#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2217#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2133#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2042#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 2043#L537 assume !(0 == start_simulation_~tmp~3); 2208#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2215#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2127#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2038#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 2039#L492 assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 2159#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 2160#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 2238#L550 assume !(0 != start_simulation_~tmp___0~1); 2183#L518-1 [2018-12-09 07:47:27,831 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,831 INFO L82 PathProgramCache]: Analyzing trace with hash 713469919, now seen corresponding path program 1 times [2018-12-09 07:47:27,831 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,831 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,844 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,844 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 07:47:27,844 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:27,844 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,844 INFO L82 PathProgramCache]: Analyzing trace with hash -728068161, now seen corresponding path program 1 times [2018-12-09 07:47:27,845 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,845 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,864 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,865 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 07:47:27,865 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:27,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:27,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:27,865 INFO L87 Difference]: Start difference. First operand 451 states and 667 transitions. cyclomatic complexity: 218 Second operand 3 states. [2018-12-09 07:47:27,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:27,883 INFO L93 Difference]: Finished difference Result 307 states and 445 transitions. [2018-12-09 07:47:27,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:27,883 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 307 states and 445 transitions. [2018-12-09 07:47:27,884 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 269 [2018-12-09 07:47:27,885 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 307 states to 307 states and 445 transitions. [2018-12-09 07:47:27,886 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 307 [2018-12-09 07:47:27,886 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 307 [2018-12-09 07:47:27,886 INFO L73 IsDeterministic]: Start isDeterministic. Operand 307 states and 445 transitions. [2018-12-09 07:47:27,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:27,887 INFO L705 BuchiCegarLoop]: Abstraction has 307 states and 445 transitions. [2018-12-09 07:47:27,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states and 445 transitions. [2018-12-09 07:47:27,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 307. [2018-12-09 07:47:27,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-12-09 07:47:27,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 445 transitions. [2018-12-09 07:47:27,892 INFO L728 BuchiCegarLoop]: Abstraction has 307 states and 445 transitions. [2018-12-09 07:47:27,892 INFO L608 BuchiCegarLoop]: Abstraction has 307 states and 445 transitions. [2018-12-09 07:47:27,892 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ [2018-12-09 07:47:27,892 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 307 states and 445 transitions. [2018-12-09 07:47:27,893 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 269 [2018-12-09 07:47:27,893 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:27,894 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:27,894 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,894 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:27,895 INFO L794 eck$LassoCheckResult]: Stem: 2996#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 2827#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 2828#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2984#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 2985#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2896#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 2897#L221-1 assume !(0 == ~M_E~0); 2920#L324-1 assume !(0 == ~T1_E~0); 2843#L329-1 assume !(0 == ~T2_E~0); 2844#L334-1 assume !(0 == ~E_1~0); 2918#L339-1 assume !(0 == ~E_2~0); 2954#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2977#L146 assume !(1 == ~m_pc~0); 2884#L146-2 is_master_triggered_~__retres1~0 := 0; 2885#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2886#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 2882#L395 assume !(0 != activate_threads_~tmp~1); 2831#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2832#L165 assume !(1 == ~t1_pc~0); 2991#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 2992#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2919#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 2889#L403 assume !(0 != activate_threads_~tmp___0~0); 2890#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2898#L184 assume !(1 == ~t2_pc~0); 2967#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 2966#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2968#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 2932#L411 assume !(0 != activate_threads_~tmp___1~0); 2910#L411-2 assume !(1 == ~M_E~0); 2911#L357-1 assume !(1 == ~T1_E~0); 2833#L362-1 assume !(1 == ~T2_E~0); 2834#L367-1 assume !(1 == ~E_1~0); 2914#L372-1 assume !(1 == ~E_2~0); 2949#L518-1 [2018-12-09 07:47:27,895 INFO L796 eck$LassoCheckResult]: Loop: 2949#L518-1 assume !false; 2849#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 2820#L299 assume !false; 2838#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2940#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2939#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2813#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 2814#L266 assume !(0 != eval_~tmp~0); 2830#L314 start_simulation_~kernel_st~0 := 2; 2981#L204-1 start_simulation_~kernel_st~0 := 3; 2982#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 3000#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 2850#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 2851#L334-3 assume !(0 == ~E_1~0); 2922#L339-3 assume !(0 == ~E_2~0); 2963#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2942#L146-9 assume !(1 == ~m_pc~0); 2864#L146-11 is_master_triggered_~__retres1~0 := 0; 2863#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2865#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 2811#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 2812#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2824#L165-9 assume !(1 == ~t1_pc~0); 2976#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 3051#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3050#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 3049#L403-9 assume !(0 != activate_threads_~tmp___0~0); 3048#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2990#L184-9 assume 1 == ~t2_pc~0; 2950#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 2951#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2953#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 2891#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 2892#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 3042#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3041#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 3040#L367-3 assume !(1 == ~E_1~0); 3039#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 3038#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3037#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 3034#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3033#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 2971#L537 assume !(0 == start_simulation_~tmp~3); 2972#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2974#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2894#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2805#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 2806#L492 assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 2924#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 2925#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 2999#L550 assume !(0 != start_simulation_~tmp___0~1); 2949#L518-1 [2018-12-09 07:47:27,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,895 INFO L82 PathProgramCache]: Analyzing trace with hash 854018591, now seen corresponding path program 2 times [2018-12-09 07:47:27,895 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,895 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:27,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:27,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:27,906 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:27,906 INFO L82 PathProgramCache]: Analyzing trace with hash 1257676159, now seen corresponding path program 1 times [2018-12-09 07:47:27,906 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:27,906 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:27,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,907 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:27,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:27,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:27,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:27,924 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:27,925 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 07:47:27,925 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:27,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 07:47:27,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 07:47:27,925 INFO L87 Difference]: Start difference. First operand 307 states and 445 transitions. cyclomatic complexity: 140 Second operand 5 states. [2018-12-09 07:47:27,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:27,991 INFO L93 Difference]: Finished difference Result 511 states and 726 transitions. [2018-12-09 07:47:27,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 07:47:27,992 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 511 states and 726 transitions. [2018-12-09 07:47:27,994 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 471 [2018-12-09 07:47:27,995 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 511 states to 511 states and 726 transitions. [2018-12-09 07:47:27,995 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 511 [2018-12-09 07:47:27,996 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 511 [2018-12-09 07:47:27,996 INFO L73 IsDeterministic]: Start isDeterministic. Operand 511 states and 726 transitions. [2018-12-09 07:47:27,996 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:27,996 INFO L705 BuchiCegarLoop]: Abstraction has 511 states and 726 transitions. [2018-12-09 07:47:27,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 511 states and 726 transitions. [2018-12-09 07:47:28,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 511 to 313. [2018-12-09 07:47:28,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 313 states. [2018-12-09 07:47:28,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 451 transitions. [2018-12-09 07:47:28,001 INFO L728 BuchiCegarLoop]: Abstraction has 313 states and 451 transitions. [2018-12-09 07:47:28,001 INFO L608 BuchiCegarLoop]: Abstraction has 313 states and 451 transitions. [2018-12-09 07:47:28,001 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ [2018-12-09 07:47:28,001 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 313 states and 451 transitions. [2018-12-09 07:47:28,002 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 275 [2018-12-09 07:47:28,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:28,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:28,003 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:28,003 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:28,003 INFO L794 eck$LassoCheckResult]: Stem: 3838#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 3662#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 3663#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 3820#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 3821#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 3730#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 3731#L221-1 assume !(0 == ~M_E~0); 3754#L324-1 assume !(0 == ~T1_E~0); 3672#L329-1 assume !(0 == ~T2_E~0); 3673#L334-1 assume !(0 == ~E_1~0); 3752#L339-1 assume !(0 == ~E_2~0); 3787#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3813#L146 assume !(1 == ~m_pc~0); 3717#L146-2 is_master_triggered_~__retres1~0 := 0; 3718#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3719#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 3714#L395 assume !(0 != activate_threads_~tmp~1); 3664#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3665#L165 assume !(1 == ~t1_pc~0); 3831#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 3832#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3753#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 3722#L403 assume !(0 != activate_threads_~tmp___0~0); 3723#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 3732#L184 assume !(1 == ~t2_pc~0); 3803#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 3802#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 3804#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 3765#L411 assume !(0 != activate_threads_~tmp___1~0); 3744#L411-2 assume !(1 == ~M_E~0); 3745#L357-1 assume !(1 == ~T1_E~0); 3666#L362-1 assume !(1 == ~T2_E~0); 3667#L367-1 assume !(1 == ~E_1~0); 3746#L372-1 assume !(1 == ~E_2~0); 3781#L518-1 [2018-12-09 07:47:28,003 INFO L796 eck$LassoCheckResult]: Loop: 3781#L518-1 assume !false; 3679#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 3654#L299 assume !false; 3674#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3774#L234 assume !(0 == ~m_st~0); 3837#L238 assume !(0 == ~t1_st~0); 3875#L242 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 3874#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3872#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 3861#L266 assume !(0 != eval_~tmp~0); 3862#L314 start_simulation_~kernel_st~0 := 2; 3869#L204-1 start_simulation_~kernel_st~0 := 3; 3868#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 3867#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 3866#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 3865#L334-3 assume !(0 == ~E_1~0); 3864#L339-3 assume !(0 == ~E_2~0); 3863#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3860#L146-9 assume !(1 == ~m_pc~0); 3858#L146-11 is_master_triggered_~__retres1~0 := 0; 3857#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3856#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 3855#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 3658#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3659#L165-9 assume !(1 == ~t1_pc~0); 3812#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 3841#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3842#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 3720#L403-9 assume !(0 != activate_threads_~tmp___0~0); 3721#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 3828#L184-9 assume 1 == ~t2_pc~0; 3829#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 3845#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 3846#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 3725#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 3726#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 3851#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3852#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 3755#L367-3 assume !(1 == ~E_1~0); 3756#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 3834#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3817#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 3734#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3643#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 3644#L537 assume !(0 == start_simulation_~tmp~3); 3807#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 3815#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 3728#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3639#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 3640#L492 assume !(0 != stop_simulation_~tmp~2);stop_simulation_~__retres2~0 := 1; 3759#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 3760#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 3848#L550 assume !(0 != start_simulation_~tmp___0~1); 3781#L518-1 [2018-12-09 07:47:28,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,004 INFO L82 PathProgramCache]: Analyzing trace with hash 854018591, now seen corresponding path program 3 times [2018-12-09 07:47:28,004 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,004 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:28,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,016 INFO L82 PathProgramCache]: Analyzing trace with hash 805723206, now seen corresponding path program 1 times [2018-12-09 07:47:28,016 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,016 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,017 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:28,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:28,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:28,047 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:28,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 07:47:28,047 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:28,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 07:47:28,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 07:47:28,047 INFO L87 Difference]: Start difference. First operand 313 states and 451 transitions. cyclomatic complexity: 140 Second operand 5 states. [2018-12-09 07:47:28,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:28,115 INFO L93 Difference]: Finished difference Result 912 states and 1302 transitions. [2018-12-09 07:47:28,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 07:47:28,115 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 912 states and 1302 transitions. [2018-12-09 07:47:28,118 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 868 [2018-12-09 07:47:28,120 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 912 states to 912 states and 1302 transitions. [2018-12-09 07:47:28,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 912 [2018-12-09 07:47:28,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 912 [2018-12-09 07:47:28,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 912 states and 1302 transitions. [2018-12-09 07:47:28,122 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:28,123 INFO L705 BuchiCegarLoop]: Abstraction has 912 states and 1302 transitions. [2018-12-09 07:47:28,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 912 states and 1302 transitions. [2018-12-09 07:47:28,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 912 to 319. [2018-12-09 07:47:28,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 319 states. [2018-12-09 07:47:28,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 319 states and 457 transitions. [2018-12-09 07:47:28,129 INFO L728 BuchiCegarLoop]: Abstraction has 319 states and 457 transitions. [2018-12-09 07:47:28,129 INFO L608 BuchiCegarLoop]: Abstraction has 319 states and 457 transitions. [2018-12-09 07:47:28,129 INFO L442 BuchiCegarLoop]: ======== Iteration 8============ [2018-12-09 07:47:28,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 319 states and 457 transitions. [2018-12-09 07:47:28,130 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 281 [2018-12-09 07:47:28,130 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:28,130 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:28,131 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:28,131 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:28,131 INFO L794 eck$LassoCheckResult]: Stem: 5076#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 4903#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 4904#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5061#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 5062#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 4969#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 4970#L221-1 assume !(0 == ~M_E~0); 4992#L324-1 assume !(0 == ~T1_E~0); 4917#L329-1 assume !(0 == ~T2_E~0); 4918#L334-1 assume !(0 == ~E_1~0); 4990#L339-1 assume !(0 == ~E_2~0); 5027#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5052#L146 assume !(1 == ~m_pc~0); 4957#L146-2 is_master_triggered_~__retres1~0 := 0; 4958#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4959#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 4955#L395 assume !(0 != activate_threads_~tmp~1); 4906#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4907#L165 assume !(1 == ~t1_pc~0); 5069#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 5070#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4991#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 4962#L403 assume !(0 != activate_threads_~tmp___0~0); 4963#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4971#L184 assume !(1 == ~t2_pc~0); 5042#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 5041#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 5043#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 5005#L411 assume !(0 != activate_threads_~tmp___1~0); 4982#L411-2 assume !(1 == ~M_E~0); 4983#L357-1 assume !(1 == ~T1_E~0); 4908#L362-1 assume !(1 == ~T2_E~0); 4909#L367-1 assume !(1 == ~E_1~0); 4986#L372-1 assume !(1 == ~E_2~0); 5022#L518-1 [2018-12-09 07:47:28,132 INFO L796 eck$LassoCheckResult]: Loop: 5022#L518-1 assume !false; 4921#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 4896#L299 assume !false; 4916#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 5013#L234 assume !(0 == ~m_st~0); 5107#L238 assume !(0 == ~t1_st~0); 5071#L242 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 5072#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 5122#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 5121#L266 assume !(0 != eval_~tmp~0); 5064#L314 start_simulation_~kernel_st~0 := 2; 5058#L204-1 start_simulation_~kernel_st~0 := 3; 5059#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 5084#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 4925#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 4926#L334-3 assume !(0 == ~E_1~0); 5097#L339-3 assume !(0 == ~E_2~0); 5096#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5095#L146-9 assume !(1 == ~m_pc~0); 5093#L146-11 is_master_triggered_~__retres1~0 := 0; 5092#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4938#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 4887#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 4888#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4900#L165-9 assume !(1 == ~t1_pc~0); 5046#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 5047#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5008#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 4960#L403-9 assume !(0 != activate_threads_~tmp___0~0); 4914#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4915#L184-9 assume !(1 == ~t2_pc~0); 5025#L184-11 is_transmit2_triggered_~__retres1~2 := 0; 5024#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 5026#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 4964#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 4965#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 4976#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4919#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 4920#L367-3 assume !(1 == ~E_1~0); 4993#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 5031#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 5057#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 4973#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 4885#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 4886#L537 assume !(0 == start_simulation_~tmp~3); 5048#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 5050#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 5112#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 5113#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 5128#L492 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4997#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 4998#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 5082#L550 assume !(0 != start_simulation_~tmp___0~1); 5022#L518-1 [2018-12-09 07:47:28,132 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,132 INFO L82 PathProgramCache]: Analyzing trace with hash 854018591, now seen corresponding path program 4 times [2018-12-09 07:47:28,132 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,132 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:28,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,143 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,143 INFO L82 PathProgramCache]: Analyzing trace with hash 1585644553, now seen corresponding path program 1 times [2018-12-09 07:47:28,143 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,143 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,144 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:28,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:28,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:28,176 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:28,176 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 07:47:28,177 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:28,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 07:47:28,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 07:47:28,177 INFO L87 Difference]: Start difference. First operand 319 states and 457 transitions. cyclomatic complexity: 140 Second operand 5 states. [2018-12-09 07:47:28,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:28,261 INFO L93 Difference]: Finished difference Result 861 states and 1217 transitions. [2018-12-09 07:47:28,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 07:47:28,261 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 861 states and 1217 transitions. [2018-12-09 07:47:28,263 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 780 [2018-12-09 07:47:28,265 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 861 states to 861 states and 1217 transitions. [2018-12-09 07:47:28,265 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 861 [2018-12-09 07:47:28,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 861 [2018-12-09 07:47:28,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 861 states and 1217 transitions. [2018-12-09 07:47:28,267 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-12-09 07:47:28,267 INFO L705 BuchiCegarLoop]: Abstraction has 861 states and 1217 transitions. [2018-12-09 07:47:28,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 861 states and 1217 transitions. [2018-12-09 07:47:28,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 861 to 343. [2018-12-09 07:47:28,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-12-09 07:47:28,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 481 transitions. [2018-12-09 07:47:28,272 INFO L728 BuchiCegarLoop]: Abstraction has 343 states and 481 transitions. [2018-12-09 07:47:28,272 INFO L608 BuchiCegarLoop]: Abstraction has 343 states and 481 transitions. [2018-12-09 07:47:28,272 INFO L442 BuchiCegarLoop]: ======== Iteration 9============ [2018-12-09 07:47:28,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 343 states and 481 transitions. [2018-12-09 07:47:28,273 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 302 [2018-12-09 07:47:28,273 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:28,273 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:28,274 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:28,274 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:28,274 INFO L794 eck$LassoCheckResult]: Stem: 6282#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 6096#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 6097#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 6268#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 6269#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 6166#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 6167#L221-1 assume !(0 == ~M_E~0); 6189#L324-1 assume !(0 == ~T1_E~0); 6105#L329-1 assume !(0 == ~T2_E~0); 6106#L334-1 assume !(0 == ~E_1~0); 6187#L339-1 assume !(0 == ~E_2~0); 6228#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6260#L146 assume !(1 == ~m_pc~0); 6153#L146-2 is_master_triggered_~__retres1~0 := 0; 6253#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6261#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 6150#L395 assume !(0 != activate_threads_~tmp~1); 6098#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6099#L165 assume !(1 == ~t1_pc~0); 6276#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 6277#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 6188#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 6158#L403 assume !(0 != activate_threads_~tmp___0~0); 6159#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 6168#L184 assume !(1 == ~t2_pc~0); 6242#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 6241#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 6243#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 6200#L411 assume !(0 != activate_threads_~tmp___1~0); 6179#L411-2 assume !(1 == ~M_E~0); 6180#L357-1 assume !(1 == ~T1_E~0); 6100#L362-1 assume !(1 == ~T2_E~0); 6101#L367-1 assume !(1 == ~E_1~0); 6181#L372-1 assume !(1 == ~E_2~0); 6220#L518-1 [2018-12-09 07:47:28,274 INFO L796 eck$LassoCheckResult]: Loop: 6220#L518-1 assume !false; 6112#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 6089#L299 assume !false; 6107#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6208#L234 assume !(0 == ~m_st~0); 6174#L238 assume !(0 == ~t1_st~0); 6176#L242 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 6279#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6403#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 6402#L266 assume !(0 != eval_~tmp~0); 6273#L314 start_simulation_~kernel_st~0 := 2; 6266#L204-1 start_simulation_~kernel_st~0 := 3; 6267#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 6291#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 6292#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 6191#L334-3 assume !(0 == ~E_1~0); 6192#L339-3 assume !(0 == ~E_2~0); 6238#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6280#L146-9 assume 1 == ~m_pc~0; 6129#L147-3 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 6130#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6248#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 6333#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 6081#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6093#L165-9 assume !(1 == ~t1_pc~0); 6249#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 6250#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 6205#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 6157#L403-9 assume !(0 != activate_threads_~tmp___0~0); 6110#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 6111#L184-9 assume 1 == ~t2_pc~0; 6225#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 6226#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 6229#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 6161#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 6162#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 6173#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 6113#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 6114#L367-3 assume !(1 == ~E_1~0); 6190#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 6233#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6265#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 6170#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6078#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 6079#L537 assume !(0 == start_simulation_~tmp~3); 6251#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6256#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 6164#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6074#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 6075#L492 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6194#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 6195#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 6289#L550 assume !(0 != start_simulation_~tmp___0~1); 6220#L518-1 [2018-12-09 07:47:28,274 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,275 INFO L82 PathProgramCache]: Analyzing trace with hash 854018591, now seen corresponding path program 5 times [2018-12-09 07:47:28,275 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,275 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:28,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,283 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,283 INFO L82 PathProgramCache]: Analyzing trace with hash -245785465, now seen corresponding path program 1 times [2018-12-09 07:47:28,283 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,283 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,284 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:28,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:28,294 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:28,294 INFO L82 PathProgramCache]: Analyzing trace with hash 1118136617, now seen corresponding path program 1 times [2018-12-09 07:47:28,294 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:28,294 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:28,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,295 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:28,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:28,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:28,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:28,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:28,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:28,531 WARN L180 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 113 DAG size of output: 100 [2018-12-09 07:47:28,599 INFO L216 LassoAnalysis]: Preferences: [2018-12-09 07:47:28,600 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-12-09 07:47:28,600 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-12-09 07:47:28,600 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-12-09 07:47:28,600 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-12-09 07:47:28,600 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,600 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-12-09 07:47:28,600 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-12-09 07:47:28,600 INFO L131 ssoRankerPreferences]: Filename of dumped script: transmitter.02_false-unreach-call_false-termination.cil.c_Iteration9_Loop [2018-12-09 07:47:28,600 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-12-09 07:47:28,600 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-12-09 07:47:28,616 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,625 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,626 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,630 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,633 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,633 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,635 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,635 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,641 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,645 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,646 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,648 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,649 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,657 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,660 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,661 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,662 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,662 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,664 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,665 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,666 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,667 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,669 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,670 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,671 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,675 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,676 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,678 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,679 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,682 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,683 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,686 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,688 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:28,874 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-12-09 07:47:28,874 INFO L412 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,878 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:28,878 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:28,885 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:28,885 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_exists_runnable_thread_~__retres1~3=1, ULTIMATE.start_stop_simulation_~tmp~2=1, ULTIMATE.start_exists_runnable_thread_#res=1} Honda state: {ULTIMATE.start_exists_runnable_thread_~__retres1~3=1, ULTIMATE.start_stop_simulation_~tmp~2=1, ULTIMATE.start_exists_runnable_thread_#res=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,904 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:28,904 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:28,906 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:28,906 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_start_simulation_~kernel_st~0=3} Honda state: {ULTIMATE.start_start_simulation_~kernel_st~0=3} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,922 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:28,922 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:28,925 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:28,925 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_activate_threads_~tmp___1~0=1, ULTIMATE.start_is_transmit2_triggered_#res=1, ULTIMATE.start_is_transmit2_triggered_~__retres1~2=1} Honda state: {ULTIMATE.start_activate_threads_~tmp___1~0=1, ULTIMATE.start_is_transmit2_triggered_#res=1, ULTIMATE.start_is_transmit2_triggered_~__retres1~2=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,941 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:28,941 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:28,943 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:28,943 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_~tmp_ndt_3~0=0} Honda state: {ULTIMATE.start_eval_~tmp_ndt_3~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,958 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:28,958 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:28,960 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:28,960 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_activate_threads_#t~ret5=0} Honda state: {ULTIMATE.start_activate_threads_#t~ret5=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:28,983 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:28,983 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:28,986 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:28,986 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~t1_pc~0=4} Honda state: {~t1_pc~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:29,009 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:29,010 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:29,013 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:29,013 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_start_simulation_#t~ret9=0} Honda state: {ULTIMATE.start_start_simulation_#t~ret9=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:29,036 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:29,036 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:29,039 INFO L445 LassoAnalysis]: Proved nontermination for one component. [2018-12-09 07:47:29,039 INFO L448 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~E_1~0=-5} Honda state: {~E_1~0=-5} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:29,053 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:29,053 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:29,070 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-12-09 07:47:29,070 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:29,090 INFO L452 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-12-09 07:47:29,092 INFO L216 LassoAnalysis]: Preferences: [2018-12-09 07:47:29,092 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-12-09 07:47:29,092 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-12-09 07:47:29,092 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-12-09 07:47:29,092 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-12-09 07:47:29,092 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:29,092 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-12-09 07:47:29,092 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-12-09 07:47:29,092 INFO L131 ssoRankerPreferences]: Filename of dumped script: transmitter.02_false-unreach-call_false-termination.cil.c_Iteration9_Loop [2018-12-09 07:47:29,092 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-12-09 07:47:29,092 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-12-09 07:47:29,094 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,101 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,102 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,103 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,109 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,110 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,111 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,112 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,117 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,118 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,120 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,123 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,124 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,125 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,133 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,134 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,137 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,138 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,141 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,142 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,143 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,146 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,147 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,148 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,150 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,157 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,161 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,164 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,165 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,169 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,170 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,173 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,175 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,344 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-12-09 07:47:29,347 INFO L497 LassoAnalysis]: Using template 'affine'. [2018-12-09 07:47:29,348 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,349 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,350 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,350 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,350 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,350 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,352 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,352 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,354 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,354 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,355 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,355 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,355 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,355 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,355 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,355 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,356 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,357 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,358 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,358 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,358 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,358 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,358 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,358 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,359 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,359 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,359 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,360 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,360 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,360 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,360 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,360 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,360 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,361 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,361 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,363 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,364 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,364 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,364 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,364 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,364 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,364 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,365 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,365 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,365 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,366 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,366 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,366 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,366 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,366 INFO L206 nArgumentSynthesizer]: 2 loop disjuncts [2018-12-09 07:47:29,367 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,367 INFO L402 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2018-12-09 07:47:29,367 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,368 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,368 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,368 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,369 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,369 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,369 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,369 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,369 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,369 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,370 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,370 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,370 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,370 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,371 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,371 INFO L206 nArgumentSynthesizer]: 2 loop disjuncts [2018-12-09 07:47:29,371 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,371 INFO L402 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2018-12-09 07:47:29,371 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,372 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,372 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,372 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,373 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,373 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,373 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,373 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,373 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,373 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,374 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,374 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,374 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,374 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,375 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,375 INFO L206 nArgumentSynthesizer]: 2 loop disjuncts [2018-12-09 07:47:29,375 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,375 INFO L402 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2018-12-09 07:47:29,375 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,377 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:29,378 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:29,378 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:29,378 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:29,378 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:29,378 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:29,379 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:29,379 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:29,379 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:29,381 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-12-09 07:47:29,382 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-12-09 07:47:29,382 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2018-12-09 07:47:29,384 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-12-09 07:47:29,384 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-12-09 07:47:29,384 INFO L518 LassoAnalysis]: Proved termination. [2018-12-09 07:47:29,385 INFO L520 LassoAnalysis]: Termination argument consisting of: Ranking function f(~M_E~0) = -1*~M_E~0 + 1 Supporting invariants [] [2018-12-09 07:47:29,386 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-12-09 07:47:29,410 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:29,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:29,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 07:47:29,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:29,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 07:47:29,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:29,460 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2018-12-09 07:47:29,461 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 343 states and 481 transitions. cyclomatic complexity: 140 Second operand 5 states. [2018-12-09 07:47:29,527 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 343 states and 481 transitions. cyclomatic complexity: 140. Second operand 5 states. Result 1151 states and 1620 transitions. Complement of second has 5 states. [2018-12-09 07:47:29,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2018-12-09 07:47:29,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-12-09 07:47:29,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 450 transitions. [2018-12-09 07:47:29,530 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 450 transitions. Stem has 34 letters. Loop has 53 letters. [2018-12-09 07:47:29,531 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-12-09 07:47:29,531 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 450 transitions. Stem has 87 letters. Loop has 53 letters. [2018-12-09 07:47:29,532 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-12-09 07:47:29,532 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 450 transitions. Stem has 34 letters. Loop has 106 letters. [2018-12-09 07:47:29,534 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-12-09 07:47:29,534 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1151 states and 1620 transitions. [2018-12-09 07:47:29,542 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 849 [2018-12-09 07:47:29,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1151 states to 1151 states and 1620 transitions. [2018-12-09 07:47:29,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 895 [2018-12-09 07:47:29,546 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 900 [2018-12-09 07:47:29,546 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1151 states and 1620 transitions. [2018-12-09 07:47:29,546 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:29,546 INFO L705 BuchiCegarLoop]: Abstraction has 1151 states and 1620 transitions. [2018-12-09 07:47:29,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1151 states and 1620 transitions. [2018-12-09 07:47:29,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1151 to 842. [2018-12-09 07:47:29,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 842 states. [2018-12-09 07:47:29,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 842 states to 842 states and 1185 transitions. [2018-12-09 07:47:29,556 INFO L728 BuchiCegarLoop]: Abstraction has 842 states and 1185 transitions. [2018-12-09 07:47:29,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:29,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:29,557 INFO L87 Difference]: Start difference. First operand 842 states and 1185 transitions. Second operand 3 states. [2018-12-09 07:47:29,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:29,584 INFO L93 Difference]: Finished difference Result 1384 states and 1899 transitions. [2018-12-09 07:47:29,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:29,585 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1384 states and 1899 transitions. [2018-12-09 07:47:29,589 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 922 [2018-12-09 07:47:29,592 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1384 states to 1384 states and 1899 transitions. [2018-12-09 07:47:29,592 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 970 [2018-12-09 07:47:29,592 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 970 [2018-12-09 07:47:29,593 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1384 states and 1899 transitions. [2018-12-09 07:47:29,593 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:29,593 INFO L705 BuchiCegarLoop]: Abstraction has 1384 states and 1899 transitions. [2018-12-09 07:47:29,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1384 states and 1899 transitions. [2018-12-09 07:47:29,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1384 to 1285. [2018-12-09 07:47:29,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1285 states. [2018-12-09 07:47:29,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1285 states to 1285 states and 1773 transitions. [2018-12-09 07:47:29,603 INFO L728 BuchiCegarLoop]: Abstraction has 1285 states and 1773 transitions. [2018-12-09 07:47:29,603 INFO L608 BuchiCegarLoop]: Abstraction has 1285 states and 1773 transitions. [2018-12-09 07:47:29,603 INFO L442 BuchiCegarLoop]: ======== Iteration 10============ [2018-12-09 07:47:29,604 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1285 states and 1773 transitions. [2018-12-09 07:47:29,607 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 856 [2018-12-09 07:47:29,607 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:29,607 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:29,607 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:29,607 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:29,608 INFO L794 eck$LassoCheckResult]: Stem: 10436#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 10121#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 10122#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 10410#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 10411#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 10233#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 10234#L221-1 assume !(0 == ~M_E~0); 10272#L324-1 assume !(0 == ~T1_E~0); 10133#L329-1 assume !(0 == ~T2_E~0); 10134#L334-1 assume !(0 == ~E_1~0); 10270#L339-1 assume !(0 == ~E_2~0); 10336#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 10397#L146 assume !(1 == ~m_pc~0); 10213#L146-2 is_master_triggered_~__retres1~0 := 0; 10384#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 10215#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 10209#L395 assume !(0 != activate_threads_~tmp~1); 10123#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 10124#L165 assume !(1 == ~t1_pc~0); 10424#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 10425#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 10271#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 10219#L403 assume !(0 != activate_threads_~tmp___0~0); 10220#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 10235#L184 assume !(1 == ~t2_pc~0); 10366#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 10365#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 10370#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 10290#L411 assume !(0 != activate_threads_~tmp___1~0); 10257#L411-2 assume !(1 == ~M_E~0); 10258#L357-1 assume !(1 == ~T1_E~0); 10125#L362-1 assume !(1 == ~T2_E~0); 10126#L367-1 assume !(1 == ~E_1~0); 10259#L372-1 assume 1 == ~E_2~0;~E_2~0 := 2; 10324#L518-1 [2018-12-09 07:47:29,608 INFO L796 eck$LassoCheckResult]: Loop: 10324#L518-1 assume !false; 10911#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 10905#L299 assume !false; 10903#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10901#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 10822#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10899#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 10895#L266 assume 0 != eval_~tmp~0; 10890#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 10813#L274 assume 0 != eval_~tmp_ndt_1~0;~m_st~0 := 1; 10883#L37 assume !(0 == ~m_pc~0); 10858#L40 assume 1 == ~m_pc~0; 10828#L41 assume !false; 10814#L57 ~m_pc~0 := 1;~m_st~0 := 2; 10805#L271 assume !(0 == ~t1_st~0); 10762#L285 assume !(0 == ~t2_st~0); 10759#L299 assume !false; 10751#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10752#L234 assume !(0 == ~m_st~0); 10743#L238 assume !(0 == ~t1_st~0); 10739#L242 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 10735#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10736#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 10711#L266 assume !(0 != eval_~tmp~0); 10713#L314 start_simulation_~kernel_st~0 := 2; 11198#L204-1 start_simulation_~kernel_st~0 := 3; 11197#L324-2 assume 0 == ~M_E~0;~M_E~0 := 1; 11196#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 11195#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 11194#L334-3 assume !(0 == ~E_1~0); 11193#L339-3 assume !(0 == ~E_2~0); 11192#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 11185#L146-9 assume 1 == ~m_pc~0; 11182#L147-3 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 11180#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 11176#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 11173#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 11171#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 11169#L165-9 assume !(1 == ~t1_pc~0); 11166#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 11164#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 11162#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 11160#L403-9 assume !(0 != activate_threads_~tmp___0~0); 11158#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 11156#L184-9 assume 1 == ~t2_pc~0; 11153#L185-3 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 11152#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 11151#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 11041#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 11040#L411-11 assume 1 == ~M_E~0;~M_E~0 := 2; 11039#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 11038#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 11036#L367-3 assume !(1 == ~E_1~0); 11034#L372-3 assume 1 == ~E_2~0;~E_2~0 := 2; 11032#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10999#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 10998#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10995#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 10992#L537 assume !(0 == start_simulation_~tmp~3); 10989#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10987#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 10959#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10984#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 10982#L492 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 10979#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 10977#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 10975#L550 assume !(0 != start_simulation_~tmp___0~1); 10324#L518-1 [2018-12-09 07:47:29,608 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:29,608 INFO L82 PathProgramCache]: Analyzing trace with hash 854018589, now seen corresponding path program 1 times [2018-12-09 07:47:29,608 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:29,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:29,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:29,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:29,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:29,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:29,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:29,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:29,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2018-12-09 07:47:29,622 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:29,622 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:29,623 INFO L82 PathProgramCache]: Analyzing trace with hash 396250083, now seen corresponding path program 1 times [2018-12-09 07:47:29,623 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:29,623 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:29,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:29,623 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:29,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:29,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:29,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:29,865 WARN L180 SmtUtils]: Spent 227.00 ms on a formula simplification. DAG size of input: 135 DAG size of output: 116 [2018-12-09 07:47:29,952 INFO L216 LassoAnalysis]: Preferences: [2018-12-09 07:47:29,952 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-12-09 07:47:29,952 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-12-09 07:47:29,952 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-12-09 07:47:29,952 INFO L127 ssoRankerPreferences]: Use exernal solver: true [2018-12-09 07:47:29,952 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:29,952 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-12-09 07:47:29,952 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-12-09 07:47:29,952 INFO L131 ssoRankerPreferences]: Filename of dumped script: transmitter.02_false-unreach-call_false-termination.cil.c_Iteration10_Loop [2018-12-09 07:47:29,953 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-12-09 07:47:29,953 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-12-09 07:47:29,955 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,958 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,965 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,966 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,967 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,969 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,970 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,973 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,976 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,978 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,980 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,981 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,983 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,987 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,990 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,992 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,993 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,994 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,995 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,996 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:29,998 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,003 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,005 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,007 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,011 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,015 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,017 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,021 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,023 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,028 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,029 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,031 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,032 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,212 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-12-09 07:47:30,213 INFO L412 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:30,217 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2018-12-09 07:47:30,217 INFO L163 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:30,235 INFO L151 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2018-12-09 07:47:30,235 INFO L163 nArgumentSynthesizer]: Using integer mode. [2018-12-09 07:47:30,255 INFO L452 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2018-12-09 07:47:30,257 INFO L216 LassoAnalysis]: Preferences: [2018-12-09 07:47:30,257 INFO L124 ssoRankerPreferences]: Compute integeral hull: false [2018-12-09 07:47:30,257 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true [2018-12-09 07:47:30,257 INFO L126 ssoRankerPreferences]: Term annotations enabled: false [2018-12-09 07:47:30,257 INFO L127 ssoRankerPreferences]: Use exernal solver: false [2018-12-09 07:47:30,257 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-12-09 07:47:30,257 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false [2018-12-09 07:47:30,257 INFO L130 ssoRankerPreferences]: Path of dumped script: [2018-12-09 07:47:30,257 INFO L131 ssoRankerPreferences]: Filename of dumped script: transmitter.02_false-unreach-call_false-termination.cil.c_Iteration10_Loop [2018-12-09 07:47:30,257 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank [2018-12-09 07:47:30,257 INFO L282 LassoAnalysis]: Starting lasso preprocessing... [2018-12-09 07:47:30,259 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,265 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,269 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,270 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,271 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,272 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,273 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,275 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,278 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,278 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,281 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,282 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,283 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,284 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,286 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,287 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,288 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,289 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,289 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,297 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,298 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,302 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,303 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,305 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,310 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,311 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,313 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,315 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,318 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,320 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,322 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,325 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,327 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2018-12-09 07:47:30,481 INFO L300 LassoAnalysis]: Preprocessing complete. [2018-12-09 07:47:30,481 INFO L497 LassoAnalysis]: Using template 'affine'. [2018-12-09 07:47:30,481 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,482 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,482 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,482 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,482 INFO L206 nArgumentSynthesizer]: 2 loop disjuncts [2018-12-09 07:47:30,482 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,482 INFO L402 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2018-12-09 07:47:30,482 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,485 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,485 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,485 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,486 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,486 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,486 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:30,486 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,486 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:30,486 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,487 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,488 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,488 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,488 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,488 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,488 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:30,488 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,489 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:30,489 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,489 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,489 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,490 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,490 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,490 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,490 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:30,490 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,490 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:30,491 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,491 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,491 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,492 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,492 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,492 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,492 INFO L206 nArgumentSynthesizer]: 2 loop disjuncts [2018-12-09 07:47:30,492 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,493 INFO L402 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2018-12-09 07:47:30,493 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,493 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,494 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,494 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,494 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,494 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,494 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:30,494 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,495 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:30,495 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,495 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,496 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,496 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,496 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,496 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,496 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:30,496 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,497 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:30,497 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,498 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. [2018-12-09 07:47:30,498 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2018-12-09 07:47:30,498 INFO L339 nArgumentSynthesizer]: Template has degree 0. [2018-12-09 07:47:30,498 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2018-12-09 07:47:30,499 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts [2018-12-09 07:47:30,499 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts [2018-12-09 07:47:30,499 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. [2018-12-09 07:47:30,499 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2018-12-09 07:47:30,499 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2018-12-09 07:47:30,501 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2018-12-09 07:47:30,502 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2018-12-09 07:47:30,502 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2018-12-09 07:47:30,503 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... [2018-12-09 07:47:30,503 INFO L440 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2018-12-09 07:47:30,503 INFO L518 LassoAnalysis]: Proved termination. [2018-12-09 07:47:30,503 INFO L520 LassoAnalysis]: Termination argument consisting of: Ranking function f(~T2_E~0) = -1*~T2_E~0 + 1 Supporting invariants [] [2018-12-09 07:47:30,503 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2018-12-09 07:47:30,510 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:30,520 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 07:47:30,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:30,536 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 07:47:30,549 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 07:47:30,549 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2018-12-09 07:47:30,549 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 1285 states and 1773 transitions. cyclomatic complexity: 494 Second operand 5 states. [2018-12-09 07:47:30,572 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 1285 states and 1773 transitions. cyclomatic complexity: 494. Second operand 5 states. Result 2285 states and 3154 transitions. Complement of second has 4 states. [2018-12-09 07:47:30,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2018-12-09 07:47:30,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-12-09 07:47:30,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 488 transitions. [2018-12-09 07:47:30,573 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 488 transitions. Stem has 34 letters. Loop has 67 letters. [2018-12-09 07:47:30,574 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-12-09 07:47:30,574 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 488 transitions. Stem has 101 letters. Loop has 67 letters. [2018-12-09 07:47:30,574 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-12-09 07:47:30,574 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 488 transitions. Stem has 34 letters. Loop has 134 letters. [2018-12-09 07:47:30,574 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2018-12-09 07:47:30,574 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2285 states and 3154 transitions. [2018-12-09 07:47:30,580 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1341 [2018-12-09 07:47:30,585 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2285 states to 2285 states and 3154 transitions. [2018-12-09 07:47:30,585 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1394 [2018-12-09 07:47:30,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1405 [2018-12-09 07:47:30,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2285 states and 3154 transitions. [2018-12-09 07:47:30,586 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:30,586 INFO L705 BuchiCegarLoop]: Abstraction has 2285 states and 3154 transitions. [2018-12-09 07:47:30,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2285 states and 3154 transitions. [2018-12-09 07:47:30,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2285 to 2274. [2018-12-09 07:47:30,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2274 states. [2018-12-09 07:47:30,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2274 states to 2274 states and 3133 transitions. [2018-12-09 07:47:30,603 INFO L728 BuchiCegarLoop]: Abstraction has 2274 states and 3133 transitions. [2018-12-09 07:47:30,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:30,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:30,603 INFO L87 Difference]: Start difference. First operand 2274 states and 3133 transitions. Second operand 3 states. [2018-12-09 07:47:30,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:30,623 INFO L93 Difference]: Finished difference Result 1285 states and 1726 transitions. [2018-12-09 07:47:30,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:30,624 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1285 states and 1726 transitions. [2018-12-09 07:47:30,629 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 856 [2018-12-09 07:47:30,633 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1285 states to 1285 states and 1726 transitions. [2018-12-09 07:47:30,633 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 904 [2018-12-09 07:47:30,634 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 904 [2018-12-09 07:47:30,634 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1285 states and 1726 transitions. [2018-12-09 07:47:30,634 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:30,634 INFO L705 BuchiCegarLoop]: Abstraction has 1285 states and 1726 transitions. [2018-12-09 07:47:30,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1285 states and 1726 transitions. [2018-12-09 07:47:30,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1285 to 1285. [2018-12-09 07:47:30,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1285 states. [2018-12-09 07:47:30,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1285 states to 1285 states and 1726 transitions. [2018-12-09 07:47:30,650 INFO L728 BuchiCegarLoop]: Abstraction has 1285 states and 1726 transitions. [2018-12-09 07:47:30,650 INFO L608 BuchiCegarLoop]: Abstraction has 1285 states and 1726 transitions. [2018-12-09 07:47:30,650 INFO L442 BuchiCegarLoop]: ======== Iteration 11============ [2018-12-09 07:47:30,650 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1285 states and 1726 transitions. [2018-12-09 07:47:30,654 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 856 [2018-12-09 07:47:30,655 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:30,655 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:30,655 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:30,655 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:30,656 INFO L794 eck$LassoCheckResult]: Stem: 17913#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 17573#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 17574#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 17877#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 17878#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 17694#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 17695#L221-1 assume !(0 == ~M_E~0); 17734#L324-1 assume !(0 == ~T1_E~0); 17599#L329-1 assume !(0 == ~T2_E~0); 17600#L334-1 assume !(0 == ~E_1~0); 17732#L339-1 assume !(0 == ~E_2~0); 17803#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 17857#L146 assume !(1 == ~m_pc~0); 17674#L146-2 is_master_triggered_~__retres1~0 := 0; 17845#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 17948#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 17672#L395 assume !(0 != activate_threads_~tmp~1); 17578#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 17579#L165 assume !(1 == ~t1_pc~0); 17890#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 17894#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 17733#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 17682#L403 assume !(0 != activate_threads_~tmp___0~0); 17683#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 17696#L184 assume !(1 == ~t2_pc~0); 17831#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 17929#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 17833#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 17760#L411 assume !(0 != activate_threads_~tmp___1~0); 17718#L411-2 assume !(1 == ~M_E~0); 17719#L357-1 assume !(1 == ~T1_E~0); 17580#L362-1 assume !(1 == ~T2_E~0); 17581#L367-1 assume !(1 == ~E_1~0); 17724#L372-1 assume !(1 == ~E_2~0); 17795#L518-1 assume !false; 18071#L519 [2018-12-09 07:47:30,656 INFO L796 eck$LassoCheckResult]: Loop: 18071#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 18530#L299 assume !false; 18528#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 18527#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 18368#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 18526#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 18211#L266 assume 0 != eval_~tmp~0; 18212#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 18387#L274 assume 0 != eval_~tmp_ndt_1~0;~m_st~0 := 1; 18386#L37 assume !(0 == ~m_pc~0); 18199#L40 assume 1 == ~m_pc~0; 18200#L41 assume !false; 18400#L57 ~m_pc~0 := 1;~m_st~0 := 2; 18395#L271 assume !(0 == ~t1_st~0); 18384#L285 assume !(0 == ~t2_st~0); 18375#L299 assume !false; 18371#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 18367#L234 assume !(0 == ~m_st~0); 18364#L238 assume !(0 == ~t1_st~0); 18361#L242 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 18359#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 18354#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 18350#L266 assume !(0 != eval_~tmp~0); 18349#L314 start_simulation_~kernel_st~0 := 2; 18348#L204-1 start_simulation_~kernel_st~0 := 3; 18339#L324-2 assume !(0 == ~M_E~0); 18265#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 18266#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 18257#L334-3 assume !(0 == ~E_1~0); 18258#L339-3 assume !(0 == ~E_2~0); 18312#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 18308#L146-9 assume 1 == ~m_pc~0; 18304#L147-3 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 18300#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 18294#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 18290#L395-9 assume !(0 != activate_threads_~tmp~1); 17543#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 17568#L165-9 assume !(1 == ~t1_pc~0); 17856#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 18314#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 18310#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 18306#L403-9 assume !(0 != activate_threads_~tmp___0~0); 18302#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 18298#L184-9 assume !(1 == ~t2_pc~0); 18292#L184-11 is_transmit2_triggered_~__retres1~2 := 0; 18288#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 18284#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 18273#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 18254#L411-11 assume !(1 == ~M_E~0); 18214#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 18213#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 18210#L367-3 assume !(1 == ~E_1~0); 18208#L372-3 assume !(1 == ~E_2~0); 18209#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 18201#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 18181#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 18222#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 17841#L537 assume !(0 == start_simulation_~tmp~3); 17842#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 18550#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 18416#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 18548#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 18546#L492 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 18540#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 18539#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 18538#L550 assume !(0 != start_simulation_~tmp___0~1); 18537#L518-1 assume !false; 18071#L519 [2018-12-09 07:47:30,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,656 INFO L82 PathProgramCache]: Analyzing trace with hash 704772710, now seen corresponding path program 1 times [2018-12-09 07:47:30,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:30,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:30,665 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,665 INFO L82 PathProgramCache]: Analyzing trace with hash -1009846684, now seen corresponding path program 1 times [2018-12-09 07:47:30,665 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,665 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:30,709 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 07:47:30,709 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:30,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 07:47:30,710 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:30,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 07:47:30,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 07:47:30,710 INFO L87 Difference]: Start difference. First operand 1285 states and 1726 transitions. cyclomatic complexity: 447 Second operand 6 states. [2018-12-09 07:47:30,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:30,802 INFO L93 Difference]: Finished difference Result 2138 states and 2823 transitions. [2018-12-09 07:47:30,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 07:47:30,802 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2138 states and 2823 transitions. [2018-12-09 07:47:30,808 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1312 [2018-12-09 07:47:30,812 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2138 states to 2138 states and 2823 transitions. [2018-12-09 07:47:30,812 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1462 [2018-12-09 07:47:30,813 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1462 [2018-12-09 07:47:30,813 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2138 states and 2823 transitions. [2018-12-09 07:47:30,813 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:30,813 INFO L705 BuchiCegarLoop]: Abstraction has 2138 states and 2823 transitions. [2018-12-09 07:47:30,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2138 states and 2823 transitions. [2018-12-09 07:47:30,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2138 to 1417. [2018-12-09 07:47:30,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1417 states. [2018-12-09 07:47:30,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1417 states to 1417 states and 1882 transitions. [2018-12-09 07:47:30,825 INFO L728 BuchiCegarLoop]: Abstraction has 1417 states and 1882 transitions. [2018-12-09 07:47:30,825 INFO L608 BuchiCegarLoop]: Abstraction has 1417 states and 1882 transitions. [2018-12-09 07:47:30,826 INFO L442 BuchiCegarLoop]: ======== Iteration 12============ [2018-12-09 07:47:30,826 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1417 states and 1882 transitions. [2018-12-09 07:47:30,829 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 901 [2018-12-09 07:47:30,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:30,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:30,829 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:30,829 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:30,830 INFO L794 eck$LassoCheckResult]: Stem: 21339#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 21013#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 21014#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 21312#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 21313#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 21128#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 21129#L221-1 assume !(0 == ~M_E~0); 21167#L324-1 assume !(0 == ~T1_E~0); 21038#L329-1 assume !(0 == ~T2_E~0); 21039#L334-1 assume !(0 == ~E_1~0); 21165#L339-1 assume !(0 == ~E_2~0); 21231#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 21292#L146 assume 1 == ~m_pc~0; 21107#L147 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 21109#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 21382#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 21381#L395 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 21019#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 21020#L165 assume !(1 == ~t1_pc~0); 21322#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 21323#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 21166#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 21116#L403 assume !(0 != activate_threads_~tmp___0~0); 21117#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 21130#L184 assume !(1 == ~t2_pc~0); 21256#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 21355#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 21260#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 21187#L411 assume !(0 != activate_threads_~tmp___1~0); 21152#L411-2 assume !(1 == ~M_E~0); 21153#L357-1 assume !(1 == ~T1_E~0); 21021#L362-1 assume !(1 == ~T2_E~0); 21022#L367-1 assume !(1 == ~E_1~0); 21158#L372-1 assume !(1 == ~E_2~0); 21221#L518-1 assume !false; 21040#L519 [2018-12-09 07:47:30,830 INFO L796 eck$LassoCheckResult]: Loop: 21040#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 20997#L299 assume !false; 21028#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 21205#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 21203#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 20985#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 20986#L266 assume 0 != eval_~tmp~0; 21369#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 20989#L274 assume 0 != eval_~tmp_ndt_1~0;~m_st~0 := 1; 20990#L37 assume !(0 == ~m_pc~0); 21001#L40 assume 1 == ~m_pc~0; 21002#L41 assume !false; 21334#L57 ~m_pc~0 := 1;~m_st~0 := 2; 21885#L271 assume !(0 == ~t1_st~0); 21827#L285 assume !(0 == ~t2_st~0); 21822#L299 assume !false; 21820#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 21817#L234 assume !(0 == ~m_st~0); 21815#L238 assume !(0 == ~t1_st~0); 21812#L242 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 21810#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 21808#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 21805#L266 assume !(0 != eval_~tmp~0); 21803#L314 start_simulation_~kernel_st~0 := 2; 21762#L204-1 start_simulation_~kernel_st~0 := 3; 21746#L324-2 assume !(0 == ~M_E~0); 21747#L324-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 21708#L329-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 21882#L334-3 assume !(0 == ~E_1~0); 21881#L339-3 assume !(0 == ~E_2~0); 21880#L344-3 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 21211#L146-9 assume 1 == ~m_pc~0; 21067#L147-3 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 21068#L157-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 21800#L158-3 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 21750#L395-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 21751#L395-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 21289#L165-9 assume !(1 == ~t1_pc~0); 21270#L165-11 is_transmit1_triggered_~__retres1~1 := 0; 21271#L176-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 21195#L177-3 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 21112#L403-9 assume !(0 != activate_threads_~tmp___0~0); 21034#L403-11 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 21035#L184-9 assume !(1 == ~t2_pc~0); 21224#L184-11 is_transmit2_triggered_~__retres1~2 := 0; 21342#L195-3 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 21227#L196-3 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 21228#L411-9 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 22184#L411-11 assume !(1 == ~M_E~0); 21365#L357-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 21042#L362-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 21043#L367-3 assume !(1 == ~E_1~0); 21168#L372-3 assume !(1 == ~E_2~0); 22181#L377-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 22180#L234-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 21845#L251-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 22172#L252-1 start_simulation_#t~ret8 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret8;havoc start_simulation_#t~ret8; 21560#L537 assume !(0 == start_simulation_~tmp~3); 21561#L537-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret7, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 22328#L234-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 21842#L251-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 22327#L252-2 stop_simulation_#t~ret7 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret7;havoc stop_simulation_#t~ret7; 22326#L492 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 22325#L499 stop_simulation_#res := stop_simulation_~__retres2~0; 22324#L500 start_simulation_#t~ret9 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret9;havoc start_simulation_#t~ret9; 22323#L550 assume !(0 != start_simulation_~tmp___0~1); 21253#L518-1 assume !false; 21040#L519 [2018-12-09 07:47:30,830 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,830 INFO L82 PathProgramCache]: Analyzing trace with hash 1613735523, now seen corresponding path program 1 times [2018-12-09 07:47:30,830 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,830 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:30,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:30,838 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:30,838 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 07:47:30,838 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:30,838 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,838 INFO L82 PathProgramCache]: Analyzing trace with hash -1284606298, now seen corresponding path program 1 times [2018-12-09 07:47:30,838 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,838 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:30,863 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 07:47:30,863 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:30,863 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 07:47:30,863 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-12-09 07:47:30,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:30,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:30,864 INFO L87 Difference]: Start difference. First operand 1417 states and 1882 transitions. cyclomatic complexity: 475 Second operand 3 states. [2018-12-09 07:47:30,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:30,879 INFO L93 Difference]: Finished difference Result 1488 states and 1956 transitions. [2018-12-09 07:47:30,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:30,879 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1488 states and 1956 transitions. [2018-12-09 07:47:30,884 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 901 [2018-12-09 07:47:30,888 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1488 states to 1488 states and 1956 transitions. [2018-12-09 07:47:30,889 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 999 [2018-12-09 07:47:30,889 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 999 [2018-12-09 07:47:30,889 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1488 states and 1956 transitions. [2018-12-09 07:47:30,890 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:30,890 INFO L705 BuchiCegarLoop]: Abstraction has 1488 states and 1956 transitions. [2018-12-09 07:47:30,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1488 states and 1956 transitions. [2018-12-09 07:47:30,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1488 to 1406. [2018-12-09 07:47:30,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1406 states. [2018-12-09 07:47:30,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1406 states to 1406 states and 1860 transitions. [2018-12-09 07:47:30,906 INFO L728 BuchiCegarLoop]: Abstraction has 1406 states and 1860 transitions. [2018-12-09 07:47:30,906 INFO L608 BuchiCegarLoop]: Abstraction has 1406 states and 1860 transitions. [2018-12-09 07:47:30,906 INFO L442 BuchiCegarLoop]: ======== Iteration 13============ [2018-12-09 07:47:30,906 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1406 states and 1860 transitions. [2018-12-09 07:47:30,909 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 901 [2018-12-09 07:47:30,909 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:30,910 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:30,910 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:30,910 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:30,910 INFO L794 eck$LassoCheckResult]: Stem: 24219#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 23924#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 23925#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 24195#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 24196#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 24035#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 24036#L221-1 assume !(0 == ~M_E~0); 24073#L324-1 assume !(0 == ~T1_E~0); 23948#L329-1 assume !(0 == ~T2_E~0); 23949#L334-1 assume !(0 == ~E_1~0); 24071#L339-1 assume !(0 == ~E_2~0); 24134#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 24181#L146 assume !(1 == ~m_pc~0); 24170#L146-2 is_master_triggered_~__retres1~0 := 0; 24171#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 24018#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 24017#L395 assume !(0 != activate_threads_~tmp~1); 23929#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 23930#L165 assume !(1 == ~t1_pc~0); 24205#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 24208#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 24072#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 24023#L403 assume !(0 != activate_threads_~tmp___0~0); 24024#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 24037#L184 assume !(1 == ~t2_pc~0); 24158#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 24232#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 24160#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 24094#L411 assume !(0 != activate_threads_~tmp___1~0); 24058#L411-2 assume !(1 == ~M_E~0); 24059#L357-1 assume !(1 == ~T1_E~0); 23931#L362-1 assume !(1 == ~T2_E~0); 23932#L367-1 assume !(1 == ~E_1~0); 24064#L372-1 assume !(1 == ~E_2~0); 24127#L518-1 assume !false; 24311#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 24644#L299 [2018-12-09 07:47:30,910 INFO L796 eck$LassoCheckResult]: Loop: 24644#L299 assume !false; 24643#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 24642#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 24641#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 24640#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 24639#L266 assume 0 != eval_~tmp~0; 24638#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 24637#L274 assume !(0 != eval_~tmp_ndt_1~0); 24636#L271 assume !(0 == ~t1_st~0); 24635#L285 assume !(0 == ~t2_st~0); 24644#L299 [2018-12-09 07:47:30,910 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,911 INFO L82 PathProgramCache]: Analyzing trace with hash 373117697, now seen corresponding path program 1 times [2018-12-09 07:47:30,911 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,911 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,911 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:30,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:30,920 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1206180399, now seen corresponding path program 1 times [2018-12-09 07:47:30,920 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,920 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:30,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:30,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:30,925 INFO L82 PathProgramCache]: Analyzing trace with hash 202160337, now seen corresponding path program 1 times [2018-12-09 07:47:30,925 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:30,925 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:30,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,925 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:30,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:30,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:30,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:30,938 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:30,938 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:30,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:30,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:30,985 INFO L87 Difference]: Start difference. First operand 1406 states and 1860 transitions. cyclomatic complexity: 464 Second operand 3 states. [2018-12-09 07:47:31,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:31,004 INFO L93 Difference]: Finished difference Result 2404 states and 3127 transitions. [2018-12-09 07:47:31,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:31,004 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2404 states and 3127 transitions. [2018-12-09 07:47:31,010 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 1386 [2018-12-09 07:47:31,018 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2404 states to 2404 states and 3127 transitions. [2018-12-09 07:47:31,018 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1650 [2018-12-09 07:47:31,019 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1650 [2018-12-09 07:47:31,019 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2404 states and 3127 transitions. [2018-12-09 07:47:31,019 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:31,019 INFO L705 BuchiCegarLoop]: Abstraction has 2404 states and 3127 transitions. [2018-12-09 07:47:31,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2404 states and 3127 transitions. [2018-12-09 07:47:31,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2404 to 2324. [2018-12-09 07:47:31,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2324 states. [2018-12-09 07:47:31,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 3023 transitions. [2018-12-09 07:47:31,043 INFO L728 BuchiCegarLoop]: Abstraction has 2324 states and 3023 transitions. [2018-12-09 07:47:31,043 INFO L608 BuchiCegarLoop]: Abstraction has 2324 states and 3023 transitions. [2018-12-09 07:47:31,043 INFO L442 BuchiCegarLoop]: ======== Iteration 14============ [2018-12-09 07:47:31,044 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2324 states and 3023 transitions. [2018-12-09 07:47:31,048 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 1336 [2018-12-09 07:47:31,048 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:31,049 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:31,049 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:31,049 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:31,049 INFO L794 eck$LassoCheckResult]: Stem: 28077#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 27741#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 27742#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 28031#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 28032#L211-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 27857#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 27858#L221-1 assume !(0 == ~M_E~0); 27895#L324-1 assume !(0 == ~T1_E~0); 28300#L329-1 assume !(0 == ~T2_E~0); 28299#L334-1 assume !(0 == ~E_1~0); 27960#L339-1 assume !(0 == ~E_2~0); 27961#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 28015#L146 assume !(1 == ~m_pc~0); 28005#L146-2 is_master_triggered_~__retres1~0 := 0; 28006#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 28016#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 27833#L395 assume !(0 != activate_threads_~tmp~1); 27834#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 28294#L165 assume !(1 == ~t1_pc~0); 28085#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 28044#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 27893#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 27894#L403 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 27846#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 27859#L184 assume !(1 == ~t2_pc~0); 28092#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 28093#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 28289#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 28288#L411 assume !(0 != activate_threads_~tmp___1~0); 28287#L411-2 assume !(1 == ~M_E~0); 28098#L357-1 assume !(1 == ~T1_E~0); 28099#L362-1 assume !(1 == ~T2_E~0); 28286#L367-1 assume !(1 == ~E_1~0); 27950#L372-1 assume !(1 == ~E_2~0); 27951#L518-1 assume !false; 28533#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 29726#L299 [2018-12-09 07:47:31,049 INFO L796 eck$LassoCheckResult]: Loop: 29726#L299 assume !false; 29724#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 29722#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 29720#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 29718#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 29716#L266 assume 0 != eval_~tmp~0; 29714#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 27721#L274 assume !(0 != eval_~tmp_ndt_1~0); 27723#L271 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet2;havoc eval_#t~nondet2; 29404#L288 assume !(0 != eval_~tmp_ndt_2~0); 29731#L285 assume !(0 == ~t2_st~0); 29726#L299 [2018-12-09 07:47:31,050 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,050 INFO L82 PathProgramCache]: Analyzing trace with hash 1658994561, now seen corresponding path program 1 times [2018-12-09 07:47:31,050 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,050 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,050 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:31,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:31,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:31,058 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:31,058 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 07:47:31,058 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-12-09 07:47:31,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1263010541, now seen corresponding path program 1 times [2018-12-09 07:47:31,058 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,058 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:31,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:31,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:31,110 INFO L87 Difference]: Start difference. First operand 2324 states and 3023 transitions. cyclomatic complexity: 714 Second operand 3 states. [2018-12-09 07:47:31,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:31,113 INFO L93 Difference]: Finished difference Result 1448 states and 1887 transitions. [2018-12-09 07:47:31,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:31,113 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1448 states and 1887 transitions. [2018-12-09 07:47:31,116 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 901 [2018-12-09 07:47:31,118 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1448 states to 1448 states and 1887 transitions. [2018-12-09 07:47:31,118 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 959 [2018-12-09 07:47:31,119 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 959 [2018-12-09 07:47:31,119 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1448 states and 1887 transitions. [2018-12-09 07:47:31,119 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:31,119 INFO L705 BuchiCegarLoop]: Abstraction has 1448 states and 1887 transitions. [2018-12-09 07:47:31,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states and 1887 transitions. [2018-12-09 07:47:31,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1448. [2018-12-09 07:47:31,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1448 states. [2018-12-09 07:47:31,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1448 states to 1448 states and 1887 transitions. [2018-12-09 07:47:31,132 INFO L728 BuchiCegarLoop]: Abstraction has 1448 states and 1887 transitions. [2018-12-09 07:47:31,132 INFO L608 BuchiCegarLoop]: Abstraction has 1448 states and 1887 transitions. [2018-12-09 07:47:31,132 INFO L442 BuchiCegarLoop]: ======== Iteration 15============ [2018-12-09 07:47:31,133 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1448 states and 1887 transitions. [2018-12-09 07:47:31,136 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 901 [2018-12-09 07:47:31,136 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:31,136 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:31,136 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:31,136 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:31,137 INFO L794 eck$LassoCheckResult]: Stem: 31825#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 31519#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 31520#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 31787#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 31788#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 31630#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 31631#L221-1 assume !(0 == ~M_E~0); 31664#L324-1 assume !(0 == ~T1_E~0); 31542#L329-1 assume !(0 == ~T2_E~0); 31543#L334-1 assume !(0 == ~E_1~0); 31662#L339-1 assume !(0 == ~E_2~0); 31726#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 31771#L146 assume !(1 == ~m_pc~0); 31761#L146-2 is_master_triggered_~__retres1~0 := 0; 31762#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 31612#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 31611#L395 assume !(0 != activate_threads_~tmp~1); 31523#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 31524#L165 assume !(1 == ~t1_pc~0); 31797#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 31804#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 31663#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 31620#L403 assume !(0 != activate_threads_~tmp___0~0); 31621#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 31632#L184 assume !(1 == ~t2_pc~0); 31751#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 31834#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 31753#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 31687#L411 assume !(0 != activate_threads_~tmp___1~0); 31649#L411-2 assume !(1 == ~M_E~0); 31650#L357-1 assume !(1 == ~T1_E~0); 31525#L362-1 assume !(1 == ~T2_E~0); 31526#L367-1 assume !(1 == ~E_1~0); 31655#L372-1 assume !(1 == ~E_2~0); 31719#L518-1 assume !false; 31548#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 31507#L299 [2018-12-09 07:47:31,137 INFO L796 eck$LassoCheckResult]: Loop: 31507#L299 assume !false; 31536#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 31704#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 31822#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 31495#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 31496#L266 assume 0 != eval_~tmp~0; 31521#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 31499#L274 assume !(0 != eval_~tmp_ndt_1~0); 31501#L271 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet2;havoc eval_#t~nondet2; 31527#L288 assume !(0 != eval_~tmp_ndt_2~0); 31505#L285 assume !(0 == ~t2_st~0); 31507#L299 [2018-12-09 07:47:31,137 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,137 INFO L82 PathProgramCache]: Analyzing trace with hash 373117697, now seen corresponding path program 2 times [2018-12-09 07:47:31,137 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,137 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:31,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,145 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,145 INFO L82 PathProgramCache]: Analyzing trace with hash 1263010541, now seen corresponding path program 2 times [2018-12-09 07:47:31,145 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,145 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,146 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:31,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,149 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,150 INFO L82 PathProgramCache]: Analyzing trace with hash 1971900397, now seen corresponding path program 1 times [2018-12-09 07:47:31,150 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,150 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,150 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:31,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 07:47:31,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 07:47:31,165 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 07:47:31,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 07:47:31,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 07:47:31,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 07:47:31,207 INFO L87 Difference]: Start difference. First operand 1448 states and 1887 transitions. cyclomatic complexity: 448 Second operand 3 states. [2018-12-09 07:47:31,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 07:47:31,225 INFO L93 Difference]: Finished difference Result 2534 states and 3268 transitions. [2018-12-09 07:47:31,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 07:47:31,226 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2534 states and 3268 transitions. [2018-12-09 07:47:31,231 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1595 [2018-12-09 07:47:31,236 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2534 states to 2534 states and 3268 transitions. [2018-12-09 07:47:31,236 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1674 [2018-12-09 07:47:31,236 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1674 [2018-12-09 07:47:31,237 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2534 states and 3268 transitions. [2018-12-09 07:47:31,237 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2018-12-09 07:47:31,237 INFO L705 BuchiCegarLoop]: Abstraction has 2534 states and 3268 transitions. [2018-12-09 07:47:31,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2534 states and 3268 transitions. [2018-12-09 07:47:31,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2534 to 2534. [2018-12-09 07:47:31,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2534 states. [2018-12-09 07:47:31,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2534 states to 2534 states and 3268 transitions. [2018-12-09 07:47:31,254 INFO L728 BuchiCegarLoop]: Abstraction has 2534 states and 3268 transitions. [2018-12-09 07:47:31,254 INFO L608 BuchiCegarLoop]: Abstraction has 2534 states and 3268 transitions. [2018-12-09 07:47:31,254 INFO L442 BuchiCegarLoop]: ======== Iteration 16============ [2018-12-09 07:47:31,254 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2534 states and 3268 transitions. [2018-12-09 07:47:31,259 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 1595 [2018-12-09 07:47:31,259 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-12-09 07:47:31,259 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-12-09 07:47:31,259 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:31,259 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 07:47:31,260 INFO L794 eck$LassoCheckResult]: Stem: 35813#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2; 35508#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 35509#L481 havoc start_simulation_#t~ret8, start_simulation_#t~ret9, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 35779#L204 assume 1 == ~m_i~0;~m_st~0 := 0; 35780#L211-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 35625#L216-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 35626#L221-1 assume !(0 == ~M_E~0); 35661#L324-1 assume !(0 == ~T1_E~0); 35521#L329-1 assume !(0 == ~T2_E~0); 35522#L334-1 assume !(0 == ~E_1~0); 35659#L339-1 assume !(0 == ~E_2~0); 35718#L344-1 havoc activate_threads_#t~ret4, activate_threads_#t~ret5, activate_threads_#t~ret6, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 35765#L146 assume !(1 == ~m_pc~0); 35757#L146-2 is_master_triggered_~__retres1~0 := 0; 35758#L157 is_master_triggered_#res := is_master_triggered_~__retres1~0; 35606#L158 activate_threads_#t~ret4 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret4;havoc activate_threads_#t~ret4; 35603#L395 assume !(0 != activate_threads_~tmp~1); 35510#L395-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 35511#L165 assume !(1 == ~t1_pc~0); 35790#L165-2 is_transmit1_triggered_~__retres1~1 := 0; 35791#L176 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 35660#L177 activate_threads_#t~ret5 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret5;havoc activate_threads_#t~ret5; 35611#L403 assume !(0 != activate_threads_~tmp___0~0); 35612#L403-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 35627#L184 assume !(1 == ~t2_pc~0); 35745#L184-2 is_transmit2_triggered_~__retres1~2 := 0; 35823#L195 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 35747#L196 activate_threads_#t~ret6 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 35680#L411 assume !(0 != activate_threads_~tmp___1~0); 35646#L411-2 assume !(1 == ~M_E~0); 35647#L357-1 assume !(1 == ~T1_E~0); 35512#L362-1 assume !(1 == ~T2_E~0); 35513#L367-1 assume !(1 == ~E_1~0); 35648#L372-1 assume !(1 == ~E_2~0); 35710#L518-1 assume !false; 35535#L519 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret0, eval_#t~nondet1, eval_~tmp_ndt_1~0, eval_#t~nondet2, eval_~tmp_ndt_2~0, eval_#t~nondet3, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 35536#L299 [2018-12-09 07:47:31,260 INFO L796 eck$LassoCheckResult]: Loop: 35536#L299 assume !false; 37927#L262 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 37925#L234 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 37923#L251 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 37921#L252 eval_#t~ret0 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret0;havoc eval_#t~ret0; 37920#L266 assume 0 != eval_~tmp~0; 35832#L266-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet1;havoc eval_#t~nondet1; 35489#L274 assume !(0 != eval_~tmp_ndt_1~0); 35491#L271 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet2;havoc eval_#t~nondet2; 37918#L288 assume !(0 != eval_~tmp_ndt_2~0); 37916#L285 assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 37907#L302 assume !(0 != eval_~tmp_ndt_3~0); 35536#L299 [2018-12-09 07:47:31,260 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,260 INFO L82 PathProgramCache]: Analyzing trace with hash 373117697, now seen corresponding path program 3 times [2018-12-09 07:47:31,260 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,260 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:31,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,281 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,281 INFO L82 PathProgramCache]: Analyzing trace with hash 498620433, now seen corresponding path program 1 times [2018-12-09 07:47:31,281 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,282 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,282 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 07:47:31,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,286 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 07:47:31,286 INFO L82 PathProgramCache]: Analyzing trace with hash 999369489, now seen corresponding path program 1 times [2018-12-09 07:47:31,286 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 07:47:31,286 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 07:47:31,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 07:47:31,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 07:47:31,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 07:47:31,477 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.12 07:47:31 BoogieIcfgContainer [2018-12-09 07:47:31,477 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2018-12-09 07:47:31,478 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 07:47:31,478 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 07:47:31,478 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 07:47:31,478 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 07:47:27" (3/4) ... [2018-12-09 07:47:31,480 INFO L141 WitnessPrinter]: Generating witness for non-termination counterexample [2018-12-09 07:47:31,511 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_6500e419-c4b9-4e0a-81b3-3a5b149f8be1/bin-2019/uautomizer/witness.graphml [2018-12-09 07:47:31,511 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 07:47:31,511 INFO L168 Benchmark]: Toolchain (without parser) took 4791.91 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 277.3 MB). Free memory was 956.0 MB in the beginning and 1.2 GB in the end (delta: -231.2 MB). Peak memory consumption was 46.1 MB. Max. memory is 11.5 GB. [2018-12-09 07:47:31,512 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 07:47:31,512 INFO L168 Benchmark]: CACSL2BoogieTranslator took 159.47 ms. Allocated memory is still 1.0 GB. Free memory was 956.0 MB in the beginning and 938.8 MB in the end (delta: 17.2 MB). Peak memory consumption was 17.2 MB. Max. memory is 11.5 GB. [2018-12-09 07:47:31,512 INFO L168 Benchmark]: Boogie Procedure Inliner took 57.02 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.8 MB in the beginning and 1.1 GB in the end (delta: -161.6 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. [2018-12-09 07:47:31,512 INFO L168 Benchmark]: Boogie Preprocessor took 19.83 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 07:47:31,512 INFO L168 Benchmark]: RCFGBuilder took 362.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. [2018-12-09 07:47:31,513 INFO L168 Benchmark]: BuchiAutomizer took 4156.96 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 171.4 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -147.4 MB). Peak memory consumption was 24.0 MB. Max. memory is 11.5 GB. [2018-12-09 07:47:31,513 INFO L168 Benchmark]: Witness Printer took 33.28 ms. Allocated memory is still 1.3 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 11.5 GB. [2018-12-09 07:47:31,514 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 159.47 ms. Allocated memory is still 1.0 GB. Free memory was 956.0 MB in the beginning and 938.8 MB in the end (delta: 17.2 MB). Peak memory consumption was 17.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 57.02 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.8 MB in the beginning and 1.1 GB in the end (delta: -161.6 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 19.83 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 362.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 4156.96 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 171.4 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -147.4 MB). Peak memory consumption was 24.0 MB. Max. memory is 11.5 GB. * Witness Printer took 33.28 ms. Allocated memory is still 1.3 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 17 terminating modules (15 trivial, 2 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -1 * M_E + 1 and consists of 3 locations. One deterministic module has affine ranking function -1 * T2_E + 1 and consists of 3 locations. 15 modules have a trivial ranking function, the largest among these consists of 6 locations. The remainder module has 2534 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.1s and 16 iterations. TraceHistogramMax:2. Analysis of lassos took 2.9s. Construction of modules took 0.3s. Büchi inclusion checks took 0.4s. Highest rank in rank-based complementation 3. Minimization of det autom 8. Minimization of nondet autom 9. Automata minimization 0.1s AutomataMinimizationTime, 17 MinimizatonAttempts, 2615 StatesRemovedByMinimization, 11 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 2534 states and ocurred in iteration 15. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 6/6 HoareTripleCheckerStatistics: 5558 SDtfs, 5877 SDslu, 6268 SDs, 0 SdLazy, 475 SolverSat, 150 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.3s Time LassoAnalysisResults: nont1 unkn0 SFLI5 SFLT0 conc2 concLT1 SILN1 SILU0 SILI5 SILT1 lasso0 LassoPreprocessingBenchmarks: Lassos: inital119 mio100 ax100 hnf100 lsp9 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq209 hnf86 smp100 dnf189 smp63 tf108 neg92 sie116 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 2ms VariablesStem: 0 VariablesLoop: 1 DisjunctsStem: 1 DisjunctsLoop: 2 SupportingInvariants: 0 MotzkinApplications: 4 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 8 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 2 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.1s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 261]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@39872d3f=0, tmp=1, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4bee9d38=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@43a008ae=0, T2_E=2, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4ad67d83=0, kernel_st=1, __retres1=0, tmp___0=0, t2_st=0, t1_pc=0, E_2=2, __retres1=1, T1_E=2, \result=0, E_1=2, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@8e79938=0, tmp_ndt_1=0, M_E=2, tmp_ndt_2=0, tmp=0, tmp_ndt_3=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@35b0425=0, __retres1=0, t2_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4c02ad71=0, m_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@72373889=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6edb48af=0, t1_st=0, \result=0, t2_pc=0, m_st=0, tmp___1=0, tmp___0=0, tmp=0, __retres1=0, t1_i=1, m_pc=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 261]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; [L563] int __retres1 ; [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 [L211] COND TRUE m_i == 1 [L212] m_st = 0 [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 [L324] COND FALSE !(M_E == 0) [L329] COND FALSE !(T1_E == 0) [L334] COND FALSE !(T2_E == 0) [L339] COND FALSE !(E_1 == 0) [L344] COND FALSE !(E_2 == 0) [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; [L146] COND FALSE !(m_pc == 1) [L156] __retres1 = 0 [L158] return (__retres1); [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) [L162] int __retres1 ; [L165] COND FALSE !(t1_pc == 1) [L175] __retres1 = 0 [L177] return (__retres1); [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) [L181] int __retres1 ; [L184] COND FALSE !(t2_pc == 1) [L194] __retres1 = 0 [L196] return (__retres1); [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) [L357] COND FALSE !(M_E == 1) [L362] COND FALSE !(T1_E == 1) [L367] COND FALSE !(T2_E == 1) [L372] COND FALSE !(E_1 == 1) [L377] COND FALSE !(E_2 == 1) [L518] COND TRUE 1 [L521] kernel_st = 1 [L257] int tmp ; Loop: [L261] COND TRUE 1 [L231] int __retres1 ; [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 [L252] return (__retres1); [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND FALSE !(\read(tmp_ndt_2)) [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND FALSE !(\read(tmp_ndt_3)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...