./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c -s /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 440325a953e10d2173456ab8f8c8fc1313a6b958 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-deref) --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 15:05:44,055 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 15:05:44,056 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 15:05:44,064 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 15:05:44,064 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 15:05:44,065 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 15:05:44,065 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 15:05:44,066 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 15:05:44,067 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 15:05:44,067 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 15:05:44,068 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 15:05:44,068 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 15:05:44,069 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 15:05:44,069 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 15:05:44,070 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 15:05:44,071 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 15:05:44,071 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 15:05:44,072 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 15:05:44,074 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 15:05:44,074 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 15:05:44,075 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 15:05:44,075 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 15:05:44,076 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 15:05:44,077 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 15:05:44,077 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 15:05:44,077 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 15:05:44,077 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 15:05:44,078 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 15:05:44,078 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 15:05:44,079 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 15:05:44,079 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 15:05:44,080 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 15:05:44,080 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 15:05:44,080 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 15:05:44,081 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 15:05:44,081 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 15:05:44,081 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-09 15:05:44,089 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 15:05:44,089 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 15:05:44,089 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 15:05:44,089 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 15:05:44,090 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 15:05:44,090 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 15:05:44,090 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 15:05:44,090 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 15:05:44,091 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 15:05:44,092 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 15:05:44,092 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 15:05:44,092 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 15:05:44,092 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 15:05:44,092 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 15:05:44,092 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 15:05:44,093 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 15:05:44,093 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 15:05:44,093 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 15:05:44,093 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 15:05:44,093 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 15:05:44,093 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 15:05:44,093 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 15:05:44,094 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 440325a953e10d2173456ab8f8c8fc1313a6b958 [2018-12-09 15:05:44,117 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 15:05:44,125 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 15:05:44,127 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 15:05:44,128 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 15:05:44,128 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 15:05:44,129 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/../../sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-09 15:05:44,164 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/data/f9270d0f6/5b80d8fc0e214d5cb2e971fc8e726042/FLAG7e25bbe5b [2018-12-09 15:05:44,479 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 15:05:44,479 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/sv-benchmarks/c/memsafety-ext3/getNumbers4_false-valid-deref.c [2018-12-09 15:05:44,483 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/data/f9270d0f6/5b80d8fc0e214d5cb2e971fc8e726042/FLAG7e25bbe5b [2018-12-09 15:05:44,895 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/data/f9270d0f6/5b80d8fc0e214d5cb2e971fc8e726042 [2018-12-09 15:05:44,897 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 15:05:44,897 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-09 15:05:44,898 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 15:05:44,898 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 15:05:44,901 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 15:05:44,902 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 03:05:44" (1/1) ... [2018-12-09 15:05:44,903 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1936571d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:44, skipping insertion in model container [2018-12-09 15:05:44,904 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 03:05:44" (1/1) ... [2018-12-09 15:05:44,908 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 15:05:44,917 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 15:05:45,009 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 15:05:45,018 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 15:05:45,030 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 15:05:45,042 INFO L195 MainTranslator]: Completed translation [2018-12-09 15:05:45,042 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45 WrapperNode [2018-12-09 15:05:45,042 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 15:05:45,042 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 15:05:45,042 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 15:05:45,043 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 15:05:45,050 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,050 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,057 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,057 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,062 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,094 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,095 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... [2018-12-09 15:05:45,097 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 15:05:45,097 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 15:05:45,097 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 15:05:45,098 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 15:05:45,098 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 15:05:45,129 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 15:05:45,129 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 15:05:45,130 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers [2018-12-09 15:05:45,130 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers2 [2018-12-09 15:05:45,130 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers3 [2018-12-09 15:05:45,130 INFO L138 BoogieDeclarations]: Found implementation of procedure getNumbers4 [2018-12-09 15:05:45,130 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure printf [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers2 [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers3 [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 15:05:45,130 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 15:05:45,131 INFO L130 BoogieDeclarations]: Found specification of procedure getNumbers4 [2018-12-09 15:05:45,131 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 15:05:45,131 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 15:05:45,131 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-09 15:05:45,131 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 15:05:45,312 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 15:05:45,312 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-12-09 15:05:45,313 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:05:45 BoogieIcfgContainer [2018-12-09 15:05:45,313 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 15:05:45,313 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 15:05:45,313 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 15:05:45,315 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 15:05:45,315 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 03:05:44" (1/3) ... [2018-12-09 15:05:45,316 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@663aef00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 03:05:45, skipping insertion in model container [2018-12-09 15:05:45,316 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:05:45" (2/3) ... [2018-12-09 15:05:45,316 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@663aef00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 03:05:45, skipping insertion in model container [2018-12-09 15:05:45,316 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:05:45" (3/3) ... [2018-12-09 15:05:45,317 INFO L112 eAbstractionObserver]: Analyzing ICFG getNumbers4_false-valid-deref.c [2018-12-09 15:05:45,323 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 15:05:45,327 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-12-09 15:05:45,336 INFO L257 AbstractCegarLoop]: Starting to check reachability of 17 error locations. [2018-12-09 15:05:45,350 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 15:05:45,351 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 15:05:45,351 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 15:05:45,351 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 15:05:45,351 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 15:05:45,351 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 15:05:45,351 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 15:05:45,351 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 15:05:45,351 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 15:05:45,360 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states. [2018-12-09 15:05:45,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 15:05:45,366 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:45,366 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:45,367 INFO L423 AbstractCegarLoop]: === Iteration 1 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:45,370 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:45,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1833468390, now seen corresponding path program 1 times [2018-12-09 15:05:45,372 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:45,372 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:45,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:45,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:45,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:45,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:45,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:45,486 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:05:45,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 15:05:45,488 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 15:05:45,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 15:05:45,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:05:45,498 INFO L87 Difference]: Start difference. First operand 70 states. Second operand 3 states. [2018-12-09 15:05:45,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:45,559 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-09 15:05:45,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 15:05:45,561 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-09 15:05:45,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:45,567 INFO L225 Difference]: With dead ends: 69 [2018-12-09 15:05:45,567 INFO L226 Difference]: Without dead ends: 66 [2018-12-09 15:05:45,568 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:05:45,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-12-09 15:05:45,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-12-09 15:05:45,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-12-09 15:05:45,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-12-09 15:05:45,592 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 12 [2018-12-09 15:05:45,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:45,593 INFO L480 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-12-09 15:05:45,593 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 15:05:45,593 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-12-09 15:05:45,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 15:05:45,593 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:45,593 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:45,594 INFO L423 AbstractCegarLoop]: === Iteration 2 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:45,594 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:45,594 INFO L82 PathProgramCache]: Analyzing trace with hash 1833468391, now seen corresponding path program 1 times [2018-12-09 15:05:45,594 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:45,594 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:45,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:45,595 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:45,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:45,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:45,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:45,715 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:05:45,715 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 15:05:45,716 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 15:05:45,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 15:05:45,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:05:45,716 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 4 states. [2018-12-09 15:05:45,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:45,784 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-12-09 15:05:45,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 15:05:45,784 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-12-09 15:05:45,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:45,785 INFO L225 Difference]: With dead ends: 69 [2018-12-09 15:05:45,785 INFO L226 Difference]: Without dead ends: 69 [2018-12-09 15:05:45,785 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-09 15:05:45,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-12-09 15:05:45,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2018-12-09 15:05:45,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-12-09 15:05:45,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-12-09 15:05:45,790 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 12 [2018-12-09 15:05:45,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:45,790 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-12-09 15:05:45,790 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 15:05:45,790 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-12-09 15:05:45,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 15:05:45,790 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:45,791 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:45,791 INFO L423 AbstractCegarLoop]: === Iteration 3 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:45,791 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:45,791 INFO L82 PathProgramCache]: Analyzing trace with hash 1757784526, now seen corresponding path program 1 times [2018-12-09 15:05:45,791 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:45,791 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:45,792 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:45,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:45,792 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:45,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:45,872 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:45,872 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:45,872 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:45,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:45,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:45,906 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:45,941 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 15:05:45,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,947 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 15:05:45,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,951 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 15:05:45,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,957 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:45,957 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 15:05:45,958 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:45,971 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:45,976 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:45,981 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:45,994 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 15:05:46,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 15:05:46,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,057 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 15:05:46,105 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,110 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-09 15:05:46,110 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-12-09 15:05:46,139 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,150 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,165 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 15:05:46,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,185 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 15:05:46,186 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,194 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,199 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,203 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,211 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 15:05:46,211 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 15:05:46,282 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:46,297 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:46,297 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4] total 9 [2018-12-09 15:05:46,297 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 15:05:46,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 15:05:46,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:46,298 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 10 states. [2018-12-09 15:05:46,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:46,483 INFO L93 Difference]: Finished difference Result 72 states and 76 transitions. [2018-12-09 15:05:46,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:05:46,483 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 15 [2018-12-09 15:05:46,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:46,484 INFO L225 Difference]: With dead ends: 72 [2018-12-09 15:05:46,484 INFO L226 Difference]: Without dead ends: 72 [2018-12-09 15:05:46,484 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:05:46,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-12-09 15:05:46,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-12-09 15:05:46,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-12-09 15:05:46,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 76 transitions. [2018-12-09 15:05:46,488 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 76 transitions. Word has length 15 [2018-12-09 15:05:46,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:46,488 INFO L480 AbstractCegarLoop]: Abstraction has 72 states and 76 transitions. [2018-12-09 15:05:46,488 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 15:05:46,488 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 76 transitions. [2018-12-09 15:05:46,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 15:05:46,488 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:46,488 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:46,489 INFO L423 AbstractCegarLoop]: === Iteration 4 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:46,489 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:46,489 INFO L82 PathProgramCache]: Analyzing trace with hash -16477363, now seen corresponding path program 1 times [2018-12-09 15:05:46,489 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:46,489 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:46,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:46,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:46,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:46,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:46,522 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-12-09 15:05:46,522 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:05:46,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 15:05:46,523 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:05:46,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:05:46,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:05:46,523 INFO L87 Difference]: Start difference. First operand 72 states and 76 transitions. Second operand 6 states. [2018-12-09 15:05:46,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:46,606 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-12-09 15:05:46,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 15:05:46,606 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-12-09 15:05:46,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:46,607 INFO L225 Difference]: With dead ends: 71 [2018-12-09 15:05:46,607 INFO L226 Difference]: Without dead ends: 71 [2018-12-09 15:05:46,607 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:05:46,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-12-09 15:05:46,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-12-09 15:05:46,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-12-09 15:05:46,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-12-09 15:05:46,611 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 26 [2018-12-09 15:05:46,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:46,611 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-12-09 15:05:46,611 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:05:46,611 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-12-09 15:05:46,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 15:05:46,612 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:46,612 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:46,612 INFO L423 AbstractCegarLoop]: === Iteration 5 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:46,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:46,612 INFO L82 PathProgramCache]: Analyzing trace with hash -16477362, now seen corresponding path program 1 times [2018-12-09 15:05:46,612 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:46,612 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:46,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:46,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:46,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:46,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:46,641 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:46,642 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:46,642 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:46,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:46,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:46,663 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:46,670 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:46,684 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:46,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-12-09 15:05:46,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 15:05:46,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 15:05:46,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:05:46,685 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 7 states. [2018-12-09 15:05:46,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:46,700 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-12-09 15:05:46,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 15:05:46,700 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-12-09 15:05:46,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:46,701 INFO L225 Difference]: With dead ends: 76 [2018-12-09 15:05:46,701 INFO L226 Difference]: Without dead ends: 76 [2018-12-09 15:05:46,702 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:05:46,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-12-09 15:05:46,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 74. [2018-12-09 15:05:46,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-12-09 15:05:46,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2018-12-09 15:05:46,706 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 78 transitions. Word has length 26 [2018-12-09 15:05:46,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:46,706 INFO L480 AbstractCegarLoop]: Abstraction has 74 states and 78 transitions. [2018-12-09 15:05:46,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 15:05:46,706 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 78 transitions. [2018-12-09 15:05:46,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 15:05:46,707 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:46,707 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:46,707 INFO L423 AbstractCegarLoop]: === Iteration 6 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:46,707 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:46,708 INFO L82 PathProgramCache]: Analyzing trace with hash 502160117, now seen corresponding path program 2 times [2018-12-09 15:05:46,708 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:46,708 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:46,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:46,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:46,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:46,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:46,769 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:46,769 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:46,769 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:46,775 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:46,788 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 15:05:46,788 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:46,791 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:46,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 15:05:46,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,798 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 15:05:46,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,804 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 15:05:46,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,810 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 15:05:46,810 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,829 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,835 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,840 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,851 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 15:05:46,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,864 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 15:05:46,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,903 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 15:05:46,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,947 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-09 15:05:46,947 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,964 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,967 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 29 [2018-12-09 15:05:46,967 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,976 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:46,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:46,995 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 15:05:47,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,014 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 15:05:47,014 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,019 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,023 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,027 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 15:05:47,034 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 15:05:47,121 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-09 15:05:47,137 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 15:05:47,137 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2018-12-09 15:05:47,137 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 15:05:47,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 15:05:47,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:05:47,137 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. Second operand 12 states. [2018-12-09 15:05:47,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:47,407 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-12-09 15:05:47,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 15:05:47,407 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 29 [2018-12-09 15:05:47,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:47,408 INFO L225 Difference]: With dead ends: 79 [2018-12-09 15:05:47,408 INFO L226 Difference]: Without dead ends: 79 [2018-12-09 15:05:47,408 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=293, Unknown=0, NotChecked=0, Total=380 [2018-12-09 15:05:47,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-12-09 15:05:47,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 77. [2018-12-09 15:05:47,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-12-09 15:05:47,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 81 transitions. [2018-12-09 15:05:47,411 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 81 transitions. Word has length 29 [2018-12-09 15:05:47,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:47,412 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 81 transitions. [2018-12-09 15:05:47,412 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 15:05:47,412 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 81 transitions. [2018-12-09 15:05:47,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-09 15:05:47,412 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:47,412 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:47,413 INFO L423 AbstractCegarLoop]: === Iteration 7 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:47,413 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:47,413 INFO L82 PathProgramCache]: Analyzing trace with hash 532455402, now seen corresponding path program 1 times [2018-12-09 15:05:47,413 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:47,413 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:47,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:47,414 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:47,414 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:47,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:47,445 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:47,446 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:47,446 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:47,453 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:47,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:47,467 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:47,477 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:47,492 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:47,492 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-09 15:05:47,492 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 15:05:47,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 15:05:47,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 15:05:47,493 INFO L87 Difference]: Start difference. First operand 77 states and 81 transitions. Second operand 9 states. [2018-12-09 15:05:47,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:47,512 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-12-09 15:05:47,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:05:47,512 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-12-09 15:05:47,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:47,513 INFO L225 Difference]: With dead ends: 82 [2018-12-09 15:05:47,513 INFO L226 Difference]: Without dead ends: 82 [2018-12-09 15:05:47,513 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 15:05:47,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-12-09 15:05:47,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 80. [2018-12-09 15:05:47,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-12-09 15:05:47,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2018-12-09 15:05:47,516 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 33 [2018-12-09 15:05:47,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:47,516 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2018-12-09 15:05:47,516 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 15:05:47,516 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2018-12-09 15:05:47,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-09 15:05:47,517 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:47,517 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:47,517 INFO L423 AbstractCegarLoop]: === Iteration 8 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:47,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:47,518 INFO L82 PathProgramCache]: Analyzing trace with hash -428261789, now seen corresponding path program 2 times [2018-12-09 15:05:47,518 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:47,518 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:47,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:47,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:47,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:47,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:47,567 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:47,568 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:47,568 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:47,573 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:47,586 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 15:05:47,586 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:47,588 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:47,591 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-09 15:05:47,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,615 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-09 15:05:47,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,668 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-09 15:05:47,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,718 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 64 [2018-12-09 15:05:47,720 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 15:05:47,721 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,732 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,756 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,763 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 74 [2018-12-09 15:05:47,765 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-09 15:05:47,766 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,805 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,812 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-09 15:05:47,813 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-12-09 15:05:47,858 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 15:05:47,901 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-09 15:05:47,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-09 15:05:47,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:47,979 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-09 15:05:47,981 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 15:05:47,981 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:47,991 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:48,000 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:48,059 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 15:05:48,109 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 15:05:48,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-09 15:05:48,166 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-09 15:05:48,422 WARN L180 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 79 [2018-12-09 15:05:48,559 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-09 15:05:48,578 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 15:05:48,578 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [9] total 10 [2018-12-09 15:05:48,579 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 15:05:48,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 15:05:48,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:48,579 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand 10 states. [2018-12-09 15:05:48,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:48,876 INFO L93 Difference]: Finished difference Result 84 states and 88 transitions. [2018-12-09 15:05:48,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 15:05:48,876 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-12-09 15:05:48,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:48,877 INFO L225 Difference]: With dead ends: 84 [2018-12-09 15:05:48,877 INFO L226 Difference]: Without dead ends: 84 [2018-12-09 15:05:48,877 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 33 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=108, Invalid=164, Unknown=0, NotChecked=0, Total=272 [2018-12-09 15:05:48,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-12-09 15:05:48,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 82. [2018-12-09 15:05:48,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-12-09 15:05:48,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 86 transitions. [2018-12-09 15:05:48,880 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 86 transitions. Word has length 36 [2018-12-09 15:05:48,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:48,880 INFO L480 AbstractCegarLoop]: Abstraction has 82 states and 86 transitions. [2018-12-09 15:05:48,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 15:05:48,881 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 86 transitions. [2018-12-09 15:05:48,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-09 15:05:48,881 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:48,881 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:48,881 INFO L423 AbstractCegarLoop]: === Iteration 9 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:48,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:48,882 INFO L82 PathProgramCache]: Analyzing trace with hash 507961675, now seen corresponding path program 1 times [2018-12-09 15:05:48,882 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:48,882 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:48,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:48,883 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:48,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:48,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:48,932 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:48,933 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:48,933 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:48,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:48,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:48,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:48,962 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:48,985 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:48,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-12-09 15:05:48,985 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 15:05:48,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 15:05:48,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:48,986 INFO L87 Difference]: Start difference. First operand 82 states and 86 transitions. Second operand 11 states. [2018-12-09 15:05:49,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:49,015 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-12-09 15:05:49,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 15:05:49,015 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 39 [2018-12-09 15:05:49,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:49,016 INFO L225 Difference]: With dead ends: 87 [2018-12-09 15:05:49,016 INFO L226 Difference]: Without dead ends: 87 [2018-12-09 15:05:49,016 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:49,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-12-09 15:05:49,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 85. [2018-12-09 15:05:49,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-12-09 15:05:49,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-12-09 15:05:49,020 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 39 [2018-12-09 15:05:49,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:49,020 INFO L480 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-12-09 15:05:49,020 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 15:05:49,020 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-12-09 15:05:49,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-09 15:05:49,021 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:49,021 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:49,021 INFO L423 AbstractCegarLoop]: === Iteration 10 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:49,021 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:49,021 INFO L82 PathProgramCache]: Analyzing trace with hash 23527684, now seen corresponding path program 2 times [2018-12-09 15:05:49,021 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:49,022 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:49,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:49,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:49,022 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:49,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:49,093 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 15:05:49,093 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:49,093 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:49,099 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:49,113 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 15:05:49,113 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:49,115 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:49,121 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 15:05:49,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,124 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 15:05:49,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,128 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 15:05:49,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,133 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 15:05:49,133 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,146 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,151 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 15:05:49,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,176 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 15:05:49,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,210 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,215 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 15:05:49,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,254 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 36 [2018-12-09 15:05:49,254 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,278 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-12-09 15:05:49,279 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,288 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,300 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-12-09 15:05:49,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,315 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 25 [2018-12-09 15:05:49,316 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,323 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,327 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,330 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:49,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 15:05:49,338 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 15:05:49,410 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-09 15:05:49,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 15:05:49,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [11] total 14 [2018-12-09 15:05:49,425 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-09 15:05:49,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-09 15:05:49,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-12-09 15:05:49,425 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 14 states. [2018-12-09 15:05:49,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:49,733 INFO L93 Difference]: Finished difference Result 89 states and 93 transitions. [2018-12-09 15:05:49,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 15:05:49,733 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 42 [2018-12-09 15:05:49,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:49,734 INFO L225 Difference]: With dead ends: 89 [2018-12-09 15:05:49,735 INFO L226 Difference]: Without dead ends: 89 [2018-12-09 15:05:49,735 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=172, Invalid=334, Unknown=0, NotChecked=0, Total=506 [2018-12-09 15:05:49,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-12-09 15:05:49,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 87. [2018-12-09 15:05:49,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-12-09 15:05:49,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 91 transitions. [2018-12-09 15:05:49,740 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 91 transitions. Word has length 42 [2018-12-09 15:05:49,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:49,741 INFO L480 AbstractCegarLoop]: Abstraction has 87 states and 91 transitions. [2018-12-09 15:05:49,741 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-09 15:05:49,741 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 91 transitions. [2018-12-09 15:05:49,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-12-09 15:05:49,742 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:49,742 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:49,742 INFO L423 AbstractCegarLoop]: === Iteration 11 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:49,743 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:49,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1213368515, now seen corresponding path program 1 times [2018-12-09 15:05:49,743 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:49,743 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:49,744 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:49,744 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:49,744 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:49,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:49,811 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 15:05:49,811 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:49,811 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:49,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:49,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:49,838 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:49,845 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 15:05:49,859 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:49,860 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-09 15:05:49,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 15:05:49,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 15:05:49,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:05:49,860 INFO L87 Difference]: Start difference. First operand 87 states and 91 transitions. Second operand 13 states. [2018-12-09 15:05:49,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:49,883 INFO L93 Difference]: Finished difference Result 90 states and 94 transitions. [2018-12-09 15:05:49,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 15:05:49,886 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2018-12-09 15:05:49,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:49,886 INFO L225 Difference]: With dead ends: 90 [2018-12-09 15:05:49,887 INFO L226 Difference]: Without dead ends: 90 [2018-12-09 15:05:49,887 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:05:49,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-12-09 15:05:49,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-12-09 15:05:49,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-12-09 15:05:49,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 94 transitions. [2018-12-09 15:05:49,889 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 94 transitions. Word has length 54 [2018-12-09 15:05:49,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:49,889 INFO L480 AbstractCegarLoop]: Abstraction has 90 states and 94 transitions. [2018-12-09 15:05:49,889 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 15:05:49,889 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 94 transitions. [2018-12-09 15:05:49,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-12-09 15:05:49,889 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:49,890 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:49,890 INFO L423 AbstractCegarLoop]: === Iteration 12 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:49,890 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:49,890 INFO L82 PathProgramCache]: Analyzing trace with hash -590033308, now seen corresponding path program 2 times [2018-12-09 15:05:49,890 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:49,890 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:49,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:49,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:49,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:49,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:49,915 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:49,915 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:49,915 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:49,923 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:49,937 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 15:05:49,937 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:49,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:49,942 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-12-09 15:05:49,954 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:49,963 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 61 [2018-12-09 15:05:50,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,024 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 66 [2018-12-09 15:05:50,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,078 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,080 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,087 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 74 [2018-12-09 15:05:50,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-12-09 15:05:50,089 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,124 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,132 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 72 [2018-12-09 15:05:50,132 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-12-09 15:05:50,177 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 15:05:50,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,226 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 60 [2018-12-09 15:05:50,228 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 15:05:50,228 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,238 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,278 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-09 15:05:50,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,332 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,333 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 56 [2018-12-09 15:05:50,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:50,357 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 60 [2018-12-09 15:05:50,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 54 [2018-12-09 15:05:50,359 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,368 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,390 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,455 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 15:05:50,505 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 15:05:50,563 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 5 xjuncts. [2018-12-09 15:05:50,563 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:61, output treesize:234 [2018-12-09 15:05:50,905 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 61 [2018-12-09 15:05:50,905 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:50,954 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 54 [2018-12-09 15:05:50,954 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:51,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:51,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:51,005 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:51,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:51,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:51,012 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-12-09 15:05:51,012 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-12-09 15:05:51,081 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 3 dim-1 vars, End of recursive call: 14 dim-0 vars, and 4 xjuncts. [2018-12-09 15:05:51,081 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 14 variables, input treesize:162, output treesize:225 [2018-12-09 15:05:53,192 WARN L180 SmtUtils]: Spent 2.10 s on a formula simplification. DAG size of input: 121 DAG size of output: 79 [2018-12-09 15:05:53,239 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 15:05:53,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 15:05:53,253 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [4] total 8 [2018-12-09 15:05:53,254 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 15:05:53,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 15:05:53,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:05:53,254 INFO L87 Difference]: Start difference. First operand 90 states and 94 transitions. Second operand 8 states. [2018-12-09 15:05:53,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:53,626 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-12-09 15:05:53,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:05:53,627 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 57 [2018-12-09 15:05:53,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:53,627 INFO L225 Difference]: With dead ends: 98 [2018-12-09 15:05:53,627 INFO L226 Difference]: Without dead ends: 98 [2018-12-09 15:05:53,628 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 51 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:05:53,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-12-09 15:05:53,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2018-12-09 15:05:53,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-12-09 15:05:53,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 98 transitions. [2018-12-09 15:05:53,631 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 98 transitions. Word has length 57 [2018-12-09 15:05:53,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:53,631 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 98 transitions. [2018-12-09 15:05:53,631 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 15:05:53,631 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 98 transitions. [2018-12-09 15:05:53,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-09 15:05:53,631 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:53,631 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:53,632 INFO L423 AbstractCegarLoop]: === Iteration 13 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:53,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:53,632 INFO L82 PathProgramCache]: Analyzing trace with hash -317183977, now seen corresponding path program 1 times [2018-12-09 15:05:53,632 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:53,632 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:53,632 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:53,632 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:53,632 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:53,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:53,658 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:53,659 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:53,659 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:53,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:53,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:53,683 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:53,692 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:53,706 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:53,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-09 15:05:53,706 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:05:53,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:05:53,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:05:53,707 INFO L87 Difference]: Start difference. First operand 94 states and 98 transitions. Second operand 6 states. [2018-12-09 15:05:53,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:53,721 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-12-09 15:05:53,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 15:05:53,722 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 62 [2018-12-09 15:05:53,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:53,722 INFO L225 Difference]: With dead ends: 103 [2018-12-09 15:05:53,723 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 15:05:53,723 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:05:53,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 15:05:53,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 99. [2018-12-09 15:05:53,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-12-09 15:05:53,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2018-12-09 15:05:53,725 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 62 [2018-12-09 15:05:53,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:53,725 INFO L480 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2018-12-09 15:05:53,725 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:05:53,726 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2018-12-09 15:05:53,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 15:05:53,726 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:53,727 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:53,727 INFO L423 AbstractCegarLoop]: === Iteration 14 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:53,727 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:53,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1648161371, now seen corresponding path program 2 times [2018-12-09 15:05:53,727 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:53,727 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:53,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:53,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:53,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:53,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:53,756 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:53,756 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:53,756 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:53,762 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:53,777 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 15:05:53,777 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:53,780 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:53,783 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2018-12-09 15:05:53,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,809 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 49 [2018-12-09 15:05:53,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,847 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 47 [2018-12-09 15:05:53,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,872 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-12-09 15:05:53,873 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:53,880 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:53,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 57 [2018-12-09 15:05:53,942 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,948 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 9 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-12-09 15:05:53,948 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:53,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:53,970 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2018-12-09 15:05:53,971 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:53,983 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:53,995 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,000 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,013 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-09 15:05:54,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 24 [2018-12-09 15:05:54,016 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 34 [2018-12-09 15:05:54,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:54,018 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 51 [2018-12-09 15:05:54,018 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,028 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,032 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,036 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,045 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-12-09 15:05:54,045 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 5 variables, input treesize:61, output treesize:36 [2018-12-09 15:05:54,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:54,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:54,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:54,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 15:05:54,115 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 54 [2018-12-09 15:05:54,116 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-12-09 15:05:54,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 7 dim-0 vars, and 2 xjuncts. [2018-12-09 15:05:54,152 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:45, output treesize:96 [2018-12-09 15:05:54,283 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 163 trivial. 0 not checked. [2018-12-09 15:05:54,298 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 15:05:54,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 11 [2018-12-09 15:05:54,298 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 15:05:54,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 15:05:54,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:54,298 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand 11 states. [2018-12-09 15:05:54,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:54,475 INFO L93 Difference]: Finished difference Result 108 states and 112 transitions. [2018-12-09 15:05:54,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 15:05:54,475 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2018-12-09 15:05:54,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:54,476 INFO L225 Difference]: With dead ends: 108 [2018-12-09 15:05:54,476 INFO L226 Difference]: Without dead ends: 108 [2018-12-09 15:05:54,476 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=181, Unknown=0, NotChecked=0, Total=240 [2018-12-09 15:05:54,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-12-09 15:05:54,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 104. [2018-12-09 15:05:54,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 15:05:54,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 108 transitions. [2018-12-09 15:05:54,478 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 108 transitions. Word has length 67 [2018-12-09 15:05:54,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:54,479 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 108 transitions. [2018-12-09 15:05:54,479 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 15:05:54,479 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 108 transitions. [2018-12-09 15:05:54,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 15:05:54,479 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:54,480 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:54,480 INFO L423 AbstractCegarLoop]: === Iteration 15 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:54,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:54,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1853794825, now seen corresponding path program 1 times [2018-12-09 15:05:54,480 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:54,480 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:54,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,481 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:54,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:54,499 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2018-12-09 15:05:54,499 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 15:05:54,499 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 15:05:54,499 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 15:05:54,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 15:05:54,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:05:54,500 INFO L87 Difference]: Start difference. First operand 104 states and 108 transitions. Second operand 3 states. [2018-12-09 15:05:54,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:54,515 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-12-09 15:05:54,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 15:05:54,515 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2018-12-09 15:05:54,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:54,516 INFO L225 Difference]: With dead ends: 103 [2018-12-09 15:05:54,516 INFO L226 Difference]: Without dead ends: 103 [2018-12-09 15:05:54,516 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 15:05:54,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-12-09 15:05:54,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-12-09 15:05:54,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-12-09 15:05:54,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 107 transitions. [2018-12-09 15:05:54,518 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 107 transitions. Word has length 73 [2018-12-09 15:05:54,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:54,519 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 107 transitions. [2018-12-09 15:05:54,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 15:05:54,519 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 107 transitions. [2018-12-09 15:05:54,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-09 15:05:54,519 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:54,519 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:54,520 INFO L423 AbstractCegarLoop]: === Iteration 16 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:54,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:54,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1853794826, now seen corresponding path program 1 times [2018-12-09 15:05:54,520 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:54,520 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:54,520 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:54,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:54,560 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:54,560 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:54,560 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:54,569 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:54,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:54,593 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:54,599 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:54,623 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:54,623 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-09 15:05:54,623 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 15:05:54,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 15:05:54,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:05:54,623 INFO L87 Difference]: Start difference. First operand 103 states and 107 transitions. Second operand 8 states. [2018-12-09 15:05:54,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:54,647 INFO L93 Difference]: Finished difference Result 112 states and 116 transitions. [2018-12-09 15:05:54,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 15:05:54,647 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 73 [2018-12-09 15:05:54,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:54,648 INFO L225 Difference]: With dead ends: 112 [2018-12-09 15:05:54,648 INFO L226 Difference]: Without dead ends: 112 [2018-12-09 15:05:54,648 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:05:54,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-12-09 15:05:54,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 108. [2018-12-09 15:05:54,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 15:05:54,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 112 transitions. [2018-12-09 15:05:54,650 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 112 transitions. Word has length 73 [2018-12-09 15:05:54,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:54,650 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 112 transitions. [2018-12-09 15:05:54,650 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 15:05:54,650 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 112 transitions. [2018-12-09 15:05:54,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-12-09 15:05:54,651 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:54,651 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:54,651 INFO L423 AbstractCegarLoop]: === Iteration 17 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:54,651 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:54,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1123262532, now seen corresponding path program 2 times [2018-12-09 15:05:54,651 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:54,651 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:54,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:54,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:54,681 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 15:05:54,681 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:54,681 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:54,688 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:54,702 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 15:05:54,702 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:54,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:54,706 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 15:05:54,706 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 15:05:54,710 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-12-09 15:05:54,730 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-12-09 15:05:54,745 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 15:05:54,745 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 10 [2018-12-09 15:05:54,745 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 15:05:54,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 15:05:54,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:54,746 INFO L87 Difference]: Start difference. First operand 108 states and 112 transitions. Second operand 10 states. [2018-12-09 15:05:54,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:54,794 INFO L93 Difference]: Finished difference Result 116 states and 120 transitions. [2018-12-09 15:05:54,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 15:05:54,794 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 78 [2018-12-09 15:05:54,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:54,795 INFO L225 Difference]: With dead ends: 116 [2018-12-09 15:05:54,795 INFO L226 Difference]: Without dead ends: 116 [2018-12-09 15:05:54,795 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:54,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-09 15:05:54,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 112. [2018-12-09 15:05:54,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-09 15:05:54,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-12-09 15:05:54,796 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 78 [2018-12-09 15:05:54,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:54,797 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-12-09 15:05:54,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 15:05:54,797 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-12-09 15:05:54,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-12-09 15:05:54,797 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:54,797 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:54,797 INFO L423 AbstractCegarLoop]: === Iteration 18 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:54,797 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:54,798 INFO L82 PathProgramCache]: Analyzing trace with hash -1854312006, now seen corresponding path program 1 times [2018-12-09 15:05:54,798 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:54,798 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:54,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,798 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:54,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:54,837 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 15:05:54,837 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:54,837 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:54,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:54,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:54,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:54,876 INFO L134 CoverageAnalysis]: Checked inductivity of 227 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 15:05:54,901 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:54,901 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-09 15:05:54,901 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 15:05:54,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 15:05:54,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:54,902 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 10 states. [2018-12-09 15:05:54,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:54,932 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2018-12-09 15:05:54,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 15:05:54,933 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2018-12-09 15:05:54,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:54,934 INFO L225 Difference]: With dead ends: 121 [2018-12-09 15:05:54,934 INFO L226 Difference]: Without dead ends: 121 [2018-12-09 15:05:54,934 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:54,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-12-09 15:05:54,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 117. [2018-12-09 15:05:54,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-09 15:05:54,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 121 transitions. [2018-12-09 15:05:54,937 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 121 transitions. Word has length 92 [2018-12-09 15:05:54,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:54,937 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 121 transitions. [2018-12-09 15:05:54,937 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 15:05:54,937 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2018-12-09 15:05:54,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-09 15:05:54,938 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:54,938 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:54,938 INFO L423 AbstractCegarLoop]: === Iteration 19 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:54,939 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:54,939 INFO L82 PathProgramCache]: Analyzing trace with hash 283421384, now seen corresponding path program 2 times [2018-12-09 15:05:54,939 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:54,939 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:54,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:54,940 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:54,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:55,000 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 15:05:55,000 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:55,000 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:55,007 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:55,039 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 15:05:55,039 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:55,041 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:55,057 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 15:05:55,072 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:55,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-12-09 15:05:55,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 15:05:55,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 15:05:55,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:55,072 INFO L87 Difference]: Start difference. First operand 117 states and 121 transitions. Second operand 11 states. [2018-12-09 15:05:55,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:55,098 INFO L93 Difference]: Finished difference Result 126 states and 130 transitions. [2018-12-09 15:05:55,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 15:05:55,099 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 97 [2018-12-09 15:05:55,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:55,100 INFO L225 Difference]: With dead ends: 126 [2018-12-09 15:05:55,100 INFO L226 Difference]: Without dead ends: 126 [2018-12-09 15:05:55,100 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:55,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-12-09 15:05:55,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 122. [2018-12-09 15:05:55,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-12-09 15:05:55,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 126 transitions. [2018-12-09 15:05:55,103 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 126 transitions. Word has length 97 [2018-12-09 15:05:55,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:55,103 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 126 transitions. [2018-12-09 15:05:55,103 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 15:05:55,103 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 126 transitions. [2018-12-09 15:05:55,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-12-09 15:05:55,104 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:55,104 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:55,104 INFO L423 AbstractCegarLoop]: === Iteration 20 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:55,104 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:55,104 INFO L82 PathProgramCache]: Analyzing trace with hash -663164294, now seen corresponding path program 3 times [2018-12-09 15:05:55,104 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:55,104 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:55,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:55,105 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:55,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:55,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:55,156 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-12-09 15:05:55,156 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:55,156 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:55,163 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 15:05:55,183 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-12-09 15:05:55,183 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:55,184 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:55,199 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 293 trivial. 0 not checked. [2018-12-09 15:05:55,214 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:55,214 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 4] total 13 [2018-12-09 15:05:55,214 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 15:05:55,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 15:05:55,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:05:55,214 INFO L87 Difference]: Start difference. First operand 122 states and 126 transitions. Second operand 13 states. [2018-12-09 15:05:55,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:55,250 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-09 15:05:55,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 15:05:55,250 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-12-09 15:05:55,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:55,251 INFO L225 Difference]: With dead ends: 140 [2018-12-09 15:05:55,251 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 15:05:55,251 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:05:55,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 15:05:55,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 132. [2018-12-09 15:05:55,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-12-09 15:05:55,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-12-09 15:05:55,254 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 102 [2018-12-09 15:05:55,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:55,254 INFO L480 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-12-09 15:05:55,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 15:05:55,254 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-12-09 15:05:55,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-09 15:05:55,255 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:55,255 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 9, 9, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:55,255 INFO L423 AbstractCegarLoop]: === Iteration 21 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:55,255 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:55,256 INFO L82 PathProgramCache]: Analyzing trace with hash -138503934, now seen corresponding path program 4 times [2018-12-09 15:05:55,256 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:55,256 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:55,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:55,256 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:55,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:55,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:55,324 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 15:05:55,324 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:55,324 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:55,334 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 15:05:55,358 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 15:05:55,358 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:55,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:55,375 INFO L134 CoverageAnalysis]: Checked inductivity of 341 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 152 trivial. 0 not checked. [2018-12-09 15:05:55,390 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:55,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-09 15:05:55,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 15:05:55,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 15:05:55,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:05:55,391 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 13 states. [2018-12-09 15:05:55,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:55,420 INFO L93 Difference]: Finished difference Result 137 states and 141 transitions. [2018-12-09 15:05:55,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 15:05:55,420 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 112 [2018-12-09 15:05:55,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:55,421 INFO L225 Difference]: With dead ends: 137 [2018-12-09 15:05:55,421 INFO L226 Difference]: Without dead ends: 137 [2018-12-09 15:05:55,422 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:05:55,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-09 15:05:55,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-09 15:05:55,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-09 15:05:55,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-12-09 15:05:55,425 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 112 [2018-12-09 15:05:55,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:55,425 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-12-09 15:05:55,425 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 15:05:55,425 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-12-09 15:05:55,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-12-09 15:05:55,426 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:55,426 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:55,426 INFO L423 AbstractCegarLoop]: === Iteration 22 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:55,426 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:55,426 INFO L82 PathProgramCache]: Analyzing trace with hash 1387314960, now seen corresponding path program 5 times [2018-12-09 15:05:55,426 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:55,426 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:55,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:55,427 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:55,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:55,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:55,477 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:55,477 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:55,477 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:55,486 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-09 15:05:57,349 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-12-09 15:05:57,349 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:57,354 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:57,362 INFO L134 CoverageAnalysis]: Checked inductivity of 387 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,378 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:57,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-09 15:05:57,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 15:05:57,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 15:05:57,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:05:57,379 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 6 states. [2018-12-09 15:05:57,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:57,398 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2018-12-09 15:05:57,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 15:05:57,398 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 117 [2018-12-09 15:05:57,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:57,399 INFO L225 Difference]: With dead ends: 146 [2018-12-09 15:05:57,399 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 15:05:57,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-12-09 15:05:57,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 15:05:57,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 142. [2018-12-09 15:05:57,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-09 15:05:57,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-12-09 15:05:57,401 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 117 [2018-12-09 15:05:57,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:57,401 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-12-09 15:05:57,401 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 15:05:57,401 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-12-09 15:05:57,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-12-09 15:05:57,401 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:57,401 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:57,401 INFO L423 AbstractCegarLoop]: === Iteration 23 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:57,401 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:57,402 INFO L82 PathProgramCache]: Analyzing trace with hash -575903494, now seen corresponding path program 6 times [2018-12-09 15:05:57,402 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:57,402 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:57,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,402 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:57,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:57,435 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,435 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:57,435 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:57,442 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-09 15:05:57,649 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-12-09 15:05:57,649 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:57,651 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:57,662 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,677 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:57,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-12-09 15:05:57,677 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 15:05:57,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 15:05:57,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:05:57,678 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 7 states. [2018-12-09 15:05:57,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:57,693 INFO L93 Difference]: Finished difference Result 151 states and 155 transitions. [2018-12-09 15:05:57,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 15:05:57,693 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-12-09 15:05:57,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:57,694 INFO L225 Difference]: With dead ends: 151 [2018-12-09 15:05:57,694 INFO L226 Difference]: Without dead ends: 151 [2018-12-09 15:05:57,694 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-12-09 15:05:57,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-09 15:05:57,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 147. [2018-12-09 15:05:57,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-09 15:05:57,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 151 transitions. [2018-12-09 15:05:57,696 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 151 transitions. Word has length 122 [2018-12-09 15:05:57,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:57,696 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 151 transitions. [2018-12-09 15:05:57,696 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 15:05:57,696 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 151 transitions. [2018-12-09 15:05:57,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-09 15:05:57,696 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:57,696 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:57,697 INFO L423 AbstractCegarLoop]: === Iteration 24 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:57,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:57,697 INFO L82 PathProgramCache]: Analyzing trace with hash -371170992, now seen corresponding path program 7 times [2018-12-09 15:05:57,697 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:57,697 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:57,697 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,697 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:57,697 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:57,747 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,748 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:57,748 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:57,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:57,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:57,792 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:57,804 INFO L134 CoverageAnalysis]: Checked inductivity of 414 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,818 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:57,819 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-09 15:05:57,819 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 15:05:57,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 15:05:57,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:05:57,819 INFO L87 Difference]: Start difference. First operand 147 states and 151 transitions. Second operand 8 states. [2018-12-09 15:05:57,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:57,836 INFO L93 Difference]: Finished difference Result 156 states and 160 transitions. [2018-12-09 15:05:57,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 15:05:57,837 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 127 [2018-12-09 15:05:57,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:57,837 INFO L225 Difference]: With dead ends: 156 [2018-12-09 15:05:57,837 INFO L226 Difference]: Without dead ends: 156 [2018-12-09 15:05:57,838 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-12-09 15:05:57,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-09 15:05:57,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 152. [2018-12-09 15:05:57,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-09 15:05:57,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 156 transitions. [2018-12-09 15:05:57,844 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 156 transitions. Word has length 127 [2018-12-09 15:05:57,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:57,844 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 156 transitions. [2018-12-09 15:05:57,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 15:05:57,845 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 156 transitions. [2018-12-09 15:05:57,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-12-09 15:05:57,845 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:57,845 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:57,845 INFO L423 AbstractCegarLoop]: === Iteration 25 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:57,845 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:57,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1244147386, now seen corresponding path program 8 times [2018-12-09 15:05:57,845 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:57,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:57,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 15:05:57,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:57,886 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,886 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:57,886 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:57,892 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 15:05:57,924 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 15:05:57,924 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:57,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:57,940 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:57,954 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:57,954 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-09 15:05:57,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 15:05:57,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 15:05:57,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 15:05:57,955 INFO L87 Difference]: Start difference. First operand 152 states and 156 transitions. Second operand 9 states. [2018-12-09 15:05:57,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:57,984 INFO L93 Difference]: Finished difference Result 161 states and 165 transitions. [2018-12-09 15:05:57,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 15:05:57,985 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 132 [2018-12-09 15:05:57,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:57,985 INFO L225 Difference]: With dead ends: 161 [2018-12-09 15:05:57,985 INFO L226 Difference]: Without dead ends: 161 [2018-12-09 15:05:57,986 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 15:05:57,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-12-09 15:05:57,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-12-09 15:05:57,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-09 15:05:57,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 161 transitions. [2018-12-09 15:05:57,987 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 161 transitions. Word has length 132 [2018-12-09 15:05:57,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:57,988 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 161 transitions. [2018-12-09 15:05:57,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 15:05:57,988 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 161 transitions. [2018-12-09 15:05:57,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-12-09 15:05:57,988 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:57,988 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:57,988 INFO L423 AbstractCegarLoop]: === Iteration 26 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:57,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:57,988 INFO L82 PathProgramCache]: Analyzing trace with hash -2070269040, now seen corresponding path program 9 times [2018-12-09 15:05:57,989 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:57,989 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:57,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,989 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:57,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:57,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:58,027 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:58,027 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:58,027 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:58,033 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 15:05:58,365 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-09 15:05:58,365 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:58,367 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:58,377 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:58,392 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:58,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-09 15:05:58,393 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 15:05:58,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 15:05:58,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:58,393 INFO L87 Difference]: Start difference. First operand 157 states and 161 transitions. Second operand 10 states. [2018-12-09 15:05:58,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:58,420 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2018-12-09 15:05:58,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 15:05:58,420 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 137 [2018-12-09 15:05:58,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:58,421 INFO L225 Difference]: With dead ends: 166 [2018-12-09 15:05:58,421 INFO L226 Difference]: Without dead ends: 166 [2018-12-09 15:05:58,421 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-09 15:05:58,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-12-09 15:05:58,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 162. [2018-12-09 15:05:58,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-09 15:05:58,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 166 transitions. [2018-12-09 15:05:58,425 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 166 transitions. Word has length 137 [2018-12-09 15:05:58,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:58,426 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 166 transitions. [2018-12-09 15:05:58,426 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 15:05:58,426 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 166 transitions. [2018-12-09 15:05:58,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-12-09 15:05:58,426 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:58,427 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:58,427 INFO L423 AbstractCegarLoop]: === Iteration 27 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:58,427 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:58,427 INFO L82 PathProgramCache]: Analyzing trace with hash 1106756730, now seen corresponding path program 10 times [2018-12-09 15:05:58,427 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:58,427 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:58,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:58,427 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:58,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:58,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:58,475 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:58,476 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:58,476 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:58,482 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 15:05:59,061 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 15:05:59,061 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:05:59,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:05:59,077 INFO L134 CoverageAnalysis]: Checked inductivity of 492 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:59,092 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:05:59,093 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-12-09 15:05:59,093 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 15:05:59,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 15:05:59,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:59,093 INFO L87 Difference]: Start difference. First operand 162 states and 166 transitions. Second operand 11 states. [2018-12-09 15:05:59,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:05:59,144 INFO L93 Difference]: Finished difference Result 171 states and 175 transitions. [2018-12-09 15:05:59,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 15:05:59,145 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 142 [2018-12-09 15:05:59,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:05:59,145 INFO L225 Difference]: With dead ends: 171 [2018-12-09 15:05:59,145 INFO L226 Difference]: Without dead ends: 171 [2018-12-09 15:05:59,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-12-09 15:05:59,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-12-09 15:05:59,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 167. [2018-12-09 15:05:59,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-09 15:05:59,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 171 transitions. [2018-12-09 15:05:59,148 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 171 transitions. Word has length 142 [2018-12-09 15:05:59,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:05:59,149 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 171 transitions. [2018-12-09 15:05:59,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 15:05:59,149 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 171 transitions. [2018-12-09 15:05:59,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-12-09 15:05:59,149 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:05:59,150 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:05:59,150 INFO L423 AbstractCegarLoop]: === Iteration 28 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:05:59,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:05:59,150 INFO L82 PathProgramCache]: Analyzing trace with hash -1612565040, now seen corresponding path program 11 times [2018-12-09 15:05:59,150 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:05:59,150 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:05:59,151 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:59,151 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:05:59,151 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:05:59,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:05:59,216 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:05:59,216 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:05:59,216 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:05:59,224 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-09 15:06:13,937 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-12-09 15:06:13,938 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:06:13,949 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:06:13,965 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 148 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:06:13,984 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:06:13,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-12-09 15:06:13,985 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 15:06:13,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 15:06:13,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:06:13,985 INFO L87 Difference]: Start difference. First operand 167 states and 171 transitions. Second operand 12 states. [2018-12-09 15:06:14,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:06:14,013 INFO L93 Difference]: Finished difference Result 176 states and 180 transitions. [2018-12-09 15:06:14,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 15:06:14,014 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 147 [2018-12-09 15:06:14,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:06:14,014 INFO L225 Difference]: With dead ends: 176 [2018-12-09 15:06:14,014 INFO L226 Difference]: Without dead ends: 176 [2018-12-09 15:06:14,015 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-12-09 15:06:14,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-09 15:06:14,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-09 15:06:14,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-09 15:06:14,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 176 transitions. [2018-12-09 15:06:14,017 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 176 transitions. Word has length 147 [2018-12-09 15:06:14,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:06:14,017 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 176 transitions. [2018-12-09 15:06:14,017 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 15:06:14,017 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 176 transitions. [2018-12-09 15:06:14,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-12-09 15:06:14,017 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:06:14,017 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:06:14,017 INFO L423 AbstractCegarLoop]: === Iteration 29 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:06:14,018 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:06:14,018 INFO L82 PathProgramCache]: Analyzing trace with hash -896062918, now seen corresponding path program 12 times [2018-12-09 15:06:14,018 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:06:14,018 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:06:14,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:06:14,018 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:06:14,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:06:14,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 15:06:14,099 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:06:14,099 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 15:06:14,099 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 15:06:14,106 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-09 15:06:16,187 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-12-09 15:06:16,187 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 15:06:16,193 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 15:06:16,207 INFO L134 CoverageAnalysis]: Checked inductivity of 569 backedges. 0 proven. 189 refuted. 0 times theorem prover too weak. 380 trivial. 0 not checked. [2018-12-09 15:06:16,223 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 15:06:16,223 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-09 15:06:16,224 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 15:06:16,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 15:06:16,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:06:16,224 INFO L87 Difference]: Start difference. First operand 172 states and 176 transitions. Second operand 13 states. [2018-12-09 15:06:16,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 15:06:16,261 INFO L93 Difference]: Finished difference Result 177 states and 181 transitions. [2018-12-09 15:06:16,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 15:06:16,261 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 152 [2018-12-09 15:06:16,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 15:06:16,262 INFO L225 Difference]: With dead ends: 177 [2018-12-09 15:06:16,262 INFO L226 Difference]: Without dead ends: 177 [2018-12-09 15:06:16,262 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 152 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 15:06:16,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-12-09 15:06:16,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-12-09 15:06:16,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-12-09 15:06:16,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 181 transitions. [2018-12-09 15:06:16,264 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 181 transitions. Word has length 152 [2018-12-09 15:06:16,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 15:06:16,264 INFO L480 AbstractCegarLoop]: Abstraction has 177 states and 181 transitions. [2018-12-09 15:06:16,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 15:06:16,264 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 181 transitions. [2018-12-09 15:06:16,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-12-09 15:06:16,264 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 15:06:16,265 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 15:06:16,265 INFO L423 AbstractCegarLoop]: === Iteration 30 === [getNumbers3Err3REQUIRES_VIOLATION, getNumbers3Err2REQUIRES_VIOLATION, getNumbers3Err1REQUIRES_VIOLATION, getNumbers3Err0REQUIRES_VIOLATION, getNumbers2Err2REQUIRES_VIOLATION, getNumbers2Err1REQUIRES_VIOLATION, getNumbers2Err0REQUIRES_VIOLATION, getNumbers2Err3REQUIRES_VIOLATION, getNumbers4Err2REQUIRES_VIOLATION, getNumbers4Err1REQUIRES_VIOLATION, getNumbers4Err0REQUIRES_VIOLATION, getNumbers4Err3REQUIRES_VIOLATION, mainErr2ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, getNumbersErr0REQUIRES_VIOLATION, getNumbersErr1REQUIRES_VIOLATION]=== [2018-12-09 15:06:16,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 15:06:16,265 INFO L82 PathProgramCache]: Analyzing trace with hash 1136420880, now seen corresponding path program 13 times [2018-12-09 15:06:16,265 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 15:06:16,265 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 15:06:16,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:06:16,265 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 15:06:16,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 15:06:16,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 15:06:16,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 15:06:16,479 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 15:06:16,522 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 03:06:16 BoogieIcfgContainer [2018-12-09 15:06:16,522 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 15:06:16,522 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 15:06:16,522 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 15:06:16,523 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 15:06:16,523 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:05:45" (3/4) ... [2018-12-09 15:06:16,525 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 15:06:16,563 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_90c831fb-fe02-469f-a90c-366962cd59c4/bin-2019/uautomizer/witness.graphml [2018-12-09 15:06:16,563 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 15:06:16,563 INFO L168 Benchmark]: Toolchain (without parser) took 31666.44 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 265.8 MB). Free memory was 956.0 MB in the beginning and 1.0 GB in the end (delta: -76.3 MB). Peak memory consumption was 189.5 MB. Max. memory is 11.5 GB. [2018-12-09 15:06:16,564 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 15:06:16,564 INFO L168 Benchmark]: CACSL2BoogieTranslator took 144.28 ms. Allocated memory is still 1.0 GB. Free memory was 956.0 MB in the beginning and 945.2 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-12-09 15:06:16,564 INFO L168 Benchmark]: Boogie Preprocessor took 54.68 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 945.2 MB in the beginning and 1.1 GB in the end (delta: -159.0 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2018-12-09 15:06:16,564 INFO L168 Benchmark]: RCFGBuilder took 215.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 28.8 MB). Peak memory consumption was 28.8 MB. Max. memory is 11.5 GB. [2018-12-09 15:06:16,565 INFO L168 Benchmark]: TraceAbstraction took 31208.66 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 159.4 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 26.2 MB). Peak memory consumption was 185.6 MB. Max. memory is 11.5 GB. [2018-12-09 15:06:16,565 INFO L168 Benchmark]: Witness Printer took 40.48 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 8.5 MB). Peak memory consumption was 8.5 MB. Max. memory is 11.5 GB. [2018-12-09 15:06:16,566 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 976.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 144.28 ms. Allocated memory is still 1.0 GB. Free memory was 956.0 MB in the beginning and 945.2 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 54.68 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 945.2 MB in the beginning and 1.1 GB in the end (delta: -159.0 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 215.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 28.8 MB). Peak memory consumption was 28.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 31208.66 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 159.4 MB). Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 26.2 MB). Peak memory consumption was 185.6 MB. Max. memory is 11.5 GB. * Witness Printer took 40.48 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 8.5 MB). Peak memory consumption was 8.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 38]: pointer dereference may fail pointer dereference may fail We found a FailurePath: [L6] static int array[10]; [L17] static int numbers2[10]; [L36] static int numbers4[10]; [L45] CALL getNumbers4() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L35] CALL, EXPR getNumbers3() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L25] CALL, EXPR getNumbers2() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L16] CALL, EXPR getNumbers() VAL [array={1:0}, numbers2={-1:0}, numbers4={110:0}] [L8] int i = 0; VAL [array={1:0}, i=0, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=0, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=1, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=1, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=1, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=2, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=2, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=2, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=3, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=3, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=3, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=4, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=4, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=4, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=5, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=5, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=5, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=6, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=6, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=6, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=7, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=7, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=7, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=8, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=8, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=8, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=9, numbers2={-1:0}, numbers4={110:0}] [L8] COND TRUE i < 10 VAL [array={1:0}, i=9, numbers2={-1:0}, numbers4={110:0}] [L9] array[i] = i VAL [array={1:0}, i=9, numbers2={-1:0}, numbers4={110:0}] [L8] ++i VAL [array={1:0}, i=10, numbers2={-1:0}, numbers4={110:0}] [L8] COND FALSE !(i < 10) VAL [array={1:0}, i=10, numbers2={-1:0}, numbers4={110:0}] [L12] return array; VAL [\result={1:0}, array={1:0}, i=10, numbers2={-1:0}, numbers4={110:0}] [L16] RET, EXPR getNumbers() VAL [array={1:0}, getNumbers()={1:0}, numbers2={-1:0}, numbers4={110:0}] [L16] int* numbers = getNumbers(); [L18] int i = 0; VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=0] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=0, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=0] [L18] ++i VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=1] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=1, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=1] [L18] ++i VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=2] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=2, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=2] [L18] ++i VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=3] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=3, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=3] [L18] ++i VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=4] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=4, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=4] [L18] ++i VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=5] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=5, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=5] [L18] ++i VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=6] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=6, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=6] [L18] ++i VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=7] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=7, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=7] [L18] ++i VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=8] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=8, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=8] [L18] ++i VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND TRUE i < 10 VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L19] EXPR numbers[i] VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=9] [L19] numbers2[i] = numbers[i] VAL [array={1:0}, i=9, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}, numbers[i]=9] [L18] ++i VAL [array={1:0}, i=10, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L18] COND FALSE !(i < 10) VAL [array={1:0}, i=10, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L21] return numbers2; VAL [\result={-1:0}, array={1:0}, i=10, numbers={1:0}, numbers2={-1:0}, numbers4={110:0}] [L25] RET, EXPR getNumbers2() VAL [array={1:0}, getNumbers2()={-1:0}, numbers2={-1:0}, numbers4={110:0}] [L25] int* numbers = getNumbers2(); [L26] int numbers3[10]; [L27] int i = 0; VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=0] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=0, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=0] [L27] ++i VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=1] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=1, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=1] [L27] ++i VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=2] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=2, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=2] [L27] ++i VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=3] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=3, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=3] [L27] ++i VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=4] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=4, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=4] [L27] ++i VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=5] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=5, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=5] [L27] ++i VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=6] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=6, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=6] [L27] ++i VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=7] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=7, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=7] [L27] ++i VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=8] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=8, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=8] [L27] ++i VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND TRUE i < 10 VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L28] EXPR numbers[i] VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=9] [L28] numbers3[i] = numbers[i] VAL [array={1:0}, i=9, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}, numbers[i]=9] [L27] ++i VAL [array={1:0}, i=10, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L27] COND FALSE !(i < 10) VAL [array={1:0}, i=10, numbers={-1:0}, numbers2={-1:0}, numbers3={105:0}, numbers4={110:0}] [L31] return numbers3; [L31] return numbers3; VAL [\result={105:0}, array={1:0}, i=10, numbers={-1:0}, numbers2={-1:0}, numbers4={110:0}] [L35] RET, EXPR getNumbers3() VAL [array={1:0}, getNumbers3()={105:0}, numbers2={-1:0}, numbers4={110:0}] [L35] int* numbers = getNumbers3(); [L37] int i = 0; VAL [array={1:0}, i=0, numbers={105:0}, numbers2={-1:0}, numbers4={110:0}] [L37] COND TRUE i < 10 VAL [array={1:0}, i=0, numbers={105:0}, numbers2={-1:0}, numbers4={110:0}] [L38] numbers[i] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 70 locations, 17 error locations. UNSAFE Result, 31.1s OverallTime, 30 OverallIterations, 10 TraceHistogramMax, 2.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1638 SDtfs, 877 SDslu, 8411 SDs, 0 SdLazy, 1812 SolverSat, 79 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2332 GetRequests, 2077 SyntacticMatches, 8 SemanticMatches, 247 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 421 ImplicationChecksByTransitivity, 4.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=177occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 29 MinimizatonAttempts, 77 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 20.3s SatisfiabilityAnalysisTime, 7.1s InterpolantComputationTime, 4460 NumberOfCodeBlocks, 4143 NumberOfCodeBlocksAsserted, 101 NumberOfCheckSat, 4249 ConstructedInterpolants, 234 QuantifiedInterpolants, 1568965 SizeOfPredicates, 61 NumberOfNonLiveVariables, 7364 ConjunctsInSsa, 273 ConjunctsInUnsatCore, 54 InterpolantComputations, 10 PerfectInterpolantSequences, 9289/12283 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...