./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc6894f63179c5a0c3641b97a75e8f614c456bea .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -s /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc6894f63179c5a0c3641b97a75e8f614c456bea ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 11:19:24,690 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 11:19:24,691 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 11:19:24,697 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 11:19:24,697 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 11:19:24,698 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 11:19:24,698 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 11:19:24,699 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 11:19:24,700 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 11:19:24,700 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 11:19:24,701 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 11:19:24,701 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 11:19:24,701 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 11:19:24,702 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 11:19:24,702 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 11:19:24,703 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 11:19:24,703 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 11:19:24,704 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 11:19:24,705 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 11:19:24,706 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 11:19:24,706 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 11:19:24,707 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 11:19:24,708 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 11:19:24,708 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 11:19:24,708 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 11:19:24,708 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 11:19:24,709 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 11:19:24,709 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 11:19:24,710 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 11:19:24,710 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 11:19:24,710 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 11:19:24,711 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 11:19:24,711 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 11:19:24,711 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 11:19:24,711 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 11:19:24,712 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 11:19:24,712 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-12-09 11:19:24,719 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 11:19:24,719 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 11:19:24,719 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 11:19:24,719 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 11:19:24,720 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 11:19:24,720 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 11:19:24,720 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 11:19:24,721 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 11:19:24,721 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 11:19:24,721 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 11:19:24,722 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 11:19:24,722 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 11:19:24,722 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc6894f63179c5a0c3641b97a75e8f614c456bea [2018-12-09 11:19:24,739 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 11:19:24,745 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 11:19:24,747 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 11:19:24,748 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 11:19:24,748 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 11:19:24,748 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-09 11:19:24,781 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/986a6898a/ecb1948c7f7a485ca753ec306b64c351/FLAG9f75ab351 [2018-12-09 11:19:25,279 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 11:19:25,280 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-09 11:19:25,288 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/986a6898a/ecb1948c7f7a485ca753ec306b64c351/FLAG9f75ab351 [2018-12-09 11:19:25,299 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/986a6898a/ecb1948c7f7a485ca753ec306b64c351 [2018-12-09 11:19:25,301 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 11:19:25,302 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-09 11:19:25,303 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 11:19:25,303 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 11:19:25,306 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 11:19:25,306 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,309 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@461c4b29 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25, skipping insertion in model container [2018-12-09 11:19:25,309 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,314 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 11:19:25,342 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 11:19:25,561 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 11:19:25,572 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 11:19:25,607 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 11:19:25,638 INFO L195 MainTranslator]: Completed translation [2018-12-09 11:19:25,638 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25 WrapperNode [2018-12-09 11:19:25,638 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 11:19:25,639 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 11:19:25,639 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 11:19:25,639 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 11:19:25,647 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,647 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,658 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,658 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,674 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,677 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,679 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... [2018-12-09 11:19:25,683 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 11:19:25,684 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 11:19:25,684 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 11:19:25,684 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 11:19:25,684 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-09 11:19:25,714 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 11:19:25,715 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-09 11:19:25,716 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-09 11:19:25,717 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-09 11:19:25,717 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-09 11:19:25,718 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-09 11:19:25,719 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-09 11:19:25,720 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-09 11:19:25,721 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-09 11:19:25,722 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-09 11:19:25,723 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-09 11:19:25,724 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-09 11:19:25,725 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-09 11:19:25,726 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-09 11:19:25,727 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 11:19:25,728 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 11:19:25,729 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 11:19:25,730 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-09 11:19:25,731 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_get [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_put [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-12-09 11:19:25,732 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-12-09 11:19:25,733 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-09 11:19:25,733 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-09 11:19:25,974 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 11:19:26,090 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 11:19:26,212 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 11:19:26,212 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 11:19:26,213 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 11:19:26 BoogieIcfgContainer [2018-12-09 11:19:26,213 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 11:19:26,213 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 11:19:26,213 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 11:19:26,216 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 11:19:26,216 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 11:19:25" (1/3) ... [2018-12-09 11:19:26,217 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17703a6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 11:19:26, skipping insertion in model container [2018-12-09 11:19:26,217 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:19:25" (2/3) ... [2018-12-09 11:19:26,217 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17703a6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 11:19:26, skipping insertion in model container [2018-12-09 11:19:26,217 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 11:19:26" (3/3) ... [2018-12-09 11:19:26,218 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-09 11:19:26,226 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 11:19:26,232 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-09 11:19:26,244 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-09 11:19:26,261 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 11:19:26,261 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 11:19:26,261 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 11:19:26,261 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 11:19:26,261 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 11:19:26,261 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 11:19:26,261 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 11:19:26,261 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 11:19:26,261 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 11:19:26,273 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states. [2018-12-09 11:19:26,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 11:19:26,279 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:26,279 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:26,281 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:26,284 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:26,285 INFO L82 PathProgramCache]: Analyzing trace with hash 256702444, now seen corresponding path program 1 times [2018-12-09 11:19:26,286 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:26,286 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:26,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:26,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:26,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:26,414 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:26,414 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 11:19:26,417 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 11:19:26,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 11:19:26,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:26,427 INFO L87 Difference]: Start difference. First operand 177 states. Second operand 5 states. [2018-12-09 11:19:26,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:26,540 INFO L93 Difference]: Finished difference Result 157 states and 168 transitions. [2018-12-09 11:19:26,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:19:26,541 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-09 11:19:26,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:26,549 INFO L225 Difference]: With dead ends: 157 [2018-12-09 11:19:26,550 INFO L226 Difference]: Without dead ends: 154 [2018-12-09 11:19:26,551 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:26,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-09 11:19:26,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 148. [2018-12-09 11:19:26,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-09 11:19:26,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 159 transitions. [2018-12-09 11:19:26,581 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 159 transitions. Word has length 17 [2018-12-09 11:19:26,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:26,581 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 159 transitions. [2018-12-09 11:19:26,581 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 11:19:26,581 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 159 transitions. [2018-12-09 11:19:26,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 11:19:26,582 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:26,582 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:26,582 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:26,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:26,582 INFO L82 PathProgramCache]: Analyzing trace with hash 256702445, now seen corresponding path program 1 times [2018-12-09 11:19:26,583 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:26,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:26,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,584 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:26,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:26,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:26,670 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:26,670 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 11:19:26,671 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 11:19:26,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 11:19:26,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 11:19:26,672 INFO L87 Difference]: Start difference. First operand 148 states and 159 transitions. Second operand 6 states. [2018-12-09 11:19:26,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:26,766 INFO L93 Difference]: Finished difference Result 153 states and 164 transitions. [2018-12-09 11:19:26,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 11:19:26,766 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-09 11:19:26,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:26,767 INFO L225 Difference]: With dead ends: 153 [2018-12-09 11:19:26,767 INFO L226 Difference]: Without dead ends: 153 [2018-12-09 11:19:26,768 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:19:26,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-09 11:19:26,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 148. [2018-12-09 11:19:26,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-09 11:19:26,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-12-09 11:19:26,774 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 17 [2018-12-09 11:19:26,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:26,774 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-12-09 11:19:26,774 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 11:19:26,774 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-12-09 11:19:26,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 11:19:26,774 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:26,774 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:26,775 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:26,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:26,775 INFO L82 PathProgramCache]: Analyzing trace with hash 285331595, now seen corresponding path program 1 times [2018-12-09 11:19:26,775 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:26,775 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:26,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:26,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:26,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:26,804 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:26,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 11:19:26,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 11:19:26,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 11:19:26,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:26,805 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 5 states. [2018-12-09 11:19:26,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:26,816 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-12-09 11:19:26,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:19:26,816 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-09 11:19:26,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:26,817 INFO L225 Difference]: With dead ends: 147 [2018-12-09 11:19:26,817 INFO L226 Difference]: Without dead ends: 147 [2018-12-09 11:19:26,817 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:26,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-09 11:19:26,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-09 11:19:26,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-09 11:19:26,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-12-09 11:19:26,822 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 17 [2018-12-09 11:19:26,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:26,823 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-12-09 11:19:26,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 11:19:26,823 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-12-09 11:19:26,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 11:19:26,823 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:26,823 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:26,824 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:26,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:26,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1651811587, now seen corresponding path program 1 times [2018-12-09 11:19:26,824 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:26,824 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:26,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:26,825 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:26,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:26,852 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:26,852 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 11:19:26,852 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 11:19:26,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 11:19:26,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:26,852 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 5 states. [2018-12-09 11:19:26,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:26,862 INFO L93 Difference]: Finished difference Result 147 states and 154 transitions. [2018-12-09 11:19:26,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:19:26,862 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 11:19:26,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:26,863 INFO L225 Difference]: With dead ends: 147 [2018-12-09 11:19:26,863 INFO L226 Difference]: Without dead ends: 147 [2018-12-09 11:19:26,863 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:26,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-09 11:19:26,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-12-09 11:19:26,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-12-09 11:19:26,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 152 transitions. [2018-12-09 11:19:26,868 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 152 transitions. Word has length 29 [2018-12-09 11:19:26,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:26,868 INFO L480 AbstractCegarLoop]: Abstraction has 145 states and 152 transitions. [2018-12-09 11:19:26,868 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 11:19:26,868 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 152 transitions. [2018-12-09 11:19:26,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 11:19:26,869 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:26,869 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:26,869 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:26,869 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:26,869 INFO L82 PathProgramCache]: Analyzing trace with hash 654739234, now seen corresponding path program 1 times [2018-12-09 11:19:26,869 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:26,869 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:26,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,870 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:26,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:26,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:26,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:26,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:26,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 11:19:26,942 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 11:19:26,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 11:19:26,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-09 11:19:26,942 INFO L87 Difference]: Start difference. First operand 145 states and 152 transitions. Second operand 9 states. [2018-12-09 11:19:26,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:26,991 INFO L93 Difference]: Finished difference Result 165 states and 173 transitions. [2018-12-09 11:19:26,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 11:19:26,992 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-09 11:19:26,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:26,993 INFO L225 Difference]: With dead ends: 165 [2018-12-09 11:19:26,993 INFO L226 Difference]: Without dead ends: 165 [2018-12-09 11:19:26,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:19:26,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-12-09 11:19:27,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-12-09 11:19:27,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-09 11:19:27,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-09 11:19:27,002 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 29 [2018-12-09 11:19:27,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:27,002 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-09 11:19:27,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 11:19:27,003 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-09 11:19:27,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 11:19:27,003 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:27,003 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:27,004 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:27,004 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:27,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1700792364, now seen corresponding path program 1 times [2018-12-09 11:19:27,004 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:27,004 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:27,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,006 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:27,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:27,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:27,085 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:27,085 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 11:19:27,085 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 11:19:27,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 11:19:27,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:19:27,086 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 11 states. [2018-12-09 11:19:27,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:27,300 INFO L93 Difference]: Finished difference Result 158 states and 165 transitions. [2018-12-09 11:19:27,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 11:19:27,300 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-12-09 11:19:27,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:27,301 INFO L225 Difference]: With dead ends: 158 [2018-12-09 11:19:27,301 INFO L226 Difference]: Without dead ends: 158 [2018-12-09 11:19:27,301 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-09 11:19:27,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-12-09 11:19:27,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-12-09 11:19:27,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-09 11:19:27,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-09 11:19:27,306 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 32 [2018-12-09 11:19:27,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:27,306 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-09 11:19:27,306 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 11:19:27,306 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-09 11:19:27,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 11:19:27,307 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:27,307 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:27,307 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:27,307 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:27,307 INFO L82 PathProgramCache]: Analyzing trace with hash 1700792365, now seen corresponding path program 1 times [2018-12-09 11:19:27,307 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:27,307 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:27,308 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,308 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:27,308 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:27,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:27,340 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:27,340 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 11:19:27,340 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 11:19:27,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 11:19:27,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 11:19:27,340 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 4 states. [2018-12-09 11:19:27,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:27,351 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-09 11:19:27,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 11:19:27,351 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-09 11:19:27,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:27,352 INFO L225 Difference]: With dead ends: 161 [2018-12-09 11:19:27,352 INFO L226 Difference]: Without dead ends: 159 [2018-12-09 11:19:27,352 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:19:27,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-09 11:19:27,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-12-09 11:19:27,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-09 11:19:27,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-09 11:19:27,356 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 32 [2018-12-09 11:19:27,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:27,357 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-09 11:19:27,357 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 11:19:27,357 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-09 11:19:27,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-09 11:19:27,358 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:27,358 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:27,358 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:27,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:27,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1635244048, now seen corresponding path program 1 times [2018-12-09 11:19:27,359 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:27,359 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:27,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:27,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:27,381 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:27,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:27,382 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:27,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:27,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:27,429 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:27,446 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:27,461 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:27,461 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-12-09 11:19:27,462 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 11:19:27,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 11:19:27,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 11:19:27,462 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 6 states. [2018-12-09 11:19:27,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:27,483 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-12-09 11:19:27,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:19:27,484 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-12-09 11:19:27,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:27,484 INFO L225 Difference]: With dead ends: 162 [2018-12-09 11:19:27,485 INFO L226 Difference]: Without dead ends: 160 [2018-12-09 11:19:27,485 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:19:27,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-09 11:19:27,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-12-09 11:19:27,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-09 11:19:27,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 167 transitions. [2018-12-09 11:19:27,489 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 167 transitions. Word has length 33 [2018-12-09 11:19:27,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:27,489 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 167 transitions. [2018-12-09 11:19:27,489 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 11:19:27,489 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 167 transitions. [2018-12-09 11:19:27,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-12-09 11:19:27,490 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:27,490 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:27,490 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:27,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:27,490 INFO L82 PathProgramCache]: Analyzing trace with hash -396753779, now seen corresponding path program 2 times [2018-12-09 11:19:27,490 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:27,491 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:27,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,492 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:27,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:27,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:27,516 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:27,516 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:27,516 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:27,528 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:27,549 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:19:27,549 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:27,552 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:27,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:19:27,579 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:27,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:27,584 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-09 11:19:27,730 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-12-09 11:19:27,755 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:19:27,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [6] total 17 [2018-12-09 11:19:27,755 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-09 11:19:27,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-09 11:19:27,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-12-09 11:19:27,756 INFO L87 Difference]: Start difference. First operand 160 states and 167 transitions. Second operand 17 states. [2018-12-09 11:19:28,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:28,233 INFO L93 Difference]: Finished difference Result 221 states and 230 transitions. [2018-12-09 11:19:28,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 11:19:28,234 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 34 [2018-12-09 11:19:28,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:28,235 INFO L225 Difference]: With dead ends: 221 [2018-12-09 11:19:28,235 INFO L226 Difference]: Without dead ends: 219 [2018-12-09 11:19:28,235 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=515, Unknown=0, NotChecked=0, Total=600 [2018-12-09 11:19:28,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-12-09 11:19:28,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 160. [2018-12-09 11:19:28,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-09 11:19:28,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 167 transitions. [2018-12-09 11:19:28,238 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 167 transitions. Word has length 34 [2018-12-09 11:19:28,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:28,238 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 167 transitions. [2018-12-09 11:19:28,238 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-09 11:19:28,238 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 167 transitions. [2018-12-09 11:19:28,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-09 11:19:28,239 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:28,239 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:28,239 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:28,239 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:28,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1603043185, now seen corresponding path program 1 times [2018-12-09 11:19:28,239 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:28,239 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:28,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,240 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:28,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:28,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:28,295 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:28,295 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 11:19:28,295 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 11:19:28,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 11:19:28,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:19:28,296 INFO L87 Difference]: Start difference. First operand 160 states and 167 transitions. Second operand 7 states. [2018-12-09 11:19:28,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:28,315 INFO L93 Difference]: Finished difference Result 169 states and 176 transitions. [2018-12-09 11:19:28,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 11:19:28,315 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-12-09 11:19:28,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:28,316 INFO L225 Difference]: With dead ends: 169 [2018-12-09 11:19:28,316 INFO L226 Difference]: Without dead ends: 169 [2018-12-09 11:19:28,316 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 11:19:28,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-12-09 11:19:28,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-12-09 11:19:28,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-12-09 11:19:28,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 172 transitions. [2018-12-09 11:19:28,320 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 172 transitions. Word has length 40 [2018-12-09 11:19:28,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:28,320 INFO L480 AbstractCegarLoop]: Abstraction has 165 states and 172 transitions. [2018-12-09 11:19:28,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 11:19:28,320 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 172 transitions. [2018-12-09 11:19:28,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-09 11:19:28,321 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:28,321 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:28,322 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:28,322 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:28,322 INFO L82 PathProgramCache]: Analyzing trace with hash -1089122632, now seen corresponding path program 1 times [2018-12-09 11:19:28,322 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:28,322 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:28,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,323 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:28,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:28,391 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-12-09 11:19:28,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:28,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 11:19:28,391 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 11:19:28,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 11:19:28,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:19:28,392 INFO L87 Difference]: Start difference. First operand 165 states and 172 transitions. Second operand 11 states. [2018-12-09 11:19:28,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:28,552 INFO L93 Difference]: Finished difference Result 163 states and 170 transitions. [2018-12-09 11:19:28,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 11:19:28,552 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-12-09 11:19:28,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:28,553 INFO L225 Difference]: With dead ends: 163 [2018-12-09 11:19:28,553 INFO L226 Difference]: Without dead ends: 163 [2018-12-09 11:19:28,553 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-12-09 11:19:28,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-12-09 11:19:28,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-12-09 11:19:28,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-12-09 11:19:28,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 170 transitions. [2018-12-09 11:19:28,556 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 170 transitions. Word has length 40 [2018-12-09 11:19:28,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:28,556 INFO L480 AbstractCegarLoop]: Abstraction has 163 states and 170 transitions. [2018-12-09 11:19:28,556 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 11:19:28,556 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 170 transitions. [2018-12-09 11:19:28,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-09 11:19:28,557 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:28,557 INFO L402 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:28,557 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:28,557 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:28,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1089122631, now seen corresponding path program 1 times [2018-12-09 11:19:28,557 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:28,557 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:28,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:28,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:28,583 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:28,583 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:28,583 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:28,595 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:28,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:28,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:28,621 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:28,636 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:28,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-12-09 11:19:28,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 11:19:28,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 11:19:28,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-12-09 11:19:28,637 INFO L87 Difference]: Start difference. First operand 163 states and 170 transitions. Second operand 8 states. [2018-12-09 11:19:28,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:28,652 INFO L93 Difference]: Finished difference Result 166 states and 173 transitions. [2018-12-09 11:19:28,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 11:19:28,652 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-12-09 11:19:28,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:28,653 INFO L225 Difference]: With dead ends: 166 [2018-12-09 11:19:28,653 INFO L226 Difference]: Without dead ends: 164 [2018-12-09 11:19:28,653 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-09 11:19:28,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-09 11:19:28,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-12-09 11:19:28,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-12-09 11:19:28,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 171 transitions. [2018-12-09 11:19:28,655 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 171 transitions. Word has length 40 [2018-12-09 11:19:28,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:28,656 INFO L480 AbstractCegarLoop]: Abstraction has 164 states and 171 transitions. [2018-12-09 11:19:28,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 11:19:28,656 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 171 transitions. [2018-12-09 11:19:28,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-09 11:19:28,656 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:28,656 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:28,656 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:28,656 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:28,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1617364353, now seen corresponding path program 1 times [2018-12-09 11:19:28,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:28,657 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:28,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:28,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:28,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:28,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:28,670 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 11:19:28,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 11:19:28,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 11:19:28,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 11:19:28,670 INFO L87 Difference]: Start difference. First operand 164 states and 171 transitions. Second operand 3 states. [2018-12-09 11:19:28,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:28,734 INFO L93 Difference]: Finished difference Result 175 states and 181 transitions. [2018-12-09 11:19:28,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 11:19:28,734 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-12-09 11:19:28,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:28,735 INFO L225 Difference]: With dead ends: 175 [2018-12-09 11:19:28,735 INFO L226 Difference]: Without dead ends: 149 [2018-12-09 11:19:28,735 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 11:19:28,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-09 11:19:28,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 141. [2018-12-09 11:19:28,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-09 11:19:28,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-12-09 11:19:28,738 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 38 [2018-12-09 11:19:28,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:28,738 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-12-09 11:19:28,738 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 11:19:28,738 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-12-09 11:19:28,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-12-09 11:19:28,739 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:28,739 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:28,739 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:28,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:28,739 INFO L82 PathProgramCache]: Analyzing trace with hash -2103669860, now seen corresponding path program 2 times [2018-12-09 11:19:28,739 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:28,740 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:28,740 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,740 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:28,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:28,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:28,772 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:28,772 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:28,772 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:28,781 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:28,799 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:19:28,800 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:28,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:28,810 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:19:28,810 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:28,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:28,814 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-09 11:19:28,961 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-09 11:19:28,976 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:19:28,976 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [8] total 19 [2018-12-09 11:19:28,976 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 11:19:28,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 11:19:28,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=289, Unknown=0, NotChecked=0, Total=342 [2018-12-09 11:19:28,977 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 19 states. [2018-12-09 11:19:29,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:29,459 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-12-09 11:19:29,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-09 11:19:29,459 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 41 [2018-12-09 11:19:29,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:29,460 INFO L225 Difference]: With dead ends: 142 [2018-12-09 11:19:29,460 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 11:19:29,460 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=118, Invalid=694, Unknown=0, NotChecked=0, Total=812 [2018-12-09 11:19:29,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 11:19:29,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-09 11:19:29,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-09 11:19:29,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-12-09 11:19:29,462 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 41 [2018-12-09 11:19:29,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:29,462 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-12-09 11:19:29,462 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 11:19:29,462 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-12-09 11:19:29,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 11:19:29,463 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:29,463 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:29,463 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:29,463 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:29,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1575046783, now seen corresponding path program 1 times [2018-12-09 11:19:29,463 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:29,463 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:29,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,464 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:29,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:29,488 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-09 11:19:29,488 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:29,488 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 11:19:29,489 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 11:19:29,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 11:19:29,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:19:29,489 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 7 states. [2018-12-09 11:19:29,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:29,509 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-12-09 11:19:29,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 11:19:29,510 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 47 [2018-12-09 11:19:29,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:29,510 INFO L225 Difference]: With dead ends: 142 [2018-12-09 11:19:29,510 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 11:19:29,510 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 11:19:29,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 11:19:29,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-09 11:19:29,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-09 11:19:29,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-12-09 11:19:29,514 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 47 [2018-12-09 11:19:29,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:29,514 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-12-09 11:19:29,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 11:19:29,514 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-12-09 11:19:29,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-09 11:19:29,514 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:29,515 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:29,515 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:29,515 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:29,515 INFO L82 PathProgramCache]: Analyzing trace with hash -710961174, now seen corresponding path program 1 times [2018-12-09 11:19:29,515 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:29,515 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:29,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:29,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:29,554 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-09 11:19:29,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:29,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 11:19:29,554 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 11:19:29,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 11:19:29,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-09 11:19:29,555 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 9 states. [2018-12-09 11:19:29,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:29,592 INFO L93 Difference]: Finished difference Result 144 states and 148 transitions. [2018-12-09 11:19:29,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 11:19:29,592 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 52 [2018-12-09 11:19:29,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:29,593 INFO L225 Difference]: With dead ends: 144 [2018-12-09 11:19:29,593 INFO L226 Difference]: Without dead ends: 140 [2018-12-09 11:19:29,594 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:19:29,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-09 11:19:29,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-09 11:19:29,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-09 11:19:29,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-12-09 11:19:29,597 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 52 [2018-12-09 11:19:29,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:29,597 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-12-09 11:19:29,597 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 11:19:29,597 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-12-09 11:19:29,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-09 11:19:29,598 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:29,598 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:29,598 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:29,598 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:29,599 INFO L82 PathProgramCache]: Analyzing trace with hash 1867473601, now seen corresponding path program 1 times [2018-12-09 11:19:29,599 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:29,599 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:29,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,599 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:29,599 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:29,716 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-09 11:19:29,717 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:29,717 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-09 11:19:29,717 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-09 11:19:29,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-09 11:19:29,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-09 11:19:29,717 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 16 states. [2018-12-09 11:19:29,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:29,967 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-12-09 11:19:29,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-09 11:19:29,967 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 63 [2018-12-09 11:19:29,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:29,968 INFO L225 Difference]: With dead ends: 138 [2018-12-09 11:19:29,968 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 11:19:29,968 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-09 11:19:29,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 11:19:29,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-09 11:19:29,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-09 11:19:29,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-12-09 11:19:29,970 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 63 [2018-12-09 11:19:29,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:29,970 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-12-09 11:19:29,970 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-09 11:19:29,970 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-12-09 11:19:29,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-09 11:19:29,970 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:29,970 INFO L402 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:29,971 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:29,971 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:29,971 INFO L82 PathProgramCache]: Analyzing trace with hash 1867473602, now seen corresponding path program 1 times [2018-12-09 11:19:29,971 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:29,971 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:29,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,972 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:29,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:29,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:30,012 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:30,012 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:30,012 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:30,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:30,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:30,051 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:30,062 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:30,077 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:30,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-09 11:19:30,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 11:19:30,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 11:19:30,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-09 11:19:30,078 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 10 states. [2018-12-09 11:19:30,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:30,094 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-12-09 11:19:30,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 11:19:30,094 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 63 [2018-12-09 11:19:30,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:30,095 INFO L225 Difference]: With dead ends: 141 [2018-12-09 11:19:30,095 INFO L226 Difference]: Without dead ends: 139 [2018-12-09 11:19:30,095 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:19:30,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-09 11:19:30,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-12-09 11:19:30,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-12-09 11:19:30,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 143 transitions. [2018-12-09 11:19:30,098 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 143 transitions. Word has length 63 [2018-12-09 11:19:30,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:30,099 INFO L480 AbstractCegarLoop]: Abstraction has 139 states and 143 transitions. [2018-12-09 11:19:30,099 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 11:19:30,099 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 143 transitions. [2018-12-09 11:19:30,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-09 11:19:30,099 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:30,100 INFO L402 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:30,100 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:30,100 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:30,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1992709759, now seen corresponding path program 2 times [2018-12-09 11:19:30,100 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:30,100 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:30,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:30,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:30,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:30,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:30,171 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:30,171 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:30,171 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:30,180 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:30,210 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:19:30,211 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:30,214 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:30,233 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:19:30,233 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:30,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:30,237 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-09 11:19:30,471 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-09 11:19:30,489 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:19:30,489 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [10] total 26 [2018-12-09 11:19:30,489 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 11:19:30,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 11:19:30,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=567, Unknown=0, NotChecked=0, Total=650 [2018-12-09 11:19:30,489 INFO L87 Difference]: Start difference. First operand 139 states and 143 transitions. Second operand 26 states. [2018-12-09 11:19:31,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:31,120 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-12-09 11:19:31,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-09 11:19:31,120 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 64 [2018-12-09 11:19:31,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:31,120 INFO L225 Difference]: With dead ends: 140 [2018-12-09 11:19:31,120 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 11:19:31,121 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=188, Invalid=1372, Unknown=0, NotChecked=0, Total=1560 [2018-12-09 11:19:31,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 11:19:31,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-09 11:19:31,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-09 11:19:31,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-12-09 11:19:31,123 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 64 [2018-12-09 11:19:31,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:31,123 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-12-09 11:19:31,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 11:19:31,123 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-12-09 11:19:31,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 11:19:31,123 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:31,124 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:31,124 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:31,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:31,124 INFO L82 PathProgramCache]: Analyzing trace with hash -1203634192, now seen corresponding path program 1 times [2018-12-09 11:19:31,124 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:31,124 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:31,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,125 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:31,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:31,198 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-09 11:19:31,198 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:31,198 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 11:19:31,198 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 11:19:31,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 11:19:31,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-09 11:19:31,199 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 12 states. [2018-12-09 11:19:31,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:31,261 INFO L93 Difference]: Finished difference Result 144 states and 147 transitions. [2018-12-09 11:19:31,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 11:19:31,261 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 76 [2018-12-09 11:19:31,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:31,262 INFO L225 Difference]: With dead ends: 144 [2018-12-09 11:19:31,262 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 11:19:31,262 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-09 11:19:31,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 11:19:31,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-09 11:19:31,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-09 11:19:31,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-12-09 11:19:31,265 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 76 [2018-12-09 11:19:31,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:31,265 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-12-09 11:19:31,265 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 11:19:31,265 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-12-09 11:19:31,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-09 11:19:31,265 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:31,265 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:31,266 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:31,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:31,266 INFO L82 PathProgramCache]: Analyzing trace with hash -1506633113, now seen corresponding path program 1 times [2018-12-09 11:19:31,266 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:31,266 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:31,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,267 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:31,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:31,378 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-09 11:19:31,378 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:31,378 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-12-09 11:19:31,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-09 11:19:31,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-09 11:19:31,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-12-09 11:19:31,379 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 16 states. [2018-12-09 11:19:31,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:31,658 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-12-09 11:19:31,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 11:19:31,659 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 89 [2018-12-09 11:19:31,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:31,659 INFO L225 Difference]: With dead ends: 145 [2018-12-09 11:19:31,659 INFO L226 Difference]: Without dead ends: 145 [2018-12-09 11:19:31,660 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-12-09 11:19:31,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-12-09 11:19:31,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 136. [2018-12-09 11:19:31,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-09 11:19:31,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-12-09 11:19:31,662 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 89 [2018-12-09 11:19:31,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:31,662 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-12-09 11:19:31,662 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-09 11:19:31,662 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-12-09 11:19:31,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-09 11:19:31,663 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:31,663 INFO L402 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:31,663 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:31,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:31,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1506633112, now seen corresponding path program 1 times [2018-12-09 11:19:31,663 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:31,663 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:31,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:31,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:31,727 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:31,727 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:31,727 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:31,736 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:31,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:31,776 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:31,791 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:31,816 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:31,816 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-12-09 11:19:31,816 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 11:19:31,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 11:19:31,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-12-09 11:19:31,817 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 12 states. [2018-12-09 11:19:31,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:31,839 INFO L93 Difference]: Finished difference Result 139 states and 142 transitions. [2018-12-09 11:19:31,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 11:19:31,839 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 89 [2018-12-09 11:19:31,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:31,840 INFO L225 Difference]: With dead ends: 139 [2018-12-09 11:19:31,840 INFO L226 Difference]: Without dead ends: 137 [2018-12-09 11:19:31,840 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-12-09 11:19:31,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-12-09 11:19:31,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-12-09 11:19:31,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-12-09 11:19:31,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 140 transitions. [2018-12-09 11:19:31,843 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 140 transitions. Word has length 89 [2018-12-09 11:19:31,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:31,843 INFO L480 AbstractCegarLoop]: Abstraction has 137 states and 140 transitions. [2018-12-09 11:19:31,843 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 11:19:31,844 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 140 transitions. [2018-12-09 11:19:31,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-12-09 11:19:31,844 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:31,844 INFO L402 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:31,845 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:31,845 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:31,845 INFO L82 PathProgramCache]: Analyzing trace with hash -370594843, now seen corresponding path program 2 times [2018-12-09 11:19:31,845 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:31,845 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:31,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:31,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:31,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:31,926 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:31,926 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:31,926 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:31,934 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:31,970 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:19:31,970 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:31,975 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:31,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:19:31,984 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:31,990 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:31,990 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-09 11:19:32,297 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-12-09 11:19:32,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:19:32,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [12] total 29 [2018-12-09 11:19:32,313 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-12-09 11:19:32,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-12-09 11:19:32,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=707, Unknown=0, NotChecked=0, Total=812 [2018-12-09 11:19:32,314 INFO L87 Difference]: Start difference. First operand 137 states and 140 transitions. Second operand 29 states. [2018-12-09 11:19:33,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:33,015 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-12-09 11:19:33,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-12-09 11:19:33,016 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 90 [2018-12-09 11:19:33,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:33,016 INFO L225 Difference]: With dead ends: 138 [2018-12-09 11:19:33,016 INFO L226 Difference]: Without dead ends: 136 [2018-12-09 11:19:33,016 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 69 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=258, Invalid=1722, Unknown=0, NotChecked=0, Total=1980 [2018-12-09 11:19:33,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-09 11:19:33,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-09 11:19:33,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-09 11:19:33,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-12-09 11:19:33,019 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 90 [2018-12-09 11:19:33,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:33,019 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-12-09 11:19:33,019 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-12-09 11:19:33,019 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-12-09 11:19:33,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-09 11:19:33,019 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:33,019 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:33,020 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:33,020 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:33,020 INFO L82 PathProgramCache]: Analyzing trace with hash -114537223, now seen corresponding path program 1 times [2018-12-09 11:19:33,020 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:33,020 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:33,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,021 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:33,021 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:33,077 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-09 11:19:33,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:33,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 11:19:33,077 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 11:19:33,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 11:19:33,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-09 11:19:33,078 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 10 states. [2018-12-09 11:19:33,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:33,115 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-12-09 11:19:33,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 11:19:33,115 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 89 [2018-12-09 11:19:33,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:33,116 INFO L225 Difference]: With dead ends: 138 [2018-12-09 11:19:33,116 INFO L226 Difference]: Without dead ends: 136 [2018-12-09 11:19:33,116 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-09 11:19:33,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-12-09 11:19:33,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-12-09 11:19:33,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-09 11:19:33,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-12-09 11:19:33,118 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 89 [2018-12-09 11:19:33,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:33,118 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-12-09 11:19:33,118 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 11:19:33,118 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-12-09 11:19:33,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 11:19:33,119 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:33,119 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:33,119 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:33,119 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:33,119 INFO L82 PathProgramCache]: Analyzing trace with hash 2013127602, now seen corresponding path program 1 times [2018-12-09 11:19:33,120 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:33,120 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:33,120 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:33,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:33,296 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-12-09 11:19:33,297 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:19:33,297 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-09 11:19:33,297 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 11:19:33,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 11:19:33,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-12-09 11:19:33,298 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 20 states. [2018-12-09 11:19:33,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:33,621 INFO L93 Difference]: Finished difference Result 139 states and 141 transitions. [2018-12-09 11:19:33,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-09 11:19:33,622 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 105 [2018-12-09 11:19:33,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:33,622 INFO L225 Difference]: With dead ends: 139 [2018-12-09 11:19:33,622 INFO L226 Difference]: Without dead ends: 139 [2018-12-09 11:19:33,622 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-12-09 11:19:33,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-12-09 11:19:33,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-12-09 11:19:33,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-09 11:19:33,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-09 11:19:33,624 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 105 [2018-12-09 11:19:33,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:33,624 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-09 11:19:33,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 11:19:33,624 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-09 11:19:33,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 11:19:33,625 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:33,625 INFO L402 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:33,625 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:33,625 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:33,625 INFO L82 PathProgramCache]: Analyzing trace with hash 2013127603, now seen corresponding path program 1 times [2018-12-09 11:19:33,625 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:33,625 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:33,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:33,626 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:33,694 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:33,694 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:33,694 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:33,701 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:33,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:33,744 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:33,754 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:33,771 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:33,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-12-09 11:19:33,772 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-09 11:19:33,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-09 11:19:33,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-12-09 11:19:33,772 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 14 states. [2018-12-09 11:19:33,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:33,804 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-12-09 11:19:33,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 11:19:33,804 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 105 [2018-12-09 11:19:33,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:33,805 INFO L225 Difference]: With dead ends: 137 [2018-12-09 11:19:33,805 INFO L226 Difference]: Without dead ends: 135 [2018-12-09 11:19:33,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 105 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-12-09 11:19:33,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-09 11:19:33,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-09 11:19:33,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-09 11:19:33,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-12-09 11:19:33,807 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 105 [2018-12-09 11:19:33,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:33,807 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-12-09 11:19:33,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-09 11:19:33,807 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-12-09 11:19:33,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-12-09 11:19:33,807 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:33,807 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:33,807 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:33,808 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:33,808 INFO L82 PathProgramCache]: Analyzing trace with hash 694410032, now seen corresponding path program 2 times [2018-12-09 11:19:33,808 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:33,808 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:33,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:33,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:33,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:33,886 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:33,886 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:33,886 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:33,893 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:33,935 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:19:33,935 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:33,939 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:33,953 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:19:33,953 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:33,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:33,957 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-12-09 11:19:34,390 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-09 11:19:34,405 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:19:34,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [14] total 35 [2018-12-09 11:19:34,405 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-12-09 11:19:34,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-12-09 11:19:34,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=1050, Unknown=0, NotChecked=0, Total=1190 [2018-12-09 11:19:34,406 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 35 states. [2018-12-09 11:19:35,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:35,677 INFO L93 Difference]: Finished difference Result 136 states and 138 transitions. [2018-12-09 11:19:35,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-12-09 11:19:35,678 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 106 [2018-12-09 11:19:35,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:35,678 INFO L225 Difference]: With dead ends: 136 [2018-12-09 11:19:35,678 INFO L226 Difference]: Without dead ends: 134 [2018-12-09 11:19:35,679 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 79 SyntacticMatches, 7 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=351, Invalid=2619, Unknown=0, NotChecked=0, Total=2970 [2018-12-09 11:19:35,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-09 11:19:35,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-12-09 11:19:35,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-12-09 11:19:35,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-12-09 11:19:35,680 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 106 [2018-12-09 11:19:35,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:35,680 INFO L480 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-12-09 11:19:35,680 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-12-09 11:19:35,680 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-12-09 11:19:35,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-12-09 11:19:35,681 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:35,681 INFO L402 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:35,681 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:35,681 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:35,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1729876608, now seen corresponding path program 1 times [2018-12-09 11:19:35,681 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:35,681 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:35,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:35,682 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:35,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:35,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:35,751 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:35,752 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:35,752 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:35,760 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:35,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:35,799 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:35,812 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:35,827 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:35,827 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-12-09 11:19:35,828 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-12-09 11:19:35,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-12-09 11:19:35,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-12-09 11:19:35,828 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 16 states. [2018-12-09 11:19:35,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:35,855 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-12-09 11:19:35,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 11:19:35,855 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 112 [2018-12-09 11:19:35,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:35,856 INFO L225 Difference]: With dead ends: 137 [2018-12-09 11:19:35,856 INFO L226 Difference]: Without dead ends: 135 [2018-12-09 11:19:35,856 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-12-09 11:19:35,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-09 11:19:35,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-12-09 11:19:35,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-12-09 11:19:35,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-12-09 11:19:35,857 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 112 [2018-12-09 11:19:35,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:35,858 INFO L480 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-12-09 11:19:35,858 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-12-09 11:19:35,858 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-12-09 11:19:35,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 11:19:35,858 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:35,858 INFO L402 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:35,858 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:35,858 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:35,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1998405475, now seen corresponding path program 2 times [2018-12-09 11:19:35,859 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:35,859 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:35,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:35,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:35,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:35,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:35,963 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:35,963 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:35,963 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:35,970 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:36,010 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:19:36,011 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:36,016 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:36,087 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 11:19:36,088 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 11:19:36,088 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,089 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,090 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,090 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-12-09 11:19:36,168 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:19:36,170 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:19:36,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 11:19:36,174 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-12-09 11:19:36,789 WARN L854 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-12-09 11:19:36,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-12-09 11:19:36,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:19:36,798 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-12-09 11:19:36,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:19:36,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:19:36,804 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-12-09 11:19:36,804 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,809 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,812 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:36,815 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-12-09 11:19:37,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:19:37,145 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-12-09 11:19:37,146 INFO L683 Elim1Store]: detected equality via solver [2018-12-09 11:19:37,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:19:37,148 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-12-09 11:19:37,148 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:37,150 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:37,152 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:37,152 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-12-09 11:19:37,453 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-09 11:19:37,456 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-09 11:19:37,456 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:19:37,458 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:37,458 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:19:37,458 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-09 11:19:37,495 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-12-09 11:19:37,518 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:19:37,518 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [43] imperfect sequences [16] total 57 [2018-12-09 11:19:37,519 INFO L459 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-12-09 11:19:37,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-12-09 11:19:37,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=2881, Unknown=1, NotChecked=108, Total=3192 [2018-12-09 11:19:37,519 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 57 states. [2018-12-09 11:19:39,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:39,729 INFO L93 Difference]: Finished difference Result 116 states and 116 transitions. [2018-12-09 11:19:39,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-12-09 11:19:39,730 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 113 [2018-12-09 11:19:39,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:39,730 INFO L225 Difference]: With dead ends: 116 [2018-12-09 11:19:39,730 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 11:19:39,731 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 89 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1506 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=508, Invalid=7505, Unknown=1, NotChecked=176, Total=8190 [2018-12-09 11:19:39,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 11:19:39,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-12-09 11:19:39,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-09 11:19:39,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions. [2018-12-09 11:19:39,733 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 113 [2018-12-09 11:19:39,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:39,733 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 114 transitions. [2018-12-09 11:19:39,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-12-09 11:19:39,733 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions. [2018-12-09 11:19:39,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 11:19:39,733 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:39,733 INFO L402 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:39,734 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:39,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:39,734 INFO L82 PathProgramCache]: Analyzing trace with hash 2034289743, now seen corresponding path program 1 times [2018-12-09 11:19:39,734 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:39,734 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:39,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:39,735 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:39,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:39,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:39,855 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:39,855 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:39,855 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:39,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:39,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:39,909 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:39,939 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:39,953 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:39,954 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-12-09 11:19:39,954 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-12-09 11:19:39,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-12-09 11:19:39,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-12-09 11:19:39,954 INFO L87 Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 18 states. [2018-12-09 11:19:39,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:39,977 INFO L93 Difference]: Finished difference Result 117 states and 117 transitions. [2018-12-09 11:19:39,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 11:19:39,977 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 113 [2018-12-09 11:19:39,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:39,977 INFO L225 Difference]: With dead ends: 117 [2018-12-09 11:19:39,977 INFO L226 Difference]: Without dead ends: 115 [2018-12-09 11:19:39,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-12-09 11:19:39,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-09 11:19:39,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-12-09 11:19:39,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-09 11:19:39,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 115 transitions. [2018-12-09 11:19:39,980 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 115 transitions. Word has length 113 [2018-12-09 11:19:39,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:39,980 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 115 transitions. [2018-12-09 11:19:39,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-12-09 11:19:39,980 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 115 transitions. [2018-12-09 11:19:39,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-09 11:19:39,981 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:39,981 INFO L402 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:39,981 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:39,981 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:39,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1646917324, now seen corresponding path program 2 times [2018-12-09 11:19:39,981 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:39,982 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:39,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:39,982 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:19:39,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:39,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:40,094 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:40,094 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:40,094 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:40,101 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 11:19:40,154 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 11:19:40,154 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:19:40,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:19:40,171 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:40,186 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:19:40,186 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-12-09 11:19:40,187 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 11:19:40,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 11:19:40,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-12-09 11:19:40,187 INFO L87 Difference]: Start difference. First operand 115 states and 115 transitions. Second operand 19 states. [2018-12-09 11:19:40,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:19:40,217 INFO L93 Difference]: Finished difference Result 118 states and 118 transitions. [2018-12-09 11:19:40,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-09 11:19:40,217 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 114 [2018-12-09 11:19:40,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:19:40,217 INFO L225 Difference]: With dead ends: 118 [2018-12-09 11:19:40,217 INFO L226 Difference]: Without dead ends: 116 [2018-12-09 11:19:40,218 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-12-09 11:19:40,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-09 11:19:40,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-09 11:19:40,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-09 11:19:40,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-12-09 11:19:40,219 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 114 [2018-12-09 11:19:40,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:19:40,219 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-12-09 11:19:40,219 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 11:19:40,219 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-12-09 11:19:40,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 11:19:40,220 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:19:40,220 INFO L402 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:19:40,220 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:19:40,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:19:40,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1771693073, now seen corresponding path program 3 times [2018-12-09 11:19:40,220 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:19:40,220 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:19:40,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:40,221 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:19:40,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:19:40,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:19:40,334 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:19:40,335 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:19:40,335 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:19:40,341 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 11:20:00,565 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-12-09 11:20:00,566 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:20:00,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:00,777 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:00,795 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:20:00,795 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 23] total 40 [2018-12-09 11:20:00,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-12-09 11:20:00,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-12-09 11:20:00,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=1090, Unknown=0, NotChecked=0, Total=1560 [2018-12-09 11:20:00,796 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 40 states. [2018-12-09 11:20:00,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:00,864 INFO L93 Difference]: Finished difference Result 119 states and 119 transitions. [2018-12-09 11:20:00,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-09 11:20:00,865 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 115 [2018-12-09 11:20:00,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:00,865 INFO L225 Difference]: With dead ends: 119 [2018-12-09 11:20:00,865 INFO L226 Difference]: Without dead ends: 117 [2018-12-09 11:20:00,865 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=512, Invalid=1210, Unknown=0, NotChecked=0, Total=1722 [2018-12-09 11:20:00,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-09 11:20:00,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-12-09 11:20:00,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-12-09 11:20:00,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-12-09 11:20:00,868 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 115 [2018-12-09 11:20:00,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:00,868 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-12-09 11:20:00,868 INFO L481 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-12-09 11:20:00,868 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-12-09 11:20:00,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-12-09 11:20:00,869 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:00,869 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:00,869 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-12-09 11:20:00,869 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:00,869 INFO L82 PathProgramCache]: Analyzing trace with hash -374432980, now seen corresponding path program 4 times [2018-12-09 11:20:00,869 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 11:20:00,870 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 11:20:00,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:20:00,870 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:20:00,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 11:20:00,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 11:20:00,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 11:20:00,958 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 11:20:00,967 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-09 11:20:00,972 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-09 11:20:00,975 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 11:20:00,975 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 11:20:00,984 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 11:20:00 BoogieIcfgContainer [2018-12-09 11:20:00,985 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 11:20:00,985 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 11:20:00,985 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 11:20:00,985 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 11:20:00,985 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 11:19:26" (3/4) ... [2018-12-09 11:20:00,988 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-09 11:20:00,988 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 11:20:00,988 INFO L168 Benchmark]: Toolchain (without parser) took 35686.87 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 429.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -98.3 MB). Peak memory consumption was 331.6 MB. Max. memory is 11.5 GB. [2018-12-09 11:20:00,989 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 11:20:00,989 INFO L168 Benchmark]: CACSL2BoogieTranslator took 335.52 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -100.3 MB). Peak memory consumption was 30.9 MB. Max. memory is 11.5 GB. [2018-12-09 11:20:00,990 INFO L168 Benchmark]: Boogie Preprocessor took 44.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 11:20:00,990 INFO L168 Benchmark]: RCFGBuilder took 529.15 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 954.2 MB in the end (delta: 102.1 MB). Peak memory consumption was 102.1 MB. Max. memory is 11.5 GB. [2018-12-09 11:20:00,990 INFO L168 Benchmark]: TraceAbstraction took 34771.30 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 342.4 MB). Free memory was 954.2 MB in the beginning and 1.1 GB in the end (delta: -100.1 MB). Peak memory consumption was 242.3 MB. Max. memory is 11.5 GB. [2018-12-09 11:20:00,990 INFO L168 Benchmark]: Witness Printer took 3.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 11:20:00,991 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 335.52 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -100.3 MB). Peak memory consumption was 30.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 529.15 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 954.2 MB in the end (delta: 102.1 MB). Peak memory consumption was 102.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 34771.30 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 342.4 MB). Free memory was 954.2 MB in the beginning and 1.1 GB in the end (delta: -100.1 MB). Peak memory consumption was 242.3 MB. Max. memory is 11.5 GB. * Witness Printer took 3.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 17 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 18 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={30:0}] [L1453] CALL entry_point() VAL [ldv_global_msg_list={30:0}] [L1445] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1446] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={30:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={30:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={25:0}, ldv_global_msg_list={30:0}, malloc(size)={25:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={30:0}, ldv_malloc(sizeof(*kobj))={25:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={25:0}, ldv_global_msg_list={30:0}, memset(kobj, 0, sizeof(*kobj))={25:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={25:12}, ldv_global_msg_list={30:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={25:12}, kref={25:12}, ldv_global_msg_list={30:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={30:0}, list={25:4}] [L1099] list->next = list VAL [ldv_global_msg_list={30:0}, list={25:4}, list={25:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={30:0}, list={25:4}, list={25:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1414] return kobj; VAL [\result={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1446] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={30:0}, ldv_kobject_create()={25:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={25:12}, ldv_global_msg_list={30:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={25:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={25:12}, v={25:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=2, v={25:12}, v={25:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={30:0}, temp=2, v={25:12}, v={25:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={25:12}, kref={25:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={30:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1375] return kobj; VAL [\result={25:0}, kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}, ldv_kobject_get(kobj)={25:0}] [L1447] RET f_22_get(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={25:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={25:12}, ldv_global_msg_list={30:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={30:0}, v={25:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, v={25:12}, v={25:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={25:12}, v={25:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={25:12}, v={25:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={30:0}, temp=1, v={25:12}, v={25:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={25:12}, kref={25:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={25:12}, kref={25:12}, ldv_global_msg_list={30:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={25:12}, kref={25:12}, ldv_global_msg_list={30:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={25:0}, kobj={25:0}, ldv_global_msg_list={30:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] RET ldv_kobject_put(kobj) VAL [kobj={25:0}, ldv_global_msg_list={30:0}] [L1453] RET entry_point() VAL [ldv_global_msg_list={30:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 45 procedures, 319 locations, 67 error locations. UNSAFE Result, 34.7s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 7.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4019 SDtfs, 911 SDslu, 32532 SDs, 0 SdLazy, 11999 SolverSat, 228 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1702 GetRequests, 1116 SyntacticMatches, 20 SemanticMatches, 566 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3650 ImplicationChecksByTransitivity, 6.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=177occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 106 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 20.8s SatisfiabilityAnalysisTime, 5.0s InterpolantComputationTime, 3392 NumberOfCodeBlocks, 3350 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3229 ConstructedInterpolants, 174 QuantifiedInterpolants, 608923 SizeOfPredicates, 114 NumberOfNonLiveVariables, 6119 ConjunctsInSsa, 586 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-09 11:20:02,220 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 11:20:02,221 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 11:20:02,227 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 11:20:02,227 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 11:20:02,228 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 11:20:02,229 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 11:20:02,229 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 11:20:02,230 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 11:20:02,231 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 11:20:02,231 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 11:20:02,231 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 11:20:02,232 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 11:20:02,232 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 11:20:02,233 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 11:20:02,233 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 11:20:02,234 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 11:20:02,234 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 11:20:02,235 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 11:20:02,236 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 11:20:02,237 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 11:20:02,237 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 11:20:02,239 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 11:20:02,239 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 11:20:02,239 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 11:20:02,239 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 11:20:02,240 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 11:20:02,240 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 11:20:02,241 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 11:20:02,241 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 11:20:02,241 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 11:20:02,242 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 11:20:02,242 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 11:20:02,242 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 11:20:02,243 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 11:20:02,243 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 11:20:02,243 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2018-12-09 11:20:02,250 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 11:20:02,250 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 11:20:02,251 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 11:20:02,251 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 11:20:02,252 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 11:20:02,252 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 11:20:02,252 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 11:20:02,252 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 11:20:02,252 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 11:20:02,252 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 11:20:02,252 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 11:20:02,252 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-09 11:20:02,253 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 11:20:02,254 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 11:20:02,254 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 11:20:02,254 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 11:20:02,254 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 11:20:02,254 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 11:20:02,254 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 11:20:02,254 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 11:20:02,255 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 11:20:02,255 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-09 11:20:02,255 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 11:20:02,255 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-09 11:20:02,255 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc6894f63179c5a0c3641b97a75e8f614c456bea [2018-12-09 11:20:02,273 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 11:20:02,283 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 11:20:02,285 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 11:20:02,287 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 11:20:02,287 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 11:20:02,288 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-09 11:20:02,328 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/28ddb8e61/f121dcb815d1407baa9ed3ae230ef33b/FLAG1f9c85304 [2018-12-09 11:20:02,758 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 11:20:02,759 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/sv-benchmarks/c/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-09 11:20:02,769 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/28ddb8e61/f121dcb815d1407baa9ed3ae230ef33b/FLAG1f9c85304 [2018-12-09 11:20:02,780 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/data/28ddb8e61/f121dcb815d1407baa9ed3ae230ef33b [2018-12-09 11:20:02,783 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 11:20:02,783 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-12-09 11:20:02,784 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 11:20:02,784 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 11:20:02,786 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 11:20:02,787 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 11:20:02" (1/1) ... [2018-12-09 11:20:02,788 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d255691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:02, skipping insertion in model container [2018-12-09 11:20:02,788 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 11:20:02" (1/1) ... [2018-12-09 11:20:02,793 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 11:20:02,816 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 11:20:03,004 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 11:20:03,016 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 11:20:03,083 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 11:20:03,115 INFO L195 MainTranslator]: Completed translation [2018-12-09 11:20:03,116 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03 WrapperNode [2018-12-09 11:20:03,116 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 11:20:03,116 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 11:20:03,116 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 11:20:03,116 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 11:20:03,124 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,124 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,136 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,136 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,151 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,154 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,157 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... [2018-12-09 11:20:03,161 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 11:20:03,161 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 11:20:03,161 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 11:20:03,161 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 11:20:03,162 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 11:20:03,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 11:20:03,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 11:20:03,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 11:20:03,192 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-12-09 11:20:03,192 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-12-09 11:20:03,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-12-09 11:20:03,194 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-09 11:20:03,195 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-12-09 11:20:03,195 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-12-09 11:20:03,195 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-12-09 11:20:03,195 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-12-09 11:20:03,195 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-12-09 11:20:03,195 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-12-09 11:20:03,195 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-12-09 11:20:03,196 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-12-09 11:20:03,197 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-12-09 11:20:03,198 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-12-09 11:20:03,199 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-12-09 11:20:03,200 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-12-09 11:20:03,201 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 11:20:03,202 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-12-09 11:20:03,203 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-12-09 11:20:03,204 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_get [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure f_22_put [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-12-09 11:20:03,205 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-12-09 11:20:03,479 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 11:20:03,712 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-09 11:20:03,909 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 11:20:03,910 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-12-09 11:20:03,910 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 11:20:03 BoogieIcfgContainer [2018-12-09 11:20:03,910 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 11:20:03,910 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 11:20:03,911 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 11:20:03,912 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 11:20:03,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 11:20:02" (1/3) ... [2018-12-09 11:20:03,913 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a7f4317 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 11:20:03, skipping insertion in model container [2018-12-09 11:20:03,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 11:20:03" (2/3) ... [2018-12-09 11:20:03,913 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a7f4317 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 11:20:03, skipping insertion in model container [2018-12-09 11:20:03,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 11:20:03" (3/3) ... [2018-12-09 11:20:03,914 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-12-09 11:20:03,921 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 11:20:03,926 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-12-09 11:20:03,936 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-12-09 11:20:03,951 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 11:20:03,952 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 11:20:03,952 INFO L383 AbstractCegarLoop]: Hoare is false [2018-12-09 11:20:03,952 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 11:20:03,952 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 11:20:03,952 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 11:20:03,952 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 11:20:03,952 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 11:20:03,952 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 11:20:03,963 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states. [2018-12-09 11:20:03,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 11:20:03,969 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:03,970 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:03,972 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:03,975 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:03,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1631349868, now seen corresponding path program 1 times [2018-12-09 11:20:03,978 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:03,978 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:03,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:04,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:04,050 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:04,078 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:04,079 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:04,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:04,084 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 11:20:04,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:04,101 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:04,103 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:04,104 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 11:20:04,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 11:20:04,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 11:20:04,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:04,115 INFO L87 Difference]: Start difference. First operand 176 states. Second operand 5 states. [2018-12-09 11:20:04,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:04,330 INFO L93 Difference]: Finished difference Result 156 states and 167 transitions. [2018-12-09 11:20:04,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:20:04,331 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-09 11:20:04,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:04,339 INFO L225 Difference]: With dead ends: 156 [2018-12-09 11:20:04,339 INFO L226 Difference]: Without dead ends: 153 [2018-12-09 11:20:04,340 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:04,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-12-09 11:20:04,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 147. [2018-12-09 11:20:04,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-09 11:20:04,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 158 transitions. [2018-12-09 11:20:04,369 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 158 transitions. Word has length 17 [2018-12-09 11:20:04,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:04,370 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 158 transitions. [2018-12-09 11:20:04,370 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 11:20:04,370 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 158 transitions. [2018-12-09 11:20:04,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 11:20:04,370 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:04,370 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:04,371 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:04,371 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:04,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1631349869, now seen corresponding path program 1 times [2018-12-09 11:20:04,371 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:04,371 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:04,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:04,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:04,423 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:04,432 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:04,432 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:04,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:04,438 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 11:20:04,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:04,468 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:04,469 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:04,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 11:20:04,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 11:20:04,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 11:20:04,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 11:20:04,471 INFO L87 Difference]: Start difference. First operand 147 states and 158 transitions. Second operand 6 states. [2018-12-09 11:20:04,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:04,718 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-12-09 11:20:04,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 11:20:04,719 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-12-09 11:20:04,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:04,719 INFO L225 Difference]: With dead ends: 152 [2018-12-09 11:20:04,720 INFO L226 Difference]: Without dead ends: 152 [2018-12-09 11:20:04,720 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:20:04,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-09 11:20:04,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 147. [2018-12-09 11:20:04,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-09 11:20:04,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 157 transitions. [2018-12-09 11:20:04,726 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 157 transitions. Word has length 17 [2018-12-09 11:20:04,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:04,726 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 157 transitions. [2018-12-09 11:20:04,727 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 11:20:04,727 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 157 transitions. [2018-12-09 11:20:04,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-12-09 11:20:04,727 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:04,727 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:04,727 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:04,727 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:04,728 INFO L82 PathProgramCache]: Analyzing trace with hash 1659979019, now seen corresponding path program 1 times [2018-12-09 11:20:04,728 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:04,728 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:04,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:04,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:04,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:04,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:04,788 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:04,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:04,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 11:20:04,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 11:20:04,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 11:20:04,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:04,790 INFO L87 Difference]: Start difference. First operand 147 states and 157 transitions. Second operand 5 states. [2018-12-09 11:20:04,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:04,806 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2018-12-09 11:20:04,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:20:04,806 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-12-09 11:20:04,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:04,807 INFO L225 Difference]: With dead ends: 146 [2018-12-09 11:20:04,808 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 11:20:04,808 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:04,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 11:20:04,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-09 11:20:04,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-09 11:20:04,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 152 transitions. [2018-12-09 11:20:04,816 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 152 transitions. Word has length 17 [2018-12-09 11:20:04,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:04,816 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 152 transitions. [2018-12-09 11:20:04,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 11:20:04,817 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 152 transitions. [2018-12-09 11:20:04,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 11:20:04,817 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:04,817 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:04,818 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:04,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:04,818 INFO L82 PathProgramCache]: Analyzing trace with hash 581616962, now seen corresponding path program 1 times [2018-12-09 11:20:04,819 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:04,819 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:04,833 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:04,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:04,864 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:04,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:04,877 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:04,878 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:04,878 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 11:20:04,878 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 11:20:04,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 11:20:04,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:04,879 INFO L87 Difference]: Start difference. First operand 144 states and 152 transitions. Second operand 5 states. [2018-12-09 11:20:04,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:04,899 INFO L93 Difference]: Finished difference Result 146 states and 153 transitions. [2018-12-09 11:20:04,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 11:20:04,899 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 11:20:04,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:04,900 INFO L225 Difference]: With dead ends: 146 [2018-12-09 11:20:04,900 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 11:20:04,901 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:04,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 11:20:04,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-09 11:20:04,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-09 11:20:04,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 151 transitions. [2018-12-09 11:20:04,908 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 151 transitions. Word has length 29 [2018-12-09 11:20:04,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:04,908 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 151 transitions. [2018-12-09 11:20:04,908 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 11:20:04,908 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 151 transitions. [2018-12-09 11:20:04,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 11:20:04,909 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:04,909 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:04,909 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:04,909 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:04,910 INFO L82 PathProgramCache]: Analyzing trace with hash -415455391, now seen corresponding path program 1 times [2018-12-09 11:20:04,910 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:04,910 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:04,925 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:04,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:04,974 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:05,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:05,037 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:05,038 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:05,039 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 11:20:05,039 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 11:20:05,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 11:20:05,039 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-09 11:20:05,039 INFO L87 Difference]: Start difference. First operand 144 states and 151 transitions. Second operand 9 states. [2018-12-09 11:20:05,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:05,129 INFO L93 Difference]: Finished difference Result 164 states and 172 transitions. [2018-12-09 11:20:05,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 11:20:05,129 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-12-09 11:20:05,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:05,130 INFO L225 Difference]: With dead ends: 164 [2018-12-09 11:20:05,130 INFO L226 Difference]: Without dead ends: 164 [2018-12-09 11:20:05,131 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:20:05,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-09 11:20:05,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 158. [2018-12-09 11:20:05,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-12-09 11:20:05,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-12-09 11:20:05,137 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 29 [2018-12-09 11:20:05,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:05,138 INFO L480 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-12-09 11:20:05,138 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 11:20:05,138 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-12-09 11:20:05,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 11:20:05,139 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:05,139 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:05,139 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:05,139 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:05,140 INFO L82 PathProgramCache]: Analyzing trace with hash -639527829, now seen corresponding path program 1 times [2018-12-09 11:20:05,140 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:05,140 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:05,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:05,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:05,209 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:05,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:05,218 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:05,219 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:05,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 11:20:05,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 11:20:05,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 11:20:05,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 11:20:05,220 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 4 states. [2018-12-09 11:20:05,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:05,258 INFO L93 Difference]: Finished difference Result 161 states and 168 transitions. [2018-12-09 11:20:05,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 11:20:05,259 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-12-09 11:20:05,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:05,259 INFO L225 Difference]: With dead ends: 161 [2018-12-09 11:20:05,259 INFO L226 Difference]: Without dead ends: 159 [2018-12-09 11:20:05,259 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 11:20:05,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-09 11:20:05,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-12-09 11:20:05,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-12-09 11:20:05,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-12-09 11:20:05,263 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 32 [2018-12-09 11:20:05,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:05,263 INFO L480 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-12-09 11:20:05,264 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 11:20:05,264 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-12-09 11:20:05,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-12-09 11:20:05,264 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:05,264 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:05,264 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:05,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:05,265 INFO L82 PathProgramCache]: Analyzing trace with hash 600235342, now seen corresponding path program 1 times [2018-12-09 11:20:05,265 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:05,265 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:05,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:05,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:05,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:05,346 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:05,346 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 11:20:05,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:05,396 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:20:05,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-12-09 11:20:05,396 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 11:20:05,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 11:20:05,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-09 11:20:05,396 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 8 states. [2018-12-09 11:20:05,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:05,493 INFO L93 Difference]: Finished difference Result 166 states and 174 transitions. [2018-12-09 11:20:05,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 11:20:05,494 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-12-09 11:20:05,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:05,495 INFO L225 Difference]: With dead ends: 166 [2018-12-09 11:20:05,495 INFO L226 Difference]: Without dead ends: 162 [2018-12-09 11:20:05,495 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-09 11:20:05,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-12-09 11:20:05,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-12-09 11:20:05,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-12-09 11:20:05,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 169 transitions. [2018-12-09 11:20:05,501 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 169 transitions. Word has length 33 [2018-12-09 11:20:05,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:05,501 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 169 transitions. [2018-12-09 11:20:05,501 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 11:20:05,501 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 169 transitions. [2018-12-09 11:20:05,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-09 11:20:05,502 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:05,503 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:05,503 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:05,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:05,503 INFO L82 PathProgramCache]: Analyzing trace with hash -849464021, now seen corresponding path program 2 times [2018-12-09 11:20:05,504 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:05,504 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:05,519 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-09 11:20:05,571 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:20:05,572 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:20:05,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:05,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:05,577 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:05,579 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:05,579 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 11:20:05,695 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-12-09 11:20:05,695 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:05,697 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:05,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 11:20:05,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 11:20:05,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 11:20:05,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-09 11:20:05,698 INFO L87 Difference]: Start difference. First operand 162 states and 169 transitions. Second operand 13 states. [2018-12-09 11:20:06,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:06,677 INFO L93 Difference]: Finished difference Result 173 states and 179 transitions. [2018-12-09 11:20:06,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 11:20:06,678 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 36 [2018-12-09 11:20:06,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:06,679 INFO L225 Difference]: With dead ends: 173 [2018-12-09 11:20:06,679 INFO L226 Difference]: Without dead ends: 173 [2018-12-09 11:20:06,679 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-09 11:20:06,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-12-09 11:20:06,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 161. [2018-12-09 11:20:06,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-12-09 11:20:06,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-12-09 11:20:06,685 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 36 [2018-12-09 11:20:06,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:06,686 INFO L480 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-12-09 11:20:06,686 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 11:20:06,686 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-12-09 11:20:06,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-12-09 11:20:06,687 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:06,687 INFO L402 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:06,688 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:06,688 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:06,688 INFO L82 PathProgramCache]: Analyzing trace with hash -849464020, now seen corresponding path program 1 times [2018-12-09 11:20:06,689 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:06,689 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:06,720 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:20:06,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:06,819 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:06,844 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:06,844 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 11:20:06,984 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:06,986 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:20:06,986 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-12-09 11:20:06,987 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-09 11:20:06,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-09 11:20:06,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-12-09 11:20:06,987 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 14 states. [2018-12-09 11:20:07,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:07,491 INFO L93 Difference]: Finished difference Result 171 states and 182 transitions. [2018-12-09 11:20:07,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-09 11:20:07,492 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 36 [2018-12-09 11:20:07,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:07,492 INFO L225 Difference]: With dead ends: 171 [2018-12-09 11:20:07,493 INFO L226 Difference]: Without dead ends: 167 [2018-12-09 11:20:07,493 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=131, Invalid=211, Unknown=0, NotChecked=0, Total=342 [2018-12-09 11:20:07,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-12-09 11:20:07,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-12-09 11:20:07,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-09 11:20:07,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 174 transitions. [2018-12-09 11:20:07,497 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 174 transitions. Word has length 36 [2018-12-09 11:20:07,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:07,497 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 174 transitions. [2018-12-09 11:20:07,497 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-09 11:20:07,497 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 174 transitions. [2018-12-09 11:20:07,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-09 11:20:07,498 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:07,498 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:07,498 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:07,499 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:07,499 INFO L82 PathProgramCache]: Analyzing trace with hash -872830515, now seen corresponding path program 1 times [2018-12-09 11:20:07,499 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:07,499 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:07,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:07,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:07,574 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:07,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:07,616 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:07,617 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:07,617 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 11:20:07,618 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 11:20:07,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 11:20:07,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:20:07,618 INFO L87 Difference]: Start difference. First operand 167 states and 174 transitions. Second operand 7 states. [2018-12-09 11:20:07,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:07,647 INFO L93 Difference]: Finished difference Result 176 states and 183 transitions. [2018-12-09 11:20:07,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 11:20:07,648 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-12-09 11:20:07,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:07,649 INFO L225 Difference]: With dead ends: 176 [2018-12-09 11:20:07,649 INFO L226 Difference]: Without dead ends: 176 [2018-12-09 11:20:07,649 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 11:20:07,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-12-09 11:20:07,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 172. [2018-12-09 11:20:07,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-12-09 11:20:07,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 179 transitions. [2018-12-09 11:20:07,652 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 179 transitions. Word has length 40 [2018-12-09 11:20:07,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:07,652 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 179 transitions. [2018-12-09 11:20:07,652 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 11:20:07,652 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 179 transitions. [2018-12-09 11:20:07,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-12-09 11:20:07,652 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:07,652 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:07,652 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:07,653 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:07,653 INFO L82 PathProgramCache]: Analyzing trace with hash 1431338402, now seen corresponding path program 1 times [2018-12-09 11:20:07,653 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:07,653 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:07,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:07,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:07,690 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:07,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:07,695 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:07,696 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:07,696 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 11:20:07,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 11:20:07,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 11:20:07,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 11:20:07,696 INFO L87 Difference]: Start difference. First operand 172 states and 179 transitions. Second operand 3 states. [2018-12-09 11:20:07,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:07,801 INFO L93 Difference]: Finished difference Result 183 states and 189 transitions. [2018-12-09 11:20:07,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 11:20:07,801 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-12-09 11:20:07,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:07,802 INFO L225 Difference]: With dead ends: 183 [2018-12-09 11:20:07,802 INFO L226 Difference]: Without dead ends: 157 [2018-12-09 11:20:07,802 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 11:20:07,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-09 11:20:07,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 149. [2018-12-09 11:20:07,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-09 11:20:07,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 155 transitions. [2018-12-09 11:20:07,805 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 155 transitions. Word has length 38 [2018-12-09 11:20:07,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:07,805 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 155 transitions. [2018-12-09 11:20:07,805 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 11:20:07,805 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 155 transitions. [2018-12-09 11:20:07,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-09 11:20:07,806 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:07,806 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:07,806 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:07,806 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:07,806 INFO L82 PathProgramCache]: Analyzing trace with hash 361968204, now seen corresponding path program 2 times [2018-12-09 11:20:07,806 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:07,807 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:07,829 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-09 11:20:07,879 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:20:07,879 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:20:07,881 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:07,889 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:07,889 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:07,894 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:07,894 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 11:20:08,040 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-12-09 11:20:08,040 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:08,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:08,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 11:20:08,042 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 11:20:08,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 11:20:08,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-09 11:20:08,043 INFO L87 Difference]: Start difference. First operand 149 states and 155 transitions. Second operand 13 states. [2018-12-09 11:20:09,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:09,048 INFO L93 Difference]: Finished difference Result 148 states and 154 transitions. [2018-12-09 11:20:09,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 11:20:09,048 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 42 [2018-12-09 11:20:09,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:09,049 INFO L225 Difference]: With dead ends: 148 [2018-12-09 11:20:09,049 INFO L226 Difference]: Without dead ends: 148 [2018-12-09 11:20:09,049 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-09 11:20:09,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-12-09 11:20:09,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-12-09 11:20:09,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-09 11:20:09,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-12-09 11:20:09,052 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 42 [2018-12-09 11:20:09,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:09,052 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-12-09 11:20:09,052 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 11:20:09,052 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-12-09 11:20:09,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-09 11:20:09,052 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:09,052 INFO L402 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:09,053 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:09,053 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:09,053 INFO L82 PathProgramCache]: Analyzing trace with hash 1098993020, now seen corresponding path program 1 times [2018-12-09 11:20:09,053 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:09,053 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:09,074 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:20:09,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:09,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:09,257 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:09,257 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 11:20:09,645 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:20:09,647 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 11:20:09,647 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-12-09 11:20:09,647 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-12-09 11:20:09,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-12-09 11:20:09,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=472, Unknown=0, NotChecked=0, Total=650 [2018-12-09 11:20:09,648 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 26 states. [2018-12-09 11:20:10,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:10,572 INFO L93 Difference]: Finished difference Result 158 states and 168 transitions. [2018-12-09 11:20:10,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 11:20:10,573 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 47 [2018-12-09 11:20:10,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:10,573 INFO L225 Difference]: With dead ends: 158 [2018-12-09 11:20:10,573 INFO L226 Difference]: Without dead ends: 154 [2018-12-09 11:20:10,574 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=278, Invalid=652, Unknown=0, NotChecked=0, Total=930 [2018-12-09 11:20:10,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-12-09 11:20:10,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2018-12-09 11:20:10,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-12-09 11:20:10,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 160 transitions. [2018-12-09 11:20:10,576 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 160 transitions. Word has length 47 [2018-12-09 11:20:10,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:10,577 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 160 transitions. [2018-12-09 11:20:10,577 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-12-09 11:20:10,577 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 160 transitions. [2018-12-09 11:20:10,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 11:20:10,577 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:10,577 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:10,577 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:10,578 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:10,578 INFO L82 PathProgramCache]: Analyzing trace with hash 393272412, now seen corresponding path program 2 times [2018-12-09 11:20:10,578 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:10,578 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:10,600 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-09 11:20:10,666 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 11:20:10,666 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 11:20:10,668 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:10,670 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:10,671 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:10,672 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:10,672 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 11:20:10,788 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:10,788 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:10,789 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:10,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 11:20:10,790 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 11:20:10,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 11:20:10,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-12-09 11:20:10,790 INFO L87 Difference]: Start difference. First operand 154 states and 160 transitions. Second operand 13 states. [2018-12-09 11:20:11,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:11,629 INFO L93 Difference]: Finished difference Result 164 states and 169 transitions. [2018-12-09 11:20:11,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 11:20:11,629 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-09 11:20:11,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:11,630 INFO L225 Difference]: With dead ends: 164 [2018-12-09 11:20:11,630 INFO L226 Difference]: Without dead ends: 164 [2018-12-09 11:20:11,630 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-12-09 11:20:11,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-12-09 11:20:11,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 152. [2018-12-09 11:20:11,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-12-09 11:20:11,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 158 transitions. [2018-12-09 11:20:11,632 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 158 transitions. Word has length 53 [2018-12-09 11:20:11,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:11,632 INFO L480 AbstractCegarLoop]: Abstraction has 152 states and 158 transitions. [2018-12-09 11:20:11,632 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 11:20:11,633 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 158 transitions. [2018-12-09 11:20:11,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-12-09 11:20:11,633 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:11,633 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:11,633 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:11,633 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:11,633 INFO L82 PathProgramCache]: Analyzing trace with hash 393272413, now seen corresponding path program 1 times [2018-12-09 11:20:11,633 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:11,634 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:11,648 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 11:20:11,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:11,806 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:11,812 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:11,813 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:11,819 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:11,820 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 11:20:11,970 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:11,970 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:11,973 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:11,973 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 11:20:11,973 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 11:20:11,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 11:20:11,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-12-09 11:20:11,973 INFO L87 Difference]: Start difference. First operand 152 states and 158 transitions. Second operand 13 states. [2018-12-09 11:20:12,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:12,792 INFO L93 Difference]: Finished difference Result 150 states and 156 transitions. [2018-12-09 11:20:12,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 11:20:12,793 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2018-12-09 11:20:12,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:12,793 INFO L225 Difference]: With dead ends: 150 [2018-12-09 11:20:12,794 INFO L226 Difference]: Without dead ends: 150 [2018-12-09 11:20:12,794 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-12-09 11:20:12,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-09 11:20:12,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-09 11:20:12,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-09 11:20:12,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 156 transitions. [2018-12-09 11:20:12,797 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 156 transitions. Word has length 53 [2018-12-09 11:20:12,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:12,798 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 156 transitions. [2018-12-09 11:20:12,798 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 11:20:12,798 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 156 transitions. [2018-12-09 11:20:12,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-12-09 11:20:12,798 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:12,799 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:12,799 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:12,799 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:12,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1198180007, now seen corresponding path program 1 times [2018-12-09 11:20:12,799 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:12,799 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:12,814 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:12,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:12,864 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:12,897 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:12,897 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:12,898 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:12,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-09 11:20:12,899 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 11:20:12,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 11:20:12,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-12-09 11:20:12,899 INFO L87 Difference]: Start difference. First operand 150 states and 156 transitions. Second operand 7 states. [2018-12-09 11:20:12,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:12,928 INFO L93 Difference]: Finished difference Result 152 states and 157 transitions. [2018-12-09 11:20:12,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 11:20:12,929 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 58 [2018-12-09 11:20:12,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:12,929 INFO L225 Difference]: With dead ends: 152 [2018-12-09 11:20:12,929 INFO L226 Difference]: Without dead ends: 150 [2018-12-09 11:20:12,930 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-09 11:20:12,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-09 11:20:12,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-09 11:20:12,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-09 11:20:12,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 155 transitions. [2018-12-09 11:20:12,933 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 155 transitions. Word has length 58 [2018-12-09 11:20:12,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:12,933 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 155 transitions. [2018-12-09 11:20:12,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 11:20:12,933 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 155 transitions. [2018-12-09 11:20:12,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-12-09 11:20:12,934 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:12,934 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:12,934 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:12,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:12,934 INFO L82 PathProgramCache]: Analyzing trace with hash 2025310666, now seen corresponding path program 1 times [2018-12-09 11:20:12,934 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:12,934 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:12,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:12,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:12,996 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:13,036 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:13,036 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:13,037 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:13,037 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-09 11:20:13,038 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 11:20:13,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 11:20:13,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-12-09 11:20:13,038 INFO L87 Difference]: Start difference. First operand 150 states and 155 transitions. Second operand 9 states. [2018-12-09 11:20:13,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:13,094 INFO L93 Difference]: Finished difference Result 154 states and 158 transitions. [2018-12-09 11:20:13,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 11:20:13,095 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 63 [2018-12-09 11:20:13,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:13,095 INFO L225 Difference]: With dead ends: 154 [2018-12-09 11:20:13,095 INFO L226 Difference]: Without dead ends: 150 [2018-12-09 11:20:13,095 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-12-09 11:20:13,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-09 11:20:13,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-12-09 11:20:13,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-12-09 11:20:13,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 154 transitions. [2018-12-09 11:20:13,097 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 154 transitions. Word has length 63 [2018-12-09 11:20:13,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:13,098 INFO L480 AbstractCegarLoop]: Abstraction has 150 states and 154 transitions. [2018-12-09 11:20:13,098 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 11:20:13,098 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 154 transitions. [2018-12-09 11:20:13,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 11:20:13,098 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:13,098 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:13,098 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:13,098 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:13,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1370658201, now seen corresponding path program 1 times [2018-12-09 11:20:13,099 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:13,099 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:13,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:13,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:13,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:13,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:13,264 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:13,265 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:13,265 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 11:20:13,521 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:13,521 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:13,523 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:13,524 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-09 11:20:13,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 11:20:13,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 11:20:13,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-09 11:20:13,524 INFO L87 Difference]: Start difference. First operand 150 states and 154 transitions. Second operand 20 states. [2018-12-09 11:20:15,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:15,064 INFO L93 Difference]: Finished difference Result 160 states and 163 transitions. [2018-12-09 11:20:15,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 11:20:15,064 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-12-09 11:20:15,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:15,065 INFO L225 Difference]: With dead ends: 160 [2018-12-09 11:20:15,065 INFO L226 Difference]: Without dead ends: 160 [2018-12-09 11:20:15,065 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-09 11:20:15,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-09 11:20:15,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 148. [2018-12-09 11:20:15,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-09 11:20:15,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 152 transitions. [2018-12-09 11:20:15,067 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 152 transitions. Word has length 74 [2018-12-09 11:20:15,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:15,067 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 152 transitions. [2018-12-09 11:20:15,067 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 11:20:15,067 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 152 transitions. [2018-12-09 11:20:15,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-09 11:20:15,068 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:15,068 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:15,068 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:15,068 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:15,068 INFO L82 PathProgramCache]: Analyzing trace with hash 1370658202, now seen corresponding path program 1 times [2018-12-09 11:20:15,068 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:15,069 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:15,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:15,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:15,316 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:15,321 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:15,322 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:15,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:15,326 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 11:20:15,659 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:15,659 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:15,661 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:15,661 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-09 11:20:15,662 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 11:20:15,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 11:20:15,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-09 11:20:15,662 INFO L87 Difference]: Start difference. First operand 148 states and 152 transitions. Second operand 20 states. [2018-12-09 11:20:17,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:17,223 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2018-12-09 11:20:17,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 11:20:17,224 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-12-09 11:20:17,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:17,224 INFO L225 Difference]: With dead ends: 146 [2018-12-09 11:20:17,224 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 11:20:17,224 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-09 11:20:17,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 11:20:17,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-09 11:20:17,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-09 11:20:17,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-12-09 11:20:17,226 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 74 [2018-12-09 11:20:17,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:17,227 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-12-09 11:20:17,227 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 11:20:17,227 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-12-09 11:20:17,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-09 11:20:17,227 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:17,227 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:17,227 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:17,228 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:17,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1929434987, now seen corresponding path program 1 times [2018-12-09 11:20:17,228 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:17,228 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:17,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:17,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:17,311 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:17,373 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:17,373 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:17,375 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:17,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-12-09 11:20:17,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 11:20:17,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 11:20:17,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-12-09 11:20:17,375 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 12 states. [2018-12-09 11:20:17,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:17,456 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2018-12-09 11:20:17,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 11:20:17,457 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-12-09 11:20:17,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:17,458 INFO L225 Difference]: With dead ends: 152 [2018-12-09 11:20:17,458 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 11:20:17,458 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-09 11:20:17,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 11:20:17,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-12-09 11:20:17,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-12-09 11:20:17,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 149 transitions. [2018-12-09 11:20:17,460 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 149 transitions. Word has length 85 [2018-12-09 11:20:17,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:17,460 INFO L480 AbstractCegarLoop]: Abstraction has 146 states and 149 transitions. [2018-12-09 11:20:17,460 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 11:20:17,460 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 149 transitions. [2018-12-09 11:20:17,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-09 11:20:17,461 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:17,461 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:17,461 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:17,461 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:17,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1961126046, now seen corresponding path program 1 times [2018-12-09 11:20:17,462 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:17,462 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:17,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:17,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:17,674 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:17,676 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:17,676 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:17,677 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:17,677 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 11:20:17,946 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:17,946 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:17,949 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:17,949 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-09 11:20:17,949 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 11:20:17,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 11:20:17,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-12-09 11:20:17,950 INFO L87 Difference]: Start difference. First operand 146 states and 149 transitions. Second operand 20 states. [2018-12-09 11:20:19,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:19,816 INFO L93 Difference]: Finished difference Result 160 states and 162 transitions. [2018-12-09 11:20:19,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-09 11:20:19,817 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-12-09 11:20:19,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:19,817 INFO L225 Difference]: With dead ends: 160 [2018-12-09 11:20:19,817 INFO L226 Difference]: Without dead ends: 160 [2018-12-09 11:20:19,818 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 74 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=79, Invalid=521, Unknown=0, NotChecked=0, Total=600 [2018-12-09 11:20:19,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-12-09 11:20:19,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 144. [2018-12-09 11:20:19,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-09 11:20:19,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 147 transitions. [2018-12-09 11:20:19,820 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 147 transitions. Word has length 98 [2018-12-09 11:20:19,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:19,820 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 147 transitions. [2018-12-09 11:20:19,820 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 11:20:19,821 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 147 transitions. [2018-12-09 11:20:19,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-09 11:20:19,821 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:19,822 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:19,822 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:19,822 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:19,822 INFO L82 PathProgramCache]: Analyzing trace with hash 1961126047, now seen corresponding path program 1 times [2018-12-09 11:20:19,823 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:19,823 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:19,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:20,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:20,090 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:20,095 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:20,096 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:20,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:20,100 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 11:20:20,452 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:20,452 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:20,455 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:20,455 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-12-09 11:20:20,455 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-12-09 11:20:20,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-12-09 11:20:20,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-12-09 11:20:20,456 INFO L87 Difference]: Start difference. First operand 144 states and 147 transitions. Second operand 20 states. [2018-12-09 11:20:22,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:22,150 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-12-09 11:20:22,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-12-09 11:20:22,151 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-12-09 11:20:22,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:22,152 INFO L225 Difference]: With dead ends: 142 [2018-12-09 11:20:22,153 INFO L226 Difference]: Without dead ends: 142 [2018-12-09 11:20:22,153 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 74 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2018-12-09 11:20:22,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-09 11:20:22,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-09 11:20:22,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-09 11:20:22,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 145 transitions. [2018-12-09 11:20:22,157 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 145 transitions. Word has length 98 [2018-12-09 11:20:22,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:22,158 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 145 transitions. [2018-12-09 11:20:22,158 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-12-09 11:20:22,158 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 145 transitions. [2018-12-09 11:20:22,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-12-09 11:20:22,159 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:22,159 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:22,159 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:22,160 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:22,160 INFO L82 PathProgramCache]: Analyzing trace with hash -456213325, now seen corresponding path program 1 times [2018-12-09 11:20:22,160 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:22,160 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:22,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:22,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:22,249 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:22,308 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:22,308 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:22,309 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:22,309 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-09 11:20:22,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 11:20:22,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 11:20:22,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-12-09 11:20:22,310 INFO L87 Difference]: Start difference. First operand 142 states and 145 transitions. Second operand 10 states. [2018-12-09 11:20:22,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:22,359 INFO L93 Difference]: Finished difference Result 144 states and 146 transitions. [2018-12-09 11:20:22,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-12-09 11:20:22,359 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 96 [2018-12-09 11:20:22,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:22,360 INFO L225 Difference]: With dead ends: 144 [2018-12-09 11:20:22,360 INFO L226 Difference]: Without dead ends: 142 [2018-12-09 11:20:22,360 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-12-09 11:20:22,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-09 11:20:22,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-09 11:20:22,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-09 11:20:22,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 144 transitions. [2018-12-09 11:20:22,362 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 144 transitions. Word has length 96 [2018-12-09 11:20:22,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:22,362 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 144 transitions. [2018-12-09 11:20:22,362 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 11:20:22,362 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2018-12-09 11:20:22,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 11:20:22,363 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:22,363 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:22,363 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:22,364 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:22,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1610192467, now seen corresponding path program 1 times [2018-12-09 11:20:22,364 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:22,364 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:22,386 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:22,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:22,600 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:22,603 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:22,603 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:22,604 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:22,604 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-12-09 11:20:22,976 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:22,976 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:22,979 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:22,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-09 11:20:22,980 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-09 11:20:22,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-09 11:20:22,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-12-09 11:20:22,980 INFO L87 Difference]: Start difference. First operand 142 states and 144 transitions. Second operand 24 states. [2018-12-09 11:20:24,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:24,926 INFO L93 Difference]: Finished difference Result 152 states and 153 transitions. [2018-12-09 11:20:24,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-12-09 11:20:24,926 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 111 [2018-12-09 11:20:24,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:24,927 INFO L225 Difference]: With dead ends: 152 [2018-12-09 11:20:24,927 INFO L226 Difference]: Without dead ends: 152 [2018-12-09 11:20:24,927 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=101, Invalid=829, Unknown=0, NotChecked=0, Total=930 [2018-12-09 11:20:24,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-09 11:20:24,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 140. [2018-12-09 11:20:24,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-09 11:20:24,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 142 transitions. [2018-12-09 11:20:24,929 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 142 transitions. Word has length 111 [2018-12-09 11:20:24,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:24,929 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 142 transitions. [2018-12-09 11:20:24,929 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-09 11:20:24,929 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2018-12-09 11:20:24,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-09 11:20:24,930 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:24,930 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:24,930 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:24,930 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:24,930 INFO L82 PathProgramCache]: Analyzing trace with hash -1610192466, now seen corresponding path program 1 times [2018-12-09 11:20:24,930 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:24,930 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:24,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:25,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:25,241 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:25,252 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 11:20:25,252 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:25,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:25,257 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-12-09 11:20:25,783 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:20:25,784 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:20:25,787 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 11:20:25,787 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-12-09 11:20:25,787 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-12-09 11:20:25,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-12-09 11:20:25,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-12-09 11:20:25,788 INFO L87 Difference]: Start difference. First operand 140 states and 142 transitions. Second operand 24 states. [2018-12-09 11:20:27,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:20:27,696 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-12-09 11:20:27,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-12-09 11:20:27,696 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 111 [2018-12-09 11:20:27,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:20:27,697 INFO L225 Difference]: With dead ends: 138 [2018-12-09 11:20:27,697 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 11:20:27,698 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=103, Invalid=889, Unknown=0, NotChecked=0, Total=992 [2018-12-09 11:20:27,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 11:20:27,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-12-09 11:20:27,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-12-09 11:20:27,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 140 transitions. [2018-12-09 11:20:27,700 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 140 transitions. Word has length 111 [2018-12-09 11:20:27,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:20:27,700 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 140 transitions. [2018-12-09 11:20:27,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-12-09 11:20:27,700 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 140 transitions. [2018-12-09 11:20:27,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-12-09 11:20:27,700 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:20:27,701 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:20:27,701 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:20:27,701 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:20:27,701 INFO L82 PathProgramCache]: Analyzing trace with hash -714946492, now seen corresponding path program 1 times [2018-12-09 11:20:27,701 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:20:27,701 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:20:27,720 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:20:28,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:20:28,080 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:20:28,107 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-12-09 11:20:28,109 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-12-09 11:20:28,109 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,111 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,116 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-12-09 11:20:28,135 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-12-09 11:20:28,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,139 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-12-09 11:20:28,139 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,148 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,157 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-12-09 11:20:28,186 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-12-09 11:20:28,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,193 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-12-09 11:20:28,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,225 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:35 [2018-12-09 11:20:28,274 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-12-09 11:20:28,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,288 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-12-09 11:20:28,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,320 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,341 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,341 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-12-09 11:20:28,403 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-12-09 11:20:28,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,417 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,425 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-12-09 11:20:28,425 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,473 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,513 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,513 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-12-09 11:20:28,598 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-12-09 11:20:28,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,613 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-12-09 11:20:28,630 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,702 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:28,738 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-12-09 11:20:28,842 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-12-09 11:20:28,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,865 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:28,893 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-12-09 11:20:28,893 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,000 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,051 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-12-09 11:20:29,175 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-12-09 11:20:29,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,215 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,217 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,242 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-12-09 11:20:29,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,453 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,453 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-12-09 11:20:29,585 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-12-09 11:20:29,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,597 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,639 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,646 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,657 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:29,676 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-12-09 11:20:29,676 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,886 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:29,956 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:105, output treesize:101 [2018-12-09 11:20:30,132 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-12-09 11:20:30,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,190 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,243 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,257 INFO L303 Elim1Store]: Index analysis took 123 ms [2018-12-09 11:20:30,258 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-12-09 11:20:30,259 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:30,545 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:30,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:30,627 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:116, output treesize:112 [2018-12-09 11:20:30,824 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-12-09 11:20:30,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,891 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,949 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,958 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,961 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:30,998 INFO L303 Elim1Store]: Index analysis took 173 ms [2018-12-09 11:20:30,999 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-12-09 11:20:31,000 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:31,387 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:31,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:31,490 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:127, output treesize:123 [2018-12-09 11:20:31,740 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-12-09 11:20:31,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,767 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,784 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,797 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,800 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,812 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,815 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,849 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,872 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:31,940 INFO L303 Elim1Store]: Index analysis took 198 ms [2018-12-09 11:20:31,941 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-12-09 11:20:31,942 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:32,421 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:32,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:32,528 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:138, output treesize:134 [2018-12-09 11:20:32,771 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 57 [2018-12-09 11:20:32,793 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-12-09 11:20:32,803 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,813 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,820 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,831 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,845 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,867 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,887 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,966 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,991 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:32,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,009 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,026 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,035 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,050 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:33,054 INFO L303 Elim1Store]: Index analysis took 259 ms [2018-12-09 11:20:33,055 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-12-09 11:20:33,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:33,630 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:33,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:33,758 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:149, output treesize:145 [2018-12-09 11:20:34,030 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-12-09 11:20:34,060 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-12-09 11:20:34,087 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,183 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,218 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,293 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,499 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,592 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,729 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,789 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,799 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,869 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:34,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:35,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:35,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:35,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:35,028 INFO L303 Elim1Store]: Index analysis took 966 ms [2018-12-09 11:20:35,029 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-12-09 11:20:35,030 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:35,730 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:35,866 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:35,866 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:160, output treesize:156 [2018-12-09 11:20:36,181 WARN L180 SmtUtils]: Spent 143.00 ms on a formula simplification that was a NOOP. DAG size: 65 [2018-12-09 11:20:36,205 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-12-09 11:20:36,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,220 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,285 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,306 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,309 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,340 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,354 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,374 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,378 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,388 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,405 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,463 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,514 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,524 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,548 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,572 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:36,574 INFO L303 Elim1Store]: Index analysis took 367 ms [2018-12-09 11:20:36,575 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-12-09 11:20:36,576 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:37,433 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:37,579 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:37,579 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:171, output treesize:167 [2018-12-09 11:20:37,908 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-12-09 11:20:37,944 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-12-09 11:20:37,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:37,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,066 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,168 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,227 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,274 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,474 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,523 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,741 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,792 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,824 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,886 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,920 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,953 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:38,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,038 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,054 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,065 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,239 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,272 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,349 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,464 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,496 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,520 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:39,672 INFO L303 Elim1Store]: Index analysis took 1726 ms [2018-12-09 11:20:39,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-12-09 11:20:39,675 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:20:40,647 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:40,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:20:40,817 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:179, output treesize:175 [2018-12-09 11:20:41,245 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-12-09 11:20:43,151 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:20:43,157 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:20:43,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:20:43,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-12-09 11:20:45,169 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_internal_#in~kobj.offset| (_ bv8 32)) .cse0))))) is different from true [2018-12-09 11:20:47,175 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 (_ BitVec 32))) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv4 32)))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv12 32)) v_DerPreprocessor_2) .cse0 .cse0) (bvadd |c_ldv_kobject_init_#in~kobj.offset| (_ bv8 32)) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-12-09 11:20:47,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,289 INFO L303 Elim1Store]: Index analysis took 110 ms [2018-12-09 11:20:47,290 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2018-12-09 11:20:47,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,724 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,883 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,939 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:47,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,312 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,521 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,569 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,674 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,728 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,836 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,937 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:48,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,107 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,222 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,487 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,595 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,650 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,705 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:49,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,079 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,243 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,296 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,490 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,946 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:50,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,785 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:51,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,037 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,317 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,477 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,586 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,642 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:52,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,116 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,585 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,732 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,830 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:53,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,248 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,297 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:54,773 INFO L683 Elim1Store]: detected equality via solver [2018-12-09 11:20:56,484 INFO L303 Elim1Store]: Index analysis took 9191 ms [2018-12-09 11:20:56,715 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1177 [2018-12-09 11:20:56,807 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,834 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:56,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,040 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,053 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,193 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,213 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,511 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,583 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,627 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,787 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,810 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:57,998 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,069 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,089 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,131 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,205 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,261 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,314 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,383 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,411 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,510 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,673 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,701 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,755 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,922 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:58,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,014 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,208 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,277 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,482 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,508 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,553 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:20:59,647 INFO L303 Elim1Store]: Index analysis took 2891 ms [2018-12-09 11:20:59,648 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1092 treesize of output 1092 [2018-12-09 11:21:00,386 WARN L180 SmtUtils]: Spent 734.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 77 [2018-12-09 11:21:00,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,471 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,479 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,486 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,524 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,529 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,551 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,594 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,696 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,704 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,710 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,739 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,748 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,757 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,766 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,772 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,808 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,851 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,950 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:00,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,011 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,019 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,060 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,068 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,113 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,128 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,135 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,165 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,211 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,219 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,225 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:01,260 INFO L303 Elim1Store]: Index analysis took 872 ms [2018-12-09 11:21:01,261 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 1096 [2018-12-09 11:21:01,263 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:01,656 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:02,962 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:02,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,044 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,073 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,096 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,204 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,231 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,256 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,396 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,890 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,943 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:03,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,000 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,029 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,058 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,117 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,311 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,469 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,498 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,578 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,607 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,711 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,785 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,840 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:04,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,130 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,505 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,698 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,721 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,804 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,884 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:05,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,018 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,042 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,206 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,235 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,262 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,488 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,546 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,574 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,708 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:06,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:07,558 INFO L303 Elim1Store]: Index analysis took 4652 ms [2018-12-09 11:21:07,645 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 155 treesize of output 1164 [2018-12-09 11:21:09,495 WARN L180 SmtUtils]: Spent 1.85 s on a formula simplification. DAG size of input: 166 DAG size of output: 119 [2018-12-09 11:21:09,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,536 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,545 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,573 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,581 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,589 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,599 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,700 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,717 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,726 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,750 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,760 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,769 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,777 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,786 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,821 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,829 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,853 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,871 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,879 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,965 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,974 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:09,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,034 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,039 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,046 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,064 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,072 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,082 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,090 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,181 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,199 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,209 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,214 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,223 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,251 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,279 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,343 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,353 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,369 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,448 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,467 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,484 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,493 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,502 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,512 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,522 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,539 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,549 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:10,786 INFO L303 Elim1Store]: Index analysis took 1289 ms [2018-12-09 11:21:10,787 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1092 [2018-12-09 11:21:10,789 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:11,400 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,447 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,456 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,465 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,501 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,528 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,544 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,552 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,561 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,570 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,579 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,588 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,602 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,680 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,699 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,714 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,736 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,754 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,763 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,780 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,793 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,811 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,837 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,889 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,936 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,960 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,968 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,977 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:11,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,021 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,031 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,041 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,057 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,067 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,076 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,110 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,118 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,138 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,147 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,203 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,237 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,253 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,271 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,304 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,320 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,327 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,352 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,359 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,385 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:12,646 INFO L303 Elim1Store]: Index analysis took 1264 ms [2018-12-09 11:21:12,647 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 1062 [2018-12-09 11:21:12,648 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:13,113 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-12-09 11:21:13,260 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 11:21:13,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:13,496 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:13,497 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:173, output treesize:141 [2018-12-09 11:21:16,918 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 96 [2018-12-09 11:21:16,923 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,924 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,925 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,926 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,928 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,930 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,931 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,933 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,934 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:16,950 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 200 [2018-12-09 11:21:16,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:17,000 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:17,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:17,029 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:132, output treesize:113 [2018-12-09 11:21:19,233 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 88 [2018-12-09 11:21:19,464 INFO L303 Elim1Store]: Index analysis took 228 ms [2018-12-09 11:21:19,465 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 106 [2018-12-09 11:21:19,465 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:19,494 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:19,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:19,519 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:121, output treesize:106 [2018-12-09 11:21:21,634 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 81 [2018-12-09 11:21:21,708 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 105 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 15 case distinctions, treesize of input 81 treesize of output 121 [2018-12-09 11:21:21,708 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-12-09 11:21:21,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-12-09 11:21:21,764 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 11:21:21,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-12-09 11:21:21,817 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:130 [2018-12-09 11:21:22,722 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 11:21:22,722 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-09 11:21:24,780 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:21:24,782 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:21:24,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:21:24,784 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:10 [2018-12-09 11:21:25,091 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 11:21:25,091 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 11:21:25,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:21:25,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 11:21:25,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 11:21:25,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-12-09 11:21:25,923 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-12-09 11:21:25,923 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:25,924 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:25,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:25,928 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-12-09 11:21:27,330 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:21:27,338 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:21:27,368 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-12-09 11:21:27,369 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:38 [2018-12-09 11:21:29,844 WARN L180 SmtUtils]: Spent 2.02 s on a formula simplification that was a NOOP. DAG size: 22 [2018-12-09 11:21:29,853 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2018-12-09 11:21:29,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:29,860 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-12-09 11:21:29,866 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:29,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:29,870 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:29,876 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 45 [2018-12-09 11:21:29,877 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:29,887 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:29,892 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:29,913 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:29,913 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:58, output treesize:22 [2018-12-09 11:21:35,940 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:35,941 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-12-09 11:21:35,943 INFO L683 Elim1Store]: detected equality via solver [2018-12-09 11:21:35,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 11:21:35,945 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 15 [2018-12-09 11:21:35,945 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:35,948 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:35,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:35,953 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:39, output treesize:13 [2018-12-09 11:21:39,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-12-09 11:21:39,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-12-09 11:21:39,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 11:21:39,822 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:39,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 11:21:39,823 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-12-09 11:21:40,114 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-12-09 11:21:40,114 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-09 11:21:40,131 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 11:21:40,131 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [42] imperfect sequences [63] total 101 [2018-12-09 11:21:40,131 INFO L459 AbstractCegarLoop]: Interpolant automaton has 101 states [2018-12-09 11:21:40,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2018-12-09 11:21:40,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=320, Invalid=11458, Unknown=2, NotChecked=430, Total=12210 [2018-12-09 11:21:40,133 INFO L87 Difference]: Start difference. First operand 138 states and 140 transitions. Second operand 101 states. [2018-12-09 11:22:29,927 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 29 [2018-12-09 11:22:35,504 WARN L180 SmtUtils]: Spent 4.07 s on a formula simplification. DAG size of input: 38 DAG size of output: 31 [2018-12-09 11:22:40,751 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 32 [2018-12-09 11:22:47,535 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2018-12-09 11:22:59,916 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 108 [2018-12-09 11:23:08,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 11:23:08,333 INFO L93 Difference]: Finished difference Result 116 states and 116 transitions. [2018-12-09 11:23:08,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-12-09 11:23:08,333 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 116 [2018-12-09 11:23:08,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 11:23:08,334 INFO L225 Difference]: With dead ends: 116 [2018-12-09 11:23:08,334 INFO L226 Difference]: Without dead ends: 116 [2018-12-09 11:23:08,336 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 152 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3510 ImplicationChecksByTransitivity, 55.6s TimeCoverageRelationStatistics Valid=742, Invalid=22216, Unknown=2, NotChecked=602, Total=23562 [2018-12-09 11:23:08,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-12-09 11:23:08,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-12-09 11:23:08,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-12-09 11:23:08,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-12-09 11:23:08,338 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 116 [2018-12-09 11:23:08,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 11:23:08,338 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-12-09 11:23:08,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 101 states. [2018-12-09 11:23:08,338 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-12-09 11:23:08,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-09 11:23:08,338 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 11:23:08,339 INFO L402 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 11:23:08,339 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr1REQUIRES_VIOLATION, ldv_kref_initErr0REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION]=== [2018-12-09 11:23:08,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 11:23:08,339 INFO L82 PathProgramCache]: Analyzing trace with hash -724169652, now seen corresponding path program 1 times [2018-12-09 11:23:08,339 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-09 11:23:08,339 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3efc53c7-93e3-4934-b6dc-438da1141501/bin-2019/uautomizer/cvc4 Starting monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-09 11:23:08,356 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 11:23:12,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 11:23:17,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 11:23:17,246 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 11:23:17,256 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-09 11:23:17,261 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-12-09 11:23:17,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 11:23:17,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-12-09 11:23:17,275 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 11:23:17 BoogieIcfgContainer [2018-12-09 11:23:17,275 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 11:23:17,276 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 11:23:17,276 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 11:23:17,276 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 11:23:17,276 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 11:20:03" (3/4) ... [2018-12-09 11:23:17,279 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-09 11:23:17,280 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 11:23:17,280 INFO L168 Benchmark]: Toolchain (without parser) took 194497.23 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 271.6 MB). Free memory was 939.3 MB in the beginning and 954.2 MB in the end (delta: -14.8 MB). Peak memory consumption was 256.7 MB. Max. memory is 11.5 GB. [2018-12-09 11:23:17,281 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 11:23:17,281 INFO L168 Benchmark]: CACSL2BoogieTranslator took 331.99 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 150.5 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -178.9 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. [2018-12-09 11:23:17,281 INFO L168 Benchmark]: Boogie Preprocessor took 44.65 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 11:23:17,281 INFO L168 Benchmark]: RCFGBuilder took 749.01 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 111.7 MB). Peak memory consumption was 111.7 MB. Max. memory is 11.5 GB. [2018-12-09 11:23:17,281 INFO L168 Benchmark]: TraceAbstraction took 193365.05 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 121.1 MB). Free memory was 1.0 GB in the beginning and 954.2 MB in the end (delta: 52.4 MB). Peak memory consumption was 173.5 MB. Max. memory is 11.5 GB. [2018-12-09 11:23:17,281 INFO L168 Benchmark]: Witness Printer took 3.71 ms. Allocated memory is still 1.3 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 11:23:17,284 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 331.99 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 150.5 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -178.9 MB). Peak memory consumption was 33.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 44.65 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 749.01 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 111.7 MB). Peak memory consumption was 111.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 193365.05 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 121.1 MB). Free memory was 1.0 GB in the beginning and 954.2 MB in the end (delta: 52.4 MB). Peak memory consumption was 173.5 MB. Max. memory is 11.5 GB. * Witness Printer took 3.71 ms. Allocated memory is still 1.3 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={-1:0}] [L1453] CALL entry_point() VAL [ldv_global_msg_list={-1:0}] [L1445] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1446] CALL, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}] [L1406] struct ldv_kobject *kobj; VAL [ldv_global_msg_list={-1:0}] [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16, ldv_global_msg_list={-1:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=16, \result={1082401:0}, ldv_global_msg_list={-1:0}, malloc(size)={1082401:0}, size=16] [L1408] RET, EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_global_msg_list={-1:0}, ldv_malloc(sizeof(*kobj))={1082401:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}, memset(kobj, 0, sizeof(*kobj))={1082401:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1294] ((&kref->refcount)->counter) = (1) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1382] RET ldv_kref_init(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [ldv_global_msg_list={-1:0}, list={1082401:4}] [L1099] list->next = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1100] list->prev = list VAL [ldv_global_msg_list={-1:0}, list={1082401:4}, list={1082401:4}] [L1383] RET LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1398] RET ldv_kobject_init_internal(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1413] RET ldv_kobject_init(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1414] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1446] RET, EXPR ldv_kobject_create() VAL [ldv_global_msg_list={-1:0}, ldv_kobject_create()={1082401:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1255] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1256] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1258] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1259] return temp; VAL [\old(i)=1, \result=2, i=1, ldv_global_msg_list={-1:0}, temp=2, v={1082401:12}, v={1082401:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={1082401:12}, kref={1082401:12}, ldv_atomic_add_return(1, (&kref->refcount))=2, ldv_global_msg_list={-1:0}] [L1374] RET ldv_kref_get(&kobj->kref) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1375] return kobj; VAL [\result={1082401:0}, kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kobject_get(kobj)={1082401:0}] [L1447] RET f_22_get(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, ldv_global_msg_list={-1:0}, v={1082401:12}] [L1264] int temp; VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}] [L1265] EXPR v->counter VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, v={1082401:12}, v={1082401:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1267] v->counter = temp VAL [\old(i)=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1268] return temp; VAL [\old(i)=1, \result=1, i=1, ldv_global_msg_list={-1:0}, temp=1, v={1082401:12}, v={1082401:12}] [L1281] RET, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={1082401:12}, kref={1082401:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] return 0; VAL [\old(count)=1, \result=0, count=1, kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, release={-1:0}, release={-1:0}] [L1313] RET, EXPR ldv_kref_sub(kref, 1, release) VAL [kref={1082401:12}, kref={1082401:12}, ldv_global_msg_list={-1:0}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] return ldv_kref_sub(kref, 1, release); [L1363] RET ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={1082401:0}, kobj={1082401:0}, ldv_global_msg_list={-1:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] RET ldv_kobject_put(kobj) VAL [kobj={1082401:0}, ldv_global_msg_list={-1:0}] [L1453] RET entry_point() VAL [ldv_global_msg_list={-1:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 45 procedures, 318 locations, 67 error locations. UNSAFE Result, 193.3s OverallTime, 27 OverallIterations, 16 TraceHistogramMax, 104.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3142 SDtfs, 1387 SDslu, 22924 SDs, 0 SdLazy, 16439 SolverSat, 417 SolverUnsat, 4 SolverUnknown, 0 SolverNotchecked, 75.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1842 GetRequests, 1313 SyntacticMatches, 41 SemanticMatches, 488 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3964 ImplicationChecksByTransitivity, 60.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=176occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 26 MinimizatonAttempts, 97 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 6.6s SatisfiabilityAnalysisTime, 75.9s InterpolantComputationTime, 1734 NumberOfCodeBlocks, 1704 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1705 ConstructedInterpolants, 344 QuantifiedInterpolants, 1272556 SizeOfPredicates, 236 NumberOfNonLiveVariables, 6497 ConjunctsInSsa, 669 ConjunctsInUnsatCore, 30 InterpolantComputations, 23 PerfectInterpolantSequences, 1833/2101 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...