./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash c57ebc44b313bf301635c00d4458ecfdd41286b1 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/config using search string *Overflow*64bit*_Bitvector*.epf No suitable settings file found using Overflow*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 13:26:00,405 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 13:26:00,407 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 13:26:00,415 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 13:26:00,416 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 13:26:00,416 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 13:26:00,417 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 13:26:00,419 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 13:26:00,420 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 13:26:00,420 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 13:26:00,421 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 13:26:00,421 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 13:26:00,422 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 13:26:00,423 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 13:26:00,424 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 13:26:00,424 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 13:26:00,425 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 13:26:00,426 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 13:26:00,427 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 13:26:00,428 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 13:26:00,429 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 13:26:00,430 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 13:26:00,432 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 13:26:00,432 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 13:26:00,432 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 13:26:00,433 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 13:26:00,433 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 13:26:00,434 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 13:26:00,434 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 13:26:00,435 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 13:26:00,435 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 13:26:00,436 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 13:26:00,436 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 13:26:00,436 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 13:26:00,437 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 13:26:00,437 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 13:26:00,437 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf [2018-12-08 13:26:00,448 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 13:26:00,448 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 13:26:00,448 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 13:26:00,449 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 13:26:00,449 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 13:26:00,449 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 13:26:00,449 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 13:26:00,449 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Check absence of signed integer overflows=true [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 13:26:00,450 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 13:26:00,451 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 13:26:00,451 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 13:26:00,451 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 13:26:00,451 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 13:26:00,451 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 13:26:00,451 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 13:26:00,451 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 13:26:00,451 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 13:26:00,452 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 13:26:00,452 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-08 13:26:00,452 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 13:26:00,452 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 13:26:00,452 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c57ebc44b313bf301635c00d4458ecfdd41286b1 [2018-12-08 13:26:00,474 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 13:26:00,482 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 13:26:00,485 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 13:26:00,486 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 13:26:00,486 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 13:26:00,487 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/../../sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i [2018-12-08 13:26:00,532 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/data/5a1dc286c/34ea64ff91a743f9879a2c6a2378d5b7/FLAG00f8b4c89 [2018-12-08 13:26:00,976 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 13:26:00,977 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/sv-benchmarks/c/busybox-1.22.0/basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i [2018-12-08 13:26:00,986 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/data/5a1dc286c/34ea64ff91a743f9879a2c6a2378d5b7/FLAG00f8b4c89 [2018-12-08 13:26:00,994 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/data/5a1dc286c/34ea64ff91a743f9879a2c6a2378d5b7 [2018-12-08 13:26:00,995 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 13:26:00,996 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 13:26:00,997 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 13:26:00,997 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 13:26:00,999 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 13:26:00,999 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 01:26:00" (1/1) ... [2018-12-08 13:26:01,001 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f5fc0d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:00, skipping insertion in model container [2018-12-08 13:26:01,001 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 01:26:00" (1/1) ... [2018-12-08 13:26:01,005 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 13:26:01,031 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 13:26:01,384 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 13:26:01,398 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 13:26:01,442 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 13:26:01,514 INFO L195 MainTranslator]: Completed translation [2018-12-08 13:26:01,515 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01 WrapperNode [2018-12-08 13:26:01,515 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 13:26:01,515 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 13:26:01,515 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 13:26:01,515 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 13:26:01,520 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,536 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,543 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 13:26:01,543 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 13:26:01,543 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 13:26:01,543 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 13:26:01,549 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,549 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,553 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,553 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,567 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,571 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,575 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... [2018-12-08 13:26:01,578 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 13:26:01,578 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 13:26:01,579 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 13:26:01,579 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 13:26:01,579 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 13:26:01,612 INFO L130 BoogieDeclarations]: Found specification of procedure __main [2018-12-08 13:26:01,612 INFO L138 BoogieDeclarations]: Found implementation of procedure __main [2018-12-08 13:26:01,612 INFO L130 BoogieDeclarations]: Found specification of procedure last_char_is [2018-12-08 13:26:01,612 INFO L138 BoogieDeclarations]: Found implementation of procedure last_char_is [2018-12-08 13:26:01,612 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 13:26:01,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 13:26:01,613 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 13:26:01,613 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 13:26:01,613 INFO L130 BoogieDeclarations]: Found specification of procedure safe_write [2018-12-08 13:26:01,613 INFO L138 BoogieDeclarations]: Found implementation of procedure safe_write [2018-12-08 13:26:01,613 INFO L130 BoogieDeclarations]: Found specification of procedure bb_get_last_path_component_nostrip [2018-12-08 13:26:01,613 INFO L138 BoogieDeclarations]: Found implementation of procedure bb_get_last_path_component_nostrip [2018-12-08 13:26:01,613 INFO L130 BoogieDeclarations]: Found specification of procedure bb_get_last_path_component_strip [2018-12-08 13:26:01,613 INFO L138 BoogieDeclarations]: Found implementation of procedure bb_get_last_path_component_strip [2018-12-08 13:26:01,613 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure write [2018-12-08 13:26:01,614 INFO L138 BoogieDeclarations]: Found implementation of procedure write [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure strrchr [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 13:26:01,614 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-08 13:26:01,614 INFO L130 BoogieDeclarations]: Found specification of procedure full_write [2018-12-08 13:26:01,614 INFO L138 BoogieDeclarations]: Found implementation of procedure full_write [2018-12-08 13:26:01,615 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-08 13:26:01,615 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 13:26:01,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 13:26:02,135 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 13:26:02,135 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-08 13:26:02,136 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 01:26:02 BoogieIcfgContainer [2018-12-08 13:26:02,136 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 13:26:02,136 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 13:26:02,136 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 13:26:02,138 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 13:26:02,138 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 01:26:00" (1/3) ... [2018-12-08 13:26:02,139 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e08d9a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 01:26:02, skipping insertion in model container [2018-12-08 13:26:02,139 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 01:26:01" (2/3) ... [2018-12-08 13:26:02,139 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e08d9a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 01:26:02, skipping insertion in model container [2018-12-08 13:26:02,139 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 01:26:02" (3/3) ... [2018-12-08 13:26:02,140 INFO L112 eAbstractionObserver]: Analyzing ICFG basename_false-unreach-call_true-no-overflow_true-valid-memsafety.i [2018-12-08 13:26:02,146 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 13:26:02,151 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 28 error locations. [2018-12-08 13:26:02,161 INFO L257 AbstractCegarLoop]: Starting to check reachability of 28 error locations. [2018-12-08 13:26:02,179 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 13:26:02,179 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 13:26:02,179 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 13:26:02,180 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 13:26:02,180 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 13:26:02,180 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 13:26:02,180 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 13:26:02,180 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 13:26:02,180 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 13:26:02,192 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states. [2018-12-08 13:26:02,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-12-08 13:26:02,196 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,196 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,198 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,201 INFO L82 PathProgramCache]: Analyzing trace with hash -51273939, now seen corresponding path program 1 times [2018-12-08 13:26:02,202 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,202 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,259 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,260 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:02,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:02,374 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,384 INFO L87 Difference]: Start difference. First operand 154 states. Second operand 3 states. [2018-12-08 13:26:02,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,434 INFO L93 Difference]: Finished difference Result 298 states and 388 transitions. [2018-12-08 13:26:02,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,436 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-12-08 13:26:02,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,445 INFO L225 Difference]: With dead ends: 298 [2018-12-08 13:26:02,445 INFO L226 Difference]: Without dead ends: 149 [2018-12-08 13:26:02,448 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-12-08 13:26:02,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-12-08 13:26:02,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-12-08 13:26:02,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 183 transitions. [2018-12-08 13:26:02,485 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 183 transitions. Word has length 8 [2018-12-08 13:26:02,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,485 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 183 transitions. [2018-12-08 13:26:02,485 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,485 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 183 transitions. [2018-12-08 13:26:02,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-12-08 13:26:02,485 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,485 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,486 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,486 INFO L82 PathProgramCache]: Analyzing trace with hash -1589491972, now seen corresponding path program 1 times [2018-12-08 13:26:02,486 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,486 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,495 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,496 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:02,540 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,540 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:02,541 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,541 INFO L87 Difference]: Start difference. First operand 149 states and 183 transitions. Second operand 3 states. [2018-12-08 13:26:02,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,565 INFO L93 Difference]: Finished difference Result 152 states and 186 transitions. [2018-12-08 13:26:02,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,566 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2018-12-08 13:26:02,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,567 INFO L225 Difference]: With dead ends: 152 [2018-12-08 13:26:02,567 INFO L226 Difference]: Without dead ends: 151 [2018-12-08 13:26:02,567 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-08 13:26:02,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-08 13:26:02,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 13:26:02,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 185 transitions. [2018-12-08 13:26:02,574 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 185 transitions. Word has length 9 [2018-12-08 13:26:02,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,575 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 185 transitions. [2018-12-08 13:26:02,575 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,575 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 185 transitions. [2018-12-08 13:26:02,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-08 13:26:02,575 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,575 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,576 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,576 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,576 INFO L82 PathProgramCache]: Analyzing trace with hash -540770008, now seen corresponding path program 1 times [2018-12-08 13:26:02,576 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,576 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-08 13:26:02,621 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,621 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:02,621 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,621 INFO L87 Difference]: Start difference. First operand 151 states and 185 transitions. Second operand 3 states. [2018-12-08 13:26:02,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,659 INFO L93 Difference]: Finished difference Result 151 states and 185 transitions. [2018-12-08 13:26:02,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,660 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-08 13:26:02,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,661 INFO L225 Difference]: With dead ends: 151 [2018-12-08 13:26:02,661 INFO L226 Difference]: Without dead ends: 147 [2018-12-08 13:26:02,661 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-12-08 13:26:02,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-12-08 13:26:02,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-12-08 13:26:02,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 181 transitions. [2018-12-08 13:26:02,667 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 181 transitions. Word has length 12 [2018-12-08 13:26:02,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,668 INFO L480 AbstractCegarLoop]: Abstraction has 147 states and 181 transitions. [2018-12-08 13:26:02,668 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,668 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 181 transitions. [2018-12-08 13:26:02,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-08 13:26:02,668 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,668 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,669 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,669 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,669 INFO L82 PathProgramCache]: Analyzing trace with hash -540768278, now seen corresponding path program 1 times [2018-12-08 13:26:02,669 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,669 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,713 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:02,713 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:02,713 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,714 INFO L87 Difference]: Start difference. First operand 147 states and 181 transitions. Second operand 3 states. [2018-12-08 13:26:02,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,726 INFO L93 Difference]: Finished difference Result 147 states and 181 transitions. [2018-12-08 13:26:02,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,727 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-08 13:26:02,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,727 INFO L225 Difference]: With dead ends: 147 [2018-12-08 13:26:02,727 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 13:26:02,728 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 13:26:02,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-08 13:26:02,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 13:26:02,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 178 transitions. [2018-12-08 13:26:02,733 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 178 transitions. Word has length 12 [2018-12-08 13:26:02,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,733 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 178 transitions. [2018-12-08 13:26:02,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,733 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 178 transitions. [2018-12-08 13:26:02,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-12-08 13:26:02,734 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,734 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,734 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,734 INFO L82 PathProgramCache]: Analyzing trace with hash 415999081, now seen corresponding path program 1 times [2018-12-08 13:26:02,734 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,735 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,741 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,741 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-08 13:26:02,776 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:02,777 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,777 INFO L87 Difference]: Start difference. First operand 144 states and 178 transitions. Second operand 3 states. [2018-12-08 13:26:02,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,810 INFO L93 Difference]: Finished difference Result 144 states and 178 transitions. [2018-12-08 13:26:02,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,810 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-12-08 13:26:02,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,811 INFO L225 Difference]: With dead ends: 144 [2018-12-08 13:26:02,811 INFO L226 Difference]: Without dead ends: 142 [2018-12-08 13:26:02,811 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-12-08 13:26:02,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-12-08 13:26:02,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 13:26:02,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 176 transitions. [2018-12-08 13:26:02,816 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 176 transitions. Word has length 13 [2018-12-08 13:26:02,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,816 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 176 transitions. [2018-12-08 13:26:02,816 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,816 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 176 transitions. [2018-12-08 13:26:02,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-08 13:26:02,816 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,817 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,817 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,817 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,817 INFO L82 PathProgramCache]: Analyzing trace with hash 343163019, now seen corresponding path program 1 times [2018-12-08 13:26:02,817 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,818 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,855 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-08 13:26:02,855 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:02,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,856 INFO L87 Difference]: Start difference. First operand 142 states and 176 transitions. Second operand 3 states. [2018-12-08 13:26:02,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,885 INFO L93 Difference]: Finished difference Result 142 states and 176 transitions. [2018-12-08 13:26:02,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,885 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-12-08 13:26:02,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,886 INFO L225 Difference]: With dead ends: 142 [2018-12-08 13:26:02,887 INFO L226 Difference]: Without dead ends: 140 [2018-12-08 13:26:02,887 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-12-08 13:26:02,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-12-08 13:26:02,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-12-08 13:26:02,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 174 transitions. [2018-12-08 13:26:02,894 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 174 transitions. Word has length 15 [2018-12-08 13:26:02,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,894 INFO L480 AbstractCegarLoop]: Abstraction has 140 states and 174 transitions. [2018-12-08 13:26:02,894 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,894 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 174 transitions. [2018-12-08 13:26:02,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-08 13:26:02,895 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,895 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,896 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,896 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1254383198, now seen corresponding path program 1 times [2018-12-08 13:26:02,896 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,896 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:02,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:02,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:02,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:02,955 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-08 13:26:02,955 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:02,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 13:26:02,955 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:02,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:02,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,956 INFO L87 Difference]: Start difference. First operand 140 states and 174 transitions. Second operand 3 states. [2018-12-08 13:26:02,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:02,983 INFO L93 Difference]: Finished difference Result 264 states and 334 transitions. [2018-12-08 13:26:02,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:02,983 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-12-08 13:26:02,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:02,984 INFO L225 Difference]: With dead ends: 264 [2018-12-08 13:26:02,984 INFO L226 Difference]: Without dead ends: 143 [2018-12-08 13:26:02,985 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:02,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-12-08 13:26:02,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-12-08 13:26:02,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-12-08 13:26:02,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 177 transitions. [2018-12-08 13:26:02,992 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 177 transitions. Word has length 22 [2018-12-08 13:26:02,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:02,992 INFO L480 AbstractCegarLoop]: Abstraction has 143 states and 177 transitions. [2018-12-08 13:26:02,992 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:02,992 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 177 transitions. [2018-12-08 13:26:02,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-08 13:26:02,993 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:02,993 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:02,994 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:02,994 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:02,994 INFO L82 PathProgramCache]: Analyzing trace with hash 1182405925, now seen corresponding path program 1 times [2018-12-08 13:26:02,994 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:02,994 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,061 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-08 13:26:03,061 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:03,061 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 13:26:03,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 13:26:03,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 13:26:03,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 13:26:03,062 INFO L87 Difference]: Start difference. First operand 143 states and 177 transitions. Second operand 4 states. [2018-12-08 13:26:03,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:03,124 INFO L93 Difference]: Finished difference Result 151 states and 187 transitions. [2018-12-08 13:26:03,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 13:26:03,124 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-12-08 13:26:03,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:03,126 INFO L225 Difference]: With dead ends: 151 [2018-12-08 13:26:03,126 INFO L226 Difference]: Without dead ends: 150 [2018-12-08 13:26:03,127 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 13:26:03,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-12-08 13:26:03,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 142. [2018-12-08 13:26:03,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-08 13:26:03,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 176 transitions. [2018-12-08 13:26:03,136 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 176 transitions. Word has length 25 [2018-12-08 13:26:03,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:03,136 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 176 transitions. [2018-12-08 13:26:03,136 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 13:26:03,136 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 176 transitions. [2018-12-08 13:26:03,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-08 13:26:03,137 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:03,137 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:03,138 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:03,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:03,138 INFO L82 PathProgramCache]: Analyzing trace with hash 1182405980, now seen corresponding path program 1 times [2018-12-08 13:26:03,138 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:03,138 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,146 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,147 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,208 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-08 13:26:03,208 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:03,208 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:03,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:03,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:03,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:03,209 INFO L87 Difference]: Start difference. First operand 142 states and 176 transitions. Second operand 3 states. [2018-12-08 13:26:03,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:03,226 INFO L93 Difference]: Finished difference Result 142 states and 176 transitions. [2018-12-08 13:26:03,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:03,226 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-12-08 13:26:03,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:03,227 INFO L225 Difference]: With dead ends: 142 [2018-12-08 13:26:03,227 INFO L226 Difference]: Without dead ends: 141 [2018-12-08 13:26:03,228 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:03,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-12-08 13:26:03,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-12-08 13:26:03,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-12-08 13:26:03,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 175 transitions. [2018-12-08 13:26:03,232 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 175 transitions. Word has length 25 [2018-12-08 13:26:03,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:03,233 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 175 transitions. [2018-12-08 13:26:03,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:03,233 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 175 transitions. [2018-12-08 13:26:03,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-12-08 13:26:03,234 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:03,234 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:03,235 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:03,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:03,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1458323352, now seen corresponding path program 1 times [2018-12-08 13:26:03,235 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:03,235 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,294 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:03,295 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:03,295 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:03,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,361 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:03,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:03,407 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:03,407 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-12-08 13:26:03,407 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 13:26:03,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 13:26:03,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-08 13:26:03,407 INFO L87 Difference]: Start difference. First operand 141 states and 175 transitions. Second operand 5 states. [2018-12-08 13:26:03,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:03,439 INFO L93 Difference]: Finished difference Result 277 states and 345 transitions. [2018-12-08 13:26:03,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 13:26:03,439 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-12-08 13:26:03,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:03,440 INFO L225 Difference]: With dead ends: 277 [2018-12-08 13:26:03,440 INFO L226 Difference]: Without dead ends: 146 [2018-12-08 13:26:03,441 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-08 13:26:03,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-08 13:26:03,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-12-08 13:26:03,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-12-08 13:26:03,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 178 transitions. [2018-12-08 13:26:03,446 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 178 transitions. Word has length 27 [2018-12-08 13:26:03,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:03,446 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 178 transitions. [2018-12-08 13:26:03,446 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 13:26:03,446 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 178 transitions. [2018-12-08 13:26:03,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-12-08 13:26:03,447 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:03,447 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:03,448 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:03,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:03,448 INFO L82 PathProgramCache]: Analyzing trace with hash -672341546, now seen corresponding path program 2 times [2018-12-08 13:26:03,448 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:03,448 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,519 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:03,520 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:03,520 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:03,542 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 13:26:03,581 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 13:26:03,581 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:03,583 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:03,611 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-12-08 13:26:03,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 13:26:03,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 7 [2018-12-08 13:26:03,627 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-08 13:26:03,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-08 13:26:03,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-08 13:26:03,628 INFO L87 Difference]: Start difference. First operand 144 states and 178 transitions. Second operand 7 states. [2018-12-08 13:26:03,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:03,751 INFO L93 Difference]: Finished difference Result 290 states and 361 transitions. [2018-12-08 13:26:03,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 13:26:03,751 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 30 [2018-12-08 13:26:03,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:03,752 INFO L225 Difference]: With dead ends: 290 [2018-12-08 13:26:03,752 INFO L226 Difference]: Without dead ends: 159 [2018-12-08 13:26:03,753 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-08 13:26:03,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-12-08 13:26:03,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 148. [2018-12-08 13:26:03,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-08 13:26:03,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 182 transitions. [2018-12-08 13:26:03,758 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 182 transitions. Word has length 30 [2018-12-08 13:26:03,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:03,759 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 182 transitions. [2018-12-08 13:26:03,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-08 13:26:03,759 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 182 transitions. [2018-12-08 13:26:03,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 13:26:03,759 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:03,759 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:03,760 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:03,760 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:03,760 INFO L82 PathProgramCache]: Analyzing trace with hash -205191436, now seen corresponding path program 1 times [2018-12-08 13:26:03,760 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:03,760 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,767 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:03,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,808 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 13:26:03,808 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:03,808 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:03,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:03,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:03,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:03,809 INFO L87 Difference]: Start difference. First operand 148 states and 182 transitions. Second operand 3 states. [2018-12-08 13:26:03,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:03,836 INFO L93 Difference]: Finished difference Result 158 states and 193 transitions. [2018-12-08 13:26:03,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:03,836 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-12-08 13:26:03,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:03,837 INFO L225 Difference]: With dead ends: 158 [2018-12-08 13:26:03,837 INFO L226 Difference]: Without dead ends: 157 [2018-12-08 13:26:03,838 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:03,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-08 13:26:03,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 156. [2018-12-08 13:26:03,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-12-08 13:26:03,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 192 transitions. [2018-12-08 13:26:03,843 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 192 transitions. Word has length 32 [2018-12-08 13:26:03,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:03,843 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 192 transitions. [2018-12-08 13:26:03,843 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:03,843 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 192 transitions. [2018-12-08 13:26:03,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-08 13:26:03,844 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:03,844 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:03,844 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:03,845 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:03,845 INFO L82 PathProgramCache]: Analyzing trace with hash -205189738, now seen corresponding path program 1 times [2018-12-08 13:26:03,845 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:03,845 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,884 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 13:26:03,884 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:03,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:03,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:03,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:03,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:03,885 INFO L87 Difference]: Start difference. First operand 156 states and 192 transitions. Second operand 3 states. [2018-12-08 13:26:03,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:03,896 INFO L93 Difference]: Finished difference Result 156 states and 192 transitions. [2018-12-08 13:26:03,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:03,897 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-12-08 13:26:03,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:03,897 INFO L225 Difference]: With dead ends: 156 [2018-12-08 13:26:03,897 INFO L226 Difference]: Without dead ends: 155 [2018-12-08 13:26:03,897 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:03,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-12-08 13:26:03,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 151. [2018-12-08 13:26:03,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-08 13:26:03,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 186 transitions. [2018-12-08 13:26:03,901 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 186 transitions. Word has length 32 [2018-12-08 13:26:03,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:03,901 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 186 transitions. [2018-12-08 13:26:03,901 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:03,901 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 186 transitions. [2018-12-08 13:26:03,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-12-08 13:26:03,902 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:03,902 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:03,902 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:03,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:03,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1301076365, now seen corresponding path program 1 times [2018-12-08 13:26:03,902 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:03,902 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:03,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:03,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:03,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:03,946 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 13:26:03,946 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:03,947 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:03,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:04,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:04,008 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:04,058 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-08 13:26:04,074 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:04,074 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6] total 8 [2018-12-08 13:26:04,074 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 13:26:04,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 13:26:04,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-08 13:26:04,074 INFO L87 Difference]: Start difference. First operand 151 states and 186 transitions. Second operand 8 states. [2018-12-08 13:26:04,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:04,138 INFO L93 Difference]: Finished difference Result 301 states and 373 transitions. [2018-12-08 13:26:04,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 13:26:04,138 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-12-08 13:26:04,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:04,139 INFO L225 Difference]: With dead ends: 301 [2018-12-08 13:26:04,139 INFO L226 Difference]: Without dead ends: 166 [2018-12-08 13:26:04,140 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-08 13:26:04,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-12-08 13:26:04,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 160. [2018-12-08 13:26:04,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-12-08 13:26:04,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 195 transitions. [2018-12-08 13:26:04,146 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 195 transitions. Word has length 40 [2018-12-08 13:26:04,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:04,146 INFO L480 AbstractCegarLoop]: Abstraction has 160 states and 195 transitions. [2018-12-08 13:26:04,146 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 13:26:04,146 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 195 transitions. [2018-12-08 13:26:04,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-12-08 13:26:04,147 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:04,147 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:04,148 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:04,148 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:04,148 INFO L82 PathProgramCache]: Analyzing trace with hash 532136062, now seen corresponding path program 2 times [2018-12-08 13:26:04,148 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:04,148 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:04,153 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:04,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:04,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:04,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:04,215 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-08 13:26:04,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:04,216 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:04,236 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 13:26:04,273 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-08 13:26:04,273 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:04,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:04,289 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-08 13:26:04,315 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 13:26:04,315 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2018-12-08 13:26:04,315 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-08 13:26:04,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-08 13:26:04,315 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 13:26:04,315 INFO L87 Difference]: Start difference. First operand 160 states and 195 transitions. Second operand 6 states. [2018-12-08 13:26:04,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:04,359 INFO L93 Difference]: Finished difference Result 312 states and 391 transitions. [2018-12-08 13:26:04,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 13:26:04,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 46 [2018-12-08 13:26:04,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:04,361 INFO L225 Difference]: With dead ends: 312 [2018-12-08 13:26:04,362 INFO L226 Difference]: Without dead ends: 188 [2018-12-08 13:26:04,362 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-08 13:26:04,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-12-08 13:26:04,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 167. [2018-12-08 13:26:04,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-12-08 13:26:04,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 202 transitions. [2018-12-08 13:26:04,366 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 202 transitions. Word has length 46 [2018-12-08 13:26:04,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:04,367 INFO L480 AbstractCegarLoop]: Abstraction has 167 states and 202 transitions. [2018-12-08 13:26:04,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-08 13:26:04,367 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 202 transitions. [2018-12-08 13:26:04,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-12-08 13:26:04,367 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:04,367 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:04,367 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:04,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:04,368 INFO L82 PathProgramCache]: Analyzing trace with hash -1211589613, now seen corresponding path program 1 times [2018-12-08 13:26:04,368 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:04,368 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:04,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:04,371 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:04,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:04,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:04,432 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-08 13:26:04,433 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:04,433 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:04,452 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:04,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:04,504 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:04,565 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-08 13:26:04,581 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:04,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 11 [2018-12-08 13:26:04,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 13:26:04,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 13:26:04,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-08 13:26:04,582 INFO L87 Difference]: Start difference. First operand 167 states and 202 transitions. Second operand 11 states. [2018-12-08 13:26:04,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:04,662 INFO L93 Difference]: Finished difference Result 330 states and 402 transitions. [2018-12-08 13:26:04,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-08 13:26:04,663 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 50 [2018-12-08 13:26:04,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:04,663 INFO L225 Difference]: With dead ends: 330 [2018-12-08 13:26:04,663 INFO L226 Difference]: Without dead ends: 182 [2018-12-08 13:26:04,664 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-08 13:26:04,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-12-08 13:26:04,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 176. [2018-12-08 13:26:04,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-12-08 13:26:04,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 211 transitions. [2018-12-08 13:26:04,669 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 211 transitions. Word has length 50 [2018-12-08 13:26:04,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:04,669 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 211 transitions. [2018-12-08 13:26:04,669 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 13:26:04,669 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 211 transitions. [2018-12-08 13:26:04,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-12-08 13:26:04,670 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:04,670 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:04,670 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:04,670 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:04,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1484183166, now seen corresponding path program 2 times [2018-12-08 13:26:04,670 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:04,671 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:04,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:04,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:04,675 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:04,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:04,744 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-08 13:26:04,744 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:04,744 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:04,763 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 13:26:04,824 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 13:26:04,824 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:04,828 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:04,913 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-12-08 13:26:04,929 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:04,929 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 13 [2018-12-08 13:26:04,930 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 13:26:04,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 13:26:04,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-12-08 13:26:04,930 INFO L87 Difference]: Start difference. First operand 176 states and 211 transitions. Second operand 13 states. [2018-12-08 13:26:05,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:05,027 INFO L93 Difference]: Finished difference Result 345 states and 417 transitions. [2018-12-08 13:26:05,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-08 13:26:05,027 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2018-12-08 13:26:05,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:05,028 INFO L225 Difference]: With dead ends: 345 [2018-12-08 13:26:05,028 INFO L226 Difference]: Without dead ends: 191 [2018-12-08 13:26:05,029 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-12-08 13:26:05,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-12-08 13:26:05,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 185. [2018-12-08 13:26:05,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-12-08 13:26:05,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 220 transitions. [2018-12-08 13:26:05,037 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 220 transitions. Word has length 56 [2018-12-08 13:26:05,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:05,037 INFO L480 AbstractCegarLoop]: Abstraction has 185 states and 220 transitions. [2018-12-08 13:26:05,037 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 13:26:05,037 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 220 transitions. [2018-12-08 13:26:05,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-08 13:26:05,037 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:05,038 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:05,038 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:05,038 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:05,038 INFO L82 PathProgramCache]: Analyzing trace with hash 1464125235, now seen corresponding path program 3 times [2018-12-08 13:26:05,038 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:05,039 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:05,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:05,043 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:05,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:05,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:05,148 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-08 13:26:05,148 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:05,148 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:05,168 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 13:26:06,133 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-08 13:26:06,133 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:06,136 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:06,148 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-08 13:26:06,166 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:06,166 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-08 13:26:06,166 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-08 13:26:06,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-08 13:26:06,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-08 13:26:06,167 INFO L87 Difference]: Start difference. First operand 185 states and 220 transitions. Second operand 9 states. [2018-12-08 13:26:06,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:06,202 INFO L93 Difference]: Finished difference Result 329 states and 399 transitions. [2018-12-08 13:26:06,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 13:26:06,202 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 62 [2018-12-08 13:26:06,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:06,202 INFO L225 Difference]: With dead ends: 329 [2018-12-08 13:26:06,203 INFO L226 Difference]: Without dead ends: 195 [2018-12-08 13:26:06,203 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-08 13:26:06,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-12-08 13:26:06,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 191. [2018-12-08 13:26:06,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-12-08 13:26:06,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 226 transitions. [2018-12-08 13:26:06,208 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 226 transitions. Word has length 62 [2018-12-08 13:26:06,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:06,208 INFO L480 AbstractCegarLoop]: Abstraction has 191 states and 226 transitions. [2018-12-08 13:26:06,208 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-08 13:26:06,208 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 226 transitions. [2018-12-08 13:26:06,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-12-08 13:26:06,208 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:06,208 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:06,209 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:06,209 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:06,209 INFO L82 PathProgramCache]: Analyzing trace with hash 613455476, now seen corresponding path program 4 times [2018-12-08 13:26:06,209 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:06,209 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:06,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:06,212 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:06,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:06,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:06,301 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-08 13:26:06,301 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:06,301 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:06,321 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-08 13:26:06,370 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-08 13:26:06,370 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:06,373 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:06,384 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-08 13:26:06,399 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:06,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-08 13:26:06,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-08 13:26:06,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-08 13:26:06,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-08 13:26:06,400 INFO L87 Difference]: Start difference. First operand 191 states and 226 transitions. Second operand 10 states. [2018-12-08 13:26:06,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:06,446 INFO L93 Difference]: Finished difference Result 362 states and 432 transitions. [2018-12-08 13:26:06,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-08 13:26:06,447 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-12-08 13:26:06,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:06,447 INFO L225 Difference]: With dead ends: 362 [2018-12-08 13:26:06,448 INFO L226 Difference]: Without dead ends: 196 [2018-12-08 13:26:06,448 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-08 13:26:06,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-12-08 13:26:06,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 194. [2018-12-08 13:26:06,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-12-08 13:26:06,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 229 transitions. [2018-12-08 13:26:06,455 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 229 transitions. Word has length 65 [2018-12-08 13:26:06,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:06,455 INFO L480 AbstractCegarLoop]: Abstraction has 194 states and 229 transitions. [2018-12-08 13:26:06,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-08 13:26:06,455 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 229 transitions. [2018-12-08 13:26:06,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-08 13:26:06,455 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:06,456 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:06,456 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:06,456 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:06,456 INFO L82 PathProgramCache]: Analyzing trace with hash -420268702, now seen corresponding path program 5 times [2018-12-08 13:26:06,456 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:06,456 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:06,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:06,461 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:06,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:06,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:06,561 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-08 13:26:06,561 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:06,561 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:06,583 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-08 13:26:07,806 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-12-08 13:26:07,806 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:07,808 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:07,899 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 1 proven. 51 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-08 13:26:07,915 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:07,915 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-12-08 13:26:07,915 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-08 13:26:07,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-08 13:26:07,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-12-08 13:26:07,916 INFO L87 Difference]: Start difference. First operand 194 states and 229 transitions. Second operand 17 states. [2018-12-08 13:26:08,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:08,016 INFO L93 Difference]: Finished difference Result 375 states and 447 transitions. [2018-12-08 13:26:08,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 13:26:08,016 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 68 [2018-12-08 13:26:08,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:08,017 INFO L225 Difference]: With dead ends: 375 [2018-12-08 13:26:08,017 INFO L226 Difference]: Without dead ends: 209 [2018-12-08 13:26:08,018 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-12-08 13:26:08,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-12-08 13:26:08,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 203. [2018-12-08 13:26:08,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-12-08 13:26:08,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 238 transitions. [2018-12-08 13:26:08,025 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 238 transitions. Word has length 68 [2018-12-08 13:26:08,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:08,025 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 238 transitions. [2018-12-08 13:26:08,026 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-08 13:26:08,026 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 238 transitions. [2018-12-08 13:26:08,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-12-08 13:26:08,026 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:08,026 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:08,027 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:08,027 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:08,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1212679597, now seen corresponding path program 6 times [2018-12-08 13:26:08,027 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:08,027 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:08,032 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:08,032 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:08,032 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:08,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:08,131 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 1 proven. 70 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-08 13:26:08,131 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:08,132 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:08,148 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-08 13:26:22,774 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-12-08 13:26:22,774 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:22,779 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:22,907 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-08 13:26:22,926 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:22,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 19 [2018-12-08 13:26:22,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-08 13:26:22,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-08 13:26:22,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-12-08 13:26:22,927 INFO L87 Difference]: Start difference. First operand 203 states and 238 transitions. Second operand 19 states. [2018-12-08 13:26:23,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:23,041 INFO L93 Difference]: Finished difference Result 390 states and 462 transitions. [2018-12-08 13:26:23,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 13:26:23,042 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 74 [2018-12-08 13:26:23,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:23,042 INFO L225 Difference]: With dead ends: 390 [2018-12-08 13:26:23,042 INFO L226 Difference]: Without dead ends: 218 [2018-12-08 13:26:23,043 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-12-08 13:26:23,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-12-08 13:26:23,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 212. [2018-12-08 13:26:23,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-12-08 13:26:23,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 247 transitions. [2018-12-08 13:26:23,048 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 247 transitions. Word has length 74 [2018-12-08 13:26:23,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:23,048 INFO L480 AbstractCegarLoop]: Abstraction has 212 states and 247 transitions. [2018-12-08 13:26:23,048 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-08 13:26:23,049 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 247 transitions. [2018-12-08 13:26:23,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-12-08 13:26:23,049 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:23,049 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:23,049 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:23,050 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:23,050 INFO L82 PathProgramCache]: Analyzing trace with hash -38749886, now seen corresponding path program 7 times [2018-12-08 13:26:23,050 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:23,050 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:23,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:23,053 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:23,053 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:23,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:23,177 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 1 proven. 92 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-12-08 13:26:23,177 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:23,177 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:23,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:23,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:23,267 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:23,411 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-08 13:26:23,426 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:23,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 21 [2018-12-08 13:26:23,426 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-08 13:26:23,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-08 13:26:23,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-08 13:26:23,426 INFO L87 Difference]: Start difference. First operand 212 states and 247 transitions. Second operand 21 states. [2018-12-08 13:26:23,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:23,554 INFO L93 Difference]: Finished difference Result 403 states and 475 transitions. [2018-12-08 13:26:23,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-08 13:26:23,554 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 80 [2018-12-08 13:26:23,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:23,555 INFO L225 Difference]: With dead ends: 403 [2018-12-08 13:26:23,555 INFO L226 Difference]: Without dead ends: 225 [2018-12-08 13:26:23,555 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-08 13:26:23,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-12-08 13:26:23,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 221. [2018-12-08 13:26:23,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-12-08 13:26:23,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 256 transitions. [2018-12-08 13:26:23,560 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 256 transitions. Word has length 80 [2018-12-08 13:26:23,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:23,560 INFO L480 AbstractCegarLoop]: Abstraction has 221 states and 256 transitions. [2018-12-08 13:26:23,560 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-08 13:26:23,560 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 256 transitions. [2018-12-08 13:26:23,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 13:26:23,561 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:23,561 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:23,561 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:23,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:23,561 INFO L82 PathProgramCache]: Analyzing trace with hash -622054029, now seen corresponding path program 8 times [2018-12-08 13:26:23,561 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:23,561 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:23,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:23,564 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:23,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:23,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:23,673 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-08 13:26:23,673 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:23,673 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:23,690 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 13:26:23,743 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 13:26:23,743 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:23,746 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:23,757 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-08 13:26:23,772 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:23,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-08 13:26:23,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 13:26:23,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 13:26:23,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-08 13:26:23,773 INFO L87 Difference]: Start difference. First operand 221 states and 256 transitions. Second operand 13 states. [2018-12-08 13:26:23,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:23,826 INFO L93 Difference]: Finished difference Result 373 states and 443 transitions. [2018-12-08 13:26:23,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-08 13:26:23,827 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 86 [2018-12-08 13:26:23,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:23,828 INFO L225 Difference]: With dead ends: 373 [2018-12-08 13:26:23,828 INFO L226 Difference]: Without dead ends: 227 [2018-12-08 13:26:23,828 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-08 13:26:23,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-12-08 13:26:23,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 227. [2018-12-08 13:26:23,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2018-12-08 13:26:23,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 262 transitions. [2018-12-08 13:26:23,833 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 262 transitions. Word has length 86 [2018-12-08 13:26:23,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:23,833 INFO L480 AbstractCegarLoop]: Abstraction has 227 states and 262 transitions. [2018-12-08 13:26:23,833 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 13:26:23,834 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 262 transitions. [2018-12-08 13:26:23,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-08 13:26:23,834 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:23,834 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:23,835 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:23,835 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:23,835 INFO L82 PathProgramCache]: Analyzing trace with hash -576225228, now seen corresponding path program 9 times [2018-12-08 13:26:23,835 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:23,835 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:23,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:23,839 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:23,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:23,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:24,813 WARN L180 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 40 [2018-12-08 13:26:25,394 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 37 [2018-12-08 13:26:25,678 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 37 [2018-12-08 13:26:25,852 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 37 [2018-12-08 13:26:26,860 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 291 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 13:26:26,860 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:26:26,860 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:26:26,876 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-08 13:26:53,311 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-12-08 13:26:53,312 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:26:53,319 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:26:53,530 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-08 13:26:53,531 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,540 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,540 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-12-08 13:26:53,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:53,598 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:53,598 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-08 13:26:53,599 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,628 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-08 13:26:53,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-08 13:26:53,630 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,633 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,664 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-08 13:26:53,667 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-08 13:26:53,667 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,670 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,694 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:59, output treesize:49 [2018-12-08 13:26:53,773 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:53,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:53,778 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:53,778 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-12-08 13:26:53,779 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 634 treesize of output 452 [2018-12-08 13:26:53,945 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:53,948 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-08 13:26:53,948 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:53,980 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 154 treesize of output 146 [2018-12-08 13:26:53,984 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-08 13:26:53,984 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 150 [2018-12-08 13:26:54,027 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 1 [2018-12-08 13:26:54,027 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,042 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,053 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,068 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,109 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 191 treesize of output 105 [2018-12-08 13:26:54,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:26:54,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-08 13:26:54,151 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,169 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 58 [2018-12-08 13:26:54,171 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-08 13:26:54,172 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,196 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 70 [2018-12-08 13:26:54,199 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-12-08 13:26:54,199 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,210 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,218 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,226 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,255 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:54,256 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 7 variables, input treesize:676, output treesize:101 [2018-12-08 13:26:54,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:54,361 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:54,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,377 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,420 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:54,423 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:54,423 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,434 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,459 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:54,459 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:54,480 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:54,483 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:54,483 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,501 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,545 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:54,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:54,548 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,557 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,581 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:54,582 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:54,602 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:54,605 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:54,605 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,621 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,665 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:54,669 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:54,669 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,682 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:54,719 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:54,739 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:54,742 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:54,742 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,758 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:54,802 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:54,802 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,812 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,837 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:54,838 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:54,859 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:54,862 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:54,862 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,878 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:54,924 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:54,925 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,934 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,959 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:54,960 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:54,979 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:54,983 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:54,983 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:54,998 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,042 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:55,046 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:55,046 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,056 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:55,081 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:55,101 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:55,105 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:55,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,122 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,168 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:55,171 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:55,171 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,182 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:55,208 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:55,227 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-08 13:26:55,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:55,231 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,247 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,295 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-08 13:26:55,297 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:55,298 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,309 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:55,337 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:55,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-08 13:26:55,362 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:55,362 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,429 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-08 13:26:55,432 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:55,432 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,446 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:55,481 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:55,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-08 13:26:55,507 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-08 13:26:55,507 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,520 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,565 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-08 13:26:55,568 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-08 13:26:55,568 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,580 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,605 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-08 13:26:55,605 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-08 13:26:55,858 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 36 [2018-12-08 13:26:55,860 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 13:26:55,864 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 21 [2018-12-08 13:26:55,864 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-12-08 13:26:55,875 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,877 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,897 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-12-08 13:26:55,899 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-12-08 13:26:55,899 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,907 INFO L683 Elim1Store]: detected equality via solver [2018-12-08 13:26:55,907 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-12-08 13:26:55,907 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,912 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,922 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:26:55,922 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 6 variables, input treesize:84, output treesize:7 [2018-12-08 13:26:55,988 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 22 proven. 54 refuted. 0 times theorem prover too weak. 215 trivial. 0 not checked. [2018-12-08 13:26:56,008 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 13:26:56,008 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 14] total 46 [2018-12-08 13:26:56,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-12-08 13:26:56,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-12-08 13:26:56,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=1770, Unknown=0, NotChecked=0, Total=2070 [2018-12-08 13:26:56,010 INFO L87 Difference]: Start difference. First operand 227 states and 262 transitions. Second operand 46 states. [2018-12-08 13:26:59,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,311 INFO L93 Difference]: Finished difference Result 352 states and 422 transitions. [2018-12-08 13:26:59,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-12-08 13:26:59,311 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 89 [2018-12-08 13:26:59,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,312 INFO L225 Difference]: With dead ends: 352 [2018-12-08 13:26:59,312 INFO L226 Difference]: Without dead ends: 243 [2018-12-08 13:26:59,313 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 82 SyntacticMatches, 6 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 971 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=742, Invalid=3418, Unknown=0, NotChecked=0, Total=4160 [2018-12-08 13:26:59,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-12-08 13:26:59,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 234. [2018-12-08 13:26:59,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-12-08 13:26:59,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 272 transitions. [2018-12-08 13:26:59,323 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 272 transitions. Word has length 89 [2018-12-08 13:26:59,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,323 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 272 transitions. [2018-12-08 13:26:59,323 INFO L481 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-12-08 13:26:59,323 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 272 transitions. [2018-12-08 13:26:59,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-12-08 13:26:59,324 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,325 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,325 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,325 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,325 INFO L82 PathProgramCache]: Analyzing trace with hash 1101225913, now seen corresponding path program 1 times [2018-12-08 13:26:59,325 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,325 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,332 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-08 13:26:59,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-08 13:26:59,423 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:59,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 13:26:59,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 13:26:59,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 13:26:59,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 13:26:59,424 INFO L87 Difference]: Start difference. First operand 234 states and 272 transitions. Second operand 4 states. [2018-12-08 13:26:59,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,472 INFO L93 Difference]: Finished difference Result 235 states and 273 transitions. [2018-12-08 13:26:59,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 13:26:59,473 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 90 [2018-12-08 13:26:59,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,474 INFO L225 Difference]: With dead ends: 235 [2018-12-08 13:26:59,474 INFO L226 Difference]: Without dead ends: 234 [2018-12-08 13:26:59,474 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 13:26:59,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-12-08 13:26:59,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 233. [2018-12-08 13:26:59,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-12-08 13:26:59,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 271 transitions. [2018-12-08 13:26:59,485 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 271 transitions. Word has length 90 [2018-12-08 13:26:59,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,485 INFO L480 AbstractCegarLoop]: Abstraction has 233 states and 271 transitions. [2018-12-08 13:26:59,485 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 13:26:59,485 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 271 transitions. [2018-12-08 13:26:59,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-12-08 13:26:59,486 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,486 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,486 INFO L423 AbstractCegarLoop]: === Iteration 26 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,486 INFO L82 PathProgramCache]: Analyzing trace with hash -221734862, now seen corresponding path program 1 times [2018-12-08 13:26:59,486 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,486 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:59,491 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:59,544 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-08 13:26:59,544 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:59,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:59,544 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:59,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:59,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:59,545 INFO L87 Difference]: Start difference. First operand 233 states and 271 transitions. Second operand 3 states. [2018-12-08 13:26:59,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,563 INFO L93 Difference]: Finished difference Result 237 states and 275 transitions. [2018-12-08 13:26:59,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:59,563 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 91 [2018-12-08 13:26:59,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,564 INFO L225 Difference]: With dead ends: 237 [2018-12-08 13:26:59,564 INFO L226 Difference]: Without dead ends: 236 [2018-12-08 13:26:59,564 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:59,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-12-08 13:26:59,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 236. [2018-12-08 13:26:59,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-12-08 13:26:59,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 274 transitions. [2018-12-08 13:26:59,576 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 274 transitions. Word has length 91 [2018-12-08 13:26:59,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,576 INFO L480 AbstractCegarLoop]: Abstraction has 236 states and 274 transitions. [2018-12-08 13:26:59,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:59,576 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 274 transitions. [2018-12-08 13:26:59,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-12-08 13:26:59,577 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,577 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,577 INFO L423 AbstractCegarLoop]: === Iteration 27 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,577 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,577 INFO L82 PathProgramCache]: Analyzing trace with hash -43375882, now seen corresponding path program 1 times [2018-12-08 13:26:59,578 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,578 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:59,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:59,636 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-08 13:26:59,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:59,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:59,637 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:59,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:59,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:59,637 INFO L87 Difference]: Start difference. First operand 236 states and 274 transitions. Second operand 3 states. [2018-12-08 13:26:59,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,650 INFO L93 Difference]: Finished difference Result 236 states and 274 transitions. [2018-12-08 13:26:59,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:59,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 94 [2018-12-08 13:26:59,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,651 INFO L225 Difference]: With dead ends: 236 [2018-12-08 13:26:59,651 INFO L226 Difference]: Without dead ends: 219 [2018-12-08 13:26:59,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:59,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-12-08 13:26:59,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 218. [2018-12-08 13:26:59,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-12-08 13:26:59,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 250 transitions. [2018-12-08 13:26:59,657 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 250 transitions. Word has length 94 [2018-12-08 13:26:59,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,658 INFO L480 AbstractCegarLoop]: Abstraction has 218 states and 250 transitions. [2018-12-08 13:26:59,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:59,658 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 250 transitions. [2018-12-08 13:26:59,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-08 13:26:59,658 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,658 INFO L402 BasicCegarLoop]: trace histogram [20, 20, 20, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,659 INFO L423 AbstractCegarLoop]: === Iteration 28 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,659 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,659 INFO L82 PathProgramCache]: Analyzing trace with hash 1510247437, now seen corresponding path program 1 times [2018-12-08 13:26:59,659 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,659 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:59,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:59,724 INFO L134 CoverageAnalysis]: Checked inductivity of 759 backedges. 324 proven. 0 refuted. 0 times theorem prover too weak. 435 trivial. 0 not checked. [2018-12-08 13:26:59,724 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:59,724 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-08 13:26:59,724 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 13:26:59,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 13:26:59,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:59,725 INFO L87 Difference]: Start difference. First operand 218 states and 250 transitions. Second operand 3 states. [2018-12-08 13:26:59,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,743 INFO L93 Difference]: Finished difference Result 218 states and 250 transitions. [2018-12-08 13:26:59,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 13:26:59,743 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-12-08 13:26:59,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,744 INFO L225 Difference]: With dead ends: 218 [2018-12-08 13:26:59,744 INFO L226 Difference]: Without dead ends: 217 [2018-12-08 13:26:59,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 13:26:59,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-12-08 13:26:59,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 217. [2018-12-08 13:26:59,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-12-08 13:26:59,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 249 transitions. [2018-12-08 13:26:59,754 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 249 transitions. Word has length 114 [2018-12-08 13:26:59,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,754 INFO L480 AbstractCegarLoop]: Abstraction has 217 states and 249 transitions. [2018-12-08 13:26:59,754 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 13:26:59,754 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 249 transitions. [2018-12-08 13:26:59,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-12-08 13:26:59,755 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,755 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,756 INFO L423 AbstractCegarLoop]: === Iteration 29 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,756 INFO L82 PathProgramCache]: Analyzing trace with hash 1035682170, now seen corresponding path program 1 times [2018-12-08 13:26:59,756 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:59,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:59,824 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-08 13:26:59,825 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:59,825 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 13:26:59,825 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 13:26:59,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 13:26:59,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 13:26:59,825 INFO L87 Difference]: Start difference. First operand 217 states and 249 transitions. Second operand 4 states. [2018-12-08 13:26:59,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,845 INFO L93 Difference]: Finished difference Result 225 states and 258 transitions. [2018-12-08 13:26:59,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 13:26:59,845 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 126 [2018-12-08 13:26:59,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,846 INFO L225 Difference]: With dead ends: 225 [2018-12-08 13:26:59,846 INFO L226 Difference]: Without dead ends: 224 [2018-12-08 13:26:59,846 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 13:26:59,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-12-08 13:26:59,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 222. [2018-12-08 13:26:59,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-12-08 13:26:59,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 255 transitions. [2018-12-08 13:26:59,853 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 255 transitions. Word has length 126 [2018-12-08 13:26:59,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,853 INFO L480 AbstractCegarLoop]: Abstraction has 222 states and 255 transitions. [2018-12-08 13:26:59,853 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 13:26:59,853 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 255 transitions. [2018-12-08 13:26:59,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-08 13:26:59,853 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,854 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,854 INFO L423 AbstractCegarLoop]: === Iteration 30 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,854 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,854 INFO L82 PathProgramCache]: Analyzing trace with hash 2041376282, now seen corresponding path program 1 times [2018-12-08 13:26:59,854 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,854 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,857 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:59,857 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:26:59,916 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-08 13:26:59,917 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 13:26:59,917 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 13:26:59,917 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 13:26:59,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 13:26:59,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 13:26:59,917 INFO L87 Difference]: Start difference. First operand 222 states and 255 transitions. Second operand 4 states. [2018-12-08 13:26:59,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 13:26:59,936 INFO L93 Difference]: Finished difference Result 224 states and 257 transitions. [2018-12-08 13:26:59,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 13:26:59,936 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 127 [2018-12-08 13:26:59,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 13:26:59,937 INFO L225 Difference]: With dead ends: 224 [2018-12-08 13:26:59,937 INFO L226 Difference]: Without dead ends: 223 [2018-12-08 13:26:59,937 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-08 13:26:59,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-12-08 13:26:59,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2018-12-08 13:26:59,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-12-08 13:26:59,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 256 transitions. [2018-12-08 13:26:59,944 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 256 transitions. Word has length 127 [2018-12-08 13:26:59,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 13:26:59,944 INFO L480 AbstractCegarLoop]: Abstraction has 223 states and 256 transitions. [2018-12-08 13:26:59,944 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 13:26:59,944 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 256 transitions. [2018-12-08 13:26:59,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-12-08 13:26:59,945 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 13:26:59,945 INFO L402 BasicCegarLoop]: trace histogram [20, 20, 20, 10, 10, 10, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 13:26:59,945 INFO L423 AbstractCegarLoop]: === Iteration 31 === [__mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, __mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, full_writeErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-08 13:26:59,945 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 13:26:59,945 INFO L82 PathProgramCache]: Analyzing trace with hash -1749488180, now seen corresponding path program 10 times [2018-12-08 13:26:59,945 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 13:26:59,945 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 13:26:59,949 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:26:59,949 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 13:26:59,949 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 13:27:00,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 13:27:01,680 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 45 [2018-12-08 13:27:01,911 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 46 [2018-12-08 13:27:02,157 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 47 [2018-12-08 13:27:02,351 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 49 [2018-12-08 13:27:02,547 WARN L180 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 49 [2018-12-08 13:27:02,824 WARN L180 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 50 [2018-12-08 13:27:03,229 WARN L180 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 50 [2018-12-08 13:27:03,410 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 50 [2018-12-08 13:27:03,720 WARN L180 SmtUtils]: Spent 232.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 49 [2018-12-08 13:27:04,086 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 50 [2018-12-08 13:27:04,318 WARN L180 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 49 [2018-12-08 13:27:05,202 INFO L134 CoverageAnalysis]: Checked inductivity of 761 backedges. 0 proven. 527 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-12-08 13:27:05,203 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 13:27:05,203 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_60994297-c280-4100-a871-a09741277ae8/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:27:05,218 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-08 13:27:05,305 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-08 13:27:05,306 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-08 13:27:05,312 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 13:27:05,317 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 164 treesize of output 151 [2018-12-08 13:27:05,323 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,358 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 151 treesize of output 142 [2018-12-08 13:27:05,367 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 123 [2018-12-08 13:27:05,388 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 107 [2018-12-08 13:27:05,483 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 116 [2018-12-08 13:27:05,704 WARN L180 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 40 [2018-12-08 13:27:05,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,758 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,770 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,776 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,781 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:05,782 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 124 [2018-12-08 13:27:05,985 WARN L180 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 48 [2018-12-08 13:27:06,012 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,016 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,033 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,036 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,043 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,047 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,051 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,055 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,059 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,059 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 16 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 138 [2018-12-08 13:27:06,263 WARN L180 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 57 [2018-12-08 13:27:06,283 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,286 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,288 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,301 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,303 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,308 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,310 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,313 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,316 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,318 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,322 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 155 [2018-12-08 13:27:06,501 WARN L180 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 68 [2018-12-08 13:27:06,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,542 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:06,542 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 181 [2018-12-08 13:27:06,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 175 [2018-12-08 13:27:06,560 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:06,643 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:06,728 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:06,816 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:06,912 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:07,003 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:07,106 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:07,205 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:07,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,375 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,417 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 138 treesize of output 133 [2018-12-08 13:27:07,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 127 treesize of output 118 [2018-12-08 13:27:07,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,506 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,519 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 120 [2018-12-08 13:27:07,668 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 42 [2018-12-08 13:27:07,703 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,716 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,740 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,740 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 11 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 128 [2018-12-08 13:27:07,952 WARN L180 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 50 [2018-12-08 13:27:07,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:07,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,007 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,015 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,017 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,020 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,023 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,023 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 17 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 142 [2018-12-08 13:27:08,231 WARN L180 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 59 [2018-12-08 13:27:08,252 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,260 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,273 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,276 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,278 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,280 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,282 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,287 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,289 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,290 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 24 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 159 [2018-12-08 13:27:08,433 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 70 [2018-12-08 13:27:08,442 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,446 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,458 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,459 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,460 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,461 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:08,462 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 32 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 185 [2018-12-08 13:27:08,475 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 32 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 179 [2018-12-08 13:27:08,476 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:08,564 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:08,651 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:08,743 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:08,837 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:08,930 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:09,034 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:09,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,294 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 125 treesize of output 124 [2018-12-08 13:27:09,808 WARN L180 SmtUtils]: Spent 512.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 72 [2018-12-08 13:27:09,818 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:09,860 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 135 [2018-12-08 13:27:10,069 WARN L180 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 45 [2018-12-08 13:27:10,077 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,099 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,104 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,115 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,120 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,139 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,145 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,146 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 12 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 132 [2018-12-08 13:27:10,364 WARN L180 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 52 [2018-12-08 13:27:10,386 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,397 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,426 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 18 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 146 [2018-12-08 13:27:10,627 WARN L180 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 61 [2018-12-08 13:27:10,647 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,652 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,654 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,659 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,681 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,685 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 25 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 163 [2018-12-08 13:27:10,880 WARN L180 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 72 [2018-12-08 13:27:10,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,901 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:10,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 33 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 189 [2018-12-08 13:27:10,928 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 33 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 183 [2018-12-08 13:27:10,928 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:11,014 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:11,103 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:11,196 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:11,296 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:11,404 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:11,571 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,575 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,580 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,637 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,660 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:11,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 113 treesize of output 137 [2018-12-08 13:27:12,289 WARN L180 SmtUtils]: Spent 584.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 76 [2018-12-08 13:27:12,299 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,325 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,339 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,376 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,389 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,393 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:12,419 INFO L303 Elim1Store]: Index analysis took 129 ms [2018-12-08 13:27:12,454 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 14 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 100 treesize of output 146 [2018-12-08 13:27:13,062 WARN L180 SmtUtils]: Spent 606.00 ms on a formula simplification. DAG size of input: 98 DAG size of output: 82 [2018-12-08 13:27:13,083 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,085 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,129 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,133 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,138 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 16 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 150 [2018-12-08 13:27:13,339 WARN L180 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 57 [2018-12-08 13:27:13,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,361 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,366 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,381 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,384 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,392 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,395 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,410 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 157 [2018-12-08 13:27:13,587 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 68 [2018-12-08 13:27:13,600 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,601 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,604 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,612 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,616 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,618 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,621 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,623 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:13,626 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 181 [2018-12-08 13:27:13,643 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 175 [2018-12-08 13:27:13,643 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:13,725 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:13,816 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:13,916 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:14,108 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,111 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,115 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,119 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,122 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,126 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,143 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,169 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,202 INFO L303 Elim1Store]: Index analysis took 119 ms [2018-12-08 13:27:14,230 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 101 treesize of output 164 [2018-12-08 13:27:14,874 WARN L180 SmtUtils]: Spent 642.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 92 [2018-12-08 13:27:14,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,897 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,903 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,927 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,929 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,932 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,935 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,938 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,941 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,944 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:14,945 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 173 [2018-12-08 13:27:15,138 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 68 [2018-12-08 13:27:15,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,171 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,172 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,179 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,184 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 181 [2018-12-08 13:27:15,200 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 175 [2018-12-08 13:27:15,200 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:15,286 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:15,385 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:15,603 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,605 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,608 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,611 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,614 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,617 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,631 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,634 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,645 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,648 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,651 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,653 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,655 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,658 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,668 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,676 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:15,685 INFO L303 Elim1Store]: Index analysis took 101 ms [2018-12-08 13:27:15,702 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 29 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 109 treesize of output 187 [2018-12-08 13:27:16,307 WARN L180 SmtUtils]: Spent 603.00 ms on a formula simplification. DAG size of input: 124 DAG size of output: 102 [2018-12-08 13:27:16,319 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,322 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,334 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,335 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,341 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,342 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,344 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,345 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,347 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,348 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,350 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,351 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,358 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,360 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,367 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 38 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 124 treesize of output 215 [2018-12-08 13:27:16,408 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 39 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 211 treesize of output 213 [2018-12-08 13:27:16,409 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 2 xjuncts. [2018-12-08 13:27:16,902 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,914 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,916 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:16,918 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 143 treesize of output 191 [2018-12-08 13:27:16,918 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:17,324 INFO L267 ElimStorePlain]: Start of recursive call 38: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-08 13:27:17,823 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,825 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,826 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,835 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,844 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,848 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,850 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:17,852 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 197 [2018-12-08 13:27:17,868 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 175 [2018-12-08 13:27:17,869 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:17,977 INFO L267 ElimStorePlain]: Start of recursive call 41: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:18,478 INFO L267 ElimStorePlain]: Start of recursive call 37: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-08 13:27:19,097 INFO L267 ElimStorePlain]: Start of recursive call 33: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-08 13:27:19,825 INFO L267 ElimStorePlain]: Start of recursive call 28: 2 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-12-08 13:27:20,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,635 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,640 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,644 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,649 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,690 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,695 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,696 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 13 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 148 [2018-12-08 13:27:20,944 WARN L180 SmtUtils]: Spent 247.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 54 [2018-12-08 13:27:20,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,955 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,959 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,963 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:20,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,002 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,006 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,010 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,010 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 19 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 150 [2018-12-08 13:27:21,240 WARN L180 SmtUtils]: Spent 228.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 63 [2018-12-08 13:27:21,249 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,254 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,263 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,281 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,284 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,290 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,292 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,295 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,297 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,300 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,302 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,302 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 26 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 169 [2018-12-08 13:27:21,507 WARN L180 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 74 [2018-12-08 13:27:21,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,515 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,516 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,518 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,525 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,527 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,531 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,532 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,534 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,535 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,537 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,538 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,540 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,541 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:21,542 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 34 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 193 [2018-12-08 13:27:21,552 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 34 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 187 [2018-12-08 13:27:21,553 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:21,649 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:21,741 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:21,839 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:21,946 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-08 13:27:22,762 INFO L267 ElimStorePlain]: Start of recursive call 27: 2 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-12-08 13:27:23,812 INFO L267 ElimStorePlain]: Start of recursive call 20: 2 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-12-08 13:27:24,873 INFO L267 ElimStorePlain]: Start of recursive call 12: 2 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-12-08 13:27:26,053 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-12-08 13:27:27,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-12-08 13:27:28,620 INFO L701 Elim1Store]: detected not equals via solver [2018-12-08 13:27:28,622 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-12-08 13:27:28,622 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 1 xjuncts. [2018-12-08 13:27:29,757 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 63 dim-0 vars, and 10 xjuncts. [2018-12-08 13:27:29,757 INFO L202 ElimStorePlain]: Needed 48 recursive calls to eliminate 9 variables, input treesize:181, output treesize:1832 [2018-12-08 13:28:27,509 WARN L194 Executor]: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) stderr output: (error "out of memory") [2018-12-08 13:28:27,710 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 13:28:27,711 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:225) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:61) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.getRedundancy(SimplifyDDA.java:626) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SimplifyDDAWithTimeout.getRedundancy(SimplifyDDAWithTimeout.java:122) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA$Simplifier.walk(SimplifyDDA.java:371) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.simplifyOnce(SimplifyDDA.java:650) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SimplifyDDAWithTimeout.getSimplifiedTerm(SimplifyDDAWithTimeout.java:191) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SmtUtils.simplify(SmtUtils.java:151) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:354) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:299) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:575) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:200) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:286) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:232) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1427) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:630) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:419) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:205) ... 45 more [2018-12-08 13:28:27,717 INFO L168 Benchmark]: Toolchain (without parser) took 146721.42 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 197.1 MB). Free memory was 957.1 MB in the beginning and 1.1 GB in the end (delta: -95.7 MB). Peak memory consumption was 101.4 MB. Max. memory is 11.5 GB. [2018-12-08 13:28:27,718 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 13:28:27,718 INFO L168 Benchmark]: CACSL2BoogieTranslator took 518.37 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 957.1 MB in the beginning and 1.0 GB in the end (delta: -56.3 MB). Peak memory consumption was 59.9 MB. Max. memory is 11.5 GB. [2018-12-08 13:28:27,719 INFO L168 Benchmark]: Boogie Procedure Inliner took 27.56 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 13:28:27,719 INFO L168 Benchmark]: Boogie Preprocessor took 35.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. [2018-12-08 13:28:27,719 INFO L168 Benchmark]: RCFGBuilder took 557.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 933.0 MB in the end (delta: 71.8 MB). Peak memory consumption was 71.8 MB. Max. memory is 11.5 GB. [2018-12-08 13:28:27,719 INFO L168 Benchmark]: TraceAbstraction took 145579.87 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 94.9 MB). Free memory was 933.0 MB in the beginning and 1.1 GB in the end (delta: -119.8 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 13:28:27,720 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 518.37 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 957.1 MB in the beginning and 1.0 GB in the end (delta: -56.3 MB). Peak memory consumption was 59.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 27.56 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 35.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 557.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 933.0 MB in the end (delta: 71.8 MB). Peak memory consumption was 71.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 145579.87 ms. Allocated memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: 94.9 MB). Free memory was 933.0 MB in the beginning and 1.1 GB in the end (delta: -119.8 MB). There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...