./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash eb1520ccd16a6dcbfeb7912e1d04b4742bbea576 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/config using search string *Overflow*64bit*_Bitvector*.epf No suitable settings file found using Overflow*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 01:38:16,359 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 01:38:16,360 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 01:38:16,368 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 01:38:16,369 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 01:38:16,369 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 01:38:16,370 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 01:38:16,372 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 01:38:16,373 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 01:38:16,373 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 01:38:16,374 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 01:38:16,374 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 01:38:16,375 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 01:38:16,376 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 01:38:16,376 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 01:38:16,377 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 01:38:16,378 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 01:38:16,379 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 01:38:16,380 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 01:38:16,382 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 01:38:16,382 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 01:38:16,383 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 01:38:16,385 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 01:38:16,385 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 01:38:16,385 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 01:38:16,386 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 01:38:16,387 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 01:38:16,387 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 01:38:16,388 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 01:38:16,389 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 01:38:16,389 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 01:38:16,389 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 01:38:16,389 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 01:38:16,390 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 01:38:16,390 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 01:38:16,391 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 01:38:16,391 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/config/svcomp-Overflow-64bit-Automizer_Default.epf [2018-12-09 01:38:16,401 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 01:38:16,401 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 01:38:16,402 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 01:38:16,402 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 01:38:16,402 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 01:38:16,403 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 01:38:16,403 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 01:38:16,403 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 01:38:16,403 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-12-09 01:38:16,403 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 01:38:16,403 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 01:38:16,403 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 01:38:16,404 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 01:38:16,404 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 01:38:16,404 INFO L133 SettingsManager]: * Check absence of signed integer overflows=true [2018-12-09 01:38:16,404 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 01:38:16,404 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 01:38:16,404 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 01:38:16,405 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 01:38:16,405 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 01:38:16,405 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 01:38:16,406 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 01:38:16,406 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eb1520ccd16a6dcbfeb7912e1d04b4742bbea576 [2018-12-09 01:38:16,427 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 01:38:16,434 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 01:38:16,436 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 01:38:16,437 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 01:38:16,437 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 01:38:16,438 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/../../sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i [2018-12-09 01:38:16,471 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/data/dd7fef04a/62a19919551a4efa9b3a593f7b328a0f/FLAG962bebf66 [2018-12-09 01:38:16,945 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 01:38:16,945 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/sv-benchmarks/c/busybox-1.22.0/dirname_true-no-overflow_true-valid-memsafety.i [2018-12-09 01:38:16,954 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/data/dd7fef04a/62a19919551a4efa9b3a593f7b328a0f/FLAG962bebf66 [2018-12-09 01:38:17,456 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/data/dd7fef04a/62a19919551a4efa9b3a593f7b328a0f [2018-12-09 01:38:17,458 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 01:38:17,459 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 01:38:17,460 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 01:38:17,460 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 01:38:17,462 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 01:38:17,463 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 01:38:17" (1/1) ... [2018-12-09 01:38:17,465 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56b5df9b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:17, skipping insertion in model container [2018-12-09 01:38:17,465 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 01:38:17" (1/1) ... [2018-12-09 01:38:17,470 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 01:38:17,496 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 01:38:17,845 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 01:38:17,861 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 01:38:17,906 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 01:38:18,002 INFO L195 MainTranslator]: Completed translation [2018-12-09 01:38:18,002 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18 WrapperNode [2018-12-09 01:38:18,002 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 01:38:18,003 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 01:38:18,003 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 01:38:18,003 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 01:38:18,008 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,023 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,029 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 01:38:18,029 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 01:38:18,029 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 01:38:18,029 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 01:38:18,036 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,036 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,039 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,039 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,048 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,052 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,054 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... [2018-12-09 01:38:18,056 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 01:38:18,056 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 01:38:18,056 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 01:38:18,057 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 01:38:18,057 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 01:38:18,088 INFO L130 BoogieDeclarations]: Found specification of procedure __main [2018-12-09 01:38:18,089 INFO L138 BoogieDeclarations]: Found implementation of procedure __main [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 01:38:18,089 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure fflush_all [2018-12-09 01:38:18,089 INFO L138 BoogieDeclarations]: Found implementation of procedure fflush_all [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure single_argv [2018-12-09 01:38:18,089 INFO L138 BoogieDeclarations]: Found implementation of procedure single_argv [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure bb_show_usage [2018-12-09 01:38:18,089 INFO L138 BoogieDeclarations]: Found implementation of procedure bb_show_usage [2018-12-09 01:38:18,089 INFO L130 BoogieDeclarations]: Found specification of procedure dirname [2018-12-09 01:38:18,089 INFO L138 BoogieDeclarations]: Found implementation of procedure dirname [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure puts [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure fflush [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 01:38:18,090 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-09 01:38:18,090 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 01:38:18,090 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 01:38:18,422 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 01:38:18,422 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-12-09 01:38:18,422 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:38:18 BoogieIcfgContainer [2018-12-09 01:38:18,422 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 01:38:18,423 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 01:38:18,423 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 01:38:18,425 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 01:38:18,425 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 01:38:17" (1/3) ... [2018-12-09 01:38:18,426 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ef69a3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 01:38:18, skipping insertion in model container [2018-12-09 01:38:18,426 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 01:38:18" (2/3) ... [2018-12-09 01:38:18,426 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ef69a3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 01:38:18, skipping insertion in model container [2018-12-09 01:38:18,427 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 01:38:18" (3/3) ... [2018-12-09 01:38:18,428 INFO L112 eAbstractionObserver]: Analyzing ICFG dirname_true-no-overflow_true-valid-memsafety.i [2018-12-09 01:38:18,436 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 01:38:18,442 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 28 error locations. [2018-12-09 01:38:18,453 INFO L257 AbstractCegarLoop]: Starting to check reachability of 28 error locations. [2018-12-09 01:38:18,470 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 01:38:18,471 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 01:38:18,471 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 01:38:18,471 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 01:38:18,471 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 01:38:18,471 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 01:38:18,471 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 01:38:18,471 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 01:38:18,471 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 01:38:18,483 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states. [2018-12-09 01:38:18,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-12-09 01:38:18,486 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:18,487 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:18,488 INFO L423 AbstractCegarLoop]: === Iteration 1 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:18,492 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:18,492 INFO L82 PathProgramCache]: Analyzing trace with hash -484679774, now seen corresponding path program 1 times [2018-12-09 01:38:18,493 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:18,493 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:18,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:18,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:18,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:38:18,621 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:18,621 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:18,623 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:18,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:18,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,633 INFO L87 Difference]: Start difference. First operand 118 states. Second operand 3 states. [2018-12-09 01:38:18,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:18,665 INFO L93 Difference]: Finished difference Result 226 states and 277 transitions. [2018-12-09 01:38:18,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:18,666 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-12-09 01:38:18,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:18,672 INFO L225 Difference]: With dead ends: 226 [2018-12-09 01:38:18,672 INFO L226 Difference]: Without dead ends: 113 [2018-12-09 01:38:18,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-12-09 01:38:18,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-12-09 01:38:18,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-12-09 01:38:18,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 131 transitions. [2018-12-09 01:38:18,702 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 131 transitions. Word has length 8 [2018-12-09 01:38:18,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:18,702 INFO L480 AbstractCegarLoop]: Abstraction has 113 states and 131 transitions. [2018-12-09 01:38:18,702 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:18,702 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 131 transitions. [2018-12-09 01:38:18,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-12-09 01:38:18,703 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:18,703 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:18,703 INFO L423 AbstractCegarLoop]: === Iteration 2 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:18,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:18,704 INFO L82 PathProgramCache]: Analyzing trace with hash -2140170941, now seen corresponding path program 1 times [2018-12-09 01:38:18,704 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:18,704 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:18,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:18,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:18,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:38:18,744 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:18,745 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:18,745 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:18,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:18,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,746 INFO L87 Difference]: Start difference. First operand 113 states and 131 transitions. Second operand 3 states. [2018-12-09 01:38:18,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:18,763 INFO L93 Difference]: Finished difference Result 116 states and 134 transitions. [2018-12-09 01:38:18,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:18,763 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2018-12-09 01:38:18,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:18,764 INFO L225 Difference]: With dead ends: 116 [2018-12-09 01:38:18,764 INFO L226 Difference]: Without dead ends: 115 [2018-12-09 01:38:18,765 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-12-09 01:38:18,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-12-09 01:38:18,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-09 01:38:18,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 133 transitions. [2018-12-09 01:38:18,771 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 133 transitions. Word has length 9 [2018-12-09 01:38:18,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:18,771 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 133 transitions. [2018-12-09 01:38:18,771 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:18,771 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 133 transitions. [2018-12-09 01:38:18,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 01:38:18,772 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:18,772 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:18,772 INFO L423 AbstractCegarLoop]: === Iteration 3 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:18,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:18,773 INFO L82 PathProgramCache]: Analyzing trace with hash 957163037, now seen corresponding path program 1 times [2018-12-09 01:38:18,773 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:18,773 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:18,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:18,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:18,806 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:38:18,806 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:18,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:18,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:18,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:18,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,807 INFO L87 Difference]: Start difference. First operand 115 states and 133 transitions. Second operand 3 states. [2018-12-09 01:38:18,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:18,838 INFO L93 Difference]: Finished difference Result 115 states and 133 transitions. [2018-12-09 01:38:18,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:18,839 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-09 01:38:18,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:18,839 INFO L225 Difference]: With dead ends: 115 [2018-12-09 01:38:18,839 INFO L226 Difference]: Without dead ends: 111 [2018-12-09 01:38:18,840 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-12-09 01:38:18,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-12-09 01:38:18,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-12-09 01:38:18,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 129 transitions. [2018-12-09 01:38:18,845 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 129 transitions. Word has length 12 [2018-12-09 01:38:18,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:18,845 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 129 transitions. [2018-12-09 01:38:18,845 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:18,845 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 129 transitions. [2018-12-09 01:38:18,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-12-09 01:38:18,846 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:18,846 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:18,846 INFO L423 AbstractCegarLoop]: === Iteration 4 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:18,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:18,846 INFO L82 PathProgramCache]: Analyzing trace with hash 957164767, now seen corresponding path program 1 times [2018-12-09 01:38:18,846 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:18,847 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:18,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:18,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:18,876 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:38:18,877 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:18,877 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:18,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:18,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:18,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,878 INFO L87 Difference]: Start difference. First operand 111 states and 129 transitions. Second operand 3 states. [2018-12-09 01:38:18,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:18,888 INFO L93 Difference]: Finished difference Result 111 states and 129 transitions. [2018-12-09 01:38:18,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:18,889 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-12-09 01:38:18,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:18,889 INFO L225 Difference]: With dead ends: 111 [2018-12-09 01:38:18,890 INFO L226 Difference]: Without dead ends: 110 [2018-12-09 01:38:18,890 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-12-09 01:38:18,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 108. [2018-12-09 01:38:18,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 01:38:18,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 126 transitions. [2018-12-09 01:38:18,896 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 126 transitions. Word has length 12 [2018-12-09 01:38:18,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:18,897 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 126 transitions. [2018-12-09 01:38:18,897 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:18,897 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 126 transitions. [2018-12-09 01:38:18,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-12-09 01:38:18,897 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:18,897 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:18,898 INFO L423 AbstractCegarLoop]: === Iteration 5 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:18,898 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:18,898 INFO L82 PathProgramCache]: Analyzing trace with hash -392716752, now seen corresponding path program 1 times [2018-12-09 01:38:18,899 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:18,899 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:18,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:18,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:18,932 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:38:18,932 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:18,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:18,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:18,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:18,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,933 INFO L87 Difference]: Start difference. First operand 108 states and 126 transitions. Second operand 3 states. [2018-12-09 01:38:18,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:18,972 INFO L93 Difference]: Finished difference Result 108 states and 126 transitions. [2018-12-09 01:38:18,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:18,972 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-12-09 01:38:18,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:18,973 INFO L225 Difference]: With dead ends: 108 [2018-12-09 01:38:18,973 INFO L226 Difference]: Without dead ends: 106 [2018-12-09 01:38:18,973 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:18,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-12-09 01:38:18,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-12-09 01:38:18,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 01:38:18,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 124 transitions. [2018-12-09 01:38:18,978 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 124 transitions. Word has length 13 [2018-12-09 01:38:18,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:18,978 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 124 transitions. [2018-12-09 01:38:18,978 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:18,979 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 124 transitions. [2018-12-09 01:38:18,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-12-09 01:38:18,979 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:18,979 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:18,979 INFO L423 AbstractCegarLoop]: === Iteration 6 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:18,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:18,980 INFO L82 PathProgramCache]: Analyzing trace with hash 556328978, now seen corresponding path program 1 times [2018-12-09 01:38:18,980 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:18,980 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:18,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:18,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:18,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,002 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:38:19,002 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,002 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:19,003 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:19,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:19,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,003 INFO L87 Difference]: Start difference. First operand 106 states and 124 transitions. Second operand 3 states. [2018-12-09 01:38:19,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,027 INFO L93 Difference]: Finished difference Result 106 states and 124 transitions. [2018-12-09 01:38:19,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:19,028 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2018-12-09 01:38:19,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,028 INFO L225 Difference]: With dead ends: 106 [2018-12-09 01:38:19,028 INFO L226 Difference]: Without dead ends: 104 [2018-12-09 01:38:19,029 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-12-09 01:38:19,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 104. [2018-12-09 01:38:19,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-12-09 01:38:19,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 122 transitions. [2018-12-09 01:38:19,034 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 122 transitions. Word has length 15 [2018-12-09 01:38:19,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,034 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 122 transitions. [2018-12-09 01:38:19,034 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:19,035 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 122 transitions. [2018-12-09 01:38:19,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-12-09 01:38:19,035 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,035 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,036 INFO L423 AbstractCegarLoop]: === Iteration 7 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1553574359, now seen corresponding path program 1 times [2018-12-09 01:38:19,036 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,036 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,071 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:38:19,071 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,071 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 01:38:19,071 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:19,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:19,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,072 INFO L87 Difference]: Start difference. First operand 104 states and 122 transitions. Second operand 3 states. [2018-12-09 01:38:19,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,091 INFO L93 Difference]: Finished difference Result 192 states and 230 transitions. [2018-12-09 01:38:19,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:19,092 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-12-09 01:38:19,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,093 INFO L225 Difference]: With dead ends: 192 [2018-12-09 01:38:19,093 INFO L226 Difference]: Without dead ends: 107 [2018-12-09 01:38:19,094 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-12-09 01:38:19,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-12-09 01:38:19,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-12-09 01:38:19,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 125 transitions. [2018-12-09 01:38:19,100 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 125 transitions. Word has length 22 [2018-12-09 01:38:19,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,100 INFO L480 AbstractCegarLoop]: Abstraction has 107 states and 125 transitions. [2018-12-09 01:38:19,100 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:19,100 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 125 transitions. [2018-12-09 01:38:19,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 01:38:19,101 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,101 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,101 INFO L423 AbstractCegarLoop]: === Iteration 8 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,102 INFO L82 PathProgramCache]: Analyzing trace with hash -32009876, now seen corresponding path program 1 times [2018-12-09 01:38:19,102 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,102 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,104 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:38:19,151 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,152 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 01:38:19,152 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 01:38:19,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 01:38:19,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 01:38:19,152 INFO L87 Difference]: Start difference. First operand 107 states and 125 transitions. Second operand 4 states. [2018-12-09 01:38:19,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,200 INFO L93 Difference]: Finished difference Result 115 states and 135 transitions. [2018-12-09 01:38:19,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 01:38:19,200 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-12-09 01:38:19,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,202 INFO L225 Difference]: With dead ends: 115 [2018-12-09 01:38:19,202 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 01:38:19,202 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:38:19,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 01:38:19,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 106. [2018-12-09 01:38:19,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-12-09 01:38:19,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 124 transitions. [2018-12-09 01:38:19,212 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 124 transitions. Word has length 25 [2018-12-09 01:38:19,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,213 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 124 transitions. [2018-12-09 01:38:19,213 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 01:38:19,213 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 124 transitions. [2018-12-09 01:38:19,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-12-09 01:38:19,214 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,214 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,214 INFO L423 AbstractCegarLoop]: === Iteration 9 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,215 INFO L82 PathProgramCache]: Analyzing trace with hash -32009821, now seen corresponding path program 1 times [2018-12-09 01:38:19,215 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,215 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,251 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:38:19,252 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:19,252 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:19,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:19,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,253 INFO L87 Difference]: Start difference. First operand 106 states and 124 transitions. Second operand 3 states. [2018-12-09 01:38:19,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,266 INFO L93 Difference]: Finished difference Result 106 states and 124 transitions. [2018-12-09 01:38:19,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:19,266 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-12-09 01:38:19,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,267 INFO L225 Difference]: With dead ends: 106 [2018-12-09 01:38:19,268 INFO L226 Difference]: Without dead ends: 105 [2018-12-09 01:38:19,268 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-12-09 01:38:19,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-12-09 01:38:19,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-12-09 01:38:19,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 123 transitions. [2018-12-09 01:38:19,273 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 123 transitions. Word has length 25 [2018-12-09 01:38:19,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,273 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 123 transitions. [2018-12-09 01:38:19,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:19,274 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 123 transitions. [2018-12-09 01:38:19,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 01:38:19,274 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,274 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,275 INFO L423 AbstractCegarLoop]: === Iteration 10 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,275 INFO L82 PathProgramCache]: Analyzing trace with hash -992305943, now seen corresponding path program 1 times [2018-12-09 01:38:19,275 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,275 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,276 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,308 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:38:19,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:19,308 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:19,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:19,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,309 INFO L87 Difference]: Start difference. First operand 105 states and 123 transitions. Second operand 3 states. [2018-12-09 01:38:19,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,336 INFO L93 Difference]: Finished difference Result 123 states and 144 transitions. [2018-12-09 01:38:19,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:19,337 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-12-09 01:38:19,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,338 INFO L225 Difference]: With dead ends: 123 [2018-12-09 01:38:19,338 INFO L226 Difference]: Without dead ends: 122 [2018-12-09 01:38:19,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-12-09 01:38:19,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 114. [2018-12-09 01:38:19,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-09 01:38:19,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 135 transitions. [2018-12-09 01:38:19,343 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 135 transitions. Word has length 26 [2018-12-09 01:38:19,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,343 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 135 transitions. [2018-12-09 01:38:19,344 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:19,344 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 135 transitions. [2018-12-09 01:38:19,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-12-09 01:38:19,344 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,344 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,345 INFO L423 AbstractCegarLoop]: === Iteration 11 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,345 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,345 INFO L82 PathProgramCache]: Analyzing trace with hash -992304245, now seen corresponding path program 1 times [2018-12-09 01:38:19,345 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,345 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,346 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,380 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-12-09 01:38:19,380 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,380 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:19,381 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:19,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:19,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,381 INFO L87 Difference]: Start difference. First operand 114 states and 135 transitions. Second operand 3 states. [2018-12-09 01:38:19,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,393 INFO L93 Difference]: Finished difference Result 121 states and 143 transitions. [2018-12-09 01:38:19,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:19,394 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2018-12-09 01:38:19,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,395 INFO L225 Difference]: With dead ends: 121 [2018-12-09 01:38:19,395 INFO L226 Difference]: Without dead ends: 120 [2018-12-09 01:38:19,395 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-12-09 01:38:19,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 109. [2018-12-09 01:38:19,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-12-09 01:38:19,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 129 transitions. [2018-12-09 01:38:19,401 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 129 transitions. Word has length 26 [2018-12-09 01:38:19,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,402 INFO L480 AbstractCegarLoop]: Abstraction has 109 states and 129 transitions. [2018-12-09 01:38:19,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:19,402 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 129 transitions. [2018-12-09 01:38:19,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-12-09 01:38:19,403 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,403 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,403 INFO L423 AbstractCegarLoop]: === Iteration 12 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,403 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1525307751, now seen corresponding path program 1 times [2018-12-09 01:38:19,404 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,404 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,405 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,405 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,442 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:38:19,442 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:19,442 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:19,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,507 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:19,537 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:38:19,561 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:19,561 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-12-09 01:38:19,561 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 01:38:19,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 01:38:19,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:38:19,562 INFO L87 Difference]: Start difference. First operand 109 states and 129 transitions. Second operand 5 states. [2018-12-09 01:38:19,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,582 INFO L93 Difference]: Finished difference Result 213 states and 253 transitions. [2018-12-09 01:38:19,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 01:38:19,583 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-12-09 01:38:19,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,583 INFO L225 Difference]: With dead ends: 213 [2018-12-09 01:38:19,583 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 01:38:19,584 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:38:19,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 01:38:19,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 112. [2018-12-09 01:38:19,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-12-09 01:38:19,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 132 transitions. [2018-12-09 01:38:19,587 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 132 transitions. Word has length 29 [2018-12-09 01:38:19,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,588 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 132 transitions. [2018-12-09 01:38:19,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 01:38:19,588 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 132 transitions. [2018-12-09 01:38:19,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-12-09 01:38:19,588 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,588 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,589 INFO L423 AbstractCegarLoop]: === Iteration 13 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,589 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,589 INFO L82 PathProgramCache]: Analyzing trace with hash -1995699453, now seen corresponding path program 2 times [2018-12-09 01:38:19,589 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,589 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,634 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 01:38:19,634 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:19,634 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:19,641 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 01:38:19,685 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 01:38:19,685 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:19,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:19,710 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-12-09 01:38:19,733 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:38:19,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 7 [2018-12-09 01:38:19,734 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 01:38:19,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 01:38:19,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 01:38:19,734 INFO L87 Difference]: Start difference. First operand 112 states and 132 transitions. Second operand 7 states. [2018-12-09 01:38:19,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,821 INFO L93 Difference]: Finished difference Result 216 states and 256 transitions. [2018-12-09 01:38:19,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 01:38:19,822 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-12-09 01:38:19,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,822 INFO L225 Difference]: With dead ends: 216 [2018-12-09 01:38:19,823 INFO L226 Difference]: Without dead ends: 117 [2018-12-09 01:38:19,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 01:38:19,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-12-09 01:38:19,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 115. [2018-12-09 01:38:19,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-12-09 01:38:19,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 134 transitions. [2018-12-09 01:38:19,828 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 134 transitions. Word has length 32 [2018-12-09 01:38:19,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,829 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 134 transitions. [2018-12-09 01:38:19,829 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 01:38:19,829 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 134 transitions. [2018-12-09 01:38:19,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-12-09 01:38:19,829 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,829 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,830 INFO L423 AbstractCegarLoop]: === Iteration 14 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,830 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,830 INFO L82 PathProgramCache]: Analyzing trace with hash -842011914, now seen corresponding path program 1 times [2018-12-09 01:38:19,830 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,830 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,832 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:19,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,857 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-09 01:38:19,857 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:38:19,857 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:38:19,858 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:38:19,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:38:19,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,858 INFO L87 Difference]: Start difference. First operand 115 states and 134 transitions. Second operand 3 states. [2018-12-09 01:38:19,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:19,873 INFO L93 Difference]: Finished difference Result 115 states and 134 transitions. [2018-12-09 01:38:19,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:38:19,873 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-12-09 01:38:19,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:19,874 INFO L225 Difference]: With dead ends: 115 [2018-12-09 01:38:19,874 INFO L226 Difference]: Without dead ends: 114 [2018-12-09 01:38:19,875 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:38:19,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-12-09 01:38:19,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 108. [2018-12-09 01:38:19,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-12-09 01:38:19,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 126 transitions. [2018-12-09 01:38:19,880 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 126 transitions. Word has length 39 [2018-12-09 01:38:19,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:19,880 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 126 transitions. [2018-12-09 01:38:19,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:38:19,880 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 126 transitions. [2018-12-09 01:38:19,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-12-09 01:38:19,881 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:19,881 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:19,881 INFO L423 AbstractCegarLoop]: === Iteration 15 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:19,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:19,882 INFO L82 PathProgramCache]: Analyzing trace with hash -716164038, now seen corresponding path program 1 times [2018-12-09 01:38:19,882 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:19,882 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:19,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:19,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,925 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-09 01:38:19,925 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:19,925 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:19,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:19,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:19,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:20,000 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-12-09 01:38:20,016 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:20,016 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6] total 8 [2018-12-09 01:38:20,016 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-09 01:38:20,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-09 01:38:20,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-09 01:38:20,016 INFO L87 Difference]: Start difference. First operand 108 states and 126 transitions. Second operand 8 states. [2018-12-09 01:38:20,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:20,064 INFO L93 Difference]: Finished difference Result 210 states and 247 transitions. [2018-12-09 01:38:20,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:38:20,065 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-12-09 01:38:20,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:20,065 INFO L225 Difference]: With dead ends: 210 [2018-12-09 01:38:20,065 INFO L226 Difference]: Without dead ends: 118 [2018-12-09 01:38:20,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-12-09 01:38:20,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-12-09 01:38:20,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 114. [2018-12-09 01:38:20,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-12-09 01:38:20,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 132 transitions. [2018-12-09 01:38:20,070 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 132 transitions. Word has length 42 [2018-12-09 01:38:20,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:20,070 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 132 transitions. [2018-12-09 01:38:20,070 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-09 01:38:20,071 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 132 transitions. [2018-12-09 01:38:20,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-12-09 01:38:20,071 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:20,071 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:20,072 INFO L423 AbstractCegarLoop]: === Iteration 16 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:20,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:20,072 INFO L82 PathProgramCache]: Analyzing trace with hash -86642261, now seen corresponding path program 2 times [2018-12-09 01:38:20,072 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:20,072 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:20,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:20,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:20,118 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-09 01:38:20,118 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:20,118 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:20,128 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 01:38:20,167 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-12-09 01:38:20,167 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:20,170 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:20,176 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-12-09 01:38:20,198 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 01:38:20,198 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2018-12-09 01:38:20,198 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 01:38:20,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 01:38:20,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 01:38:20,199 INFO L87 Difference]: Start difference. First operand 114 states and 132 transitions. Second operand 6 states. [2018-12-09 01:38:20,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:20,231 INFO L93 Difference]: Finished difference Result 216 states and 260 transitions. [2018-12-09 01:38:20,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 01:38:20,231 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 48 [2018-12-09 01:38:20,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:20,233 INFO L225 Difference]: With dead ends: 216 [2018-12-09 01:38:20,233 INFO L226 Difference]: Without dead ends: 131 [2018-12-09 01:38:20,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-09 01:38:20,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-12-09 01:38:20,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 118. [2018-12-09 01:38:20,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-12-09 01:38:20,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 136 transitions. [2018-12-09 01:38:20,238 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 136 transitions. Word has length 48 [2018-12-09 01:38:20,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:20,238 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 136 transitions. [2018-12-09 01:38:20,238 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 01:38:20,239 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 136 transitions. [2018-12-09 01:38:20,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-12-09 01:38:20,239 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:20,239 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:20,240 INFO L423 AbstractCegarLoop]: === Iteration 17 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:20,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:20,240 INFO L82 PathProgramCache]: Analyzing trace with hash 1247548610, now seen corresponding path program 1 times [2018-12-09 01:38:20,240 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:20,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:20,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,241 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:20,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:20,289 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-09 01:38:20,289 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:20,289 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:20,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:20,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:20,341 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:20,383 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-12-09 01:38:20,398 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:20,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 11 [2018-12-09 01:38:20,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-09 01:38:20,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-09 01:38:20,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-09 01:38:20,399 INFO L87 Difference]: Start difference. First operand 118 states and 136 transitions. Second operand 11 states. [2018-12-09 01:38:20,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:20,461 INFO L93 Difference]: Finished difference Result 227 states and 264 transitions. [2018-12-09 01:38:20,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-12-09 01:38:20,462 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 52 [2018-12-09 01:38:20,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:20,463 INFO L225 Difference]: With dead ends: 227 [2018-12-09 01:38:20,463 INFO L226 Difference]: Without dead ends: 128 [2018-12-09 01:38:20,463 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-12-09 01:38:20,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-12-09 01:38:20,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 124. [2018-12-09 01:38:20,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-12-09 01:38:20,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 142 transitions. [2018-12-09 01:38:20,469 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 142 transitions. Word has length 52 [2018-12-09 01:38:20,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:20,469 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 142 transitions. [2018-12-09 01:38:20,469 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-09 01:38:20,469 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 142 transitions. [2018-12-09 01:38:20,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-12-09 01:38:20,470 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:20,470 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:20,470 INFO L423 AbstractCegarLoop]: === Iteration 18 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:20,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:20,471 INFO L82 PathProgramCache]: Analyzing trace with hash 2080661809, now seen corresponding path program 2 times [2018-12-09 01:38:20,471 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:20,471 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:20,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:20,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:20,516 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-12-09 01:38:20,516 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:20,516 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:20,523 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 01:38:20,573 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 01:38:20,573 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:20,576 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:20,631 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-12-09 01:38:20,646 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:20,646 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 13 [2018-12-09 01:38:20,647 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 01:38:20,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 01:38:20,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:38:20,647 INFO L87 Difference]: Start difference. First operand 124 states and 142 transitions. Second operand 13 states. [2018-12-09 01:38:20,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:20,703 INFO L93 Difference]: Finished difference Result 236 states and 273 transitions. [2018-12-09 01:38:20,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-12-09 01:38:20,703 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 58 [2018-12-09 01:38:20,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:20,704 INFO L225 Difference]: With dead ends: 236 [2018-12-09 01:38:20,704 INFO L226 Difference]: Without dead ends: 134 [2018-12-09 01:38:20,704 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:38:20,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-12-09 01:38:20,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 130. [2018-12-09 01:38:20,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-12-09 01:38:20,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 148 transitions. [2018-12-09 01:38:20,708 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 148 transitions. Word has length 58 [2018-12-09 01:38:20,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:20,708 INFO L480 AbstractCegarLoop]: Abstraction has 130 states and 148 transitions. [2018-12-09 01:38:20,708 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 01:38:20,708 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 148 transitions. [2018-12-09 01:38:20,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-09 01:38:20,708 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:20,708 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:20,709 INFO L423 AbstractCegarLoop]: === Iteration 19 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:20,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:20,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1647139486, now seen corresponding path program 3 times [2018-12-09 01:38:20,709 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:20,709 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:20,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,710 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:20,710 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:20,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:20,757 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-09 01:38:20,757 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:20,757 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:20,767 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 01:38:22,994 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-12-09 01:38:22,994 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:22,997 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:23,008 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-12-09 01:38:23,025 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:23,025 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-12-09 01:38:23,025 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-09 01:38:23,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-09 01:38:23,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 01:38:23,025 INFO L87 Difference]: Start difference. First operand 130 states and 148 transitions. Second operand 9 states. [2018-12-09 01:38:23,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:23,049 INFO L93 Difference]: Finished difference Result 230 states and 266 transitions. [2018-12-09 01:38:23,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-09 01:38:23,050 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 64 [2018-12-09 01:38:23,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:23,051 INFO L225 Difference]: With dead ends: 230 [2018-12-09 01:38:23,051 INFO L226 Difference]: Without dead ends: 135 [2018-12-09 01:38:23,051 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-12-09 01:38:23,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-12-09 01:38:23,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 133. [2018-12-09 01:38:23,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-12-09 01:38:23,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 151 transitions. [2018-12-09 01:38:23,056 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 151 transitions. Word has length 64 [2018-12-09 01:38:23,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:23,056 INFO L480 AbstractCegarLoop]: Abstraction has 133 states and 151 transitions. [2018-12-09 01:38:23,056 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-09 01:38:23,056 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 151 transitions. [2018-12-09 01:38:23,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-12-09 01:38:23,057 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:23,057 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:23,058 INFO L423 AbstractCegarLoop]: === Iteration 20 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:23,058 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:23,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1571808757, now seen corresponding path program 4 times [2018-12-09 01:38:23,058 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:23,058 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:23,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:23,059 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:23,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:23,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:23,112 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-09 01:38:23,113 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:23,113 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:23,121 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 01:38:23,175 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 01:38:23,175 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:23,178 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:23,190 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-09 01:38:23,215 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:23,215 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-12-09 01:38:23,215 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-09 01:38:23,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-09 01:38:23,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-09 01:38:23,216 INFO L87 Difference]: Start difference. First operand 133 states and 151 transitions. Second operand 10 states. [2018-12-09 01:38:23,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:23,255 INFO L93 Difference]: Finished difference Result 246 states and 282 transitions. [2018-12-09 01:38:23,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 01:38:23,255 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2018-12-09 01:38:23,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:23,256 INFO L225 Difference]: With dead ends: 246 [2018-12-09 01:38:23,256 INFO L226 Difference]: Without dead ends: 138 [2018-12-09 01:38:23,256 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-12-09 01:38:23,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-12-09 01:38:23,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 136. [2018-12-09 01:38:23,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-12-09 01:38:23,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 154 transitions. [2018-12-09 01:38:23,260 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 154 transitions. Word has length 67 [2018-12-09 01:38:23,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:23,261 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 154 transitions. [2018-12-09 01:38:23,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-09 01:38:23,261 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 154 transitions. [2018-12-09 01:38:23,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-09 01:38:23,261 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:23,261 INFO L402 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:23,261 INFO L423 AbstractCegarLoop]: === Iteration 21 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:23,262 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:23,262 INFO L82 PathProgramCache]: Analyzing trace with hash 312181393, now seen corresponding path program 5 times [2018-12-09 01:38:23,262 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:23,262 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:23,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:23,263 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:23,263 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:23,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:23,326 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-12-09 01:38:23,326 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:23,326 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:23,335 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-12-09 01:38:26,790 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-12-09 01:38:26,790 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:26,794 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:26,849 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 1 proven. 51 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-12-09 01:38:26,866 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:26,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-12-09 01:38:26,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-09 01:38:26,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-09 01:38:26,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-12-09 01:38:26,866 INFO L87 Difference]: Start difference. First operand 136 states and 154 transitions. Second operand 17 states. [2018-12-09 01:38:26,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:26,925 INFO L93 Difference]: Finished difference Result 254 states and 291 transitions. [2018-12-09 01:38:26,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-09 01:38:26,926 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 70 [2018-12-09 01:38:26,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:26,927 INFO L225 Difference]: With dead ends: 254 [2018-12-09 01:38:26,927 INFO L226 Difference]: Without dead ends: 146 [2018-12-09 01:38:26,927 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2018-12-09 01:38:26,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-12-09 01:38:26,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 142. [2018-12-09 01:38:26,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-12-09 01:38:26,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 160 transitions. [2018-12-09 01:38:26,934 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 160 transitions. Word has length 70 [2018-12-09 01:38:26,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:26,934 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 160 transitions. [2018-12-09 01:38:26,934 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-09 01:38:26,934 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 160 transitions. [2018-12-09 01:38:26,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-09 01:38:26,935 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:26,935 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:26,935 INFO L423 AbstractCegarLoop]: === Iteration 22 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:26,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:26,935 INFO L82 PathProgramCache]: Analyzing trace with hash 1501953538, now seen corresponding path program 6 times [2018-12-09 01:38:26,936 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:26,936 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:26,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:26,937 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:26,937 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:26,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:27,019 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 1 proven. 70 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-09 01:38:27,020 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:27,020 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:27,030 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-12-09 01:38:32,012 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-12-09 01:38:32,012 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:32,016 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:32,087 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-12-09 01:38:32,105 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:32,105 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 19 [2018-12-09 01:38:32,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-12-09 01:38:32,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-12-09 01:38:32,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-12-09 01:38:32,106 INFO L87 Difference]: Start difference. First operand 142 states and 160 transitions. Second operand 19 states. [2018-12-09 01:38:32,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:32,189 INFO L93 Difference]: Finished difference Result 263 states and 300 transitions. [2018-12-09 01:38:32,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-09 01:38:32,190 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 76 [2018-12-09 01:38:32,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:32,190 INFO L225 Difference]: With dead ends: 263 [2018-12-09 01:38:32,190 INFO L226 Difference]: Without dead ends: 152 [2018-12-09 01:38:32,190 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-12-09 01:38:32,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-12-09 01:38:32,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 148. [2018-12-09 01:38:32,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-12-09 01:38:32,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 166 transitions. [2018-12-09 01:38:32,196 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 166 transitions. Word has length 76 [2018-12-09 01:38:32,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:32,197 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 166 transitions. [2018-12-09 01:38:32,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-12-09 01:38:32,197 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 166 transitions. [2018-12-09 01:38:32,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-09 01:38:32,198 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:32,198 INFO L402 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:32,198 INFO L423 AbstractCegarLoop]: === Iteration 23 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:32,198 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:32,198 INFO L82 PathProgramCache]: Analyzing trace with hash 631233521, now seen corresponding path program 7 times [2018-12-09 01:38:32,198 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:32,198 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:32,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:32,200 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:32,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:32,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:32,284 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 1 proven. 92 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-12-09 01:38:32,284 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:32,284 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:32,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:32,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:32,348 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:32,437 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-12-09 01:38:32,462 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:32,462 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 21 [2018-12-09 01:38:32,463 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-12-09 01:38:32,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-12-09 01:38:32,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-09 01:38:32,463 INFO L87 Difference]: Start difference. First operand 148 states and 166 transitions. Second operand 21 states. [2018-12-09 01:38:32,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:32,533 INFO L93 Difference]: Finished difference Result 270 states and 307 transitions. [2018-12-09 01:38:32,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-12-09 01:38:32,534 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 82 [2018-12-09 01:38:32,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:32,535 INFO L225 Difference]: With dead ends: 270 [2018-12-09 01:38:32,535 INFO L226 Difference]: Without dead ends: 156 [2018-12-09 01:38:32,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2018-12-09 01:38:32,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-12-09 01:38:32,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 154. [2018-12-09 01:38:32,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-12-09 01:38:32,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 172 transitions. [2018-12-09 01:38:32,541 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 172 transitions. Word has length 82 [2018-12-09 01:38:32,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:32,541 INFO L480 AbstractCegarLoop]: Abstraction has 154 states and 172 transitions. [2018-12-09 01:38:32,541 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-12-09 01:38:32,541 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 172 transitions. [2018-12-09 01:38:32,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-09 01:38:32,542 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:32,542 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:32,542 INFO L423 AbstractCegarLoop]: === Iteration 24 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:32,542 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:32,543 INFO L82 PathProgramCache]: Analyzing trace with hash 1461722786, now seen corresponding path program 8 times [2018-12-09 01:38:32,543 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:32,543 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:32,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:32,544 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:38:32,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:32,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:32,616 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 01:38:32,617 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:32,617 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:32,624 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-09 01:38:32,685 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-09 01:38:32,686 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:38:32,688 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:38:32,698 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 1 proven. 117 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2018-12-09 01:38:32,720 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:38:32,720 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-12-09 01:38:32,720 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-09 01:38:32,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-09 01:38:32,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:38:32,721 INFO L87 Difference]: Start difference. First operand 154 states and 172 transitions. Second operand 13 states. [2018-12-09 01:38:32,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:38:32,767 INFO L93 Difference]: Finished difference Result 264 states and 300 transitions. [2018-12-09 01:38:32,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-12-09 01:38:32,768 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 88 [2018-12-09 01:38:32,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:38:32,768 INFO L225 Difference]: With dead ends: 264 [2018-12-09 01:38:32,768 INFO L226 Difference]: Without dead ends: 157 [2018-12-09 01:38:32,769 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-12-09 01:38:32,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-12-09 01:38:32,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-12-09 01:38:32,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-12-09 01:38:32,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 175 transitions. [2018-12-09 01:38:32,775 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 175 transitions. Word has length 88 [2018-12-09 01:38:32,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:38:32,776 INFO L480 AbstractCegarLoop]: Abstraction has 157 states and 175 transitions. [2018-12-09 01:38:32,776 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-09 01:38:32,776 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 175 transitions. [2018-12-09 01:38:32,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-12-09 01:38:32,777 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:38:32,777 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:38:32,777 INFO L423 AbstractCegarLoop]: === Iteration 25 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:38:32,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:38:32,778 INFO L82 PathProgramCache]: Analyzing trace with hash 1012982965, now seen corresponding path program 9 times [2018-12-09 01:38:32,778 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:38:32,778 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:38:32,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:32,779 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:38:32,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:38:32,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:38:33,337 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 28 proven. 29 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-12-09 01:38:33,337 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:38:33,337 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:38:33,344 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-12-09 01:39:03,321 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-12-09 01:39:03,321 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:39:03,330 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:39:03,360 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-12-09 01:39:03,361 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,366 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,366 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-12-09 01:39:03,390 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,391 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,392 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-12-09 01:39:03,392 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,413 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-09 01:39:03,415 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:39:03,415 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,417 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-12-09 01:39:03,438 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:39:03,438 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,439 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,453 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,453 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:59, output treesize:49 [2018-12-09 01:39:03,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,497 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,501 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-12-09 01:39:03,502 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,569 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 634 treesize of output 452 [2018-12-09 01:39:03,643 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,646 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-09 01:39:03,646 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,671 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 178 treesize of output 170 [2018-12-09 01:39:03,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:39:03,674 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,704 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 165 treesize of output 174 [2018-12-09 01:39:03,707 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 111 [2018-12-09 01:39:03,708 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,719 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,726 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,736 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 191 treesize of output 105 [2018-12-09 01:39:03,790 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:03,792 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-12-09 01:39:03,792 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,803 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 58 [2018-12-09 01:39:03,805 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-12-09 01:39:03,805 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 70 [2018-12-09 01:39:03,821 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-12-09 01:39:03,821 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,828 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,832 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,835 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,851 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:03,851 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 7 variables, input treesize:676, output treesize:101 [2018-12-09 01:39:03,900 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-09 01:39:03,903 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:03,903 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,913 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,957 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-09 01:39:03,960 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:03,960 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,967 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:03,981 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:03,981 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:03,995 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 166 [2018-12-09 01:39:03,998 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:03,998 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,036 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-12-09 01:39:04,039 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,039 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,046 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,060 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,085 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,111 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,113 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,113 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,119 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,133 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,146 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,149 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,159 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,186 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,188 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,188 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,194 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,209 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,224 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,226 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,226 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,267 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,267 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,273 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,288 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,302 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,305 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,305 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,341 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,343 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,343 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,349 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,363 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,363 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,378 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,381 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,381 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,394 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,423 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,425 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,425 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,433 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,449 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,449 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,462 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,465 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,465 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,476 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,506 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,506 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,512 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,527 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,527 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,539 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,541 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,542 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,551 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,578 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,580 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,580 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,586 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,600 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,600 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,613 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 169 [2018-12-09 01:39:04,616 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-12-09 01:39:04,616 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,625 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,651 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 107 [2018-12-09 01:39:04,653 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 1 [2018-12-09 01:39:04,653 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,659 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:04,674 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-12-09 01:39:04,674 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:219, output treesize:101 [2018-12-09 01:39:04,928 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-12-09 01:39:04,947 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-09 01:39:04,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 25 [2018-12-09 01:39:04,948 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-09 01:39:04,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-09 01:39:04,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=529, Unknown=0, NotChecked=0, Total=600 [2018-12-09 01:39:04,948 INFO L87 Difference]: Start difference. First operand 157 states and 175 transitions. Second operand 25 states. [2018-12-09 01:39:05,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:05,820 INFO L93 Difference]: Finished difference Result 279 states and 320 transitions. [2018-12-09 01:39:05,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-09 01:39:05,820 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 91 [2018-12-09 01:39:05,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:05,821 INFO L225 Difference]: With dead ends: 279 [2018-12-09 01:39:05,821 INFO L226 Difference]: Without dead ends: 208 [2018-12-09 01:39:05,821 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 90 SyntacticMatches, 6 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=166, Invalid=956, Unknown=0, NotChecked=0, Total=1122 [2018-12-09 01:39:05,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-12-09 01:39:05,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 205. [2018-12-09 01:39:05,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-12-09 01:39:05,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 230 transitions. [2018-12-09 01:39:05,829 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 230 transitions. Word has length 91 [2018-12-09 01:39:05,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:05,829 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 230 transitions. [2018-12-09 01:39:05,829 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-09 01:39:05,829 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 230 transitions. [2018-12-09 01:39:05,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-09 01:39:05,830 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:05,831 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:05,831 INFO L423 AbstractCegarLoop]: === Iteration 26 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:05,831 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:05,831 INFO L82 PathProgramCache]: Analyzing trace with hash -2132172502, now seen corresponding path program 1 times [2018-12-09 01:39:05,831 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:05,831 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:05,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:05,832 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-09 01:39:05,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:05,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:05,865 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-09 01:39:05,865 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:39:05,865 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:39:05,865 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:39:05,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:39:05,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:05,866 INFO L87 Difference]: Start difference. First operand 205 states and 230 transitions. Second operand 3 states. [2018-12-09 01:39:05,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:05,877 INFO L93 Difference]: Finished difference Result 223 states and 250 transitions. [2018-12-09 01:39:05,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:39:05,878 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2018-12-09 01:39:05,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:05,879 INFO L225 Difference]: With dead ends: 223 [2018-12-09 01:39:05,879 INFO L226 Difference]: Without dead ends: 205 [2018-12-09 01:39:05,879 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:05,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-12-09 01:39:05,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2018-12-09 01:39:05,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-12-09 01:39:05,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 230 transitions. [2018-12-09 01:39:05,888 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 230 transitions. Word has length 97 [2018-12-09 01:39:05,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:05,888 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 230 transitions. [2018-12-09 01:39:05,888 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:39:05,888 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 230 transitions. [2018-12-09 01:39:05,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-12-09 01:39:05,889 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:05,889 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:05,889 INFO L423 AbstractCegarLoop]: === Iteration 27 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:05,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:05,889 INFO L82 PathProgramCache]: Analyzing trace with hash -1672837872, now seen corresponding path program 1 times [2018-12-09 01:39:05,889 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:05,889 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:05,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:05,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:39:05,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:05,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:05,920 INFO L134 CoverageAnalysis]: Checked inductivity of 291 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-09 01:39:05,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:39:05,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:39:05,921 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:39:05,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:39:05,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:05,921 INFO L87 Difference]: Start difference. First operand 205 states and 230 transitions. Second operand 3 states. [2018-12-09 01:39:05,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:05,934 INFO L93 Difference]: Finished difference Result 208 states and 233 transitions. [2018-12-09 01:39:05,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:39:05,935 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-12-09 01:39:05,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:05,936 INFO L225 Difference]: With dead ends: 208 [2018-12-09 01:39:05,936 INFO L226 Difference]: Without dead ends: 207 [2018-12-09 01:39:05,936 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:05,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-12-09 01:39:05,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-12-09 01:39:05,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-12-09 01:39:05,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 232 transitions. [2018-12-09 01:39:05,944 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 232 transitions. Word has length 98 [2018-12-09 01:39:05,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:05,944 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 232 transitions. [2018-12-09 01:39:05,944 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:39:05,945 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 232 transitions. [2018-12-09 01:39:05,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-09 01:39:05,945 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:05,945 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:05,945 INFO L423 AbstractCegarLoop]: === Iteration 28 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:05,946 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:05,946 INFO L82 PathProgramCache]: Analyzing trace with hash -1007265881, now seen corresponding path program 1 times [2018-12-09 01:39:05,946 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:05,946 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:05,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:05,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:39:05,947 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:05,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:05,979 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 291 trivial. 0 not checked. [2018-12-09 01:39:05,979 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:39:05,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:39:05,979 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:39:05,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:39:05,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:05,980 INFO L87 Difference]: Start difference. First operand 207 states and 232 transitions. Second operand 3 states. [2018-12-09 01:39:05,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:05,993 INFO L93 Difference]: Finished difference Result 207 states and 232 transitions. [2018-12-09 01:39:05,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:39:05,993 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2018-12-09 01:39:05,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:05,993 INFO L225 Difference]: With dead ends: 207 [2018-12-09 01:39:05,993 INFO L226 Difference]: Without dead ends: 206 [2018-12-09 01:39:05,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:05,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-09 01:39:06,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 204. [2018-12-09 01:39:06,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-12-09 01:39:06,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 229 transitions. [2018-12-09 01:39:06,001 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 229 transitions. Word has length 101 [2018-12-09 01:39:06,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:06,001 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 229 transitions. [2018-12-09 01:39:06,001 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:39:06,001 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 229 transitions. [2018-12-09 01:39:06,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-09 01:39:06,002 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:06,002 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:06,002 INFO L423 AbstractCegarLoop]: === Iteration 29 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:06,002 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:06,002 INFO L82 PathProgramCache]: Analyzing trace with hash 446640932, now seen corresponding path program 1 times [2018-12-09 01:39:06,002 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:06,002 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:06,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:39:06,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:06,050 INFO L134 CoverageAnalysis]: Checked inductivity of 292 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-12-09 01:39:06,050 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:39:06,050 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 01:39:06,050 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 01:39:06,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 01:39:06,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 01:39:06,050 INFO L87 Difference]: Start difference. First operand 204 states and 229 transitions. Second operand 4 states. [2018-12-09 01:39:06,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:06,085 INFO L93 Difference]: Finished difference Result 205 states and 230 transitions. [2018-12-09 01:39:06,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 01:39:06,085 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 113 [2018-12-09 01:39:06,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:06,086 INFO L225 Difference]: With dead ends: 205 [2018-12-09 01:39:06,086 INFO L226 Difference]: Without dead ends: 204 [2018-12-09 01:39:06,086 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-09 01:39:06,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-12-09 01:39:06,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 203. [2018-12-09 01:39:06,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-12-09 01:39:06,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 228 transitions. [2018-12-09 01:39:06,093 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 228 transitions. Word has length 113 [2018-12-09 01:39:06,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:06,094 INFO L480 AbstractCegarLoop]: Abstraction has 203 states and 228 transitions. [2018-12-09 01:39:06,094 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 01:39:06,094 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 228 transitions. [2018-12-09 01:39:06,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-09 01:39:06,094 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:06,094 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:06,094 INFO L423 AbstractCegarLoop]: === Iteration 30 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:06,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:06,095 INFO L82 PathProgramCache]: Analyzing trace with hash 960967235, now seen corresponding path program 1 times [2018-12-09 01:39:06,095 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:06,095 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:06,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:39:06,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:06,126 INFO L134 CoverageAnalysis]: Checked inductivity of 292 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-12-09 01:39:06,127 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:39:06,127 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:39:06,127 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:39:06,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:39:06,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:06,127 INFO L87 Difference]: Start difference. First operand 203 states and 228 transitions. Second operand 3 states. [2018-12-09 01:39:06,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:06,138 INFO L93 Difference]: Finished difference Result 207 states and 232 transitions. [2018-12-09 01:39:06,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:39:06,138 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-12-09 01:39:06,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:06,139 INFO L225 Difference]: With dead ends: 207 [2018-12-09 01:39:06,139 INFO L226 Difference]: Without dead ends: 206 [2018-12-09 01:39:06,139 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:06,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-12-09 01:39:06,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2018-12-09 01:39:06,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-12-09 01:39:06,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 231 transitions. [2018-12-09 01:39:06,147 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 231 transitions. Word has length 114 [2018-12-09 01:39:06,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:06,147 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 231 transitions. [2018-12-09 01:39:06,147 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:39:06,147 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 231 transitions. [2018-12-09 01:39:06,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-12-09 01:39:06,147 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:06,147 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:06,148 INFO L423 AbstractCegarLoop]: === Iteration 31 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:06,148 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:06,148 INFO L82 PathProgramCache]: Analyzing trace with hash -2076872735, now seen corresponding path program 1 times [2018-12-09 01:39:06,148 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:06,148 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:06,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:39:06,149 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:06,180 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-12-09 01:39:06,181 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 01:39:06,181 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-09 01:39:06,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 01:39:06,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 01:39:06,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:06,181 INFO L87 Difference]: Start difference. First operand 206 states and 231 transitions. Second operand 3 states. [2018-12-09 01:39:06,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 01:39:06,193 INFO L93 Difference]: Finished difference Result 206 states and 231 transitions. [2018-12-09 01:39:06,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 01:39:06,193 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2018-12-09 01:39:06,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 01:39:06,193 INFO L225 Difference]: With dead ends: 206 [2018-12-09 01:39:06,193 INFO L226 Difference]: Without dead ends: 151 [2018-12-09 01:39:06,194 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 01:39:06,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-12-09 01:39:06,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-12-09 01:39:06,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-12-09 01:39:06,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-12-09 01:39:06,199 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 117 [2018-12-09 01:39:06,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 01:39:06,199 INFO L480 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-12-09 01:39:06,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 01:39:06,200 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-12-09 01:39:06,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-12-09 01:39:06,200 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 01:39:06,200 INFO L402 BasicCegarLoop]: trace histogram [20, 20, 20, 10, 10, 10, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 01:39:06,200 INFO L423 AbstractCegarLoop]: === Iteration 32 === [single_argvErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, single_argvErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, mainErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, dirnameErr1ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2018-12-09 01:39:06,200 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 01:39:06,200 INFO L82 PathProgramCache]: Analyzing trace with hash 576931341, now seen corresponding path program 10 times [2018-12-09 01:39:06,200 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 01:39:06,200 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 01:39:06,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:06,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 01:39:06,201 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 01:39:07,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 01:39:09,210 INFO L134 CoverageAnalysis]: Checked inductivity of 761 backedges. 28 proven. 499 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-12-09 01:39:09,210 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 01:39:09,210 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_274e78e6-59b8-4f79-8f8a-f1c02bfbbb2f/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:39:09,217 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-12-09 01:39:09,298 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-12-09 01:39:09,299 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-12-09 01:39:09,305 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 01:39:09,311 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 202 treesize of output 186 [2018-12-09 01:39:09,315 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,347 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 186 treesize of output 174 [2018-12-09 01:39:09,355 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,370 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,377 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 170 treesize of output 162 [2018-12-09 01:39:09,381 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 144 [2018-12-09 01:39:09,578 WARN L180 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 46 [2018-12-09 01:39:09,587 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,591 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,596 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,629 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 130 treesize of output 143 [2018-12-09 01:39:09,768 WARN L180 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 46 [2018-12-09 01:39:09,775 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,779 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,784 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,809 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,828 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,833 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,839 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,840 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 11 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 148 [2018-12-09 01:39:09,899 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,900 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,904 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,905 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:09,913 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 17 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 157 [2018-12-09 01:39:10,146 WARN L180 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 63 [2018-12-09 01:39:10,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,174 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,202 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 24 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 175 [2018-12-09 01:39:10,391 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 74 [2018-12-09 01:39:10,398 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,419 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,439 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 32 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 198 [2018-12-09 01:39:10,551 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 87 [2018-12-09 01:39:10,554 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,555 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,556 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,557 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,558 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,559 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,560 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,562 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,564 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,565 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,566 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,568 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:10,569 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 41 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 226 [2018-12-09 01:39:10,579 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 41 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 220 [2018-12-09 01:39:10,580 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:10,651 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:10,724 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:10,800 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:10,876 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:10,954 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:11,033 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:11,127 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:11,357 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,364 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,373 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,433 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 154 treesize of output 150 [2018-12-09 01:39:11,939 WARN L180 SmtUtils]: Spent 503.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 79 [2018-12-09 01:39:11,947 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,952 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,956 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:11,987 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 158 [2018-12-09 01:39:12,180 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 49 [2018-12-09 01:39:12,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,192 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,196 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,221 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,229 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,245 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 12 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 152 [2018-12-09 01:39:12,447 WARN L180 SmtUtils]: Spent 201.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 56 [2018-12-09 01:39:12,455 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,466 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,476 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,480 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,492 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,494 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,500 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,503 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,507 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,508 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 18 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 161 [2018-12-09 01:39:12,712 WARN L180 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 65 [2018-12-09 01:39:12,719 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,722 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,725 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,728 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,731 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,734 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,737 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,745 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,753 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,764 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,771 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,772 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 25 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 179 [2018-12-09 01:39:12,961 WARN L180 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 76 [2018-12-09 01:39:12,967 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,969 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,970 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,972 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,973 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,975 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,976 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,979 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,980 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:12,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,002 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 33 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 202 [2018-12-09 01:39:13,171 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 107 DAG size of output: 89 [2018-12-09 01:39:13,176 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,185 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,187 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,188 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,189 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,191 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,197 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,200 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,202 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,203 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 42 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 230 [2018-12-09 01:39:13,211 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 42 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 224 [2018-12-09 01:39:13,212 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,285 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,358 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,432 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,510 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,593 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,679 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:13,816 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,819 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,898 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:13,930 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 139 treesize of output 160 [2018-12-09 01:39:14,417 WARN L180 SmtUtils]: Spent 485.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 83 [2018-12-09 01:39:14,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,429 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,437 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,453 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,473 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,504 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,509 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,513 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,517 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,533 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:14,533 INFO L303 Elim1Store]: Index analysis took 114 ms [2018-12-09 01:39:14,566 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 14 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 123 treesize of output 166 [2018-12-09 01:39:15,126 WARN L180 SmtUtils]: Spent 558.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 89 [2018-12-09 01:39:15,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,170 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,173 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,178 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,195 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,198 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,201 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,212 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,216 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,233 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,241 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,241 INFO L303 Elim1Store]: Index analysis took 113 ms [2018-12-09 01:39:15,248 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 121 treesize of output 179 [2018-12-09 01:39:15,700 WARN L180 SmtUtils]: Spent 450.00 ms on a formula simplification. DAG size of input: 117 DAG size of output: 97 [2018-12-09 01:39:15,707 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,715 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,718 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,720 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,723 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,735 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,744 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,751 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,759 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,761 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,762 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 183 [2018-12-09 01:39:15,855 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,856 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,857 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,859 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,860 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,861 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,862 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,863 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,864 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,868 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,869 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 194 [2018-12-09 01:39:15,977 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2018-12-09 01:39:15,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,982 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,983 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,985 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,995 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:15,996 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-09 01:39:16,006 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-09 01:39:16,007 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:16,076 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:16,150 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:16,237 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:16,420 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,421 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,423 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,424 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,425 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,428 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,440 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,443 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,444 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:16,469 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 29 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 126 treesize of output 201 [2018-12-09 01:39:17,116 WARN L180 SmtUtils]: Spent 645.00 ms on a formula simplification. DAG size of input: 131 DAG size of output: 109 [2018-12-09 01:39:17,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,123 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,125 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,127 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,132 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,134 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,137 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,140 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,141 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,144 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,146 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,167 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,177 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,180 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,182 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,184 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,194 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,208 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 38 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 138 treesize of output 228 [2018-12-09 01:39:17,656 WARN L180 SmtUtils]: Spent 446.00 ms on a formula simplification. DAG size of input: 147 DAG size of output: 121 [2018-12-09 01:39:17,661 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,662 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,663 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,664 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,665 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,666 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,667 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,669 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,670 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,671 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,672 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,675 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,678 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,679 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,683 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,684 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,685 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,686 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,687 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,688 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,691 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,693 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,697 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:17,704 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 48 disjoint index pairs (out of 55 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 157 treesize of output 260 [2018-12-09 01:39:17,722 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 49 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 256 treesize of output 258 [2018-12-09 01:39:17,723 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 2 xjuncts. [2018-12-09 01:39:18,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,157 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,163 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,166 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,167 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 180 treesize of output 232 [2018-12-09 01:39:18,168 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:18,500 INFO L267 ElimStorePlain]: Start of recursive call 30: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-12-09 01:39:18,906 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,907 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,908 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,909 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,910 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,911 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,912 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,913 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,915 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,917 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,918 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,919 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,921 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:18,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 155 treesize of output 238 [2018-12-09 01:39:18,932 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-09 01:39:18,932 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:19,031 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:19,501 INFO L267 ElimStorePlain]: Start of recursive call 29: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-12-09 01:39:19,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,986 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,988 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,989 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,992 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,994 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,996 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:19,999 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,001 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,003 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,027 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,027 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 210 [2018-12-09 01:39:20,144 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 111 DAG size of output: 85 [2018-12-09 01:39:20,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,149 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,150 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,152 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,153 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,155 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,156 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,158 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,160 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,161 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,162 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,164 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:20,164 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-09 01:39:20,173 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-09 01:39:20,174 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:20,244 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:20,324 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:20,876 INFO L267 ElimStorePlain]: Start of recursive call 28: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-12-09 01:39:21,670 INFO L267 ElimStorePlain]: Start of recursive call 23: 2 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-12-09 01:39:22,782 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,788 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,801 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,822 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,841 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,843 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,846 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,852 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,854 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,858 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:22,858 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 16 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 165 [2018-12-09 01:39:23,092 WARN L180 SmtUtils]: Spent 232.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 61 [2018-12-09 01:39:23,097 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,100 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,101 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,103 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,106 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,109 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,112 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,121 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,136 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,148 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,151 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,154 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,159 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,160 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 171 [2018-12-09 01:39:23,255 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,257 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,264 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,266 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,267 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,268 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,269 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,275 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,276 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 194 [2018-12-09 01:39:23,397 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2018-12-09 01:39:23,401 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,402 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,403 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,404 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,406 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,407 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,408 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,409 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,410 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,412 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,414 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,415 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,416 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:23,419 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-09 01:39:23,428 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-09 01:39:23,429 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:23,504 INFO L267 ElimStorePlain]: Start of recursive call 41: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:23,574 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:23,651 INFO L267 ElimStorePlain]: Start of recursive call 39: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:23,740 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:24,678 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-12-09 01:39:25,794 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,798 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,802 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,806 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,817 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,827 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,838 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,842 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,847 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:25,847 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 13 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 168 [2018-12-09 01:39:26,041 WARN L180 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 58 [2018-12-09 01:39:26,048 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,052 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,061 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,071 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,074 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,084 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,088 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,091 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,093 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,095 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,098 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,099 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 19 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 165 [2018-12-09 01:39:26,315 WARN L180 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 67 [2018-12-09 01:39:26,321 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,324 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,326 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,328 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,333 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,346 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,356 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,365 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,368 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,371 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,372 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 26 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 183 [2018-12-09 01:39:26,600 WARN L180 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 78 [2018-12-09 01:39:26,606 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,609 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,619 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,622 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,624 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,625 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,628 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,630 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,632 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,633 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,636 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,638 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,641 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,656 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 34 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 206 [2018-12-09 01:39:26,868 WARN L180 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 91 [2018-12-09 01:39:26,873 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,874 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,875 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,876 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,877 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,878 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,880 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,881 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,882 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,885 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,888 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,892 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,893 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,894 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,895 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,896 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:26,897 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 43 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 234 [2018-12-09 01:39:26,905 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 43 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 228 [2018-12-09 01:39:26,906 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:26,995 INFO L267 ElimStorePlain]: Start of recursive call 47: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:27,070 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:27,148 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:27,230 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:27,323 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:28,196 INFO L267 ElimStorePlain]: Start of recursive call 21: 2 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-12-09 01:39:29,366 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-12-09 01:39:30,674 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 10 xjuncts. [2018-12-09 01:39:32,217 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 152 [2018-12-09 01:39:32,238 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 133 [2018-12-09 01:39:32,258 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,259 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,265 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,265 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 130 treesize of output 139 [2018-12-09 01:39:32,409 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 44 [2018-12-09 01:39:32,418 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,422 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,427 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,457 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,475 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,478 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,489 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,489 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 144 [2018-12-09 01:39:32,682 WARN L180 SmtUtils]: Spent 191.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 52 [2018-12-09 01:39:32,689 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,694 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,709 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,712 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,727 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,730 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,733 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,742 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,746 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,749 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 16 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 153 [2018-12-09 01:39:32,972 WARN L180 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 61 [2018-12-09 01:39:32,978 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,981 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,984 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,987 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,990 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,993 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:32,997 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,004 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,013 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,022 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,025 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,032 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,033 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 23 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 171 [2018-12-09 01:39:33,219 WARN L180 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 72 [2018-12-09 01:39:33,224 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,226 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,228 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,230 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,232 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,234 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,236 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,238 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,240 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,242 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,244 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,246 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,247 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,270 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,271 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 31 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 194 [2018-12-09 01:39:33,426 WARN L180 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 85 [2018-12-09 01:39:33,430 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,431 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,432 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,433 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,434 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,435 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,436 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,438 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,439 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,441 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,445 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,449 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,450 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,451 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,452 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,454 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:33,455 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 222 [2018-12-09 01:39:33,464 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 40 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 216 [2018-12-09 01:39:33,465 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,534 INFO L267 ElimStorePlain]: Start of recursive call 56: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,602 INFO L267 ElimStorePlain]: Start of recursive call 55: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,675 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,748 INFO L267 ElimStorePlain]: Start of recursive call 53: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,824 INFO L267 ElimStorePlain]: Start of recursive call 52: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,900 INFO L267 ElimStorePlain]: Start of recursive call 51: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:33,978 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:34,057 INFO L267 ElimStorePlain]: Start of recursive call 49: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:35,060 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 11 xjuncts. [2018-12-09 01:39:36,282 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 11 xjuncts. [2018-12-09 01:39:37,330 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:37,331 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 25 [2018-12-09 01:39:37,336 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:37,337 INFO L701 Elim1Store]: detected not equals via solver [2018-12-09 01:39:37,338 INFO L683 Elim1Store]: detected equality via solver [2018-12-09 01:39:37,339 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-12-09 01:39:37,340 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-12-09 01:39:37,350 INFO L267 ElimStorePlain]: Start of recursive call 58: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-12-09 01:39:38,793 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 90 dim-0 vars, and 11 xjuncts. [2018-12-09 01:39:38,793 INFO L202 ElimStorePlain]: Needed 59 recursive calls to eliminate 11 variables, input treesize:223, output treesize:2528 [2018-12-09 01:39:57,928 WARN L194 Executor]: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) stderr output: (error "out of memory") [2018-12-09 01:39:58,129 WARN L521 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 01:39:58,130 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:225) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.WrapperScript.checkSat(WrapperScript.java:116) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:61) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.getRedundancy(SimplifyDDA.java:626) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SimplifyDDAWithTimeout.getRedundancy(SimplifyDDAWithTimeout.java:122) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA$Simplifier.walk(SimplifyDDA.java:371) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.simplifyOnce(SimplifyDDA.java:650) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SimplifyDDAWithTimeout.getSimplifiedTerm(SimplifyDDAWithTimeout.java:187) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SmtUtils.simplify(SmtUtils.java:151) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:354) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:299) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:575) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:200) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:286) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:232) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:456) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:434) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:334) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:174) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:126) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1427) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:630) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:419) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:205) ... 45 more [2018-12-09 01:39:58,135 INFO L168 Benchmark]: Toolchain (without parser) took 100675.87 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 293.6 MB). Free memory was 957.1 MB in the beginning and 1.2 GB in the end (delta: -280.8 MB). Peak memory consumption was 516.9 MB. Max. memory is 11.5 GB. [2018-12-09 01:39:58,135 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:39:58,135 INFO L168 Benchmark]: CACSL2BoogieTranslator took 542.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 957.1 MB in the beginning and 1.0 GB in the end (delta: -67.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. [2018-12-09 01:39:58,136 INFO L168 Benchmark]: Boogie Procedure Inliner took 26.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:39:58,136 INFO L168 Benchmark]: Boogie Preprocessor took 26.94 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 01:39:58,136 INFO L168 Benchmark]: RCFGBuilder took 365.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 972.5 MB in the end (delta: 52.4 MB). Peak memory consumption was 52.4 MB. Max. memory is 11.5 GB. [2018-12-09 01:39:58,136 INFO L168 Benchmark]: TraceAbstraction took 99711.33 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 190.3 MB). Free memory was 972.5 MB in the beginning and 1.2 GB in the end (delta: -265.3 MB). Peak memory consumption was 429.0 MB. Max. memory is 11.5 GB. [2018-12-09 01:39:58,138 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 542.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 957.1 MB in the beginning and 1.0 GB in the end (delta: -67.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 26.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.94 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 365.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 972.5 MB in the end (delta: 52.4 MB). Peak memory consumption was 52.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 99711.33 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 190.3 MB). Free memory was 972.5 MB in the beginning and 1.2 GB in the end (delta: -265.3 MB). Peak memory consumption was 429.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000)Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:208) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...