./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i -s /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 840e3ba93a4f821803f9089812ff1f73e2838277 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i -s /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 840e3ba93a4f821803f9089812ff1f73e2838277 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-08 19:35:24,506 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-08 19:35:24,507 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-08 19:35:24,514 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-08 19:35:24,514 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-08 19:35:24,514 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-08 19:35:24,515 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-08 19:35:24,516 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-08 19:35:24,517 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-08 19:35:24,517 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-08 19:35:24,518 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-08 19:35:24,518 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-08 19:35:24,518 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-08 19:35:24,519 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-08 19:35:24,519 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-08 19:35:24,520 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-08 19:35:24,520 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-08 19:35:24,521 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-08 19:35:24,522 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-08 19:35:24,523 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-08 19:35:24,524 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-08 19:35:24,524 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-08 19:35:24,526 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-08 19:35:24,526 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 19:35:24,526 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 19:35:24,526 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 19:35:24,527 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 19:35:24,527 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 19:35:24,528 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 19:35:24,528 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 19:35:24,529 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 19:35:24,529 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 19:35:24,529 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 19:35:24,529 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 19:35:24,530 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 19:35:24,530 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 19:35:24,530 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Default.epf [2018-12-08 19:35:24,537 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 19:35:24,538 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 19:35:24,538 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 19:35:24,538 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 19:35:24,539 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 19:35:24,539 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 19:35:24,539 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 19:35:24,539 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 19:35:24,539 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-08 19:35:24,539 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 19:35:24,539 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 19:35:24,540 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 19:35:24,540 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 19:35:24,541 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 19:35:24,541 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-08 19:35:24,542 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-08 19:35:24,542 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 840e3ba93a4f821803f9089812ff1f73e2838277 [2018-12-08 19:35:24,559 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 19:35:24,567 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 19:35:24,569 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 19:35:24,570 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 19:35:24,570 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 19:35:24,570 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i [2018-12-08 19:35:24,605 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/1dc95493e/c8a2bc8646254c059900033100df7da7/FLAGd277c58cc [2018-12-08 19:35:25,072 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 19:35:25,073 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i [2018-12-08 19:35:25,084 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/1dc95493e/c8a2bc8646254c059900033100df7da7/FLAGd277c58cc [2018-12-08 19:35:25,591 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/1dc95493e/c8a2bc8646254c059900033100df7da7 [2018-12-08 19:35:25,593 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 19:35:25,594 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 19:35:25,595 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 19:35:25,595 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 19:35:25,597 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 19:35:25,598 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 07:35:25" (1/1) ... [2018-12-08 19:35:25,600 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c9c5a09 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:25, skipping insertion in model container [2018-12-08 19:35:25,600 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 07:35:25" (1/1) ... [2018-12-08 19:35:25,605 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 19:35:25,640 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 19:35:26,063 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 19:35:26,075 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 19:35:26,143 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 19:35:26,172 INFO L195 MainTranslator]: Completed translation [2018-12-08 19:35:26,172 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26 WrapperNode [2018-12-08 19:35:26,172 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 19:35:26,173 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 19:35:26,173 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 19:35:26,173 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 19:35:26,178 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,196 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,203 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 19:35:26,203 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 19:35:26,203 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 19:35:26,203 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 19:35:26,209 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,210 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,215 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,215 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,235 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,241 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,245 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... [2018-12-08 19:35:26,250 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 19:35:26,250 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 19:35:26,250 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 19:35:26,251 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 19:35:26,251 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 19:35:26,283 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_suspend [2018-12-08 19:35:26,283 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_suspend [2018-12-08 19:35:26,283 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-12-08 19:35:26,284 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_unregister [2018-12-08 19:35:26,284 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_driver_unregister [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_platform_driver_2 [2018-12-08 19:35:26,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_platform_driver_2 [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-12-08 19:35:26,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-12-08 19:35:26,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure external_alloc [2018-12-08 19:35:26,284 INFO L138 BoogieDeclarations]: Found implementation of procedure external_alloc [2018-12-08 19:35:26,284 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_time_to_tm [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_alarm [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_alarm [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure irq_set_irq_wake [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2018-12-08 19:35:26,285 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2018-12-08 19:35:26,285 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_tm_to_time [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure __release_region [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_release_3 [2018-12-08 19:35:26,286 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_release_3 [2018-12-08 19:35:26,286 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_irq_1 [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_irq_1 [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure kobject_name [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure kobject_name [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_iounmap [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_probe [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_driver_probe [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_valid_tm [2018-12-08 19:35:26,287 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_valid_tm [2018-12-08 19:35:26,287 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_resume [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_resume [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_check_busy [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_check_busy [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~TO~VOID [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~TO~VOID [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_rtc_device_unregister_27 [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_rtc_device_unregister_27 [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_update_irq [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_update_irq [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_device_unregister [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 19:35:26,288 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 19:35:26,288 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_irq_handler [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_irq_handler [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_unlock_irqrestore [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irqrestore_9 [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irqrestore_9 [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_irq_26 [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_irq_26 [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-12-08 19:35:26,289 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-12-08 19:35:26,289 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_resource [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_init [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_init [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure disable_irq_wake [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_irq_wake [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure enable_irq_wake [2018-12-08 19:35:26,290 INFO L138 BoogieDeclarations]: Found implementation of procedure enable_irq_wake [2018-12-08 19:35:26,290 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_exit [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_exit [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure choose_interrupt_1 [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure choose_interrupt_1 [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure dev_name [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_name [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_3 [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_probe_3 [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_2 [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_probe_2 [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2018-12-08 19:35:26,291 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-12-08 19:35:26,291 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2018-12-08 19:35:26,292 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-08 19:35:26,292 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-08 19:35:26,292 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2018-12-08 19:35:26,292 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2018-12-08 19:35:26,292 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 19:35:26,292 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 19:35:26,922 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 19:35:26,922 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-08 19:35:26,923 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 07:35:26 BoogieIcfgContainer [2018-12-08 19:35:26,923 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 19:35:26,923 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 19:35:26,923 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 19:35:26,925 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 19:35:26,925 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 07:35:25" (1/3) ... [2018-12-08 19:35:26,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@617f18ec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 07:35:26, skipping insertion in model container [2018-12-08 19:35:26,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:26" (2/3) ... [2018-12-08 19:35:26,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@617f18ec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 07:35:26, skipping insertion in model container [2018-12-08 19:35:26,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 07:35:26" (3/3) ... [2018-12-08 19:35:26,927 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i [2018-12-08 19:35:26,933 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 19:35:26,938 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-08 19:35:26,948 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-08 19:35:26,969 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 19:35:26,969 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 19:35:26,969 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 19:35:26,969 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 19:35:26,969 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 19:35:26,970 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 19:35:26,970 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 19:35:26,970 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 19:35:26,970 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 19:35:26,986 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states. [2018-12-08 19:35:26,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 19:35:26,993 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:26,994 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:26,995 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:26,999 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:26,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1646624460, now seen corresponding path program 1 times [2018-12-08 19:35:27,000 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:27,000 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:27,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:27,039 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:27,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 19:35:27,196 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:27,196 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:27,199 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:27,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:27,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:27,211 INFO L87 Difference]: Start difference. First operand 486 states. Second operand 3 states. [2018-12-08 19:35:27,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:27,272 INFO L93 Difference]: Finished difference Result 822 states and 1040 transitions. [2018-12-08 19:35:27,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:27,273 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-12-08 19:35:27,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:27,282 INFO L225 Difference]: With dead ends: 822 [2018-12-08 19:35:27,282 INFO L226 Difference]: Without dead ends: 331 [2018-12-08 19:35:27,287 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:27,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-12-08 19:35:27,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 331. [2018-12-08 19:35:27,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-12-08 19:35:27,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 401 transitions. [2018-12-08 19:35:27,330 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 401 transitions. Word has length 47 [2018-12-08 19:35:27,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:27,331 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 401 transitions. [2018-12-08 19:35:27,331 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:27,331 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 401 transitions. [2018-12-08 19:35:27,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-08 19:35:27,334 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:27,334 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:27,334 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:27,334 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:27,335 INFO L82 PathProgramCache]: Analyzing trace with hash -884307126, now seen corresponding path program 1 times [2018-12-08 19:35:27,335 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:27,335 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:27,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:27,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:27,419 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:27,420 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:27,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:27,421 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:27,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:27,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:27,421 INFO L87 Difference]: Start difference. First operand 331 states and 401 transitions. Second operand 5 states. [2018-12-08 19:35:27,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:27,520 INFO L93 Difference]: Finished difference Result 970 states and 1194 transitions. [2018-12-08 19:35:27,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 19:35:27,521 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-12-08 19:35:27,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:27,524 INFO L225 Difference]: With dead ends: 970 [2018-12-08 19:35:27,524 INFO L226 Difference]: Without dead ends: 656 [2018-12-08 19:35:27,525 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:27,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 656 states. [2018-12-08 19:35:27,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 656 to 643. [2018-12-08 19:35:27,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 643 states. [2018-12-08 19:35:27,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 643 states to 643 states and 786 transitions. [2018-12-08 19:35:27,558 INFO L78 Accepts]: Start accepts. Automaton has 643 states and 786 transitions. Word has length 70 [2018-12-08 19:35:27,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:27,558 INFO L480 AbstractCegarLoop]: Abstraction has 643 states and 786 transitions. [2018-12-08 19:35:27,558 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:27,558 INFO L276 IsEmpty]: Start isEmpty. Operand 643 states and 786 transitions. [2018-12-08 19:35:27,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-08 19:35:27,560 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:27,560 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:27,560 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:27,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:27,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1544904286, now seen corresponding path program 1 times [2018-12-08 19:35:27,561 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:27,561 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:27,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:27,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:27,605 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:27,605 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:27,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:27,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:27,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:27,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:27,606 INFO L87 Difference]: Start difference. First operand 643 states and 786 transitions. Second operand 3 states. [2018-12-08 19:35:27,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:27,671 INFO L93 Difference]: Finished difference Result 1516 states and 1857 transitions. [2018-12-08 19:35:27,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:27,672 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2018-12-08 19:35:27,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:27,677 INFO L225 Difference]: With dead ends: 1516 [2018-12-08 19:35:27,677 INFO L226 Difference]: Without dead ends: 890 [2018-12-08 19:35:27,679 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:27,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 890 states. [2018-12-08 19:35:27,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 890 to 887. [2018-12-08 19:35:27,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 887 states. [2018-12-08 19:35:27,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 887 states to 887 states and 1086 transitions. [2018-12-08 19:35:27,731 INFO L78 Accepts]: Start accepts. Automaton has 887 states and 1086 transitions. Word has length 68 [2018-12-08 19:35:27,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:27,732 INFO L480 AbstractCegarLoop]: Abstraction has 887 states and 1086 transitions. [2018-12-08 19:35:27,732 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:27,732 INFO L276 IsEmpty]: Start isEmpty. Operand 887 states and 1086 transitions. [2018-12-08 19:35:27,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 19:35:27,749 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:27,749 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:27,750 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:27,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:27,752 INFO L82 PathProgramCache]: Analyzing trace with hash -1663745524, now seen corresponding path program 1 times [2018-12-08 19:35:27,752 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:27,752 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:27,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:27,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:27,822 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:27,822 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:27,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:27,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:27,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:27,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:27,823 INFO L87 Difference]: Start difference. First operand 887 states and 1086 transitions. Second operand 5 states. [2018-12-08 19:35:27,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:27,902 INFO L93 Difference]: Finished difference Result 1780 states and 2200 transitions. [2018-12-08 19:35:27,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 19:35:27,902 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2018-12-08 19:35:27,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:27,905 INFO L225 Difference]: With dead ends: 1780 [2018-12-08 19:35:27,905 INFO L226 Difference]: Without dead ends: 919 [2018-12-08 19:35:27,907 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:27,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 919 states. [2018-12-08 19:35:27,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 919 to 895. [2018-12-08 19:35:27,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 895 states. [2018-12-08 19:35:27,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 895 states to 895 states and 1088 transitions. [2018-12-08 19:35:27,932 INFO L78 Accepts]: Start accepts. Automaton has 895 states and 1088 transitions. Word has length 71 [2018-12-08 19:35:27,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:27,933 INFO L480 AbstractCegarLoop]: Abstraction has 895 states and 1088 transitions. [2018-12-08 19:35:27,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:27,933 INFO L276 IsEmpty]: Start isEmpty. Operand 895 states and 1088 transitions. [2018-12-08 19:35:27,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 19:35:27,934 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:27,934 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:27,934 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:27,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:27,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1782427673, now seen corresponding path program 1 times [2018-12-08 19:35:27,935 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:27,935 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:27,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,936 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:27,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:27,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:27,988 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:27,988 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:27,988 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:27,988 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:27,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:27,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:27,989 INFO L87 Difference]: Start difference. First operand 895 states and 1088 transitions. Second operand 5 states. [2018-12-08 19:35:28,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:28,053 INFO L93 Difference]: Finished difference Result 1796 states and 2200 transitions. [2018-12-08 19:35:28,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 19:35:28,053 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-08 19:35:28,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:28,056 INFO L225 Difference]: With dead ends: 1796 [2018-12-08 19:35:28,056 INFO L226 Difference]: Without dead ends: 927 [2018-12-08 19:35:28,057 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:28,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 927 states. [2018-12-08 19:35:28,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 927 to 903. [2018-12-08 19:35:28,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 903 states. [2018-12-08 19:35:28,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 903 states to 903 states and 1090 transitions. [2018-12-08 19:35:28,081 INFO L78 Accepts]: Start accepts. Automaton has 903 states and 1090 transitions. Word has length 72 [2018-12-08 19:35:28,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:28,082 INFO L480 AbstractCegarLoop]: Abstraction has 903 states and 1090 transitions. [2018-12-08 19:35:28,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:28,082 INFO L276 IsEmpty]: Start isEmpty. Operand 903 states and 1090 transitions. [2018-12-08 19:35:28,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 19:35:28,082 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:28,083 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:28,083 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:28,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:28,083 INFO L82 PathProgramCache]: Analyzing trace with hash 1402464713, now seen corresponding path program 1 times [2018-12-08 19:35:28,083 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:28,083 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:28,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:28,084 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:28,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:28,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:28,133 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:28,134 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:28,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:28,134 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:28,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:28,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:28,134 INFO L87 Difference]: Start difference. First operand 903 states and 1090 transitions. Second operand 5 states. [2018-12-08 19:35:28,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:28,205 INFO L93 Difference]: Finished difference Result 1707 states and 2078 transitions. [2018-12-08 19:35:28,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 19:35:28,205 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-08 19:35:28,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:28,207 INFO L225 Difference]: With dead ends: 1707 [2018-12-08 19:35:28,208 INFO L226 Difference]: Without dead ends: 830 [2018-12-08 19:35:28,209 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:28,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 830 states. [2018-12-08 19:35:28,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 830 to 812. [2018-12-08 19:35:28,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 812 states. [2018-12-08 19:35:28,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 812 states to 812 states and 974 transitions. [2018-12-08 19:35:28,231 INFO L78 Accepts]: Start accepts. Automaton has 812 states and 974 transitions. Word has length 73 [2018-12-08 19:35:28,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:28,231 INFO L480 AbstractCegarLoop]: Abstraction has 812 states and 974 transitions. [2018-12-08 19:35:28,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:28,231 INFO L276 IsEmpty]: Start isEmpty. Operand 812 states and 974 transitions. [2018-12-08 19:35:28,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 19:35:28,232 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:28,232 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:28,232 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:28,233 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:28,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1316738903, now seen corresponding path program 1 times [2018-12-08 19:35:28,233 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:28,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:28,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:28,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:28,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:28,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:28,315 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 19:35:28,315 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 19:35:28,315 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 19:35:28,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:28,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:28,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:28,472 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-12-08 19:35:28,496 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 19:35:28,496 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [9] total 11 [2018-12-08 19:35:28,497 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-12-08 19:35:28,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-12-08 19:35:28,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-12-08 19:35:28,497 INFO L87 Difference]: Start difference. First operand 812 states and 974 transitions. Second operand 11 states. [2018-12-08 19:35:30,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:30,224 INFO L93 Difference]: Finished difference Result 2158 states and 2676 transitions. [2018-12-08 19:35:30,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 19:35:30,224 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 85 [2018-12-08 19:35:30,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:30,230 INFO L225 Difference]: With dead ends: 2158 [2018-12-08 19:35:30,230 INFO L226 Difference]: Without dead ends: 1369 [2018-12-08 19:35:30,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=116, Invalid=436, Unknown=0, NotChecked=0, Total=552 [2018-12-08 19:35:30,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1369 states. [2018-12-08 19:35:30,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1369 to 1156. [2018-12-08 19:35:30,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1156 states. [2018-12-08 19:35:30,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1156 states to 1156 states and 1393 transitions. [2018-12-08 19:35:30,274 INFO L78 Accepts]: Start accepts. Automaton has 1156 states and 1393 transitions. Word has length 85 [2018-12-08 19:35:30,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:30,274 INFO L480 AbstractCegarLoop]: Abstraction has 1156 states and 1393 transitions. [2018-12-08 19:35:30,274 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-12-08 19:35:30,274 INFO L276 IsEmpty]: Start isEmpty. Operand 1156 states and 1393 transitions. [2018-12-08 19:35:30,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-12-08 19:35:30,275 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:30,275 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:30,275 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:30,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:30,276 INFO L82 PathProgramCache]: Analyzing trace with hash -179237916, now seen corresponding path program 1 times [2018-12-08 19:35:30,276 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:30,276 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:30,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:30,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:30,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:30,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:30,359 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-12-08 19:35:30,359 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 19:35:30,359 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 19:35:30,370 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:30,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:30,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:30,485 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 19:35:30,510 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:30,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5] total 13 [2018-12-08 19:35:30,511 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 19:35:30,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 19:35:30,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-12-08 19:35:30,511 INFO L87 Difference]: Start difference. First operand 1156 states and 1393 transitions. Second operand 13 states. [2018-12-08 19:35:31,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:31,258 INFO L93 Difference]: Finished difference Result 2675 states and 3235 transitions. [2018-12-08 19:35:31,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-08 19:35:31,258 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 87 [2018-12-08 19:35:31,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:31,264 INFO L225 Difference]: With dead ends: 2675 [2018-12-08 19:35:31,264 INFO L226 Difference]: Without dead ends: 1543 [2018-12-08 19:35:31,267 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=147, Invalid=609, Unknown=0, NotChecked=0, Total=756 [2018-12-08 19:35:31,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1543 states. [2018-12-08 19:35:31,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1543 to 1474. [2018-12-08 19:35:31,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1474 states. [2018-12-08 19:35:31,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1474 states to 1474 states and 1787 transitions. [2018-12-08 19:35:31,314 INFO L78 Accepts]: Start accepts. Automaton has 1474 states and 1787 transitions. Word has length 87 [2018-12-08 19:35:31,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:31,314 INFO L480 AbstractCegarLoop]: Abstraction has 1474 states and 1787 transitions. [2018-12-08 19:35:31,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 19:35:31,315 INFO L276 IsEmpty]: Start isEmpty. Operand 1474 states and 1787 transitions. [2018-12-08 19:35:31,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-12-08 19:35:31,316 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:31,316 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:31,316 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:31,316 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:31,316 INFO L82 PathProgramCache]: Analyzing trace with hash -505716382, now seen corresponding path program 1 times [2018-12-08 19:35:31,316 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:31,316 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:31,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:31,318 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:31,318 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:31,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:31,403 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-12-08 19:35:31,403 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 19:35:31,403 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 19:35:31,413 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:31,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:31,493 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:31,548 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 19:35:31,575 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:31,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6] total 14 [2018-12-08 19:35:31,575 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 19:35:31,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 19:35:31,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-12-08 19:35:31,575 INFO L87 Difference]: Start difference. First operand 1474 states and 1787 transitions. Second operand 14 states. [2018-12-08 19:35:32,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:32,247 INFO L93 Difference]: Finished difference Result 3310 states and 4026 transitions. [2018-12-08 19:35:32,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 19:35:32,247 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 89 [2018-12-08 19:35:32,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:32,252 INFO L225 Difference]: With dead ends: 3310 [2018-12-08 19:35:32,252 INFO L226 Difference]: Without dead ends: 1861 [2018-12-08 19:35:32,255 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 90 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=162, Invalid=708, Unknown=0, NotChecked=0, Total=870 [2018-12-08 19:35:32,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1861 states. [2018-12-08 19:35:32,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1861 to 1475. [2018-12-08 19:35:32,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1475 states. [2018-12-08 19:35:32,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1475 states to 1475 states and 1788 transitions. [2018-12-08 19:35:32,295 INFO L78 Accepts]: Start accepts. Automaton has 1475 states and 1788 transitions. Word has length 89 [2018-12-08 19:35:32,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:32,295 INFO L480 AbstractCegarLoop]: Abstraction has 1475 states and 1788 transitions. [2018-12-08 19:35:32,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 19:35:32,295 INFO L276 IsEmpty]: Start isEmpty. Operand 1475 states and 1788 transitions. [2018-12-08 19:35:32,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-12-08 19:35:32,297 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:32,297 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:32,297 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:32,297 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:32,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1680036611, now seen corresponding path program 1 times [2018-12-08 19:35:32,297 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:32,297 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:32,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:32,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:32,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:32,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:32,379 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-08 19:35:32,379 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-08 19:35:32,379 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-08 19:35:32,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:32,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:32,500 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:32,560 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-08 19:35:32,587 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:32,587 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7] total 15 [2018-12-08 19:35:32,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-12-08 19:35:32,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-12-08 19:35:32,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2018-12-08 19:35:32,588 INFO L87 Difference]: Start difference. First operand 1475 states and 1788 transitions. Second operand 15 states. [2018-12-08 19:35:33,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:33,199 INFO L93 Difference]: Finished difference Result 2867 states and 3473 transitions. [2018-12-08 19:35:33,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-12-08 19:35:33,200 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 91 [2018-12-08 19:35:33,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:33,205 INFO L225 Difference]: With dead ends: 2867 [2018-12-08 19:35:33,205 INFO L226 Difference]: Without dead ends: 1418 [2018-12-08 19:35:33,208 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=172, Invalid=758, Unknown=0, NotChecked=0, Total=930 [2018-12-08 19:35:33,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1418 states. [2018-12-08 19:35:33,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1418 to 402. [2018-12-08 19:35:33,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 402 states. [2018-12-08 19:35:33,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 469 transitions. [2018-12-08 19:35:33,237 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 469 transitions. Word has length 91 [2018-12-08 19:35:33,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:33,237 INFO L480 AbstractCegarLoop]: Abstraction has 402 states and 469 transitions. [2018-12-08 19:35:33,237 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-12-08 19:35:33,237 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 469 transitions. [2018-12-08 19:35:33,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-12-08 19:35:33,238 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:33,239 INFO L402 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:33,239 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:33,239 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:33,239 INFO L82 PathProgramCache]: Analyzing trace with hash -389345042, now seen corresponding path program 1 times [2018-12-08 19:35:33,239 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:33,239 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:33,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:33,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:33,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:33,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:33,296 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-12-08 19:35:33,297 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:33,297 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:33,297 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:33,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:33,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:33,298 INFO L87 Difference]: Start difference. First operand 402 states and 469 transitions. Second operand 3 states. [2018-12-08 19:35:33,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:33,354 INFO L93 Difference]: Finished difference Result 856 states and 1016 transitions. [2018-12-08 19:35:33,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:33,354 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2018-12-08 19:35:33,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:33,356 INFO L225 Difference]: With dead ends: 856 [2018-12-08 19:35:33,356 INFO L226 Difference]: Without dead ends: 484 [2018-12-08 19:35:33,357 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:33,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states. [2018-12-08 19:35:33,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 484. [2018-12-08 19:35:33,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 484 states. [2018-12-08 19:35:33,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 570 transitions. [2018-12-08 19:35:33,381 INFO L78 Accepts]: Start accepts. Automaton has 484 states and 570 transitions. Word has length 101 [2018-12-08 19:35:33,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:33,382 INFO L480 AbstractCegarLoop]: Abstraction has 484 states and 570 transitions. [2018-12-08 19:35:33,382 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:33,382 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 570 transitions. [2018-12-08 19:35:33,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-12-08 19:35:33,383 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:33,383 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:33,383 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:33,383 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:33,383 INFO L82 PathProgramCache]: Analyzing trace with hash -14542213, now seen corresponding path program 1 times [2018-12-08 19:35:33,383 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:33,383 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:33,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:33,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:33,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:33,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:33,425 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 19:35:33,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:33,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:33,425 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:33,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:33,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:33,426 INFO L87 Difference]: Start difference. First operand 484 states and 570 transitions. Second operand 3 states. [2018-12-08 19:35:33,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:33,486 INFO L93 Difference]: Finished difference Result 1173 states and 1377 transitions. [2018-12-08 19:35:33,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:33,487 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 118 [2018-12-08 19:35:33,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:33,489 INFO L225 Difference]: With dead ends: 1173 [2018-12-08 19:35:33,489 INFO L226 Difference]: Without dead ends: 719 [2018-12-08 19:35:33,490 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:33,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 719 states. [2018-12-08 19:35:33,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 719 to 716. [2018-12-08 19:35:33,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 716 states. [2018-12-08 19:35:33,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 716 states to 716 states and 828 transitions. [2018-12-08 19:35:33,526 INFO L78 Accepts]: Start accepts. Automaton has 716 states and 828 transitions. Word has length 118 [2018-12-08 19:35:33,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:33,526 INFO L480 AbstractCegarLoop]: Abstraction has 716 states and 828 transitions. [2018-12-08 19:35:33,526 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:33,526 INFO L276 IsEmpty]: Start isEmpty. Operand 716 states and 828 transitions. [2018-12-08 19:35:33,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-12-08 19:35:33,528 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:33,528 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:33,528 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:33,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:33,528 INFO L82 PathProgramCache]: Analyzing trace with hash 1051230966, now seen corresponding path program 1 times [2018-12-08 19:35:33,528 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-08 19:35:33,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-08 19:35:33,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:33,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:33,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-08 19:35:33,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 19:35:33,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 19:35:33,670 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 19:35:33,698 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-08 19:35:33,736 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 190 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# [2018-12-08 19:35:33,737 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 234 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# [2018-12-08 19:35:33,737 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 192 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# [2018-12-08 19:35:33,738 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 226 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# [2018-12-08 19:35:33,750 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,751 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,751 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,752 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,753 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,757 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,758 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,759 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,759 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,763 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,764 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,764 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,765 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,766 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,766 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,767 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,767 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,767 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,767 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,768 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,768 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,769 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,769 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,769 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,769 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,769 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,770 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,770 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,770 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,771 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,771 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,771 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,771 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,772 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,772 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,772 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,773 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,773 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,773 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:33,798 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 07:35:33 BoogieIcfgContainer [2018-12-08 19:35:33,798 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 19:35:33,798 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 19:35:33,798 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 19:35:33,799 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 19:35:33,799 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 07:35:26" (3/4) ... [2018-12-08 19:35:33,801 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 19:35:33,801 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 19:35:33,802 INFO L168 Benchmark]: Toolchain (without parser) took 8208.04 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 445.1 MB). Free memory was 956.0 MB in the beginning and 955.5 MB in the end (delta: 493.2 kB). Peak memory consumption was 445.6 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:33,803 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 19:35:33,803 INFO L168 Benchmark]: CACSL2BoogieTranslator took 577.40 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -115.6 MB). Peak memory consumption was 51.5 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:33,803 INFO L168 Benchmark]: Boogie Procedure Inliner took 30.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:33,804 INFO L168 Benchmark]: Boogie Preprocessor took 47.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:33,804 INFO L168 Benchmark]: RCFGBuilder took 672.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 928.2 MB in the end (delta: 129.6 MB). Peak memory consumption was 129.6 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:33,804 INFO L168 Benchmark]: TraceAbstraction took 6874.93 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 317.2 MB). Free memory was 928.2 MB in the beginning and 955.5 MB in the end (delta: -27.3 MB). Peak memory consumption was 289.9 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:33,804 INFO L168 Benchmark]: Witness Printer took 2.87 ms. Allocated memory is still 1.5 GB. Free memory was 955.5 MB in the beginning and 955.5 MB in the end (delta: 24 B). Peak memory consumption was 24 B. Max. memory is 11.5 GB. [2018-12-08 19:35:33,807 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 577.40 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.9 MB). Free memory was 956.0 MB in the beginning and 1.1 GB in the end (delta: -115.6 MB). Peak memory consumption was 51.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 30.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 47.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 672.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 928.2 MB in the end (delta: 129.6 MB). Peak memory consumption was 129.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 6874.93 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 317.2 MB). Free memory was 928.2 MB in the beginning and 955.5 MB in the end (delta: -27.3 MB). Peak memory consumption was 289.9 MB. Max. memory is 11.5 GB. * Witness Printer took 2.87 ms. Allocated memory is still 1.5 GB. Free memory was 955.5 MB in the beginning and 955.5 MB in the end (delta: 24 B). Peak memory consumption was 24 B. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 190 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 234 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 192 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 226 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1664]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of large string literal at line 2219, overapproximation of bitwiseAnd at line 1830. Possible FailurePath: [L1687] int ldv_irq_1_2 = 0; [L1688] int LDV_IN_INTERRUPT = 1; [L1689] int ldv_irq_1_3 = 0; [L1690] struct platform_device *tegra_rtc_driver_group0 ; [L1691] void *ldv_irq_data_1_1 ; [L1692] int ldv_irq_1_1 = 0; [L1693] int ldv_irq_1_0 = 0; [L1694] int ldv_irq_line_1_3 ; [L1695] void *ldv_irq_data_1_0 ; [L1696] int ldv_state_variable_0 ; [L1697] struct device *tegra_rtc_ops_group1 ; [L1698] int ldv_state_variable_3 ; [L1699] int ldv_irq_line_1_0 ; [L1700] int ldv_state_variable_2 ; [L1701] void *ldv_irq_data_1_3 ; [L1702] int ref_cnt ; [L1703] int ldv_irq_line_1_1 ; [L1704] struct rtc_time *tegra_rtc_ops_group0 ; [L1705] void *ldv_irq_data_1_2 ; [L1706] int ldv_state_variable_1 ; [L1707] int ldv_irq_line_1_2 ; [L1708] struct rtc_wkalrm *tegra_rtc_ops_group2 ; [L2050-L2052] static struct rtc_class_ops tegra_rtc_ops = {0, 0, 0, & tegra_rtc_read_time, & tegra_rtc_set_time, & tegra_rtc_read_alarm, & tegra_rtc_set_alarm, & tegra_rtc_proc, 0, 0, & tegra_rtc_alarm_irq_enable}; [L2218-L2219] static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2235] int ldv_retval_2 ; [L2236] int ldv_retval_0 ; [L2238] int ldv_retval_1 ; [L2761] int ldv_init = 0; VAL [\old(LDV_IN_INTERRUPT)=171, \old(ldv_init)=197, \old(ldv_irq_1_0)=204, \old(ldv_irq_1_1)=195, \old(ldv_irq_1_2)=207, \old(ldv_irq_1_3)=194, \old(ldv_irq_data_1_0)=198, \old(ldv_irq_data_1_0)=161, \old(ldv_irq_data_1_1)=214, \old(ldv_irq_data_1_1)=185, \old(ldv_irq_data_1_2)=189, \old(ldv_irq_data_1_2)=176, \old(ldv_irq_data_1_3)=202, \old(ldv_irq_data_1_3)=154, \old(ldv_irq_line_1_0)=205, \old(ldv_irq_line_1_1)=233, \old(ldv_irq_line_1_2)=228, \old(ldv_irq_line_1_3)=166, \old(ldv_retval_0)=170, \old(ldv_retval_1)=164, \old(ldv_retval_2)=188, \old(ldv_state_variable_0)=184, \old(ldv_state_variable_1)=216, \old(ldv_state_variable_2)=208, \old(ldv_state_variable_3)=236, \old(ref_cnt)=203, \old(tegra_rtc_driver)=null, \old(tegra_rtc_driver)=null, \old(tegra_rtc_driver_group0)=199, \old(tegra_rtc_driver_group0)=224, \old(tegra_rtc_ops)=null, \old(tegra_rtc_ops)=null, \old(tegra_rtc_ops_group0)=179, \old(tegra_rtc_ops_group0)=201, \old(tegra_rtc_ops_group1)=193, \old(tegra_rtc_ops_group1)=220, \old(tegra_rtc_ops_group2)=157, \old(tegra_rtc_ops_group2)=173, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2390] struct seq_file *ldvarg1 ; [L2391] void *tmp ; [L2392] unsigned int ldvarg0 ; [L2393] unsigned int tmp___0 ; [L2394] pm_message_t ldvarg2 ; [L2395] int tmp___1 ; [L2396] int tmp___2 ; [L2397] int tmp___3 ; [L2398] int tmp___4 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2400] CALL, EXPR ldv_zalloc(136U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=136, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1621] void *p ; [L1622] void *tmp ; [L1623] int tmp___0 ; [L1625] tmp___0 = __VERIFIER_nondet_int() [L1626] COND TRUE tmp___0 != 0 [L1627] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=136, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, \result={0:0}, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, size=136, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___0=1] [L2400] RET, EXPR ldv_zalloc(136U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_zalloc(136U)={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2400] tmp = ldv_zalloc(136U) [L2401] ldvarg1 = (struct seq_file *)tmp [L2402] tmp___0 = __VERIFIER_nondet_uint() [L2403] ldvarg0 = tmp___0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178] [L2404] FCALL ldv_initialize() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178] [L2405] FCALL memset((void *)(& ldvarg2), 0, 4U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, memset((void *)(& ldvarg2), 0, 4U)={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178] [L2406] ldv_state_variable_1 = 1 [L2407] ref_cnt = 0 [L2408] ldv_state_variable_0 = 1 [L2409] ldv_state_variable_3 = 0 [L2410] ldv_state_variable_2 = 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178] [L2412] tmp___1 = __VERIFIER_nondet_int() [L2414] case 0: [L2420] case 1: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1] [L2421] COND TRUE ldv_state_variable_0 != 0 [L2422] tmp___2 = __VERIFIER_nondet_int() [L2424] case 0: [L2432] case 1: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1, tmp___2=1] [L2433] COND TRUE ldv_state_variable_0 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1, tmp___2=1] [L2434] CALL, EXPR tegra_rtc_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2222] int tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2224] CALL, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, arg0={210:0}, arg1={-1:11}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2842] return __VERIFIER_nondet_int(); [L2224] RET, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe)=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2224] tmp = platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2225] return (tmp); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, \result=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp=0] [L2434] RET, EXPR tegra_rtc_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_init()=0, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1, tmp___2=1] [L2434] ldv_retval_0 = tegra_rtc_init() [L2435] COND TRUE ldv_retval_0 == 0 [L2436] ldv_state_variable_0 = 3 [L2437] ldv_state_variable_2 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1, tmp___2=1] [L2438] CALL ldv_initialize_platform_driver_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2355] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2357] CALL, EXPR ldv_zalloc(624U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=624, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1621] void *p ; [L1622] void *tmp ; [L1623] int tmp___0 ; [L1625] tmp___0 = __VERIFIER_nondet_int() [L1626] COND TRUE tmp___0 != 0 [L1627] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=624, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, \result={0:0}, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, size=624, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___0=1] [L2357] RET, EXPR ldv_zalloc(624U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_zalloc(624U)={0:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2357] tmp = ldv_zalloc(624U) [L2358] tegra_rtc_driver_group0 = (struct platform_device *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}] [L2438] RET ldv_initialize_platform_driver_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1, tmp___2=1] [L2441] COND FALSE !(ldv_retval_0 != 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=1, tmp___2=1] [L2412] tmp___1 = __VERIFIER_nondet_int() [L2414] case 0: [L2420] case 1: [L2456] case 2: [L2550] case 3: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1] [L2551] COND TRUE ldv_state_variable_2 != 0 [L2552] tmp___4 = __VERIFIER_nondet_int() [L2554] case 0: [L2566] case 1: [L2576] case 2: [L2596] case 3: [L2606] case 4: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=4] [L2607] COND TRUE ldv_state_variable_2 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=4] [L2608] CALL ldv_probe_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2830] return __VERIFIER_nondet_int(); [L2608] RET ldv_probe_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_probe_2()=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=4] [L2609] ldv_state_variable_2 = 2 [L2610] ref_cnt = ref_cnt + 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=4] [L2412] tmp___1 = __VERIFIER_nondet_int() [L2414] case 0: [L2420] case 1: [L2456] case 2: [L2550] case 3: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=4] [L2551] COND TRUE ldv_state_variable_2 != 0 [L2552] tmp___4 = __VERIFIER_nondet_int() [L2554] case 0: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=0] [L2555] COND FALSE !(ldv_state_variable_2 == 4) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=0] [L2560] COND TRUE ldv_state_variable_2 == 2 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=178, ldvarg1={0:0}, ldvarg2={227:0}, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=178, tmp___1=3, tmp___2=1, tmp___4=0] [L2561] CALL tegra_rtc_shutdown(tegra_rtc_driver_group0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, pdev={0:0}, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2214] CALL tegra_rtc_alarm_irq_enable(& pdev->dev, 0U) VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1952] struct tegra_rtc_info *info ; [L1953] void *tmp ; [L1954] unsigned int status ; [L1955] unsigned long sl_irq_flags ; [L1956] u32 __v ; [L1957] u32 __v___0 ; VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, enabled=0, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1959] CALL, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, arg0={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] CALL, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2893] return __VERIFIER_nondet_pointer(); [L2801] RET, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, arg0={0:12}, arg0={0:12}, external_alloc()={196:232}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] return (void *)external_alloc(); [L1959] RET, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, dev_get_drvdata((struct device const *)dev)={196:232}, enabled=0, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1959] tmp = dev_get_drvdata((struct device const *)dev) [L1960] info = (struct tegra_rtc_info *)tmp VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, enabled=0, info={196:232}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={196:232}] [L1961] CALL tegra_rtc_wait_while_busy(dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1835] struct tegra_rtc_info *info ; [L1836] void *tmp ; [L1837] int retries ; [L1838] int tmp___0 ; [L1839] u32 tmp___1 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1841] CALL, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, arg0={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] CALL, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2893] return __VERIFIER_nondet_pointer(); [L2801] RET, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, arg0={0:12}, arg0={0:12}, external_alloc()={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] return (void *)external_alloc(); [L1841] RET, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, dev_get_drvdata((struct device const *)dev)={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1841] tmp = dev_get_drvdata((struct device const *)dev) [L1842] info = (struct tegra_rtc_info *)tmp [L1843] retries = 500 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, info={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, retries=500, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={221:0}] [L1854] CALL, EXPR tegra_rtc_check_busy(info) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, info={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1825] u32 __v ; [L1826] u32 __v___0 ; [L1828] EXPR info->rtc_base [L1828] EXPR (unsigned int volatile *)info->rtc_base + 4U [L1828] __v___0 = *((unsigned int volatile *)info->rtc_base + 4U) [L1829] __v = __v___0 [L1830] return (__v & 1U); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, __v=156, __v___0=156, info={221:0}, info={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1854] RET, EXPR tegra_rtc_check_busy(info) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, info={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, retries=500, tegra_rtc_check_busy(info)=0, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={221:0}] [L1854] tmp___1 = tegra_rtc_check_busy(info) [L1855] COND FALSE !(tmp___1 != 0U) [L1859] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, \result=0, __this_module={162:200}, dev={0:12}, dev={0:12}, info={221:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, retries=500, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={221:0}, tmp___1=0] [L1961] RET tegra_rtc_wait_while_busy(dev) VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, dev={0:12}, dev={0:12}, enabled=0, info={196:232}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tegra_rtc_wait_while_busy(dev)=0, tmp={196:232}] [L1962] CALL ldv_spin_lock_check() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2775] COND FALSE !(ldv_init == 1) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2777] CALL ldv_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1664] __VERIFIER_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=0, \old(tegra_rtc_driver_group0)=0, __this_module={162:200}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={210:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={225:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 65 procedures, 488 locations, 1 error locations. UNSAFE Result, 6.8s OverallTime, 13 OverallIterations, 4 TraceHistogramMax, 4.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5095 SDtfs, 6528 SDslu, 18164 SDs, 0 SdLazy, 4405 SolverSat, 1524 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 513 GetRequests, 380 SyntacticMatches, 0 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 383 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1475occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 12 MinimizatonAttempts, 1769 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 1443 NumberOfCodeBlocks, 1443 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 1308 ConstructedInterpolants, 0 QuantifiedInterpolants, 150756 SizeOfPredicates, 4 NumberOfNonLiveVariables, 3780 ConjunctsInSsa, 18 ConjunctsInUnsatCore, 16 InterpolantComputations, 9 PerfectInterpolantSequences, 221/250 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-635dfa2 [2018-12-08 19:35:35,140 INFO L170 SettingsManager]: Resetting all preferences to default values... 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[2018-12-08 19:35:35,164 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-08 19:35:35,165 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-08 19:35:35,165 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-08 19:35:35,166 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-08 19:35:35,166 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-08 19:35:35,167 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-08 19:35:35,168 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-08 19:35:35,168 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-08 19:35:35,168 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-08 19:35:35,169 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-08 19:35:35,169 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-08 19:35:35,169 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-08 19:35:35,170 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-08 19:35:35,170 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2018-12-08 19:35:35,180 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-08 19:35:35,180 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-08 19:35:35,181 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-08 19:35:35,181 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-08 19:35:35,181 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-08 19:35:35,181 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-08 19:35:35,181 INFO L133 SettingsManager]: * Use SBE=true [2018-12-08 19:35:35,182 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-08 19:35:35,182 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-08 19:35:35,183 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-08 19:35:35,183 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-08 19:35:35,183 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-08 19:35:35,183 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-08 19:35:35,183 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 19:35:35,183 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-08 19:35:35,183 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-08 19:35:35,183 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-08 19:35:35,184 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-12-08 19:35:35,184 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-08 19:35:35,184 INFO L133 SettingsManager]: * Command for external solver=cvc4 --incremental --rewrite-divk --print-success --lang smt [2018-12-08 19:35:35,184 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-12-08 19:35:35,184 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-08 19:35:35,184 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 840e3ba93a4f821803f9089812ff1f73e2838277 [2018-12-08 19:35:35,206 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-08 19:35:35,213 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-08 19:35:35,215 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-08 19:35:35,216 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-08 19:35:35,216 INFO L276 PluginConnector]: CDTParser initialized [2018-12-08 19:35:35,216 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i [2018-12-08 19:35:35,251 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/71054a2c5/6163a6cd96b7415c94654d42f944b8b8/FLAGc25acaa95 [2018-12-08 19:35:35,647 INFO L307 CDTParser]: Found 1 translation units. [2018-12-08 19:35:35,647 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i [2018-12-08 19:35:35,658 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/71054a2c5/6163a6cd96b7415c94654d42f944b8b8/FLAGc25acaa95 [2018-12-08 19:35:35,981 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/data/71054a2c5/6163a6cd96b7415c94654d42f944b8b8 [2018-12-08 19:35:35,985 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-08 19:35:35,987 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-08 19:35:35,988 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-08 19:35:35,988 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-08 19:35:35,992 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-08 19:35:35,993 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 07:35:35" (1/1) ... [2018-12-08 19:35:35,996 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2407d484 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:35, skipping insertion in model container [2018-12-08 19:35:35,997 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.12 07:35:35" (1/1) ... [2018-12-08 19:35:36,006 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-08 19:35:36,085 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-08 19:35:36,511 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 19:35:36,592 INFO L191 MainTranslator]: Completed pre-run [2018-12-08 19:35:36,700 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-08 19:35:36,744 INFO L195 MainTranslator]: Completed translation [2018-12-08 19:35:36,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36 WrapperNode [2018-12-08 19:35:36,744 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-08 19:35:36,744 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-08 19:35:36,745 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-08 19:35:36,745 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-08 19:35:36,750 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,775 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,784 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-08 19:35:36,784 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-08 19:35:36,784 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-08 19:35:36,785 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-08 19:35:36,790 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,791 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,798 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,798 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,828 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,836 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,842 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... [2018-12-08 19:35:36,849 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-08 19:35:36,850 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-08 19:35:36,850 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-08 19:35:36,850 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-08 19:35:36,851 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-08 19:35:36,891 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_suspend [2018-12-08 19:35:36,891 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_suspend [2018-12-08 19:35:36,891 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-12-08 19:35:36,891 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2018-12-08 19:35:36,891 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2018-12-08 19:35:36,891 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_unregister [2018-12-08 19:35:36,891 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_driver_unregister [2018-12-08 19:35:36,891 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2018-12-08 19:35:36,892 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-12-08 19:35:36,892 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-12-08 19:35:36,892 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_platform_driver_2 [2018-12-08 19:35:36,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_platform_driver_2 [2018-12-08 19:35:36,892 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-12-08 19:35:36,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-12-08 19:35:36,892 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-12-08 19:35:36,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize [2018-12-08 19:35:36,892 INFO L130 BoogieDeclarations]: Found specification of procedure external_alloc [2018-12-08 19:35:36,892 INFO L138 BoogieDeclarations]: Found implementation of procedure external_alloc [2018-12-08 19:35:36,893 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-12-08 19:35:36,893 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-12-08 19:35:36,893 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_time_to_tm [2018-12-08 19:35:36,893 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_time_to_tm [2018-12-08 19:35:36,893 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_proc [2018-12-08 19:35:36,893 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_proc [2018-12-08 19:35:36,893 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_alarm [2018-12-08 19:35:36,893 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_alarm [2018-12-08 19:35:36,893 INFO L130 BoogieDeclarations]: Found specification of procedure irq_set_irq_wake [2018-12-08 19:35:36,893 INFO L138 BoogieDeclarations]: Found implementation of procedure irq_set_irq_wake [2018-12-08 19:35:36,894 INFO L130 BoogieDeclarations]: Found specification of procedure outer_sync [2018-12-08 19:35:36,894 INFO L138 BoogieDeclarations]: Found implementation of procedure outer_sync [2018-12-08 19:35:36,894 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_remove [2018-12-08 19:35:36,894 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_remove [2018-12-08 19:35:36,894 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_shutdown [2018-12-08 19:35:36,894 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_shutdown [2018-12-08 19:35:36,894 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_tm_to_time [2018-12-08 19:35:36,894 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_tm_to_time [2018-12-08 19:35:36,894 INFO L130 BoogieDeclarations]: Found specification of procedure __release_region [2018-12-08 19:35:36,894 INFO L138 BoogieDeclarations]: Found implementation of procedure __release_region [2018-12-08 19:35:36,895 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-12-08 19:35:36,895 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2018-12-08 19:35:36,895 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-12-08 19:35:36,895 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2018-12-08 19:35:36,895 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_alarm [2018-12-08 19:35:36,895 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_alarm [2018-12-08 19:35:36,895 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-12-08 19:35:36,895 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-12-08 19:35:36,895 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_release_3 [2018-12-08 19:35:36,895 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_release_3 [2018-12-08 19:35:36,896 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_irq_1 [2018-12-08 19:35:36,896 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_irq_1 [2018-12-08 19:35:36,896 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock_check [2018-12-08 19:35:36,896 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock_check [2018-12-08 19:35:36,896 INFO L130 BoogieDeclarations]: Found specification of procedure kobject_name [2018-12-08 19:35:36,896 INFO L138 BoogieDeclarations]: Found implementation of procedure kobject_name [2018-12-08 19:35:36,896 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_alarm_irq_enable [2018-12-08 19:35:36,896 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_alarm_irq_enable [2018-12-08 19:35:36,896 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-12-08 19:35:36,897 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-12-08 19:35:36,897 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_iounmap [2018-12-08 19:35:36,897 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_iounmap [2018-12-08 19:35:36,897 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_probe [2018-12-08 19:35:36,897 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_driver_probe [2018-12-08 19:35:36,897 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_valid_tm [2018-12-08 19:35:36,897 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_valid_tm [2018-12-08 19:35:36,897 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_resume [2018-12-08 19:35:36,897 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_resume [2018-12-08 19:35:36,898 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-08 19:35:36,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-08 19:35:36,898 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_check_busy [2018-12-08 19:35:36,898 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_check_busy [2018-12-08 19:35:36,898 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~TO~VOID [2018-12-08 19:35:36,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~TO~VOID [2018-12-08 19:35:36,898 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_rtc_device_unregister_27 [2018-12-08 19:35:36,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_rtc_device_unregister_27 [2018-12-08 19:35:36,898 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_update_irq [2018-12-08 19:35:36,898 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_update_irq [2018-12-08 19:35:36,899 INFO L130 BoogieDeclarations]: Found specification of procedure rtc_device_unregister [2018-12-08 19:35:36,899 INFO L138 BoogieDeclarations]: Found implementation of procedure rtc_device_unregister [2018-12-08 19:35:36,899 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-08 19:35:36,899 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-08 19:35:36,899 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-12-08 19:35:36,899 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2018-12-08 19:35:36,899 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_irq_handler [2018-12-08 19:35:36,899 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_irq_handler [2018-12-08 19:35:36,899 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-12-08 19:35:36,899 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-12-08 19:35:36,900 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-12-08 19:35:36,900 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_unlock_irqrestore [2018-12-08 19:35:36,900 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-12-08 19:35:36,900 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock_irqrestore_9 [2018-12-08 19:35:36,900 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock_irqrestore_9 [2018-12-08 19:35:36,900 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_free_irq_26 [2018-12-08 19:35:36,900 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_free_irq_26 [2018-12-08 19:35:36,900 INFO L130 BoogieDeclarations]: Found specification of procedure device_may_wakeup [2018-12-08 19:35:36,900 INFO L138 BoogieDeclarations]: Found implementation of procedure device_may_wakeup [2018-12-08 19:35:36,900 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-12-08 19:35:36,900 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-12-08 19:35:36,901 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_resource [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-12-08 19:35:36,901 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2018-12-08 19:35:36,901 INFO L130 BoogieDeclarations]: Found specification of procedure platform_set_drvdata [2018-12-08 19:35:36,901 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_set_drvdata [2018-12-08 19:35:36,902 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-12-08 19:35:36,902 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_drvdata [2018-12-08 19:35:36,902 INFO L138 BoogieDeclarations]: Found implementation of procedure platform_get_drvdata [2018-12-08 19:35:36,902 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_init [2018-12-08 19:35:36,902 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_init [2018-12-08 19:35:36,902 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2018-12-08 19:35:36,902 INFO L130 BoogieDeclarations]: Found specification of procedure disable_irq_wake [2018-12-08 19:35:36,902 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_irq_wake [2018-12-08 19:35:36,902 INFO L130 BoogieDeclarations]: Found specification of procedure enable_irq_wake [2018-12-08 19:35:36,902 INFO L138 BoogieDeclarations]: Found implementation of procedure enable_irq_wake [2018-12-08 19:35:36,903 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_read_time [2018-12-08 19:35:36,903 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_read_time [2018-12-08 19:35:36,903 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_exit [2018-12-08 19:35:36,903 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_exit [2018-12-08 19:35:36,903 INFO L130 BoogieDeclarations]: Found specification of procedure choose_interrupt_1 [2018-12-08 19:35:36,903 INFO L138 BoogieDeclarations]: Found implementation of procedure choose_interrupt_1 [2018-12-08 19:35:36,903 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_wait_while_busy [2018-12-08 19:35:36,903 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_wait_while_busy [2018-12-08 19:35:36,903 INFO L130 BoogieDeclarations]: Found specification of procedure dev_name [2018-12-08 19:35:36,903 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_name [2018-12-08 19:35:36,904 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_3 [2018-12-08 19:35:36,904 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_probe_3 [2018-12-08 19:35:36,904 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_probe_2 [2018-12-08 19:35:36,904 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_probe_2 [2018-12-08 19:35:36,904 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2018-12-08 19:35:36,904 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2018-12-08 19:35:36,904 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-12-08 19:35:36,904 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2018-12-08 19:35:36,904 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-12-08 19:35:36,904 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-12-08 19:35:36,905 INFO L130 BoogieDeclarations]: Found specification of procedure tegra_rtc_set_time [2018-12-08 19:35:36,905 INFO L138 BoogieDeclarations]: Found implementation of procedure tegra_rtc_set_time [2018-12-08 19:35:36,905 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-08 19:35:36,905 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-08 19:35:39,766 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-08 19:35:39,766 INFO L280 CfgBuilder]: Removed 0 assue(true) statements. [2018-12-08 19:35:39,766 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 07:35:39 BoogieIcfgContainer [2018-12-08 19:35:39,767 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-08 19:35:39,767 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-08 19:35:39,767 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-08 19:35:39,769 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-08 19:35:39,769 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.12 07:35:35" (1/3) ... [2018-12-08 19:35:39,770 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@761db063 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 07:35:39, skipping insertion in model container [2018-12-08 19:35:39,770 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.12 07:35:36" (2/3) ... [2018-12-08 19:35:39,770 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@761db063 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.12 07:35:39, skipping insertion in model container [2018-12-08 19:35:39,770 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 07:35:39" (3/3) ... [2018-12-08 19:35:39,771 INFO L112 eAbstractionObserver]: Analyzing ICFG linux-stable-9ec4f65-1-110_1a-drivers--rtc--rtc-tegra.ko-entry_point_false-unreach-call.cil.out.i [2018-12-08 19:35:39,777 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-08 19:35:39,783 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-08 19:35:39,792 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-08 19:35:39,812 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-08 19:35:39,812 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-08 19:35:39,813 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-08 19:35:39,813 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-08 19:35:39,813 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-08 19:35:39,813 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-08 19:35:39,813 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-08 19:35:39,813 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-08 19:35:39,813 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-08 19:35:39,829 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states. [2018-12-08 19:35:39,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-12-08 19:35:39,836 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:39,837 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:39,838 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:39,842 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:39,842 INFO L82 PathProgramCache]: Analyzing trace with hash 1646624460, now seen corresponding path program 1 times [2018-12-08 19:35:39,845 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:39,845 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:39,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:39,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:39,999 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:40,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-08 19:35:40,029 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:40,033 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:40,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:40,035 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:40,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:40,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:40,045 INFO L87 Difference]: Start difference. First operand 486 states. Second operand 3 states. [2018-12-08 19:35:40,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:40,129 INFO L93 Difference]: Finished difference Result 822 states and 1040 transitions. [2018-12-08 19:35:40,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:40,131 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-12-08 19:35:40,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:40,143 INFO L225 Difference]: With dead ends: 822 [2018-12-08 19:35:40,144 INFO L226 Difference]: Without dead ends: 331 [2018-12-08 19:35:40,149 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:40,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-12-08 19:35:40,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 331. [2018-12-08 19:35:40,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-12-08 19:35:40,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 401 transitions. [2018-12-08 19:35:40,208 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 401 transitions. Word has length 47 [2018-12-08 19:35:40,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:40,210 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 401 transitions. [2018-12-08 19:35:40,210 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:40,210 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 401 transitions. [2018-12-08 19:35:40,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-08 19:35:40,214 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:40,214 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:40,214 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:40,214 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:40,215 INFO L82 PathProgramCache]: Analyzing trace with hash -1544904286, now seen corresponding path program 1 times [2018-12-08 19:35:40,215 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:40,215 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:40,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:40,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:40,345 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:40,354 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:40,355 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:40,357 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:40,357 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:40,358 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:40,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:40,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:40,358 INFO L87 Difference]: Start difference. First operand 331 states and 401 transitions. Second operand 3 states. [2018-12-08 19:35:40,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:40,422 INFO L93 Difference]: Finished difference Result 774 states and 940 transitions. [2018-12-08 19:35:40,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:40,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2018-12-08 19:35:40,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:40,424 INFO L225 Difference]: With dead ends: 774 [2018-12-08 19:35:40,424 INFO L226 Difference]: Without dead ends: 460 [2018-12-08 19:35:40,426 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:40,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 460 states. [2018-12-08 19:35:40,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 460 to 457. [2018-12-08 19:35:40,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 457 states. [2018-12-08 19:35:40,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 555 transitions. [2018-12-08 19:35:40,446 INFO L78 Accepts]: Start accepts. Automaton has 457 states and 555 transitions. Word has length 68 [2018-12-08 19:35:40,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:40,447 INFO L480 AbstractCegarLoop]: Abstraction has 457 states and 555 transitions. [2018-12-08 19:35:40,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:40,447 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 555 transitions. [2018-12-08 19:35:40,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-12-08 19:35:40,448 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:40,448 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:40,448 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:40,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:40,449 INFO L82 PathProgramCache]: Analyzing trace with hash -884307126, now seen corresponding path program 1 times [2018-12-08 19:35:40,449 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:40,449 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:40,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:40,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:40,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:40,641 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:40,641 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:40,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:40,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:40,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:40,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:40,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:40,644 INFO L87 Difference]: Start difference. First operand 457 states and 555 transitions. Second operand 5 states. [2018-12-08 19:35:40,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:40,743 INFO L93 Difference]: Finished difference Result 1341 states and 1657 transitions. [2018-12-08 19:35:40,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-08 19:35:40,744 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-12-08 19:35:40,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:40,747 INFO L225 Difference]: With dead ends: 1341 [2018-12-08 19:35:40,747 INFO L226 Difference]: Without dead ends: 910 [2018-12-08 19:35:40,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:40,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 910 states. [2018-12-08 19:35:40,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 910 to 887. [2018-12-08 19:35:40,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 887 states. [2018-12-08 19:35:40,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 887 states to 887 states and 1086 transitions. [2018-12-08 19:35:40,781 INFO L78 Accepts]: Start accepts. Automaton has 887 states and 1086 transitions. Word has length 70 [2018-12-08 19:35:40,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:40,781 INFO L480 AbstractCegarLoop]: Abstraction has 887 states and 1086 transitions. [2018-12-08 19:35:40,781 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:40,781 INFO L276 IsEmpty]: Start isEmpty. Operand 887 states and 1086 transitions. [2018-12-08 19:35:40,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-12-08 19:35:40,782 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:40,783 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:40,783 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:40,783 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:40,783 INFO L82 PathProgramCache]: Analyzing trace with hash -1663745524, now seen corresponding path program 1 times [2018-12-08 19:35:40,783 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:40,783 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:40,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:40,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:40,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:40,925 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:40,925 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:40,926 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:40,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:40,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:40,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:40,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:40,927 INFO L87 Difference]: Start difference. First operand 887 states and 1086 transitions. Second operand 5 states. [2018-12-08 19:35:41,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:41,020 INFO L93 Difference]: Finished difference Result 1780 states and 2200 transitions. [2018-12-08 19:35:41,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 19:35:41,021 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2018-12-08 19:35:41,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:41,025 INFO L225 Difference]: With dead ends: 1780 [2018-12-08 19:35:41,025 INFO L226 Difference]: Without dead ends: 919 [2018-12-08 19:35:41,027 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:41,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 919 states. [2018-12-08 19:35:41,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 919 to 895. [2018-12-08 19:35:41,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 895 states. [2018-12-08 19:35:41,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 895 states to 895 states and 1088 transitions. [2018-12-08 19:35:41,072 INFO L78 Accepts]: Start accepts. Automaton has 895 states and 1088 transitions. Word has length 71 [2018-12-08 19:35:41,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:41,072 INFO L480 AbstractCegarLoop]: Abstraction has 895 states and 1088 transitions. [2018-12-08 19:35:41,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:41,072 INFO L276 IsEmpty]: Start isEmpty. Operand 895 states and 1088 transitions. [2018-12-08 19:35:41,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-12-08 19:35:41,074 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:41,074 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:41,074 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:41,074 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:41,074 INFO L82 PathProgramCache]: Analyzing trace with hash -1782427673, now seen corresponding path program 1 times [2018-12-08 19:35:41,075 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:41,075 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:41,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:41,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:41,183 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:41,200 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:41,200 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:41,202 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:41,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:41,202 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:41,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:41,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:41,202 INFO L87 Difference]: Start difference. First operand 895 states and 1088 transitions. Second operand 5 states. [2018-12-08 19:35:41,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:41,284 INFO L93 Difference]: Finished difference Result 1796 states and 2200 transitions. [2018-12-08 19:35:41,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 19:35:41,284 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-12-08 19:35:41,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:41,288 INFO L225 Difference]: With dead ends: 1796 [2018-12-08 19:35:41,288 INFO L226 Difference]: Without dead ends: 927 [2018-12-08 19:35:41,290 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:41,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 927 states. [2018-12-08 19:35:41,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 927 to 903. [2018-12-08 19:35:41,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 903 states. [2018-12-08 19:35:41,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 903 states to 903 states and 1090 transitions. [2018-12-08 19:35:41,320 INFO L78 Accepts]: Start accepts. Automaton has 903 states and 1090 transitions. Word has length 72 [2018-12-08 19:35:41,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:41,320 INFO L480 AbstractCegarLoop]: Abstraction has 903 states and 1090 transitions. [2018-12-08 19:35:41,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:41,320 INFO L276 IsEmpty]: Start isEmpty. Operand 903 states and 1090 transitions. [2018-12-08 19:35:41,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-12-08 19:35:41,322 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:41,322 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:41,322 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:41,322 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:41,322 INFO L82 PathProgramCache]: Analyzing trace with hash 1402464713, now seen corresponding path program 1 times [2018-12-08 19:35:41,323 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:41,323 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:41,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:41,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:41,468 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:41,491 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:41,491 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:41,493 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:41,493 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-08 19:35:41,493 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-08 19:35:41,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-08 19:35:41,493 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:41,494 INFO L87 Difference]: Start difference. First operand 903 states and 1090 transitions. Second operand 5 states. [2018-12-08 19:35:41,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:41,590 INFO L93 Difference]: Finished difference Result 1707 states and 2078 transitions. [2018-12-08 19:35:41,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-08 19:35:41,591 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-12-08 19:35:41,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:41,594 INFO L225 Difference]: With dead ends: 1707 [2018-12-08 19:35:41,594 INFO L226 Difference]: Without dead ends: 830 [2018-12-08 19:35:41,597 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:41,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 830 states. [2018-12-08 19:35:41,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 830 to 812. [2018-12-08 19:35:41,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 812 states. [2018-12-08 19:35:41,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 812 states to 812 states and 974 transitions. [2018-12-08 19:35:41,633 INFO L78 Accepts]: Start accepts. Automaton has 812 states and 974 transitions. Word has length 73 [2018-12-08 19:35:41,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:41,634 INFO L480 AbstractCegarLoop]: Abstraction has 812 states and 974 transitions. [2018-12-08 19:35:41,634 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-08 19:35:41,634 INFO L276 IsEmpty]: Start isEmpty. Operand 812 states and 974 transitions. [2018-12-08 19:35:41,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-12-08 19:35:41,635 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:41,636 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:41,636 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:41,636 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:41,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1316738903, now seen corresponding path program 1 times [2018-12-08 19:35:41,637 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:41,637 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:41,660 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:41,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:41,769 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:41,821 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 19:35:41,821 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 19:35:42,001 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-12-08 19:35:42,006 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-08 19:35:42,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [9] total 13 [2018-12-08 19:35:42,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-12-08 19:35:42,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-12-08 19:35:42,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-12-08 19:35:42,007 INFO L87 Difference]: Start difference. First operand 812 states and 974 transitions. Second operand 13 states. [2018-12-08 19:35:45,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:45,034 INFO L93 Difference]: Finished difference Result 2154 states and 2671 transitions. [2018-12-08 19:35:45,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-08 19:35:45,035 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 85 [2018-12-08 19:35:45,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:45,039 INFO L225 Difference]: With dead ends: 2154 [2018-12-08 19:35:45,039 INFO L226 Difference]: Without dead ends: 1368 [2018-12-08 19:35:45,040 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 158 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=152, Invalid=498, Unknown=0, NotChecked=0, Total=650 [2018-12-08 19:35:45,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1368 states. [2018-12-08 19:35:45,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1368 to 1155. [2018-12-08 19:35:45,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1155 states. [2018-12-08 19:35:45,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1155 states to 1155 states and 1392 transitions. [2018-12-08 19:35:45,077 INFO L78 Accepts]: Start accepts. Automaton has 1155 states and 1392 transitions. Word has length 85 [2018-12-08 19:35:45,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:45,077 INFO L480 AbstractCegarLoop]: Abstraction has 1155 states and 1392 transitions. [2018-12-08 19:35:45,077 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-12-08 19:35:45,078 INFO L276 IsEmpty]: Start isEmpty. Operand 1155 states and 1392 transitions. [2018-12-08 19:35:45,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-12-08 19:35:45,079 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:45,079 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:45,079 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:45,079 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:45,079 INFO L82 PathProgramCache]: Analyzing trace with hash 1516400962, now seen corresponding path program 1 times [2018-12-08 19:35:45,079 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:45,079 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:45,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:45,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:45,204 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:45,284 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:45,284 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 19:35:45,466 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:45,468 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:45,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 14 [2018-12-08 19:35:45,469 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 19:35:45,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 19:35:45,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-12-08 19:35:45,469 INFO L87 Difference]: Start difference. First operand 1155 states and 1392 transitions. Second operand 14 states. [2018-12-08 19:35:46,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:46,968 INFO L93 Difference]: Finished difference Result 2670 states and 3229 transitions. [2018-12-08 19:35:46,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 19:35:46,969 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 86 [2018-12-08 19:35:46,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:46,972 INFO L225 Difference]: With dead ends: 2670 [2018-12-08 19:35:46,973 INFO L226 Difference]: Without dead ends: 1541 [2018-12-08 19:35:46,974 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 182 GetRequests, 159 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=419, Unknown=0, NotChecked=0, Total=552 [2018-12-08 19:35:46,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1541 states. [2018-12-08 19:35:47,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1541 to 1472. [2018-12-08 19:35:47,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1472 states. [2018-12-08 19:35:47,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1472 states to 1472 states and 1785 transitions. [2018-12-08 19:35:47,015 INFO L78 Accepts]: Start accepts. Automaton has 1472 states and 1785 transitions. Word has length 86 [2018-12-08 19:35:47,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:47,016 INFO L480 AbstractCegarLoop]: Abstraction has 1472 states and 1785 transitions. [2018-12-08 19:35:47,016 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 19:35:47,016 INFO L276 IsEmpty]: Start isEmpty. Operand 1472 states and 1785 transitions. [2018-12-08 19:35:47,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-12-08 19:35:47,017 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:47,017 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:47,017 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:47,017 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:47,017 INFO L82 PathProgramCache]: Analyzing trace with hash -2059129438, now seen corresponding path program 1 times [2018-12-08 19:35:47,018 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:47,018 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:47,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:47,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:47,138 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:47,199 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:47,199 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 19:35:47,333 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:47,335 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:47,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 14 [2018-12-08 19:35:47,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 19:35:47,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 19:35:47,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-12-08 19:35:47,336 INFO L87 Difference]: Start difference. First operand 1472 states and 1785 transitions. Second operand 14 states. [2018-12-08 19:35:48,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:48,849 INFO L93 Difference]: Finished difference Result 3304 states and 4019 transitions. [2018-12-08 19:35:48,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-12-08 19:35:48,849 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 87 [2018-12-08 19:35:48,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:48,853 INFO L225 Difference]: With dead ends: 3304 [2018-12-08 19:35:48,853 INFO L226 Difference]: Without dead ends: 1858 [2018-12-08 19:35:48,855 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 161 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=419, Unknown=0, NotChecked=0, Total=552 [2018-12-08 19:35:48,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1858 states. [2018-12-08 19:35:48,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1858 to 1472. [2018-12-08 19:35:48,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1472 states. [2018-12-08 19:35:48,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1472 states to 1472 states and 1785 transitions. [2018-12-08 19:35:48,916 INFO L78 Accepts]: Start accepts. Automaton has 1472 states and 1785 transitions. Word has length 87 [2018-12-08 19:35:48,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:48,916 INFO L480 AbstractCegarLoop]: Abstraction has 1472 states and 1785 transitions. [2018-12-08 19:35:48,916 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 19:35:48,916 INFO L276 IsEmpty]: Start isEmpty. Operand 1472 states and 1785 transitions. [2018-12-08 19:35:48,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-08 19:35:48,917 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:48,917 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:48,918 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:48,918 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:48,918 INFO L82 PathProgramCache]: Analyzing trace with hash 1854992155, now seen corresponding path program 1 times [2018-12-08 19:35:48,918 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:48,918 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:48,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:49,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:49,054 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:49,119 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:49,120 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 19:35:49,246 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:49,248 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:49,248 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 14 [2018-12-08 19:35:49,248 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-12-08 19:35:49,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-12-08 19:35:49,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-12-08 19:35:49,248 INFO L87 Difference]: Start difference. First operand 1472 states and 1785 transitions. Second operand 14 states. [2018-12-08 19:35:50,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:50,488 INFO L93 Difference]: Finished difference Result 2860 states and 3465 transitions. [2018-12-08 19:35:50,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-08 19:35:50,489 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 88 [2018-12-08 19:35:50,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:50,492 INFO L225 Difference]: With dead ends: 2860 [2018-12-08 19:35:50,492 INFO L226 Difference]: Without dead ends: 1414 [2018-12-08 19:35:50,493 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 163 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2018-12-08 19:35:50,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1414 states. [2018-12-08 19:35:50,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1414 to 398. [2018-12-08 19:35:50,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 398 states. [2018-12-08 19:35:50,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 465 transitions. [2018-12-08 19:35:50,519 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 465 transitions. Word has length 88 [2018-12-08 19:35:50,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:50,519 INFO L480 AbstractCegarLoop]: Abstraction has 398 states and 465 transitions. [2018-12-08 19:35:50,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-12-08 19:35:50,519 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 465 transitions. [2018-12-08 19:35:50,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-12-08 19:35:50,520 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:50,520 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:50,520 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:50,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:50,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1289094802, now seen corresponding path program 1 times [2018-12-08 19:35:50,521 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:50,521 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:50,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:50,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:50,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:50,641 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-12-08 19:35:50,641 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:50,642 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:50,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:50,643 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:50,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:50,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:50,643 INFO L87 Difference]: Start difference. First operand 398 states and 465 transitions. Second operand 3 states. [2018-12-08 19:35:50,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:50,753 INFO L93 Difference]: Finished difference Result 852 states and 1012 transitions. [2018-12-08 19:35:50,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:50,754 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2018-12-08 19:35:50,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:50,755 INFO L225 Difference]: With dead ends: 852 [2018-12-08 19:35:50,755 INFO L226 Difference]: Without dead ends: 480 [2018-12-08 19:35:50,756 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:50,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states. [2018-12-08 19:35:50,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 480. [2018-12-08 19:35:50,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 480 states. [2018-12-08 19:35:50,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 480 states to 480 states and 566 transitions. [2018-12-08 19:35:50,797 INFO L78 Accepts]: Start accepts. Automaton has 480 states and 566 transitions. Word has length 97 [2018-12-08 19:35:50,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:50,797 INFO L480 AbstractCegarLoop]: Abstraction has 480 states and 566 transitions. [2018-12-08 19:35:50,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:50,798 INFO L276 IsEmpty]: Start isEmpty. Operand 480 states and 566 transitions. [2018-12-08 19:35:50,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-12-08 19:35:50,798 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:50,798 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:50,799 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:50,799 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:50,799 INFO L82 PathProgramCache]: Analyzing trace with hash -94289413, now seen corresponding path program 1 times [2018-12-08 19:35:50,799 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:50,799 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:50,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:50,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:50,941 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:50,951 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-12-08 19:35:50,952 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:50,953 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:50,953 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-08 19:35:50,954 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-08 19:35:50,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-08 19:35:50,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:50,954 INFO L87 Difference]: Start difference. First operand 480 states and 566 transitions. Second operand 3 states. [2018-12-08 19:35:51,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:51,095 INFO L93 Difference]: Finished difference Result 1169 states and 1373 transitions. [2018-12-08 19:35:51,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-08 19:35:51,095 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2018-12-08 19:35:51,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:51,097 INFO L225 Difference]: With dead ends: 1169 [2018-12-08 19:35:51,097 INFO L226 Difference]: Without dead ends: 715 [2018-12-08 19:35:51,098 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-08 19:35:51,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2018-12-08 19:35:51,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 712. [2018-12-08 19:35:51,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 712 states. [2018-12-08 19:35:51,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 712 states to 712 states and 824 transitions. [2018-12-08 19:35:51,140 INFO L78 Accepts]: Start accepts. Automaton has 712 states and 824 transitions. Word has length 114 [2018-12-08 19:35:51,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:51,140 INFO L480 AbstractCegarLoop]: Abstraction has 712 states and 824 transitions. [2018-12-08 19:35:51,140 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-08 19:35:51,140 INFO L276 IsEmpty]: Start isEmpty. Operand 712 states and 824 transitions. [2018-12-08 19:35:51,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-08 19:35:51,141 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:51,141 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:51,141 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:51,141 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:51,141 INFO L82 PathProgramCache]: Analyzing trace with hash -1420932234, now seen corresponding path program 1 times [2018-12-08 19:35:51,141 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:51,141 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:51,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:51,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:51,527 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:51,540 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 19:35:51,540 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-12-08 19:35:51,543 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-08 19:35:51,543 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-08 19:35:51,543 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-08 19:35:51,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-08 19:35:51,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-08 19:35:51,544 INFO L87 Difference]: Start difference. First operand 712 states and 824 transitions. Second operand 4 states. [2018-12-08 19:35:51,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:51,598 INFO L93 Difference]: Finished difference Result 1402 states and 1625 transitions. [2018-12-08 19:35:51,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-08 19:35:51,599 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 115 [2018-12-08 19:35:51,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:51,600 INFO L225 Difference]: With dead ends: 1402 [2018-12-08 19:35:51,600 INFO L226 Difference]: Without dead ends: 713 [2018-12-08 19:35:51,601 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-08 19:35:51,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2018-12-08 19:35:51,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 713. [2018-12-08 19:35:51,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 713 states. [2018-12-08 19:35:51,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 713 states to 713 states and 825 transitions. [2018-12-08 19:35:51,643 INFO L78 Accepts]: Start accepts. Automaton has 713 states and 825 transitions. Word has length 115 [2018-12-08 19:35:51,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:51,644 INFO L480 AbstractCegarLoop]: Abstraction has 713 states and 825 transitions. [2018-12-08 19:35:51,644 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-08 19:35:51,644 INFO L276 IsEmpty]: Start isEmpty. Operand 713 states and 825 transitions. [2018-12-08 19:35:51,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-12-08 19:35:51,645 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:51,645 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:51,645 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:51,645 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:51,646 INFO L82 PathProgramCache]: Analyzing trace with hash 732072980, now seen corresponding path program 1 times [2018-12-08 19:35:51,646 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:51,646 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:51,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-08 19:35:51,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-08 19:35:51,970 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-08 19:35:51,987 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-12-08 19:35:51,987 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-12-08 19:35:52,058 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-12-08 19:35:52,061 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-12-08 19:35:52,061 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-12-08 19:35:52,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-08 19:35:52,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-08 19:35:52,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-12-08 19:35:52,061 INFO L87 Difference]: Start difference. First operand 713 states and 825 transitions. Second operand 8 states. [2018-12-08 19:35:52,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-08 19:35:52,174 INFO L93 Difference]: Finished difference Result 1407 states and 1632 transitions. [2018-12-08 19:35:52,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-08 19:35:52,175 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 116 [2018-12-08 19:35:52,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-08 19:35:52,176 INFO L225 Difference]: With dead ends: 1407 [2018-12-08 19:35:52,176 INFO L226 Difference]: Without dead ends: 716 [2018-12-08 19:35:52,177 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 224 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-12-08 19:35:52,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 716 states. [2018-12-08 19:35:52,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 716 to 716. [2018-12-08 19:35:52,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 716 states. [2018-12-08 19:35:52,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 716 states to 716 states and 828 transitions. [2018-12-08 19:35:52,211 INFO L78 Accepts]: Start accepts. Automaton has 716 states and 828 transitions. Word has length 116 [2018-12-08 19:35:52,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-08 19:35:52,211 INFO L480 AbstractCegarLoop]: Abstraction has 716 states and 828 transitions. [2018-12-08 19:35:52,211 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-08 19:35:52,211 INFO L276 IsEmpty]: Start isEmpty. Operand 716 states and 828 transitions. [2018-12-08 19:35:52,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-12-08 19:35:52,212 INFO L394 BasicCegarLoop]: Found error trace [2018-12-08 19:35:52,212 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-08 19:35:52,212 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-08 19:35:52,212 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-08 19:35:52,212 INFO L82 PathProgramCache]: Analyzing trace with hash 1051230966, now seen corresponding path program 2 times [2018-12-08 19:35:52,212 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-12-08 19:35:52,212 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/cvc4 Starting monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --incremental --print-success --lang smt --rewrite-divk [2018-12-08 19:35:52,229 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-12-08 19:35:52,945 ERROR L235 seRefinementStrategy]: Caught known exception: Array theory solver does not yet support write-chains connecting two different constant arrays [2018-12-08 19:35:52,945 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-12-08 19:35:52,945 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_cfd9bfed-b9c0-4dd6-a5c6-3af0f7af7194/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-12-08 19:35:52,955 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-12-08 19:35:53,970 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-12-08 19:35:53,970 INFO L250 tOrderPrioritization]: Conjunction of SSA is sat [2018-12-08 19:35:55,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-08 19:35:56,118 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-08 19:35:56,171 WARN L416 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-12-08 19:35:56,208 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_time [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_wkalrm [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,209 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *device [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_wkalrm [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_time [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,210 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *device [2018-12-08 19:35:56,211 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# [2018-12-08 19:35:56,211 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# [2018-12-08 19:35:56,211 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID [2018-12-08 19:35:56,212 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,212 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,213 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,213 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,214 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,214 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,215 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,215 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,216 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,216 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,217 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,217 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,218 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,218 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,219 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,219 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,219 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,220 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,220 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,220 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,221 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,221 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,221 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,221 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,221 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,222 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,222 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,222 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,222 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,223 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,223 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,224 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,224 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,224 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,225 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,225 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,225 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,226 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,226 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,226 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,249 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,250 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,250 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,250 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,251 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,251 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,251 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,252 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,252 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,252 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,252 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,253 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,253 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,253 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,254 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,254 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,254 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,255 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,255 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,255 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,255 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,256 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,256 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,256 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,256 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,256 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,256 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,257 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,257 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,257 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,257 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,257 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,257 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,258 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,258 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,258 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,258 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,259 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,259 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,259 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,259 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,260 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,260 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,260 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,260 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,260 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,261 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,262 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,262 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,262 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,262 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,262 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,262 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,263 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,264 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,264 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,264 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2018-12-08 19:35:56,264 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,264 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,266 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,266 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,266 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,266 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,267 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,267 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,267 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,267 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,268 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,268 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,269 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,269 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,269 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,269 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,270 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,270 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,270 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,270 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,271 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,271 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,271 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,271 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,272 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,272 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,272 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,272 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,274 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,274 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,274 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,275 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,275 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,275 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,275 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,276 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,276 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,276 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,276 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,277 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,277 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,277 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device [2018-12-08 19:35:56,290 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.12 07:35:56 BoogieIcfgContainer [2018-12-08 19:35:56,290 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-08 19:35:56,290 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-08 19:35:56,290 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-08 19:35:56,290 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-08 19:35:56,290 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.12 07:35:39" (3/4) ... [2018-12-08 19:35:56,293 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-12-08 19:35:56,293 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-08 19:35:56,294 INFO L168 Benchmark]: Toolchain (without parser) took 20308.31 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 483.9 MB). Free memory was 938.0 MB in the beginning and 1.4 GB in the end (delta: -481.9 MB). Peak memory consumption was 2.0 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:56,295 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 19:35:56,295 INFO L168 Benchmark]: CACSL2BoogieTranslator took 756.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.7 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -152.3 MB). Peak memory consumption was 61.5 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:56,295 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.85 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 19:35:56,295 INFO L168 Benchmark]: Boogie Preprocessor took 65.04 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:56,295 INFO L168 Benchmark]: RCFGBuilder took 2916.96 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 946.6 MB in the end (delta: 136.7 MB). Peak memory consumption was 136.7 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:56,296 INFO L168 Benchmark]: TraceAbstraction took 16522.59 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 340.3 MB). Free memory was 939.8 MB in the beginning and 1.4 GB in the end (delta: -480.1 MB). Peak memory consumption was 404.8 MB. Max. memory is 11.5 GB. [2018-12-08 19:35:56,296 INFO L168 Benchmark]: Witness Printer took 3.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-08 19:35:56,297 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 972.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 756.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 143.7 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -152.3 MB). Peak memory consumption was 61.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.85 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 65.04 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2916.96 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 946.6 MB in the end (delta: 136.7 MB). Peak memory consumption was 136.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 16522.59 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 340.3 MB). Free memory was 939.8 MB in the beginning and 1.4 GB in the end (delta: -480.1 MB). Peak memory consumption was 404.8 MB. Max. memory is 11.5 GB. * Witness Printer took 3.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_time - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_wkalrm - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_wkalrm - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *rtc_time - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~rtc_class_ops?open~*((*device ) : INT)?release~*((*device ) : VOID)?ioctl~*((*device UINT ULONG ) : INT)?read_time~*((*device *rtc_time ) : INT)?set_time~*((*device *rtc_time ) : INT)?read_alarm~*((*device *rtc_wkalrm ) : INT)?set_alarm~*((*device *rtc_wkalrm ) : INT)?proc~*((*device *seq_file ) : INT)?set_mmss~*((*device ULONG ) : INT)?read_callback~*((*device INT ) : INT)?alarm_irq_enable~*((*device UINT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType STRUCT~~platform_driver?probe~*((*platform_device ) : INT)?remove~*((*platform_device ) : INT)?shutdown~*((*platform_device ) : VOID)?suspend~*((*platform_device ~pm_message_t~0 ) : INT)?resume~*((*platform_device ) : INT)?driver~STRUCT~~device_driver?name~*CHAR?bus~*bus_type?owner~*module?mod_name~*CHAR?suppress_bind_attrs~~bool~0?of_match_table~*of_device_id?probe~*((*device ) : INT)?remove~*((*device ) : INT)?shutdown~*((*device ) : VOID)?suspend~*((*device ~pm_message_t~0 ) : INT)?resume~*((*device ) : INT)?groups~**attribute_group?pm~*dev_pm_ops?p~*driver_private#?id_table~*platform_device_id# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *VOID - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch241 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch261 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch243 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: BitvecLiteral 0bv32 could not be translated for associated CType *platform_device * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1664]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of large string literal at line 2219. Possible FailurePath: [L1687] int ldv_irq_1_2 = 0; [L1688] int LDV_IN_INTERRUPT = 1; [L1689] int ldv_irq_1_3 = 0; [L1690] struct platform_device *tegra_rtc_driver_group0 ; [L1691] void *ldv_irq_data_1_1 ; [L1692] int ldv_irq_1_1 = 0; [L1693] int ldv_irq_1_0 = 0; [L1694] int ldv_irq_line_1_3 ; [L1695] void *ldv_irq_data_1_0 ; [L1696] int ldv_state_variable_0 ; [L1697] struct device *tegra_rtc_ops_group1 ; [L1698] int ldv_state_variable_3 ; [L1699] int ldv_irq_line_1_0 ; [L1700] int ldv_state_variable_2 ; [L1701] void *ldv_irq_data_1_3 ; [L1702] int ref_cnt ; [L1703] int ldv_irq_line_1_1 ; [L1704] struct rtc_time *tegra_rtc_ops_group0 ; [L1705] void *ldv_irq_data_1_2 ; [L1706] int ldv_state_variable_1 ; [L1707] int ldv_irq_line_1_2 ; [L1708] struct rtc_wkalrm *tegra_rtc_ops_group2 ; [L2050-L2052] static struct rtc_class_ops tegra_rtc_ops = {0, 0, 0, & tegra_rtc_read_time, & tegra_rtc_set_time, & tegra_rtc_read_alarm, & tegra_rtc_set_alarm, & tegra_rtc_proc, 0, 0, & tegra_rtc_alarm_irq_enable}; [L2218-L2219] static struct platform_driver tegra_rtc_driver = {0, & tegra_rtc_remove, & tegra_rtc_shutdown, & tegra_rtc_suspend, & tegra_rtc_resume, {"tegra_rtc", 0, & __this_module, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0}; [L2235] int ldv_retval_2 ; [L2236] int ldv_retval_0 ; [L2238] int ldv_retval_1 ; [L2761] int ldv_init = 0; VAL [\old(LDV_IN_INTERRUPT)=0, \old(ldv_init)=0, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=null, \old(ldv_irq_data_1_0)=null, \old(ldv_irq_data_1_1)=null, \old(ldv_irq_data_1_1)=null, \old(ldv_irq_data_1_2)=null, \old(ldv_irq_data_1_2)=null, \old(ldv_irq_data_1_3)=null, \old(ldv_irq_data_1_3)=null, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver)=null, \old(tegra_rtc_driver)=null, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_ops)=null, \old(tegra_rtc_ops)=null, \old(tegra_rtc_ops_group0)=null, \old(tegra_rtc_ops_group0)=null, \old(tegra_rtc_ops_group1)=null, \old(tegra_rtc_ops_group1)=null, \old(tegra_rtc_ops_group2)=null, \old(tegra_rtc_ops_group2)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2390] struct seq_file *ldvarg1 ; [L2391] void *tmp ; [L2392] unsigned int ldvarg0 ; [L2393] unsigned int tmp___0 ; [L2394] pm_message_t ldvarg2 ; [L2395] int tmp___1 ; [L2396] int tmp___2 ; [L2397] int tmp___3 ; [L2398] int tmp___4 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2400] CALL, EXPR ldv_zalloc(136U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=136, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1621] void *p ; [L1622] void *tmp ; [L1623] int tmp___0 ; [L1625] tmp___0 = __VERIFIER_nondet_int() [L1626] COND TRUE tmp___0 != 0 [L1627] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=136, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, \result={0:0}, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, size=136, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___0=1] [L2400] RET, EXPR ldv_zalloc(136U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_zalloc(136U)={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2400] tmp = ldv_zalloc(136U) [L2401] ldvarg1 = (struct seq_file *)tmp [L2402] tmp___0 = __VERIFIER_nondet_uint() [L2403] ldvarg0 = tmp___0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0] [L2404] FCALL ldv_initialize() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0] [L2405] FCALL memset((void *)(& ldvarg2), 0, 4U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, memset((void *)(& ldvarg2), 0, 4U)={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0] [L2406] ldv_state_variable_1 = 1 [L2407] ref_cnt = 0 [L2408] ldv_state_variable_0 = 1 [L2409] ldv_state_variable_3 = 0 [L2410] ldv_state_variable_2 = 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0] [L2412] tmp___1 = __VERIFIER_nondet_int() [L2414] case 0: [L2420] case 1: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1] [L2421] COND TRUE ldv_state_variable_0 != 0 [L2422] tmp___2 = __VERIFIER_nondet_int() [L2424] case 0: [L2432] case 1: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1, tmp___2=1] [L2433] COND TRUE ldv_state_variable_0 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1, tmp___2=1] [L2434] CALL, EXPR tegra_rtc_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2222] int tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2224] CALL, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, arg0={1:0}, arg1={-1:11}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2842] return __VERIFIER_nondet_int(); [L2224] RET, EXPR platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe)=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2224] tmp = platform_driver_probe(& tegra_rtc_driver, & tegra_rtc_probe) [L2225] return (tmp); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, \result=0, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp=0] [L2434] RET, EXPR tegra_rtc_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_init()=0, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1, tmp___2=1] [L2434] ldv_retval_0 = tegra_rtc_init() [L2435] COND TRUE ldv_retval_0 == 0 [L2436] ldv_state_variable_0 = 3 [L2437] ldv_state_variable_2 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1, tmp___2=1] [L2438] CALL ldv_initialize_platform_driver_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2355] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2357] CALL, EXPR ldv_zalloc(624U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=624, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1621] void *p ; [L1622] void *tmp ; [L1623] int tmp___0 ; [L1625] tmp___0 = __VERIFIER_nondet_int() [L1626] COND TRUE tmp___0 != 0 [L1627] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(size)=624, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, \result={0:0}, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, size=624, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp___0=1] [L2357] RET, EXPR ldv_zalloc(624U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_zalloc(624U)={0:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2357] tmp = ldv_zalloc(624U) [L2358] tegra_rtc_driver_group0 = (struct platform_device *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}] [L2438] RET ldv_initialize_platform_driver_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1, tmp___2=1] [L2441] COND FALSE !(ldv_retval_0 != 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=1, tmp___2=1] [L2412] tmp___1 = __VERIFIER_nondet_int() [L2414] case 0: [L2420] case 1: [L2456] case 2: [L2550] case 3: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1] [L2551] COND TRUE ldv_state_variable_2 != 0 [L2552] tmp___4 = __VERIFIER_nondet_int() [L2554] case 0: [L2566] case 1: [L2576] case 2: [L2596] case 3: [L2606] case 4: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=4] [L2607] COND TRUE ldv_state_variable_2 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=4] [L2608] CALL ldv_probe_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2830] return __VERIFIER_nondet_int(); [L2608] RET ldv_probe_2() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_probe_2()=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=4] [L2609] ldv_state_variable_2 = 2 [L2610] ref_cnt = ref_cnt + 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=4] [L2412] tmp___1 = __VERIFIER_nondet_int() [L2414] case 0: [L2420] case 1: [L2456] case 2: [L2550] case 3: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=4] [L2551] COND TRUE ldv_state_variable_2 != 0 [L2552] tmp___4 = __VERIFIER_nondet_int() [L2554] case 0: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=0] [L2555] COND FALSE !(ldv_state_variable_2 == 4) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=0] [L2560] COND TRUE ldv_state_variable_2 == 2 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ldvarg0=0, ldvarg1={0:0}, ldvarg2={2:0}, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___0=0, tmp___1=3, tmp___2=1, tmp___4=0] [L2561] CALL tegra_rtc_shutdown(tegra_rtc_driver_group0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, pdev={0:0}, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2214] CALL tegra_rtc_alarm_irq_enable(& pdev->dev, 0U) VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1952] struct tegra_rtc_info *info ; [L1953] void *tmp ; [L1954] unsigned int status ; [L1955] unsigned long sl_irq_flags ; [L1956] u32 __v ; [L1957] u32 __v___0 ; VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, enabled=0, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1959] CALL, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, arg0={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] CALL, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2893] return __VERIFIER_nondet_pointer(); [L2801] RET, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, arg0={0:12}, arg0={0:12}, external_alloc()={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] return (void *)external_alloc(); [L1959] RET, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, dev_get_drvdata((struct device const *)dev)={0:0}, enabled=0, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1959] tmp = dev_get_drvdata((struct device const *)dev) [L1960] info = (struct tegra_rtc_info *)tmp VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, enabled=0, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}] [L1961] CALL tegra_rtc_wait_while_busy(dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1835] struct tegra_rtc_info *info ; [L1836] void *tmp ; [L1837] int retries ; [L1838] int tmp___0 ; [L1839] u32 tmp___1 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1841] CALL, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, arg0={0:12}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] CALL, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2893] return __VERIFIER_nondet_pointer(); [L2801] RET, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, arg0={0:12}, arg0={0:12}, external_alloc()={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2801] return (void *)external_alloc(); [L1841] RET, EXPR dev_get_drvdata((struct device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, dev_get_drvdata((struct device const *)dev)={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1841] tmp = dev_get_drvdata((struct device const *)dev) [L1842] info = (struct tegra_rtc_info *)tmp [L1843] retries = 500 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, retries=500, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}] [L1854] CALL, EXPR tegra_rtc_check_busy(info) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1825] u32 __v ; [L1826] u32 __v___0 ; [L1828] EXPR info->rtc_base [L1828] EXPR (unsigned int volatile *)info->rtc_base + 4U [L1828] __v___0 = *((unsigned int volatile *)info->rtc_base + 4U) [L1829] __v = __v___0 [L1830] return (__v & 1U); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, \result=0, __this_module={0:0}, __v=0, __v___0=0, info={0:0}, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1854] RET, EXPR tegra_rtc_check_busy(info) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, retries=500, tegra_rtc_check_busy(info)=0, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}] [L1854] tmp___1 = tegra_rtc_check_busy(info) [L1855] COND FALSE !(tmp___1 != 0U) [L1859] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, \result=0, __this_module={0:0}, dev={0:12}, dev={0:12}, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, retries=500, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tmp={0:0}, tmp___1=0] [L1961] RET tegra_rtc_wait_while_busy(dev) VAL [\old(enabled)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, dev={0:12}, dev={0:12}, enabled=0, info={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}, tegra_rtc_wait_while_busy(dev)=0, tmp={0:0}] [L1962] CALL ldv_spin_lock_check() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2775] COND FALSE !(ldv_init == 1) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L2777] CALL ldv_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] [L1664] __VERIFIER_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ref_cnt)=0, \old(tegra_rtc_driver_group0)=null, \old(tegra_rtc_driver_group0)=null, __this_module={0:0}, LDV_IN_INTERRUPT=1, ldv_init=0, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=2, ldv_state_variable_3=0, ref_cnt=1, tegra_rtc_driver={1:0}, tegra_rtc_driver_group0={0:0}, tegra_rtc_ops={12:0}, tegra_rtc_ops_group0={0:0}, tegra_rtc_ops_group1={0:0}, tegra_rtc_ops_group2={0:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 65 procedures, 488 locations, 1 error locations. UNSAFE Result, 16.4s OverallTime, 15 OverallIterations, 4 TraceHistogramMax, 8.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5805 SDtfs, 7232 SDslu, 13530 SDs, 0 SdLazy, 5404 SolverSat, 1381 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1697 GetRequests, 1565 SyntacticMatches, 5 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1472occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 14 MinimizatonAttempts, 1779 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 2.4s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 1308 NumberOfCodeBlocks, 1308 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 1632 ConstructedInterpolants, 0 QuantifiedInterpolants, 256606 SizeOfPredicates, 41 NumberOfNonLiveVariables, 7214 ConjunctsInSsa, 95 ConjunctsInUnsatCore, 19 InterpolantComputations, 10 PerfectInterpolantSequences, 245/287 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...