./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 635dfa2a Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 447c919af4e106e36f468570351956f4c77293d2 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-635dfa2 [2018-12-09 03:30:55,850 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-09 03:30:55,851 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-09 03:30:55,856 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-09 03:30:55,857 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-09 03:30:55,857 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-09 03:30:55,858 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-09 03:30:55,859 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-09 03:30:55,859 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-09 03:30:55,860 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-09 03:30:55,860 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-09 03:30:55,861 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-09 03:30:55,861 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-09 03:30:55,862 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-09 03:30:55,862 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-09 03:30:55,863 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-09 03:30:55,863 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-09 03:30:55,864 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-09 03:30:55,865 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-09 03:30:55,866 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-09 03:30:55,867 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-09 03:30:55,867 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-09 03:30:55,868 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-09 03:30:55,869 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-09 03:30:55,869 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-09 03:30:55,869 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-09 03:30:55,870 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-09 03:30:55,870 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-09 03:30:55,871 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-09 03:30:55,871 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-09 03:30:55,872 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-09 03:30:55,872 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-09 03:30:55,872 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-09 03:30:55,872 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-09 03:30:55,873 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-09 03:30:55,873 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-09 03:30:55,874 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-12-09 03:30:55,881 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-09 03:30:55,881 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-09 03:30:55,882 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-09 03:30:55,882 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-12-09 03:30:55,882 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-09 03:30:55,882 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-09 03:30:55,882 INFO L133 SettingsManager]: * Use SBE=true [2018-12-09 03:30:55,882 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-09 03:30:55,883 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-09 03:30:55,884 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-09 03:30:55,884 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-09 03:30:55,884 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-09 03:30:55,884 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-09 03:30:55,884 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-09 03:30:55,884 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-09 03:30:55,884 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 03:30:55,885 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-09 03:30:55,885 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 447c919af4e106e36f468570351956f4c77293d2 [2018-12-09 03:30:55,904 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-09 03:30:55,912 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-09 03:30:55,914 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-09 03:30:55,915 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-09 03:30:55,915 INFO L276 PluginConnector]: CDTParser initialized [2018-12-09 03:30:55,915 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c [2018-12-09 03:30:55,952 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/data/a66a8d87f/60ceffd9494442e09d9c69d321bf78c2/FLAGeca014ea1 [2018-12-09 03:30:56,274 INFO L307 CDTParser]: Found 1 translation units. [2018-12-09 03:30:56,274 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/sv-benchmarks/c/systemc/transmitter.03_false-unreach-call_false-termination.cil.c [2018-12-09 03:30:56,279 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/data/a66a8d87f/60ceffd9494442e09d9c69d321bf78c2/FLAGeca014ea1 [2018-12-09 03:30:56,287 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/data/a66a8d87f/60ceffd9494442e09d9c69d321bf78c2 [2018-12-09 03:30:56,288 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-09 03:30:56,289 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-09 03:30:56,290 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-09 03:30:56,290 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-09 03:30:56,292 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-09 03:30:56,292 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,294 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@643265e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56, skipping insertion in model container [2018-12-09 03:30:56,294 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,298 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-09 03:30:56,314 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-09 03:30:56,421 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 03:30:56,425 INFO L191 MainTranslator]: Completed pre-run [2018-12-09 03:30:56,449 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-12-09 03:30:56,459 INFO L195 MainTranslator]: Completed translation [2018-12-09 03:30:56,459 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56 WrapperNode [2018-12-09 03:30:56,459 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-09 03:30:56,459 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-09 03:30:56,460 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-09 03:30:56,460 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-09 03:30:56,465 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,469 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,504 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-09 03:30:56,504 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-09 03:30:56,504 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-09 03:30:56,504 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-09 03:30:56,510 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,510 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,512 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,512 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,517 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,523 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,524 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... [2018-12-09 03:30:56,526 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-09 03:30:56,526 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-09 03:30:56,526 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-09 03:30:56,526 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-09 03:30:56,527 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-09 03:30:56,559 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2018-12-09 03:30:56,559 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2018-12-09 03:30:56,559 INFO L130 BoogieDeclarations]: Found specification of procedure transmit3 [2018-12-09 03:30:56,559 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit3 [2018-12-09 03:30:56,559 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2018-12-09 03:30:56,559 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2018-12-09 03:30:56,559 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-12-09 03:30:56,559 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-12-09 03:30:56,559 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-12-09 03:30:56,560 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-12-09 03:30:56,560 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-12-09 03:30:56,560 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-12-09 03:30:56,560 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2018-12-09 03:30:56,560 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2018-12-09 03:30:56,560 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-12-09 03:30:56,560 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-12-09 03:30:56,560 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2018-12-09 03:30:56,560 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2018-12-09 03:30:56,560 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2018-12-09 03:30:56,560 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2018-12-09 03:30:56,560 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-12-09 03:30:56,561 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-12-09 03:30:56,561 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2018-12-09 03:30:56,561 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2018-12-09 03:30:56,561 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-12-09 03:30:56,561 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-12-09 03:30:56,561 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-12-09 03:30:56,561 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-12-09 03:30:56,561 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2018-12-09 03:30:56,561 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2018-12-09 03:30:56,561 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-12-09 03:30:56,561 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-12-09 03:30:56,561 INFO L130 BoogieDeclarations]: Found specification of procedure master [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit3_triggered [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit3_triggered [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-12-09 03:30:56,562 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-09 03:30:56,562 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-09 03:30:56,563 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-12-09 03:30:56,563 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-12-09 03:30:56,844 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-09 03:30:56,844 INFO L280 CfgBuilder]: Removed 7 assue(true) statements. [2018-12-09 03:30:56,845 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:30:56 BoogieIcfgContainer [2018-12-09 03:30:56,845 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-09 03:30:56,845 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-09 03:30:56,845 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-09 03:30:56,848 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-09 03:30:56,848 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 09.12 03:30:56" (1/3) ... [2018-12-09 03:30:56,849 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@76a6486b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 03:30:56, skipping insertion in model container [2018-12-09 03:30:56,849 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.12 03:30:56" (2/3) ... [2018-12-09 03:30:56,849 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@76a6486b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 09.12 03:30:56, skipping insertion in model container [2018-12-09 03:30:56,849 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:30:56" (3/3) ... [2018-12-09 03:30:56,851 INFO L112 eAbstractionObserver]: Analyzing ICFG transmitter.03_false-unreach-call_false-termination.cil.c [2018-12-09 03:30:56,859 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-09 03:30:56,865 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-12-09 03:30:56,874 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-12-09 03:30:56,893 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-09 03:30:56,894 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-09 03:30:56,894 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-09 03:30:56,894 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-09 03:30:56,894 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-09 03:30:56,894 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-09 03:30:56,894 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-09 03:30:56,894 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-09 03:30:56,894 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-09 03:30:56,907 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states. [2018-12-09 03:30:56,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:56,913 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:56,914 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:56,915 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:56,918 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:56,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1541128221, now seen corresponding path program 1 times [2018-12-09 03:30:56,920 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:56,920 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:56,949 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:56,949 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:56,949 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:56,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:57,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:57,094 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:57,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:30:57,097 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:30:57,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:30:57,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:30:57,106 INFO L87 Difference]: Start difference. First operand 199 states. Second operand 5 states. [2018-12-09 03:30:57,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:57,463 INFO L93 Difference]: Finished difference Result 412 states and 610 transitions. [2018-12-09 03:30:57,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:30:57,465 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:30:57,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:57,475 INFO L225 Difference]: With dead ends: 412 [2018-12-09 03:30:57,475 INFO L226 Difference]: Without dead ends: 222 [2018-12-09 03:30:57,478 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:57,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-12-09 03:30:57,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 190. [2018-12-09 03:30:57,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-09 03:30:57,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 258 transitions. [2018-12-09 03:30:57,520 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 258 transitions. Word has length 105 [2018-12-09 03:30:57,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:57,520 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 258 transitions. [2018-12-09 03:30:57,520 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:30:57,520 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 258 transitions. [2018-12-09 03:30:57,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:57,522 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:57,522 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:57,523 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:57,523 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:57,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1187081125, now seen corresponding path program 1 times [2018-12-09 03:30:57,523 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:57,523 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:57,524 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:57,524 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:57,524 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:57,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:57,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:57,594 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:57,594 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:30:57,595 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:30:57,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:30:57,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:30:57,596 INFO L87 Difference]: Start difference. First operand 190 states and 258 transitions. Second operand 5 states. [2018-12-09 03:30:57,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:57,835 INFO L93 Difference]: Finished difference Result 391 states and 548 transitions. [2018-12-09 03:30:57,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:30:57,836 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:30:57,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:57,838 INFO L225 Difference]: With dead ends: 391 [2018-12-09 03:30:57,838 INFO L226 Difference]: Without dead ends: 222 [2018-12-09 03:30:57,839 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:57,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-12-09 03:30:57,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 190. [2018-12-09 03:30:57,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-09 03:30:57,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 257 transitions. [2018-12-09 03:30:57,858 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 257 transitions. Word has length 105 [2018-12-09 03:30:57,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:57,859 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 257 transitions. [2018-12-09 03:30:57,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:30:57,859 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 257 transitions. [2018-12-09 03:30:57,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:57,860 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:57,860 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:57,861 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:57,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:57,861 INFO L82 PathProgramCache]: Analyzing trace with hash 2050048093, now seen corresponding path program 1 times [2018-12-09 03:30:57,861 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:57,861 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:57,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:57,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:57,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:57,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:57,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:57,934 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:57,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:30:57,934 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:30:57,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:30:57,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:30:57,935 INFO L87 Difference]: Start difference. First operand 190 states and 257 transitions. Second operand 5 states. [2018-12-09 03:30:58,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:58,171 INFO L93 Difference]: Finished difference Result 389 states and 542 transitions. [2018-12-09 03:30:58,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:30:58,171 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:30:58,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:58,173 INFO L225 Difference]: With dead ends: 389 [2018-12-09 03:30:58,173 INFO L226 Difference]: Without dead ends: 220 [2018-12-09 03:30:58,173 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:58,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-12-09 03:30:58,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 190. [2018-12-09 03:30:58,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-09 03:30:58,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 256 transitions. [2018-12-09 03:30:58,185 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 256 transitions. Word has length 105 [2018-12-09 03:30:58,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:58,185 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 256 transitions. [2018-12-09 03:30:58,185 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:30:58,185 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 256 transitions. [2018-12-09 03:30:58,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:58,186 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:58,186 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:58,186 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:58,186 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:58,186 INFO L82 PathProgramCache]: Analyzing trace with hash 907545627, now seen corresponding path program 1 times [2018-12-09 03:30:58,186 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:58,186 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:58,187 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:58,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:58,187 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:58,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:58,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:58,234 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:58,234 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:30:58,235 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:30:58,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:30:58,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:30:58,235 INFO L87 Difference]: Start difference. First operand 190 states and 256 transitions. Second operand 5 states. [2018-12-09 03:30:58,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:58,467 INFO L93 Difference]: Finished difference Result 387 states and 536 transitions. [2018-12-09 03:30:58,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:30:58,467 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:30:58,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:58,468 INFO L225 Difference]: With dead ends: 387 [2018-12-09 03:30:58,468 INFO L226 Difference]: Without dead ends: 218 [2018-12-09 03:30:58,469 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:58,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-12-09 03:30:58,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 190. [2018-12-09 03:30:58,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-09 03:30:58,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 255 transitions. [2018-12-09 03:30:58,480 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 255 transitions. Word has length 105 [2018-12-09 03:30:58,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:58,480 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 255 transitions. [2018-12-09 03:30:58,480 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:30:58,480 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 255 transitions. [2018-12-09 03:30:58,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:58,481 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:58,481 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:58,482 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:58,482 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:58,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1147785373, now seen corresponding path program 1 times [2018-12-09 03:30:58,482 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:58,482 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:58,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:58,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:58,483 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:58,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:58,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:58,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:58,527 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:30:58,528 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:30:58,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:30:58,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:30:58,528 INFO L87 Difference]: Start difference. First operand 190 states and 255 transitions. Second operand 5 states. [2018-12-09 03:30:58,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:58,738 INFO L93 Difference]: Finished difference Result 407 states and 568 transitions. [2018-12-09 03:30:58,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:30:58,739 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:30:58,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:58,740 INFO L225 Difference]: With dead ends: 407 [2018-12-09 03:30:58,741 INFO L226 Difference]: Without dead ends: 238 [2018-12-09 03:30:58,741 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:58,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-12-09 03:30:58,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 190. [2018-12-09 03:30:58,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-09 03:30:58,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 254 transitions. [2018-12-09 03:30:58,759 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 254 transitions. Word has length 105 [2018-12-09 03:30:58,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:58,759 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 254 transitions. [2018-12-09 03:30:58,759 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:30:58,759 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 254 transitions. [2018-12-09 03:30:58,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:58,761 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:58,761 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:58,763 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:58,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:58,763 INFO L82 PathProgramCache]: Analyzing trace with hash 1986819035, now seen corresponding path program 1 times [2018-12-09 03:30:58,763 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:58,763 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:58,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:58,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:58,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:58,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:58,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:58,821 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:58,821 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:30:58,821 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:30:58,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:30:58,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:30:58,822 INFO L87 Difference]: Start difference. First operand 190 states and 254 transitions. Second operand 5 states. [2018-12-09 03:30:59,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,078 INFO L93 Difference]: Finished difference Result 405 states and 562 transitions. [2018-12-09 03:30:59,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:30:59,079 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:30:59,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,080 INFO L225 Difference]: With dead ends: 405 [2018-12-09 03:30:59,080 INFO L226 Difference]: Without dead ends: 236 [2018-12-09 03:30:59,081 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:59,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-12-09 03:30:59,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 190. [2018-12-09 03:30:59,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-12-09 03:30:59,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 253 transitions. [2018-12-09 03:30:59,093 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 253 transitions. Word has length 105 [2018-12-09 03:30:59,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:59,094 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 253 transitions. [2018-12-09 03:30:59,094 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:30:59,094 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 253 transitions. [2018-12-09 03:30:59,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:59,095 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:59,095 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:59,095 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:59,095 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:59,095 INFO L82 PathProgramCache]: Analyzing trace with hash 2013884637, now seen corresponding path program 1 times [2018-12-09 03:30:59,095 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:59,095 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:59,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,096 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:59,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:59,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:59,138 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:59,138 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 03:30:59,138 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 03:30:59,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 03:30:59,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 03:30:59,139 INFO L87 Difference]: Start difference. First operand 190 states and 253 transitions. Second operand 4 states. [2018-12-09 03:30:59,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,304 INFO L93 Difference]: Finished difference Result 518 states and 714 transitions. [2018-12-09 03:30:59,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 03:30:59,305 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2018-12-09 03:30:59,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,306 INFO L225 Difference]: With dead ends: 518 [2018-12-09 03:30:59,306 INFO L226 Difference]: Without dead ends: 350 [2018-12-09 03:30:59,307 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 03:30:59,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states. [2018-12-09 03:30:59,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 345. [2018-12-09 03:30:59,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2018-12-09 03:30:59,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 459 transitions. [2018-12-09 03:30:59,328 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 459 transitions. Word has length 105 [2018-12-09 03:30:59,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:59,328 INFO L480 AbstractCegarLoop]: Abstraction has 345 states and 459 transitions. [2018-12-09 03:30:59,328 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 03:30:59,328 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 459 transitions. [2018-12-09 03:30:59,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:59,329 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:59,329 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:59,329 INFO L423 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:59,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:59,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1143453794, now seen corresponding path program 1 times [2018-12-09 03:30:59,329 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:59,330 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:59,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,330 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:59,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:59,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:59,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:59,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 03:30:59,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 03:30:59,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 03:30:59,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:59,373 INFO L87 Difference]: Start difference. First operand 345 states and 459 transitions. Second operand 6 states. [2018-12-09 03:30:59,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,405 INFO L93 Difference]: Finished difference Result 684 states and 934 transitions. [2018-12-09 03:30:59,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 03:30:59,406 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2018-12-09 03:30:59,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,407 INFO L225 Difference]: With dead ends: 684 [2018-12-09 03:30:59,407 INFO L226 Difference]: Without dead ends: 361 [2018-12-09 03:30:59,408 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:30:59,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2018-12-09 03:30:59,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 350. [2018-12-09 03:30:59,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-12-09 03:30:59,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 463 transitions. [2018-12-09 03:30:59,425 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 463 transitions. Word has length 105 [2018-12-09 03:30:59,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:59,425 INFO L480 AbstractCegarLoop]: Abstraction has 350 states and 463 transitions. [2018-12-09 03:30:59,425 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 03:30:59,425 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 463 transitions. [2018-12-09 03:30:59,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:59,426 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:59,426 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:59,426 INFO L423 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:59,426 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:59,427 INFO L82 PathProgramCache]: Analyzing trace with hash -1560850400, now seen corresponding path program 1 times [2018-12-09 03:30:59,427 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:59,427 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:59,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:59,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:59,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:59,473 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:59,473 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 03:30:59,473 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 03:30:59,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 03:30:59,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 03:30:59,473 INFO L87 Difference]: Start difference. First operand 350 states and 463 transitions. Second operand 4 states. [2018-12-09 03:30:59,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,616 INFO L93 Difference]: Finished difference Result 993 states and 1359 transitions. [2018-12-09 03:30:59,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 03:30:59,617 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 105 [2018-12-09 03:30:59,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,619 INFO L225 Difference]: With dead ends: 993 [2018-12-09 03:30:59,619 INFO L226 Difference]: Without dead ends: 665 [2018-12-09 03:30:59,620 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 03:30:59,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 665 states. [2018-12-09 03:30:59,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 665 to 658. [2018-12-09 03:30:59,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 658 states. [2018-12-09 03:30:59,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 658 states to 658 states and 868 transitions. [2018-12-09 03:30:59,649 INFO L78 Accepts]: Start accepts. Automaton has 658 states and 868 transitions. Word has length 105 [2018-12-09 03:30:59,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:59,649 INFO L480 AbstractCegarLoop]: Abstraction has 658 states and 868 transitions. [2018-12-09 03:30:59,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 03:30:59,649 INFO L276 IsEmpty]: Start isEmpty. Operand 658 states and 868 transitions. [2018-12-09 03:30:59,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:59,650 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:59,650 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:59,650 INFO L423 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:59,651 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:59,651 INFO L82 PathProgramCache]: Analyzing trace with hash 827632703, now seen corresponding path program 1 times [2018-12-09 03:30:59,651 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:59,651 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:59,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:59,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:59,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:59,683 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:59,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 03:30:59,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 03:30:59,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 03:30:59,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:59,684 INFO L87 Difference]: Start difference. First operand 658 states and 868 transitions. Second operand 6 states. [2018-12-09 03:30:59,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,738 INFO L93 Difference]: Finished difference Result 1320 states and 1785 transitions. [2018-12-09 03:30:59,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 03:30:59,738 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2018-12-09 03:30:59,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,742 INFO L225 Difference]: With dead ends: 1320 [2018-12-09 03:30:59,742 INFO L226 Difference]: Without dead ends: 684 [2018-12-09 03:30:59,743 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:30:59,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 684 states. [2018-12-09 03:30:59,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 684 to 668. [2018-12-09 03:30:59,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 668 states. [2018-12-09 03:30:59,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 668 states to 668 states and 876 transitions. [2018-12-09 03:30:59,773 INFO L78 Accepts]: Start accepts. Automaton has 668 states and 876 transitions. Word has length 105 [2018-12-09 03:30:59,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:59,774 INFO L480 AbstractCegarLoop]: Abstraction has 668 states and 876 transitions. [2018-12-09 03:30:59,774 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 03:30:59,774 INFO L276 IsEmpty]: Start isEmpty. Operand 668 states and 876 transitions. [2018-12-09 03:30:59,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:59,774 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:59,774 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:59,774 INFO L423 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:59,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:59,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1703651709, now seen corresponding path program 1 times [2018-12-09 03:30:59,775 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:59,775 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:59,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:59,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:59,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:59,821 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:59,821 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 03:30:59,821 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 03:30:59,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 03:30:59,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:59,821 INFO L87 Difference]: Start difference. First operand 668 states and 876 transitions. Second operand 6 states. [2018-12-09 03:30:59,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,862 INFO L93 Difference]: Finished difference Result 1354 states and 1822 transitions. [2018-12-09 03:30:59,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 03:30:59,862 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2018-12-09 03:30:59,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,865 INFO L225 Difference]: With dead ends: 1354 [2018-12-09 03:30:59,866 INFO L226 Difference]: Without dead ends: 708 [2018-12-09 03:30:59,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:30:59,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 708 states. [2018-12-09 03:30:59,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 708 to 688. [2018-12-09 03:30:59,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 688 states. [2018-12-09 03:30:59,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 688 states to 688 states and 896 transitions. [2018-12-09 03:30:59,904 INFO L78 Accepts]: Start accepts. Automaton has 688 states and 896 transitions. Word has length 105 [2018-12-09 03:30:59,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:30:59,904 INFO L480 AbstractCegarLoop]: Abstraction has 688 states and 896 transitions. [2018-12-09 03:30:59,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 03:30:59,904 INFO L276 IsEmpty]: Start isEmpty. Operand 688 states and 896 transitions. [2018-12-09 03:30:59,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:30:59,905 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:30:59,905 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:30:59,905 INFO L423 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:30:59,905 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:30:59,905 INFO L82 PathProgramCache]: Analyzing trace with hash -1697829249, now seen corresponding path program 1 times [2018-12-09 03:30:59,905 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:30:59,905 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:30:59,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:30:59,906 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:30:59,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:30:59,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:30:59,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:30:59,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-09 03:30:59,941 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 03:30:59,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 03:30:59,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:30:59,942 INFO L87 Difference]: Start difference. First operand 688 states and 896 transitions. Second operand 6 states. [2018-12-09 03:30:59,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:30:59,990 INFO L93 Difference]: Finished difference Result 1382 states and 1842 transitions. [2018-12-09 03:30:59,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 03:30:59,990 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 105 [2018-12-09 03:30:59,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:30:59,992 INFO L225 Difference]: With dead ends: 1382 [2018-12-09 03:30:59,992 INFO L226 Difference]: Without dead ends: 716 [2018-12-09 03:30:59,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:30:59,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 716 states. [2018-12-09 03:31:00,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 716 to 708. [2018-12-09 03:31:00,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 708 states. [2018-12-09 03:31:00,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 708 states to 708 states and 916 transitions. [2018-12-09 03:31:00,022 INFO L78 Accepts]: Start accepts. Automaton has 708 states and 916 transitions. Word has length 105 [2018-12-09 03:31:00,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:00,023 INFO L480 AbstractCegarLoop]: Abstraction has 708 states and 916 transitions. [2018-12-09 03:31:00,023 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 03:31:00,023 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 916 transitions. [2018-12-09 03:31:00,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:00,023 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:00,023 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:00,023 INFO L423 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:00,023 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:00,024 INFO L82 PathProgramCache]: Analyzing trace with hash -2092196035, now seen corresponding path program 1 times [2018-12-09 03:31:00,024 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:00,024 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:00,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:00,024 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:00,024 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:00,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:00,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:00,078 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:00,078 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:31:00,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:31:00,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:31:00,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:31:00,079 INFO L87 Difference]: Start difference. First operand 708 states and 916 transitions. Second operand 5 states. [2018-12-09 03:31:00,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:00,488 INFO L93 Difference]: Finished difference Result 1699 states and 2243 transitions. [2018-12-09 03:31:00,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 03:31:00,488 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:31:00,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:00,492 INFO L225 Difference]: With dead ends: 1699 [2018-12-09 03:31:00,492 INFO L226 Difference]: Without dead ends: 1014 [2018-12-09 03:31:00,494 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 03:31:00,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states. [2018-12-09 03:31:00,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 934. [2018-12-09 03:31:00,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 934 states. [2018-12-09 03:31:00,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 934 states to 934 states and 1180 transitions. [2018-12-09 03:31:00,542 INFO L78 Accepts]: Start accepts. Automaton has 934 states and 1180 transitions. Word has length 105 [2018-12-09 03:31:00,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:00,542 INFO L480 AbstractCegarLoop]: Abstraction has 934 states and 1180 transitions. [2018-12-09 03:31:00,542 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:31:00,542 INFO L276 IsEmpty]: Start isEmpty. Operand 934 states and 1180 transitions. [2018-12-09 03:31:00,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:00,543 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:00,543 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:00,543 INFO L423 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:00,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:00,543 INFO L82 PathProgramCache]: Analyzing trace with hash -1817436421, now seen corresponding path program 1 times [2018-12-09 03:31:00,543 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:00,543 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:00,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:00,544 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:00,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:00,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:00,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:00,602 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:00,602 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:31:00,602 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:31:00,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:31:00,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:31:00,603 INFO L87 Difference]: Start difference. First operand 934 states and 1180 transitions. Second operand 5 states. [2018-12-09 03:31:00,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:00,805 INFO L93 Difference]: Finished difference Result 1845 states and 2342 transitions. [2018-12-09 03:31:00,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:31:00,806 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:31:00,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:00,808 INFO L225 Difference]: With dead ends: 1845 [2018-12-09 03:31:00,808 INFO L226 Difference]: Without dead ends: 934 [2018-12-09 03:31:00,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:31:00,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 934 states. [2018-12-09 03:31:00,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 934 to 934. [2018-12-09 03:31:00,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 934 states. [2018-12-09 03:31:00,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 934 states to 934 states and 1170 transitions. [2018-12-09 03:31:00,845 INFO L78 Accepts]: Start accepts. Automaton has 934 states and 1170 transitions. Word has length 105 [2018-12-09 03:31:00,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:00,845 INFO L480 AbstractCegarLoop]: Abstraction has 934 states and 1170 transitions. [2018-12-09 03:31:00,845 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:31:00,845 INFO L276 IsEmpty]: Start isEmpty. Operand 934 states and 1170 transitions. [2018-12-09 03:31:00,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:00,846 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:00,846 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:00,846 INFO L423 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:00,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:00,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1115836547, now seen corresponding path program 1 times [2018-12-09 03:31:00,846 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:00,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:00,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:00,847 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:00,847 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:00,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:00,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:00,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:00,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:31:00,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:31:00,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:31:00,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:31:00,884 INFO L87 Difference]: Start difference. First operand 934 states and 1170 transitions. Second operand 5 states. [2018-12-09 03:31:01,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:01,111 INFO L93 Difference]: Finished difference Result 1845 states and 2322 transitions. [2018-12-09 03:31:01,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-09 03:31:01,111 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:31:01,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:01,114 INFO L225 Difference]: With dead ends: 1845 [2018-12-09 03:31:01,114 INFO L226 Difference]: Without dead ends: 934 [2018-12-09 03:31:01,115 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:31:01,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 934 states. [2018-12-09 03:31:01,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 934 to 934. [2018-12-09 03:31:01,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 934 states. [2018-12-09 03:31:01,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 934 states to 934 states and 1160 transitions. [2018-12-09 03:31:01,151 INFO L78 Accepts]: Start accepts. Automaton has 934 states and 1160 transitions. Word has length 105 [2018-12-09 03:31:01,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:01,152 INFO L480 AbstractCegarLoop]: Abstraction has 934 states and 1160 transitions. [2018-12-09 03:31:01,152 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:31:01,152 INFO L276 IsEmpty]: Start isEmpty. Operand 934 states and 1160 transitions. [2018-12-09 03:31:01,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:01,152 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:01,152 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:01,153 INFO L423 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:01,153 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:01,153 INFO L82 PathProgramCache]: Analyzing trace with hash -1093204293, now seen corresponding path program 1 times [2018-12-09 03:31:01,153 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:01,153 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:01,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:01,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:01,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:01,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:01,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:01,206 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:01,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:31:01,206 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:31:01,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:31:01,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:31:01,207 INFO L87 Difference]: Start difference. First operand 934 states and 1160 transitions. Second operand 5 states. [2018-12-09 03:31:01,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:01,514 INFO L93 Difference]: Finished difference Result 1978 states and 2497 transitions. [2018-12-09 03:31:01,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 03:31:01,514 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:31:01,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:01,516 INFO L225 Difference]: With dead ends: 1978 [2018-12-09 03:31:01,516 INFO L226 Difference]: Without dead ends: 1067 [2018-12-09 03:31:01,518 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:31:01,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1067 states. [2018-12-09 03:31:01,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1067 to 1066. [2018-12-09 03:31:01,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1066 states. [2018-12-09 03:31:01,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1066 states to 1066 states and 1313 transitions. [2018-12-09 03:31:01,558 INFO L78 Accepts]: Start accepts. Automaton has 1066 states and 1313 transitions. Word has length 105 [2018-12-09 03:31:01,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:01,559 INFO L480 AbstractCegarLoop]: Abstraction has 1066 states and 1313 transitions. [2018-12-09 03:31:01,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:31:01,559 INFO L276 IsEmpty]: Start isEmpty. Operand 1066 states and 1313 transitions. [2018-12-09 03:31:01,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:01,560 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:01,560 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:01,560 INFO L423 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:01,560 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:01,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1602677383, now seen corresponding path program 1 times [2018-12-09 03:31:01,560 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:01,560 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:01,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:01,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:01,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:01,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:01,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:01,612 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:01,612 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:31:01,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:31:01,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:31:01,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:31:01,613 INFO L87 Difference]: Start difference. First operand 1066 states and 1313 transitions. Second operand 5 states. [2018-12-09 03:31:01,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:01,909 INFO L93 Difference]: Finished difference Result 2310 states and 2964 transitions. [2018-12-09 03:31:01,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-09 03:31:01,909 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:31:01,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:01,912 INFO L225 Difference]: With dead ends: 2310 [2018-12-09 03:31:01,912 INFO L226 Difference]: Without dead ends: 1266 [2018-12-09 03:31:01,914 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:31:01,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1266 states. [2018-12-09 03:31:01,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1266 to 1135. [2018-12-09 03:31:01,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1135 states. [2018-12-09 03:31:01,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1135 states to 1135 states and 1366 transitions. [2018-12-09 03:31:01,960 INFO L78 Accepts]: Start accepts. Automaton has 1135 states and 1366 transitions. Word has length 105 [2018-12-09 03:31:01,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:01,960 INFO L480 AbstractCegarLoop]: Abstraction has 1135 states and 1366 transitions. [2018-12-09 03:31:01,961 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:31:01,961 INFO L276 IsEmpty]: Start isEmpty. Operand 1135 states and 1366 transitions. [2018-12-09 03:31:01,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:01,961 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:01,961 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:01,961 INFO L423 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:01,961 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:01,961 INFO L82 PathProgramCache]: Analyzing trace with hash 320550651, now seen corresponding path program 1 times [2018-12-09 03:31:01,961 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:01,961 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:01,962 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:01,962 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:01,962 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:01,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:01,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:01,991 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:01,991 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-09 03:31:01,991 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-09 03:31:01,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-09 03:31:01,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-09 03:31:01,991 INFO L87 Difference]: Start difference. First operand 1135 states and 1366 transitions. Second operand 5 states. [2018-12-09 03:31:02,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:02,347 INFO L93 Difference]: Finished difference Result 2657 states and 3411 transitions. [2018-12-09 03:31:02,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 03:31:02,347 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 105 [2018-12-09 03:31:02,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:02,352 INFO L225 Difference]: With dead ends: 2657 [2018-12-09 03:31:02,352 INFO L226 Difference]: Without dead ends: 1544 [2018-12-09 03:31:02,354 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-09 03:31:02,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1544 states. [2018-12-09 03:31:02,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1544 to 1321. [2018-12-09 03:31:02,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1321 states. [2018-12-09 03:31:02,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1321 states to 1321 states and 1563 transitions. [2018-12-09 03:31:02,428 INFO L78 Accepts]: Start accepts. Automaton has 1321 states and 1563 transitions. Word has length 105 [2018-12-09 03:31:02,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:02,428 INFO L480 AbstractCegarLoop]: Abstraction has 1321 states and 1563 transitions. [2018-12-09 03:31:02,428 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-09 03:31:02,428 INFO L276 IsEmpty]: Start isEmpty. Operand 1321 states and 1563 transitions. [2018-12-09 03:31:02,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-12-09 03:31:02,429 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:02,429 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:02,429 INFO L423 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:02,430 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:02,430 INFO L82 PathProgramCache]: Analyzing trace with hash 382590265, now seen corresponding path program 1 times [2018-12-09 03:31:02,430 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:02,430 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:02,430 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:02,431 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:02,431 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:02,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:02,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:02,451 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:02,452 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 03:31:02,452 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 03:31:02,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 03:31:02,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:02,452 INFO L87 Difference]: Start difference. First operand 1321 states and 1563 transitions. Second operand 3 states. [2018-12-09 03:31:02,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:02,568 INFO L93 Difference]: Finished difference Result 3779 states and 4530 transitions. [2018-12-09 03:31:02,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 03:31:02,568 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 105 [2018-12-09 03:31:02,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:02,573 INFO L225 Difference]: With dead ends: 3779 [2018-12-09 03:31:02,573 INFO L226 Difference]: Without dead ends: 2483 [2018-12-09 03:31:02,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:02,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2483 states. [2018-12-09 03:31:02,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2483 to 2480. [2018-12-09 03:31:02,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2480 states. [2018-12-09 03:31:02,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2480 states to 2480 states and 2957 transitions. [2018-12-09 03:31:02,678 INFO L78 Accepts]: Start accepts. Automaton has 2480 states and 2957 transitions. Word has length 105 [2018-12-09 03:31:02,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:02,678 INFO L480 AbstractCegarLoop]: Abstraction has 2480 states and 2957 transitions. [2018-12-09 03:31:02,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 03:31:02,678 INFO L276 IsEmpty]: Start isEmpty. Operand 2480 states and 2957 transitions. [2018-12-09 03:31:02,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-12-09 03:31:02,679 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:02,679 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:02,679 INFO L423 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:02,679 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:02,679 INFO L82 PathProgramCache]: Analyzing trace with hash -604850563, now seen corresponding path program 1 times [2018-12-09 03:31:02,679 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:02,679 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:02,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:02,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:02,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:02,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:02,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-09 03:31:02,697 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:02,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 03:31:02,697 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 03:31:02,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 03:31:02,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:02,698 INFO L87 Difference]: Start difference. First operand 2480 states and 2957 transitions. Second operand 3 states. [2018-12-09 03:31:02,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:02,891 INFO L93 Difference]: Finished difference Result 7221 states and 8975 transitions. [2018-12-09 03:31:02,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 03:31:02,891 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 106 [2018-12-09 03:31:02,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:02,902 INFO L225 Difference]: With dead ends: 7221 [2018-12-09 03:31:02,902 INFO L226 Difference]: Without dead ends: 4772 [2018-12-09 03:31:02,906 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:02,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4772 states. [2018-12-09 03:31:03,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4772 to 4766. [2018-12-09 03:31:03,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4766 states. [2018-12-09 03:31:03,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4766 states to 4766 states and 5802 transitions. [2018-12-09 03:31:03,131 INFO L78 Accepts]: Start accepts. Automaton has 4766 states and 5802 transitions. Word has length 106 [2018-12-09 03:31:03,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:03,131 INFO L480 AbstractCegarLoop]: Abstraction has 4766 states and 5802 transitions. [2018-12-09 03:31:03,131 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 03:31:03,131 INFO L276 IsEmpty]: Start isEmpty. Operand 4766 states and 5802 transitions. [2018-12-09 03:31:03,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-09 03:31:03,133 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:03,133 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:03,133 INFO L423 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:03,133 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:03,133 INFO L82 PathProgramCache]: Analyzing trace with hash 1287801291, now seen corresponding path program 1 times [2018-12-09 03:31:03,133 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:03,133 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:03,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:03,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:03,134 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:03,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:03,163 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-12-09 03:31:03,164 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:03,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-09 03:31:03,164 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-09 03:31:03,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-09 03:31:03,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 03:31:03,164 INFO L87 Difference]: Start difference. First operand 4766 states and 5802 transitions. Second operand 4 states. [2018-12-09 03:31:03,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:03,418 INFO L93 Difference]: Finished difference Result 8489 states and 10299 transitions. [2018-12-09 03:31:03,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-09 03:31:03,418 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 127 [2018-12-09 03:31:03,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:03,427 INFO L225 Difference]: With dead ends: 8489 [2018-12-09 03:31:03,427 INFO L226 Difference]: Without dead ends: 3748 [2018-12-09 03:31:03,434 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-09 03:31:03,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3748 states. [2018-12-09 03:31:03,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3748 to 3701. [2018-12-09 03:31:03,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3701 states. [2018-12-09 03:31:03,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3701 states to 3701 states and 4480 transitions. [2018-12-09 03:31:03,603 INFO L78 Accepts]: Start accepts. Automaton has 3701 states and 4480 transitions. Word has length 127 [2018-12-09 03:31:03,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:03,603 INFO L480 AbstractCegarLoop]: Abstraction has 3701 states and 4480 transitions. [2018-12-09 03:31:03,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-09 03:31:03,603 INFO L276 IsEmpty]: Start isEmpty. Operand 3701 states and 4480 transitions. [2018-12-09 03:31:03,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-12-09 03:31:03,604 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:03,604 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:03,604 INFO L423 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:03,605 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:03,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1359803063, now seen corresponding path program 1 times [2018-12-09 03:31:03,605 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:03,605 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:03,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:03,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:03,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:03,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:03,628 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-12-09 03:31:03,628 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:03,628 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 03:31:03,629 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 03:31:03,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 03:31:03,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:03,629 INFO L87 Difference]: Start difference. First operand 3701 states and 4480 transitions. Second operand 3 states. [2018-12-09 03:31:03,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:03,970 INFO L93 Difference]: Finished difference Result 10969 states and 13561 transitions. [2018-12-09 03:31:03,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 03:31:03,970 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 127 [2018-12-09 03:31:03,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:03,987 INFO L225 Difference]: With dead ends: 10969 [2018-12-09 03:31:03,987 INFO L226 Difference]: Without dead ends: 5505 [2018-12-09 03:31:03,998 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:04,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5505 states. [2018-12-09 03:31:04,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5505 to 5505. [2018-12-09 03:31:04,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5505 states. [2018-12-09 03:31:04,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5505 states to 5505 states and 6681 transitions. [2018-12-09 03:31:04,231 INFO L78 Accepts]: Start accepts. Automaton has 5505 states and 6681 transitions. Word has length 127 [2018-12-09 03:31:04,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:04,232 INFO L480 AbstractCegarLoop]: Abstraction has 5505 states and 6681 transitions. [2018-12-09 03:31:04,232 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 03:31:04,232 INFO L276 IsEmpty]: Start isEmpty. Operand 5505 states and 6681 transitions. [2018-12-09 03:31:04,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2018-12-09 03:31:04,236 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:04,236 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:04,236 INFO L423 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:04,236 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:04,236 INFO L82 PathProgramCache]: Analyzing trace with hash 591261288, now seen corresponding path program 1 times [2018-12-09 03:31:04,236 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:04,236 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:04,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:04,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:04,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:04,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:04,279 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-12-09 03:31:04,279 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-09 03:31:04,279 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-09 03:31:04,279 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-09 03:31:04,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-09 03:31:04,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:04,280 INFO L87 Difference]: Start difference. First operand 5505 states and 6681 transitions. Second operand 3 states. [2018-12-09 03:31:04,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:04,732 INFO L93 Difference]: Finished difference Result 16191 states and 20284 transitions. [2018-12-09 03:31:04,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-09 03:31:04,733 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 180 [2018-12-09 03:31:04,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:04,752 INFO L225 Difference]: With dead ends: 16191 [2018-12-09 03:31:04,752 INFO L226 Difference]: Without dead ends: 10711 [2018-12-09 03:31:04,761 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-09 03:31:04,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10711 states. [2018-12-09 03:31:05,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10711 to 10708. [2018-12-09 03:31:05,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10708 states. [2018-12-09 03:31:05,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10708 states to 10708 states and 13192 transitions. [2018-12-09 03:31:05,208 INFO L78 Accepts]: Start accepts. Automaton has 10708 states and 13192 transitions. Word has length 180 [2018-12-09 03:31:05,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:05,208 INFO L480 AbstractCegarLoop]: Abstraction has 10708 states and 13192 transitions. [2018-12-09 03:31:05,208 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-09 03:31:05,208 INFO L276 IsEmpty]: Start isEmpty. Operand 10708 states and 13192 transitions. [2018-12-09 03:31:05,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-12-09 03:31:05,211 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:05,212 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:05,212 INFO L423 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:05,212 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:05,212 INFO L82 PathProgramCache]: Analyzing trace with hash -598185276, now seen corresponding path program 1 times [2018-12-09 03:31:05,212 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:05,212 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:05,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:05,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:05,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:05,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:05,261 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-12-09 03:31:05,261 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 03:31:05,261 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 03:31:05,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:05,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:05,334 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 03:31:05,363 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-12-09 03:31:05,378 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 03:31:05,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2018-12-09 03:31:05,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-09 03:31:05,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-09 03:31:05,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-09 03:31:05,380 INFO L87 Difference]: Start difference. First operand 10708 states and 13192 transitions. Second operand 7 states. [2018-12-09 03:31:06,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:06,772 INFO L93 Difference]: Finished difference Result 29811 states and 38991 transitions. [2018-12-09 03:31:06,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 03:31:06,773 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 181 [2018-12-09 03:31:06,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:06,815 INFO L225 Difference]: With dead ends: 29811 [2018-12-09 03:31:06,815 INFO L226 Difference]: Without dead ends: 19132 [2018-12-09 03:31:06,837 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 183 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-12-09 03:31:06,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19132 states. [2018-12-09 03:31:07,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19132 to 19129. [2018-12-09 03:31:07,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19129 states. [2018-12-09 03:31:07,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19129 states to 19129 states and 23378 transitions. [2018-12-09 03:31:07,763 INFO L78 Accepts]: Start accepts. Automaton has 19129 states and 23378 transitions. Word has length 181 [2018-12-09 03:31:07,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:07,763 INFO L480 AbstractCegarLoop]: Abstraction has 19129 states and 23378 transitions. [2018-12-09 03:31:07,763 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-09 03:31:07,763 INFO L276 IsEmpty]: Start isEmpty. Operand 19129 states and 23378 transitions. [2018-12-09 03:31:07,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-12-09 03:31:07,772 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:07,772 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:07,773 INFO L423 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:07,773 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:07,773 INFO L82 PathProgramCache]: Analyzing trace with hash -1950754852, now seen corresponding path program 1 times [2018-12-09 03:31:07,773 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:07,773 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:07,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:07,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:07,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:07,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:07,815 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2018-12-09 03:31:07,815 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 03:31:07,815 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 03:31:07,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:07,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:07,900 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 03:31:07,936 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 107 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-12-09 03:31:07,962 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 03:31:07,962 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2018-12-09 03:31:07,963 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-09 03:31:07,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-09 03:31:07,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-09 03:31:07,963 INFO L87 Difference]: Start difference. First operand 19129 states and 23378 transitions. Second operand 6 states. [2018-12-09 03:31:10,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:10,552 INFO L93 Difference]: Finished difference Result 60522 states and 76789 transitions. [2018-12-09 03:31:10,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-09 03:31:10,552 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 251 [2018-12-09 03:31:10,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:10,666 INFO L225 Difference]: With dead ends: 60522 [2018-12-09 03:31:10,666 INFO L226 Difference]: Without dead ends: 41426 [2018-12-09 03:31:10,713 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-12-09 03:31:10,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41426 states. [2018-12-09 03:31:12,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41426 to 41408. [2018-12-09 03:31:12,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41408 states. [2018-12-09 03:31:12,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41408 states to 41408 states and 50265 transitions. [2018-12-09 03:31:12,930 INFO L78 Accepts]: Start accepts. Automaton has 41408 states and 50265 transitions. Word has length 251 [2018-12-09 03:31:12,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:12,930 INFO L480 AbstractCegarLoop]: Abstraction has 41408 states and 50265 transitions. [2018-12-09 03:31:12,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-09 03:31:12,930 INFO L276 IsEmpty]: Start isEmpty. Operand 41408 states and 50265 transitions. [2018-12-09 03:31:12,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2018-12-09 03:31:12,953 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:12,953 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:12,953 INFO L423 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:12,953 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:12,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1635890964, now seen corresponding path program 1 times [2018-12-09 03:31:12,953 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:12,953 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:12,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:12,954 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:12,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:12,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:13,023 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 20 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-12-09 03:31:13,023 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-12-09 03:31:13,023 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-12-09 03:31:13,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:13,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-09 03:31:13,095 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-12-09 03:31:13,130 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 113 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2018-12-09 03:31:13,148 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-12-09 03:31:13,149 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2018-12-09 03:31:13,149 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-12-09 03:31:13,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-12-09 03:31:13,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-12-09 03:31:13,149 INFO L87 Difference]: Start difference. First operand 41408 states and 50265 transitions. Second operand 12 states. [2018-12-09 03:31:14,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-09 03:31:14,227 INFO L93 Difference]: Finished difference Result 56278 states and 67975 transitions. [2018-12-09 03:31:14,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-09 03:31:14,227 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 230 [2018-12-09 03:31:14,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-09 03:31:14,266 INFO L225 Difference]: With dead ends: 56278 [2018-12-09 03:31:14,266 INFO L226 Difference]: Without dead ends: 14920 [2018-12-09 03:31:14,307 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 228 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2018-12-09 03:31:14,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14920 states. [2018-12-09 03:31:14,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14920 to 14024. [2018-12-09 03:31:14,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14024 states. [2018-12-09 03:31:14,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14024 states to 14024 states and 16031 transitions. [2018-12-09 03:31:14,958 INFO L78 Accepts]: Start accepts. Automaton has 14024 states and 16031 transitions. Word has length 230 [2018-12-09 03:31:14,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-09 03:31:14,958 INFO L480 AbstractCegarLoop]: Abstraction has 14024 states and 16031 transitions. [2018-12-09 03:31:14,958 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-12-09 03:31:14,958 INFO L276 IsEmpty]: Start isEmpty. Operand 14024 states and 16031 transitions. [2018-12-09 03:31:14,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2018-12-09 03:31:14,968 INFO L394 BasicCegarLoop]: Found error trace [2018-12-09 03:31:14,969 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-09 03:31:14,969 INFO L423 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-09 03:31:14,969 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-12-09 03:31:14,969 INFO L82 PathProgramCache]: Analyzing trace with hash -975310852, now seen corresponding path program 1 times [2018-12-09 03:31:14,969 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-09 03:31:14,969 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-09 03:31:14,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:14,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-09 03:31:14,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-09 03:31:14,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 03:31:14,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-09 03:31:15,052 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-09 03:31:15,168 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 09.12 03:31:15 BoogieIcfgContainer [2018-12-09 03:31:15,168 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-09 03:31:15,169 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-09 03:31:15,169 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-09 03:31:15,169 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-09 03:31:15,169 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.12 03:30:56" (3/4) ... [2018-12-09 03:31:15,171 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-09 03:31:15,277 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_aaddd2da-a880-40ff-a5e8-968e8fc7c66e/bin-2019/uautomizer/witness.graphml [2018-12-09 03:31:15,277 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-09 03:31:15,278 INFO L168 Benchmark]: Toolchain (without parser) took 18988.91 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 960.3 MB in the beginning and 774.1 MB in the end (delta: 186.2 MB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,278 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-09 03:31:15,279 INFO L168 Benchmark]: CACSL2BoogieTranslator took 169.37 ms. Allocated memory is still 1.0 GB. Free memory was 960.3 MB in the beginning and 944.2 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,279 INFO L168 Benchmark]: Boogie Procedure Inliner took 44.30 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 944.2 MB in the beginning and 1.1 GB in the end (delta: -187.7 MB). Peak memory consumption was 13.3 MB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,279 INFO L168 Benchmark]: Boogie Preprocessor took 22.13 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,279 INFO L168 Benchmark]: RCFGBuilder took 318.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 39.0 MB). Peak memory consumption was 39.0 MB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,279 INFO L168 Benchmark]: TraceAbstraction took 18323.15 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.1 GB in the beginning and 806.1 MB in the end (delta: 283.4 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,279 INFO L168 Benchmark]: Witness Printer took 108.53 ms. Allocated memory is still 2.6 GB. Free memory was 806.1 MB in the beginning and 774.1 MB in the end (delta: 32.0 MB). Peak memory consumption was 32.0 MB. Max. memory is 11.5 GB. [2018-12-09 03:31:15,280 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 982.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 169.37 ms. Allocated memory is still 1.0 GB. Free memory was 960.3 MB in the beginning and 944.2 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 44.30 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 944.2 MB in the beginning and 1.1 GB in the end (delta: -187.7 MB). Peak memory consumption was 13.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 22.13 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 318.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 39.0 MB). Peak memory consumption was 39.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18323.15 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.1 GB in the beginning and 806.1 MB in the end (delta: 283.4 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 108.53 ms. Allocated memory is still 2.6 GB. Free memory was 806.1 MB in the beginning and 774.1 MB in the end (delta: 32.0 MB). Peak memory consumption was 32.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int m_i ; [L24] int t1_i ; [L25] int t2_i ; [L26] int t3_i ; [L27] int M_E = 2; [L28] int T1_E = 2; [L29] int T2_E = 2; [L30] int T3_E = 2; [L31] int E_1 = 2; [L32] int E_2 = 2; [L33] int E_3 = 2; VAL [\old(E_1)=18, \old(E_2)=5, \old(E_3)=21, \old(M_E)=15, \old(m_i)=7, \old(m_pc)=13, \old(m_st)=14, \old(T1_E)=3, \old(t1_i)=17, \old(t1_pc)=9, \old(t1_st)=4, \old(T2_E)=16, \old(t2_i)=6, \old(t2_pc)=10, \old(t2_st)=11, \old(T3_E)=19, \old(t3_i)=20, \old(t3_pc)=8, \old(t3_st)=12, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L687] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L691] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0] [L600] m_i = 1 [L601] t1_i = 1 [L602] t2_i = 1 [L603] t3_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L691] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L692] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L628] int kernel_st ; [L629] int tmp ; [L630] int tmp___0 ; [L634] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L635] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L636] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L271] COND TRUE m_i == 1 [L272] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L276] COND TRUE t1_i == 1 [L277] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L281] COND TRUE t2_i == 1 [L282] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L286] COND TRUE t3_i == 1 [L287] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L636] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L637] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L408] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L413] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L418] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L423] COND FALSE !(T3_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L428] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L433] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L438] COND FALSE !(E_3 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L637] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L638] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L187] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L206] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L225] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L244] COND FALSE !(t3_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L638] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L639] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L451] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L456] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L461] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L466] COND FALSE !(T3_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L471] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L476] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L481] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L639] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L642] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L645] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L646] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L327] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L331] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L296] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L299] COND TRUE m_st == 0 [L300] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L322] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L334] tmp = exists_runnable_thread() [L336] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1] [L341] COND TRUE m_st == 0 [L342] int tmp_ndt_1; [L343] tmp_ndt_1 = __VERIFIER_nondet_int() [L344] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0] [L355] COND TRUE t1_st == 0 [L356] int tmp_ndt_2; [L357] tmp_ndt_2 = __VERIFIER_nondet_int() [L358] COND TRUE \read(tmp_ndt_2) [L360] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L361] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L84] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L95] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L97] t1_pc = 1 [L98] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L361] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L369] COND TRUE t2_st == 0 [L370] int tmp_ndt_3; [L371] tmp_ndt_3 = __VERIFIER_nondet_int() [L372] COND TRUE \read(tmp_ndt_3) [L374] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L375] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L119] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L130] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L132] t2_pc = 1 [L133] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0] [L375] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L383] COND TRUE t3_st == 0 [L384] int tmp_ndt_4; [L385] tmp_ndt_4 = __VERIFIER_nondet_int() [L386] COND TRUE \read(tmp_ndt_4) [L388] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L389] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L154] COND TRUE t3_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L165] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1] [L167] t3_pc = 1 [L168] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L389] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L331] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L334] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L296] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L299] COND TRUE m_st == 0 [L300] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L322] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L334] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L334] tmp = exists_runnable_thread() [L336] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L341] COND TRUE m_st == 0 [L342] int tmp_ndt_1; [L343] tmp_ndt_1 = __VERIFIER_nondet_int() [L344] COND TRUE \read(tmp_ndt_1) [L346] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L347] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L43] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L54] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L57] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L58] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND TRUE E_1 == 1 [L208] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND TRUE \read(tmp___0) [L509] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L58] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=1, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L59] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L62] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L64] m_pc = 1 [L65] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L347] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L355] COND TRUE t1_st == 0 [L356] int tmp_ndt_2; [L357] tmp_ndt_2 = __VERIFIER_nondet_int() [L358] COND TRUE \read(tmp_ndt_2) [L360] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L361] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L84] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L87] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L103] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L104] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L188] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND TRUE E_2 == 1 [L227] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND TRUE \read(tmp___1) [L517] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L254] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1] [L522] tmp___2 = is_transmit3_triggered() [L524] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L104] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=1, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L105] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L95] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L97] t1_pc = 1 [L98] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L361] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L369] COND TRUE t2_st == 0 [L370] int tmp_ndt_3; [L371] tmp_ndt_3 = __VERIFIER_nondet_int() [L372] COND TRUE \read(tmp_ndt_3) [L374] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L375] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L119] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L122] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L138] E_3 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L139] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L538] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L491] int tmp ; [L492] int tmp___0 ; [L493] int tmp___1 ; [L494] int tmp___2 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L184] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L187] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L188] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L197] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L199] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L498] tmp = is_master_triggered() [L500] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L203] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L206] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L207] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L216] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L218] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L506] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0] [L506] tmp___0 = is_transmit1_triggered() [L508] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L222] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L225] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L226] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L235] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L237] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L514] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0] [L514] tmp___1 = is_transmit2_triggered() [L516] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0] [L522] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L241] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L244] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L245] COND TRUE E_3 == 1 [L246] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, __retres1=1, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L256] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2] [L522] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, is_transmit3_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0] [L522] tmp___2 = is_transmit3_triggered() [L524] COND TRUE \read(tmp___2) [L525] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L538] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L139] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L140] E_3 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L130] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L132] t2_pc = 1 [L133] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0] [L375] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L383] COND TRUE t3_st == 0 [L384] int tmp_ndt_4; [L385] tmp_ndt_4 = __VERIFIER_nondet_int() [L386] COND TRUE \read(tmp_ndt_4) [L388] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L389] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L154] COND FALSE !(t3_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L157] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L173] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, E_1=2, E_2=2, E_3=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 25 procedures, 199 locations, 1 error locations. UNSAFE Result, 18.2s OverallTime, 27 OverallIterations, 5 TraceHistogramMax, 10.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7552 SDtfs, 8060 SDslu, 8762 SDs, 0 SdLazy, 5486 SolverSat, 1980 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 879 GetRequests, 734 SyntacticMatches, 36 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=41408occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.4s AutomataMinimizationTime, 26 MinimizatonAttempts, 1694 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 4166 NumberOfCodeBlocks, 4166 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 3830 ConstructedInterpolants, 0 QuantifiedInterpolants, 759153 SizeOfPredicates, 3 NumberOfNonLiveVariables, 2858 ConjunctsInSsa, 12 ConjunctsInUnsatCore, 29 InterpolantComputations, 26 PerfectInterpolantSequences, 727/765 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...