./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/token_ring.02.cil-2.c --full-output -ea --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8bd4bc60 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/token_ring.02.cil-2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 216b1eba72c80bc0eec8bb9ab0298bf8baf472d8 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.25-8bd4bc6 [2020-07-29 03:08:40,645 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-07-29 03:08:40,648 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-07-29 03:08:40,666 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-07-29 03:08:40,666 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-07-29 03:08:40,668 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-07-29 03:08:40,670 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-07-29 03:08:40,681 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-07-29 03:08:40,685 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-07-29 03:08:40,689 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-07-29 03:08:40,691 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-07-29 03:08:40,692 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-07-29 03:08:40,693 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-07-29 03:08:40,695 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-07-29 03:08:40,697 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-07-29 03:08:40,698 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-07-29 03:08:40,700 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-07-29 03:08:40,700 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-07-29 03:08:40,703 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-07-29 03:08:40,706 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-07-29 03:08:40,711 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-07-29 03:08:40,715 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-07-29 03:08:40,716 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-07-29 03:08:40,717 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-07-29 03:08:40,720 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-07-29 03:08:40,720 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-07-29 03:08:40,720 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-07-29 03:08:40,722 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-07-29 03:08:40,722 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-07-29 03:08:40,723 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-07-29 03:08:40,723 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-07-29 03:08:40,724 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-07-29 03:08:40,725 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-07-29 03:08:40,726 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-07-29 03:08:40,727 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-07-29 03:08:40,728 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-07-29 03:08:40,728 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-07-29 03:08:40,729 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-07-29 03:08:40,729 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-07-29 03:08:40,730 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-07-29 03:08:40,731 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-07-29 03:08:40,732 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2020-07-29 03:08:40,768 INFO L113 SettingsManager]: Loading preferences was successful [2020-07-29 03:08:40,768 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-07-29 03:08:40,771 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-07-29 03:08:40,771 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-07-29 03:08:40,772 INFO L138 SettingsManager]: * Use SBE=true [2020-07-29 03:08:40,772 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2020-07-29 03:08:40,772 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2020-07-29 03:08:40,772 INFO L138 SettingsManager]: * Use old map elimination=false [2020-07-29 03:08:40,772 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2020-07-29 03:08:40,773 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2020-07-29 03:08:40,773 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2020-07-29 03:08:40,773 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-07-29 03:08:40,773 INFO L138 SettingsManager]: * sizeof long=4 [2020-07-29 03:08:40,774 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2020-07-29 03:08:40,774 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-07-29 03:08:40,774 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-07-29 03:08:40,775 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-07-29 03:08:40,775 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2020-07-29 03:08:40,775 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2020-07-29 03:08:40,775 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2020-07-29 03:08:40,776 INFO L138 SettingsManager]: * sizeof long double=12 [2020-07-29 03:08:40,776 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-07-29 03:08:40,776 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2020-07-29 03:08:40,776 INFO L138 SettingsManager]: * Use constant arrays=true [2020-07-29 03:08:40,777 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2020-07-29 03:08:40,777 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-07-29 03:08:40,777 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-07-29 03:08:40,778 INFO L138 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2020-07-29 03:08:40,778 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-07-29 03:08:40,778 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2020-07-29 03:08:40,778 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2020-07-29 03:08:40,779 INFO L138 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2020-07-29 03:08:40,780 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2020-07-29 03:08:40,780 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 216b1eba72c80bc0eec8bb9ab0298bf8baf472d8 [2020-07-29 03:08:41,081 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2020-07-29 03:08:41,094 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-07-29 03:08:41,097 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-07-29 03:08:41,099 INFO L271 PluginConnector]: Initializing CDTParser... [2020-07-29 03:08:41,099 INFO L275 PluginConnector]: CDTParser initialized [2020-07-29 03:08:41,100 INFO L429 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/token_ring.02.cil-2.c [2020-07-29 03:08:41,172 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b2ec9d774/e791b1b3e1d7421b9a178da4bf2525fa/FLAG7a6c027eb [2020-07-29 03:08:41,610 INFO L306 CDTParser]: Found 1 translation units. [2020-07-29 03:08:41,612 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/token_ring.02.cil-2.c [2020-07-29 03:08:41,623 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b2ec9d774/e791b1b3e1d7421b9a178da4bf2525fa/FLAG7a6c027eb [2020-07-29 03:08:41,964 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b2ec9d774/e791b1b3e1d7421b9a178da4bf2525fa [2020-07-29 03:08:41,968 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-07-29 03:08:41,970 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2020-07-29 03:08:41,971 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-07-29 03:08:41,972 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-07-29 03:08:41,975 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-07-29 03:08:41,977 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.07 03:08:41" (1/1) ... [2020-07-29 03:08:41,980 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3629c253 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:41, skipping insertion in model container [2020-07-29 03:08:41,980 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.07 03:08:41" (1/1) ... [2020-07-29 03:08:41,990 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-07-29 03:08:42,048 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-07-29 03:08:42,385 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-07-29 03:08:42,392 INFO L203 MainTranslator]: Completed pre-run [2020-07-29 03:08:42,520 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-07-29 03:08:42,552 INFO L208 MainTranslator]: Completed translation [2020-07-29 03:08:42,552 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42 WrapperNode [2020-07-29 03:08:42,552 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-07-29 03:08:42,553 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2020-07-29 03:08:42,553 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2020-07-29 03:08:42,554 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2020-07-29 03:08:42,562 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,570 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,631 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2020-07-29 03:08:42,631 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-07-29 03:08:42,632 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-07-29 03:08:42,632 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-07-29 03:08:42,642 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,642 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,651 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,655 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,674 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,693 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,696 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... [2020-07-29 03:08:42,702 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-07-29 03:08:42,703 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-07-29 03:08:42,703 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-07-29 03:08:42,703 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-07-29 03:08:42,704 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2020-07-29 03:08:42,770 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-07-29 03:08:42,771 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-07-29 03:08:43,852 INFO L290 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-07-29 03:08:43,853 INFO L295 CfgBuilder]: Removed 105 assume(true) statements. [2020-07-29 03:08:43,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.07 03:08:43 BoogieIcfgContainer [2020-07-29 03:08:43,860 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-07-29 03:08:43,860 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2020-07-29 03:08:43,861 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2020-07-29 03:08:43,864 INFO L275 PluginConnector]: BuchiAutomizer initialized [2020-07-29 03:08:43,865 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-07-29 03:08:43,866 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 29.07 03:08:41" (1/3) ... [2020-07-29 03:08:43,867 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@c257701 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.07 03:08:43, skipping insertion in model container [2020-07-29 03:08:43,867 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-07-29 03:08:43,867 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.07 03:08:42" (2/3) ... [2020-07-29 03:08:43,868 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@c257701 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 29.07 03:08:43, skipping insertion in model container [2020-07-29 03:08:43,868 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-07-29 03:08:43,868 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.07 03:08:43" (3/3) ... [2020-07-29 03:08:43,870 INFO L371 chiAutomizerObserver]: Analyzing ICFG token_ring.02.cil-2.c [2020-07-29 03:08:43,917 INFO L356 BuchiCegarLoop]: Interprodecural is true [2020-07-29 03:08:43,917 INFO L357 BuchiCegarLoop]: Hoare is false [2020-07-29 03:08:43,918 INFO L358 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2020-07-29 03:08:43,918 INFO L359 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2020-07-29 03:08:43,919 INFO L360 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-07-29 03:08:43,919 INFO L361 BuchiCegarLoop]: Difference is false [2020-07-29 03:08:43,919 INFO L362 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-07-29 03:08:43,919 INFO L365 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2020-07-29 03:08:43,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 223 states. [2020-07-29 03:08:44,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 180 [2020-07-29 03:08:44,013 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:44,013 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:44,022 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:44,023 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:44,023 INFO L424 BuchiCegarLoop]: ======== Iteration 1============ [2020-07-29 03:08:44,023 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 223 states. [2020-07-29 03:08:44,045 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 180 [2020-07-29 03:08:44,045 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:44,045 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:44,048 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:44,048 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:44,057 INFO L794 eck$LassoCheckResult]: Stem: 100#ULTIMATE.startENTRYtrue ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 8#L-1true havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 156#L518true havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 87#L226true assume !(1 == ~m_i~0);~m_st~0 := 2; 224#L233-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 130#L238-1true assume !(1 == ~t2_i~0);~t2_st~0 := 2; 140#L243-1true assume !(0 == ~M_E~0); 115#L346-1true assume !(0 == ~T1_E~0); 10#L351-1true assume !(0 == ~T2_E~0); 34#L356-1true assume !(0 == ~E_M~0); 58#L361-1true assume !(0 == ~E_1~0); 190#L366-1true assume !(0 == ~E_2~0); 215#L371-1true havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 170#L168true assume 1 == ~m_pc~0; 28#L169true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 172#L179true is_master_triggered_#res := is_master_triggered_~__retres1~0; 29#L180true activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 171#L427true assume !(0 != activate_threads_~tmp~1); 54#L427-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 93#L187true assume 1 == ~t1_pc~0; 138#L188true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 94#L198true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 139#L199true activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 84#L435true assume !(0 != activate_threads_~tmp___0~0); 88#L435-2true havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 221#L206true assume !(1 == ~t2_pc~0); 216#L206-2true is_transmit2_triggered_~__retres1~2 := 0; 222#L217true is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 42#L218true activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 205#L443true assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 186#L443-2true assume !(1 == ~M_E~0); 30#L384-1true assume !(1 == ~T1_E~0); 33#L389-1true assume !(1 == ~T2_E~0); 55#L394-1true assume !(1 == ~E_M~0); 187#L399-1true assume 1 == ~E_1~0;~E_1~0 := 2; 211#L404-1true assume !(1 == ~E_2~0); 7#L555-1true [2020-07-29 03:08:44,059 INFO L796 eck$LassoCheckResult]: Loop: 7#L555-1true assume !false; 96#L556true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 119#L321true assume false; 90#L336true start_simulation_~kernel_st~0 := 2; 85#L226-1true start_simulation_~kernel_st~0 := 3; 116#L346-2true assume 0 == ~M_E~0;~M_E~0 := 1; 117#L346-4true assume 0 == ~T1_E~0;~T1_E~0 := 1; 15#L351-3true assume !(0 == ~T2_E~0); 36#L356-3true assume 0 == ~E_M~0;~E_M~0 := 1; 67#L361-3true assume 0 == ~E_1~0;~E_1~0 := 1; 194#L366-3true assume 0 == ~E_2~0;~E_2~0 := 1; 220#L371-3true havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 49#L168-12true assume 1 == ~m_pc~0; 17#L169-4true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 159#L179-4true is_master_triggered_#res := is_master_triggered_~__retres1~0; 19#L180-4true activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 53#L427-12true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 37#L427-14true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 75#L187-12true assume 1 == ~t1_pc~0; 145#L188-4true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 104#L198-4true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 146#L199-4true activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 154#L435-12true assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 157#L435-14true havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 204#L206-12true assume !(1 == ~t2_pc~0); 203#L206-14true is_transmit2_triggered_~__retres1~2 := 0; 210#L217-4true is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 61#L218-4true activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 185#L443-12true assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 164#L443-14true assume !(1 == ~M_E~0); 13#L384-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 35#L389-3true assume 1 == ~T2_E~0;~T2_E~0 := 2; 64#L394-3true assume 1 == ~E_M~0;~E_M~0 := 2; 192#L399-3true assume 1 == ~E_1~0;~E_1~0 := 2; 218#L404-3true assume 1 == ~E_2~0;~E_2~0 := 2; 121#L409-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 200#L256-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 45#L273-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 4#L274-1true start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 124#L574true assume !(0 == start_simulation_~tmp~3); 126#L574-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 173#L256-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 41#L273-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 3#L274-2true stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 155#L529true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 223#L536true stop_simulation_#res := stop_simulation_~__retres2~0; 160#L537true start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 51#L587true assume !(0 != start_simulation_~tmp___0~1); 7#L555-1true [2020-07-29 03:08:44,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:44,066 INFO L82 PathProgramCache]: Analyzing trace with hash -1720133594, now seen corresponding path program 1 times [2020-07-29 03:08:44,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:44,074 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821157183] [2020-07-29 03:08:44,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:44,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:44,247 INFO L280 TraceCheckUtils]: 0: Hoare triple {227#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {227#true} is VALID [2020-07-29 03:08:44,249 INFO L280 TraceCheckUtils]: 1: Hoare triple {227#true} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {229#(= 1 ~m_i~0)} is VALID [2020-07-29 03:08:44,250 INFO L280 TraceCheckUtils]: 2: Hoare triple {229#(= 1 ~m_i~0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {229#(= 1 ~m_i~0)} is VALID [2020-07-29 03:08:44,251 INFO L280 TraceCheckUtils]: 3: Hoare triple {229#(= 1 ~m_i~0)} assume !(1 == ~m_i~0);~m_st~0 := 2; {228#false} is VALID [2020-07-29 03:08:44,251 INFO L280 TraceCheckUtils]: 4: Hoare triple {228#false} assume 1 == ~t1_i~0;~t1_st~0 := 0; {228#false} is VALID [2020-07-29 03:08:44,251 INFO L280 TraceCheckUtils]: 5: Hoare triple {228#false} assume !(1 == ~t2_i~0);~t2_st~0 := 2; {228#false} is VALID [2020-07-29 03:08:44,252 INFO L280 TraceCheckUtils]: 6: Hoare triple {228#false} assume !(0 == ~M_E~0); {228#false} is VALID [2020-07-29 03:08:44,252 INFO L280 TraceCheckUtils]: 7: Hoare triple {228#false} assume !(0 == ~T1_E~0); {228#false} is VALID [2020-07-29 03:08:44,252 INFO L280 TraceCheckUtils]: 8: Hoare triple {228#false} assume !(0 == ~T2_E~0); {228#false} is VALID [2020-07-29 03:08:44,253 INFO L280 TraceCheckUtils]: 9: Hoare triple {228#false} assume !(0 == ~E_M~0); {228#false} is VALID [2020-07-29 03:08:44,253 INFO L280 TraceCheckUtils]: 10: Hoare triple {228#false} assume !(0 == ~E_1~0); {228#false} is VALID [2020-07-29 03:08:44,254 INFO L280 TraceCheckUtils]: 11: Hoare triple {228#false} assume !(0 == ~E_2~0); {228#false} is VALID [2020-07-29 03:08:44,254 INFO L280 TraceCheckUtils]: 12: Hoare triple {228#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {228#false} is VALID [2020-07-29 03:08:44,254 INFO L280 TraceCheckUtils]: 13: Hoare triple {228#false} assume 1 == ~m_pc~0; {228#false} is VALID [2020-07-29 03:08:44,255 INFO L280 TraceCheckUtils]: 14: Hoare triple {228#false} assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; {228#false} is VALID [2020-07-29 03:08:44,255 INFO L280 TraceCheckUtils]: 15: Hoare triple {228#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {228#false} is VALID [2020-07-29 03:08:44,256 INFO L280 TraceCheckUtils]: 16: Hoare triple {228#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {228#false} is VALID [2020-07-29 03:08:44,256 INFO L280 TraceCheckUtils]: 17: Hoare triple {228#false} assume !(0 != activate_threads_~tmp~1); {228#false} is VALID [2020-07-29 03:08:44,257 INFO L280 TraceCheckUtils]: 18: Hoare triple {228#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {228#false} is VALID [2020-07-29 03:08:44,258 INFO L280 TraceCheckUtils]: 19: Hoare triple {228#false} assume 1 == ~t1_pc~0; {228#false} is VALID [2020-07-29 03:08:44,258 INFO L280 TraceCheckUtils]: 20: Hoare triple {228#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {228#false} is VALID [2020-07-29 03:08:44,259 INFO L280 TraceCheckUtils]: 21: Hoare triple {228#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {228#false} is VALID [2020-07-29 03:08:44,259 INFO L280 TraceCheckUtils]: 22: Hoare triple {228#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {228#false} is VALID [2020-07-29 03:08:44,260 INFO L280 TraceCheckUtils]: 23: Hoare triple {228#false} assume !(0 != activate_threads_~tmp___0~0); {228#false} is VALID [2020-07-29 03:08:44,260 INFO L280 TraceCheckUtils]: 24: Hoare triple {228#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {228#false} is VALID [2020-07-29 03:08:44,261 INFO L280 TraceCheckUtils]: 25: Hoare triple {228#false} assume !(1 == ~t2_pc~0); {228#false} is VALID [2020-07-29 03:08:44,262 INFO L280 TraceCheckUtils]: 26: Hoare triple {228#false} is_transmit2_triggered_~__retres1~2 := 0; {228#false} is VALID [2020-07-29 03:08:44,262 INFO L280 TraceCheckUtils]: 27: Hoare triple {228#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {228#false} is VALID [2020-07-29 03:08:44,263 INFO L280 TraceCheckUtils]: 28: Hoare triple {228#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {228#false} is VALID [2020-07-29 03:08:44,263 INFO L280 TraceCheckUtils]: 29: Hoare triple {228#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {228#false} is VALID [2020-07-29 03:08:44,263 INFO L280 TraceCheckUtils]: 30: Hoare triple {228#false} assume !(1 == ~M_E~0); {228#false} is VALID [2020-07-29 03:08:44,264 INFO L280 TraceCheckUtils]: 31: Hoare triple {228#false} assume !(1 == ~T1_E~0); {228#false} is VALID [2020-07-29 03:08:44,264 INFO L280 TraceCheckUtils]: 32: Hoare triple {228#false} assume !(1 == ~T2_E~0); {228#false} is VALID [2020-07-29 03:08:44,265 INFO L280 TraceCheckUtils]: 33: Hoare triple {228#false} assume !(1 == ~E_M~0); {228#false} is VALID [2020-07-29 03:08:44,265 INFO L280 TraceCheckUtils]: 34: Hoare triple {228#false} assume 1 == ~E_1~0;~E_1~0 := 2; {228#false} is VALID [2020-07-29 03:08:44,266 INFO L280 TraceCheckUtils]: 35: Hoare triple {228#false} assume !(1 == ~E_2~0); {228#false} is VALID [2020-07-29 03:08:44,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:44,274 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821157183] [2020-07-29 03:08:44,275 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:44,275 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-07-29 03:08:44,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1576155188] [2020-07-29 03:08:44,283 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:44,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:44,284 INFO L82 PathProgramCache]: Analyzing trace with hash 572791562, now seen corresponding path program 1 times [2020-07-29 03:08:44,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:44,284 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484020431] [2020-07-29 03:08:44,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:44,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:44,313 INFO L280 TraceCheckUtils]: 0: Hoare triple {230#true} assume !false; {230#true} is VALID [2020-07-29 03:08:44,313 INFO L280 TraceCheckUtils]: 1: Hoare triple {230#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {230#true} is VALID [2020-07-29 03:08:44,315 INFO L280 TraceCheckUtils]: 2: Hoare triple {230#true} assume false; {231#false} is VALID [2020-07-29 03:08:44,315 INFO L280 TraceCheckUtils]: 3: Hoare triple {231#false} start_simulation_~kernel_st~0 := 2; {231#false} is VALID [2020-07-29 03:08:44,315 INFO L280 TraceCheckUtils]: 4: Hoare triple {231#false} start_simulation_~kernel_st~0 := 3; {231#false} is VALID [2020-07-29 03:08:44,316 INFO L280 TraceCheckUtils]: 5: Hoare triple {231#false} assume 0 == ~M_E~0;~M_E~0 := 1; {231#false} is VALID [2020-07-29 03:08:44,316 INFO L280 TraceCheckUtils]: 6: Hoare triple {231#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {231#false} is VALID [2020-07-29 03:08:44,317 INFO L280 TraceCheckUtils]: 7: Hoare triple {231#false} assume !(0 == ~T2_E~0); {231#false} is VALID [2020-07-29 03:08:44,317 INFO L280 TraceCheckUtils]: 8: Hoare triple {231#false} assume 0 == ~E_M~0;~E_M~0 := 1; {231#false} is VALID [2020-07-29 03:08:44,317 INFO L280 TraceCheckUtils]: 9: Hoare triple {231#false} assume 0 == ~E_1~0;~E_1~0 := 1; {231#false} is VALID [2020-07-29 03:08:44,318 INFO L280 TraceCheckUtils]: 10: Hoare triple {231#false} assume 0 == ~E_2~0;~E_2~0 := 1; {231#false} is VALID [2020-07-29 03:08:44,318 INFO L280 TraceCheckUtils]: 11: Hoare triple {231#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {231#false} is VALID [2020-07-29 03:08:44,319 INFO L280 TraceCheckUtils]: 12: Hoare triple {231#false} assume 1 == ~m_pc~0; {231#false} is VALID [2020-07-29 03:08:44,319 INFO L280 TraceCheckUtils]: 13: Hoare triple {231#false} assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; {231#false} is VALID [2020-07-29 03:08:44,320 INFO L280 TraceCheckUtils]: 14: Hoare triple {231#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {231#false} is VALID [2020-07-29 03:08:44,320 INFO L280 TraceCheckUtils]: 15: Hoare triple {231#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {231#false} is VALID [2020-07-29 03:08:44,321 INFO L280 TraceCheckUtils]: 16: Hoare triple {231#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {231#false} is VALID [2020-07-29 03:08:44,321 INFO L280 TraceCheckUtils]: 17: Hoare triple {231#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {231#false} is VALID [2020-07-29 03:08:44,322 INFO L280 TraceCheckUtils]: 18: Hoare triple {231#false} assume 1 == ~t1_pc~0; {231#false} is VALID [2020-07-29 03:08:44,322 INFO L280 TraceCheckUtils]: 19: Hoare triple {231#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {231#false} is VALID [2020-07-29 03:08:44,322 INFO L280 TraceCheckUtils]: 20: Hoare triple {231#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {231#false} is VALID [2020-07-29 03:08:44,323 INFO L280 TraceCheckUtils]: 21: Hoare triple {231#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {231#false} is VALID [2020-07-29 03:08:44,323 INFO L280 TraceCheckUtils]: 22: Hoare triple {231#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {231#false} is VALID [2020-07-29 03:08:44,324 INFO L280 TraceCheckUtils]: 23: Hoare triple {231#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {231#false} is VALID [2020-07-29 03:08:44,324 INFO L280 TraceCheckUtils]: 24: Hoare triple {231#false} assume !(1 == ~t2_pc~0); {231#false} is VALID [2020-07-29 03:08:44,325 INFO L280 TraceCheckUtils]: 25: Hoare triple {231#false} is_transmit2_triggered_~__retres1~2 := 0; {231#false} is VALID [2020-07-29 03:08:44,325 INFO L280 TraceCheckUtils]: 26: Hoare triple {231#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {231#false} is VALID [2020-07-29 03:08:44,326 INFO L280 TraceCheckUtils]: 27: Hoare triple {231#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {231#false} is VALID [2020-07-29 03:08:44,326 INFO L280 TraceCheckUtils]: 28: Hoare triple {231#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {231#false} is VALID [2020-07-29 03:08:44,326 INFO L280 TraceCheckUtils]: 29: Hoare triple {231#false} assume !(1 == ~M_E~0); {231#false} is VALID [2020-07-29 03:08:44,327 INFO L280 TraceCheckUtils]: 30: Hoare triple {231#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {231#false} is VALID [2020-07-29 03:08:44,327 INFO L280 TraceCheckUtils]: 31: Hoare triple {231#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {231#false} is VALID [2020-07-29 03:08:44,328 INFO L280 TraceCheckUtils]: 32: Hoare triple {231#false} assume 1 == ~E_M~0;~E_M~0 := 2; {231#false} is VALID [2020-07-29 03:08:44,328 INFO L280 TraceCheckUtils]: 33: Hoare triple {231#false} assume 1 == ~E_1~0;~E_1~0 := 2; {231#false} is VALID [2020-07-29 03:08:44,329 INFO L280 TraceCheckUtils]: 34: Hoare triple {231#false} assume 1 == ~E_2~0;~E_2~0 := 2; {231#false} is VALID [2020-07-29 03:08:44,330 INFO L280 TraceCheckUtils]: 35: Hoare triple {231#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {231#false} is VALID [2020-07-29 03:08:44,330 INFO L280 TraceCheckUtils]: 36: Hoare triple {231#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {231#false} is VALID [2020-07-29 03:08:44,331 INFO L280 TraceCheckUtils]: 37: Hoare triple {231#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {231#false} is VALID [2020-07-29 03:08:44,331 INFO L280 TraceCheckUtils]: 38: Hoare triple {231#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {231#false} is VALID [2020-07-29 03:08:44,331 INFO L280 TraceCheckUtils]: 39: Hoare triple {231#false} assume !(0 == start_simulation_~tmp~3); {231#false} is VALID [2020-07-29 03:08:44,332 INFO L280 TraceCheckUtils]: 40: Hoare triple {231#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {231#false} is VALID [2020-07-29 03:08:44,332 INFO L280 TraceCheckUtils]: 41: Hoare triple {231#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {231#false} is VALID [2020-07-29 03:08:44,333 INFO L280 TraceCheckUtils]: 42: Hoare triple {231#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {231#false} is VALID [2020-07-29 03:08:44,333 INFO L280 TraceCheckUtils]: 43: Hoare triple {231#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {231#false} is VALID [2020-07-29 03:08:44,334 INFO L280 TraceCheckUtils]: 44: Hoare triple {231#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {231#false} is VALID [2020-07-29 03:08:44,334 INFO L280 TraceCheckUtils]: 45: Hoare triple {231#false} stop_simulation_#res := stop_simulation_~__retres2~0; {231#false} is VALID [2020-07-29 03:08:44,334 INFO L280 TraceCheckUtils]: 46: Hoare triple {231#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {231#false} is VALID [2020-07-29 03:08:44,335 INFO L280 TraceCheckUtils]: 47: Hoare triple {231#false} assume !(0 != start_simulation_~tmp___0~1); {231#false} is VALID [2020-07-29 03:08:44,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:44,341 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484020431] [2020-07-29 03:08:44,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:44,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-07-29 03:08:44,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265391913] [2020-07-29 03:08:44,344 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:44,345 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:44,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:44,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:44,364 INFO L87 Difference]: Start difference. First operand 223 states. Second operand 3 states. [2020-07-29 03:08:44,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:44,770 INFO L93 Difference]: Finished difference Result 223 states and 337 transitions. [2020-07-29 03:08:44,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:44,771 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:44,823 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:44,825 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 223 states and 337 transitions. [2020-07-29 03:08:44,840 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 178 [2020-07-29 03:08:44,855 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 223 states to 217 states and 331 transitions. [2020-07-29 03:08:44,857 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 217 [2020-07-29 03:08:44,858 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 217 [2020-07-29 03:08:44,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 217 states and 331 transitions. [2020-07-29 03:08:44,860 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:44,860 INFO L688 BuchiCegarLoop]: Abstraction has 217 states and 331 transitions. [2020-07-29 03:08:44,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states and 331 transitions. [2020-07-29 03:08:44,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 217. [2020-07-29 03:08:44,905 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:44,905 INFO L82 GeneralOperation]: Start isEquivalent. First operand 217 states and 331 transitions. Second operand 217 states. [2020-07-29 03:08:44,906 INFO L74 IsIncluded]: Start isIncluded. First operand 217 states and 331 transitions. Second operand 217 states. [2020-07-29 03:08:44,908 INFO L87 Difference]: Start difference. First operand 217 states and 331 transitions. Second operand 217 states. [2020-07-29 03:08:44,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:44,922 INFO L93 Difference]: Finished difference Result 217 states and 331 transitions. [2020-07-29 03:08:44,923 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 331 transitions. [2020-07-29 03:08:44,926 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:44,926 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:44,927 INFO L74 IsIncluded]: Start isIncluded. First operand 217 states. Second operand 217 states and 331 transitions. [2020-07-29 03:08:44,927 INFO L87 Difference]: Start difference. First operand 217 states. Second operand 217 states and 331 transitions. [2020-07-29 03:08:44,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:44,940 INFO L93 Difference]: Finished difference Result 217 states and 331 transitions. [2020-07-29 03:08:44,940 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 331 transitions. [2020-07-29 03:08:44,942 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:44,942 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:44,943 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:44,943 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:44,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2020-07-29 03:08:44,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 331 transitions. [2020-07-29 03:08:44,956 INFO L711 BuchiCegarLoop]: Abstraction has 217 states and 331 transitions. [2020-07-29 03:08:44,956 INFO L591 BuchiCegarLoop]: Abstraction has 217 states and 331 transitions. [2020-07-29 03:08:44,956 INFO L424 BuchiCegarLoop]: ======== Iteration 2============ [2020-07-29 03:08:44,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 217 states and 331 transitions. [2020-07-29 03:08:44,958 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 178 [2020-07-29 03:08:44,959 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:44,959 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:44,961 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:44,961 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:44,962 INFO L794 eck$LassoCheckResult]: Stem: 615#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 466#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 467#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 599#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 600#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 643#L238-1 assume !(1 == ~t2_i~0);~t2_st~0 := 2; 644#L243-1 assume !(0 == ~M_E~0); 630#L346-1 assume !(0 == ~T1_E~0); 468#L351-1 assume !(0 == ~T2_E~0); 469#L356-1 assume !(0 == ~E_M~0); 520#L361-1 assume !(0 == ~E_1~0); 551#L366-1 assume !(0 == ~E_2~0); 668#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 661#L168 assume 1 == ~m_pc~0; 509#L169 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 510#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 512#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 513#L427 assume !(0 != activate_threads_~tmp~1); 543#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 544#L187 assume 1 == ~t1_pc~0; 607#L188 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 609#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 610#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 594#L435 assume !(0 != activate_threads_~tmp___0~0); 595#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 601#L206 assume !(1 == ~t2_pc~0); 529#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 528#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 531#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 532#L443 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 665#L443-2 assume !(1 == ~M_E~0); 514#L384-1 assume !(1 == ~T1_E~0); 515#L389-1 assume !(1 == ~T2_E~0); 519#L394-1 assume !(1 == ~E_M~0); 545#L399-1 assume 1 == ~E_1~0;~E_1~0 := 2; 666#L404-1 assume !(1 == ~E_2~0); 464#L555-1 [2020-07-29 03:08:44,962 INFO L796 eck$LassoCheckResult]: Loop: 464#L555-1 assume !false; 465#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 471#L321 assume !false; 538#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 539#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 536#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 459#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 460#L288 assume !(0 != eval_~tmp~0); 603#L336 start_simulation_~kernel_st~0 := 2; 596#L226-1 start_simulation_~kernel_st~0 := 3; 597#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 631#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 479#L351-3 assume !(0 == ~T2_E~0); 480#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 522#L361-3 assume 0 == ~E_1~0;~E_1~0 := 1; 565#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 670#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 540#L168-12 assume 1 == ~m_pc~0; 485#L169-4 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 486#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 488#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 489#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 523#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 524#L187-12 assume 1 == ~t1_pc~0; 578#L188-4 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 602#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 618#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 649#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 654#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 656#L206-12 assume 1 == ~t2_pc~0; 553#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 554#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 556#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 557#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 659#L443-14 assume !(1 == ~M_E~0); 476#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 477#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 521#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 562#L399-3 assume 1 == ~E_1~0;~E_1~0 := 2; 669#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 634#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 635#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 535#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 457#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 458#L574 assume !(0 == start_simulation_~tmp~3); 637#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 639#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 530#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 455#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 456#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 655#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 657#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 541#L587 assume !(0 != start_simulation_~tmp___0~1); 464#L555-1 [2020-07-29 03:08:44,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:44,963 INFO L82 PathProgramCache]: Analyzing trace with hash -1647747036, now seen corresponding path program 1 times [2020-07-29 03:08:44,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:44,964 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561096167] [2020-07-29 03:08:44,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:44,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:45,009 INFO L280 TraceCheckUtils]: 0: Hoare triple {1109#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {1109#true} is VALID [2020-07-29 03:08:45,011 INFO L280 TraceCheckUtils]: 1: Hoare triple {1109#true} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {1111#(= 1 ~t2_i~0)} is VALID [2020-07-29 03:08:45,012 INFO L280 TraceCheckUtils]: 2: Hoare triple {1111#(= 1 ~t2_i~0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {1111#(= 1 ~t2_i~0)} is VALID [2020-07-29 03:08:45,012 INFO L280 TraceCheckUtils]: 3: Hoare triple {1111#(= 1 ~t2_i~0)} assume 1 == ~m_i~0;~m_st~0 := 0; {1111#(= 1 ~t2_i~0)} is VALID [2020-07-29 03:08:45,013 INFO L280 TraceCheckUtils]: 4: Hoare triple {1111#(= 1 ~t2_i~0)} assume 1 == ~t1_i~0;~t1_st~0 := 0; {1111#(= 1 ~t2_i~0)} is VALID [2020-07-29 03:08:45,014 INFO L280 TraceCheckUtils]: 5: Hoare triple {1111#(= 1 ~t2_i~0)} assume !(1 == ~t2_i~0);~t2_st~0 := 2; {1110#false} is VALID [2020-07-29 03:08:45,015 INFO L280 TraceCheckUtils]: 6: Hoare triple {1110#false} assume !(0 == ~M_E~0); {1110#false} is VALID [2020-07-29 03:08:45,015 INFO L280 TraceCheckUtils]: 7: Hoare triple {1110#false} assume !(0 == ~T1_E~0); {1110#false} is VALID [2020-07-29 03:08:45,015 INFO L280 TraceCheckUtils]: 8: Hoare triple {1110#false} assume !(0 == ~T2_E~0); {1110#false} is VALID [2020-07-29 03:08:45,016 INFO L280 TraceCheckUtils]: 9: Hoare triple {1110#false} assume !(0 == ~E_M~0); {1110#false} is VALID [2020-07-29 03:08:45,016 INFO L280 TraceCheckUtils]: 10: Hoare triple {1110#false} assume !(0 == ~E_1~0); {1110#false} is VALID [2020-07-29 03:08:45,016 INFO L280 TraceCheckUtils]: 11: Hoare triple {1110#false} assume !(0 == ~E_2~0); {1110#false} is VALID [2020-07-29 03:08:45,017 INFO L280 TraceCheckUtils]: 12: Hoare triple {1110#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {1110#false} is VALID [2020-07-29 03:08:45,017 INFO L280 TraceCheckUtils]: 13: Hoare triple {1110#false} assume 1 == ~m_pc~0; {1110#false} is VALID [2020-07-29 03:08:45,017 INFO L280 TraceCheckUtils]: 14: Hoare triple {1110#false} assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; {1110#false} is VALID [2020-07-29 03:08:45,018 INFO L280 TraceCheckUtils]: 15: Hoare triple {1110#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {1110#false} is VALID [2020-07-29 03:08:45,018 INFO L280 TraceCheckUtils]: 16: Hoare triple {1110#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {1110#false} is VALID [2020-07-29 03:08:45,019 INFO L280 TraceCheckUtils]: 17: Hoare triple {1110#false} assume !(0 != activate_threads_~tmp~1); {1110#false} is VALID [2020-07-29 03:08:45,020 INFO L280 TraceCheckUtils]: 18: Hoare triple {1110#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {1110#false} is VALID [2020-07-29 03:08:45,020 INFO L280 TraceCheckUtils]: 19: Hoare triple {1110#false} assume 1 == ~t1_pc~0; {1110#false} is VALID [2020-07-29 03:08:45,021 INFO L280 TraceCheckUtils]: 20: Hoare triple {1110#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {1110#false} is VALID [2020-07-29 03:08:45,022 INFO L280 TraceCheckUtils]: 21: Hoare triple {1110#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {1110#false} is VALID [2020-07-29 03:08:45,023 INFO L280 TraceCheckUtils]: 22: Hoare triple {1110#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {1110#false} is VALID [2020-07-29 03:08:45,026 INFO L280 TraceCheckUtils]: 23: Hoare triple {1110#false} assume !(0 != activate_threads_~tmp___0~0); {1110#false} is VALID [2020-07-29 03:08:45,027 INFO L280 TraceCheckUtils]: 24: Hoare triple {1110#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {1110#false} is VALID [2020-07-29 03:08:45,027 INFO L280 TraceCheckUtils]: 25: Hoare triple {1110#false} assume !(1 == ~t2_pc~0); {1110#false} is VALID [2020-07-29 03:08:45,028 INFO L280 TraceCheckUtils]: 26: Hoare triple {1110#false} is_transmit2_triggered_~__retres1~2 := 0; {1110#false} is VALID [2020-07-29 03:08:45,028 INFO L280 TraceCheckUtils]: 27: Hoare triple {1110#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {1110#false} is VALID [2020-07-29 03:08:45,028 INFO L280 TraceCheckUtils]: 28: Hoare triple {1110#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {1110#false} is VALID [2020-07-29 03:08:45,029 INFO L280 TraceCheckUtils]: 29: Hoare triple {1110#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {1110#false} is VALID [2020-07-29 03:08:45,029 INFO L280 TraceCheckUtils]: 30: Hoare triple {1110#false} assume !(1 == ~M_E~0); {1110#false} is VALID [2020-07-29 03:08:45,029 INFO L280 TraceCheckUtils]: 31: Hoare triple {1110#false} assume !(1 == ~T1_E~0); {1110#false} is VALID [2020-07-29 03:08:45,030 INFO L280 TraceCheckUtils]: 32: Hoare triple {1110#false} assume !(1 == ~T2_E~0); {1110#false} is VALID [2020-07-29 03:08:45,030 INFO L280 TraceCheckUtils]: 33: Hoare triple {1110#false} assume !(1 == ~E_M~0); {1110#false} is VALID [2020-07-29 03:08:45,030 INFO L280 TraceCheckUtils]: 34: Hoare triple {1110#false} assume 1 == ~E_1~0;~E_1~0 := 2; {1110#false} is VALID [2020-07-29 03:08:45,031 INFO L280 TraceCheckUtils]: 35: Hoare triple {1110#false} assume !(1 == ~E_2~0); {1110#false} is VALID [2020-07-29 03:08:45,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:45,041 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561096167] [2020-07-29 03:08:45,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:45,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-07-29 03:08:45,044 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102214744] [2020-07-29 03:08:45,044 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:45,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:45,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1082303670, now seen corresponding path program 1 times [2020-07-29 03:08:45,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:45,047 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402891939] [2020-07-29 03:08:45,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:45,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:45,133 INFO L280 TraceCheckUtils]: 0: Hoare triple {1112#true} assume !false; {1112#true} is VALID [2020-07-29 03:08:45,133 INFO L280 TraceCheckUtils]: 1: Hoare triple {1112#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {1112#true} is VALID [2020-07-29 03:08:45,134 INFO L280 TraceCheckUtils]: 2: Hoare triple {1112#true} assume !false; {1112#true} is VALID [2020-07-29 03:08:45,134 INFO L280 TraceCheckUtils]: 3: Hoare triple {1112#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {1112#true} is VALID [2020-07-29 03:08:45,137 INFO L280 TraceCheckUtils]: 4: Hoare triple {1112#true} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {1114#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} is VALID [2020-07-29 03:08:45,138 INFO L280 TraceCheckUtils]: 5: Hoare triple {1114#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {1115#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} is VALID [2020-07-29 03:08:45,139 INFO L280 TraceCheckUtils]: 6: Hoare triple {1115#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {1116#(<= 1 ULTIMATE.start_eval_~tmp~0)} is VALID [2020-07-29 03:08:45,140 INFO L280 TraceCheckUtils]: 7: Hoare triple {1116#(<= 1 ULTIMATE.start_eval_~tmp~0)} assume !(0 != eval_~tmp~0); {1113#false} is VALID [2020-07-29 03:08:45,140 INFO L280 TraceCheckUtils]: 8: Hoare triple {1113#false} start_simulation_~kernel_st~0 := 2; {1113#false} is VALID [2020-07-29 03:08:45,141 INFO L280 TraceCheckUtils]: 9: Hoare triple {1113#false} start_simulation_~kernel_st~0 := 3; {1113#false} is VALID [2020-07-29 03:08:45,141 INFO L280 TraceCheckUtils]: 10: Hoare triple {1113#false} assume 0 == ~M_E~0;~M_E~0 := 1; {1113#false} is VALID [2020-07-29 03:08:45,141 INFO L280 TraceCheckUtils]: 11: Hoare triple {1113#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {1113#false} is VALID [2020-07-29 03:08:45,142 INFO L280 TraceCheckUtils]: 12: Hoare triple {1113#false} assume !(0 == ~T2_E~0); {1113#false} is VALID [2020-07-29 03:08:45,142 INFO L280 TraceCheckUtils]: 13: Hoare triple {1113#false} assume 0 == ~E_M~0;~E_M~0 := 1; {1113#false} is VALID [2020-07-29 03:08:45,142 INFO L280 TraceCheckUtils]: 14: Hoare triple {1113#false} assume 0 == ~E_1~0;~E_1~0 := 1; {1113#false} is VALID [2020-07-29 03:08:45,143 INFO L280 TraceCheckUtils]: 15: Hoare triple {1113#false} assume 0 == ~E_2~0;~E_2~0 := 1; {1113#false} is VALID [2020-07-29 03:08:45,143 INFO L280 TraceCheckUtils]: 16: Hoare triple {1113#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {1113#false} is VALID [2020-07-29 03:08:45,143 INFO L280 TraceCheckUtils]: 17: Hoare triple {1113#false} assume 1 == ~m_pc~0; {1113#false} is VALID [2020-07-29 03:08:45,144 INFO L280 TraceCheckUtils]: 18: Hoare triple {1113#false} assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; {1113#false} is VALID [2020-07-29 03:08:45,144 INFO L280 TraceCheckUtils]: 19: Hoare triple {1113#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {1113#false} is VALID [2020-07-29 03:08:45,144 INFO L280 TraceCheckUtils]: 20: Hoare triple {1113#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {1113#false} is VALID [2020-07-29 03:08:45,145 INFO L280 TraceCheckUtils]: 21: Hoare triple {1113#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {1113#false} is VALID [2020-07-29 03:08:45,145 INFO L280 TraceCheckUtils]: 22: Hoare triple {1113#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {1113#false} is VALID [2020-07-29 03:08:45,145 INFO L280 TraceCheckUtils]: 23: Hoare triple {1113#false} assume 1 == ~t1_pc~0; {1113#false} is VALID [2020-07-29 03:08:45,146 INFO L280 TraceCheckUtils]: 24: Hoare triple {1113#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {1113#false} is VALID [2020-07-29 03:08:45,147 INFO L280 TraceCheckUtils]: 25: Hoare triple {1113#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {1113#false} is VALID [2020-07-29 03:08:45,147 INFO L280 TraceCheckUtils]: 26: Hoare triple {1113#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {1113#false} is VALID [2020-07-29 03:08:45,147 INFO L280 TraceCheckUtils]: 27: Hoare triple {1113#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {1113#false} is VALID [2020-07-29 03:08:45,148 INFO L280 TraceCheckUtils]: 28: Hoare triple {1113#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {1113#false} is VALID [2020-07-29 03:08:45,148 INFO L280 TraceCheckUtils]: 29: Hoare triple {1113#false} assume 1 == ~t2_pc~0; {1113#false} is VALID [2020-07-29 03:08:45,148 INFO L280 TraceCheckUtils]: 30: Hoare triple {1113#false} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {1113#false} is VALID [2020-07-29 03:08:45,149 INFO L280 TraceCheckUtils]: 31: Hoare triple {1113#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {1113#false} is VALID [2020-07-29 03:08:45,149 INFO L280 TraceCheckUtils]: 32: Hoare triple {1113#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {1113#false} is VALID [2020-07-29 03:08:45,150 INFO L280 TraceCheckUtils]: 33: Hoare triple {1113#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {1113#false} is VALID [2020-07-29 03:08:45,150 INFO L280 TraceCheckUtils]: 34: Hoare triple {1113#false} assume !(1 == ~M_E~0); {1113#false} is VALID [2020-07-29 03:08:45,150 INFO L280 TraceCheckUtils]: 35: Hoare triple {1113#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {1113#false} is VALID [2020-07-29 03:08:45,151 INFO L280 TraceCheckUtils]: 36: Hoare triple {1113#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {1113#false} is VALID [2020-07-29 03:08:45,151 INFO L280 TraceCheckUtils]: 37: Hoare triple {1113#false} assume 1 == ~E_M~0;~E_M~0 := 2; {1113#false} is VALID [2020-07-29 03:08:45,151 INFO L280 TraceCheckUtils]: 38: Hoare triple {1113#false} assume 1 == ~E_1~0;~E_1~0 := 2; {1113#false} is VALID [2020-07-29 03:08:45,152 INFO L280 TraceCheckUtils]: 39: Hoare triple {1113#false} assume 1 == ~E_2~0;~E_2~0 := 2; {1113#false} is VALID [2020-07-29 03:08:45,152 INFO L280 TraceCheckUtils]: 40: Hoare triple {1113#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {1113#false} is VALID [2020-07-29 03:08:45,152 INFO L280 TraceCheckUtils]: 41: Hoare triple {1113#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {1113#false} is VALID [2020-07-29 03:08:45,153 INFO L280 TraceCheckUtils]: 42: Hoare triple {1113#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {1113#false} is VALID [2020-07-29 03:08:45,153 INFO L280 TraceCheckUtils]: 43: Hoare triple {1113#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {1113#false} is VALID [2020-07-29 03:08:45,154 INFO L280 TraceCheckUtils]: 44: Hoare triple {1113#false} assume !(0 == start_simulation_~tmp~3); {1113#false} is VALID [2020-07-29 03:08:45,154 INFO L280 TraceCheckUtils]: 45: Hoare triple {1113#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {1113#false} is VALID [2020-07-29 03:08:45,155 INFO L280 TraceCheckUtils]: 46: Hoare triple {1113#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {1113#false} is VALID [2020-07-29 03:08:45,155 INFO L280 TraceCheckUtils]: 47: Hoare triple {1113#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {1113#false} is VALID [2020-07-29 03:08:45,156 INFO L280 TraceCheckUtils]: 48: Hoare triple {1113#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {1113#false} is VALID [2020-07-29 03:08:45,156 INFO L280 TraceCheckUtils]: 49: Hoare triple {1113#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {1113#false} is VALID [2020-07-29 03:08:45,157 INFO L280 TraceCheckUtils]: 50: Hoare triple {1113#false} stop_simulation_#res := stop_simulation_~__retres2~0; {1113#false} is VALID [2020-07-29 03:08:45,157 INFO L280 TraceCheckUtils]: 51: Hoare triple {1113#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {1113#false} is VALID [2020-07-29 03:08:45,157 INFO L280 TraceCheckUtils]: 52: Hoare triple {1113#false} assume !(0 != start_simulation_~tmp___0~1); {1113#false} is VALID [2020-07-29 03:08:45,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:45,162 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402891939] [2020-07-29 03:08:45,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:45,163 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:45,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869708923] [2020-07-29 03:08:45,164 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:45,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:45,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:45,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:45,166 INFO L87 Difference]: Start difference. First operand 217 states and 331 transitions. cyclomatic complexity: 115 Second operand 3 states. [2020-07-29 03:08:45,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:45,473 INFO L93 Difference]: Finished difference Result 217 states and 330 transitions. [2020-07-29 03:08:45,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:45,474 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:45,522 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:45,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 217 states and 330 transitions. [2020-07-29 03:08:45,534 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 178 [2020-07-29 03:08:45,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 217 states to 217 states and 330 transitions. [2020-07-29 03:08:45,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 217 [2020-07-29 03:08:45,546 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 217 [2020-07-29 03:08:45,546 INFO L73 IsDeterministic]: Start isDeterministic. Operand 217 states and 330 transitions. [2020-07-29 03:08:45,547 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:45,548 INFO L688 BuchiCegarLoop]: Abstraction has 217 states and 330 transitions. [2020-07-29 03:08:45,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states and 330 transitions. [2020-07-29 03:08:45,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 217. [2020-07-29 03:08:45,558 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:45,558 INFO L82 GeneralOperation]: Start isEquivalent. First operand 217 states and 330 transitions. Second operand 217 states. [2020-07-29 03:08:45,559 INFO L74 IsIncluded]: Start isIncluded. First operand 217 states and 330 transitions. Second operand 217 states. [2020-07-29 03:08:45,559 INFO L87 Difference]: Start difference. First operand 217 states and 330 transitions. Second operand 217 states. [2020-07-29 03:08:45,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:45,568 INFO L93 Difference]: Finished difference Result 217 states and 330 transitions. [2020-07-29 03:08:45,568 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 330 transitions. [2020-07-29 03:08:45,569 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:45,570 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:45,570 INFO L74 IsIncluded]: Start isIncluded. First operand 217 states. Second operand 217 states and 330 transitions. [2020-07-29 03:08:45,570 INFO L87 Difference]: Start difference. First operand 217 states. Second operand 217 states and 330 transitions. [2020-07-29 03:08:45,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:45,580 INFO L93 Difference]: Finished difference Result 217 states and 330 transitions. [2020-07-29 03:08:45,580 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 330 transitions. [2020-07-29 03:08:45,581 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:45,581 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:45,581 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:45,582 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:45,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2020-07-29 03:08:45,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 330 transitions. [2020-07-29 03:08:45,590 INFO L711 BuchiCegarLoop]: Abstraction has 217 states and 330 transitions. [2020-07-29 03:08:45,591 INFO L591 BuchiCegarLoop]: Abstraction has 217 states and 330 transitions. [2020-07-29 03:08:45,591 INFO L424 BuchiCegarLoop]: ======== Iteration 3============ [2020-07-29 03:08:45,591 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 217 states and 330 transitions. [2020-07-29 03:08:45,593 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 178 [2020-07-29 03:08:45,593 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:45,594 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:45,595 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:45,595 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:45,596 INFO L794 eck$LassoCheckResult]: Stem: 1494#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 1345#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 1346#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1478#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 1479#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1522#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 1523#L243-1 assume !(0 == ~M_E~0); 1509#L346-1 assume !(0 == ~T1_E~0); 1347#L351-1 assume !(0 == ~T2_E~0); 1348#L356-1 assume !(0 == ~E_M~0); 1399#L361-1 assume !(0 == ~E_1~0); 1430#L366-1 assume !(0 == ~E_2~0); 1547#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1540#L168 assume 1 == ~m_pc~0; 1388#L169 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 1389#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1391#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 1392#L427 assume !(0 != activate_threads_~tmp~1); 1422#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1423#L187 assume 1 == ~t1_pc~0; 1486#L188 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 1488#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1489#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 1473#L435 assume !(0 != activate_threads_~tmp___0~0); 1474#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 1480#L206 assume !(1 == ~t2_pc~0); 1408#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 1407#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 1410#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 1411#L443 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 1544#L443-2 assume !(1 == ~M_E~0); 1393#L384-1 assume !(1 == ~T1_E~0); 1394#L389-1 assume !(1 == ~T2_E~0); 1398#L394-1 assume !(1 == ~E_M~0); 1424#L399-1 assume 1 == ~E_1~0;~E_1~0 := 2; 1545#L404-1 assume !(1 == ~E_2~0); 1343#L555-1 [2020-07-29 03:08:45,596 INFO L796 eck$LassoCheckResult]: Loop: 1343#L555-1 assume !false; 1344#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 1350#L321 assume !false; 1417#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1418#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 1415#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1338#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 1339#L288 assume !(0 != eval_~tmp~0); 1482#L336 start_simulation_~kernel_st~0 := 2; 1475#L226-1 start_simulation_~kernel_st~0 := 3; 1476#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1510#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 1358#L351-3 assume !(0 == ~T2_E~0); 1359#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 1401#L361-3 assume 0 == ~E_1~0;~E_1~0 := 1; 1444#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 1549#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1419#L168-12 assume 1 == ~m_pc~0; 1364#L169-4 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 1365#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1367#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 1368#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 1402#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1403#L187-12 assume 1 == ~t1_pc~0; 1457#L188-4 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 1481#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1497#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 1528#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 1533#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 1535#L206-12 assume 1 == ~t2_pc~0; 1432#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 1433#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 1435#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 1436#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 1538#L443-14 assume !(1 == ~M_E~0); 1355#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1356#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 1400#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 1441#L399-3 assume 1 == ~E_1~0;~E_1~0 := 2; 1548#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 1513#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1514#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 1414#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1336#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 1337#L574 assume !(0 == start_simulation_~tmp~3); 1516#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 1518#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 1409#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 1334#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 1335#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1534#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 1536#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1420#L587 assume !(0 != start_simulation_~tmp___0~1); 1343#L555-1 [2020-07-29 03:08:45,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:45,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1945620386, now seen corresponding path program 1 times [2020-07-29 03:08:45,597 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:45,598 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541770916] [2020-07-29 03:08:45,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:45,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:45,676 INFO L280 TraceCheckUtils]: 0: Hoare triple {1988#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,677 INFO L280 TraceCheckUtils]: 1: Hoare triple {1990#(<= ~m_pc~0 0)} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,678 INFO L280 TraceCheckUtils]: 2: Hoare triple {1990#(<= ~m_pc~0 0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,679 INFO L280 TraceCheckUtils]: 3: Hoare triple {1990#(<= ~m_pc~0 0)} assume 1 == ~m_i~0;~m_st~0 := 0; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,679 INFO L280 TraceCheckUtils]: 4: Hoare triple {1990#(<= ~m_pc~0 0)} assume 1 == ~t1_i~0;~t1_st~0 := 0; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,680 INFO L280 TraceCheckUtils]: 5: Hoare triple {1990#(<= ~m_pc~0 0)} assume 1 == ~t2_i~0;~t2_st~0 := 0; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,681 INFO L280 TraceCheckUtils]: 6: Hoare triple {1990#(<= ~m_pc~0 0)} assume !(0 == ~M_E~0); {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,681 INFO L280 TraceCheckUtils]: 7: Hoare triple {1990#(<= ~m_pc~0 0)} assume !(0 == ~T1_E~0); {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,682 INFO L280 TraceCheckUtils]: 8: Hoare triple {1990#(<= ~m_pc~0 0)} assume !(0 == ~T2_E~0); {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,683 INFO L280 TraceCheckUtils]: 9: Hoare triple {1990#(<= ~m_pc~0 0)} assume !(0 == ~E_M~0); {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,683 INFO L280 TraceCheckUtils]: 10: Hoare triple {1990#(<= ~m_pc~0 0)} assume !(0 == ~E_1~0); {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,684 INFO L280 TraceCheckUtils]: 11: Hoare triple {1990#(<= ~m_pc~0 0)} assume !(0 == ~E_2~0); {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,685 INFO L280 TraceCheckUtils]: 12: Hoare triple {1990#(<= ~m_pc~0 0)} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {1990#(<= ~m_pc~0 0)} is VALID [2020-07-29 03:08:45,686 INFO L280 TraceCheckUtils]: 13: Hoare triple {1990#(<= ~m_pc~0 0)} assume 1 == ~m_pc~0; {1989#false} is VALID [2020-07-29 03:08:45,686 INFO L280 TraceCheckUtils]: 14: Hoare triple {1989#false} assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; {1989#false} is VALID [2020-07-29 03:08:45,686 INFO L280 TraceCheckUtils]: 15: Hoare triple {1989#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {1989#false} is VALID [2020-07-29 03:08:45,686 INFO L280 TraceCheckUtils]: 16: Hoare triple {1989#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {1989#false} is VALID [2020-07-29 03:08:45,687 INFO L280 TraceCheckUtils]: 17: Hoare triple {1989#false} assume !(0 != activate_threads_~tmp~1); {1989#false} is VALID [2020-07-29 03:08:45,687 INFO L280 TraceCheckUtils]: 18: Hoare triple {1989#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {1989#false} is VALID [2020-07-29 03:08:45,687 INFO L280 TraceCheckUtils]: 19: Hoare triple {1989#false} assume 1 == ~t1_pc~0; {1989#false} is VALID [2020-07-29 03:08:45,688 INFO L280 TraceCheckUtils]: 20: Hoare triple {1989#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {1989#false} is VALID [2020-07-29 03:08:45,688 INFO L280 TraceCheckUtils]: 21: Hoare triple {1989#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {1989#false} is VALID [2020-07-29 03:08:45,688 INFO L280 TraceCheckUtils]: 22: Hoare triple {1989#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {1989#false} is VALID [2020-07-29 03:08:45,688 INFO L280 TraceCheckUtils]: 23: Hoare triple {1989#false} assume !(0 != activate_threads_~tmp___0~0); {1989#false} is VALID [2020-07-29 03:08:45,689 INFO L280 TraceCheckUtils]: 24: Hoare triple {1989#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {1989#false} is VALID [2020-07-29 03:08:45,689 INFO L280 TraceCheckUtils]: 25: Hoare triple {1989#false} assume !(1 == ~t2_pc~0); {1989#false} is VALID [2020-07-29 03:08:45,689 INFO L280 TraceCheckUtils]: 26: Hoare triple {1989#false} is_transmit2_triggered_~__retres1~2 := 0; {1989#false} is VALID [2020-07-29 03:08:45,689 INFO L280 TraceCheckUtils]: 27: Hoare triple {1989#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {1989#false} is VALID [2020-07-29 03:08:45,689 INFO L280 TraceCheckUtils]: 28: Hoare triple {1989#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {1989#false} is VALID [2020-07-29 03:08:45,690 INFO L280 TraceCheckUtils]: 29: Hoare triple {1989#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {1989#false} is VALID [2020-07-29 03:08:45,690 INFO L280 TraceCheckUtils]: 30: Hoare triple {1989#false} assume !(1 == ~M_E~0); {1989#false} is VALID [2020-07-29 03:08:45,690 INFO L280 TraceCheckUtils]: 31: Hoare triple {1989#false} assume !(1 == ~T1_E~0); {1989#false} is VALID [2020-07-29 03:08:45,691 INFO L280 TraceCheckUtils]: 32: Hoare triple {1989#false} assume !(1 == ~T2_E~0); {1989#false} is VALID [2020-07-29 03:08:45,691 INFO L280 TraceCheckUtils]: 33: Hoare triple {1989#false} assume !(1 == ~E_M~0); {1989#false} is VALID [2020-07-29 03:08:45,691 INFO L280 TraceCheckUtils]: 34: Hoare triple {1989#false} assume 1 == ~E_1~0;~E_1~0 := 2; {1989#false} is VALID [2020-07-29 03:08:45,692 INFO L280 TraceCheckUtils]: 35: Hoare triple {1989#false} assume !(1 == ~E_2~0); {1989#false} is VALID [2020-07-29 03:08:45,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:45,694 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541770916] [2020-07-29 03:08:45,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:45,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-07-29 03:08:45,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806227348] [2020-07-29 03:08:45,695 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:45,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:45,696 INFO L82 PathProgramCache]: Analyzing trace with hash -1082303670, now seen corresponding path program 2 times [2020-07-29 03:08:45,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:45,696 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233684222] [2020-07-29 03:08:45,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:45,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:45,774 INFO L280 TraceCheckUtils]: 0: Hoare triple {1991#true} assume !false; {1991#true} is VALID [2020-07-29 03:08:45,774 INFO L280 TraceCheckUtils]: 1: Hoare triple {1991#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {1991#true} is VALID [2020-07-29 03:08:45,774 INFO L280 TraceCheckUtils]: 2: Hoare triple {1991#true} assume !false; {1991#true} is VALID [2020-07-29 03:08:45,775 INFO L280 TraceCheckUtils]: 3: Hoare triple {1991#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {1991#true} is VALID [2020-07-29 03:08:45,776 INFO L280 TraceCheckUtils]: 4: Hoare triple {1991#true} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {1993#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} is VALID [2020-07-29 03:08:45,777 INFO L280 TraceCheckUtils]: 5: Hoare triple {1993#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {1994#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} is VALID [2020-07-29 03:08:45,777 INFO L280 TraceCheckUtils]: 6: Hoare triple {1994#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {1995#(<= 1 ULTIMATE.start_eval_~tmp~0)} is VALID [2020-07-29 03:08:45,778 INFO L280 TraceCheckUtils]: 7: Hoare triple {1995#(<= 1 ULTIMATE.start_eval_~tmp~0)} assume !(0 != eval_~tmp~0); {1992#false} is VALID [2020-07-29 03:08:45,778 INFO L280 TraceCheckUtils]: 8: Hoare triple {1992#false} start_simulation_~kernel_st~0 := 2; {1992#false} is VALID [2020-07-29 03:08:45,778 INFO L280 TraceCheckUtils]: 9: Hoare triple {1992#false} start_simulation_~kernel_st~0 := 3; {1992#false} is VALID [2020-07-29 03:08:45,779 INFO L280 TraceCheckUtils]: 10: Hoare triple {1992#false} assume 0 == ~M_E~0;~M_E~0 := 1; {1992#false} is VALID [2020-07-29 03:08:45,779 INFO L280 TraceCheckUtils]: 11: Hoare triple {1992#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {1992#false} is VALID [2020-07-29 03:08:45,779 INFO L280 TraceCheckUtils]: 12: Hoare triple {1992#false} assume !(0 == ~T2_E~0); {1992#false} is VALID [2020-07-29 03:08:45,779 INFO L280 TraceCheckUtils]: 13: Hoare triple {1992#false} assume 0 == ~E_M~0;~E_M~0 := 1; {1992#false} is VALID [2020-07-29 03:08:45,779 INFO L280 TraceCheckUtils]: 14: Hoare triple {1992#false} assume 0 == ~E_1~0;~E_1~0 := 1; {1992#false} is VALID [2020-07-29 03:08:45,780 INFO L280 TraceCheckUtils]: 15: Hoare triple {1992#false} assume 0 == ~E_2~0;~E_2~0 := 1; {1992#false} is VALID [2020-07-29 03:08:45,780 INFO L280 TraceCheckUtils]: 16: Hoare triple {1992#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {1992#false} is VALID [2020-07-29 03:08:45,780 INFO L280 TraceCheckUtils]: 17: Hoare triple {1992#false} assume 1 == ~m_pc~0; {1992#false} is VALID [2020-07-29 03:08:45,781 INFO L280 TraceCheckUtils]: 18: Hoare triple {1992#false} assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; {1992#false} is VALID [2020-07-29 03:08:45,781 INFO L280 TraceCheckUtils]: 19: Hoare triple {1992#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {1992#false} is VALID [2020-07-29 03:08:45,781 INFO L280 TraceCheckUtils]: 20: Hoare triple {1992#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {1992#false} is VALID [2020-07-29 03:08:45,781 INFO L280 TraceCheckUtils]: 21: Hoare triple {1992#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {1992#false} is VALID [2020-07-29 03:08:45,782 INFO L280 TraceCheckUtils]: 22: Hoare triple {1992#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {1992#false} is VALID [2020-07-29 03:08:45,782 INFO L280 TraceCheckUtils]: 23: Hoare triple {1992#false} assume 1 == ~t1_pc~0; {1992#false} is VALID [2020-07-29 03:08:45,782 INFO L280 TraceCheckUtils]: 24: Hoare triple {1992#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {1992#false} is VALID [2020-07-29 03:08:45,782 INFO L280 TraceCheckUtils]: 25: Hoare triple {1992#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {1992#false} is VALID [2020-07-29 03:08:45,783 INFO L280 TraceCheckUtils]: 26: Hoare triple {1992#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {1992#false} is VALID [2020-07-29 03:08:45,783 INFO L280 TraceCheckUtils]: 27: Hoare triple {1992#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {1992#false} is VALID [2020-07-29 03:08:45,783 INFO L280 TraceCheckUtils]: 28: Hoare triple {1992#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {1992#false} is VALID [2020-07-29 03:08:45,783 INFO L280 TraceCheckUtils]: 29: Hoare triple {1992#false} assume 1 == ~t2_pc~0; {1992#false} is VALID [2020-07-29 03:08:45,783 INFO L280 TraceCheckUtils]: 30: Hoare triple {1992#false} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {1992#false} is VALID [2020-07-29 03:08:45,784 INFO L280 TraceCheckUtils]: 31: Hoare triple {1992#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {1992#false} is VALID [2020-07-29 03:08:45,784 INFO L280 TraceCheckUtils]: 32: Hoare triple {1992#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {1992#false} is VALID [2020-07-29 03:08:45,784 INFO L280 TraceCheckUtils]: 33: Hoare triple {1992#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {1992#false} is VALID [2020-07-29 03:08:45,784 INFO L280 TraceCheckUtils]: 34: Hoare triple {1992#false} assume !(1 == ~M_E~0); {1992#false} is VALID [2020-07-29 03:08:45,785 INFO L280 TraceCheckUtils]: 35: Hoare triple {1992#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {1992#false} is VALID [2020-07-29 03:08:45,785 INFO L280 TraceCheckUtils]: 36: Hoare triple {1992#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {1992#false} is VALID [2020-07-29 03:08:45,785 INFO L280 TraceCheckUtils]: 37: Hoare triple {1992#false} assume 1 == ~E_M~0;~E_M~0 := 2; {1992#false} is VALID [2020-07-29 03:08:45,786 INFO L280 TraceCheckUtils]: 38: Hoare triple {1992#false} assume 1 == ~E_1~0;~E_1~0 := 2; {1992#false} is VALID [2020-07-29 03:08:45,786 INFO L280 TraceCheckUtils]: 39: Hoare triple {1992#false} assume 1 == ~E_2~0;~E_2~0 := 2; {1992#false} is VALID [2020-07-29 03:08:45,786 INFO L280 TraceCheckUtils]: 40: Hoare triple {1992#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {1992#false} is VALID [2020-07-29 03:08:45,786 INFO L280 TraceCheckUtils]: 41: Hoare triple {1992#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {1992#false} is VALID [2020-07-29 03:08:45,787 INFO L280 TraceCheckUtils]: 42: Hoare triple {1992#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {1992#false} is VALID [2020-07-29 03:08:45,787 INFO L280 TraceCheckUtils]: 43: Hoare triple {1992#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {1992#false} is VALID [2020-07-29 03:08:45,787 INFO L280 TraceCheckUtils]: 44: Hoare triple {1992#false} assume !(0 == start_simulation_~tmp~3); {1992#false} is VALID [2020-07-29 03:08:45,788 INFO L280 TraceCheckUtils]: 45: Hoare triple {1992#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {1992#false} is VALID [2020-07-29 03:08:45,788 INFO L280 TraceCheckUtils]: 46: Hoare triple {1992#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {1992#false} is VALID [2020-07-29 03:08:45,788 INFO L280 TraceCheckUtils]: 47: Hoare triple {1992#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {1992#false} is VALID [2020-07-29 03:08:45,788 INFO L280 TraceCheckUtils]: 48: Hoare triple {1992#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {1992#false} is VALID [2020-07-29 03:08:45,789 INFO L280 TraceCheckUtils]: 49: Hoare triple {1992#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {1992#false} is VALID [2020-07-29 03:08:45,789 INFO L280 TraceCheckUtils]: 50: Hoare triple {1992#false} stop_simulation_#res := stop_simulation_~__retres2~0; {1992#false} is VALID [2020-07-29 03:08:45,789 INFO L280 TraceCheckUtils]: 51: Hoare triple {1992#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {1992#false} is VALID [2020-07-29 03:08:45,790 INFO L280 TraceCheckUtils]: 52: Hoare triple {1992#false} assume !(0 != start_simulation_~tmp___0~1); {1992#false} is VALID [2020-07-29 03:08:45,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:45,792 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233684222] [2020-07-29 03:08:45,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:45,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:45,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787916154] [2020-07-29 03:08:45,794 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:45,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:45,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:45,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:45,795 INFO L87 Difference]: Start difference. First operand 217 states and 330 transitions. cyclomatic complexity: 114 Second operand 3 states. [2020-07-29 03:08:46,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:46,268 INFO L93 Difference]: Finished difference Result 383 states and 570 transitions. [2020-07-29 03:08:46,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:46,268 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:46,306 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:46,306 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 383 states and 570 transitions. [2020-07-29 03:08:46,324 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 343 [2020-07-29 03:08:46,340 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 383 states to 383 states and 570 transitions. [2020-07-29 03:08:46,340 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 383 [2020-07-29 03:08:46,341 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 383 [2020-07-29 03:08:46,341 INFO L73 IsDeterministic]: Start isDeterministic. Operand 383 states and 570 transitions. [2020-07-29 03:08:46,342 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:46,342 INFO L688 BuchiCegarLoop]: Abstraction has 383 states and 570 transitions. [2020-07-29 03:08:46,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states and 570 transitions. [2020-07-29 03:08:46,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 364. [2020-07-29 03:08:46,354 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:46,354 INFO L82 GeneralOperation]: Start isEquivalent. First operand 383 states and 570 transitions. Second operand 364 states. [2020-07-29 03:08:46,354 INFO L74 IsIncluded]: Start isIncluded. First operand 383 states and 570 transitions. Second operand 364 states. [2020-07-29 03:08:46,354 INFO L87 Difference]: Start difference. First operand 383 states and 570 transitions. Second operand 364 states. [2020-07-29 03:08:46,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:46,370 INFO L93 Difference]: Finished difference Result 383 states and 570 transitions. [2020-07-29 03:08:46,370 INFO L276 IsEmpty]: Start isEmpty. Operand 383 states and 570 transitions. [2020-07-29 03:08:46,371 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:46,371 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:46,371 INFO L74 IsIncluded]: Start isIncluded. First operand 364 states. Second operand 383 states and 570 transitions. [2020-07-29 03:08:46,371 INFO L87 Difference]: Start difference. First operand 364 states. Second operand 383 states and 570 transitions. [2020-07-29 03:08:46,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:46,387 INFO L93 Difference]: Finished difference Result 383 states and 570 transitions. [2020-07-29 03:08:46,387 INFO L276 IsEmpty]: Start isEmpty. Operand 383 states and 570 transitions. [2020-07-29 03:08:46,388 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:46,388 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:46,388 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:46,389 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:46,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2020-07-29 03:08:46,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 544 transitions. [2020-07-29 03:08:46,402 INFO L711 BuchiCegarLoop]: Abstraction has 364 states and 544 transitions. [2020-07-29 03:08:46,402 INFO L591 BuchiCegarLoop]: Abstraction has 364 states and 544 transitions. [2020-07-29 03:08:46,402 INFO L424 BuchiCegarLoop]: ======== Iteration 4============ [2020-07-29 03:08:46,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 544 transitions. [2020-07-29 03:08:46,405 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 324 [2020-07-29 03:08:46,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:46,405 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:46,406 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:46,407 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:46,407 INFO L794 eck$LassoCheckResult]: Stem: 2541#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 2390#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 2391#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2525#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 2526#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2571#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 2572#L243-1 assume !(0 == ~M_E~0); 2558#L346-1 assume !(0 == ~T1_E~0); 2392#L351-1 assume !(0 == ~T2_E~0); 2393#L356-1 assume !(0 == ~E_M~0); 2441#L361-1 assume !(0 == ~E_1~0); 2479#L366-1 assume !(0 == ~E_2~0); 2604#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2595#L168 assume !(1 == ~m_pc~0); 2591#L168-2 is_master_triggered_~__retres1~0 := 0; 2592#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2433#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 2434#L427 assume !(0 != activate_threads_~tmp~1); 2470#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2471#L187 assume 1 == ~t1_pc~0; 2533#L188 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 2536#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2537#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 2520#L435 assume !(0 != activate_threads_~tmp___0~0); 2521#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2527#L206 assume !(1 == ~t2_pc~0); 2451#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 2450#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2452#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 2453#L443 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 2601#L443-2 assume !(1 == ~M_E~0); 2435#L384-1 assume !(1 == ~T1_E~0); 2436#L389-1 assume !(1 == ~T2_E~0); 2440#L394-1 assume !(1 == ~E_M~0); 2472#L399-1 assume 1 == ~E_1~0;~E_1~0 := 2; 2602#L404-1 assume !(1 == ~E_2~0); 2388#L555-1 [2020-07-29 03:08:46,407 INFO L796 eck$LassoCheckResult]: Loop: 2388#L555-1 assume !false; 2389#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 2395#L321 assume !false; 2461#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2462#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2458#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2383#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 2384#L288 assume !(0 != eval_~tmp~0); 2530#L336 start_simulation_~kernel_st~0 := 2; 2522#L226-1 start_simulation_~kernel_st~0 := 3; 2523#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2559#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 2402#L351-3 assume !(0 == ~T2_E~0); 2403#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 2443#L361-3 assume 0 == ~E_1~0;~E_1~0 := 1; 2491#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 2607#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2459#L168-12 assume !(1 == ~m_pc~0); 2460#L168-14 is_master_triggered_~__retres1~0 := 0; 2586#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2587#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 2742#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 2741#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2740#L187-12 assume 1 == ~t1_pc~0; 2738#L188-4 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 2545#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2546#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 2737#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 2736#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2735#L206-12 assume !(1 == ~t2_pc~0); 2733#L206-14 is_transmit2_triggered_~__retres1~2 := 0; 2732#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2731#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 2600#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 2590#L443-14 assume !(1 == ~M_E~0); 2399#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2400#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 2442#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 2486#L399-3 assume 1 == ~E_1~0;~E_1~0 := 2; 2605#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 2562#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2563#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2456#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2381#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 2382#L574 assume !(0 == start_simulation_~tmp~3); 2565#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 2567#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 2448#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 2379#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 2380#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2584#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 2588#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2465#L587 assume !(0 != start_simulation_~tmp___0~1); 2388#L555-1 [2020-07-29 03:08:46,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:46,408 INFO L82 PathProgramCache]: Analyzing trace with hash -1569365981, now seen corresponding path program 1 times [2020-07-29 03:08:46,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:46,409 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678648164] [2020-07-29 03:08:46,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:46,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:46,476 INFO L280 TraceCheckUtils]: 0: Hoare triple {3512#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,476 INFO L280 TraceCheckUtils]: 1: Hoare triple {3514#(<= ~t1_pc~0 0)} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,477 INFO L280 TraceCheckUtils]: 2: Hoare triple {3514#(<= ~t1_pc~0 0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,477 INFO L280 TraceCheckUtils]: 3: Hoare triple {3514#(<= ~t1_pc~0 0)} assume 1 == ~m_i~0;~m_st~0 := 0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,478 INFO L280 TraceCheckUtils]: 4: Hoare triple {3514#(<= ~t1_pc~0 0)} assume 1 == ~t1_i~0;~t1_st~0 := 0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,478 INFO L280 TraceCheckUtils]: 5: Hoare triple {3514#(<= ~t1_pc~0 0)} assume 1 == ~t2_i~0;~t2_st~0 := 0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,478 INFO L280 TraceCheckUtils]: 6: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 == ~M_E~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,479 INFO L280 TraceCheckUtils]: 7: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 == ~T1_E~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,479 INFO L280 TraceCheckUtils]: 8: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 == ~T2_E~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,480 INFO L280 TraceCheckUtils]: 9: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 == ~E_M~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,480 INFO L280 TraceCheckUtils]: 10: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 == ~E_1~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,480 INFO L280 TraceCheckUtils]: 11: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 == ~E_2~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,481 INFO L280 TraceCheckUtils]: 12: Hoare triple {3514#(<= ~t1_pc~0 0)} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,482 INFO L280 TraceCheckUtils]: 13: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(1 == ~m_pc~0); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,482 INFO L280 TraceCheckUtils]: 14: Hoare triple {3514#(<= ~t1_pc~0 0)} is_master_triggered_~__retres1~0 := 0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,483 INFO L280 TraceCheckUtils]: 15: Hoare triple {3514#(<= ~t1_pc~0 0)} is_master_triggered_#res := is_master_triggered_~__retres1~0; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,484 INFO L280 TraceCheckUtils]: 16: Hoare triple {3514#(<= ~t1_pc~0 0)} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,485 INFO L280 TraceCheckUtils]: 17: Hoare triple {3514#(<= ~t1_pc~0 0)} assume !(0 != activate_threads_~tmp~1); {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,486 INFO L280 TraceCheckUtils]: 18: Hoare triple {3514#(<= ~t1_pc~0 0)} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {3514#(<= ~t1_pc~0 0)} is VALID [2020-07-29 03:08:46,487 INFO L280 TraceCheckUtils]: 19: Hoare triple {3514#(<= ~t1_pc~0 0)} assume 1 == ~t1_pc~0; {3513#false} is VALID [2020-07-29 03:08:46,487 INFO L280 TraceCheckUtils]: 20: Hoare triple {3513#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {3513#false} is VALID [2020-07-29 03:08:46,487 INFO L280 TraceCheckUtils]: 21: Hoare triple {3513#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {3513#false} is VALID [2020-07-29 03:08:46,488 INFO L280 TraceCheckUtils]: 22: Hoare triple {3513#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {3513#false} is VALID [2020-07-29 03:08:46,488 INFO L280 TraceCheckUtils]: 23: Hoare triple {3513#false} assume !(0 != activate_threads_~tmp___0~0); {3513#false} is VALID [2020-07-29 03:08:46,488 INFO L280 TraceCheckUtils]: 24: Hoare triple {3513#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {3513#false} is VALID [2020-07-29 03:08:46,488 INFO L280 TraceCheckUtils]: 25: Hoare triple {3513#false} assume !(1 == ~t2_pc~0); {3513#false} is VALID [2020-07-29 03:08:46,489 INFO L280 TraceCheckUtils]: 26: Hoare triple {3513#false} is_transmit2_triggered_~__retres1~2 := 0; {3513#false} is VALID [2020-07-29 03:08:46,489 INFO L280 TraceCheckUtils]: 27: Hoare triple {3513#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {3513#false} is VALID [2020-07-29 03:08:46,489 INFO L280 TraceCheckUtils]: 28: Hoare triple {3513#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {3513#false} is VALID [2020-07-29 03:08:46,489 INFO L280 TraceCheckUtils]: 29: Hoare triple {3513#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {3513#false} is VALID [2020-07-29 03:08:46,489 INFO L280 TraceCheckUtils]: 30: Hoare triple {3513#false} assume !(1 == ~M_E~0); {3513#false} is VALID [2020-07-29 03:08:46,490 INFO L280 TraceCheckUtils]: 31: Hoare triple {3513#false} assume !(1 == ~T1_E~0); {3513#false} is VALID [2020-07-29 03:08:46,490 INFO L280 TraceCheckUtils]: 32: Hoare triple {3513#false} assume !(1 == ~T2_E~0); {3513#false} is VALID [2020-07-29 03:08:46,490 INFO L280 TraceCheckUtils]: 33: Hoare triple {3513#false} assume !(1 == ~E_M~0); {3513#false} is VALID [2020-07-29 03:08:46,490 INFO L280 TraceCheckUtils]: 34: Hoare triple {3513#false} assume 1 == ~E_1~0;~E_1~0 := 2; {3513#false} is VALID [2020-07-29 03:08:46,490 INFO L280 TraceCheckUtils]: 35: Hoare triple {3513#false} assume !(1 == ~E_2~0); {3513#false} is VALID [2020-07-29 03:08:46,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:46,492 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [678648164] [2020-07-29 03:08:46,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:46,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-07-29 03:08:46,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852118203] [2020-07-29 03:08:46,494 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:46,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:46,494 INFO L82 PathProgramCache]: Analyzing trace with hash -142547960, now seen corresponding path program 1 times [2020-07-29 03:08:46,494 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:46,495 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063782443] [2020-07-29 03:08:46,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:46,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:46,542 INFO L280 TraceCheckUtils]: 0: Hoare triple {3515#true} assume !false; {3515#true} is VALID [2020-07-29 03:08:46,542 INFO L280 TraceCheckUtils]: 1: Hoare triple {3515#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {3515#true} is VALID [2020-07-29 03:08:46,542 INFO L280 TraceCheckUtils]: 2: Hoare triple {3515#true} assume !false; {3515#true} is VALID [2020-07-29 03:08:46,543 INFO L280 TraceCheckUtils]: 3: Hoare triple {3515#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {3515#true} is VALID [2020-07-29 03:08:46,544 INFO L280 TraceCheckUtils]: 4: Hoare triple {3515#true} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {3517#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} is VALID [2020-07-29 03:08:46,544 INFO L280 TraceCheckUtils]: 5: Hoare triple {3517#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {3518#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} is VALID [2020-07-29 03:08:46,545 INFO L280 TraceCheckUtils]: 6: Hoare triple {3518#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {3519#(<= 1 ULTIMATE.start_eval_~tmp~0)} is VALID [2020-07-29 03:08:46,546 INFO L280 TraceCheckUtils]: 7: Hoare triple {3519#(<= 1 ULTIMATE.start_eval_~tmp~0)} assume !(0 != eval_~tmp~0); {3516#false} is VALID [2020-07-29 03:08:46,546 INFO L280 TraceCheckUtils]: 8: Hoare triple {3516#false} start_simulation_~kernel_st~0 := 2; {3516#false} is VALID [2020-07-29 03:08:46,546 INFO L280 TraceCheckUtils]: 9: Hoare triple {3516#false} start_simulation_~kernel_st~0 := 3; {3516#false} is VALID [2020-07-29 03:08:46,546 INFO L280 TraceCheckUtils]: 10: Hoare triple {3516#false} assume 0 == ~M_E~0;~M_E~0 := 1; {3516#false} is VALID [2020-07-29 03:08:46,547 INFO L280 TraceCheckUtils]: 11: Hoare triple {3516#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {3516#false} is VALID [2020-07-29 03:08:46,547 INFO L280 TraceCheckUtils]: 12: Hoare triple {3516#false} assume !(0 == ~T2_E~0); {3516#false} is VALID [2020-07-29 03:08:46,547 INFO L280 TraceCheckUtils]: 13: Hoare triple {3516#false} assume 0 == ~E_M~0;~E_M~0 := 1; {3516#false} is VALID [2020-07-29 03:08:46,547 INFO L280 TraceCheckUtils]: 14: Hoare triple {3516#false} assume 0 == ~E_1~0;~E_1~0 := 1; {3516#false} is VALID [2020-07-29 03:08:46,547 INFO L280 TraceCheckUtils]: 15: Hoare triple {3516#false} assume 0 == ~E_2~0;~E_2~0 := 1; {3516#false} is VALID [2020-07-29 03:08:46,548 INFO L280 TraceCheckUtils]: 16: Hoare triple {3516#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {3516#false} is VALID [2020-07-29 03:08:46,548 INFO L280 TraceCheckUtils]: 17: Hoare triple {3516#false} assume !(1 == ~m_pc~0); {3516#false} is VALID [2020-07-29 03:08:46,548 INFO L280 TraceCheckUtils]: 18: Hoare triple {3516#false} is_master_triggered_~__retres1~0 := 0; {3516#false} is VALID [2020-07-29 03:08:46,548 INFO L280 TraceCheckUtils]: 19: Hoare triple {3516#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {3516#false} is VALID [2020-07-29 03:08:46,548 INFO L280 TraceCheckUtils]: 20: Hoare triple {3516#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {3516#false} is VALID [2020-07-29 03:08:46,549 INFO L280 TraceCheckUtils]: 21: Hoare triple {3516#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {3516#false} is VALID [2020-07-29 03:08:46,549 INFO L280 TraceCheckUtils]: 22: Hoare triple {3516#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {3516#false} is VALID [2020-07-29 03:08:46,549 INFO L280 TraceCheckUtils]: 23: Hoare triple {3516#false} assume 1 == ~t1_pc~0; {3516#false} is VALID [2020-07-29 03:08:46,550 INFO L280 TraceCheckUtils]: 24: Hoare triple {3516#false} assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; {3516#false} is VALID [2020-07-29 03:08:46,550 INFO L280 TraceCheckUtils]: 25: Hoare triple {3516#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {3516#false} is VALID [2020-07-29 03:08:46,550 INFO L280 TraceCheckUtils]: 26: Hoare triple {3516#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {3516#false} is VALID [2020-07-29 03:08:46,550 INFO L280 TraceCheckUtils]: 27: Hoare triple {3516#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {3516#false} is VALID [2020-07-29 03:08:46,550 INFO L280 TraceCheckUtils]: 28: Hoare triple {3516#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {3516#false} is VALID [2020-07-29 03:08:46,550 INFO L280 TraceCheckUtils]: 29: Hoare triple {3516#false} assume !(1 == ~t2_pc~0); {3516#false} is VALID [2020-07-29 03:08:46,551 INFO L280 TraceCheckUtils]: 30: Hoare triple {3516#false} is_transmit2_triggered_~__retres1~2 := 0; {3516#false} is VALID [2020-07-29 03:08:46,551 INFO L280 TraceCheckUtils]: 31: Hoare triple {3516#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {3516#false} is VALID [2020-07-29 03:08:46,551 INFO L280 TraceCheckUtils]: 32: Hoare triple {3516#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {3516#false} is VALID [2020-07-29 03:08:46,551 INFO L280 TraceCheckUtils]: 33: Hoare triple {3516#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {3516#false} is VALID [2020-07-29 03:08:46,551 INFO L280 TraceCheckUtils]: 34: Hoare triple {3516#false} assume !(1 == ~M_E~0); {3516#false} is VALID [2020-07-29 03:08:46,552 INFO L280 TraceCheckUtils]: 35: Hoare triple {3516#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {3516#false} is VALID [2020-07-29 03:08:46,552 INFO L280 TraceCheckUtils]: 36: Hoare triple {3516#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {3516#false} is VALID [2020-07-29 03:08:46,552 INFO L280 TraceCheckUtils]: 37: Hoare triple {3516#false} assume 1 == ~E_M~0;~E_M~0 := 2; {3516#false} is VALID [2020-07-29 03:08:46,553 INFO L280 TraceCheckUtils]: 38: Hoare triple {3516#false} assume 1 == ~E_1~0;~E_1~0 := 2; {3516#false} is VALID [2020-07-29 03:08:46,553 INFO L280 TraceCheckUtils]: 39: Hoare triple {3516#false} assume 1 == ~E_2~0;~E_2~0 := 2; {3516#false} is VALID [2020-07-29 03:08:46,553 INFO L280 TraceCheckUtils]: 40: Hoare triple {3516#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {3516#false} is VALID [2020-07-29 03:08:46,553 INFO L280 TraceCheckUtils]: 41: Hoare triple {3516#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {3516#false} is VALID [2020-07-29 03:08:46,554 INFO L280 TraceCheckUtils]: 42: Hoare triple {3516#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {3516#false} is VALID [2020-07-29 03:08:46,554 INFO L280 TraceCheckUtils]: 43: Hoare triple {3516#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {3516#false} is VALID [2020-07-29 03:08:46,554 INFO L280 TraceCheckUtils]: 44: Hoare triple {3516#false} assume !(0 == start_simulation_~tmp~3); {3516#false} is VALID [2020-07-29 03:08:46,555 INFO L280 TraceCheckUtils]: 45: Hoare triple {3516#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {3516#false} is VALID [2020-07-29 03:08:46,555 INFO L280 TraceCheckUtils]: 46: Hoare triple {3516#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {3516#false} is VALID [2020-07-29 03:08:46,555 INFO L280 TraceCheckUtils]: 47: Hoare triple {3516#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {3516#false} is VALID [2020-07-29 03:08:46,555 INFO L280 TraceCheckUtils]: 48: Hoare triple {3516#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {3516#false} is VALID [2020-07-29 03:08:46,556 INFO L280 TraceCheckUtils]: 49: Hoare triple {3516#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {3516#false} is VALID [2020-07-29 03:08:46,556 INFO L280 TraceCheckUtils]: 50: Hoare triple {3516#false} stop_simulation_#res := stop_simulation_~__retres2~0; {3516#false} is VALID [2020-07-29 03:08:46,556 INFO L280 TraceCheckUtils]: 51: Hoare triple {3516#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {3516#false} is VALID [2020-07-29 03:08:46,556 INFO L280 TraceCheckUtils]: 52: Hoare triple {3516#false} assume !(0 != start_simulation_~tmp___0~1); {3516#false} is VALID [2020-07-29 03:08:46,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:46,559 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2063782443] [2020-07-29 03:08:46,559 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:46,559 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:46,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852981669] [2020-07-29 03:08:46,560 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:46,560 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:46,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:46,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:46,561 INFO L87 Difference]: Start difference. First operand 364 states and 544 transitions. cyclomatic complexity: 182 Second operand 3 states. [2020-07-29 03:08:47,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:47,057 INFO L93 Difference]: Finished difference Result 639 states and 945 transitions. [2020-07-29 03:08:47,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:47,057 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:47,100 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:47,100 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 639 states and 945 transitions. [2020-07-29 03:08:47,139 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 594 [2020-07-29 03:08:47,177 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 639 states to 639 states and 945 transitions. [2020-07-29 03:08:47,177 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 639 [2020-07-29 03:08:47,178 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 639 [2020-07-29 03:08:47,178 INFO L73 IsDeterministic]: Start isDeterministic. Operand 639 states and 945 transitions. [2020-07-29 03:08:47,179 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:47,179 INFO L688 BuchiCegarLoop]: Abstraction has 639 states and 945 transitions. [2020-07-29 03:08:47,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 639 states and 945 transitions. [2020-07-29 03:08:47,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 639 to 635. [2020-07-29 03:08:47,193 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:47,193 INFO L82 GeneralOperation]: Start isEquivalent. First operand 639 states and 945 transitions. Second operand 635 states. [2020-07-29 03:08:47,194 INFO L74 IsIncluded]: Start isIncluded. First operand 639 states and 945 transitions. Second operand 635 states. [2020-07-29 03:08:47,194 INFO L87 Difference]: Start difference. First operand 639 states and 945 transitions. Second operand 635 states. [2020-07-29 03:08:47,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:47,220 INFO L93 Difference]: Finished difference Result 639 states and 945 transitions. [2020-07-29 03:08:47,220 INFO L276 IsEmpty]: Start isEmpty. Operand 639 states and 945 transitions. [2020-07-29 03:08:47,221 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:47,222 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:47,222 INFO L74 IsIncluded]: Start isIncluded. First operand 635 states. Second operand 639 states and 945 transitions. [2020-07-29 03:08:47,222 INFO L87 Difference]: Start difference. First operand 635 states. Second operand 639 states and 945 transitions. [2020-07-29 03:08:47,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:47,247 INFO L93 Difference]: Finished difference Result 639 states and 945 transitions. [2020-07-29 03:08:47,247 INFO L276 IsEmpty]: Start isEmpty. Operand 639 states and 945 transitions. [2020-07-29 03:08:47,250 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:47,251 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:47,251 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:47,251 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:47,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 635 states. [2020-07-29 03:08:47,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 635 states to 635 states and 941 transitions. [2020-07-29 03:08:47,276 INFO L711 BuchiCegarLoop]: Abstraction has 635 states and 941 transitions. [2020-07-29 03:08:47,276 INFO L591 BuchiCegarLoop]: Abstraction has 635 states and 941 transitions. [2020-07-29 03:08:47,276 INFO L424 BuchiCegarLoop]: ======== Iteration 5============ [2020-07-29 03:08:47,276 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 635 states and 941 transitions. [2020-07-29 03:08:47,281 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 590 [2020-07-29 03:08:47,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:47,281 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:47,282 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:47,283 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:47,283 INFO L794 eck$LassoCheckResult]: Stem: 4323#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 4170#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 4171#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4307#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 4308#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 4355#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 4356#L243-1 assume !(0 == ~M_E~0); 4338#L346-1 assume !(0 == ~T1_E~0); 4172#L351-1 assume !(0 == ~T2_E~0); 4173#L356-1 assume !(0 == ~E_M~0); 4221#L361-1 assume !(0 == ~E_1~0); 4257#L366-1 assume !(0 == ~E_2~0); 4397#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4387#L168 assume !(1 == ~m_pc~0); 4382#L168-2 is_master_triggered_~__retres1~0 := 0; 4383#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4213#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 4214#L427 assume !(0 != activate_threads_~tmp~1); 4252#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4253#L187 assume !(1 == ~t1_pc~0); 4315#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 4317#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4318#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 4302#L435 assume !(0 != activate_threads_~tmp___0~0); 4303#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4309#L206 assume !(1 == ~t2_pc~0); 4231#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 4230#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 4232#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 4233#L443 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 4394#L443-2 assume !(1 == ~M_E~0); 4215#L384-1 assume !(1 == ~T1_E~0); 4216#L389-1 assume !(1 == ~T2_E~0); 4220#L394-1 assume !(1 == ~E_M~0); 4254#L399-1 assume 1 == ~E_1~0;~E_1~0 := 2; 4395#L404-1 assume !(1 == ~E_2~0); 4410#L555-1 [2020-07-29 03:08:47,283 INFO L796 eck$LassoCheckResult]: Loop: 4410#L555-1 assume !false; 4744#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 4175#L321 assume !false; 4743#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 4740#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 4739#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 4738#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 4703#L288 assume !(0 != eval_~tmp~0); 4311#L336 start_simulation_~kernel_st~0 := 2; 4304#L226-1 start_simulation_~kernel_st~0 := 3; 4305#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 4339#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 4182#L351-3 assume !(0 == ~T2_E~0); 4183#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 4223#L361-3 assume 0 == ~E_1~0;~E_1~0 := 1; 4274#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 4400#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4243#L168-12 assume !(1 == ~m_pc~0); 4234#L168-14 is_master_triggered_~__retres1~0 := 0; 4235#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4379#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 4248#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 4224#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4225#L187-12 assume !(1 == ~t1_pc~0); 4287#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 4310#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4327#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 4369#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 4376#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4378#L206-12 assume 1 == ~t2_pc~0; 4259#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 4260#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 4409#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 4718#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 4384#L443-14 assume !(1 == ~M_E~0); 4179#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4180#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 4222#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 4269#L399-3 assume 1 == ~E_1~0;~E_1~0 := 2; 4398#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 4411#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 4711#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 4709#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 4708#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 4707#L574 assume !(0 == start_simulation_~tmp~3); 4350#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 4351#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 4762#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 4761#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 4760#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4759#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 4758#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 4757#L587 assume !(0 != start_simulation_~tmp___0~1); 4410#L555-1 [2020-07-29 03:08:47,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:47,284 INFO L82 PathProgramCache]: Analyzing trace with hash 545629540, now seen corresponding path program 1 times [2020-07-29 03:08:47,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:47,285 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544956720] [2020-07-29 03:08:47,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:47,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:47,368 INFO L280 TraceCheckUtils]: 0: Hoare triple {6075#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,369 INFO L280 TraceCheckUtils]: 1: Hoare triple {6077#(<= 2 ~E_1~0)} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,369 INFO L280 TraceCheckUtils]: 2: Hoare triple {6077#(<= 2 ~E_1~0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,370 INFO L280 TraceCheckUtils]: 3: Hoare triple {6077#(<= 2 ~E_1~0)} assume 1 == ~m_i~0;~m_st~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,370 INFO L280 TraceCheckUtils]: 4: Hoare triple {6077#(<= 2 ~E_1~0)} assume 1 == ~t1_i~0;~t1_st~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,371 INFO L280 TraceCheckUtils]: 5: Hoare triple {6077#(<= 2 ~E_1~0)} assume 1 == ~t2_i~0;~t2_st~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,372 INFO L280 TraceCheckUtils]: 6: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 == ~M_E~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,372 INFO L280 TraceCheckUtils]: 7: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 == ~T1_E~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,373 INFO L280 TraceCheckUtils]: 8: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 == ~T2_E~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,373 INFO L280 TraceCheckUtils]: 9: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 == ~E_M~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,374 INFO L280 TraceCheckUtils]: 10: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 == ~E_1~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,375 INFO L280 TraceCheckUtils]: 11: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 == ~E_2~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,375 INFO L280 TraceCheckUtils]: 12: Hoare triple {6077#(<= 2 ~E_1~0)} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,376 INFO L280 TraceCheckUtils]: 13: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~m_pc~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,376 INFO L280 TraceCheckUtils]: 14: Hoare triple {6077#(<= 2 ~E_1~0)} is_master_triggered_~__retres1~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,377 INFO L280 TraceCheckUtils]: 15: Hoare triple {6077#(<= 2 ~E_1~0)} is_master_triggered_#res := is_master_triggered_~__retres1~0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,378 INFO L280 TraceCheckUtils]: 16: Hoare triple {6077#(<= 2 ~E_1~0)} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,378 INFO L280 TraceCheckUtils]: 17: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 != activate_threads_~tmp~1); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,379 INFO L280 TraceCheckUtils]: 18: Hoare triple {6077#(<= 2 ~E_1~0)} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,379 INFO L280 TraceCheckUtils]: 19: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~t1_pc~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,380 INFO L280 TraceCheckUtils]: 20: Hoare triple {6077#(<= 2 ~E_1~0)} is_transmit1_triggered_~__retres1~1 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,381 INFO L280 TraceCheckUtils]: 21: Hoare triple {6077#(<= 2 ~E_1~0)} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,381 INFO L280 TraceCheckUtils]: 22: Hoare triple {6077#(<= 2 ~E_1~0)} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,382 INFO L280 TraceCheckUtils]: 23: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(0 != activate_threads_~tmp___0~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,382 INFO L280 TraceCheckUtils]: 24: Hoare triple {6077#(<= 2 ~E_1~0)} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,384 INFO L280 TraceCheckUtils]: 25: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~t2_pc~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,385 INFO L280 TraceCheckUtils]: 26: Hoare triple {6077#(<= 2 ~E_1~0)} is_transmit2_triggered_~__retres1~2 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,385 INFO L280 TraceCheckUtils]: 27: Hoare triple {6077#(<= 2 ~E_1~0)} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,386 INFO L280 TraceCheckUtils]: 28: Hoare triple {6077#(<= 2 ~E_1~0)} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,387 INFO L280 TraceCheckUtils]: 29: Hoare triple {6077#(<= 2 ~E_1~0)} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,389 INFO L280 TraceCheckUtils]: 30: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~M_E~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,389 INFO L280 TraceCheckUtils]: 31: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~T1_E~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,390 INFO L280 TraceCheckUtils]: 32: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~T2_E~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,397 INFO L280 TraceCheckUtils]: 33: Hoare triple {6077#(<= 2 ~E_1~0)} assume !(1 == ~E_M~0); {6077#(<= 2 ~E_1~0)} is VALID [2020-07-29 03:08:47,398 INFO L280 TraceCheckUtils]: 34: Hoare triple {6077#(<= 2 ~E_1~0)} assume 1 == ~E_1~0;~E_1~0 := 2; {6076#false} is VALID [2020-07-29 03:08:47,398 INFO L280 TraceCheckUtils]: 35: Hoare triple {6076#false} assume !(1 == ~E_2~0); {6076#false} is VALID [2020-07-29 03:08:47,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:47,400 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1544956720] [2020-07-29 03:08:47,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:47,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-07-29 03:08:47,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440736573] [2020-07-29 03:08:47,401 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:47,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:47,401 INFO L82 PathProgramCache]: Analyzing trace with hash 1390702792, now seen corresponding path program 1 times [2020-07-29 03:08:47,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:47,401 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43368747] [2020-07-29 03:08:47,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:47,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:47,439 INFO L280 TraceCheckUtils]: 0: Hoare triple {6078#true} assume !false; {6078#true} is VALID [2020-07-29 03:08:47,440 INFO L280 TraceCheckUtils]: 1: Hoare triple {6078#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {6078#true} is VALID [2020-07-29 03:08:47,440 INFO L280 TraceCheckUtils]: 2: Hoare triple {6078#true} assume !false; {6078#true} is VALID [2020-07-29 03:08:47,440 INFO L280 TraceCheckUtils]: 3: Hoare triple {6078#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {6078#true} is VALID [2020-07-29 03:08:47,440 INFO L280 TraceCheckUtils]: 4: Hoare triple {6078#true} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {6080#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} is VALID [2020-07-29 03:08:47,441 INFO L280 TraceCheckUtils]: 5: Hoare triple {6080#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {6081#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} is VALID [2020-07-29 03:08:47,442 INFO L280 TraceCheckUtils]: 6: Hoare triple {6081#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {6082#(<= 1 ULTIMATE.start_eval_~tmp~0)} is VALID [2020-07-29 03:08:47,442 INFO L280 TraceCheckUtils]: 7: Hoare triple {6082#(<= 1 ULTIMATE.start_eval_~tmp~0)} assume !(0 != eval_~tmp~0); {6079#false} is VALID [2020-07-29 03:08:47,442 INFO L280 TraceCheckUtils]: 8: Hoare triple {6079#false} start_simulation_~kernel_st~0 := 2; {6079#false} is VALID [2020-07-29 03:08:47,443 INFO L280 TraceCheckUtils]: 9: Hoare triple {6079#false} start_simulation_~kernel_st~0 := 3; {6079#false} is VALID [2020-07-29 03:08:47,443 INFO L280 TraceCheckUtils]: 10: Hoare triple {6079#false} assume 0 == ~M_E~0;~M_E~0 := 1; {6079#false} is VALID [2020-07-29 03:08:47,443 INFO L280 TraceCheckUtils]: 11: Hoare triple {6079#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {6079#false} is VALID [2020-07-29 03:08:47,443 INFO L280 TraceCheckUtils]: 12: Hoare triple {6079#false} assume !(0 == ~T2_E~0); {6079#false} is VALID [2020-07-29 03:08:47,443 INFO L280 TraceCheckUtils]: 13: Hoare triple {6079#false} assume 0 == ~E_M~0;~E_M~0 := 1; {6079#false} is VALID [2020-07-29 03:08:47,443 INFO L280 TraceCheckUtils]: 14: Hoare triple {6079#false} assume 0 == ~E_1~0;~E_1~0 := 1; {6079#false} is VALID [2020-07-29 03:08:47,444 INFO L280 TraceCheckUtils]: 15: Hoare triple {6079#false} assume 0 == ~E_2~0;~E_2~0 := 1; {6079#false} is VALID [2020-07-29 03:08:47,444 INFO L280 TraceCheckUtils]: 16: Hoare triple {6079#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {6079#false} is VALID [2020-07-29 03:08:47,444 INFO L280 TraceCheckUtils]: 17: Hoare triple {6079#false} assume !(1 == ~m_pc~0); {6079#false} is VALID [2020-07-29 03:08:47,444 INFO L280 TraceCheckUtils]: 18: Hoare triple {6079#false} is_master_triggered_~__retres1~0 := 0; {6079#false} is VALID [2020-07-29 03:08:47,444 INFO L280 TraceCheckUtils]: 19: Hoare triple {6079#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {6079#false} is VALID [2020-07-29 03:08:47,445 INFO L280 TraceCheckUtils]: 20: Hoare triple {6079#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {6079#false} is VALID [2020-07-29 03:08:47,445 INFO L280 TraceCheckUtils]: 21: Hoare triple {6079#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {6079#false} is VALID [2020-07-29 03:08:47,445 INFO L280 TraceCheckUtils]: 22: Hoare triple {6079#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {6079#false} is VALID [2020-07-29 03:08:47,445 INFO L280 TraceCheckUtils]: 23: Hoare triple {6079#false} assume !(1 == ~t1_pc~0); {6079#false} is VALID [2020-07-29 03:08:47,445 INFO L280 TraceCheckUtils]: 24: Hoare triple {6079#false} is_transmit1_triggered_~__retres1~1 := 0; {6079#false} is VALID [2020-07-29 03:08:47,445 INFO L280 TraceCheckUtils]: 25: Hoare triple {6079#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {6079#false} is VALID [2020-07-29 03:08:47,446 INFO L280 TraceCheckUtils]: 26: Hoare triple {6079#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {6079#false} is VALID [2020-07-29 03:08:47,446 INFO L280 TraceCheckUtils]: 27: Hoare triple {6079#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {6079#false} is VALID [2020-07-29 03:08:47,446 INFO L280 TraceCheckUtils]: 28: Hoare triple {6079#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {6079#false} is VALID [2020-07-29 03:08:47,446 INFO L280 TraceCheckUtils]: 29: Hoare triple {6079#false} assume 1 == ~t2_pc~0; {6079#false} is VALID [2020-07-29 03:08:47,446 INFO L280 TraceCheckUtils]: 30: Hoare triple {6079#false} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {6079#false} is VALID [2020-07-29 03:08:47,447 INFO L280 TraceCheckUtils]: 31: Hoare triple {6079#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {6079#false} is VALID [2020-07-29 03:08:47,447 INFO L280 TraceCheckUtils]: 32: Hoare triple {6079#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {6079#false} is VALID [2020-07-29 03:08:47,447 INFO L280 TraceCheckUtils]: 33: Hoare triple {6079#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {6079#false} is VALID [2020-07-29 03:08:47,447 INFO L280 TraceCheckUtils]: 34: Hoare triple {6079#false} assume !(1 == ~M_E~0); {6079#false} is VALID [2020-07-29 03:08:47,447 INFO L280 TraceCheckUtils]: 35: Hoare triple {6079#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {6079#false} is VALID [2020-07-29 03:08:47,447 INFO L280 TraceCheckUtils]: 36: Hoare triple {6079#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {6079#false} is VALID [2020-07-29 03:08:47,448 INFO L280 TraceCheckUtils]: 37: Hoare triple {6079#false} assume 1 == ~E_M~0;~E_M~0 := 2; {6079#false} is VALID [2020-07-29 03:08:47,448 INFO L280 TraceCheckUtils]: 38: Hoare triple {6079#false} assume 1 == ~E_1~0;~E_1~0 := 2; {6079#false} is VALID [2020-07-29 03:08:47,448 INFO L280 TraceCheckUtils]: 39: Hoare triple {6079#false} assume 1 == ~E_2~0;~E_2~0 := 2; {6079#false} is VALID [2020-07-29 03:08:47,448 INFO L280 TraceCheckUtils]: 40: Hoare triple {6079#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {6079#false} is VALID [2020-07-29 03:08:47,448 INFO L280 TraceCheckUtils]: 41: Hoare triple {6079#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {6079#false} is VALID [2020-07-29 03:08:47,448 INFO L280 TraceCheckUtils]: 42: Hoare triple {6079#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {6079#false} is VALID [2020-07-29 03:08:47,449 INFO L280 TraceCheckUtils]: 43: Hoare triple {6079#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {6079#false} is VALID [2020-07-29 03:08:47,449 INFO L280 TraceCheckUtils]: 44: Hoare triple {6079#false} assume !(0 == start_simulation_~tmp~3); {6079#false} is VALID [2020-07-29 03:08:47,449 INFO L280 TraceCheckUtils]: 45: Hoare triple {6079#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {6079#false} is VALID [2020-07-29 03:08:47,449 INFO L280 TraceCheckUtils]: 46: Hoare triple {6079#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {6079#false} is VALID [2020-07-29 03:08:47,449 INFO L280 TraceCheckUtils]: 47: Hoare triple {6079#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {6079#false} is VALID [2020-07-29 03:08:47,450 INFO L280 TraceCheckUtils]: 48: Hoare triple {6079#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {6079#false} is VALID [2020-07-29 03:08:47,450 INFO L280 TraceCheckUtils]: 49: Hoare triple {6079#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {6079#false} is VALID [2020-07-29 03:08:47,450 INFO L280 TraceCheckUtils]: 50: Hoare triple {6079#false} stop_simulation_#res := stop_simulation_~__retres2~0; {6079#false} is VALID [2020-07-29 03:08:47,450 INFO L280 TraceCheckUtils]: 51: Hoare triple {6079#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {6079#false} is VALID [2020-07-29 03:08:47,450 INFO L280 TraceCheckUtils]: 52: Hoare triple {6079#false} assume !(0 != start_simulation_~tmp___0~1); {6079#false} is VALID [2020-07-29 03:08:47,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:47,452 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43368747] [2020-07-29 03:08:47,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:47,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:47,453 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [617894700] [2020-07-29 03:08:47,453 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:47,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:47,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:47,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:47,454 INFO L87 Difference]: Start difference. First operand 635 states and 941 transitions. cyclomatic complexity: 310 Second operand 3 states. [2020-07-29 03:08:47,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:47,775 INFO L93 Difference]: Finished difference Result 635 states and 919 transitions. [2020-07-29 03:08:47,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:47,775 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:47,826 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:47,826 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 635 states and 919 transitions. [2020-07-29 03:08:47,854 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 590 [2020-07-29 03:08:47,879 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 635 states to 635 states and 919 transitions. [2020-07-29 03:08:47,879 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 635 [2020-07-29 03:08:47,880 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 635 [2020-07-29 03:08:47,880 INFO L73 IsDeterministic]: Start isDeterministic. Operand 635 states and 919 transitions. [2020-07-29 03:08:47,881 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:47,881 INFO L688 BuchiCegarLoop]: Abstraction has 635 states and 919 transitions. [2020-07-29 03:08:47,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 635 states and 919 transitions. [2020-07-29 03:08:47,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 635 to 635. [2020-07-29 03:08:47,894 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:47,894 INFO L82 GeneralOperation]: Start isEquivalent. First operand 635 states and 919 transitions. Second operand 635 states. [2020-07-29 03:08:47,894 INFO L74 IsIncluded]: Start isIncluded. First operand 635 states and 919 transitions. Second operand 635 states. [2020-07-29 03:08:47,895 INFO L87 Difference]: Start difference. First operand 635 states and 919 transitions. Second operand 635 states. [2020-07-29 03:08:47,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:47,918 INFO L93 Difference]: Finished difference Result 635 states and 919 transitions. [2020-07-29 03:08:47,919 INFO L276 IsEmpty]: Start isEmpty. Operand 635 states and 919 transitions. [2020-07-29 03:08:47,920 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:47,920 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:47,920 INFO L74 IsIncluded]: Start isIncluded. First operand 635 states. Second operand 635 states and 919 transitions. [2020-07-29 03:08:47,921 INFO L87 Difference]: Start difference. First operand 635 states. Second operand 635 states and 919 transitions. [2020-07-29 03:08:47,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:47,952 INFO L93 Difference]: Finished difference Result 635 states and 919 transitions. [2020-07-29 03:08:47,952 INFO L276 IsEmpty]: Start isEmpty. Operand 635 states and 919 transitions. [2020-07-29 03:08:47,955 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:47,955 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:47,955 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:47,956 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:47,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 635 states. [2020-07-29 03:08:47,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 635 states to 635 states and 919 transitions. [2020-07-29 03:08:47,986 INFO L711 BuchiCegarLoop]: Abstraction has 635 states and 919 transitions. [2020-07-29 03:08:47,986 INFO L591 BuchiCegarLoop]: Abstraction has 635 states and 919 transitions. [2020-07-29 03:08:47,987 INFO L424 BuchiCegarLoop]: ======== Iteration 6============ [2020-07-29 03:08:47,987 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 635 states and 919 transitions. [2020-07-29 03:08:47,993 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 590 [2020-07-29 03:08:47,993 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:47,993 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:47,994 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:47,995 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:47,995 INFO L794 eck$LassoCheckResult]: Stem: 6879#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 6729#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 6730#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 6864#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 6865#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 6908#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 6909#L243-1 assume !(0 == ~M_E~0); 6895#L346-1 assume !(0 == ~T1_E~0); 6731#L351-1 assume !(0 == ~T2_E~0); 6732#L356-1 assume !(0 == ~E_M~0); 6780#L361-1 assume !(0 == ~E_1~0); 6819#L366-1 assume !(0 == ~E_2~0); 6950#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6941#L168 assume !(1 == ~m_pc~0); 6936#L168-2 is_master_triggered_~__retres1~0 := 0; 6937#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6772#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 6773#L427 assume !(0 != activate_threads_~tmp~1); 6810#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6811#L187 assume !(1 == ~t1_pc~0); 6872#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 6874#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 6875#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 6858#L435 assume !(0 != activate_threads_~tmp___0~0); 6859#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 6866#L206 assume !(1 == ~t2_pc~0); 6790#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 6789#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 6793#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 6794#L443 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 6947#L443-2 assume !(1 == ~M_E~0); 6774#L384-1 assume !(1 == ~T1_E~0); 6775#L389-1 assume !(1 == ~T2_E~0); 6779#L394-1 assume !(1 == ~E_M~0); 6812#L399-1 assume !(1 == ~E_1~0); 6948#L404-1 assume !(1 == ~E_2~0); 6727#L555-1 [2020-07-29 03:08:47,995 INFO L796 eck$LassoCheckResult]: Loop: 6727#L555-1 assume !false; 6728#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 6734#L321 assume !false; 6800#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 6801#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 6798#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 6722#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 6723#L288 assume !(0 != eval_~tmp~0); 6868#L336 start_simulation_~kernel_st~0 := 2; 6860#L226-1 start_simulation_~kernel_st~0 := 3; 6861#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 6896#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 6741#L351-3 assume !(0 == ~T2_E~0); 6742#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 6782#L361-3 assume !(0 == ~E_1~0); 6830#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 6953#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6802#L168-12 assume !(1 == ~m_pc~0); 6791#L168-14 is_master_triggered_~__retres1~0 := 0; 6792#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6751#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 6752#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 6783#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6784#L187-12 assume !(1 == ~t1_pc~0); 6843#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 6867#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 7352#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 7351#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 6931#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 6932#L206-12 assume 1 == ~t2_pc~0; 6816#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 6817#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 6820#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 6821#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 7271#L443-14 assume !(1 == ~M_E~0); 7270#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 7267#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 7265#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 7263#L399-3 assume !(1 == ~E_1~0); 7261#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 7259#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 7257#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 7254#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 7252#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 7249#L574 assume !(0 == start_simulation_~tmp~3); 7250#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 7285#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 7282#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 7280#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 6929#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6930#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 6933#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 6805#L587 assume !(0 != start_simulation_~tmp___0~1); 6727#L555-1 [2020-07-29 03:08:47,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:47,996 INFO L82 PathProgramCache]: Analyzing trace with hash 545629602, now seen corresponding path program 1 times [2020-07-29 03:08:47,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:47,997 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705996633] [2020-07-29 03:08:47,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:48,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:48,099 INFO L280 TraceCheckUtils]: 0: Hoare triple {8626#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {8626#true} is VALID [2020-07-29 03:08:48,100 INFO L280 TraceCheckUtils]: 1: Hoare triple {8626#true} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {8626#true} is VALID [2020-07-29 03:08:48,100 INFO L280 TraceCheckUtils]: 2: Hoare triple {8626#true} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {8626#true} is VALID [2020-07-29 03:08:48,100 INFO L280 TraceCheckUtils]: 3: Hoare triple {8626#true} assume 1 == ~m_i~0;~m_st~0 := 0; {8626#true} is VALID [2020-07-29 03:08:48,101 INFO L280 TraceCheckUtils]: 4: Hoare triple {8626#true} assume 1 == ~t1_i~0;~t1_st~0 := 0; {8626#true} is VALID [2020-07-29 03:08:48,101 INFO L280 TraceCheckUtils]: 5: Hoare triple {8626#true} assume 1 == ~t2_i~0;~t2_st~0 := 0; {8626#true} is VALID [2020-07-29 03:08:48,101 INFO L280 TraceCheckUtils]: 6: Hoare triple {8626#true} assume !(0 == ~M_E~0); {8626#true} is VALID [2020-07-29 03:08:48,101 INFO L280 TraceCheckUtils]: 7: Hoare triple {8626#true} assume !(0 == ~T1_E~0); {8626#true} is VALID [2020-07-29 03:08:48,101 INFO L280 TraceCheckUtils]: 8: Hoare triple {8626#true} assume !(0 == ~T2_E~0); {8626#true} is VALID [2020-07-29 03:08:48,102 INFO L280 TraceCheckUtils]: 9: Hoare triple {8626#true} assume !(0 == ~E_M~0); {8626#true} is VALID [2020-07-29 03:08:48,102 INFO L280 TraceCheckUtils]: 10: Hoare triple {8626#true} assume !(0 == ~E_1~0); {8626#true} is VALID [2020-07-29 03:08:48,102 INFO L280 TraceCheckUtils]: 11: Hoare triple {8626#true} assume !(0 == ~E_2~0); {8626#true} is VALID [2020-07-29 03:08:48,102 INFO L280 TraceCheckUtils]: 12: Hoare triple {8626#true} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {8626#true} is VALID [2020-07-29 03:08:48,102 INFO L280 TraceCheckUtils]: 13: Hoare triple {8626#true} assume !(1 == ~m_pc~0); {8626#true} is VALID [2020-07-29 03:08:48,103 INFO L280 TraceCheckUtils]: 14: Hoare triple {8626#true} is_master_triggered_~__retres1~0 := 0; {8626#true} is VALID [2020-07-29 03:08:48,103 INFO L280 TraceCheckUtils]: 15: Hoare triple {8626#true} is_master_triggered_#res := is_master_triggered_~__retres1~0; {8626#true} is VALID [2020-07-29 03:08:48,103 INFO L280 TraceCheckUtils]: 16: Hoare triple {8626#true} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {8626#true} is VALID [2020-07-29 03:08:48,104 INFO L280 TraceCheckUtils]: 17: Hoare triple {8626#true} assume !(0 != activate_threads_~tmp~1); {8626#true} is VALID [2020-07-29 03:08:48,104 INFO L280 TraceCheckUtils]: 18: Hoare triple {8626#true} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {8626#true} is VALID [2020-07-29 03:08:48,104 INFO L280 TraceCheckUtils]: 19: Hoare triple {8626#true} assume !(1 == ~t1_pc~0); {8626#true} is VALID [2020-07-29 03:08:48,104 INFO L280 TraceCheckUtils]: 20: Hoare triple {8626#true} is_transmit1_triggered_~__retres1~1 := 0; {8626#true} is VALID [2020-07-29 03:08:48,105 INFO L280 TraceCheckUtils]: 21: Hoare triple {8626#true} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {8626#true} is VALID [2020-07-29 03:08:48,105 INFO L280 TraceCheckUtils]: 22: Hoare triple {8626#true} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {8626#true} is VALID [2020-07-29 03:08:48,105 INFO L280 TraceCheckUtils]: 23: Hoare triple {8626#true} assume !(0 != activate_threads_~tmp___0~0); {8626#true} is VALID [2020-07-29 03:08:48,105 INFO L280 TraceCheckUtils]: 24: Hoare triple {8626#true} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {8626#true} is VALID [2020-07-29 03:08:48,105 INFO L280 TraceCheckUtils]: 25: Hoare triple {8626#true} assume !(1 == ~t2_pc~0); {8626#true} is VALID [2020-07-29 03:08:48,107 INFO L280 TraceCheckUtils]: 26: Hoare triple {8626#true} is_transmit2_triggered_~__retres1~2 := 0; {8628#(and (<= ULTIMATE.start_is_transmit2_triggered_~__retres1~2 0) (<= 0 ULTIMATE.start_is_transmit2_triggered_~__retres1~2))} is VALID [2020-07-29 03:08:48,107 INFO L280 TraceCheckUtils]: 27: Hoare triple {8628#(and (<= ULTIMATE.start_is_transmit2_triggered_~__retres1~2 0) (<= 0 ULTIMATE.start_is_transmit2_triggered_~__retres1~2))} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {8629#(and (<= 0 |ULTIMATE.start_is_transmit2_triggered_#res|) (<= |ULTIMATE.start_is_transmit2_triggered_#res| 0))} is VALID [2020-07-29 03:08:48,108 INFO L280 TraceCheckUtils]: 28: Hoare triple {8629#(and (<= 0 |ULTIMATE.start_is_transmit2_triggered_#res|) (<= |ULTIMATE.start_is_transmit2_triggered_#res| 0))} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {8630#(and (<= ULTIMATE.start_activate_threads_~tmp___1~0 0) (<= 0 ULTIMATE.start_activate_threads_~tmp___1~0))} is VALID [2020-07-29 03:08:48,109 INFO L280 TraceCheckUtils]: 29: Hoare triple {8630#(and (<= ULTIMATE.start_activate_threads_~tmp___1~0 0) (<= 0 ULTIMATE.start_activate_threads_~tmp___1~0))} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {8627#false} is VALID [2020-07-29 03:08:48,109 INFO L280 TraceCheckUtils]: 30: Hoare triple {8627#false} assume !(1 == ~M_E~0); {8627#false} is VALID [2020-07-29 03:08:48,109 INFO L280 TraceCheckUtils]: 31: Hoare triple {8627#false} assume !(1 == ~T1_E~0); {8627#false} is VALID [2020-07-29 03:08:48,110 INFO L280 TraceCheckUtils]: 32: Hoare triple {8627#false} assume !(1 == ~T2_E~0); {8627#false} is VALID [2020-07-29 03:08:48,110 INFO L280 TraceCheckUtils]: 33: Hoare triple {8627#false} assume !(1 == ~E_M~0); {8627#false} is VALID [2020-07-29 03:08:48,110 INFO L280 TraceCheckUtils]: 34: Hoare triple {8627#false} assume !(1 == ~E_1~0); {8627#false} is VALID [2020-07-29 03:08:48,111 INFO L280 TraceCheckUtils]: 35: Hoare triple {8627#false} assume !(1 == ~E_2~0); {8627#false} is VALID [2020-07-29 03:08:48,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:48,115 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705996633] [2020-07-29 03:08:48,115 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:48,115 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:48,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531653618] [2020-07-29 03:08:48,116 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:48,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:48,117 INFO L82 PathProgramCache]: Analyzing trace with hash -1734528052, now seen corresponding path program 1 times [2020-07-29 03:08:48,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:48,117 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617270573] [2020-07-29 03:08:48,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:48,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:48,187 INFO L280 TraceCheckUtils]: 0: Hoare triple {8631#true} assume !false; {8631#true} is VALID [2020-07-29 03:08:48,188 INFO L280 TraceCheckUtils]: 1: Hoare triple {8631#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {8631#true} is VALID [2020-07-29 03:08:48,188 INFO L280 TraceCheckUtils]: 2: Hoare triple {8631#true} assume !false; {8631#true} is VALID [2020-07-29 03:08:48,188 INFO L280 TraceCheckUtils]: 3: Hoare triple {8631#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {8631#true} is VALID [2020-07-29 03:08:48,189 INFO L280 TraceCheckUtils]: 4: Hoare triple {8631#true} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {8633#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} is VALID [2020-07-29 03:08:48,189 INFO L280 TraceCheckUtils]: 5: Hoare triple {8633#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {8634#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} is VALID [2020-07-29 03:08:48,190 INFO L280 TraceCheckUtils]: 6: Hoare triple {8634#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {8635#(<= 1 ULTIMATE.start_eval_~tmp~0)} is VALID [2020-07-29 03:08:48,190 INFO L280 TraceCheckUtils]: 7: Hoare triple {8635#(<= 1 ULTIMATE.start_eval_~tmp~0)} assume !(0 != eval_~tmp~0); {8632#false} is VALID [2020-07-29 03:08:48,190 INFO L280 TraceCheckUtils]: 8: Hoare triple {8632#false} start_simulation_~kernel_st~0 := 2; {8632#false} is VALID [2020-07-29 03:08:48,191 INFO L280 TraceCheckUtils]: 9: Hoare triple {8632#false} start_simulation_~kernel_st~0 := 3; {8632#false} is VALID [2020-07-29 03:08:48,191 INFO L280 TraceCheckUtils]: 10: Hoare triple {8632#false} assume 0 == ~M_E~0;~M_E~0 := 1; {8632#false} is VALID [2020-07-29 03:08:48,191 INFO L280 TraceCheckUtils]: 11: Hoare triple {8632#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {8632#false} is VALID [2020-07-29 03:08:48,191 INFO L280 TraceCheckUtils]: 12: Hoare triple {8632#false} assume !(0 == ~T2_E~0); {8632#false} is VALID [2020-07-29 03:08:48,191 INFO L280 TraceCheckUtils]: 13: Hoare triple {8632#false} assume 0 == ~E_M~0;~E_M~0 := 1; {8632#false} is VALID [2020-07-29 03:08:48,191 INFO L280 TraceCheckUtils]: 14: Hoare triple {8632#false} assume !(0 == ~E_1~0); {8632#false} is VALID [2020-07-29 03:08:48,192 INFO L280 TraceCheckUtils]: 15: Hoare triple {8632#false} assume 0 == ~E_2~0;~E_2~0 := 1; {8632#false} is VALID [2020-07-29 03:08:48,192 INFO L280 TraceCheckUtils]: 16: Hoare triple {8632#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {8632#false} is VALID [2020-07-29 03:08:48,192 INFO L280 TraceCheckUtils]: 17: Hoare triple {8632#false} assume !(1 == ~m_pc~0); {8632#false} is VALID [2020-07-29 03:08:48,192 INFO L280 TraceCheckUtils]: 18: Hoare triple {8632#false} is_master_triggered_~__retres1~0 := 0; {8632#false} is VALID [2020-07-29 03:08:48,194 INFO L280 TraceCheckUtils]: 19: Hoare triple {8632#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {8632#false} is VALID [2020-07-29 03:08:48,194 INFO L280 TraceCheckUtils]: 20: Hoare triple {8632#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {8632#false} is VALID [2020-07-29 03:08:48,195 INFO L280 TraceCheckUtils]: 21: Hoare triple {8632#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {8632#false} is VALID [2020-07-29 03:08:48,195 INFO L280 TraceCheckUtils]: 22: Hoare triple {8632#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {8632#false} is VALID [2020-07-29 03:08:48,195 INFO L280 TraceCheckUtils]: 23: Hoare triple {8632#false} assume !(1 == ~t1_pc~0); {8632#false} is VALID [2020-07-29 03:08:48,195 INFO L280 TraceCheckUtils]: 24: Hoare triple {8632#false} is_transmit1_triggered_~__retres1~1 := 0; {8632#false} is VALID [2020-07-29 03:08:48,195 INFO L280 TraceCheckUtils]: 25: Hoare triple {8632#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {8632#false} is VALID [2020-07-29 03:08:48,195 INFO L280 TraceCheckUtils]: 26: Hoare triple {8632#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {8632#false} is VALID [2020-07-29 03:08:48,196 INFO L280 TraceCheckUtils]: 27: Hoare triple {8632#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {8632#false} is VALID [2020-07-29 03:08:48,196 INFO L280 TraceCheckUtils]: 28: Hoare triple {8632#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {8632#false} is VALID [2020-07-29 03:08:48,196 INFO L280 TraceCheckUtils]: 29: Hoare triple {8632#false} assume 1 == ~t2_pc~0; {8632#false} is VALID [2020-07-29 03:08:48,196 INFO L280 TraceCheckUtils]: 30: Hoare triple {8632#false} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {8632#false} is VALID [2020-07-29 03:08:48,196 INFO L280 TraceCheckUtils]: 31: Hoare triple {8632#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {8632#false} is VALID [2020-07-29 03:08:48,196 INFO L280 TraceCheckUtils]: 32: Hoare triple {8632#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {8632#false} is VALID [2020-07-29 03:08:48,197 INFO L280 TraceCheckUtils]: 33: Hoare triple {8632#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {8632#false} is VALID [2020-07-29 03:08:48,197 INFO L280 TraceCheckUtils]: 34: Hoare triple {8632#false} assume !(1 == ~M_E~0); {8632#false} is VALID [2020-07-29 03:08:48,197 INFO L280 TraceCheckUtils]: 35: Hoare triple {8632#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {8632#false} is VALID [2020-07-29 03:08:48,197 INFO L280 TraceCheckUtils]: 36: Hoare triple {8632#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {8632#false} is VALID [2020-07-29 03:08:48,198 INFO L280 TraceCheckUtils]: 37: Hoare triple {8632#false} assume 1 == ~E_M~0;~E_M~0 := 2; {8632#false} is VALID [2020-07-29 03:08:48,198 INFO L280 TraceCheckUtils]: 38: Hoare triple {8632#false} assume !(1 == ~E_1~0); {8632#false} is VALID [2020-07-29 03:08:48,198 INFO L280 TraceCheckUtils]: 39: Hoare triple {8632#false} assume 1 == ~E_2~0;~E_2~0 := 2; {8632#false} is VALID [2020-07-29 03:08:48,198 INFO L280 TraceCheckUtils]: 40: Hoare triple {8632#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {8632#false} is VALID [2020-07-29 03:08:48,198 INFO L280 TraceCheckUtils]: 41: Hoare triple {8632#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {8632#false} is VALID [2020-07-29 03:08:48,199 INFO L280 TraceCheckUtils]: 42: Hoare triple {8632#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {8632#false} is VALID [2020-07-29 03:08:48,199 INFO L280 TraceCheckUtils]: 43: Hoare triple {8632#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {8632#false} is VALID [2020-07-29 03:08:48,199 INFO L280 TraceCheckUtils]: 44: Hoare triple {8632#false} assume !(0 == start_simulation_~tmp~3); {8632#false} is VALID [2020-07-29 03:08:48,199 INFO L280 TraceCheckUtils]: 45: Hoare triple {8632#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {8632#false} is VALID [2020-07-29 03:08:48,200 INFO L280 TraceCheckUtils]: 46: Hoare triple {8632#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {8632#false} is VALID [2020-07-29 03:08:48,200 INFO L280 TraceCheckUtils]: 47: Hoare triple {8632#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {8632#false} is VALID [2020-07-29 03:08:48,200 INFO L280 TraceCheckUtils]: 48: Hoare triple {8632#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {8632#false} is VALID [2020-07-29 03:08:48,200 INFO L280 TraceCheckUtils]: 49: Hoare triple {8632#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {8632#false} is VALID [2020-07-29 03:08:48,200 INFO L280 TraceCheckUtils]: 50: Hoare triple {8632#false} stop_simulation_#res := stop_simulation_~__retres2~0; {8632#false} is VALID [2020-07-29 03:08:48,201 INFO L280 TraceCheckUtils]: 51: Hoare triple {8632#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {8632#false} is VALID [2020-07-29 03:08:48,201 INFO L280 TraceCheckUtils]: 52: Hoare triple {8632#false} assume !(0 != start_simulation_~tmp___0~1); {8632#false} is VALID [2020-07-29 03:08:48,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:48,209 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617270573] [2020-07-29 03:08:48,209 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:48,209 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:48,210 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805828150] [2020-07-29 03:08:48,211 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:48,211 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:48,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-07-29 03:08:48,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-07-29 03:08:48,212 INFO L87 Difference]: Start difference. First operand 635 states and 919 transitions. cyclomatic complexity: 288 Second operand 5 states. [2020-07-29 03:08:49,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:49,818 INFO L93 Difference]: Finished difference Result 1490 states and 2164 transitions. [2020-07-29 03:08:49,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-07-29 03:08:49,819 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2020-07-29 03:08:49,863 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:49,863 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1490 states and 2164 transitions. [2020-07-29 03:08:49,987 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1414 [2020-07-29 03:08:50,072 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1490 states to 1490 states and 2164 transitions. [2020-07-29 03:08:50,072 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1490 [2020-07-29 03:08:50,073 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1490 [2020-07-29 03:08:50,073 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1490 states and 2164 transitions. [2020-07-29 03:08:50,075 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:50,075 INFO L688 BuchiCegarLoop]: Abstraction has 1490 states and 2164 transitions. [2020-07-29 03:08:50,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1490 states and 2164 transitions. [2020-07-29 03:08:50,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1490 to 686. [2020-07-29 03:08:50,089 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:50,089 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1490 states and 2164 transitions. Second operand 686 states. [2020-07-29 03:08:50,089 INFO L74 IsIncluded]: Start isIncluded. First operand 1490 states and 2164 transitions. Second operand 686 states. [2020-07-29 03:08:50,089 INFO L87 Difference]: Start difference. First operand 1490 states and 2164 transitions. Second operand 686 states. [2020-07-29 03:08:50,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:50,167 INFO L93 Difference]: Finished difference Result 1490 states and 2164 transitions. [2020-07-29 03:08:50,167 INFO L276 IsEmpty]: Start isEmpty. Operand 1490 states and 2164 transitions. [2020-07-29 03:08:50,170 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:50,170 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:50,170 INFO L74 IsIncluded]: Start isIncluded. First operand 686 states. Second operand 1490 states and 2164 transitions. [2020-07-29 03:08:50,171 INFO L87 Difference]: Start difference. First operand 686 states. Second operand 1490 states and 2164 transitions. [2020-07-29 03:08:50,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:50,246 INFO L93 Difference]: Finished difference Result 1490 states and 2164 transitions. [2020-07-29 03:08:50,246 INFO L276 IsEmpty]: Start isEmpty. Operand 1490 states and 2164 transitions. [2020-07-29 03:08:50,248 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:50,249 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:50,249 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:50,249 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:50,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 686 states. [2020-07-29 03:08:50,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 686 states to 686 states and 970 transitions. [2020-07-29 03:08:50,273 INFO L711 BuchiCegarLoop]: Abstraction has 686 states and 970 transitions. [2020-07-29 03:08:50,273 INFO L591 BuchiCegarLoop]: Abstraction has 686 states and 970 transitions. [2020-07-29 03:08:50,273 INFO L424 BuchiCegarLoop]: ======== Iteration 7============ [2020-07-29 03:08:50,274 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 686 states and 970 transitions. [2020-07-29 03:08:50,277 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 638 [2020-07-29 03:08:50,277 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:50,277 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:50,278 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:50,278 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:50,279 INFO L794 eck$LassoCheckResult]: Stem: 10290#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 10141#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 10142#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 10274#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 10275#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 10321#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 10322#L243-1 assume !(0 == ~M_E~0); 10305#L346-1 assume !(0 == ~T1_E~0); 10143#L351-1 assume !(0 == ~T2_E~0); 10144#L356-1 assume !(0 == ~E_M~0); 10192#L361-1 assume !(0 == ~E_1~0); 10226#L366-1 assume !(0 == ~E_2~0); 10364#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 10350#L168 assume !(1 == ~m_pc~0); 10345#L168-2 is_master_triggered_~__retres1~0 := 0; 10346#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 10184#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 10185#L427 assume !(0 != activate_threads_~tmp~1); 10218#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 10219#L187 assume !(1 == ~t1_pc~0); 10282#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 10283#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 10284#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 10270#L435 assume !(0 != activate_threads_~tmp___0~0); 10271#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 10276#L206 assume !(1 == ~t2_pc~0); 10202#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 10387#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 10390#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 10378#L443 assume !(0 != activate_threads_~tmp___1~0); 10359#L443-2 assume !(1 == ~M_E~0); 10186#L384-1 assume !(1 == ~T1_E~0); 10187#L389-1 assume !(1 == ~T2_E~0); 10191#L394-1 assume !(1 == ~E_M~0); 10220#L399-1 assume !(1 == ~E_1~0); 10360#L404-1 assume !(1 == ~E_2~0); 10382#L555-1 [2020-07-29 03:08:50,279 INFO L796 eck$LassoCheckResult]: Loop: 10382#L555-1 assume !false; 10492#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 10487#L321 assume !false; 10213#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10214#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 10211#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10134#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 10135#L288 assume !(0 != eval_~tmp~0); 10315#L336 start_simulation_~kernel_st~0 := 2; 10757#L226-1 start_simulation_~kernel_st~0 := 3; 10755#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 10753#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 10751#L351-3 assume !(0 == ~T2_E~0); 10749#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 10747#L361-3 assume !(0 == ~E_1~0); 10745#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 10743#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 10742#L168-12 assume !(1 == ~m_pc~0); 10741#L168-14 is_master_triggered_~__retres1~0 := 0; 10740#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 10739#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 10738#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 10737#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 10736#L187-12 assume !(1 == ~t1_pc~0); 10735#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 10734#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 10733#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 10732#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 10731#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 10730#L206-12 assume 1 == ~t2_pc~0; 10728#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 10726#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 10724#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 10722#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 10721#L443-14 assume !(1 == ~M_E~0); 10720#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 10719#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 10718#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 10717#L399-3 assume !(1 == ~E_1~0); 10664#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 10662#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10659#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 10627#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10620#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 10614#L574 assume !(0 == start_simulation_~tmp~3); 10605#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 10549#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 10546#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 10544#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 10528#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 10527#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 10526#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 10525#L587 assume !(0 != start_simulation_~tmp___0~1); 10382#L555-1 [2020-07-29 03:08:50,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:50,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1974330332, now seen corresponding path program 1 times [2020-07-29 03:08:50,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:50,280 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111991708] [2020-07-29 03:08:50,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:50,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:50,288 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:50,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:50,294 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:50,318 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:50,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:50,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1734528052, now seen corresponding path program 2 times [2020-07-29 03:08:50,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:50,320 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333019870] [2020-07-29 03:08:50,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:50,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:50,360 INFO L280 TraceCheckUtils]: 0: Hoare triple {13801#true} assume !false; {13801#true} is VALID [2020-07-29 03:08:50,360 INFO L280 TraceCheckUtils]: 1: Hoare triple {13801#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {13801#true} is VALID [2020-07-29 03:08:50,360 INFO L280 TraceCheckUtils]: 2: Hoare triple {13801#true} assume !false; {13801#true} is VALID [2020-07-29 03:08:50,361 INFO L280 TraceCheckUtils]: 3: Hoare triple {13801#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {13801#true} is VALID [2020-07-29 03:08:50,362 INFO L280 TraceCheckUtils]: 4: Hoare triple {13801#true} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {13803#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} is VALID [2020-07-29 03:08:50,362 INFO L280 TraceCheckUtils]: 5: Hoare triple {13803#(<= 1 ULTIMATE.start_exists_runnable_thread_~__retres1~3)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {13804#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} is VALID [2020-07-29 03:08:50,363 INFO L280 TraceCheckUtils]: 6: Hoare triple {13804#(<= 1 |ULTIMATE.start_exists_runnable_thread_#res|)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {13805#(<= 1 ULTIMATE.start_eval_~tmp~0)} is VALID [2020-07-29 03:08:50,363 INFO L280 TraceCheckUtils]: 7: Hoare triple {13805#(<= 1 ULTIMATE.start_eval_~tmp~0)} assume !(0 != eval_~tmp~0); {13802#false} is VALID [2020-07-29 03:08:50,364 INFO L280 TraceCheckUtils]: 8: Hoare triple {13802#false} start_simulation_~kernel_st~0 := 2; {13802#false} is VALID [2020-07-29 03:08:50,364 INFO L280 TraceCheckUtils]: 9: Hoare triple {13802#false} start_simulation_~kernel_st~0 := 3; {13802#false} is VALID [2020-07-29 03:08:50,364 INFO L280 TraceCheckUtils]: 10: Hoare triple {13802#false} assume 0 == ~M_E~0;~M_E~0 := 1; {13802#false} is VALID [2020-07-29 03:08:50,364 INFO L280 TraceCheckUtils]: 11: Hoare triple {13802#false} assume 0 == ~T1_E~0;~T1_E~0 := 1; {13802#false} is VALID [2020-07-29 03:08:50,364 INFO L280 TraceCheckUtils]: 12: Hoare triple {13802#false} assume !(0 == ~T2_E~0); {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 13: Hoare triple {13802#false} assume 0 == ~E_M~0;~E_M~0 := 1; {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 14: Hoare triple {13802#false} assume !(0 == ~E_1~0); {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 15: Hoare triple {13802#false} assume 0 == ~E_2~0;~E_2~0 := 1; {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 16: Hoare triple {13802#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 17: Hoare triple {13802#false} assume !(1 == ~m_pc~0); {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 18: Hoare triple {13802#false} is_master_triggered_~__retres1~0 := 0; {13802#false} is VALID [2020-07-29 03:08:50,365 INFO L280 TraceCheckUtils]: 19: Hoare triple {13802#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 20: Hoare triple {13802#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 21: Hoare triple {13802#false} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 22: Hoare triple {13802#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 23: Hoare triple {13802#false} assume !(1 == ~t1_pc~0); {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 24: Hoare triple {13802#false} is_transmit1_triggered_~__retres1~1 := 0; {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 25: Hoare triple {13802#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {13802#false} is VALID [2020-07-29 03:08:50,366 INFO L280 TraceCheckUtils]: 26: Hoare triple {13802#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {13802#false} is VALID [2020-07-29 03:08:50,367 INFO L280 TraceCheckUtils]: 27: Hoare triple {13802#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {13802#false} is VALID [2020-07-29 03:08:50,367 INFO L280 TraceCheckUtils]: 28: Hoare triple {13802#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {13802#false} is VALID [2020-07-29 03:08:50,367 INFO L280 TraceCheckUtils]: 29: Hoare triple {13802#false} assume 1 == ~t2_pc~0; {13802#false} is VALID [2020-07-29 03:08:50,367 INFO L280 TraceCheckUtils]: 30: Hoare triple {13802#false} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {13802#false} is VALID [2020-07-29 03:08:50,368 INFO L280 TraceCheckUtils]: 31: Hoare triple {13802#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {13802#false} is VALID [2020-07-29 03:08:50,368 INFO L280 TraceCheckUtils]: 32: Hoare triple {13802#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {13802#false} is VALID [2020-07-29 03:08:50,368 INFO L280 TraceCheckUtils]: 33: Hoare triple {13802#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {13802#false} is VALID [2020-07-29 03:08:50,368 INFO L280 TraceCheckUtils]: 34: Hoare triple {13802#false} assume !(1 == ~M_E~0); {13802#false} is VALID [2020-07-29 03:08:50,368 INFO L280 TraceCheckUtils]: 35: Hoare triple {13802#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 36: Hoare triple {13802#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 37: Hoare triple {13802#false} assume 1 == ~E_M~0;~E_M~0 := 2; {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 38: Hoare triple {13802#false} assume !(1 == ~E_1~0); {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 39: Hoare triple {13802#false} assume 1 == ~E_2~0;~E_2~0 := 2; {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 40: Hoare triple {13802#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 41: Hoare triple {13802#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {13802#false} is VALID [2020-07-29 03:08:50,369 INFO L280 TraceCheckUtils]: 42: Hoare triple {13802#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {13802#false} is VALID [2020-07-29 03:08:50,370 INFO L280 TraceCheckUtils]: 43: Hoare triple {13802#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {13802#false} is VALID [2020-07-29 03:08:50,370 INFO L280 TraceCheckUtils]: 44: Hoare triple {13802#false} assume !(0 == start_simulation_~tmp~3); {13802#false} is VALID [2020-07-29 03:08:50,370 INFO L280 TraceCheckUtils]: 45: Hoare triple {13802#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {13802#false} is VALID [2020-07-29 03:08:50,370 INFO L280 TraceCheckUtils]: 46: Hoare triple {13802#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {13802#false} is VALID [2020-07-29 03:08:50,371 INFO L280 TraceCheckUtils]: 47: Hoare triple {13802#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {13802#false} is VALID [2020-07-29 03:08:50,371 INFO L280 TraceCheckUtils]: 48: Hoare triple {13802#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {13802#false} is VALID [2020-07-29 03:08:50,371 INFO L280 TraceCheckUtils]: 49: Hoare triple {13802#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {13802#false} is VALID [2020-07-29 03:08:50,371 INFO L280 TraceCheckUtils]: 50: Hoare triple {13802#false} stop_simulation_#res := stop_simulation_~__retres2~0; {13802#false} is VALID [2020-07-29 03:08:50,372 INFO L280 TraceCheckUtils]: 51: Hoare triple {13802#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {13802#false} is VALID [2020-07-29 03:08:50,372 INFO L280 TraceCheckUtils]: 52: Hoare triple {13802#false} assume !(0 != start_simulation_~tmp___0~1); {13802#false} is VALID [2020-07-29 03:08:50,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:50,374 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333019870] [2020-07-29 03:08:50,374 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:50,374 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:50,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1147712506] [2020-07-29 03:08:50,375 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:50,375 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:50,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-07-29 03:08:50,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-07-29 03:08:50,376 INFO L87 Difference]: Start difference. First operand 686 states and 970 transitions. cyclomatic complexity: 288 Second operand 5 states. [2020-07-29 03:08:51,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:51,397 INFO L93 Difference]: Finished difference Result 1180 states and 1638 transitions. [2020-07-29 03:08:51,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2020-07-29 03:08:51,397 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2020-07-29 03:08:51,467 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:51,467 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,518 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1124 [2020-07-29 03:08:51,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1180 states to 1180 states and 1638 transitions. [2020-07-29 03:08:51,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1180 [2020-07-29 03:08:51,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1180 [2020-07-29 03:08:51,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,587 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:51,587 INFO L688 BuchiCegarLoop]: Abstraction has 1180 states and 1638 transitions. [2020-07-29 03:08:51,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1180 to 698. [2020-07-29 03:08:51,602 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:51,602 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1180 states and 1638 transitions. Second operand 698 states. [2020-07-29 03:08:51,602 INFO L74 IsIncluded]: Start isIncluded. First operand 1180 states and 1638 transitions. Second operand 698 states. [2020-07-29 03:08:51,602 INFO L87 Difference]: Start difference. First operand 1180 states and 1638 transitions. Second operand 698 states. [2020-07-29 03:08:51,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:51,648 INFO L93 Difference]: Finished difference Result 1180 states and 1638 transitions. [2020-07-29 03:08:51,648 INFO L276 IsEmpty]: Start isEmpty. Operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,651 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:51,651 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:51,651 INFO L74 IsIncluded]: Start isIncluded. First operand 698 states. Second operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,651 INFO L87 Difference]: Start difference. First operand 698 states. Second operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:51,698 INFO L93 Difference]: Finished difference Result 1180 states and 1638 transitions. [2020-07-29 03:08:51,699 INFO L276 IsEmpty]: Start isEmpty. Operand 1180 states and 1638 transitions. [2020-07-29 03:08:51,700 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:51,701 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:51,701 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:51,701 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:51,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 698 states. [2020-07-29 03:08:51,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 982 transitions. [2020-07-29 03:08:51,717 INFO L711 BuchiCegarLoop]: Abstraction has 698 states and 982 transitions. [2020-07-29 03:08:51,717 INFO L591 BuchiCegarLoop]: Abstraction has 698 states and 982 transitions. [2020-07-29 03:08:51,718 INFO L424 BuchiCegarLoop]: ======== Iteration 8============ [2020-07-29 03:08:51,718 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 698 states and 982 transitions. [2020-07-29 03:08:51,721 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 650 [2020-07-29 03:08:51,722 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:51,722 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:51,723 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:51,723 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:51,724 INFO L794 eck$LassoCheckResult]: Stem: 15156#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 15005#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 15006#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 15138#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 15139#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 15184#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 15185#L243-1 assume !(0 == ~M_E~0); 15171#L346-1 assume !(0 == ~T1_E~0); 15007#L351-1 assume !(0 == ~T2_E~0); 15008#L356-1 assume !(0 == ~E_M~0); 15056#L361-1 assume !(0 == ~E_1~0); 15094#L366-1 assume !(0 == ~E_2~0); 15227#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 15217#L168 assume !(1 == ~m_pc~0); 15213#L168-2 is_master_triggered_~__retres1~0 := 0; 15214#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 15048#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 15049#L427 assume !(0 != activate_threads_~tmp~1); 15086#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 15087#L187 assume !(1 == ~t1_pc~0); 15148#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 15150#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 15151#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 15134#L435 assume !(0 != activate_threads_~tmp___0~0); 15135#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 15140#L206 assume !(1 == ~t2_pc~0); 15066#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 15238#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 15239#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 15236#L443 assume !(0 != activate_threads_~tmp___1~0); 15223#L443-2 assume !(1 == ~M_E~0); 15050#L384-1 assume !(1 == ~T1_E~0); 15051#L389-1 assume !(1 == ~T2_E~0); 15055#L394-1 assume !(1 == ~E_M~0); 15088#L399-1 assume !(1 == ~E_1~0); 15224#L404-1 assume !(1 == ~E_2~0); 15003#L555-1 [2020-07-29 03:08:51,724 INFO L796 eck$LassoCheckResult]: Loop: 15003#L555-1 assume !false; 15004#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 15010#L321 assume !false; 15076#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 15077#L256 assume !(0 == ~m_st~0); 15187#L260 assume !(0 == ~t1_st~0); 15153#L264 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 15154#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 15432#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 15431#L288 assume !(0 != eval_~tmp~0); 15143#L336 start_simulation_~kernel_st~0 := 2; 15144#L226-1 start_simulation_~kernel_st~0 := 3; 15301#L346-2 assume 0 == ~M_E~0;~M_E~0 := 1; 15300#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 15299#L351-3 assume !(0 == ~T2_E~0); 15298#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 15297#L361-3 assume !(0 == ~E_1~0); 15296#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 15295#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 15293#L168-12 assume !(1 == ~m_pc~0); 15294#L168-14 is_master_triggered_~__retres1~0 := 0; 15256#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 15257#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 15247#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 15248#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 15119#L187-12 assume !(1 == ~t1_pc~0); 15120#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 15160#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 15161#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 15198#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 15688#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 15665#L206-12 assume 1 == ~t2_pc~0; 15664#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 15662#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 15660#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 15657#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 15212#L443-14 assume !(1 == ~M_E~0); 15014#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 15015#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 15057#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 15101#L399-3 assume !(1 == ~E_1~0); 15228#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 15175#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 15176#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 15069#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 14996#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 14997#L574 assume !(0 == start_simulation_~tmp~3); 15178#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 15180#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 15063#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 14994#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 14995#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 15208#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 15210#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 15080#L587 assume !(0 != start_simulation_~tmp___0~1); 15003#L555-1 [2020-07-29 03:08:51,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:51,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1974330332, now seen corresponding path program 2 times [2020-07-29 03:08:51,725 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:51,725 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059224260] [2020-07-29 03:08:51,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:51,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:51,734 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:51,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:51,739 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:51,747 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:51,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:51,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1577694381, now seen corresponding path program 1 times [2020-07-29 03:08:51,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:51,748 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010000434] [2020-07-29 03:08:51,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:51,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:51,808 INFO L280 TraceCheckUtils]: 0: Hoare triple {18057#true} assume !false; {18057#true} is VALID [2020-07-29 03:08:51,808 INFO L280 TraceCheckUtils]: 1: Hoare triple {18057#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 2: Hoare triple {18057#true} assume !false; {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 3: Hoare triple {18057#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 4: Hoare triple {18057#true} assume !(0 == ~m_st~0); {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 5: Hoare triple {18057#true} assume !(0 == ~t1_st~0); {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 6: Hoare triple {18057#true} assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 7: Hoare triple {18057#true} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 8: Hoare triple {18057#true} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {18057#true} is VALID [2020-07-29 03:08:51,809 INFO L280 TraceCheckUtils]: 9: Hoare triple {18057#true} assume !(0 != eval_~tmp~0); {18057#true} is VALID [2020-07-29 03:08:51,810 INFO L280 TraceCheckUtils]: 10: Hoare triple {18057#true} start_simulation_~kernel_st~0 := 2; {18057#true} is VALID [2020-07-29 03:08:51,810 INFO L280 TraceCheckUtils]: 11: Hoare triple {18057#true} start_simulation_~kernel_st~0 := 3; {18057#true} is VALID [2020-07-29 03:08:51,811 INFO L280 TraceCheckUtils]: 12: Hoare triple {18057#true} assume 0 == ~M_E~0;~M_E~0 := 1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,811 INFO L280 TraceCheckUtils]: 13: Hoare triple {18059#(= ~M_E~0 1)} assume 0 == ~T1_E~0;~T1_E~0 := 1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,811 INFO L280 TraceCheckUtils]: 14: Hoare triple {18059#(= ~M_E~0 1)} assume !(0 == ~T2_E~0); {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,812 INFO L280 TraceCheckUtils]: 15: Hoare triple {18059#(= ~M_E~0 1)} assume 0 == ~E_M~0;~E_M~0 := 1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,812 INFO L280 TraceCheckUtils]: 16: Hoare triple {18059#(= ~M_E~0 1)} assume !(0 == ~E_1~0); {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,812 INFO L280 TraceCheckUtils]: 17: Hoare triple {18059#(= ~M_E~0 1)} assume 0 == ~E_2~0;~E_2~0 := 1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,813 INFO L280 TraceCheckUtils]: 18: Hoare triple {18059#(= ~M_E~0 1)} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,813 INFO L280 TraceCheckUtils]: 19: Hoare triple {18059#(= ~M_E~0 1)} assume !(1 == ~m_pc~0); {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,814 INFO L280 TraceCheckUtils]: 20: Hoare triple {18059#(= ~M_E~0 1)} is_master_triggered_~__retres1~0 := 0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,814 INFO L280 TraceCheckUtils]: 21: Hoare triple {18059#(= ~M_E~0 1)} is_master_triggered_#res := is_master_triggered_~__retres1~0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,815 INFO L280 TraceCheckUtils]: 22: Hoare triple {18059#(= ~M_E~0 1)} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,815 INFO L280 TraceCheckUtils]: 23: Hoare triple {18059#(= ~M_E~0 1)} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,816 INFO L280 TraceCheckUtils]: 24: Hoare triple {18059#(= ~M_E~0 1)} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,817 INFO L280 TraceCheckUtils]: 25: Hoare triple {18059#(= ~M_E~0 1)} assume !(1 == ~t1_pc~0); {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,817 INFO L280 TraceCheckUtils]: 26: Hoare triple {18059#(= ~M_E~0 1)} is_transmit1_triggered_~__retres1~1 := 0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,818 INFO L280 TraceCheckUtils]: 27: Hoare triple {18059#(= ~M_E~0 1)} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,818 INFO L280 TraceCheckUtils]: 28: Hoare triple {18059#(= ~M_E~0 1)} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,819 INFO L280 TraceCheckUtils]: 29: Hoare triple {18059#(= ~M_E~0 1)} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,819 INFO L280 TraceCheckUtils]: 30: Hoare triple {18059#(= ~M_E~0 1)} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,820 INFO L280 TraceCheckUtils]: 31: Hoare triple {18059#(= ~M_E~0 1)} assume 1 == ~t2_pc~0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,820 INFO L280 TraceCheckUtils]: 32: Hoare triple {18059#(= ~M_E~0 1)} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,820 INFO L280 TraceCheckUtils]: 33: Hoare triple {18059#(= ~M_E~0 1)} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,821 INFO L280 TraceCheckUtils]: 34: Hoare triple {18059#(= ~M_E~0 1)} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,821 INFO L280 TraceCheckUtils]: 35: Hoare triple {18059#(= ~M_E~0 1)} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {18059#(= ~M_E~0 1)} is VALID [2020-07-29 03:08:51,822 INFO L280 TraceCheckUtils]: 36: Hoare triple {18059#(= ~M_E~0 1)} assume !(1 == ~M_E~0); {18058#false} is VALID [2020-07-29 03:08:51,822 INFO L280 TraceCheckUtils]: 37: Hoare triple {18058#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {18058#false} is VALID [2020-07-29 03:08:51,822 INFO L280 TraceCheckUtils]: 38: Hoare triple {18058#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {18058#false} is VALID [2020-07-29 03:08:51,822 INFO L280 TraceCheckUtils]: 39: Hoare triple {18058#false} assume 1 == ~E_M~0;~E_M~0 := 2; {18058#false} is VALID [2020-07-29 03:08:51,822 INFO L280 TraceCheckUtils]: 40: Hoare triple {18058#false} assume !(1 == ~E_1~0); {18058#false} is VALID [2020-07-29 03:08:51,823 INFO L280 TraceCheckUtils]: 41: Hoare triple {18058#false} assume 1 == ~E_2~0;~E_2~0 := 2; {18058#false} is VALID [2020-07-29 03:08:51,823 INFO L280 TraceCheckUtils]: 42: Hoare triple {18058#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {18058#false} is VALID [2020-07-29 03:08:51,823 INFO L280 TraceCheckUtils]: 43: Hoare triple {18058#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {18058#false} is VALID [2020-07-29 03:08:51,823 INFO L280 TraceCheckUtils]: 44: Hoare triple {18058#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {18058#false} is VALID [2020-07-29 03:08:51,823 INFO L280 TraceCheckUtils]: 45: Hoare triple {18058#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {18058#false} is VALID [2020-07-29 03:08:51,824 INFO L280 TraceCheckUtils]: 46: Hoare triple {18058#false} assume !(0 == start_simulation_~tmp~3); {18058#false} is VALID [2020-07-29 03:08:51,824 INFO L280 TraceCheckUtils]: 47: Hoare triple {18058#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {18058#false} is VALID [2020-07-29 03:08:51,824 INFO L280 TraceCheckUtils]: 48: Hoare triple {18058#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {18058#false} is VALID [2020-07-29 03:08:51,824 INFO L280 TraceCheckUtils]: 49: Hoare triple {18058#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {18058#false} is VALID [2020-07-29 03:08:51,824 INFO L280 TraceCheckUtils]: 50: Hoare triple {18058#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {18058#false} is VALID [2020-07-29 03:08:51,824 INFO L280 TraceCheckUtils]: 51: Hoare triple {18058#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {18058#false} is VALID [2020-07-29 03:08:51,825 INFO L280 TraceCheckUtils]: 52: Hoare triple {18058#false} stop_simulation_#res := stop_simulation_~__retres2~0; {18058#false} is VALID [2020-07-29 03:08:51,825 INFO L280 TraceCheckUtils]: 53: Hoare triple {18058#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {18058#false} is VALID [2020-07-29 03:08:51,825 INFO L280 TraceCheckUtils]: 54: Hoare triple {18058#false} assume !(0 != start_simulation_~tmp___0~1); {18058#false} is VALID [2020-07-29 03:08:51,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:51,827 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1010000434] [2020-07-29 03:08:51,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:51,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-07-29 03:08:51,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021365499] [2020-07-29 03:08:51,829 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:51,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:51,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:51,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:51,830 INFO L87 Difference]: Start difference. First operand 698 states and 982 transitions. cyclomatic complexity: 288 Second operand 3 states. [2020-07-29 03:08:52,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:52,159 INFO L93 Difference]: Finished difference Result 842 states and 1173 transitions. [2020-07-29 03:08:52,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:52,159 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:52,220 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:52,221 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 842 states and 1173 transitions. [2020-07-29 03:08:52,251 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 766 [2020-07-29 03:08:52,275 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 842 states to 842 states and 1173 transitions. [2020-07-29 03:08:52,276 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 842 [2020-07-29 03:08:52,276 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 842 [2020-07-29 03:08:52,276 INFO L73 IsDeterministic]: Start isDeterministic. Operand 842 states and 1173 transitions. [2020-07-29 03:08:52,277 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:52,277 INFO L688 BuchiCegarLoop]: Abstraction has 842 states and 1173 transitions. [2020-07-29 03:08:52,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 842 states and 1173 transitions. [2020-07-29 03:08:52,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 842 to 842. [2020-07-29 03:08:52,290 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:52,290 INFO L82 GeneralOperation]: Start isEquivalent. First operand 842 states and 1173 transitions. Second operand 842 states. [2020-07-29 03:08:52,290 INFO L74 IsIncluded]: Start isIncluded. First operand 842 states and 1173 transitions. Second operand 842 states. [2020-07-29 03:08:52,291 INFO L87 Difference]: Start difference. First operand 842 states and 1173 transitions. Second operand 842 states. [2020-07-29 03:08:52,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:52,328 INFO L93 Difference]: Finished difference Result 842 states and 1173 transitions. [2020-07-29 03:08:52,328 INFO L276 IsEmpty]: Start isEmpty. Operand 842 states and 1173 transitions. [2020-07-29 03:08:52,330 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:52,330 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:52,330 INFO L74 IsIncluded]: Start isIncluded. First operand 842 states. Second operand 842 states and 1173 transitions. [2020-07-29 03:08:52,330 INFO L87 Difference]: Start difference. First operand 842 states. Second operand 842 states and 1173 transitions. [2020-07-29 03:08:52,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:52,359 INFO L93 Difference]: Finished difference Result 842 states and 1173 transitions. [2020-07-29 03:08:52,360 INFO L276 IsEmpty]: Start isEmpty. Operand 842 states and 1173 transitions. [2020-07-29 03:08:52,361 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:52,361 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:52,361 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:52,362 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:52,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 842 states. [2020-07-29 03:08:52,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 842 states to 842 states and 1173 transitions. [2020-07-29 03:08:52,385 INFO L711 BuchiCegarLoop]: Abstraction has 842 states and 1173 transitions. [2020-07-29 03:08:52,385 INFO L591 BuchiCegarLoop]: Abstraction has 842 states and 1173 transitions. [2020-07-29 03:08:52,385 INFO L424 BuchiCegarLoop]: ======== Iteration 9============ [2020-07-29 03:08:52,385 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 842 states and 1173 transitions. [2020-07-29 03:08:52,389 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 766 [2020-07-29 03:08:52,389 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:52,389 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:52,390 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:52,390 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:52,390 INFO L794 eck$LassoCheckResult]: Stem: 19069#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 18913#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 18914#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 19050#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 19051#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 19103#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 19104#L243-1 assume 0 == ~M_E~0;~M_E~0 := 1; 19086#L346-1 assume !(0 == ~T1_E~0); 18915#L351-1 assume !(0 == ~T2_E~0); 18916#L356-1 assume !(0 == ~E_M~0); 18965#L361-1 assume !(0 == ~E_1~0); 19004#L366-1 assume !(0 == ~E_2~0); 19147#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 19136#L168 assume !(1 == ~m_pc~0); 19131#L168-2 is_master_triggered_~__retres1~0 := 0; 19132#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 18957#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 18958#L427 assume !(0 != activate_threads_~tmp~1); 18996#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 18997#L187 assume !(1 == ~t1_pc~0); 19060#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 19062#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 19063#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 19045#L435 assume !(0 != activate_threads_~tmp___0~0); 19046#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 19164#L206 assume !(1 == ~t2_pc~0); 18975#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 19161#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 18976#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 18977#L443 assume !(0 != activate_threads_~tmp___1~0); 19142#L443-2 assume 1 == ~M_E~0;~M_E~0 := 2; 18959#L384-1 assume !(1 == ~T1_E~0); 18960#L389-1 assume !(1 == ~T2_E~0); 18964#L394-1 assume !(1 == ~E_M~0); 18998#L399-1 assume !(1 == ~E_1~0); 19143#L404-1 assume !(1 == ~E_2~0); 19159#L555-1 [2020-07-29 03:08:52,391 INFO L796 eck$LassoCheckResult]: Loop: 19159#L555-1 assume !false; 19335#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 18918#L321 assume !false; 19316#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 19156#L256 assume !(0 == ~m_st~0); 19106#L260 assume !(0 == ~t1_st~0); 19066#L264 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 19067#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 19572#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 19571#L288 assume !(0 != eval_~tmp~0); 19570#L336 start_simulation_~kernel_st~0 := 2; 19569#L226-1 start_simulation_~kernel_st~0 := 3; 19567#L346-2 assume !(0 == ~M_E~0); 19568#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 19635#L351-3 assume !(0 == ~T2_E~0); 19632#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 19630#L361-3 assume !(0 == ~E_1~0); 19629#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 19626#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 19623#L168-12 assume !(1 == ~m_pc~0); 19621#L168-14 is_master_triggered_~__retres1~0 := 0; 19619#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 19616#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 19613#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 19612#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 19607#L187-12 assume !(1 == ~t1_pc~0); 19603#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 19595#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 19591#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 19585#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 19584#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 19583#L206-12 assume !(1 == ~t2_pc~0); 19581#L206-14 is_transmit2_triggered_~__retres1~2 := 0; 19579#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 19577#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 19576#L443-12 assume !(0 != activate_threads_~tmp___1~0); 19519#L443-14 assume !(1 == ~M_E~0); 19517#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 19515#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 19513#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 19511#L399-3 assume !(1 == ~E_1~0); 19509#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 19508#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 19506#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 19503#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 19501#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 19498#L574 assume !(0 == start_simulation_~tmp~3); 19495#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 19371#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 19366#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 19364#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 19362#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 19360#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 19357#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 19344#L587 assume !(0 != start_simulation_~tmp___0~1); 19159#L555-1 [2020-07-29 03:08:52,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:52,391 INFO L82 PathProgramCache]: Analyzing trace with hash -2054220888, now seen corresponding path program 1 times [2020-07-29 03:08:52,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:52,392 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120326856] [2020-07-29 03:08:52,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:52,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:52,409 INFO L280 TraceCheckUtils]: 0: Hoare triple {21431#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {21433#(<= 2 ~M_E~0)} is VALID [2020-07-29 03:08:52,410 INFO L280 TraceCheckUtils]: 1: Hoare triple {21433#(<= 2 ~M_E~0)} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {21433#(<= 2 ~M_E~0)} is VALID [2020-07-29 03:08:52,411 INFO L280 TraceCheckUtils]: 2: Hoare triple {21433#(<= 2 ~M_E~0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {21433#(<= 2 ~M_E~0)} is VALID [2020-07-29 03:08:52,411 INFO L280 TraceCheckUtils]: 3: Hoare triple {21433#(<= 2 ~M_E~0)} assume 1 == ~m_i~0;~m_st~0 := 0; {21433#(<= 2 ~M_E~0)} is VALID [2020-07-29 03:08:52,412 INFO L280 TraceCheckUtils]: 4: Hoare triple {21433#(<= 2 ~M_E~0)} assume 1 == ~t1_i~0;~t1_st~0 := 0; {21433#(<= 2 ~M_E~0)} is VALID [2020-07-29 03:08:52,412 INFO L280 TraceCheckUtils]: 5: Hoare triple {21433#(<= 2 ~M_E~0)} assume 1 == ~t2_i~0;~t2_st~0 := 0; {21433#(<= 2 ~M_E~0)} is VALID [2020-07-29 03:08:52,413 INFO L280 TraceCheckUtils]: 6: Hoare triple {21433#(<= 2 ~M_E~0)} assume 0 == ~M_E~0;~M_E~0 := 1; {21432#false} is VALID [2020-07-29 03:08:52,413 INFO L280 TraceCheckUtils]: 7: Hoare triple {21432#false} assume !(0 == ~T1_E~0); {21432#false} is VALID [2020-07-29 03:08:52,413 INFO L280 TraceCheckUtils]: 8: Hoare triple {21432#false} assume !(0 == ~T2_E~0); {21432#false} is VALID [2020-07-29 03:08:52,413 INFO L280 TraceCheckUtils]: 9: Hoare triple {21432#false} assume !(0 == ~E_M~0); {21432#false} is VALID [2020-07-29 03:08:52,413 INFO L280 TraceCheckUtils]: 10: Hoare triple {21432#false} assume !(0 == ~E_1~0); {21432#false} is VALID [2020-07-29 03:08:52,414 INFO L280 TraceCheckUtils]: 11: Hoare triple {21432#false} assume !(0 == ~E_2~0); {21432#false} is VALID [2020-07-29 03:08:52,414 INFO L280 TraceCheckUtils]: 12: Hoare triple {21432#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {21432#false} is VALID [2020-07-29 03:08:52,414 INFO L280 TraceCheckUtils]: 13: Hoare triple {21432#false} assume !(1 == ~m_pc~0); {21432#false} is VALID [2020-07-29 03:08:52,414 INFO L280 TraceCheckUtils]: 14: Hoare triple {21432#false} is_master_triggered_~__retres1~0 := 0; {21432#false} is VALID [2020-07-29 03:08:52,414 INFO L280 TraceCheckUtils]: 15: Hoare triple {21432#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {21432#false} is VALID [2020-07-29 03:08:52,414 INFO L280 TraceCheckUtils]: 16: Hoare triple {21432#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {21432#false} is VALID [2020-07-29 03:08:52,415 INFO L280 TraceCheckUtils]: 17: Hoare triple {21432#false} assume !(0 != activate_threads_~tmp~1); {21432#false} is VALID [2020-07-29 03:08:52,415 INFO L280 TraceCheckUtils]: 18: Hoare triple {21432#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {21432#false} is VALID [2020-07-29 03:08:52,415 INFO L280 TraceCheckUtils]: 19: Hoare triple {21432#false} assume !(1 == ~t1_pc~0); {21432#false} is VALID [2020-07-29 03:08:52,415 INFO L280 TraceCheckUtils]: 20: Hoare triple {21432#false} is_transmit1_triggered_~__retres1~1 := 0; {21432#false} is VALID [2020-07-29 03:08:52,416 INFO L280 TraceCheckUtils]: 21: Hoare triple {21432#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {21432#false} is VALID [2020-07-29 03:08:52,416 INFO L280 TraceCheckUtils]: 22: Hoare triple {21432#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {21432#false} is VALID [2020-07-29 03:08:52,416 INFO L280 TraceCheckUtils]: 23: Hoare triple {21432#false} assume !(0 != activate_threads_~tmp___0~0); {21432#false} is VALID [2020-07-29 03:08:52,416 INFO L280 TraceCheckUtils]: 24: Hoare triple {21432#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {21432#false} is VALID [2020-07-29 03:08:52,416 INFO L280 TraceCheckUtils]: 25: Hoare triple {21432#false} assume !(1 == ~t2_pc~0); {21432#false} is VALID [2020-07-29 03:08:52,417 INFO L280 TraceCheckUtils]: 26: Hoare triple {21432#false} is_transmit2_triggered_~__retres1~2 := 0; {21432#false} is VALID [2020-07-29 03:08:52,417 INFO L280 TraceCheckUtils]: 27: Hoare triple {21432#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {21432#false} is VALID [2020-07-29 03:08:52,417 INFO L280 TraceCheckUtils]: 28: Hoare triple {21432#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {21432#false} is VALID [2020-07-29 03:08:52,417 INFO L280 TraceCheckUtils]: 29: Hoare triple {21432#false} assume !(0 != activate_threads_~tmp___1~0); {21432#false} is VALID [2020-07-29 03:08:52,417 INFO L280 TraceCheckUtils]: 30: Hoare triple {21432#false} assume 1 == ~M_E~0;~M_E~0 := 2; {21432#false} is VALID [2020-07-29 03:08:52,418 INFO L280 TraceCheckUtils]: 31: Hoare triple {21432#false} assume !(1 == ~T1_E~0); {21432#false} is VALID [2020-07-29 03:08:52,418 INFO L280 TraceCheckUtils]: 32: Hoare triple {21432#false} assume !(1 == ~T2_E~0); {21432#false} is VALID [2020-07-29 03:08:52,418 INFO L280 TraceCheckUtils]: 33: Hoare triple {21432#false} assume !(1 == ~E_M~0); {21432#false} is VALID [2020-07-29 03:08:52,418 INFO L280 TraceCheckUtils]: 34: Hoare triple {21432#false} assume !(1 == ~E_1~0); {21432#false} is VALID [2020-07-29 03:08:52,418 INFO L280 TraceCheckUtils]: 35: Hoare triple {21432#false} assume !(1 == ~E_2~0); {21432#false} is VALID [2020-07-29 03:08:52,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:52,419 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120326856] [2020-07-29 03:08:52,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:52,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-07-29 03:08:52,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136461543] [2020-07-29 03:08:52,420 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:52,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:52,421 INFO L82 PathProgramCache]: Analyzing trace with hash -588163790, now seen corresponding path program 1 times [2020-07-29 03:08:52,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:52,421 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293217921] [2020-07-29 03:08:52,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:52,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:52,490 INFO L280 TraceCheckUtils]: 0: Hoare triple {21434#true} assume !false; {21434#true} is VALID [2020-07-29 03:08:52,490 INFO L280 TraceCheckUtils]: 1: Hoare triple {21434#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 2: Hoare triple {21434#true} assume !false; {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 3: Hoare triple {21434#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 4: Hoare triple {21434#true} assume !(0 == ~m_st~0); {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 5: Hoare triple {21434#true} assume !(0 == ~t1_st~0); {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 6: Hoare triple {21434#true} assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 7: Hoare triple {21434#true} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {21434#true} is VALID [2020-07-29 03:08:52,491 INFO L280 TraceCheckUtils]: 8: Hoare triple {21434#true} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {21434#true} is VALID [2020-07-29 03:08:52,492 INFO L280 TraceCheckUtils]: 9: Hoare triple {21434#true} assume !(0 != eval_~tmp~0); {21434#true} is VALID [2020-07-29 03:08:52,492 INFO L280 TraceCheckUtils]: 10: Hoare triple {21434#true} start_simulation_~kernel_st~0 := 2; {21434#true} is VALID [2020-07-29 03:08:52,492 INFO L280 TraceCheckUtils]: 11: Hoare triple {21434#true} start_simulation_~kernel_st~0 := 3; {21434#true} is VALID [2020-07-29 03:08:52,492 INFO L280 TraceCheckUtils]: 12: Hoare triple {21434#true} assume !(0 == ~M_E~0); {21434#true} is VALID [2020-07-29 03:08:52,492 INFO L280 TraceCheckUtils]: 13: Hoare triple {21434#true} assume 0 == ~T1_E~0;~T1_E~0 := 1; {21434#true} is VALID [2020-07-29 03:08:52,497 INFO L280 TraceCheckUtils]: 14: Hoare triple {21434#true} assume !(0 == ~T2_E~0); {21434#true} is VALID [2020-07-29 03:08:52,497 INFO L280 TraceCheckUtils]: 15: Hoare triple {21434#true} assume 0 == ~E_M~0;~E_M~0 := 1; {21434#true} is VALID [2020-07-29 03:08:52,497 INFO L280 TraceCheckUtils]: 16: Hoare triple {21434#true} assume !(0 == ~E_1~0); {21434#true} is VALID [2020-07-29 03:08:52,497 INFO L280 TraceCheckUtils]: 17: Hoare triple {21434#true} assume 0 == ~E_2~0;~E_2~0 := 1; {21434#true} is VALID [2020-07-29 03:08:52,497 INFO L280 TraceCheckUtils]: 18: Hoare triple {21434#true} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {21434#true} is VALID [2020-07-29 03:08:52,497 INFO L280 TraceCheckUtils]: 19: Hoare triple {21434#true} assume !(1 == ~m_pc~0); {21434#true} is VALID [2020-07-29 03:08:52,498 INFO L280 TraceCheckUtils]: 20: Hoare triple {21434#true} is_master_triggered_~__retres1~0 := 0; {21436#(and (<= ULTIMATE.start_is_master_triggered_~__retres1~0 0) (<= 0 ULTIMATE.start_is_master_triggered_~__retres1~0))} is VALID [2020-07-29 03:08:52,498 INFO L280 TraceCheckUtils]: 21: Hoare triple {21436#(and (<= ULTIMATE.start_is_master_triggered_~__retres1~0 0) (<= 0 ULTIMATE.start_is_master_triggered_~__retres1~0))} is_master_triggered_#res := is_master_triggered_~__retres1~0; {21437#(and (<= 0 |ULTIMATE.start_is_master_triggered_#res|) (<= |ULTIMATE.start_is_master_triggered_#res| 0))} is VALID [2020-07-29 03:08:52,499 INFO L280 TraceCheckUtils]: 22: Hoare triple {21437#(and (<= 0 |ULTIMATE.start_is_master_triggered_#res|) (<= |ULTIMATE.start_is_master_triggered_#res| 0))} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {21438#(and (<= 0 ULTIMATE.start_activate_threads_~tmp~1) (<= ULTIMATE.start_activate_threads_~tmp~1 0))} is VALID [2020-07-29 03:08:52,499 INFO L280 TraceCheckUtils]: 23: Hoare triple {21438#(and (<= 0 ULTIMATE.start_activate_threads_~tmp~1) (<= ULTIMATE.start_activate_threads_~tmp~1 0))} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {21435#false} is VALID [2020-07-29 03:08:52,499 INFO L280 TraceCheckUtils]: 24: Hoare triple {21435#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 25: Hoare triple {21435#false} assume !(1 == ~t1_pc~0); {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 26: Hoare triple {21435#false} is_transmit1_triggered_~__retres1~1 := 0; {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 27: Hoare triple {21435#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 28: Hoare triple {21435#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 29: Hoare triple {21435#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 30: Hoare triple {21435#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {21435#false} is VALID [2020-07-29 03:08:52,500 INFO L280 TraceCheckUtils]: 31: Hoare triple {21435#false} assume !(1 == ~t2_pc~0); {21435#false} is VALID [2020-07-29 03:08:52,501 INFO L280 TraceCheckUtils]: 32: Hoare triple {21435#false} is_transmit2_triggered_~__retres1~2 := 0; {21435#false} is VALID [2020-07-29 03:08:52,501 INFO L280 TraceCheckUtils]: 33: Hoare triple {21435#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {21435#false} is VALID [2020-07-29 03:08:52,501 INFO L280 TraceCheckUtils]: 34: Hoare triple {21435#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {21435#false} is VALID [2020-07-29 03:08:52,501 INFO L280 TraceCheckUtils]: 35: Hoare triple {21435#false} assume !(0 != activate_threads_~tmp___1~0); {21435#false} is VALID [2020-07-29 03:08:52,501 INFO L280 TraceCheckUtils]: 36: Hoare triple {21435#false} assume !(1 == ~M_E~0); {21435#false} is VALID [2020-07-29 03:08:52,502 INFO L280 TraceCheckUtils]: 37: Hoare triple {21435#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {21435#false} is VALID [2020-07-29 03:08:52,502 INFO L280 TraceCheckUtils]: 38: Hoare triple {21435#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {21435#false} is VALID [2020-07-29 03:08:52,502 INFO L280 TraceCheckUtils]: 39: Hoare triple {21435#false} assume 1 == ~E_M~0;~E_M~0 := 2; {21435#false} is VALID [2020-07-29 03:08:52,502 INFO L280 TraceCheckUtils]: 40: Hoare triple {21435#false} assume !(1 == ~E_1~0); {21435#false} is VALID [2020-07-29 03:08:52,503 INFO L280 TraceCheckUtils]: 41: Hoare triple {21435#false} assume 1 == ~E_2~0;~E_2~0 := 2; {21435#false} is VALID [2020-07-29 03:08:52,503 INFO L280 TraceCheckUtils]: 42: Hoare triple {21435#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {21435#false} is VALID [2020-07-29 03:08:52,503 INFO L280 TraceCheckUtils]: 43: Hoare triple {21435#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {21435#false} is VALID [2020-07-29 03:08:52,503 INFO L280 TraceCheckUtils]: 44: Hoare triple {21435#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {21435#false} is VALID [2020-07-29 03:08:52,503 INFO L280 TraceCheckUtils]: 45: Hoare triple {21435#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {21435#false} is VALID [2020-07-29 03:08:52,503 INFO L280 TraceCheckUtils]: 46: Hoare triple {21435#false} assume !(0 == start_simulation_~tmp~3); {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 47: Hoare triple {21435#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 48: Hoare triple {21435#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 49: Hoare triple {21435#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 50: Hoare triple {21435#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 51: Hoare triple {21435#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 52: Hoare triple {21435#false} stop_simulation_#res := stop_simulation_~__retres2~0; {21435#false} is VALID [2020-07-29 03:08:52,504 INFO L280 TraceCheckUtils]: 53: Hoare triple {21435#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {21435#false} is VALID [2020-07-29 03:08:52,505 INFO L280 TraceCheckUtils]: 54: Hoare triple {21435#false} assume !(0 != start_simulation_~tmp___0~1); {21435#false} is VALID [2020-07-29 03:08:52,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:52,507 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293217921] [2020-07-29 03:08:52,507 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:52,507 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:52,507 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1153622515] [2020-07-29 03:08:52,507 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:52,508 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:52,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:52,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:52,508 INFO L87 Difference]: Start difference. First operand 842 states and 1173 transitions. cyclomatic complexity: 335 Second operand 3 states. [2020-07-29 03:08:52,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:52,778 INFO L93 Difference]: Finished difference Result 698 states and 968 transitions. [2020-07-29 03:08:52,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:52,778 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:52,814 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:52,815 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 698 states and 968 transitions. [2020-07-29 03:08:52,836 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 650 [2020-07-29 03:08:52,857 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 698 states to 698 states and 968 transitions. [2020-07-29 03:08:52,857 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 698 [2020-07-29 03:08:52,858 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 698 [2020-07-29 03:08:52,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 698 states and 968 transitions. [2020-07-29 03:08:52,859 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:52,859 INFO L688 BuchiCegarLoop]: Abstraction has 698 states and 968 transitions. [2020-07-29 03:08:52,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 698 states and 968 transitions. [2020-07-29 03:08:52,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 698 to 698. [2020-07-29 03:08:52,868 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:52,868 INFO L82 GeneralOperation]: Start isEquivalent. First operand 698 states and 968 transitions. Second operand 698 states. [2020-07-29 03:08:52,868 INFO L74 IsIncluded]: Start isIncluded. First operand 698 states and 968 transitions. Second operand 698 states. [2020-07-29 03:08:52,869 INFO L87 Difference]: Start difference. First operand 698 states and 968 transitions. Second operand 698 states. [2020-07-29 03:08:52,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:52,888 INFO L93 Difference]: Finished difference Result 698 states and 968 transitions. [2020-07-29 03:08:52,888 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 968 transitions. [2020-07-29 03:08:52,889 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:52,889 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:52,889 INFO L74 IsIncluded]: Start isIncluded. First operand 698 states. Second operand 698 states and 968 transitions. [2020-07-29 03:08:52,890 INFO L87 Difference]: Start difference. First operand 698 states. Second operand 698 states and 968 transitions. [2020-07-29 03:08:52,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:52,912 INFO L93 Difference]: Finished difference Result 698 states and 968 transitions. [2020-07-29 03:08:52,912 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 968 transitions. [2020-07-29 03:08:52,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:52,913 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:52,913 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:52,914 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:52,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 698 states. [2020-07-29 03:08:52,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 968 transitions. [2020-07-29 03:08:52,934 INFO L711 BuchiCegarLoop]: Abstraction has 698 states and 968 transitions. [2020-07-29 03:08:52,934 INFO L591 BuchiCegarLoop]: Abstraction has 698 states and 968 transitions. [2020-07-29 03:08:52,934 INFO L424 BuchiCegarLoop]: ======== Iteration 10============ [2020-07-29 03:08:52,934 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 698 states and 968 transitions. [2020-07-29 03:08:52,936 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 650 [2020-07-29 03:08:52,937 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:52,937 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:52,937 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:52,937 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:52,938 INFO L794 eck$LassoCheckResult]: Stem: 22300#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 22148#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 22149#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 22282#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 22283#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 22334#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 22335#L243-1 assume !(0 == ~M_E~0); 22316#L346-1 assume !(0 == ~T1_E~0); 22150#L351-1 assume !(0 == ~T2_E~0); 22151#L356-1 assume !(0 == ~E_M~0); 22199#L361-1 assume !(0 == ~E_1~0); 22239#L366-1 assume !(0 == ~E_2~0); 22383#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 22369#L168 assume !(1 == ~m_pc~0); 22362#L168-2 is_master_triggered_~__retres1~0 := 0; 22363#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 22191#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 22192#L427 assume !(0 != activate_threads_~tmp~1); 22230#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 22231#L187 assume !(1 == ~t1_pc~0); 22292#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 22294#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 22295#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 22278#L435 assume !(0 != activate_threads_~tmp___0~0); 22279#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 22284#L206 assume !(1 == ~t2_pc~0); 22209#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 22394#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 22212#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 22213#L443 assume !(0 != activate_threads_~tmp___1~0); 22379#L443-2 assume !(1 == ~M_E~0); 22193#L384-1 assume !(1 == ~T1_E~0); 22194#L389-1 assume !(1 == ~T2_E~0); 22198#L394-1 assume !(1 == ~E_M~0); 22232#L399-1 assume !(1 == ~E_1~0); 22380#L404-1 assume !(1 == ~E_2~0); 22146#L555-1 [2020-07-29 03:08:52,938 INFO L796 eck$LassoCheckResult]: Loop: 22146#L555-1 assume !false; 22147#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 22153#L321 assume !false; 22220#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 22221#L256 assume !(0 == ~m_st~0); 22337#L260 assume !(0 == ~t1_st~0); 22297#L264 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 22298#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 22831#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 22830#L288 assume !(0 != eval_~tmp~0); 22289#L336 start_simulation_~kernel_st~0 := 2; 22280#L226-1 start_simulation_~kernel_st~0 := 3; 22281#L346-2 assume !(0 == ~M_E~0); 22317#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 22160#L351-3 assume !(0 == ~T2_E~0); 22161#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 22201#L361-3 assume !(0 == ~E_1~0); 22251#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 22386#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 22222#L168-12 assume !(1 == ~m_pc~0); 22210#L168-14 is_master_triggered_~__retres1~0 := 0; 22211#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 22170#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 22171#L427-12 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 22202#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 22203#L187-12 assume !(1 == ~t1_pc~0); 22264#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 22751#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 22750#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 22749#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 22748#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 22389#L206-12 assume 1 == ~t2_pc~0; 22236#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 22237#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 22240#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 22241#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 22378#L443-14 assume !(1 == ~M_E~0); 22762#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 22761#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 22247#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 22248#L399-3 assume !(1 == ~E_1~0); 22384#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 22759#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 22757#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 22755#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 22139#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 22140#L574 assume !(0 == start_simulation_~tmp~3); 22752#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 22370#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 22206#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 22137#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 22138#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 22357#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 22359#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 22225#L587 assume !(0 != start_simulation_~tmp___0~1); 22146#L555-1 [2020-07-29 03:08:52,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:52,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1974330332, now seen corresponding path program 3 times [2020-07-29 03:08:52,938 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:52,939 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682816942] [2020-07-29 03:08:52,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:52,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:52,945 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:52,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:52,949 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:52,955 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:52,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:52,956 INFO L82 PathProgramCache]: Analyzing trace with hash 1819879637, now seen corresponding path program 1 times [2020-07-29 03:08:52,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:52,956 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366335117] [2020-07-29 03:08:52,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:52,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:53,030 INFO L280 TraceCheckUtils]: 0: Hoare triple {24236#true} assume !false; {24236#true} is VALID [2020-07-29 03:08:53,030 INFO L280 TraceCheckUtils]: 1: Hoare triple {24236#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {24236#true} is VALID [2020-07-29 03:08:53,030 INFO L280 TraceCheckUtils]: 2: Hoare triple {24236#true} assume !false; {24236#true} is VALID [2020-07-29 03:08:53,030 INFO L280 TraceCheckUtils]: 3: Hoare triple {24236#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 4: Hoare triple {24236#true} assume !(0 == ~m_st~0); {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 5: Hoare triple {24236#true} assume !(0 == ~t1_st~0); {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 6: Hoare triple {24236#true} assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 7: Hoare triple {24236#true} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 8: Hoare triple {24236#true} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 9: Hoare triple {24236#true} assume !(0 != eval_~tmp~0); {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 10: Hoare triple {24236#true} start_simulation_~kernel_st~0 := 2; {24236#true} is VALID [2020-07-29 03:08:53,031 INFO L280 TraceCheckUtils]: 11: Hoare triple {24236#true} start_simulation_~kernel_st~0 := 3; {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 12: Hoare triple {24236#true} assume !(0 == ~M_E~0); {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 13: Hoare triple {24236#true} assume 0 == ~T1_E~0;~T1_E~0 := 1; {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 14: Hoare triple {24236#true} assume !(0 == ~T2_E~0); {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 15: Hoare triple {24236#true} assume 0 == ~E_M~0;~E_M~0 := 1; {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 16: Hoare triple {24236#true} assume !(0 == ~E_1~0); {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 17: Hoare triple {24236#true} assume 0 == ~E_2~0;~E_2~0 := 1; {24236#true} is VALID [2020-07-29 03:08:53,032 INFO L280 TraceCheckUtils]: 18: Hoare triple {24236#true} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {24236#true} is VALID [2020-07-29 03:08:53,033 INFO L280 TraceCheckUtils]: 19: Hoare triple {24236#true} assume !(1 == ~m_pc~0); {24236#true} is VALID [2020-07-29 03:08:53,033 INFO L280 TraceCheckUtils]: 20: Hoare triple {24236#true} is_master_triggered_~__retres1~0 := 0; {24238#(and (<= ULTIMATE.start_is_master_triggered_~__retres1~0 0) (<= 0 ULTIMATE.start_is_master_triggered_~__retres1~0))} is VALID [2020-07-29 03:08:53,033 INFO L280 TraceCheckUtils]: 21: Hoare triple {24238#(and (<= ULTIMATE.start_is_master_triggered_~__retres1~0 0) (<= 0 ULTIMATE.start_is_master_triggered_~__retres1~0))} is_master_triggered_#res := is_master_triggered_~__retres1~0; {24239#(and (<= 0 |ULTIMATE.start_is_master_triggered_#res|) (<= |ULTIMATE.start_is_master_triggered_#res| 0))} is VALID [2020-07-29 03:08:53,034 INFO L280 TraceCheckUtils]: 22: Hoare triple {24239#(and (<= 0 |ULTIMATE.start_is_master_triggered_#res|) (<= |ULTIMATE.start_is_master_triggered_#res| 0))} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {24240#(and (<= 0 ULTIMATE.start_activate_threads_~tmp~1) (<= ULTIMATE.start_activate_threads_~tmp~1 0))} is VALID [2020-07-29 03:08:53,034 INFO L280 TraceCheckUtils]: 23: Hoare triple {24240#(and (<= 0 ULTIMATE.start_activate_threads_~tmp~1) (<= ULTIMATE.start_activate_threads_~tmp~1 0))} assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 24: Hoare triple {24237#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 25: Hoare triple {24237#false} assume !(1 == ~t1_pc~0); {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 26: Hoare triple {24237#false} is_transmit1_triggered_~__retres1~1 := 0; {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 27: Hoare triple {24237#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 28: Hoare triple {24237#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 29: Hoare triple {24237#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {24237#false} is VALID [2020-07-29 03:08:53,035 INFO L280 TraceCheckUtils]: 30: Hoare triple {24237#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {24237#false} is VALID [2020-07-29 03:08:53,036 INFO L280 TraceCheckUtils]: 31: Hoare triple {24237#false} assume 1 == ~t2_pc~0; {24237#false} is VALID [2020-07-29 03:08:53,036 INFO L280 TraceCheckUtils]: 32: Hoare triple {24237#false} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {24237#false} is VALID [2020-07-29 03:08:53,036 INFO L280 TraceCheckUtils]: 33: Hoare triple {24237#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {24237#false} is VALID [2020-07-29 03:08:53,036 INFO L280 TraceCheckUtils]: 34: Hoare triple {24237#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {24237#false} is VALID [2020-07-29 03:08:53,036 INFO L280 TraceCheckUtils]: 35: Hoare triple {24237#false} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {24237#false} is VALID [2020-07-29 03:08:53,037 INFO L280 TraceCheckUtils]: 36: Hoare triple {24237#false} assume !(1 == ~M_E~0); {24237#false} is VALID [2020-07-29 03:08:53,037 INFO L280 TraceCheckUtils]: 37: Hoare triple {24237#false} assume 1 == ~T1_E~0;~T1_E~0 := 2; {24237#false} is VALID [2020-07-29 03:08:53,037 INFO L280 TraceCheckUtils]: 38: Hoare triple {24237#false} assume 1 == ~T2_E~0;~T2_E~0 := 2; {24237#false} is VALID [2020-07-29 03:08:53,037 INFO L280 TraceCheckUtils]: 39: Hoare triple {24237#false} assume 1 == ~E_M~0;~E_M~0 := 2; {24237#false} is VALID [2020-07-29 03:08:53,038 INFO L280 TraceCheckUtils]: 40: Hoare triple {24237#false} assume !(1 == ~E_1~0); {24237#false} is VALID [2020-07-29 03:08:53,038 INFO L280 TraceCheckUtils]: 41: Hoare triple {24237#false} assume 1 == ~E_2~0;~E_2~0 := 2; {24237#false} is VALID [2020-07-29 03:08:53,038 INFO L280 TraceCheckUtils]: 42: Hoare triple {24237#false} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {24237#false} is VALID [2020-07-29 03:08:53,038 INFO L280 TraceCheckUtils]: 43: Hoare triple {24237#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {24237#false} is VALID [2020-07-29 03:08:53,038 INFO L280 TraceCheckUtils]: 44: Hoare triple {24237#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {24237#false} is VALID [2020-07-29 03:08:53,038 INFO L280 TraceCheckUtils]: 45: Hoare triple {24237#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 46: Hoare triple {24237#false} assume !(0 == start_simulation_~tmp~3); {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 47: Hoare triple {24237#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 48: Hoare triple {24237#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 49: Hoare triple {24237#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 50: Hoare triple {24237#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 51: Hoare triple {24237#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {24237#false} is VALID [2020-07-29 03:08:53,039 INFO L280 TraceCheckUtils]: 52: Hoare triple {24237#false} stop_simulation_#res := stop_simulation_~__retres2~0; {24237#false} is VALID [2020-07-29 03:08:53,040 INFO L280 TraceCheckUtils]: 53: Hoare triple {24237#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {24237#false} is VALID [2020-07-29 03:08:53,040 INFO L280 TraceCheckUtils]: 54: Hoare triple {24237#false} assume !(0 != start_simulation_~tmp___0~1); {24237#false} is VALID [2020-07-29 03:08:53,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:53,041 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1366335117] [2020-07-29 03:08:53,041 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:53,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-07-29 03:08:53,042 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857757546] [2020-07-29 03:08:53,042 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:53,042 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:53,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-07-29 03:08:53,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-07-29 03:08:53,043 INFO L87 Difference]: Start difference. First operand 698 states and 968 transitions. cyclomatic complexity: 274 Second operand 5 states. [2020-07-29 03:08:54,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:54,614 INFO L93 Difference]: Finished difference Result 1347 states and 1851 transitions. [2020-07-29 03:08:54,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-07-29 03:08:54,615 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2020-07-29 03:08:54,672 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:54,672 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,730 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1295 [2020-07-29 03:08:54,783 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1347 states to 1347 states and 1851 transitions. [2020-07-29 03:08:54,783 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1347 [2020-07-29 03:08:54,784 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1347 [2020-07-29 03:08:54,784 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,786 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:54,786 INFO L688 BuchiCegarLoop]: Abstraction has 1347 states and 1851 transitions. [2020-07-29 03:08:54,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1347 to 725. [2020-07-29 03:08:54,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:54,800 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1347 states and 1851 transitions. Second operand 725 states. [2020-07-29 03:08:54,800 INFO L74 IsIncluded]: Start isIncluded. First operand 1347 states and 1851 transitions. Second operand 725 states. [2020-07-29 03:08:54,800 INFO L87 Difference]: Start difference. First operand 1347 states and 1851 transitions. Second operand 725 states. [2020-07-29 03:08:54,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:54,886 INFO L93 Difference]: Finished difference Result 1347 states and 1851 transitions. [2020-07-29 03:08:54,887 INFO L276 IsEmpty]: Start isEmpty. Operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,889 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:54,889 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:54,889 INFO L74 IsIncluded]: Start isIncluded. First operand 725 states. Second operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,889 INFO L87 Difference]: Start difference. First operand 725 states. Second operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:54,954 INFO L93 Difference]: Finished difference Result 1347 states and 1851 transitions. [2020-07-29 03:08:54,954 INFO L276 IsEmpty]: Start isEmpty. Operand 1347 states and 1851 transitions. [2020-07-29 03:08:54,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:54,956 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:54,957 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:54,957 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:54,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 725 states. [2020-07-29 03:08:54,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 725 states to 725 states and 987 transitions. [2020-07-29 03:08:54,984 INFO L711 BuchiCegarLoop]: Abstraction has 725 states and 987 transitions. [2020-07-29 03:08:54,985 INFO L591 BuchiCegarLoop]: Abstraction has 725 states and 987 transitions. [2020-07-29 03:08:54,985 INFO L424 BuchiCegarLoop]: ======== Iteration 11============ [2020-07-29 03:08:54,985 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 725 states and 987 transitions. [2020-07-29 03:08:54,988 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 677 [2020-07-29 03:08:54,988 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:54,988 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:54,989 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:54,989 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:54,990 INFO L794 eck$LassoCheckResult]: Stem: 25758#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 25604#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 25605#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 25742#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 25743#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 25789#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 25790#L243-1 assume !(0 == ~M_E~0); 25774#L346-1 assume !(0 == ~T1_E~0); 25606#L351-1 assume !(0 == ~T2_E~0); 25607#L356-1 assume !(0 == ~E_M~0); 25655#L361-1 assume !(0 == ~E_1~0); 25696#L366-1 assume !(0 == ~E_2~0); 25842#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 25830#L168 assume !(1 == ~m_pc~0); 25821#L168-2 is_master_triggered_~__retres1~0 := 0; 25822#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 25647#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 25648#L427 assume !(0 != activate_threads_~tmp~1); 25687#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 25688#L187 assume !(1 == ~t1_pc~0); 25750#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 25752#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 25753#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 25737#L435 assume !(0 != activate_threads_~tmp___0~0); 25738#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 25744#L206 assume !(1 == ~t2_pc~0); 25666#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 25857#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 25861#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 25851#L443 assume !(0 != activate_threads_~tmp___1~0); 25838#L443-2 assume !(1 == ~M_E~0); 25649#L384-1 assume !(1 == ~T1_E~0); 25650#L389-1 assume !(1 == ~T2_E~0); 25654#L394-1 assume !(1 == ~E_M~0); 25689#L399-1 assume !(1 == ~E_1~0); 25839#L404-1 assume !(1 == ~E_2~0); 25855#L555-1 [2020-07-29 03:08:54,990 INFO L796 eck$LassoCheckResult]: Loop: 25855#L555-1 assume !false; 25912#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 25913#L321 assume !false; 25908#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 25909#L256 assume !(0 == ~m_st~0); 26038#L260 assume !(0 == ~t1_st~0); 26037#L264 assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; 25901#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 25902#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 25897#L288 assume !(0 != eval_~tmp~0); 25895#L336 start_simulation_~kernel_st~0 := 2; 25896#L226-1 start_simulation_~kernel_st~0 := 3; 25891#L346-2 assume !(0 == ~M_E~0); 25892#L346-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 25887#L351-3 assume !(0 == ~T2_E~0); 25888#L356-3 assume 0 == ~E_M~0;~E_M~0 := 1; 25883#L361-3 assume !(0 == ~E_1~0); 25884#L366-3 assume 0 == ~E_2~0;~E_2~0 := 1; 25878#L371-3 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 25879#L168-12 assume !(1 == ~m_pc~0); 26153#L168-14 is_master_triggered_~__retres1~0 := 0; 26151#L179-4 is_master_triggered_#res := is_master_triggered_~__retres1~0; 26149#L180-4 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 26147#L427-12 assume !(0 != activate_threads_~tmp~1); 26145#L427-14 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 26140#L187-12 assume !(1 == ~t1_pc~0); 26136#L187-14 is_transmit1_triggered_~__retres1~1 := 0; 26132#L198-4 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 26128#L199-4 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 26123#L435-12 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 26119#L435-14 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 26115#L206-12 assume 1 == ~t2_pc~0; 26109#L207-4 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 26103#L217-4 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 26097#L218-4 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 26091#L443-12 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 26086#L443-14 assume !(1 == ~M_E~0); 26080#L384-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 26074#L389-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 26068#L394-3 assume 1 == ~E_M~0;~E_M~0 := 2; 26063#L399-3 assume !(1 == ~E_1~0); 26060#L404-3 assume 1 == ~E_2~0;~E_2~0 := 2; 26058#L409-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 26051#L256-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 26021#L273-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 26022#L274-1 start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; 26009#L574 assume !(0 == start_simulation_~tmp~3); 26008#L574-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 26001#L256-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 26000#L273-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 25992#L274-2 stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; 25993#L529 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 25981#L536 stop_simulation_#res := stop_simulation_~__retres2~0; 25982#L537 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 25966#L587 assume !(0 != start_simulation_~tmp___0~1); 25855#L555-1 [2020-07-29 03:08:54,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:54,990 INFO L82 PathProgramCache]: Analyzing trace with hash -1974330332, now seen corresponding path program 4 times [2020-07-29 03:08:54,991 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:54,991 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683808057] [2020-07-29 03:08:54,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:54,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:54,997 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:55,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:55,001 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:55,008 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:55,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:55,009 INFO L82 PathProgramCache]: Analyzing trace with hash 2094639251, now seen corresponding path program 1 times [2020-07-29 03:08:55,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:55,009 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279194456] [2020-07-29 03:08:55,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:55,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:55,033 INFO L280 TraceCheckUtils]: 0: Hoare triple {29017#true} assume !false; {29017#true} is VALID [2020-07-29 03:08:55,033 INFO L280 TraceCheckUtils]: 1: Hoare triple {29017#true} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {29017#true} is VALID [2020-07-29 03:08:55,033 INFO L280 TraceCheckUtils]: 2: Hoare triple {29017#true} assume !false; {29017#true} is VALID [2020-07-29 03:08:55,034 INFO L280 TraceCheckUtils]: 3: Hoare triple {29017#true} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {29017#true} is VALID [2020-07-29 03:08:55,034 INFO L280 TraceCheckUtils]: 4: Hoare triple {29017#true} assume !(0 == ~m_st~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,035 INFO L280 TraceCheckUtils]: 5: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 == ~t1_st~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,036 INFO L280 TraceCheckUtils]: 6: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 == ~t2_st~0);exists_runnable_thread_~__retres1~3 := 0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,040 INFO L280 TraceCheckUtils]: 7: Hoare triple {29019#(not (= 0 ~m_st~0))} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,041 INFO L280 TraceCheckUtils]: 8: Hoare triple {29019#(not (= 0 ~m_st~0))} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,042 INFO L280 TraceCheckUtils]: 9: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 != eval_~tmp~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,042 INFO L280 TraceCheckUtils]: 10: Hoare triple {29019#(not (= 0 ~m_st~0))} start_simulation_~kernel_st~0 := 2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,043 INFO L280 TraceCheckUtils]: 11: Hoare triple {29019#(not (= 0 ~m_st~0))} start_simulation_~kernel_st~0 := 3; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,043 INFO L280 TraceCheckUtils]: 12: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 == ~M_E~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,044 INFO L280 TraceCheckUtils]: 13: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 0 == ~T1_E~0;~T1_E~0 := 1; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,045 INFO L280 TraceCheckUtils]: 14: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 == ~T2_E~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,045 INFO L280 TraceCheckUtils]: 15: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 0 == ~E_M~0;~E_M~0 := 1; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,046 INFO L280 TraceCheckUtils]: 16: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 == ~E_1~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,046 INFO L280 TraceCheckUtils]: 17: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 0 == ~E_2~0;~E_2~0 := 1; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,047 INFO L280 TraceCheckUtils]: 18: Hoare triple {29019#(not (= 0 ~m_st~0))} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,047 INFO L280 TraceCheckUtils]: 19: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(1 == ~m_pc~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,048 INFO L280 TraceCheckUtils]: 20: Hoare triple {29019#(not (= 0 ~m_st~0))} is_master_triggered_~__retres1~0 := 0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,049 INFO L280 TraceCheckUtils]: 21: Hoare triple {29019#(not (= 0 ~m_st~0))} is_master_triggered_#res := is_master_triggered_~__retres1~0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,049 INFO L280 TraceCheckUtils]: 22: Hoare triple {29019#(not (= 0 ~m_st~0))} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,050 INFO L280 TraceCheckUtils]: 23: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(0 != activate_threads_~tmp~1); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,050 INFO L280 TraceCheckUtils]: 24: Hoare triple {29019#(not (= 0 ~m_st~0))} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,051 INFO L280 TraceCheckUtils]: 25: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(1 == ~t1_pc~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,051 INFO L280 TraceCheckUtils]: 26: Hoare triple {29019#(not (= 0 ~m_st~0))} is_transmit1_triggered_~__retres1~1 := 0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,052 INFO L280 TraceCheckUtils]: 27: Hoare triple {29019#(not (= 0 ~m_st~0))} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,053 INFO L280 TraceCheckUtils]: 28: Hoare triple {29019#(not (= 0 ~m_st~0))} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,053 INFO L280 TraceCheckUtils]: 29: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,054 INFO L280 TraceCheckUtils]: 30: Hoare triple {29019#(not (= 0 ~m_st~0))} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,054 INFO L280 TraceCheckUtils]: 31: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 1 == ~t2_pc~0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,055 INFO L280 TraceCheckUtils]: 32: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,055 INFO L280 TraceCheckUtils]: 33: Hoare triple {29019#(not (= 0 ~m_st~0))} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,056 INFO L280 TraceCheckUtils]: 34: Hoare triple {29019#(not (= 0 ~m_st~0))} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,056 INFO L280 TraceCheckUtils]: 35: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,057 INFO L280 TraceCheckUtils]: 36: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(1 == ~M_E~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,057 INFO L280 TraceCheckUtils]: 37: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 1 == ~T1_E~0;~T1_E~0 := 2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,058 INFO L280 TraceCheckUtils]: 38: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 1 == ~T2_E~0;~T2_E~0 := 2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,058 INFO L280 TraceCheckUtils]: 39: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 1 == ~E_M~0;~E_M~0 := 2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,059 INFO L280 TraceCheckUtils]: 40: Hoare triple {29019#(not (= 0 ~m_st~0))} assume !(1 == ~E_1~0); {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,059 INFO L280 TraceCheckUtils]: 41: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 1 == ~E_2~0;~E_2~0 := 2; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,060 INFO L280 TraceCheckUtils]: 42: Hoare triple {29019#(not (= 0 ~m_st~0))} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {29019#(not (= 0 ~m_st~0))} is VALID [2020-07-29 03:08:55,061 INFO L280 TraceCheckUtils]: 43: Hoare triple {29019#(not (= 0 ~m_st~0))} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {29018#false} is VALID [2020-07-29 03:08:55,061 INFO L280 TraceCheckUtils]: 44: Hoare triple {29018#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {29018#false} is VALID [2020-07-29 03:08:55,061 INFO L280 TraceCheckUtils]: 45: Hoare triple {29018#false} start_simulation_#t~ret10 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret10;havoc start_simulation_#t~ret10; {29018#false} is VALID [2020-07-29 03:08:55,061 INFO L280 TraceCheckUtils]: 46: Hoare triple {29018#false} assume !(0 == start_simulation_~tmp~3); {29018#false} is VALID [2020-07-29 03:08:55,061 INFO L280 TraceCheckUtils]: 47: Hoare triple {29018#false} havoc stop_simulation_#res;havoc stop_simulation_#t~ret9, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {29018#false} is VALID [2020-07-29 03:08:55,061 INFO L280 TraceCheckUtils]: 48: Hoare triple {29018#false} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {29018#false} is VALID [2020-07-29 03:08:55,062 INFO L280 TraceCheckUtils]: 49: Hoare triple {29018#false} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {29018#false} is VALID [2020-07-29 03:08:55,062 INFO L280 TraceCheckUtils]: 50: Hoare triple {29018#false} stop_simulation_#t~ret9 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret9;havoc stop_simulation_#t~ret9; {29018#false} is VALID [2020-07-29 03:08:55,062 INFO L280 TraceCheckUtils]: 51: Hoare triple {29018#false} assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; {29018#false} is VALID [2020-07-29 03:08:55,062 INFO L280 TraceCheckUtils]: 52: Hoare triple {29018#false} stop_simulation_#res := stop_simulation_~__retres2~0; {29018#false} is VALID [2020-07-29 03:08:55,063 INFO L280 TraceCheckUtils]: 53: Hoare triple {29018#false} start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; {29018#false} is VALID [2020-07-29 03:08:55,063 INFO L280 TraceCheckUtils]: 54: Hoare triple {29018#false} assume !(0 != start_simulation_~tmp___0~1); {29018#false} is VALID [2020-07-29 03:08:55,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:55,066 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [279194456] [2020-07-29 03:08:55,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:55,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-07-29 03:08:55,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139947504] [2020-07-29 03:08:55,068 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-07-29 03:08:55,068 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:55,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:55,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:55,068 INFO L87 Difference]: Start difference. First operand 725 states and 987 transitions. cyclomatic complexity: 266 Second operand 3 states. [2020-07-29 03:08:55,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:55,626 INFO L93 Difference]: Finished difference Result 1128 states and 1507 transitions. [2020-07-29 03:08:55,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:55,626 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:55,683 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:55,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,752 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1074 [2020-07-29 03:08:55,823 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1128 states to 1128 states and 1507 transitions. [2020-07-29 03:08:55,823 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1128 [2020-07-29 03:08:55,825 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1128 [2020-07-29 03:08:55,825 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,826 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:55,827 INFO L688 BuchiCegarLoop]: Abstraction has 1128 states and 1507 transitions. [2020-07-29 03:08:55,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1128 to 1093. [2020-07-29 03:08:55,845 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:55,845 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1128 states and 1507 transitions. Second operand 1093 states. [2020-07-29 03:08:55,845 INFO L74 IsIncluded]: Start isIncluded. First operand 1128 states and 1507 transitions. Second operand 1093 states. [2020-07-29 03:08:55,846 INFO L87 Difference]: Start difference. First operand 1128 states and 1507 transitions. Second operand 1093 states. [2020-07-29 03:08:55,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:55,902 INFO L93 Difference]: Finished difference Result 1128 states and 1507 transitions. [2020-07-29 03:08:55,903 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,904 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:55,904 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:55,905 INFO L74 IsIncluded]: Start isIncluded. First operand 1093 states. Second operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,905 INFO L87 Difference]: Start difference. First operand 1093 states. Second operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:55,944 INFO L93 Difference]: Finished difference Result 1128 states and 1507 transitions. [2020-07-29 03:08:55,944 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1507 transitions. [2020-07-29 03:08:55,945 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:55,945 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:55,945 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:55,945 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:55,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1093 states. [2020-07-29 03:08:55,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1093 states to 1093 states and 1462 transitions. [2020-07-29 03:08:55,993 INFO L711 BuchiCegarLoop]: Abstraction has 1093 states and 1462 transitions. [2020-07-29 03:08:55,993 INFO L591 BuchiCegarLoop]: Abstraction has 1093 states and 1462 transitions. [2020-07-29 03:08:55,993 INFO L424 BuchiCegarLoop]: ======== Iteration 12============ [2020-07-29 03:08:55,993 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1093 states and 1462 transitions. [2020-07-29 03:08:55,997 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1039 [2020-07-29 03:08:55,997 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:55,997 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:55,998 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:55,998 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:55,998 INFO L794 eck$LassoCheckResult]: Stem: 30317#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 30159#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 30160#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 30299#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 30300#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 30346#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 30347#L243-1 assume !(0 == ~M_E~0); 30331#L346-1 assume !(0 == ~T1_E~0); 30161#L351-1 assume !(0 == ~T2_E~0); 30162#L356-1 assume !(0 == ~E_M~0); 30211#L361-1 assume !(0 == ~E_1~0); 30247#L366-1 assume !(0 == ~E_2~0); 30390#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 30378#L168 assume !(1 == ~m_pc~0); 30373#L168-2 is_master_triggered_~__retres1~0 := 0; 30374#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 30203#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 30204#L427 assume !(0 != activate_threads_~tmp~1); 30239#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 30240#L187 assume !(1 == ~t1_pc~0); 30307#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 30308#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 30309#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 30294#L435 assume !(0 != activate_threads_~tmp___0~0); 30295#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 30301#L206 assume !(1 == ~t2_pc~0); 30221#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 30402#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 30224#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 30225#L443 assume !(0 != activate_threads_~tmp___1~0); 30386#L443-2 assume !(1 == ~M_E~0); 30205#L384-1 assume !(1 == ~T1_E~0); 30206#L389-1 assume !(1 == ~T2_E~0); 30210#L394-1 assume !(1 == ~E_M~0); 30241#L399-1 assume !(1 == ~E_1~0); 30387#L404-1 assume !(1 == ~E_2~0); 30401#L555-1 assume !false; 31021#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 31019#L321 [2020-07-29 03:08:55,999 INFO L796 eck$LassoCheckResult]: Loop: 31019#L321 assume !false; 31017#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 31015#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 31013#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 31011#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 31009#L288 assume 0 != eval_~tmp~0; 31007#L288-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 30154#L296 assume !(0 != eval_~tmp_ndt_1~0); 30155#L293 assume !(0 == ~t1_st~0); 30860#L307 assume !(0 == ~t2_st~0); 31019#L321 [2020-07-29 03:08:55,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:55,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1044101446, now seen corresponding path program 1 times [2020-07-29 03:08:56,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:56,000 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584747161] [2020-07-29 03:08:56,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:56,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:56,007 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:56,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:56,011 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:56,017 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:56,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:56,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1924934063, now seen corresponding path program 1 times [2020-07-29 03:08:56,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:56,018 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347151480] [2020-07-29 03:08:56,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:56,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:56,022 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:56,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:56,023 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:56,025 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:56,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:56,026 INFO L82 PathProgramCache]: Analyzing trace with hash -460292778, now seen corresponding path program 1 times [2020-07-29 03:08:56,026 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:56,027 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171941532] [2020-07-29 03:08:56,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:56,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:56,065 INFO L280 TraceCheckUtils]: 0: Hoare triple {33504#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {33504#true} is VALID [2020-07-29 03:08:56,065 INFO L280 TraceCheckUtils]: 1: Hoare triple {33504#true} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {33504#true} is VALID [2020-07-29 03:08:56,065 INFO L280 TraceCheckUtils]: 2: Hoare triple {33504#true} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {33504#true} is VALID [2020-07-29 03:08:56,065 INFO L280 TraceCheckUtils]: 3: Hoare triple {33504#true} assume 1 == ~m_i~0;~m_st~0 := 0; {33504#true} is VALID [2020-07-29 03:08:56,066 INFO L280 TraceCheckUtils]: 4: Hoare triple {33504#true} assume 1 == ~t1_i~0;~t1_st~0 := 0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,066 INFO L280 TraceCheckUtils]: 5: Hoare triple {33506#(= 0 ~t1_st~0)} assume 1 == ~t2_i~0;~t2_st~0 := 0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,067 INFO L280 TraceCheckUtils]: 6: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~M_E~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,068 INFO L280 TraceCheckUtils]: 7: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~T1_E~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,068 INFO L280 TraceCheckUtils]: 8: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~T2_E~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,069 INFO L280 TraceCheckUtils]: 9: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~E_M~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,070 INFO L280 TraceCheckUtils]: 10: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~E_1~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,070 INFO L280 TraceCheckUtils]: 11: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~E_2~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,071 INFO L280 TraceCheckUtils]: 12: Hoare triple {33506#(= 0 ~t1_st~0)} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,071 INFO L280 TraceCheckUtils]: 13: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~m_pc~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,072 INFO L280 TraceCheckUtils]: 14: Hoare triple {33506#(= 0 ~t1_st~0)} is_master_triggered_~__retres1~0 := 0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,073 INFO L280 TraceCheckUtils]: 15: Hoare triple {33506#(= 0 ~t1_st~0)} is_master_triggered_#res := is_master_triggered_~__retres1~0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,073 INFO L280 TraceCheckUtils]: 16: Hoare triple {33506#(= 0 ~t1_st~0)} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,074 INFO L280 TraceCheckUtils]: 17: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 != activate_threads_~tmp~1); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,075 INFO L280 TraceCheckUtils]: 18: Hoare triple {33506#(= 0 ~t1_st~0)} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,075 INFO L280 TraceCheckUtils]: 19: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~t1_pc~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,076 INFO L280 TraceCheckUtils]: 20: Hoare triple {33506#(= 0 ~t1_st~0)} is_transmit1_triggered_~__retres1~1 := 0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,076 INFO L280 TraceCheckUtils]: 21: Hoare triple {33506#(= 0 ~t1_st~0)} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,077 INFO L280 TraceCheckUtils]: 22: Hoare triple {33506#(= 0 ~t1_st~0)} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,077 INFO L280 TraceCheckUtils]: 23: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 != activate_threads_~tmp___0~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,078 INFO L280 TraceCheckUtils]: 24: Hoare triple {33506#(= 0 ~t1_st~0)} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,078 INFO L280 TraceCheckUtils]: 25: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~t2_pc~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,078 INFO L280 TraceCheckUtils]: 26: Hoare triple {33506#(= 0 ~t1_st~0)} is_transmit2_triggered_~__retres1~2 := 0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,079 INFO L280 TraceCheckUtils]: 27: Hoare triple {33506#(= 0 ~t1_st~0)} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,080 INFO L280 TraceCheckUtils]: 28: Hoare triple {33506#(= 0 ~t1_st~0)} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,080 INFO L280 TraceCheckUtils]: 29: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 != activate_threads_~tmp___1~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,081 INFO L280 TraceCheckUtils]: 30: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~M_E~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,081 INFO L280 TraceCheckUtils]: 31: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~T1_E~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,082 INFO L280 TraceCheckUtils]: 32: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~T2_E~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,082 INFO L280 TraceCheckUtils]: 33: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~E_M~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,082 INFO L280 TraceCheckUtils]: 34: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~E_1~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,083 INFO L280 TraceCheckUtils]: 35: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(1 == ~E_2~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,084 INFO L280 TraceCheckUtils]: 36: Hoare triple {33506#(= 0 ~t1_st~0)} assume !false; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,084 INFO L280 TraceCheckUtils]: 37: Hoare triple {33506#(= 0 ~t1_st~0)} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,085 INFO L280 TraceCheckUtils]: 38: Hoare triple {33506#(= 0 ~t1_st~0)} assume !false; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,086 INFO L280 TraceCheckUtils]: 39: Hoare triple {33506#(= 0 ~t1_st~0)} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,086 INFO L280 TraceCheckUtils]: 40: Hoare triple {33506#(= 0 ~t1_st~0)} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,087 INFO L280 TraceCheckUtils]: 41: Hoare triple {33506#(= 0 ~t1_st~0)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,087 INFO L280 TraceCheckUtils]: 42: Hoare triple {33506#(= 0 ~t1_st~0)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,088 INFO L280 TraceCheckUtils]: 43: Hoare triple {33506#(= 0 ~t1_st~0)} assume 0 != eval_~tmp~0; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,089 INFO L280 TraceCheckUtils]: 44: Hoare triple {33506#(= 0 ~t1_st~0)} assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,089 INFO L280 TraceCheckUtils]: 45: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 != eval_~tmp_ndt_1~0); {33506#(= 0 ~t1_st~0)} is VALID [2020-07-29 03:08:56,090 INFO L280 TraceCheckUtils]: 46: Hoare triple {33506#(= 0 ~t1_st~0)} assume !(0 == ~t1_st~0); {33505#false} is VALID [2020-07-29 03:08:56,090 INFO L280 TraceCheckUtils]: 47: Hoare triple {33505#false} assume !(0 == ~t2_st~0); {33505#false} is VALID [2020-07-29 03:08:56,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:56,094 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171941532] [2020-07-29 03:08:56,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:56,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-07-29 03:08:56,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318428721] [2020-07-29 03:08:56,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:56,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:56,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:56,167 INFO L87 Difference]: Start difference. First operand 1093 states and 1462 transitions. cyclomatic complexity: 375 Second operand 3 states. [2020-07-29 03:08:56,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:56,785 INFO L93 Difference]: Finished difference Result 1970 states and 2606 transitions. [2020-07-29 03:08:56,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:56,785 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:56,843 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:56,843 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1970 states and 2606 transitions. [2020-07-29 03:08:56,993 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 1686 [2020-07-29 03:08:57,113 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1970 states to 1970 states and 2606 transitions. [2020-07-29 03:08:57,113 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1970 [2020-07-29 03:08:57,114 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1970 [2020-07-29 03:08:57,114 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1970 states and 2606 transitions. [2020-07-29 03:08:57,116 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:57,116 INFO L688 BuchiCegarLoop]: Abstraction has 1970 states and 2606 transitions. [2020-07-29 03:08:57,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1970 states and 2606 transitions. [2020-07-29 03:08:57,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1970 to 1918. [2020-07-29 03:08:57,140 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:57,140 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1970 states and 2606 transitions. Second operand 1918 states. [2020-07-29 03:08:57,140 INFO L74 IsIncluded]: Start isIncluded. First operand 1970 states and 2606 transitions. Second operand 1918 states. [2020-07-29 03:08:57,140 INFO L87 Difference]: Start difference. First operand 1970 states and 2606 transitions. Second operand 1918 states. [2020-07-29 03:08:57,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:57,261 INFO L93 Difference]: Finished difference Result 1970 states and 2606 transitions. [2020-07-29 03:08:57,261 INFO L276 IsEmpty]: Start isEmpty. Operand 1970 states and 2606 transitions. [2020-07-29 03:08:57,263 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:57,263 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:57,263 INFO L74 IsIncluded]: Start isIncluded. First operand 1918 states. Second operand 1970 states and 2606 transitions. [2020-07-29 03:08:57,263 INFO L87 Difference]: Start difference. First operand 1918 states. Second operand 1970 states and 2606 transitions. [2020-07-29 03:08:57,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:57,381 INFO L93 Difference]: Finished difference Result 1970 states and 2606 transitions. [2020-07-29 03:08:57,381 INFO L276 IsEmpty]: Start isEmpty. Operand 1970 states and 2606 transitions. [2020-07-29 03:08:57,383 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:57,383 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:57,383 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:57,383 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:57,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1918 states. [2020-07-29 03:08:57,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1918 states to 1918 states and 2542 transitions. [2020-07-29 03:08:57,490 INFO L711 BuchiCegarLoop]: Abstraction has 1918 states and 2542 transitions. [2020-07-29 03:08:57,491 INFO L591 BuchiCegarLoop]: Abstraction has 1918 states and 2542 transitions. [2020-07-29 03:08:57,491 INFO L424 BuchiCegarLoop]: ======== Iteration 13============ [2020-07-29 03:08:57,491 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1918 states and 2542 transitions. [2020-07-29 03:08:57,496 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 1634 [2020-07-29 03:08:57,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:57,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:57,497 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:57,497 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:57,497 INFO L794 eck$LassoCheckResult]: Stem: 35645#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 35488#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 35489#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 35626#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 35627#L233-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 35679#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 35680#L243-1 assume !(0 == ~M_E~0); 35663#L346-1 assume !(0 == ~T1_E~0); 35664#L351-1 assume !(0 == ~T2_E~0); 36747#L356-1 assume !(0 == ~E_M~0); 36746#L361-1 assume !(0 == ~E_1~0); 36745#L366-1 assume !(0 == ~E_2~0); 36744#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 36743#L168 assume !(1 == ~m_pc~0); 36742#L168-2 is_master_triggered_~__retres1~0 := 0; 36741#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 36740#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 36739#L427 assume !(0 != activate_threads_~tmp~1); 36738#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 36737#L187 assume !(1 == ~t1_pc~0); 36736#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 36735#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 36734#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 36733#L435 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 35623#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 35628#L206 assume !(1 == ~t2_pc~0); 35549#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 35743#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 35551#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 35552#L443 assume !(0 != activate_threads_~tmp___1~0); 35722#L443-2 assume !(1 == ~M_E~0); 35533#L384-1 assume !(1 == ~T1_E~0); 35534#L389-1 assume !(1 == ~T2_E~0); 35538#L394-1 assume !(1 == ~E_M~0); 35570#L399-1 assume !(1 == ~E_1~0); 35723#L404-1 assume !(1 == ~E_2~0); 36705#L555-1 assume !false; 36700#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 36699#L321 [2020-07-29 03:08:57,497 INFO L796 eck$LassoCheckResult]: Loop: 36699#L321 assume !false; 36693#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 36691#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 36689#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 36686#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 36684#L288 assume 0 != eval_~tmp~0; 36682#L288-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 35483#L296 assume !(0 != eval_~tmp_ndt_1~0); 35484#L293 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 36133#L310 assume !(0 != eval_~tmp_ndt_2~0); 36135#L307 assume !(0 == ~t2_st~0); 36699#L321 [2020-07-29 03:08:57,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:57,497 INFO L82 PathProgramCache]: Analyzing trace with hash 79981826, now seen corresponding path program 1 times [2020-07-29 03:08:57,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:57,498 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961322209] [2020-07-29 03:08:57,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:57,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:57,512 INFO L280 TraceCheckUtils]: 0: Hoare triple {41338#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {41338#true} is VALID [2020-07-29 03:08:57,513 INFO L280 TraceCheckUtils]: 1: Hoare triple {41338#true} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {41340#(= 1 ~t1_i~0)} is VALID [2020-07-29 03:08:57,514 INFO L280 TraceCheckUtils]: 2: Hoare triple {41340#(= 1 ~t1_i~0)} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {41340#(= 1 ~t1_i~0)} is VALID [2020-07-29 03:08:57,514 INFO L280 TraceCheckUtils]: 3: Hoare triple {41340#(= 1 ~t1_i~0)} assume 1 == ~m_i~0;~m_st~0 := 0; {41340#(= 1 ~t1_i~0)} is VALID [2020-07-29 03:08:57,515 INFO L280 TraceCheckUtils]: 4: Hoare triple {41340#(= 1 ~t1_i~0)} assume !(1 == ~t1_i~0);~t1_st~0 := 2; {41339#false} is VALID [2020-07-29 03:08:57,515 INFO L280 TraceCheckUtils]: 5: Hoare triple {41339#false} assume 1 == ~t2_i~0;~t2_st~0 := 0; {41339#false} is VALID [2020-07-29 03:08:57,515 INFO L280 TraceCheckUtils]: 6: Hoare triple {41339#false} assume !(0 == ~M_E~0); {41339#false} is VALID [2020-07-29 03:08:57,515 INFO L280 TraceCheckUtils]: 7: Hoare triple {41339#false} assume !(0 == ~T1_E~0); {41339#false} is VALID [2020-07-29 03:08:57,515 INFO L280 TraceCheckUtils]: 8: Hoare triple {41339#false} assume !(0 == ~T2_E~0); {41339#false} is VALID [2020-07-29 03:08:57,515 INFO L280 TraceCheckUtils]: 9: Hoare triple {41339#false} assume !(0 == ~E_M~0); {41339#false} is VALID [2020-07-29 03:08:57,516 INFO L280 TraceCheckUtils]: 10: Hoare triple {41339#false} assume !(0 == ~E_1~0); {41339#false} is VALID [2020-07-29 03:08:57,516 INFO L280 TraceCheckUtils]: 11: Hoare triple {41339#false} assume !(0 == ~E_2~0); {41339#false} is VALID [2020-07-29 03:08:57,516 INFO L280 TraceCheckUtils]: 12: Hoare triple {41339#false} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {41339#false} is VALID [2020-07-29 03:08:57,516 INFO L280 TraceCheckUtils]: 13: Hoare triple {41339#false} assume !(1 == ~m_pc~0); {41339#false} is VALID [2020-07-29 03:08:57,516 INFO L280 TraceCheckUtils]: 14: Hoare triple {41339#false} is_master_triggered_~__retres1~0 := 0; {41339#false} is VALID [2020-07-29 03:08:57,516 INFO L280 TraceCheckUtils]: 15: Hoare triple {41339#false} is_master_triggered_#res := is_master_triggered_~__retres1~0; {41339#false} is VALID [2020-07-29 03:08:57,517 INFO L280 TraceCheckUtils]: 16: Hoare triple {41339#false} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {41339#false} is VALID [2020-07-29 03:08:57,517 INFO L280 TraceCheckUtils]: 17: Hoare triple {41339#false} assume !(0 != activate_threads_~tmp~1); {41339#false} is VALID [2020-07-29 03:08:57,517 INFO L280 TraceCheckUtils]: 18: Hoare triple {41339#false} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {41339#false} is VALID [2020-07-29 03:08:57,517 INFO L280 TraceCheckUtils]: 19: Hoare triple {41339#false} assume !(1 == ~t1_pc~0); {41339#false} is VALID [2020-07-29 03:08:57,517 INFO L280 TraceCheckUtils]: 20: Hoare triple {41339#false} is_transmit1_triggered_~__retres1~1 := 0; {41339#false} is VALID [2020-07-29 03:08:57,517 INFO L280 TraceCheckUtils]: 21: Hoare triple {41339#false} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 22: Hoare triple {41339#false} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 23: Hoare triple {41339#false} assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 24: Hoare triple {41339#false} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 25: Hoare triple {41339#false} assume !(1 == ~t2_pc~0); {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 26: Hoare triple {41339#false} is_transmit2_triggered_~__retres1~2 := 0; {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 27: Hoare triple {41339#false} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {41339#false} is VALID [2020-07-29 03:08:57,518 INFO L280 TraceCheckUtils]: 28: Hoare triple {41339#false} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {41339#false} is VALID [2020-07-29 03:08:57,519 INFO L280 TraceCheckUtils]: 29: Hoare triple {41339#false} assume !(0 != activate_threads_~tmp___1~0); {41339#false} is VALID [2020-07-29 03:08:57,519 INFO L280 TraceCheckUtils]: 30: Hoare triple {41339#false} assume !(1 == ~M_E~0); {41339#false} is VALID [2020-07-29 03:08:57,519 INFO L280 TraceCheckUtils]: 31: Hoare triple {41339#false} assume !(1 == ~T1_E~0); {41339#false} is VALID [2020-07-29 03:08:57,519 INFO L280 TraceCheckUtils]: 32: Hoare triple {41339#false} assume !(1 == ~T2_E~0); {41339#false} is VALID [2020-07-29 03:08:57,519 INFO L280 TraceCheckUtils]: 33: Hoare triple {41339#false} assume !(1 == ~E_M~0); {41339#false} is VALID [2020-07-29 03:08:57,520 INFO L280 TraceCheckUtils]: 34: Hoare triple {41339#false} assume !(1 == ~E_1~0); {41339#false} is VALID [2020-07-29 03:08:57,520 INFO L280 TraceCheckUtils]: 35: Hoare triple {41339#false} assume !(1 == ~E_2~0); {41339#false} is VALID [2020-07-29 03:08:57,520 INFO L280 TraceCheckUtils]: 36: Hoare triple {41339#false} assume !false; {41339#false} is VALID [2020-07-29 03:08:57,520 INFO L280 TraceCheckUtils]: 37: Hoare triple {41339#false} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {41339#false} is VALID [2020-07-29 03:08:57,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:57,521 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961322209] [2020-07-29 03:08:57,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:57,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-07-29 03:08:57,522 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623396815] [2020-07-29 03:08:57,522 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-07-29 03:08:57,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:57,522 INFO L82 PathProgramCache]: Analyzing trace with hash 456481406, now seen corresponding path program 1 times [2020-07-29 03:08:57,523 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:57,523 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776029968] [2020-07-29 03:08:57,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:57,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:57,526 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:57,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:57,527 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:57,529 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:57,608 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:57,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:57,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:57,608 INFO L87 Difference]: Start difference. First operand 1918 states and 2542 transitions. cyclomatic complexity: 633 Second operand 3 states. [2020-07-29 03:08:57,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:57,943 INFO L93 Difference]: Finished difference Result 1240 states and 1643 transitions. [2020-07-29 03:08:57,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:57,943 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:57,979 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:57,979 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,061 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1184 [2020-07-29 03:08:58,137 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1240 states to 1240 states and 1643 transitions. [2020-07-29 03:08:58,138 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1240 [2020-07-29 03:08:58,138 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1240 [2020-07-29 03:08:58,138 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,140 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:58,140 INFO L688 BuchiCegarLoop]: Abstraction has 1240 states and 1643 transitions. [2020-07-29 03:08:58,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1240 to 1240. [2020-07-29 03:08:58,156 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:58,156 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1240 states and 1643 transitions. Second operand 1240 states. [2020-07-29 03:08:58,156 INFO L74 IsIncluded]: Start isIncluded. First operand 1240 states and 1643 transitions. Second operand 1240 states. [2020-07-29 03:08:58,156 INFO L87 Difference]: Start difference. First operand 1240 states and 1643 transitions. Second operand 1240 states. [2020-07-29 03:08:58,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:58,231 INFO L93 Difference]: Finished difference Result 1240 states and 1643 transitions. [2020-07-29 03:08:58,232 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,233 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:58,233 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:58,234 INFO L74 IsIncluded]: Start isIncluded. First operand 1240 states. Second operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,234 INFO L87 Difference]: Start difference. First operand 1240 states. Second operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:58,331 INFO L93 Difference]: Finished difference Result 1240 states and 1643 transitions. [2020-07-29 03:08:58,331 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:58,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:58,334 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:58,334 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:58,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2020-07-29 03:08:58,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 1643 transitions. [2020-07-29 03:08:58,417 INFO L711 BuchiCegarLoop]: Abstraction has 1240 states and 1643 transitions. [2020-07-29 03:08:58,418 INFO L591 BuchiCegarLoop]: Abstraction has 1240 states and 1643 transitions. [2020-07-29 03:08:58,418 INFO L424 BuchiCegarLoop]: ======== Iteration 14============ [2020-07-29 03:08:58,418 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1240 states and 1643 transitions. [2020-07-29 03:08:58,422 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1184 [2020-07-29 03:08:58,422 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:58,422 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:58,423 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:58,423 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:58,423 INFO L794 eck$LassoCheckResult]: Stem: 42754#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 42594#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 42595#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 42733#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 42734#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 42787#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 42788#L243-1 assume !(0 == ~M_E~0); 42769#L346-1 assume !(0 == ~T1_E~0); 42596#L351-1 assume !(0 == ~T2_E~0); 42597#L356-1 assume !(0 == ~E_M~0); 42645#L361-1 assume !(0 == ~E_1~0); 42680#L366-1 assume !(0 == ~E_2~0); 42826#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 42816#L168 assume !(1 == ~m_pc~0); 42807#L168-2 is_master_triggered_~__retres1~0 := 0; 42808#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 42637#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 42638#L427 assume !(0 != activate_threads_~tmp~1); 42672#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 42673#L187 assume !(1 == ~t1_pc~0); 42742#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 42743#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 42744#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 42728#L435 assume !(0 != activate_threads_~tmp___0~0); 42729#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 42735#L206 assume !(1 == ~t2_pc~0); 42654#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 42837#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 42656#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 42657#L443 assume !(0 != activate_threads_~tmp___1~0); 42823#L443-2 assume !(1 == ~M_E~0); 42639#L384-1 assume !(1 == ~T1_E~0); 42640#L389-1 assume !(1 == ~T2_E~0); 42644#L394-1 assume !(1 == ~E_M~0); 42674#L399-1 assume !(1 == ~E_1~0); 42824#L404-1 assume !(1 == ~E_2~0); 42836#L555-1 assume !false; 43685#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 43684#L321 [2020-07-29 03:08:58,423 INFO L796 eck$LassoCheckResult]: Loop: 43684#L321 assume !false; 43683#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 43679#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 43677#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 43675#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 43673#L288 assume 0 != eval_~tmp~0; 43670#L288-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 42589#L296 assume !(0 != eval_~tmp_ndt_1~0); 42590#L293 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 43468#L310 assume !(0 != eval_~tmp_ndt_2~0); 43469#L307 assume !(0 == ~t2_st~0); 43684#L321 [2020-07-29 03:08:58,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:58,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1044101446, now seen corresponding path program 2 times [2020-07-29 03:08:58,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:58,424 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27791461] [2020-07-29 03:08:58,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:58,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:58,442 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:58,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:58,446 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:58,454 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:58,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:58,455 INFO L82 PathProgramCache]: Analyzing trace with hash 456481406, now seen corresponding path program 2 times [2020-07-29 03:08:58,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:58,459 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119546767] [2020-07-29 03:08:58,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:58,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:58,471 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:58,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:58,477 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:58,479 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:58,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:58,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1384279015, now seen corresponding path program 1 times [2020-07-29 03:08:58,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:58,484 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1657513033] [2020-07-29 03:08:58,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:58,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-29 03:08:58,516 INFO L280 TraceCheckUtils]: 0: Hoare triple {46310#true} ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; {46310#true} is VALID [2020-07-29 03:08:58,516 INFO L280 TraceCheckUtils]: 1: Hoare triple {46310#true} havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; {46310#true} is VALID [2020-07-29 03:08:58,516 INFO L280 TraceCheckUtils]: 2: Hoare triple {46310#true} havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; {46310#true} is VALID [2020-07-29 03:08:58,516 INFO L280 TraceCheckUtils]: 3: Hoare triple {46310#true} assume 1 == ~m_i~0;~m_st~0 := 0; {46310#true} is VALID [2020-07-29 03:08:58,517 INFO L280 TraceCheckUtils]: 4: Hoare triple {46310#true} assume 1 == ~t1_i~0;~t1_st~0 := 0; {46310#true} is VALID [2020-07-29 03:08:58,517 INFO L280 TraceCheckUtils]: 5: Hoare triple {46310#true} assume 1 == ~t2_i~0;~t2_st~0 := 0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,518 INFO L280 TraceCheckUtils]: 6: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~M_E~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,518 INFO L280 TraceCheckUtils]: 7: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~T1_E~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,519 INFO L280 TraceCheckUtils]: 8: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~T2_E~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,520 INFO L280 TraceCheckUtils]: 9: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~E_M~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,520 INFO L280 TraceCheckUtils]: 10: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~E_1~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,521 INFO L280 TraceCheckUtils]: 11: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~E_2~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,521 INFO L280 TraceCheckUtils]: 12: Hoare triple {46312#(= 0 ~t2_st~0)} havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,522 INFO L280 TraceCheckUtils]: 13: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~m_pc~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,522 INFO L280 TraceCheckUtils]: 14: Hoare triple {46312#(= 0 ~t2_st~0)} is_master_triggered_~__retres1~0 := 0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,523 INFO L280 TraceCheckUtils]: 15: Hoare triple {46312#(= 0 ~t2_st~0)} is_master_triggered_#res := is_master_triggered_~__retres1~0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,524 INFO L280 TraceCheckUtils]: 16: Hoare triple {46312#(= 0 ~t2_st~0)} activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,524 INFO L280 TraceCheckUtils]: 17: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 != activate_threads_~tmp~1); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,525 INFO L280 TraceCheckUtils]: 18: Hoare triple {46312#(= 0 ~t2_st~0)} havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,525 INFO L280 TraceCheckUtils]: 19: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~t1_pc~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,526 INFO L280 TraceCheckUtils]: 20: Hoare triple {46312#(= 0 ~t2_st~0)} is_transmit1_triggered_~__retres1~1 := 0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,526 INFO L280 TraceCheckUtils]: 21: Hoare triple {46312#(= 0 ~t2_st~0)} is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,527 INFO L280 TraceCheckUtils]: 22: Hoare triple {46312#(= 0 ~t2_st~0)} activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,528 INFO L280 TraceCheckUtils]: 23: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 != activate_threads_~tmp___0~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,528 INFO L280 TraceCheckUtils]: 24: Hoare triple {46312#(= 0 ~t2_st~0)} havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,529 INFO L280 TraceCheckUtils]: 25: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~t2_pc~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,529 INFO L280 TraceCheckUtils]: 26: Hoare triple {46312#(= 0 ~t2_st~0)} is_transmit2_triggered_~__retres1~2 := 0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,530 INFO L280 TraceCheckUtils]: 27: Hoare triple {46312#(= 0 ~t2_st~0)} is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,530 INFO L280 TraceCheckUtils]: 28: Hoare triple {46312#(= 0 ~t2_st~0)} activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,531 INFO L280 TraceCheckUtils]: 29: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 != activate_threads_~tmp___1~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,531 INFO L280 TraceCheckUtils]: 30: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~M_E~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,532 INFO L280 TraceCheckUtils]: 31: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~T1_E~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,532 INFO L280 TraceCheckUtils]: 32: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~T2_E~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,533 INFO L280 TraceCheckUtils]: 33: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~E_M~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,533 INFO L280 TraceCheckUtils]: 34: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~E_1~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,534 INFO L280 TraceCheckUtils]: 35: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(1 == ~E_2~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,534 INFO L280 TraceCheckUtils]: 36: Hoare triple {46312#(= 0 ~t2_st~0)} assume !false; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,535 INFO L280 TraceCheckUtils]: 37: Hoare triple {46312#(= 0 ~t2_st~0)} start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,536 INFO L280 TraceCheckUtils]: 38: Hoare triple {46312#(= 0 ~t2_st~0)} assume !false; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,536 INFO L280 TraceCheckUtils]: 39: Hoare triple {46312#(= 0 ~t2_st~0)} havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,537 INFO L280 TraceCheckUtils]: 40: Hoare triple {46312#(= 0 ~t2_st~0)} assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,537 INFO L280 TraceCheckUtils]: 41: Hoare triple {46312#(= 0 ~t2_st~0)} exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,538 INFO L280 TraceCheckUtils]: 42: Hoare triple {46312#(= 0 ~t2_st~0)} eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,538 INFO L280 TraceCheckUtils]: 43: Hoare triple {46312#(= 0 ~t2_st~0)} assume 0 != eval_~tmp~0; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,539 INFO L280 TraceCheckUtils]: 44: Hoare triple {46312#(= 0 ~t2_st~0)} assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,539 INFO L280 TraceCheckUtils]: 45: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 != eval_~tmp_ndt_1~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,540 INFO L280 TraceCheckUtils]: 46: Hoare triple {46312#(= 0 ~t2_st~0)} assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,540 INFO L280 TraceCheckUtils]: 47: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 != eval_~tmp_ndt_2~0); {46312#(= 0 ~t2_st~0)} is VALID [2020-07-29 03:08:58,541 INFO L280 TraceCheckUtils]: 48: Hoare triple {46312#(= 0 ~t2_st~0)} assume !(0 == ~t2_st~0); {46311#false} is VALID [2020-07-29 03:08:58,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-29 03:08:58,543 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1657513033] [2020-07-29 03:08:58,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-29 03:08:58,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-07-29 03:08:58,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252587707] [2020-07-29 03:08:58,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-29 03:08:58,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-07-29 03:08:58,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-07-29 03:08:58,629 INFO L87 Difference]: Start difference. First operand 1240 states and 1643 transitions. cyclomatic complexity: 409 Second operand 3 states. [2020-07-29 03:08:59,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:59,150 INFO L93 Difference]: Finished difference Result 1981 states and 2610 transitions. [2020-07-29 03:08:59,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-07-29 03:08:59,151 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2020-07-29 03:08:59,227 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2020-07-29 03:08:59,227 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,338 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1911 [2020-07-29 03:08:59,456 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1981 states to 1981 states and 2610 transitions. [2020-07-29 03:08:59,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1981 [2020-07-29 03:08:59,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1981 [2020-07-29 03:08:59,457 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,459 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-07-29 03:08:59,459 INFO L688 BuchiCegarLoop]: Abstraction has 1981 states and 2610 transitions. [2020-07-29 03:08:59,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1981 to 1945. [2020-07-29 03:08:59,479 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2020-07-29 03:08:59,480 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1981 states and 2610 transitions. Second operand 1945 states. [2020-07-29 03:08:59,480 INFO L74 IsIncluded]: Start isIncluded. First operand 1981 states and 2610 transitions. Second operand 1945 states. [2020-07-29 03:08:59,480 INFO L87 Difference]: Start difference. First operand 1981 states and 2610 transitions. Second operand 1945 states. [2020-07-29 03:08:59,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:59,608 INFO L93 Difference]: Finished difference Result 1981 states and 2610 transitions. [2020-07-29 03:08:59,608 INFO L276 IsEmpty]: Start isEmpty. Operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,610 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:59,610 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:59,610 INFO L74 IsIncluded]: Start isIncluded. First operand 1945 states. Second operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,610 INFO L87 Difference]: Start difference. First operand 1945 states. Second operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-29 03:08:59,716 INFO L93 Difference]: Finished difference Result 1981 states and 2610 transitions. [2020-07-29 03:08:59,717 INFO L276 IsEmpty]: Start isEmpty. Operand 1981 states and 2610 transitions. [2020-07-29 03:08:59,718 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-07-29 03:08:59,718 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2020-07-29 03:08:59,718 INFO L88 GeneralOperation]: Finished isEquivalent. [2020-07-29 03:08:59,718 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2020-07-29 03:08:59,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1945 states. [2020-07-29 03:08:59,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1945 states to 1945 states and 2574 transitions. [2020-07-29 03:08:59,823 INFO L711 BuchiCegarLoop]: Abstraction has 1945 states and 2574 transitions. [2020-07-29 03:08:59,823 INFO L591 BuchiCegarLoop]: Abstraction has 1945 states and 2574 transitions. [2020-07-29 03:08:59,823 INFO L424 BuchiCegarLoop]: ======== Iteration 15============ [2020-07-29 03:08:59,823 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1945 states and 2574 transitions. [2020-07-29 03:08:59,827 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 1875 [2020-07-29 03:08:59,827 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-07-29 03:08:59,827 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-07-29 03:08:59,827 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:59,828 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-29 03:08:59,828 INFO L794 eck$LassoCheckResult]: Stem: 48466#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~token~0 := 0;~local~0 := 0; 48305#L-1 havoc main_#res;havoc main_~__retres1~4;havoc main_~__retres1~4;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1; 48306#L518 havoc start_simulation_#t~ret10, start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 48446#L226 assume 1 == ~m_i~0;~m_st~0 := 0; 48447#L233-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 48501#L238-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 48502#L243-1 assume !(0 == ~M_E~0); 48485#L346-1 assume !(0 == ~T1_E~0); 48307#L351-1 assume !(0 == ~T2_E~0); 48308#L356-1 assume !(0 == ~E_M~0); 48355#L361-1 assume !(0 == ~E_1~0); 48393#L366-1 assume !(0 == ~E_2~0); 48550#L371-1 havoc activate_threads_#t~ret6, activate_threads_#t~ret7, activate_threads_#t~ret8, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 48532#L168 assume !(1 == ~m_pc~0); 48522#L168-2 is_master_triggered_~__retres1~0 := 0; 48523#L179 is_master_triggered_#res := is_master_triggered_~__retres1~0; 48347#L180 activate_threads_#t~ret6 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret6;havoc activate_threads_#t~ret6; 48348#L427 assume !(0 != activate_threads_~tmp~1); 48385#L427-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 48386#L187 assume !(1 == ~t1_pc~0); 48455#L187-2 is_transmit1_triggered_~__retres1~1 := 0; 48456#L198 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 48457#L199 activate_threads_#t~ret7 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret7;havoc activate_threads_#t~ret7; 48441#L435 assume !(0 != activate_threads_~tmp___0~0); 48442#L435-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 48448#L206 assume !(1 == ~t2_pc~0); 48364#L206-2 is_transmit2_triggered_~__retres1~2 := 0; 48567#L217 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 48366#L218 activate_threads_#t~ret8 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 48367#L443 assume !(0 != activate_threads_~tmp___1~0); 48546#L443-2 assume !(1 == ~M_E~0); 48349#L384-1 assume !(1 == ~T1_E~0); 48350#L389-1 assume !(1 == ~T2_E~0); 48354#L394-1 assume !(1 == ~E_M~0); 48387#L399-1 assume !(1 == ~E_1~0); 48547#L404-1 assume !(1 == ~E_2~0); 48303#L555-1 assume !false; 48304#L556 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_~tmp~0;havoc eval_~tmp~0; 48460#L321 [2020-07-29 03:08:59,828 INFO L796 eck$LassoCheckResult]: Loop: 48460#L321 assume !false; 50194#L284 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~3;havoc exists_runnable_thread_~__retres1~3; 50193#L256 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~3 := 1; 50100#L273 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~3; 49977#L274 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 49976#L288 assume 0 != eval_~tmp~0; 49975#L288-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 48300#L296 assume !(0 != eval_~tmp_ndt_1~0); 48301#L293 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 49751#L310 assume !(0 != eval_~tmp_ndt_2~0); 49752#L307 assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; 49856#L324 assume !(0 != eval_~tmp_ndt_3~0); 48460#L321 [2020-07-29 03:08:59,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:59,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1044101446, now seen corresponding path program 3 times [2020-07-29 03:08:59,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:59,829 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741447990] [2020-07-29 03:08:59,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:59,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:59,834 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:59,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:59,838 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:59,843 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:59,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:59,843 INFO L82 PathProgramCache]: Analyzing trace with hash 1266018993, now seen corresponding path program 1 times [2020-07-29 03:08:59,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:59,844 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834679435] [2020-07-29 03:08:59,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:59,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:59,847 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:59,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:59,849 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:59,850 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:08:59,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-29 03:08:59,851 INFO L82 PathProgramCache]: Analyzing trace with hash 37020790, now seen corresponding path program 1 times [2020-07-29 03:08:59,851 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-29 03:08:59,851 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460745240] [2020-07-29 03:08:59,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-29 03:08:59,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:59,857 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:59,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-29 03:08:59,862 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-29 03:08:59,869 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-29 03:09:00,227 WARN L193 SmtUtils]: Spent 273.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 72 [2020-07-29 03:09:00,374 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 29.07 03:09:00 BoogieIcfgContainer [2020-07-29 03:09:00,374 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2020-07-29 03:09:00,375 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2020-07-29 03:09:00,375 INFO L271 PluginConnector]: Initializing Witness Printer... [2020-07-29 03:09:00,375 INFO L275 PluginConnector]: Witness Printer initialized [2020-07-29 03:09:00,375 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.07 03:08:43" (3/4) ... [2020-07-29 03:09:00,382 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2020-07-29 03:09:00,481 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2020-07-29 03:09:00,481 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2020-07-29 03:09:00,485 INFO L168 Benchmark]: Toolchain (without parser) took 18516.01 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 392.7 MB). Free memory was 961.6 MB in the beginning and 1.2 GB in the end (delta: -258.9 MB). Peak memory consumption was 133.8 MB. Max. memory is 11.5 GB. [2020-07-29 03:09:00,485 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 987.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2020-07-29 03:09:00,486 INFO L168 Benchmark]: CACSL2BoogieTranslator took 581.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.7 MB). Free memory was 961.6 MB in the beginning and 1.1 GB in the end (delta: -162.9 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. [2020-07-29 03:09:00,486 INFO L168 Benchmark]: Boogie Procedure Inliner took 77.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.6 MB). Peak memory consumption was 1.6 MB. Max. memory is 11.5 GB. [2020-07-29 03:09:00,486 INFO L168 Benchmark]: Boogie Preprocessor took 70.86 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2020-07-29 03:09:00,487 INFO L168 Benchmark]: RCFGBuilder took 1157.24 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 97.4 MB). Peak memory consumption was 97.4 MB. Max. memory is 11.5 GB. [2020-07-29 03:09:00,488 INFO L168 Benchmark]: BuchiAutomizer took 16513.92 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 257.9 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -201.6 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2020-07-29 03:09:00,488 INFO L168 Benchmark]: Witness Printer took 106.37 ms. Allocated memory is still 1.4 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. [2020-07-29 03:09:00,490 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 1.0 GB. Free memory is still 987.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 581.45 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 134.7 MB). Free memory was 961.6 MB in the beginning and 1.1 GB in the end (delta: -162.9 MB). Peak memory consumption was 26.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 77.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.6 MB). Peak memory consumption was 1.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 70.86 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1157.24 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 97.4 MB). Peak memory consumption was 97.4 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 16513.92 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 257.9 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -201.6 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * Witness Printer took 106.37 ms. Allocated memory is still 1.4 GB. Free memory is still 1.2 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 14 terminating modules (14 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.14 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 1945 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 16.4s and 15 iterations. TraceHistogramMax:1. Analysis of lassos took 2.7s. Construction of modules took 0.4s. Büchi inclusion checks took 9.1s. Highest rank in rank-based complementation 0. Minimization of det autom 14. Minimization of nondet autom 0. Automata minimization 2.2s AutomataMinimizationTime, 14 MinimizatonAttempts, 2054 StatesRemovedByMinimization, 8 NontrivialMinimizations. Non-live state removal took 1.5s Buchi closure took 0.0s. Biggest automaton had 1945 states and ocurred in iteration 14. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 4573 SDtfs, 4843 SDslu, 4743 SDs, 0 SdLazy, 316 SolverSat, 133 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time LassoAnalysisResults: nont1 unkn0 SFLI4 SFLT0 conc2 concLT0 SILN1 SILU0 SILI7 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 283]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, token=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5b783aa=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@40a27bd7=0, tmp=1, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7a5005c2=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@43220193=0, T2_E=2, kernel_st=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6527fdef=0, __retres1=0, tmp___0=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@2434617a=0, t2_st=0, t1_pc=0, E_2=2, __retres1=1, T1_E=2, \result=0, E_1=2, tmp_ndt_1=0, M_E=2, tmp_ndt_2=0, tmp=0, tmp_ndt_3=0, __retres1=0, t2_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7856bbb9=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7fc705=0, m_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@482b9559=0, t1_st=0, \result=0, t2_pc=0, local=0, m_st=0, tmp___1=0, E_M=2, tmp___0=0, tmp=0, __retres1=0, t1_i=1, m_pc=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 283]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int m_st ; [L18] int t1_st ; [L19] int t2_st ; [L20] int m_i ; [L21] int t1_i ; [L22] int t2_i ; [L23] int M_E = 2; [L24] int T1_E = 2; [L25] int T2_E = 2; [L26] int E_M = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; [L33] int token ; [L35] int local ; [L600] int __retres1 ; [L514] m_i = 1 [L515] t1_i = 1 [L516] t2_i = 1 [L541] int kernel_st ; [L542] int tmp ; [L543] int tmp___0 ; [L547] kernel_st = 0 [L233] COND TRUE m_i == 1 [L234] m_st = 0 [L238] COND TRUE t1_i == 1 [L239] t1_st = 0 [L243] COND TRUE t2_i == 1 [L244] t2_st = 0 [L346] COND FALSE !(M_E == 0) [L351] COND FALSE !(T1_E == 0) [L356] COND FALSE !(T2_E == 0) [L361] COND FALSE !(E_M == 0) [L366] COND FALSE !(E_1 == 0) [L371] COND FALSE !(E_2 == 0) [L419] int tmp ; [L420] int tmp___0 ; [L421] int tmp___1 ; [L165] int __retres1 ; [L168] COND FALSE !(m_pc == 1) [L178] __retres1 = 0 [L180] return (__retres1); [L425] tmp = is_master_triggered() [L427] COND FALSE !(\read(tmp)) [L184] int __retres1 ; [L187] COND FALSE !(t1_pc == 1) [L197] __retres1 = 0 [L199] return (__retres1); [L433] tmp___0 = is_transmit1_triggered() [L435] COND FALSE !(\read(tmp___0)) [L203] int __retres1 ; [L206] COND FALSE !(t2_pc == 1) [L216] __retres1 = 0 [L218] return (__retres1); [L441] tmp___1 = is_transmit2_triggered() [L443] COND FALSE !(\read(tmp___1)) [L384] COND FALSE !(M_E == 1) [L389] COND FALSE !(T1_E == 1) [L394] COND FALSE !(T2_E == 1) [L399] COND FALSE !(E_M == 1) [L404] COND FALSE !(E_1 == 1) [L409] COND FALSE !(E_2 == 1) [L555] COND TRUE 1 [L558] kernel_st = 1 [L279] int tmp ; Loop: [L283] COND TRUE 1 [L253] int __retres1 ; [L256] COND TRUE m_st == 0 [L257] __retres1 = 1 [L274] return (__retres1); [L286] tmp = exists_runnable_thread() [L288] COND TRUE \read(tmp) [L293] COND TRUE m_st == 0 [L294] int tmp_ndt_1; [L295] tmp_ndt_1 = __VERIFIER_nondet_int() [L296] COND FALSE !(\read(tmp_ndt_1)) [L307] COND TRUE t1_st == 0 [L308] int tmp_ndt_2; [L309] tmp_ndt_2 = __VERIFIER_nondet_int() [L310] COND FALSE !(\read(tmp_ndt_2)) [L321] COND TRUE t2_st == 0 [L322] int tmp_ndt_3; [L323] tmp_ndt_3 = __VERIFIER_nondet_int() [L324] COND FALSE !(\read(tmp_ndt_3)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...