./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8d31f386 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e6d225bacde2ff4b43f974edb4824451ea41bcc5 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-wip.dd.multireach-323-8d31f38 [2021-07-06 20:41:20,781 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-07-06 20:41:20,783 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-07-06 20:41:20,816 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-07-06 20:41:20,816 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-07-06 20:41:20,818 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-07-06 20:41:20,820 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-07-06 20:41:20,829 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-07-06 20:41:20,830 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-07-06 20:41:20,831 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-07-06 20:41:20,832 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-07-06 20:41:20,832 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-07-06 20:41:20,833 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-07-06 20:41:20,840 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-07-06 20:41:20,841 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-07-06 20:41:20,842 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-07-06 20:41:20,844 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-07-06 20:41:20,846 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-07-06 20:41:20,847 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-07-06 20:41:20,848 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-07-06 20:41:20,851 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-07-06 20:41:20,852 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-07-06 20:41:20,853 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-07-06 20:41:20,854 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-07-06 20:41:20,857 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-07-06 20:41:20,860 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-07-06 20:41:20,860 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-07-06 20:41:20,861 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-07-06 20:41:20,862 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-07-06 20:41:20,862 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-07-06 20:41:20,863 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-07-06 20:41:20,863 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-07-06 20:41:20,864 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-07-06 20:41:20,865 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-07-06 20:41:20,865 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-07-06 20:41:20,865 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-07-06 20:41:20,866 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-07-06 20:41:20,866 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-07-06 20:41:20,866 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-07-06 20:41:20,867 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-07-06 20:41:20,868 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-07-06 20:41:20,869 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-07-06 20:41:20,898 INFO L113 SettingsManager]: Loading preferences was successful [2021-07-06 20:41:20,898 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-07-06 20:41:20,900 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-07-06 20:41:20,900 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-07-06 20:41:20,900 INFO L138 SettingsManager]: * Use SBE=true [2021-07-06 20:41:20,900 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-07-06 20:41:20,901 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-07-06 20:41:20,901 INFO L138 SettingsManager]: * Use old map elimination=false [2021-07-06 20:41:20,901 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-07-06 20:41:20,901 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-07-06 20:41:20,902 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-07-06 20:41:20,902 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-07-06 20:41:20,902 INFO L138 SettingsManager]: * sizeof long=4 [2021-07-06 20:41:20,903 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-07-06 20:41:20,903 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-07-06 20:41:20,903 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-07-06 20:41:20,903 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-07-06 20:41:20,903 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-07-06 20:41:20,903 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-07-06 20:41:20,904 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-07-06 20:41:20,904 INFO L138 SettingsManager]: * sizeof long double=12 [2021-07-06 20:41:20,904 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-07-06 20:41:20,904 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-07-06 20:41:20,904 INFO L138 SettingsManager]: * Use constant arrays=true [2021-07-06 20:41:20,904 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-07-06 20:41:20,904 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-07-06 20:41:20,905 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-07-06 20:41:20,905 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-07-06 20:41:20,905 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-07-06 20:41:20,905 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-07-06 20:41:20,906 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-07-06 20:41:20,906 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e6d225bacde2ff4b43f974edb4824451ea41bcc5 [2021-07-06 20:41:21,156 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-07-06 20:41:21,171 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-07-06 20:41:21,173 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-07-06 20:41:21,174 INFO L271 PluginConnector]: Initializing CDTParser... [2021-07-06 20:41:21,174 INFO L275 PluginConnector]: CDTParser initialized [2021-07-06 20:41:21,175 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c [2021-07-06 20:41:21,226 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b8beae8d/e14e9d1eda544c7dbac2f2ec3ebc6b7e/FLAG13493b401 [2021-07-06 20:41:21,592 INFO L306 CDTParser]: Found 1 translation units. [2021-07-06 20:41:21,593 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c [2021-07-06 20:41:21,601 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b8beae8d/e14e9d1eda544c7dbac2f2ec3ebc6b7e/FLAG13493b401 [2021-07-06 20:41:21,612 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b8beae8d/e14e9d1eda544c7dbac2f2ec3ebc6b7e [2021-07-06 20:41:21,614 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-07-06 20:41:21,616 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-07-06 20:41:21,618 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-07-06 20:41:21,618 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-07-06 20:41:21,621 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-07-06 20:41:21,621 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,622 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1ff21277 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21, skipping insertion in model container [2021-07-06 20:41:21,622 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,630 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-07-06 20:41:21,662 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-07-06 20:41:21,759 WARN L224 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c[338,351] [2021-07-06 20:41:21,794 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-07-06 20:41:21,800 INFO L203 MainTranslator]: Completed pre-run [2021-07-06 20:41:21,816 WARN L224 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c[338,351] [2021-07-06 20:41:21,828 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-07-06 20:41:21,860 INFO L208 MainTranslator]: Completed translation [2021-07-06 20:41:21,861 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21 WrapperNode [2021-07-06 20:41:21,861 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-07-06 20:41:21,861 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-07-06 20:41:21,861 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-07-06 20:41:21,862 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-07-06 20:41:21,866 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,878 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,909 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-07-06 20:41:21,910 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-07-06 20:41:21,910 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-07-06 20:41:21,910 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-07-06 20:41:21,916 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,916 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,926 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,926 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,934 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,943 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,945 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,946 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-07-06 20:41:21,947 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-07-06 20:41:21,947 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-07-06 20:41:21,947 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-07-06 20:41:21,948 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (1/1) ... [2021-07-06 20:41:21,952 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-07-06 20:41:21,956 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-07-06 20:41:21,972 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-07-06 20:41:21,981 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-07-06 20:41:22,007 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-07-06 20:41:22,008 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-07-06 20:41:22,008 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-07-06 20:41:22,008 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-07-06 20:41:22,349 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-07-06 20:41:22,350 INFO L299 CfgBuilder]: Removed 58 assume(true) statements. [2021-07-06 20:41:22,351 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.07 08:41:22 BoogieIcfgContainer [2021-07-06 20:41:22,352 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-07-06 20:41:22,362 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-07-06 20:41:22,362 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-07-06 20:41:22,364 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-07-06 20:41:22,368 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-07-06 20:41:22,368 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.07 08:41:21" (1/3) ... [2021-07-06 20:41:22,369 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@769a334d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.07 08:41:22, skipping insertion in model container [2021-07-06 20:41:22,369 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-07-06 20:41:22,369 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.07 08:41:21" (2/3) ... [2021-07-06 20:41:22,369 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@769a334d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.07 08:41:22, skipping insertion in model container [2021-07-06 20:41:22,369 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-07-06 20:41:22,369 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.07 08:41:22" (3/3) ... [2021-07-06 20:41:22,373 INFO L389 chiAutomizerObserver]: Analyzing ICFG pc_sfifo_2.cil-1.c [2021-07-06 20:41:22,399 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-07-06 20:41:22,399 INFO L360 BuchiCegarLoop]: Hoare is false [2021-07-06 20:41:22,400 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-07-06 20:41:22,400 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-07-06 20:41:22,400 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-07-06 20:41:22,400 INFO L364 BuchiCegarLoop]: Difference is false [2021-07-06 20:41:22,400 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-07-06 20:41:22,400 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-07-06 20:41:22,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 92 states, 91 states have (on average 1.6043956043956045) internal successors, (146), 91 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,427 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2021-07-06 20:41:22,427 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:22,427 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:22,432 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,432 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,432 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-07-06 20:41:22,433 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 92 states, 91 states have (on average 1.6043956043956045) internal successors, (146), 91 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,436 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2021-07-06 20:41:22,436 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:22,436 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:22,437 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,437 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,442 INFO L791 eck$LassoCheckResult]: Stem: 40#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 14#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 44#L454true havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 82#L214true assume !(1 == ~q_req_up~0); 81#L214-1true assume !(1 == ~p_dw_i~0);~p_dw_st~0 := 2; 93#L229-1true assume !(1 == ~c_dr_i~0);~c_dr_st~0 := 2; 11#L234-1true assume !(0 == ~q_read_ev~0); 39#L267-1true assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 51#L272-1true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 92#L57true assume 1 == ~p_dw_pc~0; 3#L58true assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 94#L68true is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 5#L69true activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 17#L307true assume !(0 != activate_threads_~tmp~1); 22#L307-2true havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 19#L76true assume !(1 == ~c_dr_pc~0); 16#L76-2true is_do_read_c_triggered_~__retres1~1 := 0; 20#L87true is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 46#L88true activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 47#L315true assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 34#L315-2true assume !(1 == ~q_read_ev~0); 7#L285-1true assume !(1 == ~q_write_ev~0); 72#L411-1true [2021-07-06 20:41:22,443 INFO L793 eck$LassoCheckResult]: Loop: 72#L411-1true assume !false; 88#L412true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 52#L356true assume false; 80#L372true start_simulation_~kernel_st~0 := 2; 58#L214-2true assume !(1 == ~q_req_up~0); 56#L214-3true start_simulation_~kernel_st~0 := 3; 12#L267-2true assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 9#L267-4true assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 68#L272-3true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 83#L57-3true assume !(1 == ~p_dw_pc~0); 59#L57-5true is_do_write_p_triggered_~__retres1~0 := 0; 91#L68-1true is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 32#L69-1true activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 29#L307-3true assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 6#L307-5true havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 79#L76-3true assume 1 == ~c_dr_pc~0; 42#L77-1true assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 18#L87-1true is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 43#L88-1true activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 36#L315-3true assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 38#L315-5true assume !(1 == ~q_read_ev~0); 4#L285-3true assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 61#L290-3true havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 84#L247-1true assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 24#L259-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 48#L260-1true stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 76#L386true assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 62#L393true stop_simulation_#res := stop_simulation_~__retres2~0; 13#L394true start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 37#L428true assume !(0 != start_simulation_~tmp~4); 72#L411-1true [2021-07-06 20:41:22,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1146955365, now seen corresponding path program 1 times [2021-07-06 20:41:22,455 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,456 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730680024] [2021-07-06 20:41:22,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,457 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:22,604 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,605 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,605 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,606 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:22,617 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,617 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:22,619 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:22,619 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730680024] [2021-07-06 20:41:22,620 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730680024] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:22,620 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:22,621 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:22,622 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454705357] [2021-07-06 20:41:22,628 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-07-06 20:41:22,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1491691453, now seen corresponding path program 1 times [2021-07-06 20:41:22,630 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,631 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263034911] [2021-07-06 20:41:22,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,631 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:22,652 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,652 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,653 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,654 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:22,654 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:22,654 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263034911] [2021-07-06 20:41:22,654 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263034911] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:22,655 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:22,655 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-07-06 20:41:22,655 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289458530] [2021-07-06 20:41:22,656 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:22,657 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:22,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-07-06 20:41:22,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-07-06 20:41:22,675 INFO L87 Difference]: Start difference. First operand has 92 states, 91 states have (on average 1.6043956043956045) internal successors, (146), 91 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:22,709 INFO L93 Difference]: Finished difference Result 92 states and 135 transitions. [2021-07-06 20:41:22,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-07-06 20:41:22,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 92 states and 135 transitions. [2021-07-06 20:41:22,714 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-07-06 20:41:22,717 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 92 states to 86 states and 129 transitions. [2021-07-06 20:41:22,718 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2021-07-06 20:41:22,718 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2021-07-06 20:41:22,718 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 129 transitions. [2021-07-06 20:41:22,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:22,719 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 129 transitions. [2021-07-06 20:41:22,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 129 transitions. [2021-07-06 20:41:22,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2021-07-06 20:41:22,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.5) internal successors, (129), 85 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 129 transitions. [2021-07-06 20:41:22,755 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 129 transitions. [2021-07-06 20:41:22,756 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 129 transitions. [2021-07-06 20:41:22,756 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-07-06 20:41:22,756 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 129 transitions. [2021-07-06 20:41:22,759 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-07-06 20:41:22,762 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:22,762 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:22,763 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,764 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,764 INFO L791 eck$LassoCheckResult]: Stem: 253#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 215#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 216#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 257#L214 assume !(1 == ~q_req_up~0); 218#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 278#L229-1 assume !(1 == ~c_dr_i~0);~c_dr_st~0 := 2; 213#L234-1 assume !(0 == ~q_read_ev~0); 214#L267-1 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 252#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 262#L57 assume 1 == ~p_dw_pc~0; 195#L58 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 196#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 200#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 201#L307 assume !(0 != activate_threads_~tmp~1); 221#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 224#L76 assume !(1 == ~c_dr_pc~0); 219#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 220#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 226#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 258#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 248#L315-2 assume !(1 == ~q_read_ev~0); 202#L285-1 assume !(1 == ~q_write_ev~0); 203#L411-1 [2021-07-06 20:41:22,765 INFO L793 eck$LassoCheckResult]: Loop: 203#L411-1 assume !false; 275#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 261#L356 assume !false; 204#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 205#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 233#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 234#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 235#L336 assume !(0 != eval_~tmp___1~0); 237#L372 start_simulation_~kernel_st~0 := 2; 267#L214-2 assume !(1 == ~q_req_up~0); 265#L214-3 start_simulation_~kernel_st~0 := 3; 210#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 206#L267-4 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 207#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 274#L57-3 assume !(1 == ~p_dw_pc~0); 241#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 240#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 247#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 238#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 198#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 199#L76-3 assume !(1 == ~c_dr_pc~0); 256#L76-5 is_do_read_c_triggered_~__retres1~1 := 0; 222#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 223#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 250#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 251#L315-5 assume !(1 == ~q_read_ev~0); 193#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 194#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 269#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 229#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 230#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 259#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 270#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 211#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 212#L428 assume !(0 != start_simulation_~tmp~4); 203#L411-1 [2021-07-06 20:41:22,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,766 INFO L82 PathProgramCache]: Analyzing trace with hash -1153867225, now seen corresponding path program 1 times [2021-07-06 20:41:22,766 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,766 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894742870] [2021-07-06 20:41:22,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,767 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:22,787 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,788 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,788 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,789 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:22,791 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,792 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:22,792 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:22,793 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894742870] [2021-07-06 20:41:22,793 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894742870] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:22,793 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:22,793 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:22,793 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [758570113] [2021-07-06 20:41:22,794 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-07-06 20:41:22,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,794 INFO L82 PathProgramCache]: Analyzing trace with hash 468682159, now seen corresponding path program 1 times [2021-07-06 20:41:22,794 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,794 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186279177] [2021-07-06 20:41:22,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,795 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:22,811 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,811 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,812 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,813 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 5 [2021-07-06 20:41:22,816 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,816 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:22,817 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:22,817 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186279177] [2021-07-06 20:41:22,818 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1186279177] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:22,818 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:22,818 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:22,818 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248835104] [2021-07-06 20:41:22,819 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:22,819 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:22,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-07-06 20:41:22,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-07-06 20:41:22,821 INFO L87 Difference]: Start difference. First operand 86 states and 129 transitions. cyclomatic complexity: 44 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:22,830 INFO L93 Difference]: Finished difference Result 86 states and 128 transitions. [2021-07-06 20:41:22,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-07-06 20:41:22,831 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 128 transitions. [2021-07-06 20:41:22,832 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-07-06 20:41:22,833 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 86 states and 128 transitions. [2021-07-06 20:41:22,833 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2021-07-06 20:41:22,833 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2021-07-06 20:41:22,834 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 128 transitions. [2021-07-06 20:41:22,834 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:22,834 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2021-07-06 20:41:22,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 128 transitions. [2021-07-06 20:41:22,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2021-07-06 20:41:22,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.4883720930232558) internal successors, (128), 85 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 128 transitions. [2021-07-06 20:41:22,840 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2021-07-06 20:41:22,840 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2021-07-06 20:41:22,840 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-07-06 20:41:22,841 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 128 transitions. [2021-07-06 20:41:22,842 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-07-06 20:41:22,843 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:22,844 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:22,845 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,845 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,845 INFO L791 eck$LassoCheckResult]: Stem: 432#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 394#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 395#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 436#L214 assume !(1 == ~q_req_up~0); 397#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 457#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 389#L234-1 assume !(0 == ~q_read_ev~0); 390#L267-1 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 431#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 440#L57 assume 1 == ~p_dw_pc~0; 372#L58 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 373#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 377#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 378#L307 assume !(0 != activate_threads_~tmp~1); 400#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 403#L76 assume !(1 == ~c_dr_pc~0); 398#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 399#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 405#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 437#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 427#L315-2 assume !(1 == ~q_read_ev~0); 381#L285-1 assume !(1 == ~q_write_ev~0); 382#L411-1 [2021-07-06 20:41:22,845 INFO L793 eck$LassoCheckResult]: Loop: 382#L411-1 assume !false; 454#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 441#L356 assume !false; 383#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 384#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 412#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 413#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 414#L336 assume !(0 != eval_~tmp___1~0); 416#L372 start_simulation_~kernel_st~0 := 2; 446#L214-2 assume !(1 == ~q_req_up~0); 444#L214-3 start_simulation_~kernel_st~0 := 3; 391#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 385#L267-4 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 386#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 453#L57-3 assume 1 == ~p_dw_pc~0; 418#L58-1 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 419#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 426#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 417#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 379#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 380#L76-3 assume 1 == ~c_dr_pc~0; 434#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 401#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 402#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 429#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 430#L315-5 assume !(1 == ~q_read_ev~0); 375#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 376#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 448#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 408#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 409#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 438#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 449#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 392#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 393#L428 assume !(0 != start_simulation_~tmp~4); 382#L411-1 [2021-07-06 20:41:22,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,846 INFO L82 PathProgramCache]: Analyzing trace with hash 434480677, now seen corresponding path program 1 times [2021-07-06 20:41:22,846 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,846 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793387416] [2021-07-06 20:41:22,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,846 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:22,866 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,866 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,867 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,867 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:22,869 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,870 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 4 [2021-07-06 20:41:22,873 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,874 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:22,874 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:22,874 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793387416] [2021-07-06 20:41:22,874 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [793387416] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:22,875 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:22,875 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-07-06 20:41:22,875 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864013387] [2021-07-06 20:41:22,875 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-07-06 20:41:22,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,876 INFO L82 PathProgramCache]: Analyzing trace with hash -1782372499, now seen corresponding path program 1 times [2021-07-06 20:41:22,876 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,876 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257504657] [2021-07-06 20:41:22,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,876 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:22,891 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,891 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,892 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,892 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 5 [2021-07-06 20:41:22,894 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:22,895 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:22,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:22,895 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:22,895 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257504657] [2021-07-06 20:41:22,896 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1257504657] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:22,896 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:22,896 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:22,896 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49231291] [2021-07-06 20:41:22,896 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:22,897 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:22,897 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-07-06 20:41:22,897 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-07-06 20:41:22,898 INFO L87 Difference]: Start difference. First operand 86 states and 128 transitions. cyclomatic complexity: 43 Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:22,979 INFO L93 Difference]: Finished difference Result 177 states and 258 transitions. [2021-07-06 20:41:22,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-07-06 20:41:22,979 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 177 states and 258 transitions. [2021-07-06 20:41:22,981 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 123 [2021-07-06 20:41:22,982 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 177 states to 177 states and 258 transitions. [2021-07-06 20:41:22,982 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 177 [2021-07-06 20:41:22,983 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 177 [2021-07-06 20:41:22,983 INFO L73 IsDeterministic]: Start isDeterministic. Operand 177 states and 258 transitions. [2021-07-06 20:41:22,983 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:22,983 INFO L681 BuchiCegarLoop]: Abstraction has 177 states and 258 transitions. [2021-07-06 20:41:22,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states and 258 transitions. [2021-07-06 20:41:22,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2021-07-06 20:41:22,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 177 states have (on average 1.4576271186440677) internal successors, (258), 176 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:22,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 258 transitions. [2021-07-06 20:41:22,989 INFO L704 BuchiCegarLoop]: Abstraction has 177 states and 258 transitions. [2021-07-06 20:41:22,989 INFO L587 BuchiCegarLoop]: Abstraction has 177 states and 258 transitions. [2021-07-06 20:41:22,989 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-07-06 20:41:22,990 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 258 transitions. [2021-07-06 20:41:22,990 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 123 [2021-07-06 20:41:22,991 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:22,991 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:22,991 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,991 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:22,992 INFO L791 eck$LassoCheckResult]: Stem: 707#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 668#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 669#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 711#L214 assume !(1 == ~q_req_up~0); 744#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 816#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 815#L234-1 assume !(0 == ~q_read_ev~0); 814#L267-1 assume !(0 == ~q_write_ev~0); 813#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 812#L57 assume 1 == ~p_dw_pc~0; 811#L58 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 809#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 808#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 807#L307 assume !(0 != activate_threads_~tmp~1); 806#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 805#L76 assume !(1 == ~c_dr_pc~0); 804#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 802#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 801#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 800#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 799#L315-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 654#L285-1 assume !(1 == ~q_write_ev~0); 655#L411-1 [2021-07-06 20:41:22,992 INFO L793 eck$LassoCheckResult]: Loop: 655#L411-1 assume !false; 738#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 716#L356 assume !false; 656#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 657#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 686#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 687#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 688#L336 assume !(0 != eval_~tmp___1~0); 690#L372 start_simulation_~kernel_st~0 := 2; 754#L214-2 assume !(1 == ~q_req_up~0); 753#L214-3 start_simulation_~kernel_st~0 := 3; 752#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 658#L267-4 assume !(0 == ~q_write_ev~0); 659#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 734#L57-3 assume 1 == ~p_dw_pc~0; 692#L58-1 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 693#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 700#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 691#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 650#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 651#L76-3 assume 1 == ~c_dr_pc~0; 709#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 675#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 676#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 704#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 705#L315-5 assume !(1 == ~q_read_ev~0); 645#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 646#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 727#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 682#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 683#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 713#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 728#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 664#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 665#L428 assume !(0 != start_simulation_~tmp~4); 655#L411-1 [2021-07-06 20:41:22,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:22,992 INFO L82 PathProgramCache]: Analyzing trace with hash -845383063, now seen corresponding path program 1 times [2021-07-06 20:41:22,993 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:22,993 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628761067] [2021-07-06 20:41:22,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:22,993 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:22,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,020 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,021 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,038 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,039 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,042 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,042 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 4 [2021-07-06 20:41:23,046 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,047 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,047 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,047 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1628761067] [2021-07-06 20:41:23,048 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1628761067] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,048 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,048 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-07-06 20:41:23,048 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862894950] [2021-07-06 20:41:23,048 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-07-06 20:41:23,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,049 INFO L82 PathProgramCache]: Analyzing trace with hash 707156463, now seen corresponding path program 1 times [2021-07-06 20:41:23,049 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,049 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534759937] [2021-07-06 20:41:23,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,049 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,061 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,061 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,062 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,062 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 5 [2021-07-06 20:41:23,064 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,065 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,065 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,065 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534759937] [2021-07-06 20:41:23,065 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534759937] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,066 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,066 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:23,066 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955550611] [2021-07-06 20:41:23,066 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:23,066 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-07-06 20:41:23,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-07-06 20:41:23,067 INFO L87 Difference]: Start difference. First operand 177 states and 258 transitions. cyclomatic complexity: 83 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,129 INFO L93 Difference]: Finished difference Result 582 states and 830 transitions. [2021-07-06 20:41:23,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-07-06 20:41:23,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 582 states and 830 transitions. [2021-07-06 20:41:23,132 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 552 [2021-07-06 20:41:23,134 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 582 states to 582 states and 830 transitions. [2021-07-06 20:41:23,135 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 582 [2021-07-06 20:41:23,135 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 582 [2021-07-06 20:41:23,135 INFO L73 IsDeterministic]: Start isDeterministic. Operand 582 states and 830 transitions. [2021-07-06 20:41:23,137 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,137 INFO L681 BuchiCegarLoop]: Abstraction has 582 states and 830 transitions. [2021-07-06 20:41:23,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 582 states and 830 transitions. [2021-07-06 20:41:23,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 582 to 554. [2021-07-06 20:41:23,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 554 states, 554 states have (on average 1.44043321299639) internal successors, (798), 553 states have internal predecessors, (798), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 554 states to 554 states and 798 transitions. [2021-07-06 20:41:23,162 INFO L704 BuchiCegarLoop]: Abstraction has 554 states and 798 transitions. [2021-07-06 20:41:23,164 INFO L587 BuchiCegarLoop]: Abstraction has 554 states and 798 transitions. [2021-07-06 20:41:23,164 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-07-06 20:41:23,165 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 554 states and 798 transitions. [2021-07-06 20:41:23,166 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 528 [2021-07-06 20:41:23,167 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,167 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,167 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,168 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,168 INFO L791 eck$LassoCheckResult]: Stem: 1475#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 1437#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 1438#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 1479#L214 assume !(1 == ~q_req_up~0); 1511#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 1512#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 1435#L234-1 assume !(0 == ~q_read_ev~0); 1436#L267-1 assume !(0 == ~q_write_ev~0); 1474#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 1485#L57 assume !(1 == ~p_dw_pc~0); 1514#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 1515#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 1421#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1422#L307 assume !(0 != activate_threads_~tmp~1); 1441#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 1444#L76 assume !(1 == ~c_dr_pc~0); 1439#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 1440#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 1446#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1480#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 1469#L315-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 1423#L285-1 assume !(1 == ~q_write_ev~0); 1424#L411-1 [2021-07-06 20:41:23,168 INFO L793 eck$LassoCheckResult]: Loop: 1424#L411-1 assume !false; 1505#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 1941#L356 assume !false; 1940#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1938#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 1937#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1936#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 1935#L336 assume !(0 != eval_~tmp___1~0); 1509#L372 start_simulation_~kernel_st~0 := 2; 1510#L214-2 assume !(1 == ~q_req_up~0); 1488#L214-3 start_simulation_~kernel_st~0 := 3; 1431#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 1432#L267-4 assume !(0 == ~q_write_ev~0); 1500#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 1501#L57-3 assume !(1 == ~p_dw_pc~0); 1492#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 1493#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 1468#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1459#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 1419#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 1420#L76-3 assume 1 == ~c_dr_pc~0; 1477#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 1442#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 1443#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1472#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 1473#L315-5 assume !(1 == ~q_read_ev~0); 1417#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 1418#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1494#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 1449#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1450#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 1481#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 1497#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 1433#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 1434#L428 assume !(0 != start_simulation_~tmp~4); 1424#L411-1 [2021-07-06 20:41:23,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,169 INFO L82 PathProgramCache]: Analyzing trace with hash -2124707798, now seen corresponding path program 1 times [2021-07-06 20:41:23,169 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,170 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866256711] [2021-07-06 20:41:23,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,171 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,193 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,194 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,194 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,194 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,197 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,197 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,200 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,200 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,203 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,204 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,204 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,204 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866256711] [2021-07-06 20:41:23,204 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [866256711] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,205 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,205 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-07-06 20:41:23,205 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374559669] [2021-07-06 20:41:23,205 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-07-06 20:41:23,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,206 INFO L82 PathProgramCache]: Analyzing trace with hash -266332496, now seen corresponding path program 1 times [2021-07-06 20:41:23,206 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,206 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876435183] [2021-07-06 20:41:23,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,206 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,215 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,216 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,216 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,217 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 5 [2021-07-06 20:41:23,220 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,220 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,222 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,222 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876435183] [2021-07-06 20:41:23,223 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876435183] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,223 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,223 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:23,223 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974844367] [2021-07-06 20:41:23,223 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:23,226 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-07-06 20:41:23,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-07-06 20:41:23,227 INFO L87 Difference]: Start difference. First operand 554 states and 798 transitions. cyclomatic complexity: 248 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,265 INFO L93 Difference]: Finished difference Result 1469 states and 2115 transitions. [2021-07-06 20:41:23,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-07-06 20:41:23,269 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1469 states and 2115 transitions. [2021-07-06 20:41:23,277 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1430 [2021-07-06 20:41:23,284 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1469 states to 1469 states and 2115 transitions. [2021-07-06 20:41:23,284 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1469 [2021-07-06 20:41:23,286 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1469 [2021-07-06 20:41:23,286 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1469 states and 2115 transitions. [2021-07-06 20:41:23,288 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,288 INFO L681 BuchiCegarLoop]: Abstraction has 1469 states and 2115 transitions. [2021-07-06 20:41:23,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1469 states and 2115 transitions. [2021-07-06 20:41:23,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1469 to 587. [2021-07-06 20:41:23,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 587 states, 587 states have (on average 1.415672913117547) internal successors, (831), 586 states have internal predecessors, (831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 587 states to 587 states and 831 transitions. [2021-07-06 20:41:23,300 INFO L704 BuchiCegarLoop]: Abstraction has 587 states and 831 transitions. [2021-07-06 20:41:23,300 INFO L587 BuchiCegarLoop]: Abstraction has 587 states and 831 transitions. [2021-07-06 20:41:23,300 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-07-06 20:41:23,300 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 587 states and 831 transitions. [2021-07-06 20:41:23,302 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 558 [2021-07-06 20:41:23,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,304 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,304 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,305 INFO L791 eck$LassoCheckResult]: Stem: 3513#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 3472#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 3473#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 3520#L214 assume !(1 == ~q_req_up~0); 3553#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 3554#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 3470#L234-1 assume !(0 == ~q_read_ev~0); 3471#L267-1 assume !(0 == ~q_write_ev~0); 3512#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 3528#L57 assume !(1 == ~p_dw_pc~0); 3557#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 3558#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 3457#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 3458#L307 assume !(0 != activate_threads_~tmp~1); 3476#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 3479#L76 assume !(1 == ~c_dr_pc~0); 3474#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 3475#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 3481#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3524#L315 assume !(0 != activate_threads_~tmp___0~1); 3504#L315-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 3459#L285-1 assume !(1 == ~q_write_ev~0); 3460#L411-1 [2021-07-06 20:41:23,305 INFO L793 eck$LassoCheckResult]: Loop: 3460#L411-1 assume !false; 3975#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 3884#L356 assume !false; 3968#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3951#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 3948#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3946#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 3927#L336 assume !(0 != eval_~tmp___1~0); 3928#L372 start_simulation_~kernel_st~0 := 2; 4024#L214-2 assume !(1 == ~q_req_up~0); 3529#L214-3 start_simulation_~kernel_st~0 := 3; 3467#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 3461#L267-4 assume !(0 == ~q_write_ev~0); 3462#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 3540#L57-3 assume !(1 == ~p_dw_pc~0); 3555#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 4013#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 4012#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4011#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 4010#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 4009#L76-3 assume 1 == ~c_dr_pc~0; 4007#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 4005#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 4003#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4001#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 3999#L315-5 assume !(1 == ~q_read_ev~0); 3887#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 3881#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3994#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 3991#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3990#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 3987#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 3986#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 3984#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 3982#L428 assume !(0 != start_simulation_~tmp~4); 3460#L411-1 [2021-07-06 20:41:23,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,306 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705876, now seen corresponding path program 1 times [2021-07-06 20:41:23,306 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,307 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180248872] [2021-07-06 20:41:23,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,307 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,341 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,342 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,342 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,343 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,345 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,345 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,346 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,346 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180248872] [2021-07-06 20:41:23,346 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [180248872] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,346 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,346 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:23,346 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417442427] [2021-07-06 20:41:23,347 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-07-06 20:41:23,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,347 INFO L82 PathProgramCache]: Analyzing trace with hash -266332496, now seen corresponding path program 2 times [2021-07-06 20:41:23,347 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,347 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803900427] [2021-07-06 20:41:23,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,348 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,356 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,356 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,356 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,357 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 5 [2021-07-06 20:41:23,365 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,365 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,365 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,366 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803900427] [2021-07-06 20:41:23,366 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1803900427] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,366 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,366 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:23,366 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076567695] [2021-07-06 20:41:23,366 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:23,367 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-07-06 20:41:23,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-07-06 20:41:23,367 INFO L87 Difference]: Start difference. First operand 587 states and 831 transitions. cyclomatic complexity: 248 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,393 INFO L93 Difference]: Finished difference Result 821 states and 1146 transitions. [2021-07-06 20:41:23,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-07-06 20:41:23,393 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 821 states and 1146 transitions. [2021-07-06 20:41:23,396 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 793 [2021-07-06 20:41:23,399 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 821 states to 821 states and 1146 transitions. [2021-07-06 20:41:23,399 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 821 [2021-07-06 20:41:23,399 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 821 [2021-07-06 20:41:23,400 INFO L73 IsDeterministic]: Start isDeterministic. Operand 821 states and 1146 transitions. [2021-07-06 20:41:23,400 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,400 INFO L681 BuchiCegarLoop]: Abstraction has 821 states and 1146 transitions. [2021-07-06 20:41:23,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 821 states and 1146 transitions. [2021-07-06 20:41:23,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 821 to 546. [2021-07-06 20:41:23,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 546 states, 546 states have (on average 1.401098901098901) internal successors, (765), 545 states have internal predecessors, (765), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 765 transitions. [2021-07-06 20:41:23,406 INFO L704 BuchiCegarLoop]: Abstraction has 546 states and 765 transitions. [2021-07-06 20:41:23,406 INFO L587 BuchiCegarLoop]: Abstraction has 546 states and 765 transitions. [2021-07-06 20:41:23,407 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-07-06 20:41:23,407 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 546 states and 765 transitions. [2021-07-06 20:41:23,408 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 519 [2021-07-06 20:41:23,408 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,409 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,409 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,409 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,409 INFO L791 eck$LassoCheckResult]: Stem: 4924#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 4888#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 4889#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 4929#L214 assume !(1 == ~q_req_up~0); 4962#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 4963#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 4886#L234-1 assume !(0 == ~q_read_ev~0); 4887#L267-1 assume !(0 == ~q_write_ev~0); 4923#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 4935#L57 assume !(1 == ~p_dw_pc~0); 4965#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 4966#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 4872#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4873#L307 assume !(0 != activate_threads_~tmp~1); 4892#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 4895#L76 assume !(1 == ~c_dr_pc~0); 4890#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 4891#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 4968#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4931#L315 assume !(0 != activate_threads_~tmp___0~1); 4918#L315-2 assume !(1 == ~q_read_ev~0); 4874#L285-1 assume !(1 == ~q_write_ev~0); 4875#L411-1 [2021-07-06 20:41:23,409 INFO L793 eck$LassoCheckResult]: Loop: 4875#L411-1 assume !false; 5362#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 5274#L356 assume !false; 5357#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5353#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 5351#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5349#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 5347#L336 assume !(0 != eval_~tmp___1~0); 4961#L372 start_simulation_~kernel_st~0 := 2; 4941#L214-2 assume !(1 == ~q_req_up~0); 4942#L214-3 start_simulation_~kernel_st~0 := 3; 5408#L267-2 assume !(0 == ~q_read_ev~0); 4876#L267-4 assume !(0 == ~q_write_ev~0); 4877#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 4952#L57-3 assume !(1 == ~p_dw_pc~0); 4964#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 5409#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 4915#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4906#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 4870#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 4871#L76-3 assume !(1 == ~c_dr_pc~0); 4928#L76-5 is_do_read_c_triggered_~__retres1~1 := 0; 4893#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 4894#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4920#L315-3 assume !(0 != activate_threads_~tmp___0~1); 4921#L315-5 assume !(1 == ~q_read_ev~0); 4868#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 4869#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5374#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 5372#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5371#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 5370#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 5368#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 5366#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 5364#L428 assume !(0 != start_simulation_~tmp~4); 4875#L411-1 [2021-07-06 20:41:23,410 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,410 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705814, now seen corresponding path program 1 times [2021-07-06 20:41:23,410 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,410 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [831339415] [2021-07-06 20:41:23,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,410 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,416 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,420 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,435 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,436 INFO L82 PathProgramCache]: Analyzing trace with hash -769705103, now seen corresponding path program 1 times [2021-07-06 20:41:23,436 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,436 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315390135] [2021-07-06 20:41:23,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,436 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,443 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,444 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,444 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,445 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,447 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,447 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,450 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,450 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,453 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,454 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,454 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,454 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1315390135] [2021-07-06 20:41:23,454 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1315390135] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,455 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,455 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-07-06 20:41:23,455 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004428895] [2021-07-06 20:41:23,455 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:23,455 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-07-06 20:41:23,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-07-06 20:41:23,456 INFO L87 Difference]: Start difference. First operand 546 states and 765 transitions. cyclomatic complexity: 221 Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,497 INFO L93 Difference]: Finished difference Result 850 states and 1175 transitions. [2021-07-06 20:41:23,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-07-06 20:41:23,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 850 states and 1175 transitions. [2021-07-06 20:41:23,501 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 822 [2021-07-06 20:41:23,504 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 850 states to 850 states and 1175 transitions. [2021-07-06 20:41:23,504 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 850 [2021-07-06 20:41:23,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 850 [2021-07-06 20:41:23,505 INFO L73 IsDeterministic]: Start isDeterministic. Operand 850 states and 1175 transitions. [2021-07-06 20:41:23,505 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,505 INFO L681 BuchiCegarLoop]: Abstraction has 850 states and 1175 transitions. [2021-07-06 20:41:23,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 850 states and 1175 transitions. [2021-07-06 20:41:23,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 850 to 573. [2021-07-06 20:41:23,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 573 states, 573 states have (on average 1.382198952879581) internal successors, (792), 572 states have internal predecessors, (792), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 573 states to 573 states and 792 transitions. [2021-07-06 20:41:23,512 INFO L704 BuchiCegarLoop]: Abstraction has 573 states and 792 transitions. [2021-07-06 20:41:23,512 INFO L587 BuchiCegarLoop]: Abstraction has 573 states and 792 transitions. [2021-07-06 20:41:23,512 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-07-06 20:41:23,512 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 573 states and 792 transitions. [2021-07-06 20:41:23,513 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 546 [2021-07-06 20:41:23,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,514 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,514 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,514 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,514 INFO L791 eck$LassoCheckResult]: Stem: 6337#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 6299#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 6300#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 6345#L214 assume !(1 == ~q_req_up~0); 6383#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 6384#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 6297#L234-1 assume !(0 == ~q_read_ev~0); 6298#L267-1 assume !(0 == ~q_write_ev~0); 6336#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 6354#L57 assume !(1 == ~p_dw_pc~0); 6387#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 6388#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 6284#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 6285#L307 assume !(0 != activate_threads_~tmp~1); 6303#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 6306#L76 assume !(1 == ~c_dr_pc~0); 6301#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 6302#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 6389#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 6347#L315 assume !(0 != activate_threads_~tmp___0~1); 6329#L315-2 assume !(1 == ~q_read_ev~0); 6286#L285-1 assume !(1 == ~q_write_ev~0); 6287#L411-1 [2021-07-06 20:41:23,514 INFO L793 eck$LassoCheckResult]: Loop: 6287#L411-1 assume !false; 6374#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 6352#L356 assume !false; 6353#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6691#L247 assume !(0 == ~p_dw_st~0); 6690#L251 assume !(0 == ~c_dr_st~0);exists_runnable_thread_~__retres1~2 := 0; 6689#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6688#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 6683#L336 assume !(0 != eval_~tmp___1~0); 6382#L372 start_simulation_~kernel_st~0 := 2; 6360#L214-2 assume !(1 == ~q_req_up~0); 6358#L214-3 start_simulation_~kernel_st~0 := 3; 6294#L267-2 assume !(0 == ~q_read_ev~0); 6290#L267-4 assume !(0 == ~q_write_ev~0); 6291#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 6368#L57-3 assume !(1 == ~p_dw_pc~0); 6385#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 6844#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 6843#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 6842#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 6841#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 6840#L76-3 assume 1 == ~c_dr_pc~0; 6838#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 6837#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 6823#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 6824#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 6334#L315-5 assume !(1 == ~q_read_ev~0); 6335#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 6852#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6386#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 6310#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6311#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 6348#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 6364#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 6365#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 6846#L428 assume !(0 != start_simulation_~tmp~4); 6287#L411-1 [2021-07-06 20:41:23,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,515 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705814, now seen corresponding path program 2 times [2021-07-06 20:41:23,515 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,515 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781446732] [2021-07-06 20:41:23,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,515 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,520 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,523 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,526 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,527 INFO L82 PathProgramCache]: Analyzing trace with hash 805032405, now seen corresponding path program 1 times [2021-07-06 20:41:23,527 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,527 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881910349] [2021-07-06 20:41:23,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,537 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,553 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,553 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,556 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,557 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 7 [2021-07-06 20:41:23,580 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,581 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 7 [2021-07-06 20:41:23,590 INFO L142 QuantifierPusher]: treesize reduction 9, result has 50.0 percent of original size [2021-07-06 20:41:23,590 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 9 [2021-07-06 20:41:23,596 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,596 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,597 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,597 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881910349] [2021-07-06 20:41:23,597 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881910349] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,597 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,597 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-07-06 20:41:23,599 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014299327] [2021-07-06 20:41:23,599 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:23,600 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-07-06 20:41:23,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-07-06 20:41:23,600 INFO L87 Difference]: Start difference. First operand 573 states and 792 transitions. cyclomatic complexity: 221 Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 5 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,641 INFO L93 Difference]: Finished difference Result 995 states and 1384 transitions. [2021-07-06 20:41:23,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-07-06 20:41:23,642 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 995 states and 1384 transitions. [2021-07-06 20:41:23,646 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 968 [2021-07-06 20:41:23,649 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 995 states to 995 states and 1384 transitions. [2021-07-06 20:41:23,649 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 995 [2021-07-06 20:41:23,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 995 [2021-07-06 20:41:23,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 995 states and 1384 transitions. [2021-07-06 20:41:23,650 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,650 INFO L681 BuchiCegarLoop]: Abstraction has 995 states and 1384 transitions. [2021-07-06 20:41:23,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 995 states and 1384 transitions. [2021-07-06 20:41:23,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 995 to 579. [2021-07-06 20:41:23,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 579 states, 579 states have (on average 1.3644214162348878) internal successors, (790), 578 states have internal predecessors, (790), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 579 states to 579 states and 790 transitions. [2021-07-06 20:41:23,657 INFO L704 BuchiCegarLoop]: Abstraction has 579 states and 790 transitions. [2021-07-06 20:41:23,657 INFO L587 BuchiCegarLoop]: Abstraction has 579 states and 790 transitions. [2021-07-06 20:41:23,657 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-07-06 20:41:23,657 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 579 states and 790 transitions. [2021-07-06 20:41:23,658 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 552 [2021-07-06 20:41:23,658 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,659 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,659 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,659 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,659 INFO L791 eck$LassoCheckResult]: Stem: 7920#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 7880#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 7881#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 7925#L214 assume !(1 == ~q_req_up~0); 7961#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 7962#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 7875#L234-1 assume !(0 == ~q_read_ev~0); 7876#L267-1 assume !(0 == ~q_write_ev~0); 7919#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 7933#L57 assume !(1 == ~p_dw_pc~0); 7966#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 7967#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 7863#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 7864#L307 assume !(0 != activate_threads_~tmp~1); 7884#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 7887#L76 assume !(1 == ~c_dr_pc~0); 7882#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 7883#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 7926#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 7927#L315 assume !(0 != activate_threads_~tmp___0~1); 7912#L315-2 assume !(1 == ~q_read_ev~0); 7867#L285-1 assume !(1 == ~q_write_ev~0); 7868#L411-1 [2021-07-06 20:41:23,659 INFO L793 eck$LassoCheckResult]: Loop: 7868#L411-1 assume !false; 8216#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 8048#L356 assume !false; 8212#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 8213#L247 assume !(0 == ~p_dw_st~0); 8317#L251 assume !(0 == ~c_dr_st~0);exists_runnable_thread_~__retres1~2 := 0; 8206#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 8207#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 8193#L336 assume !(0 != eval_~tmp___1~0); 8194#L372 start_simulation_~kernel_st~0 := 2; 8346#L214-2 assume !(1 == ~q_req_up~0); 8345#L214-3 start_simulation_~kernel_st~0 := 3; 8344#L267-2 assume !(0 == ~q_read_ev~0); 8343#L267-4 assume !(0 == ~q_write_ev~0); 8342#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 8341#L57-3 assume !(1 == ~p_dw_pc~0); 8340#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 8339#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 8338#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 8337#L307-3 assume !(0 != activate_threads_~tmp~1); 8336#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 8335#L76-3 assume 1 == ~c_dr_pc~0; 8334#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 8333#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 8332#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 8331#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 8330#L315-5 assume !(1 == ~q_read_ev~0); 8329#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 8328#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 8327#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 8325#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 8324#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 8323#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 8322#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 8321#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 8320#L428 assume !(0 != start_simulation_~tmp~4); 7868#L411-1 [2021-07-06 20:41:23,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,660 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705814, now seen corresponding path program 3 times [2021-07-06 20:41:23,660 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,660 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993331439] [2021-07-06 20:41:23,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,661 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,670 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,674 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,685 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,686 INFO L82 PathProgramCache]: Analyzing trace with hash -783315497, now seen corresponding path program 1 times [2021-07-06 20:41:23,686 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,686 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174080551] [2021-07-06 20:41:23,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,686 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,705 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,705 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,706 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,706 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 4 [2021-07-06 20:41:23,710 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,710 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,711 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,711 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174080551] [2021-07-06 20:41:23,712 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [174080551] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,712 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,713 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-07-06 20:41:23,713 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653352756] [2021-07-06 20:41:23,713 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-07-06 20:41:23,713 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-07-06 20:41:23,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-07-06 20:41:23,714 INFO L87 Difference]: Start difference. First operand 579 states and 790 transitions. cyclomatic complexity: 213 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,731 INFO L93 Difference]: Finished difference Result 728 states and 968 transitions. [2021-07-06 20:41:23,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-07-06 20:41:23,732 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 728 states and 968 transitions. [2021-07-06 20:41:23,735 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 697 [2021-07-06 20:41:23,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 728 states to 728 states and 968 transitions. [2021-07-06 20:41:23,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 728 [2021-07-06 20:41:23,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 728 [2021-07-06 20:41:23,738 INFO L73 IsDeterministic]: Start isDeterministic. Operand 728 states and 968 transitions. [2021-07-06 20:41:23,738 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,738 INFO L681 BuchiCegarLoop]: Abstraction has 728 states and 968 transitions. [2021-07-06 20:41:23,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states and 968 transitions. [2021-07-06 20:41:23,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 677. [2021-07-06 20:41:23,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 677 states, 677 states have (on average 1.3353028064992614) internal successors, (904), 676 states have internal predecessors, (904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 677 states to 677 states and 904 transitions. [2021-07-06 20:41:23,763 INFO L704 BuchiCegarLoop]: Abstraction has 677 states and 904 transitions. [2021-07-06 20:41:23,763 INFO L587 BuchiCegarLoop]: Abstraction has 677 states and 904 transitions. [2021-07-06 20:41:23,763 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-07-06 20:41:23,763 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 677 states and 904 transitions. [2021-07-06 20:41:23,765 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 646 [2021-07-06 20:41:23,770 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,770 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,771 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,771 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,771 INFO L791 eck$LassoCheckResult]: Stem: 9228#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 9193#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 9194#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 9233#L214 assume !(1 == ~q_req_up~0); 9270#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 9271#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 9188#L234-1 assume !(0 == ~q_read_ev~0); 9189#L267-1 assume !(0 == ~q_write_ev~0); 9227#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 9240#L57 assume !(1 == ~p_dw_pc~0); 9273#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 9274#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 9176#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 9177#L307 assume !(0 != activate_threads_~tmp~1); 9197#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 9200#L76 assume !(1 == ~c_dr_pc~0); 9195#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 9196#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 9234#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 9235#L315 assume !(0 != activate_threads_~tmp___0~1); 9221#L315-2 assume !(1 == ~q_read_ev~0); 9180#L285-1 assume !(1 == ~q_write_ev~0); 9181#L411-1 assume !false; 9315#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 9302#L356 [2021-07-06 20:41:23,771 INFO L793 eck$LassoCheckResult]: Loop: 9302#L356 assume !false; 9314#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 9313#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 9312#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 9311#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 9310#L336 assume 0 != eval_~tmp___1~0; 9309#L336-1 assume 0 == ~p_dw_st~0;eval_~tmp~2 := eval_#t~nondet13;havoc eval_#t~nondet13; 9308#L345 assume !(0 != eval_~tmp~2); 9307#L341 assume !(0 == ~c_dr_st~0); 9302#L356 [2021-07-06 20:41:23,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1732817812, now seen corresponding path program 1 times [2021-07-06 20:41:23,772 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,772 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105772044] [2021-07-06 20:41:23,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,772 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,777 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,780 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,786 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,787 INFO L82 PathProgramCache]: Analyzing trace with hash -446247985, now seen corresponding path program 1 times [2021-07-06 20:41:23,787 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,788 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [994412404] [2021-07-06 20:41:23,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,788 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,790 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,791 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,792 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,792 INFO L82 PathProgramCache]: Analyzing trace with hash 316098500, now seen corresponding path program 1 times [2021-07-06 20:41:23,792 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,792 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598524426] [2021-07-06 20:41:23,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,793 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-07-06 20:41:23,802 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,803 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 1 [2021-07-06 20:41:23,803 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,803 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 3 [2021-07-06 20:41:23,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-07-06 20:41:23,806 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-07-06 20:41:23,806 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598524426] [2021-07-06 20:41:23,806 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [598524426] provided 1 perfect and 0 imperfect interpolant sequences [2021-07-06 20:41:23,806 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-07-06 20:41:23,806 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-07-06 20:41:23,806 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971727487] [2021-07-06 20:41:23,827 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,829 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 23 [2021-07-06 20:41:23,858 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-07-06 20:41:23,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-07-06 20:41:23,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-07-06 20:41:23,859 INFO L87 Difference]: Start difference. First operand 677 states and 904 transitions. cyclomatic complexity: 231 Second operand has 3 states, 2 states have (on average 16.5) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-07-06 20:41:23,875 INFO L93 Difference]: Finished difference Result 950 states and 1242 transitions. [2021-07-06 20:41:23,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-07-06 20:41:23,875 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 950 states and 1242 transitions. [2021-07-06 20:41:23,879 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 916 [2021-07-06 20:41:23,882 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 950 states to 950 states and 1242 transitions. [2021-07-06 20:41:23,882 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 950 [2021-07-06 20:41:23,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 950 [2021-07-06 20:41:23,883 INFO L73 IsDeterministic]: Start isDeterministic. Operand 950 states and 1242 transitions. [2021-07-06 20:41:23,885 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-07-06 20:41:23,885 INFO L681 BuchiCegarLoop]: Abstraction has 950 states and 1242 transitions. [2021-07-06 20:41:23,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states and 1242 transitions. [2021-07-06 20:41:23,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2021-07-06 20:41:23,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 950 states, 950 states have (on average 1.3073684210526315) internal successors, (1242), 949 states have internal predecessors, (1242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-07-06 20:41:23,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1242 transitions. [2021-07-06 20:41:23,895 INFO L704 BuchiCegarLoop]: Abstraction has 950 states and 1242 transitions. [2021-07-06 20:41:23,895 INFO L587 BuchiCegarLoop]: Abstraction has 950 states and 1242 transitions. [2021-07-06 20:41:23,895 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-07-06 20:41:23,895 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 950 states and 1242 transitions. [2021-07-06 20:41:23,898 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 916 [2021-07-06 20:41:23,898 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-07-06 20:41:23,898 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-07-06 20:41:23,900 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,900 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-07-06 20:41:23,900 INFO L791 eck$LassoCheckResult]: Stem: 10864#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 10828#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 10829#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 10872#L214 assume !(1 == ~q_req_up~0); 10913#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 10914#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 10826#L234-1 assume !(0 == ~q_read_ev~0); 10827#L267-1 assume !(0 == ~q_write_ev~0); 10863#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 10882#L57 assume !(1 == ~p_dw_pc~0); 10917#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 10918#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 10813#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 10814#L307 assume !(0 != activate_threads_~tmp~1); 10832#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 10835#L76 assume !(1 == ~c_dr_pc~0); 10830#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 10831#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 10919#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 10874#L315 assume !(0 != activate_threads_~tmp___0~1); 10857#L315-2 assume !(1 == ~q_read_ev~0); 10815#L285-1 assume !(1 == ~q_write_ev~0); 10816#L411-1 assume !false; 11082#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 11078#L356 [2021-07-06 20:41:23,900 INFO L793 eck$LassoCheckResult]: Loop: 11078#L356 assume !false; 11070#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 11066#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 11060#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 11055#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 11050#L336 assume 0 != eval_~tmp___1~0; 11045#L336-1 assume 0 == ~p_dw_st~0;eval_~tmp~2 := eval_#t~nondet13;havoc eval_#t~nondet13; 11040#L345 assume !(0 != eval_~tmp~2); 11041#L341 assume 0 == ~c_dr_st~0;eval_~tmp___0~2 := eval_#t~nondet14;havoc eval_#t~nondet14; 11080#L360 assume !(0 != eval_~tmp___0~2); 11078#L356 [2021-07-06 20:41:23,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,901 INFO L82 PathProgramCache]: Analyzing trace with hash -1732817812, now seen corresponding path program 2 times [2021-07-06 20:41:23,901 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,901 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655559773] [2021-07-06 20:41:23,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,901 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,905 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,912 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,917 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,917 INFO L82 PathProgramCache]: Analyzing trace with hash -948787220, now seen corresponding path program 1 times [2021-07-06 20:41:23,918 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,918 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078530846] [2021-07-06 20:41:23,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,918 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,922 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,923 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,926 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-07-06 20:41:23,926 INFO L82 PathProgramCache]: Analyzing trace with hash 1209117335, now seen corresponding path program 1 times [2021-07-06 20:41:23,927 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-07-06 20:41:23,927 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101915668] [2021-07-06 20:41:23,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-07-06 20:41:23,927 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-07-06 20:41:23,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,932 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-07-06 20:41:23,937 INFO L224 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-07-06 20:41:23,941 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-07-06 20:41:23,976 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:23,977 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 28 [2021-07-06 20:41:24,394 WARN L205 SmtUtils]: Spent 398.00 ms on a formula simplification. DAG size of input: 145 DAG size of output: 123 [2021-07-06 20:41:24,413 INFO L142 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size [2021-07-06 20:41:24,433 INFO L147 QuantifierPusher]: treesize reduction 0, result has 100.0 percent of original size 176 [2021-07-06 20:41:24,548 WARN L205 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 99 [2021-07-06 20:41:24,569 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.07 08:41:24 BoogieIcfgContainer [2021-07-06 20:41:24,569 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-07-06 20:41:24,569 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-07-06 20:41:24,569 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-07-06 20:41:24,570 INFO L275 PluginConnector]: Witness Printer initialized [2021-07-06 20:41:24,570 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.07 08:41:22" (3/4) ... [2021-07-06 20:41:24,572 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-07-06 20:41:24,594 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2021-07-06 20:41:24,594 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-07-06 20:41:24,594 INFO L168 Benchmark]: Toolchain (without parser) took 2978.40 ms. Allocated memory was 73.4 MB in the beginning and 111.1 MB in the end (delta: 37.7 MB). Free memory was 54.9 MB in the beginning and 59.1 MB in the end (delta: -4.2 MB). Peak memory consumption was 32.9 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,595 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 73.4 MB. Free memory was 53.7 MB in the beginning and 53.7 MB in the end (delta: 54.6 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-07-06 20:41:24,595 INFO L168 Benchmark]: CACSL2BoogieTranslator took 242.95 ms. Allocated memory is still 73.4 MB. Free memory was 54.8 MB in the beginning and 54.6 MB in the end (delta: 155.6 kB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,595 INFO L168 Benchmark]: Boogie Procedure Inliner took 47.71 ms. Allocated memory is still 73.4 MB. Free memory was 54.6 MB in the beginning and 52.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,595 INFO L168 Benchmark]: Boogie Preprocessor took 36.64 ms. Allocated memory is still 73.4 MB. Free memory was 52.5 MB in the beginning and 50.7 MB in the end (delta: 1.8 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,596 INFO L168 Benchmark]: RCFGBuilder took 413.82 ms. Allocated memory is still 73.4 MB. Free memory was 50.7 MB in the beginning and 46.4 MB in the end (delta: 4.3 MB). Peak memory consumption was 25.1 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,596 INFO L168 Benchmark]: BuchiAutomizer took 2207.37 ms. Allocated memory was 73.4 MB in the beginning and 111.1 MB in the end (delta: 37.7 MB). Free memory was 46.4 MB in the beginning and 62.2 MB in the end (delta: -15.8 MB). Peak memory consumption was 57.2 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,596 INFO L168 Benchmark]: Witness Printer took 24.59 ms. Allocated memory is still 111.1 MB. Free memory was 62.2 MB in the beginning and 59.1 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-07-06 20:41:24,597 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 73.4 MB. Free memory was 53.7 MB in the beginning and 53.7 MB in the end (delta: 54.6 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 242.95 ms. Allocated memory is still 73.4 MB. Free memory was 54.8 MB in the beginning and 54.6 MB in the end (delta: 155.6 kB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 47.71 ms. Allocated memory is still 73.4 MB. Free memory was 54.6 MB in the beginning and 52.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 36.64 ms. Allocated memory is still 73.4 MB. Free memory was 52.5 MB in the beginning and 50.7 MB in the end (delta: 1.8 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 413.82 ms. Allocated memory is still 73.4 MB. Free memory was 50.7 MB in the beginning and 46.4 MB in the end (delta: 4.3 MB). Peak memory consumption was 25.1 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 2207.37 ms. Allocated memory was 73.4 MB in the beginning and 111.1 MB in the end (delta: 37.7 MB). Free memory was 46.4 MB in the beginning and 62.2 MB in the end (delta: -15.8 MB). Peak memory consumption was 57.2 MB. Max. memory is 16.1 GB. * Witness Printer took 24.59 ms. Allocated memory is still 111.1 MB. Free memory was 62.2 MB in the beginning and 59.1 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 950 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.1s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 1.4s. Construction of modules took 0.1s. Büchi inclusion checks took 0.2s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 128.2ms AutomataMinimizationTime, 10 MinimizatonAttempts, 1929 StatesRemovedByMinimization, 6 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 950 states and ocurred in iteration 10. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 1299 SDtfs, 1952 SDslu, 1876 SDs, 0 SdLazy, 228 SolverSat, 63 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 187.8ms Time LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc1 concLT0 SILN0 SILU0 SILI6 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 331]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=22611} State at position 1 is {p_last_write=0, c_dr_i=1, c_dr_pc=0, NULL=22613, a_t=0, NULL=0, \result=0, NULL=22611, \result=0, c_num_read=0, tmp=0, c_dr_st=0, kernel_st=1, q_read_ev=2, p_dw_i=1, tmp___1=1, q_req_up=0, tmp___0=0, q_write_ev=2, __retres1=1, NULL=22612, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@653e7cd2=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7dc499a7=0, p_dw_pc=0, NULL=0, NULL=0, NULL=0, q_free=1, NULL=22614, __retres1=0, p_dw_st=0, \result=0, q_ev=0, c_last_read=0, tmp___0=0, NULL=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@19cbd0b=0, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@16a9ab2c=0, p_num_write=0, q_buf_0=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@2f7c2a19=0, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@713db73=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 331]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L17] int q_buf_0 ; [L18] int q_free ; [L19] int q_read_ev ; [L20] int q_write_ev ; [L21] int q_req_up ; [L22] int q_ev ; [L43] int p_num_write ; [L44] int p_last_write ; [L45] int p_dw_st ; [L46] int p_dw_pc ; [L47] int p_dw_i ; [L48] int c_num_read ; [L49] int c_last_read ; [L50] int c_dr_st ; [L51] int c_dr_pc ; [L52] int c_dr_i ; [L156] static int a_t ; [L458] int __retres1 ; [L444] q_free = 1 [L445] q_write_ev = 2 [L446] q_read_ev = q_write_ev [L447] p_num_write = 0 [L448] p_dw_pc = 0 [L449] p_dw_i = 1 [L450] c_num_read = 0 [L451] c_dr_pc = 0 [L452] c_dr_i = 1 [L398] int kernel_st ; [L399] int tmp ; [L403] kernel_st = 0 [L214] COND FALSE !((int )q_req_up == 1) [L229] COND TRUE (int )p_dw_i == 1 [L230] p_dw_st = 0 [L234] COND TRUE (int )c_dr_i == 1 [L235] c_dr_st = 0 [L267] COND FALSE !((int )q_read_ev == 0) [L272] COND FALSE !((int )q_write_ev == 0) [L300] int tmp ; [L301] int tmp___0 ; [L54] int __retres1 ; [L57] COND FALSE !((int )p_dw_pc == 1) [L67] __retres1 = 0 [L69] return (__retres1); [L305] tmp = is_do_write_p_triggered() [L307] COND FALSE !(\read(tmp)) [L73] int __retres1 ; [L76] COND FALSE !((int )c_dr_pc == 1) [L86] __retres1 = 0 [L88] return (__retres1); [L313] tmp___0 = is_do_read_c_triggered() [L315] COND FALSE !(\read(tmp___0)) [L285] COND FALSE !((int )q_read_ev == 1) [L290] COND FALSE !((int )q_write_ev == 1) [L411] COND TRUE 1 [L414] kernel_st = 1 [L325] int tmp ; [L326] int tmp___0 ; [L327] int tmp___1 ; Loop: [L331] COND TRUE 1 [L244] int __retres1 ; [L247] COND TRUE (int )p_dw_st == 0 [L248] __retres1 = 1 [L260] return (__retres1); [L334] tmp___1 = exists_runnable_thread() [L336] COND TRUE \read(tmp___1) [L341] COND TRUE (int )p_dw_st == 0 [L343] tmp = __VERIFIER_nondet_int() [L345] COND FALSE !(\read(tmp)) [L356] COND TRUE (int )c_dr_st == 0 [L358] tmp___0 = __VERIFIER_nondet_int() [L360] COND FALSE !(\read(tmp___0)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-07-06 20:41:24,629 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...