./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 20ed64ec Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e6d225bacde2ff4b43f974edb4824451ea41bcc5 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-20ed64e [2021-08-27 16:30:18,983 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-08-27 16:30:18,985 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-08-27 16:30:19,025 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-08-27 16:30:19,026 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-08-27 16:30:19,029 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-08-27 16:30:19,031 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-08-27 16:30:19,036 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-08-27 16:30:19,038 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-08-27 16:30:19,042 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-08-27 16:30:19,044 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-08-27 16:30:19,047 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-08-27 16:30:19,048 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-08-27 16:30:19,050 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-08-27 16:30:19,052 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-08-27 16:30:19,053 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-08-27 16:30:19,054 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-08-27 16:30:19,055 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-08-27 16:30:19,058 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-08-27 16:30:19,064 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-08-27 16:30:19,065 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-08-27 16:30:19,066 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-08-27 16:30:19,068 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-08-27 16:30:19,069 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-08-27 16:30:19,075 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-08-27 16:30:19,076 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-08-27 16:30:19,076 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-08-27 16:30:19,078 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-08-27 16:30:19,078 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-08-27 16:30:19,079 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-08-27 16:30:19,079 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-08-27 16:30:19,080 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-08-27 16:30:19,081 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-08-27 16:30:19,082 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-08-27 16:30:19,083 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-08-27 16:30:19,083 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-08-27 16:30:19,084 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-08-27 16:30:19,084 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-08-27 16:30:19,084 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-08-27 16:30:19,086 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-08-27 16:30:19,086 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-08-27 16:30:19,091 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-08-27 16:30:19,129 INFO L113 SettingsManager]: Loading preferences was successful [2021-08-27 16:30:19,129 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-08-27 16:30:19,129 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-08-27 16:30:19,130 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-08-27 16:30:19,131 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-08-27 16:30:19,132 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-08-27 16:30:19,132 INFO L138 SettingsManager]: * Use SBE=true [2021-08-27 16:30:19,132 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-08-27 16:30:19,132 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-08-27 16:30:19,132 INFO L138 SettingsManager]: * Use old map elimination=false [2021-08-27 16:30:19,133 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-08-27 16:30:19,133 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-08-27 16:30:19,134 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-08-27 16:30:19,134 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-08-27 16:30:19,134 INFO L138 SettingsManager]: * sizeof long=4 [2021-08-27 16:30:19,134 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-08-27 16:30:19,135 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-08-27 16:30:19,135 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-08-27 16:30:19,135 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-08-27 16:30:19,135 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-08-27 16:30:19,135 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-08-27 16:30:19,136 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-08-27 16:30:19,136 INFO L138 SettingsManager]: * sizeof long double=12 [2021-08-27 16:30:19,136 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-08-27 16:30:19,136 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-08-27 16:30:19,136 INFO L138 SettingsManager]: * Use constant arrays=true [2021-08-27 16:30:19,137 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-08-27 16:30:19,137 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-08-27 16:30:19,137 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-08-27 16:30:19,137 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-08-27 16:30:19,138 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-08-27 16:30:19,138 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-08-27 16:30:19,139 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-08-27 16:30:19,139 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e6d225bacde2ff4b43f974edb4824451ea41bcc5 [2021-08-27 16:30:19,472 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-08-27 16:30:19,489 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-08-27 16:30:19,492 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-08-27 16:30:19,493 INFO L271 PluginConnector]: Initializing CDTParser... [2021-08-27 16:30:19,494 INFO L275 PluginConnector]: CDTParser initialized [2021-08-27 16:30:19,495 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c [2021-08-27 16:30:19,558 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b3956bc51/72817ee86aee47f299518f37d8afe12a/FLAG01a32e9ca [2021-08-27 16:30:20,034 INFO L306 CDTParser]: Found 1 translation units. [2021-08-27 16:30:20,038 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c [2021-08-27 16:30:20,050 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b3956bc51/72817ee86aee47f299518f37d8afe12a/FLAG01a32e9ca [2021-08-27 16:30:20,415 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b3956bc51/72817ee86aee47f299518f37d8afe12a [2021-08-27 16:30:20,417 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-08-27 16:30:20,419 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-08-27 16:30:20,423 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-08-27 16:30:20,423 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-08-27 16:30:20,426 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-08-27 16:30:20,427 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,428 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68909532 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20, skipping insertion in model container [2021-08-27 16:30:20,428 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,434 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-08-27 16:30:20,473 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-08-27 16:30:20,574 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c[338,351] [2021-08-27 16:30:20,619 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-27 16:30:20,638 INFO L203 MainTranslator]: Completed pre-run [2021-08-27 16:30:20,679 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_2.cil-1.c[338,351] [2021-08-27 16:30:20,712 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-27 16:30:20,734 INFO L208 MainTranslator]: Completed translation [2021-08-27 16:30:20,734 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20 WrapperNode [2021-08-27 16:30:20,735 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-08-27 16:30:20,736 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-08-27 16:30:20,736 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-08-27 16:30:20,736 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-08-27 16:30:20,741 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,758 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,796 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-08-27 16:30:20,797 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-08-27 16:30:20,797 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-08-27 16:30:20,797 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-08-27 16:30:20,804 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,804 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,815 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,815 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,823 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,835 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,839 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,845 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-08-27 16:30:20,848 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-08-27 16:30:20,848 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-08-27 16:30:20,849 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-08-27 16:30:20,850 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (1/1) ... [2021-08-27 16:30:20,855 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-08-27 16:30:20,861 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-27 16:30:20,878 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-08-27 16:30:20,893 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-08-27 16:30:20,925 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-08-27 16:30:20,926 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-08-27 16:30:20,926 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-08-27 16:30:20,926 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-08-27 16:30:21,427 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-08-27 16:30:21,427 INFO L299 CfgBuilder]: Removed 58 assume(true) statements. [2021-08-27 16:30:21,429 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.08 04:30:21 BoogieIcfgContainer [2021-08-27 16:30:21,429 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-08-27 16:30:21,430 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-08-27 16:30:21,430 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-08-27 16:30:21,432 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-08-27 16:30:21,433 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-08-27 16:30:21,433 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 27.08 04:30:20" (1/3) ... [2021-08-27 16:30:21,434 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@12295336 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 27.08 04:30:21, skipping insertion in model container [2021-08-27 16:30:21,434 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-08-27 16:30:21,434 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.08 04:30:20" (2/3) ... [2021-08-27 16:30:21,434 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@12295336 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 27.08 04:30:21, skipping insertion in model container [2021-08-27 16:30:21,435 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-08-27 16:30:21,435 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.08 04:30:21" (3/3) ... [2021-08-27 16:30:21,436 INFO L389 chiAutomizerObserver]: Analyzing ICFG pc_sfifo_2.cil-1.c [2021-08-27 16:30:21,469 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-08-27 16:30:21,469 INFO L360 BuchiCegarLoop]: Hoare is false [2021-08-27 16:30:21,469 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-08-27 16:30:21,470 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-08-27 16:30:21,470 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-08-27 16:30:21,470 INFO L364 BuchiCegarLoop]: Difference is false [2021-08-27 16:30:21,470 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-08-27 16:30:21,470 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-08-27 16:30:21,481 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 92 states, 91 states have (on average 1.6043956043956045) internal successors, (146), 91 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:21,501 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2021-08-27 16:30:21,501 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:21,502 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:21,508 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,508 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,508 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-08-27 16:30:21,509 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 92 states, 91 states have (on average 1.6043956043956045) internal successors, (146), 91 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:21,513 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2021-08-27 16:30:21,514 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:21,514 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:21,517 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,517 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,523 INFO L791 eck$LassoCheckResult]: Stem: 70#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 59#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 6#L454true havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 81#L214true assume !(1 == ~q_req_up~0); 23#L214-1true assume !(1 == ~p_dw_i~0);~p_dw_st~0 := 2; 87#L229-1true assume !(1 == ~c_dr_i~0);~c_dr_st~0 := 2; 73#L234-1true assume !(0 == ~q_read_ev~0); 55#L267-1true assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 5#L272-1true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 91#L57true assume 1 == ~p_dw_pc~0; 56#L58true assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 80#L68true is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 27#L69true activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 12#L307true assume !(0 != activate_threads_~tmp~1); 28#L307-2true havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 93#L76true assume !(1 == ~c_dr_pc~0); 72#L76-2true is_do_read_c_triggered_~__retres1~1 := 0; 75#L87true is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 45#L88true activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 63#L315true assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 24#L315-2true assume !(1 == ~q_read_ev~0); 74#L285-1true assume !(1 == ~q_write_ev~0); 52#L411-1true [2021-08-27 16:30:21,524 INFO L793 eck$LassoCheckResult]: Loop: 52#L411-1true assume !false; 82#L412true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 41#L356true assume false; 51#L372true start_simulation_~kernel_st~0 := 2; 16#L214-2true assume !(1 == ~q_req_up~0); 29#L214-3true start_simulation_~kernel_st~0 := 3; 38#L267-2true assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 85#L267-4true assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 13#L272-3true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 76#L57-3true assume 1 == ~p_dw_pc~0; 14#L58-1true assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 44#L68-1true is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 86#L69-1true activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 69#L307-3true assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 32#L307-5true havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 8#L76-3true assume 1 == ~c_dr_pc~0; 40#L77-1true assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 11#L87-1true is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 67#L88-1true activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 68#L315-3true assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 58#L315-5true assume !(1 == ~q_read_ev~0); 39#L285-3true assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 60#L290-3true havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 66#L247-1true assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 83#L259-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 22#L260-1true stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 18#L386true assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 35#L393true stop_simulation_#res := stop_simulation_~__retres2~0; 26#L394true start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 62#L428true assume !(0 != start_simulation_~tmp~4); 52#L411-1true [2021-08-27 16:30:21,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:21,528 INFO L82 PathProgramCache]: Analyzing trace with hash 1146955365, now seen corresponding path program 1 times [2021-08-27 16:30:21,535 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:21,535 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919783063] [2021-08-27 16:30:21,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:21,536 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:21,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:21,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:21,672 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:21,673 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1919783063] [2021-08-27 16:30:21,673 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1919783063] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:21,674 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:21,674 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:21,675 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270713098] [2021-08-27 16:30:21,679 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-27 16:30:21,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:21,680 INFO L82 PathProgramCache]: Analyzing trace with hash -518202494, now seen corresponding path program 1 times [2021-08-27 16:30:21,680 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:21,681 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499480331] [2021-08-27 16:30:21,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:21,681 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:21,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:21,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:21,698 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:21,709 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499480331] [2021-08-27 16:30:21,709 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499480331] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:21,710 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:21,710 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-08-27 16:30:21,710 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812435001] [2021-08-27 16:30:21,711 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:21,712 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:21,723 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-27 16:30:21,723 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-27 16:30:21,726 INFO L87 Difference]: Start difference. First operand has 92 states, 91 states have (on average 1.6043956043956045) internal successors, (146), 91 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:21,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:21,747 INFO L93 Difference]: Finished difference Result 92 states and 135 transitions. [2021-08-27 16:30:21,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-27 16:30:21,750 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 92 states and 135 transitions. [2021-08-27 16:30:21,753 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-08-27 16:30:21,758 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 92 states to 86 states and 129 transitions. [2021-08-27 16:30:21,759 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2021-08-27 16:30:21,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2021-08-27 16:30:21,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 129 transitions. [2021-08-27 16:30:21,761 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:21,761 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 129 transitions. [2021-08-27 16:30:21,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 129 transitions. [2021-08-27 16:30:21,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2021-08-27 16:30:21,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.5) internal successors, (129), 85 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:21,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 129 transitions. [2021-08-27 16:30:21,789 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 129 transitions. [2021-08-27 16:30:21,789 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 129 transitions. [2021-08-27 16:30:21,789 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-08-27 16:30:21,789 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 129 transitions. [2021-08-27 16:30:21,791 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-08-27 16:30:21,791 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:21,791 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:21,792 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,793 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,793 INFO L791 eck$LassoCheckResult]: Stem: 277#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 272#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 197#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 198#L214 assume !(1 == ~q_req_up~0); 234#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 235#L229-1 assume !(1 == ~c_dr_i~0);~c_dr_st~0 := 2; 278#L234-1 assume !(0 == ~q_read_ev~0); 267#L267-1 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 195#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 196#L57 assume 1 == ~p_dw_pc~0; 268#L58 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 269#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 241#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 214#L307 assume !(0 != activate_threads_~tmp~1); 215#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 242#L76 assume !(1 == ~c_dr_pc~0); 211#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 210#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 258#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 259#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 236#L315-2 assume !(1 == ~q_read_ev~0); 237#L285-1 assume !(1 == ~q_write_ev~0); 265#L411-1 [2021-08-27 16:30:21,793 INFO L793 eck$LassoCheckResult]: Loop: 265#L411-1 assume !false; 266#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 248#L356 assume !false; 253#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 260#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 193#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 194#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 221#L336 assume !(0 != eval_~tmp___1~0); 222#L372 start_simulation_~kernel_st~0 := 2; 223#L214-2 assume !(1 == ~q_req_up~0); 225#L214-3 start_simulation_~kernel_st~0 := 3; 243#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 249#L267-4 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 212#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 213#L57-3 assume 1 == ~p_dw_pc~0; 218#L58-1 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 219#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 257#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 276#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 246#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 202#L76-3 assume 1 == ~c_dr_pc~0; 203#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 207#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 208#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 275#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 271#L315-5 assume !(1 == ~q_read_ev~0); 250#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 251#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 273#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 264#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 233#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 226#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 227#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 239#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 240#L428 assume !(0 != start_simulation_~tmp~4); 265#L411-1 [2021-08-27 16:30:21,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:21,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1153867225, now seen corresponding path program 1 times [2021-08-27 16:30:21,794 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:21,795 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679151487] [2021-08-27 16:30:21,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:21,795 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:21,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:21,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:21,835 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:21,835 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1679151487] [2021-08-27 16:30:21,836 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1679151487] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:21,836 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:21,836 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:21,836 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [162683098] [2021-08-27 16:30:21,837 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-27 16:30:21,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:21,838 INFO L82 PathProgramCache]: Analyzing trace with hash -1782372499, now seen corresponding path program 1 times [2021-08-27 16:30:21,838 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:21,838 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919056265] [2021-08-27 16:30:21,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:21,839 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:21,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:21,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:21,877 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:21,877 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919056265] [2021-08-27 16:30:21,877 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [919056265] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:21,877 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:21,878 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:21,878 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109698157] [2021-08-27 16:30:21,878 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:21,879 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:21,879 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-27 16:30:21,879 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-27 16:30:21,880 INFO L87 Difference]: Start difference. First operand 86 states and 129 transitions. cyclomatic complexity: 44 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:21,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:21,891 INFO L93 Difference]: Finished difference Result 86 states and 128 transitions. [2021-08-27 16:30:21,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-27 16:30:21,893 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 128 transitions. [2021-08-27 16:30:21,895 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-08-27 16:30:21,896 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 86 states and 128 transitions. [2021-08-27 16:30:21,896 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2021-08-27 16:30:21,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2021-08-27 16:30:21,897 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 128 transitions. [2021-08-27 16:30:21,897 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:21,897 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2021-08-27 16:30:21,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 128 transitions. [2021-08-27 16:30:21,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2021-08-27 16:30:21,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.4883720930232558) internal successors, (128), 85 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:21,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 128 transitions. [2021-08-27 16:30:21,902 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2021-08-27 16:30:21,902 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 128 transitions. [2021-08-27 16:30:21,903 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-08-27 16:30:21,903 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 128 transitions. [2021-08-27 16:30:21,904 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2021-08-27 16:30:21,904 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:21,904 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:21,905 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,905 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:21,906 INFO L791 eck$LassoCheckResult]: Stem: 456#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 451#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 376#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 377#L214 assume !(1 == ~q_req_up~0); 413#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 414#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 457#L234-1 assume !(0 == ~q_read_ev~0); 446#L267-1 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 374#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 375#L57 assume 1 == ~p_dw_pc~0; 447#L58 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 448#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 420#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 391#L307 assume !(0 != activate_threads_~tmp~1); 392#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 421#L76 assume !(1 == ~c_dr_pc~0); 388#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 387#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 437#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 438#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 415#L315-2 assume !(1 == ~q_read_ev~0); 416#L285-1 assume !(1 == ~q_write_ev~0); 444#L411-1 [2021-08-27 16:30:21,906 INFO L793 eck$LassoCheckResult]: Loop: 444#L411-1 assume !false; 445#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 427#L356 assume !false; 432#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 439#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 372#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 373#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 400#L336 assume !(0 != eval_~tmp___1~0); 401#L372 start_simulation_~kernel_st~0 := 2; 402#L214-2 assume !(1 == ~q_req_up~0); 404#L214-3 start_simulation_~kernel_st~0 := 3; 422#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 429#L267-4 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 393#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 394#L57-3 assume 1 == ~p_dw_pc~0; 397#L58-1 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 398#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 436#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 455#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 425#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 381#L76-3 assume 1 == ~c_dr_pc~0; 382#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 389#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 390#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 454#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 450#L315-5 assume !(1 == ~q_read_ev~0); 430#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 431#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 452#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 443#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 412#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 405#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 406#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 418#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 419#L428 assume !(0 != start_simulation_~tmp~4); 444#L411-1 [2021-08-27 16:30:21,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:21,906 INFO L82 PathProgramCache]: Analyzing trace with hash 434480677, now seen corresponding path program 1 times [2021-08-27 16:30:21,907 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:21,907 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298604381] [2021-08-27 16:30:21,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:21,907 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:21,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:21,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:21,985 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:21,985 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298604381] [2021-08-27 16:30:21,985 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298604381] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:21,986 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:21,986 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-27 16:30:21,986 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065075710] [2021-08-27 16:30:21,986 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-27 16:30:21,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:21,989 INFO L82 PathProgramCache]: Analyzing trace with hash -1782372499, now seen corresponding path program 2 times [2021-08-27 16:30:21,989 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:21,989 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115156752] [2021-08-27 16:30:21,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:21,990 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,074 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,074 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115156752] [2021-08-27 16:30:22,075 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1115156752] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,076 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,076 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:22,077 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261960789] [2021-08-27 16:30:22,077 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:22,078 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:22,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-27 16:30:22,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-27 16:30:22,079 INFO L87 Difference]: Start difference. First operand 86 states and 128 transitions. cyclomatic complexity: 43 Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:22,234 INFO L93 Difference]: Finished difference Result 177 states and 258 transitions. [2021-08-27 16:30:22,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-27 16:30:22,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 177 states and 258 transitions. [2021-08-27 16:30:22,243 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 123 [2021-08-27 16:30:22,251 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 177 states to 177 states and 258 transitions. [2021-08-27 16:30:22,252 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 177 [2021-08-27 16:30:22,252 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 177 [2021-08-27 16:30:22,252 INFO L73 IsDeterministic]: Start isDeterministic. Operand 177 states and 258 transitions. [2021-08-27 16:30:22,253 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:22,254 INFO L681 BuchiCegarLoop]: Abstraction has 177 states and 258 transitions. [2021-08-27 16:30:22,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states and 258 transitions. [2021-08-27 16:30:22,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2021-08-27 16:30:22,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 177 states have (on average 1.4576271186440677) internal successors, (258), 176 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 258 transitions. [2021-08-27 16:30:22,269 INFO L704 BuchiCegarLoop]: Abstraction has 177 states and 258 transitions. [2021-08-27 16:30:22,269 INFO L587 BuchiCegarLoop]: Abstraction has 177 states and 258 transitions. [2021-08-27 16:30:22,269 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-08-27 16:30:22,269 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 258 transitions. [2021-08-27 16:30:22,271 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 123 [2021-08-27 16:30:22,271 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:22,271 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:22,272 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:22,272 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:22,272 INFO L791 eck$LassoCheckResult]: Stem: 734#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 729#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 649#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 650#L214 assume !(1 == ~q_req_up~0); 689#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 690#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 735#L234-1 assume !(0 == ~q_read_ev~0); 736#L267-1 assume !(0 == ~q_write_ev~0); 797#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 796#L57 assume 1 == ~p_dw_pc~0; 795#L58 assume 1 == ~q_read_ev~0;is_do_write_p_triggered_~__retres1~0 := 1; 793#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 792#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 791#L307 assume !(0 != activate_threads_~tmp~1); 790#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 789#L76 assume !(1 == ~c_dr_pc~0); 788#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 786#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 785#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 784#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 783#L315-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 688#L285-1 assume !(1 == ~q_write_ev~0); 721#L411-1 [2021-08-27 16:30:22,272 INFO L793 eck$LassoCheckResult]: Loop: 721#L411-1 assume !false; 722#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 702#L356 assume !false; 709#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 716#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 645#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 646#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 674#L336 assume !(0 != eval_~tmp___1~0); 675#L372 start_simulation_~kernel_st~0 := 2; 676#L214-2 assume !(1 == ~q_req_up~0); 678#L214-3 start_simulation_~kernel_st~0 := 3; 696#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 737#L267-4 assume !(0 == ~q_write_ev~0); 665#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 666#L57-3 assume !(1 == ~p_dw_pc~0); 673#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 672#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 713#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 733#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 700#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 654#L76-3 assume !(1 == ~c_dr_pc~0); 656#L76-5 is_do_read_c_triggered_~__retres1~1 := 0; 663#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 664#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 732#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 728#L315-5 assume !(1 == ~q_read_ev~0); 705#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 706#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 730#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 720#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 686#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 679#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 680#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 692#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 693#L428 assume !(0 != start_simulation_~tmp~4); 721#L411-1 [2021-08-27 16:30:22,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:22,273 INFO L82 PathProgramCache]: Analyzing trace with hash -845383063, now seen corresponding path program 1 times [2021-08-27 16:30:22,273 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:22,274 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978175376] [2021-08-27 16:30:22,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:22,274 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,356 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,356 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978175376] [2021-08-27 16:30:22,356 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1978175376] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,357 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,358 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-27 16:30:22,358 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799006192] [2021-08-27 16:30:22,358 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-27 16:30:22,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:22,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1336756175, now seen corresponding path program 1 times [2021-08-27 16:30:22,359 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:22,360 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28487608] [2021-08-27 16:30:22,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:22,361 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,407 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,408 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28487608] [2021-08-27 16:30:22,408 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [28487608] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,408 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,408 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:22,408 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822359366] [2021-08-27 16:30:22,409 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:22,409 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:22,410 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-27 16:30:22,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-27 16:30:22,410 INFO L87 Difference]: Start difference. First operand 177 states and 258 transitions. cyclomatic complexity: 83 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:22,565 INFO L93 Difference]: Finished difference Result 582 states and 830 transitions. [2021-08-27 16:30:22,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-27 16:30:22,566 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 582 states and 830 transitions. [2021-08-27 16:30:22,571 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 552 [2021-08-27 16:30:22,575 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 582 states to 582 states and 830 transitions. [2021-08-27 16:30:22,576 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 582 [2021-08-27 16:30:22,577 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 582 [2021-08-27 16:30:22,577 INFO L73 IsDeterministic]: Start isDeterministic. Operand 582 states and 830 transitions. [2021-08-27 16:30:22,584 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:22,584 INFO L681 BuchiCegarLoop]: Abstraction has 582 states and 830 transitions. [2021-08-27 16:30:22,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 582 states and 830 transitions. [2021-08-27 16:30:22,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 582 to 554. [2021-08-27 16:30:22,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 554 states, 554 states have (on average 1.44043321299639) internal successors, (798), 553 states have internal predecessors, (798), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 554 states to 554 states and 798 transitions. [2021-08-27 16:30:22,634 INFO L704 BuchiCegarLoop]: Abstraction has 554 states and 798 transitions. [2021-08-27 16:30:22,634 INFO L587 BuchiCegarLoop]: Abstraction has 554 states and 798 transitions. [2021-08-27 16:30:22,634 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-08-27 16:30:22,635 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 554 states and 798 transitions. [2021-08-27 16:30:22,639 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 528 [2021-08-27 16:30:22,639 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:22,639 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:22,642 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:22,643 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:22,643 INFO L791 eck$LassoCheckResult]: Stem: 1501#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 1493#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 1421#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 1422#L214 assume !(1 == ~q_req_up~0); 1456#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 1457#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 1502#L234-1 assume !(0 == ~q_read_ev~0); 1491#L267-1 assume !(0 == ~q_write_ev~0); 1419#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 1420#L57 assume !(1 == ~p_dw_pc~0); 1503#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 1504#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 1464#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1436#L307 assume !(0 != activate_threads_~tmp~1); 1437#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 1465#L76 assume !(1 == ~c_dr_pc~0); 1433#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 1432#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 1480#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1481#L315 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 1458#L315-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 1459#L285-1 assume !(1 == ~q_write_ev~0); 1489#L411-1 [2021-08-27 16:30:22,644 INFO L793 eck$LassoCheckResult]: Loop: 1489#L411-1 assume !false; 1490#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 1471#L356 assume !false; 1475#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1482#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 1417#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1418#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 1443#L336 assume !(0 != eval_~tmp___1~0); 1444#L372 start_simulation_~kernel_st~0 := 2; 1445#L214-2 assume !(1 == ~q_req_up~0); 1446#L214-3 start_simulation_~kernel_st~0 := 3; 1466#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 1472#L267-4 assume !(0 == ~q_write_ev~0); 1434#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 1435#L57-3 assume !(1 == ~p_dw_pc~0); 1497#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 1478#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 1479#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1500#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 1469#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 1426#L76-3 assume 1 == ~c_dr_pc~0; 1427#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 1429#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 1430#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1499#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 1492#L315-5 assume !(1 == ~q_read_ev~0); 1473#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 1474#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1494#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 1488#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1455#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 1447#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 1448#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 1462#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 1463#L428 assume !(0 != start_simulation_~tmp~4); 1489#L411-1 [2021-08-27 16:30:22,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:22,646 INFO L82 PathProgramCache]: Analyzing trace with hash -2124707798, now seen corresponding path program 1 times [2021-08-27 16:30:22,646 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:22,646 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722131536] [2021-08-27 16:30:22,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:22,647 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,705 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,705 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722131536] [2021-08-27 16:30:22,705 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722131536] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,706 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,706 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-27 16:30:22,706 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717350256] [2021-08-27 16:30:22,707 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-27 16:30:22,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:22,707 INFO L82 PathProgramCache]: Analyzing trace with hash -266332496, now seen corresponding path program 1 times [2021-08-27 16:30:22,707 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:22,708 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595737152] [2021-08-27 16:30:22,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:22,708 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,763 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,763 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [595737152] [2021-08-27 16:30:22,763 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [595737152] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,763 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,764 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:22,764 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233406090] [2021-08-27 16:30:22,764 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:22,765 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:22,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-27 16:30:22,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-27 16:30:22,767 INFO L87 Difference]: Start difference. First operand 554 states and 798 transitions. cyclomatic complexity: 248 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:22,819 INFO L93 Difference]: Finished difference Result 1469 states and 2115 transitions. [2021-08-27 16:30:22,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-27 16:30:22,820 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1469 states and 2115 transitions. [2021-08-27 16:30:22,830 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1430 [2021-08-27 16:30:22,840 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1469 states to 1469 states and 2115 transitions. [2021-08-27 16:30:22,840 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1469 [2021-08-27 16:30:22,841 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1469 [2021-08-27 16:30:22,841 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1469 states and 2115 transitions. [2021-08-27 16:30:22,843 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:22,843 INFO L681 BuchiCegarLoop]: Abstraction has 1469 states and 2115 transitions. [2021-08-27 16:30:22,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1469 states and 2115 transitions. [2021-08-27 16:30:22,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1469 to 587. [2021-08-27 16:30:22,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 587 states, 587 states have (on average 1.415672913117547) internal successors, (831), 586 states have internal predecessors, (831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 587 states to 587 states and 831 transitions. [2021-08-27 16:30:22,880 INFO L704 BuchiCegarLoop]: Abstraction has 587 states and 831 transitions. [2021-08-27 16:30:22,880 INFO L587 BuchiCegarLoop]: Abstraction has 587 states and 831 transitions. [2021-08-27 16:30:22,880 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-08-27 16:30:22,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 587 states and 831 transitions. [2021-08-27 16:30:22,883 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 558 [2021-08-27 16:30:22,883 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:22,883 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:22,884 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:22,884 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:22,884 INFO L791 eck$LassoCheckResult]: Stem: 3554#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 3541#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 3457#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 3458#L214 assume !(1 == ~q_req_up~0); 3493#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 3494#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 3557#L234-1 assume !(0 == ~q_read_ev~0); 3538#L267-1 assume !(0 == ~q_write_ev~0); 3455#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 3456#L57 assume !(1 == ~p_dw_pc~0); 3561#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 3562#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 3501#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 3472#L307 assume !(0 != activate_threads_~tmp~1); 3473#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 3502#L76 assume !(1 == ~c_dr_pc~0); 3469#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 3556#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 3560#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3548#L315 assume !(0 != activate_threads_~tmp___0~1); 3495#L315-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 3496#L285-1 assume !(1 == ~q_write_ev~0); 3558#L411-1 [2021-08-27 16:30:22,884 INFO L793 eck$LassoCheckResult]: Loop: 3558#L411-1 assume !false; 3953#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 3510#L356 assume !false; 3947#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3944#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 3941#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3939#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 3936#L336 assume !(0 != eval_~tmp___1~0); 3937#L372 start_simulation_~kernel_st~0 := 2; 4033#L214-2 assume !(1 == ~q_req_up~0); 3503#L214-3 start_simulation_~kernel_st~0 := 3; 3504#L267-2 assume 0 == ~q_read_ev~0;~q_read_ev~0 := 1; 3516#L267-4 assume !(0 == ~q_write_ev~0); 3567#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 4016#L57-3 assume !(1 == ~p_dw_pc~0); 4015#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 4014#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 3568#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 3553#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 3505#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 3506#L76-3 assume !(1 == ~c_dr_pc~0); 3520#L76-5 is_do_read_c_triggered_~__retres1~1 := 0; 3559#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 4035#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3551#L315-3 assume !(0 != activate_threads_~tmp___0~1); 3552#L315-5 assume !(1 == ~q_read_ev~0); 3976#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 3973#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3972#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 3968#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3966#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 3964#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 3962#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 3960#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 3958#L428 assume !(0 != start_simulation_~tmp~4); 3558#L411-1 [2021-08-27 16:30:22,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:22,885 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705876, now seen corresponding path program 1 times [2021-08-27 16:30:22,885 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:22,885 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121214316] [2021-08-27 16:30:22,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:22,886 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,917 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,917 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121214316] [2021-08-27 16:30:22,918 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121214316] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,918 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,918 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:22,918 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032300168] [2021-08-27 16:30:22,918 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-27 16:30:22,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:22,919 INFO L82 PathProgramCache]: Analyzing trace with hash -635691597, now seen corresponding path program 1 times [2021-08-27 16:30:22,919 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:22,919 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882022296] [2021-08-27 16:30:22,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:22,919 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:22,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:22,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:22,946 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:22,946 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882022296] [2021-08-27 16:30:22,946 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1882022296] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:22,947 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:22,947 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:22,947 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807462128] [2021-08-27 16:30:22,947 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:22,947 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:22,948 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-27 16:30:22,948 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-27 16:30:22,948 INFO L87 Difference]: Start difference. First operand 587 states and 831 transitions. cyclomatic complexity: 248 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:22,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:22,973 INFO L93 Difference]: Finished difference Result 821 states and 1146 transitions. [2021-08-27 16:30:22,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-27 16:30:22,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 821 states and 1146 transitions. [2021-08-27 16:30:22,982 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 793 [2021-08-27 16:30:22,986 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 821 states to 821 states and 1146 transitions. [2021-08-27 16:30:22,990 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 821 [2021-08-27 16:30:22,992 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 821 [2021-08-27 16:30:22,992 INFO L73 IsDeterministic]: Start isDeterministic. Operand 821 states and 1146 transitions. [2021-08-27 16:30:22,994 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:22,994 INFO L681 BuchiCegarLoop]: Abstraction has 821 states and 1146 transitions. [2021-08-27 16:30:22,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 821 states and 1146 transitions. [2021-08-27 16:30:23,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 821 to 546. [2021-08-27 16:30:23,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 546 states, 546 states have (on average 1.401098901098901) internal successors, (765), 545 states have internal predecessors, (765), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 765 transitions. [2021-08-27 16:30:23,004 INFO L704 BuchiCegarLoop]: Abstraction has 546 states and 765 transitions. [2021-08-27 16:30:23,004 INFO L587 BuchiCegarLoop]: Abstraction has 546 states and 765 transitions. [2021-08-27 16:30:23,004 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-08-27 16:30:23,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 546 states and 765 transitions. [2021-08-27 16:30:23,006 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 519 [2021-08-27 16:30:23,006 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:23,006 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:23,009 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,009 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,009 INFO L791 eck$LassoCheckResult]: Stem: 4953#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 4945#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 4872#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 4873#L214 assume !(1 == ~q_req_up~0); 4906#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 4907#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 4958#L234-1 assume !(0 == ~q_read_ev~0); 4943#L267-1 assume !(0 == ~q_write_ev~0); 4870#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 4871#L57 assume !(1 == ~p_dw_pc~0); 4962#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 4963#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 4914#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4887#L307 assume !(0 != activate_threads_~tmp~1); 4888#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 4915#L76 assume !(1 == ~c_dr_pc~0); 4884#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 4957#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 4933#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4934#L315 assume !(0 != activate_threads_~tmp___0~1); 4908#L315-2 assume !(1 == ~q_read_ev~0); 4909#L285-1 assume !(1 == ~q_write_ev~0); 4959#L411-1 [2021-08-27 16:30:23,010 INFO L793 eck$LassoCheckResult]: Loop: 4959#L411-1 assume !false; 4991#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 4986#L356 assume !false; 4985#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4983#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 4982#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4981#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 4979#L336 assume !(0 != eval_~tmp___1~0); 4980#L372 start_simulation_~kernel_st~0 := 2; 5025#L214-2 assume !(1 == ~q_req_up~0); 5024#L214-3 start_simulation_~kernel_st~0 := 3; 5023#L267-2 assume !(0 == ~q_read_ev~0); 5022#L267-4 assume !(0 == ~q_write_ev~0); 5021#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 5020#L57-3 assume !(1 == ~p_dw_pc~0); 5019#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 5018#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 5017#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 5016#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 5015#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 5014#L76-3 assume 1 == ~c_dr_pc~0; 5012#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 5010#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 5008#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5006#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 5005#L315-5 assume !(1 == ~q_read_ev~0); 5004#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 5003#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5002#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 5000#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4999#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 4998#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 4997#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 4996#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 4995#L428 assume !(0 != start_simulation_~tmp~4); 4959#L411-1 [2021-08-27 16:30:23,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,010 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705814, now seen corresponding path program 1 times [2021-08-27 16:30:23,010 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,010 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468124653] [2021-08-27 16:30:23,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,011 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,026 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,065 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,066 INFO L82 PathProgramCache]: Analyzing trace with hash -400346002, now seen corresponding path program 1 times [2021-08-27 16:30:23,066 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,066 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978098114] [2021-08-27 16:30:23,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,066 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:23,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:23,108 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:23,108 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978098114] [2021-08-27 16:30:23,108 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1978098114] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:23,108 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:23,108 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-27 16:30:23,109 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746585718] [2021-08-27 16:30:23,109 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:23,109 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:23,109 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-27 16:30:23,110 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-27 16:30:23,110 INFO L87 Difference]: Start difference. First operand 546 states and 765 transitions. cyclomatic complexity: 221 Second operand has 5 states, 5 states have (on average 7.0) internal successors, (35), 5 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:23,174 INFO L93 Difference]: Finished difference Result 850 states and 1175 transitions. [2021-08-27 16:30:23,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-08-27 16:30:23,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 850 states and 1175 transitions. [2021-08-27 16:30:23,181 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 822 [2021-08-27 16:30:23,185 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 850 states to 850 states and 1175 transitions. [2021-08-27 16:30:23,186 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 850 [2021-08-27 16:30:23,188 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 850 [2021-08-27 16:30:23,188 INFO L73 IsDeterministic]: Start isDeterministic. Operand 850 states and 1175 transitions. [2021-08-27 16:30:23,189 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:23,189 INFO L681 BuchiCegarLoop]: Abstraction has 850 states and 1175 transitions. [2021-08-27 16:30:23,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 850 states and 1175 transitions. [2021-08-27 16:30:23,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 850 to 573. [2021-08-27 16:30:23,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 573 states, 573 states have (on average 1.382198952879581) internal successors, (792), 572 states have internal predecessors, (792), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 573 states to 573 states and 792 transitions. [2021-08-27 16:30:23,201 INFO L704 BuchiCegarLoop]: Abstraction has 573 states and 792 transitions. [2021-08-27 16:30:23,201 INFO L587 BuchiCegarLoop]: Abstraction has 573 states and 792 transitions. [2021-08-27 16:30:23,201 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-08-27 16:30:23,201 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 573 states and 792 transitions. [2021-08-27 16:30:23,205 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 546 [2021-08-27 16:30:23,205 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:23,205 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:23,205 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,206 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,207 INFO L791 eck$LassoCheckResult]: Stem: 6369#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 6359#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 6284#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 6285#L214 assume !(1 == ~q_req_up~0); 6318#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 6319#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 6372#L234-1 assume !(0 == ~q_read_ev~0); 6357#L267-1 assume !(0 == ~q_write_ev~0); 6282#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 6283#L57 assume !(1 == ~p_dw_pc~0); 6376#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 6377#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 6326#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 6299#L307 assume !(0 != activate_threads_~tmp~1); 6300#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 6327#L76 assume !(1 == ~c_dr_pc~0); 6296#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 6371#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 6345#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 6346#L315 assume !(0 != activate_threads_~tmp___0~1); 6320#L315-2 assume !(1 == ~q_read_ev~0); 6321#L285-1 assume !(1 == ~q_write_ev~0); 6373#L411-1 [2021-08-27 16:30:23,207 INFO L793 eck$LassoCheckResult]: Loop: 6373#L411-1 assume !false; 6844#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 6334#L356 assume !false; 6347#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6348#L247 assume !(0 == ~p_dw_st~0); 6322#L251 assume !(0 == ~c_dr_st~0);exists_runnable_thread_~__retres1~2 := 0; 6280#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6281#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 6387#L336 assume !(0 != eval_~tmp___1~0); 6353#L372 start_simulation_~kernel_st~0 := 2; 6354#L214-2 assume !(1 == ~q_req_up~0); 6842#L214-3 start_simulation_~kernel_st~0 := 3; 6839#L267-2 assume !(0 == ~q_read_ev~0); 6838#L267-4 assume !(0 == ~q_write_ev~0); 6297#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 6298#L57-3 assume !(1 == ~p_dw_pc~0); 6834#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 6833#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 6831#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 6368#L307-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 6332#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 6289#L76-3 assume 1 == ~c_dr_pc~0; 6290#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 6338#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 6365#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 6366#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 6358#L315-5 assume !(1 == ~q_read_ev~0); 6336#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 6337#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6360#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 6352#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6316#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 6317#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 6847#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 6846#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 6845#L428 assume !(0 != start_simulation_~tmp~4); 6373#L411-1 [2021-08-27 16:30:23,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,207 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705814, now seen corresponding path program 2 times [2021-08-27 16:30:23,208 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,208 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892763254] [2021-08-27 16:30:23,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,208 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,221 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,234 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,235 INFO L82 PathProgramCache]: Analyzing trace with hash 805032405, now seen corresponding path program 1 times [2021-08-27 16:30:23,236 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,236 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456677678] [2021-08-27 16:30:23,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,236 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:23,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:23,312 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:23,312 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [456677678] [2021-08-27 16:30:23,312 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [456677678] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:23,313 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:23,313 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-27 16:30:23,313 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245824515] [2021-08-27 16:30:23,313 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:23,313 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:23,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-27 16:30:23,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-27 16:30:23,314 INFO L87 Difference]: Start difference. First operand 573 states and 792 transitions. cyclomatic complexity: 221 Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 5 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:23,380 INFO L93 Difference]: Finished difference Result 995 states and 1384 transitions. [2021-08-27 16:30:23,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-27 16:30:23,381 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 995 states and 1384 transitions. [2021-08-27 16:30:23,388 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 968 [2021-08-27 16:30:23,393 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 995 states to 995 states and 1384 transitions. [2021-08-27 16:30:23,393 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 995 [2021-08-27 16:30:23,394 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 995 [2021-08-27 16:30:23,394 INFO L73 IsDeterministic]: Start isDeterministic. Operand 995 states and 1384 transitions. [2021-08-27 16:30:23,396 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:23,396 INFO L681 BuchiCegarLoop]: Abstraction has 995 states and 1384 transitions. [2021-08-27 16:30:23,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 995 states and 1384 transitions. [2021-08-27 16:30:23,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 995 to 579. [2021-08-27 16:30:23,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 579 states, 579 states have (on average 1.3644214162348878) internal successors, (790), 578 states have internal predecessors, (790), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 579 states to 579 states and 790 transitions. [2021-08-27 16:30:23,409 INFO L704 BuchiCegarLoop]: Abstraction has 579 states and 790 transitions. [2021-08-27 16:30:23,409 INFO L587 BuchiCegarLoop]: Abstraction has 579 states and 790 transitions. [2021-08-27 16:30:23,409 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-08-27 16:30:23,410 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 579 states and 790 transitions. [2021-08-27 16:30:23,412 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 552 [2021-08-27 16:30:23,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:23,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:23,413 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,414 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,414 INFO L791 eck$LassoCheckResult]: Stem: 7949#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 7938#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 7865#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 7866#L214 assume !(1 == ~q_req_up~0); 7899#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 7900#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 7952#L234-1 assume !(0 == ~q_read_ev~0); 7936#L267-1 assume !(0 == ~q_write_ev~0); 7863#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 7864#L57 assume !(1 == ~p_dw_pc~0); 7956#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 7957#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 7907#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 7878#L307 assume !(0 != activate_threads_~tmp~1); 7879#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 7908#L76 assume !(1 == ~c_dr_pc~0); 7875#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 7951#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 7926#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 7927#L315 assume !(0 != activate_threads_~tmp___0~1); 7901#L315-2 assume !(1 == ~q_read_ev~0); 7902#L285-1 assume !(1 == ~q_write_ev~0); 7953#L411-1 [2021-08-27 16:30:23,414 INFO L793 eck$LassoCheckResult]: Loop: 7953#L411-1 assume !false; 8243#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 8110#L356 assume !false; 8242#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 8241#L247 assume !(0 == ~p_dw_st~0); 8240#L251 assume !(0 == ~c_dr_st~0);exists_runnable_thread_~__retres1~2 := 0; 8238#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 8188#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 8189#L336 assume !(0 != eval_~tmp___1~0); 8236#L372 start_simulation_~kernel_st~0 := 2; 8235#L214-2 assume !(1 == ~q_req_up~0); 8234#L214-3 start_simulation_~kernel_st~0 := 3; 8233#L267-2 assume !(0 == ~q_read_ev~0); 8231#L267-4 assume !(0 == ~q_write_ev~0); 7880#L272-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 7881#L57-3 assume !(1 == ~p_dw_pc~0); 7955#L57-5 is_do_write_p_triggered_~__retres1~0 := 0; 8267#L68-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 8266#L69-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 8265#L307-3 assume !(0 != activate_threads_~tmp~1); 8264#L307-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 8263#L76-3 assume 1 == ~c_dr_pc~0; 8261#L77-1 assume 1 == ~q_write_ev~0;is_do_read_c_triggered_~__retres1~1 := 1; 8259#L87-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 8257#L88-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 8255#L315-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 8254#L315-5 assume !(1 == ~q_read_ev~0); 8253#L285-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 8252#L290-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 8251#L247-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 8249#L259-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 8248#L260-1 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 8247#L386 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 8246#L393 stop_simulation_#res := stop_simulation_~__retres2~0; 8245#L394 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 8244#L428 assume !(0 != start_simulation_~tmp~4); 7953#L411-1 [2021-08-27 16:30:23,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,415 INFO L82 PathProgramCache]: Analyzing trace with hash -2124705814, now seen corresponding path program 3 times [2021-08-27 16:30:23,415 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,415 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544910810] [2021-08-27 16:30:23,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,416 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,429 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,449 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,450 INFO L82 PathProgramCache]: Analyzing trace with hash -783315497, now seen corresponding path program 1 times [2021-08-27 16:30:23,450 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,454 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138783280] [2021-08-27 16:30:23,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,454 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:23,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:23,475 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:23,475 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138783280] [2021-08-27 16:30:23,475 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1138783280] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:23,475 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:23,476 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-27 16:30:23,476 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218346724] [2021-08-27 16:30:23,476 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-27 16:30:23,476 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:23,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-27 16:30:23,479 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-27 16:30:23,479 INFO L87 Difference]: Start difference. First operand 579 states and 790 transitions. cyclomatic complexity: 213 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:23,501 INFO L93 Difference]: Finished difference Result 728 states and 968 transitions. [2021-08-27 16:30:23,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-27 16:30:23,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 728 states and 968 transitions. [2021-08-27 16:30:23,505 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 697 [2021-08-27 16:30:23,509 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 728 states to 728 states and 968 transitions. [2021-08-27 16:30:23,509 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 728 [2021-08-27 16:30:23,509 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 728 [2021-08-27 16:30:23,510 INFO L73 IsDeterministic]: Start isDeterministic. Operand 728 states and 968 transitions. [2021-08-27 16:30:23,510 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:23,511 INFO L681 BuchiCegarLoop]: Abstraction has 728 states and 968 transitions. [2021-08-27 16:30:23,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states and 968 transitions. [2021-08-27 16:30:23,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 677. [2021-08-27 16:30:23,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 677 states, 677 states have (on average 1.3353028064992614) internal successors, (904), 676 states have internal predecessors, (904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 677 states to 677 states and 904 transitions. [2021-08-27 16:30:23,528 INFO L704 BuchiCegarLoop]: Abstraction has 677 states and 904 transitions. [2021-08-27 16:30:23,528 INFO L587 BuchiCegarLoop]: Abstraction has 677 states and 904 transitions. [2021-08-27 16:30:23,528 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-08-27 16:30:23,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 677 states and 904 transitions. [2021-08-27 16:30:23,531 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 646 [2021-08-27 16:30:23,531 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:23,532 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:23,532 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,532 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,532 INFO L791 eck$LassoCheckResult]: Stem: 9260#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 9252#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 9178#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 9179#L214 assume !(1 == ~q_req_up~0); 9211#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 9212#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 9265#L234-1 assume !(0 == ~q_read_ev~0); 9250#L267-1 assume !(0 == ~q_write_ev~0); 9176#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 9177#L57 assume !(1 == ~p_dw_pc~0); 9268#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 9269#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 9219#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 9190#L307 assume !(0 != activate_threads_~tmp~1); 9191#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 9220#L76 assume !(1 == ~c_dr_pc~0); 9187#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 9264#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 9238#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 9239#L315 assume !(0 != activate_threads_~tmp___0~1); 9213#L315-2 assume !(1 == ~q_read_ev~0); 9214#L285-1 assume !(1 == ~q_write_ev~0); 9266#L411-1 assume !false; 9317#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 9304#L356 [2021-08-27 16:30:23,533 INFO L793 eck$LassoCheckResult]: Loop: 9304#L356 assume !false; 9316#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 9315#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 9314#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 9313#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 9312#L336 assume 0 != eval_~tmp___1~0; 9311#L336-1 assume 0 == ~p_dw_st~0;eval_~tmp~2 := eval_#t~nondet13;havoc eval_#t~nondet13; 9310#L345 assume !(0 != eval_~tmp~2); 9309#L341 assume !(0 == ~c_dr_st~0); 9304#L356 [2021-08-27 16:30:23,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1732817812, now seen corresponding path program 1 times [2021-08-27 16:30:23,536 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,537 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854387933] [2021-08-27 16:30:23,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,537 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,542 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,551 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,551 INFO L82 PathProgramCache]: Analyzing trace with hash -446247985, now seen corresponding path program 1 times [2021-08-27 16:30:23,551 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,552 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296285338] [2021-08-27 16:30:23,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,552 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,555 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,557 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,558 INFO L82 PathProgramCache]: Analyzing trace with hash 316098500, now seen corresponding path program 1 times [2021-08-27 16:30:23,558 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,558 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339241709] [2021-08-27 16:30:23,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,558 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-27 16:30:23,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-27 16:30:23,581 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-27 16:30:23,581 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339241709] [2021-08-27 16:30:23,581 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339241709] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-27 16:30:23,581 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-27 16:30:23,582 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-08-27 16:30:23,582 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396636974] [2021-08-27 16:30:23,649 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-27 16:30:23,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-27 16:30:23,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-27 16:30:23,650 INFO L87 Difference]: Start difference. First operand 677 states and 904 transitions. cyclomatic complexity: 231 Second operand has 3 states, 2 states have (on average 16.5) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-27 16:30:23,710 INFO L93 Difference]: Finished difference Result 950 states and 1242 transitions. [2021-08-27 16:30:23,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-27 16:30:23,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 950 states and 1242 transitions. [2021-08-27 16:30:23,716 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 916 [2021-08-27 16:30:23,720 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 950 states to 950 states and 1242 transitions. [2021-08-27 16:30:23,727 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 950 [2021-08-27 16:30:23,728 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 950 [2021-08-27 16:30:23,729 INFO L73 IsDeterministic]: Start isDeterministic. Operand 950 states and 1242 transitions. [2021-08-27 16:30:23,730 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-27 16:30:23,730 INFO L681 BuchiCegarLoop]: Abstraction has 950 states and 1242 transitions. [2021-08-27 16:30:23,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states and 1242 transitions. [2021-08-27 16:30:23,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2021-08-27 16:30:23,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 950 states, 950 states have (on average 1.3073684210526315) internal successors, (1242), 949 states have internal predecessors, (1242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-27 16:30:23,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1242 transitions. [2021-08-27 16:30:23,761 INFO L704 BuchiCegarLoop]: Abstraction has 950 states and 1242 transitions. [2021-08-27 16:30:23,761 INFO L587 BuchiCegarLoop]: Abstraction has 950 states and 1242 transitions. [2021-08-27 16:30:23,761 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-08-27 16:30:23,761 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 950 states and 1242 transitions. [2021-08-27 16:30:23,765 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 916 [2021-08-27 16:30:23,765 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-27 16:30:23,765 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-27 16:30:23,765 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,765 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-27 16:30:23,766 INFO L791 eck$LassoCheckResult]: Stem: 10896#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(19);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0; 10888#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 10813#L454 havoc start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~4;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;start_simulation_~kernel_st~0 := 0; 10814#L214 assume !(1 == ~q_req_up~0); 10846#L214-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 10847#L229-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 10901#L234-1 assume !(0 == ~q_read_ev~0); 10885#L267-1 assume !(0 == ~q_write_ev~0); 10811#L272-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 10812#L57 assume !(1 == ~p_dw_pc~0); 10908#L57-2 is_do_write_p_triggered_~__retres1~0 := 0; 10909#L68 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 10854#L69 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 10827#L307 assume !(0 != activate_threads_~tmp~1); 10828#L307-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 10855#L76 assume !(1 == ~c_dr_pc~0); 10824#L76-2 is_do_read_c_triggered_~__retres1~1 := 0; 10900#L87 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 10873#L88 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 10874#L315 assume !(0 != activate_threads_~tmp___0~1); 10848#L315-2 assume !(1 == ~q_read_ev~0); 10849#L285-1 assume !(1 == ~q_write_ev~0); 10902#L411-1 assume !false; 11488#L412 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 11468#L356 [2021-08-27 16:30:23,766 INFO L793 eck$LassoCheckResult]: Loop: 11468#L356 assume !false; 11483#L332 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 11481#L247 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 11478#L259 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 11476#L260 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 11474#L336 assume 0 != eval_~tmp___1~0; 11472#L336-1 assume 0 == ~p_dw_st~0;eval_~tmp~2 := eval_#t~nondet13;havoc eval_#t~nondet13; 11470#L345 assume !(0 != eval_~tmp~2); 11469#L341 assume 0 == ~c_dr_st~0;eval_~tmp___0~2 := eval_#t~nondet14;havoc eval_#t~nondet14; 11459#L360 assume !(0 != eval_~tmp___0~2); 11468#L356 [2021-08-27 16:30:23,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,766 INFO L82 PathProgramCache]: Analyzing trace with hash -1732817812, now seen corresponding path program 2 times [2021-08-27 16:30:23,767 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,767 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808505795] [2021-08-27 16:30:23,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,767 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,772 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,778 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,779 INFO L82 PathProgramCache]: Analyzing trace with hash -948787220, now seen corresponding path program 1 times [2021-08-27 16:30:23,779 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,779 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771101880] [2021-08-27 16:30:23,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,780 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,782 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,785 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:23,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-27 16:30:23,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1209117335, now seen corresponding path program 1 times [2021-08-27 16:30:23,800 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-27 16:30:23,800 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274393422] [2021-08-27 16:30:23,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-27 16:30:23,800 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-27 16:30:23,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,806 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-27 16:30:23,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-27 16:30:23,815 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-27 16:30:24,949 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 27.08 04:30:24 BoogieIcfgContainer [2021-08-27 16:30:24,950 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-08-27 16:30:24,950 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-08-27 16:30:24,950 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-08-27 16:30:24,951 INFO L275 PluginConnector]: Witness Printer initialized [2021-08-27 16:30:24,951 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.08 04:30:21" (3/4) ... [2021-08-27 16:30:24,954 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-08-27 16:30:24,996 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2021-08-27 16:30:24,996 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-08-27 16:30:24,998 INFO L168 Benchmark]: Toolchain (without parser) took 4577.77 ms. Allocated memory was 56.6 MB in the beginning and 123.7 MB in the end (delta: 67.1 MB). Free memory was 35.6 MB in the beginning and 42.3 MB in the end (delta: -6.6 MB). Peak memory consumption was 58.9 MB. Max. memory is 16.1 GB. [2021-08-27 16:30:24,998 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 56.6 MB. Free memory was 38.9 MB in the beginning and 38.8 MB in the end (delta: 73.4 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-08-27 16:30:24,999 INFO L168 Benchmark]: CACSL2BoogieTranslator took 312.44 ms. Allocated memory is still 56.6 MB. Free memory was 35.5 MB in the beginning and 39.0 MB in the end (delta: -3.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. [2021-08-27 16:30:24,999 INFO L168 Benchmark]: Boogie Procedure Inliner took 60.24 ms. Allocated memory is still 56.6 MB. Free memory was 38.8 MB in the beginning and 36.8 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-08-27 16:30:24,999 INFO L168 Benchmark]: Boogie Preprocessor took 50.25 ms. Allocated memory is still 56.6 MB. Free memory was 36.8 MB in the beginning and 35.1 MB in the end (delta: 1.7 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-08-27 16:30:25,000 INFO L168 Benchmark]: RCFGBuilder took 581.29 ms. Allocated memory was 56.6 MB in the beginning and 69.2 MB in the end (delta: 12.6 MB). Free memory was 35.1 MB in the beginning and 49.4 MB in the end (delta: -14.3 MB). Peak memory consumption was 19.2 MB. Max. memory is 16.1 GB. [2021-08-27 16:30:25,000 INFO L168 Benchmark]: BuchiAutomizer took 3520.11 ms. Allocated memory was 69.2 MB in the beginning and 123.7 MB in the end (delta: 54.5 MB). Free memory was 49.0 MB in the beginning and 44.4 MB in the end (delta: 4.7 MB). Peak memory consumption was 59.8 MB. Max. memory is 16.1 GB. [2021-08-27 16:30:25,000 INFO L168 Benchmark]: Witness Printer took 45.94 ms. Allocated memory is still 123.7 MB. Free memory was 44.4 MB in the beginning and 42.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-08-27 16:30:25,002 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 56.6 MB. Free memory was 38.9 MB in the beginning and 38.8 MB in the end (delta: 73.4 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 312.44 ms. Allocated memory is still 56.6 MB. Free memory was 35.5 MB in the beginning and 39.0 MB in the end (delta: -3.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 60.24 ms. Allocated memory is still 56.6 MB. Free memory was 38.8 MB in the beginning and 36.8 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 50.25 ms. Allocated memory is still 56.6 MB. Free memory was 36.8 MB in the beginning and 35.1 MB in the end (delta: 1.7 MB). There was no memory consumed. Max. memory is 16.1 GB. * RCFGBuilder took 581.29 ms. Allocated memory was 56.6 MB in the beginning and 69.2 MB in the end (delta: 12.6 MB). Free memory was 35.1 MB in the beginning and 49.4 MB in the end (delta: -14.3 MB). Peak memory consumption was 19.2 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 3520.11 ms. Allocated memory was 69.2 MB in the beginning and 123.7 MB in the end (delta: 54.5 MB). Free memory was 49.0 MB in the beginning and 44.4 MB in the end (delta: 4.7 MB). Peak memory consumption was 59.8 MB. Max. memory is 16.1 GB. * Witness Printer took 45.94 ms. Allocated memory is still 123.7 MB. Free memory was 44.4 MB in the beginning and 42.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 950 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 3.4s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 2.3s. Construction of modules took 0.3s. Büchi inclusion checks took 0.3s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 203.3ms AutomataMinimizationTime, 10 MinimizatonAttempts, 1929 StatesRemovedByMinimization, 6 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 950 states and ocurred in iteration 10. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 1299 SDtfs, 1952 SDslu, 1876 SDs, 0 SdLazy, 228 SolverSat, 63 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 311.7ms Time LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc1 concLT0 SILN0 SILU0 SILI6 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 331]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=28966} State at position 1 is {p_last_write=0, c_dr_i=1, c_dr_pc=0, NULL=28968, a_t=0, NULL=0, \result=0, NULL=28966, \result=0, c_num_read=0, tmp=0, c_dr_st=0, kernel_st=1, q_read_ev=2, p_dw_i=1, tmp___1=1, q_req_up=0, tmp___0=0, q_write_ev=2, __retres1=1, NULL=28969, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4991ce02=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@42705b77=0, p_dw_pc=0, NULL=0, NULL=0, NULL=0, q_free=1, NULL=28967, __retres1=0, p_dw_st=0, \result=0, q_ev=0, c_last_read=0, tmp___0=0, NULL=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@11a5aacd=0, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7e0f3366=0, p_num_write=0, q_buf_0=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6c1bd874=0, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@1255f2fb=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 331]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L17] int q_buf_0 ; [L18] int q_free ; [L19] int q_read_ev ; [L20] int q_write_ev ; [L21] int q_req_up ; [L22] int q_ev ; [L43] int p_num_write ; [L44] int p_last_write ; [L45] int p_dw_st ; [L46] int p_dw_pc ; [L47] int p_dw_i ; [L48] int c_num_read ; [L49] int c_last_read ; [L50] int c_dr_st ; [L51] int c_dr_pc ; [L52] int c_dr_i ; [L156] static int a_t ; [L458] int __retres1 ; [L444] q_free = 1 [L445] q_write_ev = 2 [L446] q_read_ev = q_write_ev [L447] p_num_write = 0 [L448] p_dw_pc = 0 [L449] p_dw_i = 1 [L450] c_num_read = 0 [L451] c_dr_pc = 0 [L452] c_dr_i = 1 [L398] int kernel_st ; [L399] int tmp ; [L403] kernel_st = 0 [L214] COND FALSE !((int )q_req_up == 1) [L229] COND TRUE (int )p_dw_i == 1 [L230] p_dw_st = 0 [L234] COND TRUE (int )c_dr_i == 1 [L235] c_dr_st = 0 [L267] COND FALSE !((int )q_read_ev == 0) [L272] COND FALSE !((int )q_write_ev == 0) [L300] int tmp ; [L301] int tmp___0 ; [L54] int __retres1 ; [L57] COND FALSE !((int )p_dw_pc == 1) [L67] __retres1 = 0 [L69] return (__retres1); [L305] tmp = is_do_write_p_triggered() [L307] COND FALSE !(\read(tmp)) [L73] int __retres1 ; [L76] COND FALSE !((int )c_dr_pc == 1) [L86] __retres1 = 0 [L88] return (__retres1); [L313] tmp___0 = is_do_read_c_triggered() [L315] COND FALSE !(\read(tmp___0)) [L285] COND FALSE !((int )q_read_ev == 1) [L290] COND FALSE !((int )q_write_ev == 1) [L411] COND TRUE 1 [L414] kernel_st = 1 [L325] int tmp ; [L326] int tmp___0 ; [L327] int tmp___1 ; Loop: [L331] COND TRUE 1 [L244] int __retres1 ; [L247] COND TRUE (int )p_dw_st == 0 [L248] __retres1 = 1 [L260] return (__retres1); [L334] tmp___1 = exists_runnable_thread() [L336] COND TRUE \read(tmp___1) [L341] COND TRUE (int )p_dw_st == 0 [L343] tmp = __VERIFIER_nondet_int() [L345] COND FALSE !(\read(tmp)) [L356] COND TRUE (int )c_dr_st == 0 [L358] tmp___0 = __VERIFIER_nondet_int() [L360] COND FALSE !(\read(tmp___0)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-08-27 16:30:25,070 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...