./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 20ed64ec Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f4a8df43e022ea02bf7dede96490504b890ffeda ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-20ed64e [2021-08-26 09:14:54,957 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-08-26 09:14:54,960 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-08-26 09:14:54,991 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-08-26 09:14:54,991 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-08-26 09:14:54,992 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-08-26 09:14:54,993 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-08-26 09:14:55,001 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-08-26 09:14:55,003 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-08-26 09:14:55,005 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-08-26 09:14:55,006 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-08-26 09:14:55,009 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-08-26 09:14:55,009 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-08-26 09:14:55,017 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-08-26 09:14:55,018 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-08-26 09:14:55,019 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-08-26 09:14:55,020 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-08-26 09:14:55,021 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-08-26 09:14:55,022 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-08-26 09:14:55,025 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-08-26 09:14:55,028 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-08-26 09:14:55,029 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-08-26 09:14:55,030 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-08-26 09:14:55,030 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-08-26 09:14:55,032 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-08-26 09:14:55,033 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-08-26 09:14:55,033 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-08-26 09:14:55,034 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-08-26 09:14:55,035 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-08-26 09:14:55,035 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-08-26 09:14:55,036 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-08-26 09:14:55,036 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-08-26 09:14:55,037 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-08-26 09:14:55,040 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-08-26 09:14:55,041 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-08-26 09:14:55,042 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-08-26 09:14:55,042 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-08-26 09:14:55,043 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-08-26 09:14:55,043 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-08-26 09:14:55,043 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-08-26 09:14:55,044 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-08-26 09:14:55,045 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-08-26 09:14:55,071 INFO L113 SettingsManager]: Loading preferences was successful [2021-08-26 09:14:55,071 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-08-26 09:14:55,072 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-08-26 09:14:55,072 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-08-26 09:14:55,073 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-08-26 09:14:55,073 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-08-26 09:14:55,074 INFO L138 SettingsManager]: * Use SBE=true [2021-08-26 09:14:55,074 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-08-26 09:14:55,074 INFO L138 SettingsManager]: * sizeof long=4 [2021-08-26 09:14:55,074 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-08-26 09:14:55,075 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-08-26 09:14:55,075 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-08-26 09:14:55,075 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-08-26 09:14:55,075 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-08-26 09:14:55,075 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-08-26 09:14:55,075 INFO L138 SettingsManager]: * sizeof long double=12 [2021-08-26 09:14:55,076 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-08-26 09:14:55,076 INFO L138 SettingsManager]: * Use constant arrays=true [2021-08-26 09:14:55,076 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-08-26 09:14:55,076 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-08-26 09:14:55,076 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-08-26 09:14:55,076 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-08-26 09:14:55,076 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-08-26 09:14:55,077 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-08-26 09:14:55,077 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-08-26 09:14:55,077 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-08-26 09:14:55,077 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-08-26 09:14:55,077 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-08-26 09:14:55,077 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-08-26 09:14:55,077 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-08-26 09:14:55,078 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f4a8df43e022ea02bf7dede96490504b890ffeda [2021-08-26 09:14:55,338 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-08-26 09:14:55,353 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-08-26 09:14:55,355 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-08-26 09:14:55,356 INFO L271 PluginConnector]: Initializing CDTParser... [2021-08-26 09:14:55,356 INFO L275 PluginConnector]: CDTParser initialized [2021-08-26 09:14:55,357 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-08-26 09:14:55,413 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/84e04cb42/50c303865cd94f3b932266fcdca9ce19/FLAG78a30e514 [2021-08-26 09:14:55,759 INFO L306 CDTParser]: Found 1 translation units. [2021-08-26 09:14:55,760 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-08-26 09:14:55,766 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/84e04cb42/50c303865cd94f3b932266fcdca9ce19/FLAG78a30e514 [2021-08-26 09:14:56,150 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/84e04cb42/50c303865cd94f3b932266fcdca9ce19 [2021-08-26 09:14:56,152 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-08-26 09:14:56,153 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-08-26 09:14:56,153 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-08-26 09:14:56,154 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-08-26 09:14:56,164 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-08-26 09:14:56,164 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,165 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@31b95bf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56, skipping insertion in model container [2021-08-26 09:14:56,165 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,172 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-08-26 09:14:56,192 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-08-26 09:14:56,365 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14752,14765] [2021-08-26 09:14:56,367 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-26 09:14:56,373 INFO L203 MainTranslator]: Completed pre-run [2021-08-26 09:14:56,436 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14752,14765] [2021-08-26 09:14:56,437 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-26 09:14:56,447 INFO L208 MainTranslator]: Completed translation [2021-08-26 09:14:56,451 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56 WrapperNode [2021-08-26 09:14:56,451 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-08-26 09:14:56,452 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-08-26 09:14:56,453 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-08-26 09:14:56,453 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-08-26 09:14:56,457 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,473 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,505 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-08-26 09:14:56,506 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-08-26 09:14:56,506 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-08-26 09:14:56,506 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-08-26 09:14:56,511 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,512 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,520 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,521 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,533 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,539 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,541 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,545 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-08-26 09:14:56,545 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-08-26 09:14:56,545 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-08-26 09:14:56,545 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-08-26 09:14:56,546 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (1/1) ... [2021-08-26 09:14:56,551 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-08-26 09:14:56,555 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:14:56,574 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-08-26 09:14:56,603 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-08-26 09:14:56,617 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-08-26 09:14:56,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-08-26 09:14:56,619 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-08-26 09:14:56,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-08-26 09:14:57,382 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-08-26 09:14:57,384 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-08-26 09:14:57,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.08 09:14:57 BoogieIcfgContainer [2021-08-26 09:14:57,387 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-08-26 09:14:57,388 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-08-26 09:14:57,388 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-08-26 09:14:57,390 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-08-26 09:14:57,390 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.08 09:14:56" (1/3) ... [2021-08-26 09:14:57,391 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dacc2a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.08 09:14:57, skipping insertion in model container [2021-08-26 09:14:57,392 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:56" (2/3) ... [2021-08-26 09:14:57,392 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dacc2a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.08 09:14:57, skipping insertion in model container [2021-08-26 09:14:57,392 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.08 09:14:57" (3/3) ... [2021-08-26 09:14:57,393 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-08-26 09:14:57,396 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-08-26 09:14:57,397 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-08-26 09:14:57,436 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-08-26 09:14:57,442 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-08-26 09:14:57,442 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-08-26 09:14:57,461 INFO L276 IsEmpty]: Start isEmpty. Operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-08-26 09:14:57,466 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:57,466 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:57,466 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:57,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:57,472 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-08-26 09:14:57,478 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:57,479 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305184851] [2021-08-26 09:14:57,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:57,480 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:57,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:57,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:57,636 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:57,636 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305184851] [2021-08-26 09:14:57,636 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1305184851] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:57,636 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:57,637 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-08-26 09:14:57,638 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044315333] [2021-08-26 09:14:57,642 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-08-26 09:14:57,642 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:57,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-08-26 09:14:57,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-08-26 09:14:57,654 INFO L87 Difference]: Start difference. First operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:57,697 INFO L93 Difference]: Finished difference Result 574 states and 893 transitions. [2021-08-26 09:14:57,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-08-26 09:14:57,698 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-08-26 09:14:57,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:57,711 INFO L225 Difference]: With dead ends: 574 [2021-08-26 09:14:57,712 INFO L226 Difference]: Without dead ends: 291 [2021-08-26 09:14:57,716 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-08-26 09:14:57,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-08-26 09:14:57,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-08-26 09:14:57,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.585820895522388) internal successors, (425), 290 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 425 transitions. [2021-08-26 09:14:57,780 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 425 transitions. Word has length 33 [2021-08-26 09:14:57,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:57,781 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 425 transitions. [2021-08-26 09:14:57,781 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,781 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 425 transitions. [2021-08-26 09:14:57,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-08-26 09:14:57,783 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:57,783 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:57,783 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-08-26 09:14:57,783 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:57,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:57,785 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-08-26 09:14:57,786 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:57,786 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [575868051] [2021-08-26 09:14:57,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:57,786 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:57,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:57,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:57,862 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:57,862 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [575868051] [2021-08-26 09:14:57,863 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [575868051] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:57,863 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:57,863 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:14:57,863 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569874879] [2021-08-26 09:14:57,864 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:14:57,864 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:57,865 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:14:57,865 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:14:57,865 INFO L87 Difference]: Start difference. First operand 291 states and 425 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:57,902 INFO L93 Difference]: Finished difference Result 568 states and 824 transitions. [2021-08-26 09:14:57,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-08-26 09:14:57,903 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-08-26 09:14:57,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:57,904 INFO L225 Difference]: With dead ends: 568 [2021-08-26 09:14:57,904 INFO L226 Difference]: Without dead ends: 291 [2021-08-26 09:14:57,905 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 11.4ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:14:57,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-08-26 09:14:57,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-08-26 09:14:57,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.541044776119403) internal successors, (413), 290 states have internal predecessors, (413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 413 transitions. [2021-08-26 09:14:57,910 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 413 transitions. Word has length 33 [2021-08-26 09:14:57,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:57,910 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 413 transitions. [2021-08-26 09:14:57,910 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:57,910 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 413 transitions. [2021-08-26 09:14:57,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-08-26 09:14:57,911 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:57,912 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:57,912 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-08-26 09:14:57,912 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:57,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:57,913 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-08-26 09:14:57,913 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:57,913 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527923296] [2021-08-26 09:14:57,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:57,913 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:57,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:58,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:58,045 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:58,045 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527923296] [2021-08-26 09:14:58,046 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1527923296] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:58,047 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:58,048 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:58,049 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175563177] [2021-08-26 09:14:58,050 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:58,050 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:58,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:58,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,051 INFO L87 Difference]: Start difference. First operand 291 states and 413 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:58,091 INFO L93 Difference]: Finished difference Result 599 states and 859 transitions. [2021-08-26 09:14:58,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:58,092 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-08-26 09:14:58,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:58,093 INFO L225 Difference]: With dead ends: 599 [2021-08-26 09:14:58,093 INFO L226 Difference]: Without dead ends: 325 [2021-08-26 09:14:58,094 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-08-26 09:14:58,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 267. [2021-08-26 09:14:58,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 267 states, 248 states have (on average 1.5201612903225807) internal successors, (377), 266 states have internal predecessors, (377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 377 transitions. [2021-08-26 09:14:58,098 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 377 transitions. Word has length 44 [2021-08-26 09:14:58,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:58,099 INFO L470 AbstractCegarLoop]: Abstraction has 267 states and 377 transitions. [2021-08-26 09:14:58,099 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,099 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 377 transitions. [2021-08-26 09:14:58,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-08-26 09:14:58,100 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:58,101 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:58,102 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-08-26 09:14:58,102 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:58,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:58,102 INFO L82 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-08-26 09:14:58,103 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:58,103 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145788204] [2021-08-26 09:14:58,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:58,103 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:58,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:58,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:58,178 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:58,179 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145788204] [2021-08-26 09:14:58,179 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [145788204] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:58,179 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:58,179 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:58,180 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808246282] [2021-08-26 09:14:58,180 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:58,180 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:58,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:58,181 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,181 INFO L87 Difference]: Start difference. First operand 267 states and 377 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:58,205 INFO L93 Difference]: Finished difference Result 744 states and 1062 transitions. [2021-08-26 09:14:58,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:58,210 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-08-26 09:14:58,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:58,212 INFO L225 Difference]: With dead ends: 744 [2021-08-26 09:14:58,212 INFO L226 Difference]: Without dead ends: 494 [2021-08-26 09:14:58,214 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2021-08-26 09:14:58,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 300. [2021-08-26 09:14:58,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 281 states have (on average 1.5124555160142348) internal successors, (425), 299 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 425 transitions. [2021-08-26 09:14:58,225 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 425 transitions. Word has length 53 [2021-08-26 09:14:58,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:58,226 INFO L470 AbstractCegarLoop]: Abstraction has 300 states and 425 transitions. [2021-08-26 09:14:58,227 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,227 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 425 transitions. [2021-08-26 09:14:58,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-08-26 09:14:58,231 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:58,231 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:58,232 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-08-26 09:14:58,232 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:58,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:58,233 INFO L82 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-08-26 09:14:58,233 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:58,233 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178193107] [2021-08-26 09:14:58,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:58,234 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:58,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:58,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:58,298 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:58,298 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178193107] [2021-08-26 09:14:58,298 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1178193107] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:58,298 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:58,299 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:58,299 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [442429160] [2021-08-26 09:14:58,299 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:58,299 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:58,300 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:58,300 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,300 INFO L87 Difference]: Start difference. First operand 300 states and 425 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:58,328 INFO L93 Difference]: Finished difference Result 822 states and 1175 transitions. [2021-08-26 09:14:58,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:58,328 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-08-26 09:14:58,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:58,330 INFO L225 Difference]: With dead ends: 822 [2021-08-26 09:14:58,330 INFO L226 Difference]: Without dead ends: 539 [2021-08-26 09:14:58,331 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-08-26 09:14:58,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 321. [2021-08-26 09:14:58,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 321 states, 302 states have (on average 1.5066225165562914) internal successors, (455), 320 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 455 transitions. [2021-08-26 09:14:58,344 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 455 transitions. Word has length 54 [2021-08-26 09:14:58,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:58,345 INFO L470 AbstractCegarLoop]: Abstraction has 321 states and 455 transitions. [2021-08-26 09:14:58,345 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,345 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 455 transitions. [2021-08-26 09:14:58,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-08-26 09:14:58,347 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:58,347 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:58,347 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-08-26 09:14:58,348 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:58,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:58,348 INFO L82 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-08-26 09:14:58,348 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:58,348 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864102837] [2021-08-26 09:14:58,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:58,349 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:58,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:58,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:58,426 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:58,426 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864102837] [2021-08-26 09:14:58,426 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [864102837] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:58,427 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:58,427 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:14:58,427 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [763285437] [2021-08-26 09:14:58,427 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-08-26 09:14:58,427 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:58,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-26 09:14:58,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:14:58,428 INFO L87 Difference]: Start difference. First operand 321 states and 455 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:58,583 INFO L93 Difference]: Finished difference Result 1003 states and 1436 transitions. [2021-08-26 09:14:58,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-26 09:14:58,584 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-08-26 09:14:58,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:58,587 INFO L225 Difference]: With dead ends: 1003 [2021-08-26 09:14:58,587 INFO L226 Difference]: Without dead ends: 699 [2021-08-26 09:14:58,591 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 21.2ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-08-26 09:14:58,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-08-26 09:14:58,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-08-26 09:14:58,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.48) internal successors, (592), 418 states have internal predecessors, (592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 592 transitions. [2021-08-26 09:14:58,611 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 592 transitions. Word has length 54 [2021-08-26 09:14:58,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:58,611 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 592 transitions. [2021-08-26 09:14:58,611 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,611 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 592 transitions. [2021-08-26 09:14:58,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-08-26 09:14:58,612 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:58,612 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:58,612 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-08-26 09:14:58,613 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:58,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:58,613 INFO L82 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-08-26 09:14:58,613 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:58,616 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594289668] [2021-08-26 09:14:58,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:58,616 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:58,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:58,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:58,690 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:58,690 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594289668] [2021-08-26 09:14:58,690 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [594289668] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:58,690 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:58,690 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:14:58,691 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1266366908] [2021-08-26 09:14:58,691 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-08-26 09:14:58,691 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:58,692 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-26 09:14:58,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:14:58,692 INFO L87 Difference]: Start difference. First operand 419 states and 592 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:58,843 INFO L93 Difference]: Finished difference Result 1003 states and 1428 transitions. [2021-08-26 09:14:58,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-26 09:14:58,844 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-08-26 09:14:58,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:58,846 INFO L225 Difference]: With dead ends: 1003 [2021-08-26 09:14:58,846 INFO L226 Difference]: Without dead ends: 699 [2021-08-26 09:14:58,846 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 23.0ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-08-26 09:14:58,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-08-26 09:14:58,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-08-26 09:14:58,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.47) internal successors, (588), 418 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 588 transitions. [2021-08-26 09:14:58,857 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 588 transitions. Word has length 55 [2021-08-26 09:14:58,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:58,857 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 588 transitions. [2021-08-26 09:14:58,857 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,857 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 588 transitions. [2021-08-26 09:14:58,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-08-26 09:14:58,858 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:58,858 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:58,858 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-08-26 09:14:58,858 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:58,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:58,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-08-26 09:14:58,859 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:58,859 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302513505] [2021-08-26 09:14:58,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:58,859 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:58,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:58,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:58,933 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:58,933 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302513505] [2021-08-26 09:14:58,934 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [302513505] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:58,934 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:58,934 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:58,934 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234234074] [2021-08-26 09:14:58,934 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:58,934 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:58,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:58,935 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,935 INFO L87 Difference]: Start difference. First operand 419 states and 588 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:58,956 INFO L93 Difference]: Finished difference Result 843 states and 1199 transitions. [2021-08-26 09:14:58,959 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:58,959 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-08-26 09:14:58,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:58,961 INFO L225 Difference]: With dead ends: 843 [2021-08-26 09:14:58,962 INFO L226 Difference]: Without dead ends: 539 [2021-08-26 09:14:58,962 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:58,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-08-26 09:14:58,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 414. [2021-08-26 09:14:58,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 414 states, 396 states have (on average 1.4646464646464648) internal successors, (580), 413 states have internal predecessors, (580), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 414 states to 414 states and 580 transitions. [2021-08-26 09:14:58,972 INFO L78 Accepts]: Start accepts. Automaton has 414 states and 580 transitions. Word has length 56 [2021-08-26 09:14:58,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:58,973 INFO L470 AbstractCegarLoop]: Abstraction has 414 states and 580 transitions. [2021-08-26 09:14:58,973 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:58,973 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 580 transitions. [2021-08-26 09:14:58,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-08-26 09:14:58,973 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:58,974 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:58,974 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-08-26 09:14:58,974 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:58,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:58,974 INFO L82 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-08-26 09:14:58,975 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:58,975 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246167308] [2021-08-26 09:14:58,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:58,975 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:58,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,046 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,046 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246167308] [2021-08-26 09:14:59,046 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1246167308] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,046 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,047 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:59,047 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1510614964] [2021-08-26 09:14:59,047 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:59,047 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,047 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:59,048 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,048 INFO L87 Difference]: Start difference. First operand 414 states and 580 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:59,104 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-08-26 09:14:59,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:59,106 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-08-26 09:14:59,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:59,107 INFO L225 Difference]: With dead ends: 842 [2021-08-26 09:14:59,108 INFO L226 Difference]: Without dead ends: 543 [2021-08-26 09:14:59,108 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2021-08-26 09:14:59,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 394. [2021-08-26 09:14:59,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 380 states have (on average 1.4421052631578948) internal successors, (548), 393 states have internal predecessors, (548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 548 transitions. [2021-08-26 09:14:59,119 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 548 transitions. Word has length 60 [2021-08-26 09:14:59,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:59,119 INFO L470 AbstractCegarLoop]: Abstraction has 394 states and 548 transitions. [2021-08-26 09:14:59,119 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,119 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 548 transitions. [2021-08-26 09:14:59,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-08-26 09:14:59,120 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:59,120 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:59,120 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-08-26 09:14:59,120 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:59,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:59,121 INFO L82 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-08-26 09:14:59,121 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:59,122 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814031739] [2021-08-26 09:14:59,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:59,122 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:59,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,171 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,171 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814031739] [2021-08-26 09:14:59,171 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [814031739] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,172 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,172 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:59,172 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931269629] [2021-08-26 09:14:59,172 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:59,172 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,173 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:59,173 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,173 INFO L87 Difference]: Start difference. First operand 394 states and 548 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:59,208 INFO L93 Difference]: Finished difference Result 810 states and 1142 transitions. [2021-08-26 09:14:59,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:59,208 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-08-26 09:14:59,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:59,210 INFO L225 Difference]: With dead ends: 810 [2021-08-26 09:14:59,210 INFO L226 Difference]: Without dead ends: 531 [2021-08-26 09:14:59,211 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 531 states. [2021-08-26 09:14:59,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 531 to 382. [2021-08-26 09:14:59,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 382 states, 370 states have (on average 1.4324324324324325) internal successors, (530), 381 states have internal predecessors, (530), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 530 transitions. [2021-08-26 09:14:59,220 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 530 transitions. Word has length 64 [2021-08-26 09:14:59,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:59,220 INFO L470 AbstractCegarLoop]: Abstraction has 382 states and 530 transitions. [2021-08-26 09:14:59,221 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,221 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 530 transitions. [2021-08-26 09:14:59,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-08-26 09:14:59,221 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:59,221 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:59,222 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-08-26 09:14:59,222 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:59,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:59,222 INFO L82 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-08-26 09:14:59,222 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:59,222 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49131772] [2021-08-26 09:14:59,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:59,223 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:59,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,280 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,280 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49131772] [2021-08-26 09:14:59,280 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [49131772] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,280 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,281 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:59,281 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124268236] [2021-08-26 09:14:59,281 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:59,281 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:59,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,282 INFO L87 Difference]: Start difference. First operand 382 states and 530 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:59,333 INFO L93 Difference]: Finished difference Result 806 states and 1134 transitions. [2021-08-26 09:14:59,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:59,333 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-08-26 09:14:59,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:59,335 INFO L225 Difference]: With dead ends: 806 [2021-08-26 09:14:59,335 INFO L226 Difference]: Without dead ends: 539 [2021-08-26 09:14:59,335 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-08-26 09:14:59,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 362. [2021-08-26 09:14:59,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 362 states, 354 states have (on average 1.4067796610169492) internal successors, (498), 361 states have internal predecessors, (498), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 498 transitions. [2021-08-26 09:14:59,346 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 498 transitions. Word has length 65 [2021-08-26 09:14:59,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:59,346 INFO L470 AbstractCegarLoop]: Abstraction has 362 states and 498 transitions. [2021-08-26 09:14:59,346 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,346 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 498 transitions. [2021-08-26 09:14:59,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-08-26 09:14:59,347 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:59,347 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:59,347 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-08-26 09:14:59,347 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:59,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:59,348 INFO L82 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-08-26 09:14:59,348 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:59,348 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650337476] [2021-08-26 09:14:59,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:59,348 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:59,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,451 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,451 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650337476] [2021-08-26 09:14:59,451 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1650337476] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,451 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,451 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:14:59,452 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63423366] [2021-08-26 09:14:59,452 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:14:59,452 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:14:59,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:14:59,453 INFO L87 Difference]: Start difference. First operand 362 states and 498 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:59,593 INFO L93 Difference]: Finished difference Result 1093 states and 1516 transitions. [2021-08-26 09:14:59,594 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-08-26 09:14:59,594 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-08-26 09:14:59,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:59,596 INFO L225 Difference]: With dead ends: 1093 [2021-08-26 09:14:59,597 INFO L226 Difference]: Without dead ends: 846 [2021-08-26 09:14:59,597 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 41.4ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-08-26 09:14:59,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2021-08-26 09:14:59,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 412. [2021-08-26 09:14:59,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 412 states, 404 states have (on average 1.400990099009901) internal successors, (566), 411 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 412 states and 566 transitions. [2021-08-26 09:14:59,613 INFO L78 Accepts]: Start accepts. Automaton has 412 states and 566 transitions. Word has length 70 [2021-08-26 09:14:59,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:59,614 INFO L470 AbstractCegarLoop]: Abstraction has 412 states and 566 transitions. [2021-08-26 09:14:59,614 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,614 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 566 transitions. [2021-08-26 09:14:59,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-08-26 09:14:59,614 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:59,615 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:59,615 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-08-26 09:14:59,615 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:59,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:59,615 INFO L82 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-08-26 09:14:59,616 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:59,616 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22355740] [2021-08-26 09:14:59,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:59,616 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:59,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,660 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,661 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22355740] [2021-08-26 09:14:59,661 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [22355740] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,661 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,661 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:59,661 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395302090] [2021-08-26 09:14:59,662 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:59,662 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:59,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,663 INFO L87 Difference]: Start difference. First operand 412 states and 566 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:59,707 INFO L93 Difference]: Finished difference Result 842 states and 1171 transitions. [2021-08-26 09:14:59,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:59,708 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-08-26 09:14:59,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:59,709 INFO L225 Difference]: With dead ends: 842 [2021-08-26 09:14:59,710 INFO L226 Difference]: Without dead ends: 578 [2021-08-26 09:14:59,710 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states. [2021-08-26 09:14:59,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 396. [2021-08-26 09:14:59,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 390 states have (on average 1.3846153846153846) internal successors, (540), 395 states have internal predecessors, (540), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 540 transitions. [2021-08-26 09:14:59,724 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 540 transitions. Word has length 71 [2021-08-26 09:14:59,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:59,724 INFO L470 AbstractCegarLoop]: Abstraction has 396 states and 540 transitions. [2021-08-26 09:14:59,724 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,725 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 540 transitions. [2021-08-26 09:14:59,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-08-26 09:14:59,725 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:59,725 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:59,725 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-08-26 09:14:59,726 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:59,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:59,726 INFO L82 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-08-26 09:14:59,726 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:59,726 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267877231] [2021-08-26 09:14:59,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:59,726 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:59,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,790 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,790 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267877231] [2021-08-26 09:14:59,790 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1267877231] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,790 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,790 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:14:59,790 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522472966] [2021-08-26 09:14:59,791 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:14:59,791 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,791 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:14:59,791 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,791 INFO L87 Difference]: Start difference. First operand 396 states and 540 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:14:59,824 INFO L93 Difference]: Finished difference Result 711 states and 985 transitions. [2021-08-26 09:14:59,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:14:59,824 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-08-26 09:14:59,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:14:59,826 INFO L225 Difference]: With dead ends: 711 [2021-08-26 09:14:59,826 INFO L226 Difference]: Without dead ends: 476 [2021-08-26 09:14:59,826 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.4ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:14:59,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states. [2021-08-26 09:14:59,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 392. [2021-08-26 09:14:59,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.3772609819121446) internal successors, (533), 391 states have internal predecessors, (533), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 533 transitions. [2021-08-26 09:14:59,839 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 533 transitions. Word has length 71 [2021-08-26 09:14:59,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:14:59,839 INFO L470 AbstractCegarLoop]: Abstraction has 392 states and 533 transitions. [2021-08-26 09:14:59,839 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:14:59,839 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 533 transitions. [2021-08-26 09:14:59,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-08-26 09:14:59,840 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:14:59,840 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:14:59,840 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-08-26 09:14:59,840 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:14:59,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:14:59,841 INFO L82 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-08-26 09:14:59,841 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:14:59,841 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574799627] [2021-08-26 09:14:59,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:14:59,841 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:14:59,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:14:59,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:14:59,909 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:14:59,909 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574799627] [2021-08-26 09:14:59,909 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1574799627] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:14:59,909 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:14:59,909 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-08-26 09:14:59,910 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130580912] [2021-08-26 09:14:59,910 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-08-26 09:14:59,910 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:14:59,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-08-26 09:14:59,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-08-26 09:14:59,911 INFO L87 Difference]: Start difference. First operand 392 states and 533 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:00,127 INFO L93 Difference]: Finished difference Result 1356 states and 1856 transitions. [2021-08-26 09:15:00,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:00,127 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-08-26 09:15:00,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:00,130 INFO L225 Difference]: With dead ends: 1356 [2021-08-26 09:15:00,130 INFO L226 Difference]: Without dead ends: 1107 [2021-08-26 09:15:00,133 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 59.4ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-08-26 09:15:00,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-08-26 09:15:00,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 420. [2021-08-26 09:15:00,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 415 states have (on average 1.3614457831325302) internal successors, (565), 419 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 565 transitions. [2021-08-26 09:15:00,150 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 565 transitions. Word has length 74 [2021-08-26 09:15:00,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:00,150 INFO L470 AbstractCegarLoop]: Abstraction has 420 states and 565 transitions. [2021-08-26 09:15:00,151 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,151 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 565 transitions. [2021-08-26 09:15:00,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-08-26 09:15:00,151 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,151 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,152 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-08-26 09:15:00,152 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-08-26 09:15:00,152 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,154 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658063643] [2021-08-26 09:15:00,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,154 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,194 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,194 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658063643] [2021-08-26 09:15:00,195 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [658063643] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,195 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,196 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:00,196 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986783251] [2021-08-26 09:15:00,196 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:00,196 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,197 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:00,197 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:00,197 INFO L87 Difference]: Start difference. First operand 420 states and 565 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:00,291 INFO L93 Difference]: Finished difference Result 1083 states and 1467 transitions. [2021-08-26 09:15:00,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:00,292 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-08-26 09:15:00,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:00,294 INFO L225 Difference]: With dead ends: 1083 [2021-08-26 09:15:00,294 INFO L226 Difference]: Without dead ends: 828 [2021-08-26 09:15:00,295 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:00,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 828 states. [2021-08-26 09:15:00,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 828 to 633. [2021-08-26 09:15:00,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 633 states, 628 states have (on average 1.3423566878980893) internal successors, (843), 632 states have internal predecessors, (843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 843 transitions. [2021-08-26 09:15:00,318 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 843 transitions. Word has length 74 [2021-08-26 09:15:00,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:00,318 INFO L470 AbstractCegarLoop]: Abstraction has 633 states and 843 transitions. [2021-08-26 09:15:00,318 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,319 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 843 transitions. [2021-08-26 09:15:00,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-08-26 09:15:00,319 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,319 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,319 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-08-26 09:15:00,320 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-08-26 09:15:00,320 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,320 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070492940] [2021-08-26 09:15:00,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,321 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,389 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,390 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070492940] [2021-08-26 09:15:00,390 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1070492940] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,390 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,390 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:00,390 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602635560] [2021-08-26 09:15:00,390 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:00,391 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,391 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:00,391 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:00,391 INFO L87 Difference]: Start difference. First operand 633 states and 843 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:00,615 INFO L93 Difference]: Finished difference Result 1906 states and 2597 transitions. [2021-08-26 09:15:00,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-08-26 09:15:00,616 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-08-26 09:15:00,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:00,620 INFO L225 Difference]: With dead ends: 1906 [2021-08-26 09:15:00,620 INFO L226 Difference]: Without dead ends: 1540 [2021-08-26 09:15:00,621 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 40.9ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-08-26 09:15:00,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2021-08-26 09:15:00,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 621. [2021-08-26 09:15:00,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 621 states, 616 states have (on average 1.3457792207792207) internal successors, (829), 620 states have internal predecessors, (829), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 829 transitions. [2021-08-26 09:15:00,647 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 829 transitions. Word has length 75 [2021-08-26 09:15:00,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:00,648 INFO L470 AbstractCegarLoop]: Abstraction has 621 states and 829 transitions. [2021-08-26 09:15:00,648 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,648 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 829 transitions. [2021-08-26 09:15:00,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-08-26 09:15:00,649 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,649 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,649 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-08-26 09:15:00,649 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,649 INFO L82 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-08-26 09:15:00,650 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,650 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665390555] [2021-08-26 09:15:00,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,650 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,700 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,700 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665390555] [2021-08-26 09:15:00,700 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [665390555] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,700 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,700 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:00,700 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1225242388] [2021-08-26 09:15:00,701 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:00,701 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:00,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:00,701 INFO L87 Difference]: Start difference. First operand 621 states and 829 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:00,814 INFO L93 Difference]: Finished difference Result 973 states and 1316 transitions. [2021-08-26 09:15:00,814 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-08-26 09:15:00,815 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-08-26 09:15:00,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:00,817 INFO L225 Difference]: With dead ends: 973 [2021-08-26 09:15:00,817 INFO L226 Difference]: Without dead ends: 971 [2021-08-26 09:15:00,818 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 31.4ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-08-26 09:15:00,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 971 states. [2021-08-26 09:15:00,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 971 to 623. [2021-08-26 09:15:00,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 623 states, 618 states have (on average 1.3446601941747574) internal successors, (831), 622 states have internal predecessors, (831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 831 transitions. [2021-08-26 09:15:00,852 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 831 transitions. Word has length 75 [2021-08-26 09:15:00,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:00,853 INFO L470 AbstractCegarLoop]: Abstraction has 623 states and 831 transitions. [2021-08-26 09:15:00,853 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,853 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 831 transitions. [2021-08-26 09:15:00,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-08-26 09:15:00,854 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,854 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,854 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-08-26 09:15:00,854 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,855 INFO L82 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-08-26 09:15:00,855 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,855 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33508554] [2021-08-26 09:15:00,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,855 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,920 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,921 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33508554] [2021-08-26 09:15:00,921 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [33508554] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,921 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,921 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:00,921 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1262421305] [2021-08-26 09:15:00,922 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:00,922 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,922 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:00,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:00,923 INFO L87 Difference]: Start difference. First operand 623 states and 831 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,030 INFO L93 Difference]: Finished difference Result 1470 states and 2033 transitions. [2021-08-26 09:15:01,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:01,030 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-08-26 09:15:01,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,033 INFO L225 Difference]: With dead ends: 1470 [2021-08-26 09:15:01,033 INFO L226 Difference]: Without dead ends: 1102 [2021-08-26 09:15:01,034 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 28.2ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-08-26 09:15:01,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states. [2021-08-26 09:15:01,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 629. [2021-08-26 09:15:01,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 629 states, 624 states have (on average 1.3413461538461537) internal successors, (837), 628 states have internal predecessors, (837), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 629 states to 629 states and 837 transitions. [2021-08-26 09:15:01,060 INFO L78 Accepts]: Start accepts. Automaton has 629 states and 837 transitions. Word has length 76 [2021-08-26 09:15:01,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,060 INFO L470 AbstractCegarLoop]: Abstraction has 629 states and 837 transitions. [2021-08-26 09:15:01,060 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,061 INFO L276 IsEmpty]: Start isEmpty. Operand 629 states and 837 transitions. [2021-08-26 09:15:01,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-08-26 09:15:01,061 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,061 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,061 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-08-26 09:15:01,062 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,062 INFO L82 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-08-26 09:15:01,062 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,063 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081016647] [2021-08-26 09:15:01,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,063 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,107 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,107 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081016647] [2021-08-26 09:15:01,107 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2081016647] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,107 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,107 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:01,107 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761447902] [2021-08-26 09:15:01,108 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:01,108 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,108 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:01,108 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:01,108 INFO L87 Difference]: Start difference. First operand 629 states and 837 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,207 INFO L93 Difference]: Finished difference Result 1467 states and 1956 transitions. [2021-08-26 09:15:01,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:01,208 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-08-26 09:15:01,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,210 INFO L225 Difference]: With dead ends: 1467 [2021-08-26 09:15:01,210 INFO L226 Difference]: Without dead ends: 1075 [2021-08-26 09:15:01,211 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:01,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1075 states. [2021-08-26 09:15:01,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1075 to 819. [2021-08-26 09:15:01,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 819 states, 814 states have (on average 1.3329238329238329) internal successors, (1085), 818 states have internal predecessors, (1085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 819 states to 819 states and 1085 transitions. [2021-08-26 09:15:01,253 INFO L78 Accepts]: Start accepts. Automaton has 819 states and 1085 transitions. Word has length 76 [2021-08-26 09:15:01,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,253 INFO L470 AbstractCegarLoop]: Abstraction has 819 states and 1085 transitions. [2021-08-26 09:15:01,253 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,253 INFO L276 IsEmpty]: Start isEmpty. Operand 819 states and 1085 transitions. [2021-08-26 09:15:01,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-08-26 09:15:01,254 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,254 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,254 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-08-26 09:15:01,255 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,256 INFO L82 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-08-26 09:15:01,256 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,256 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [519537906] [2021-08-26 09:15:01,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,257 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,320 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,320 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [519537906] [2021-08-26 09:15:01,321 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [519537906] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,321 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,321 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:01,321 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717316934] [2021-08-26 09:15:01,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:01,322 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:01,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:01,323 INFO L87 Difference]: Start difference. First operand 819 states and 1085 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,622 INFO L93 Difference]: Finished difference Result 3152 states and 4196 transitions. [2021-08-26 09:15:01,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:01,623 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-08-26 09:15:01,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,629 INFO L225 Difference]: With dead ends: 3152 [2021-08-26 09:15:01,629 INFO L226 Difference]: Without dead ends: 2633 [2021-08-26 09:15:01,630 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 59.2ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-08-26 09:15:01,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2633 states. [2021-08-26 09:15:01,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2633 to 873. [2021-08-26 09:15:01,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.3283410138248848) internal successors, (1153), 872 states have internal predecessors, (1153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1153 transitions. [2021-08-26 09:15:01,679 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1153 transitions. Word has length 76 [2021-08-26 09:15:01,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,679 INFO L470 AbstractCegarLoop]: Abstraction has 873 states and 1153 transitions. [2021-08-26 09:15:01,679 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,679 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1153 transitions. [2021-08-26 09:15:01,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-08-26 09:15:01,680 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,680 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,680 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-08-26 09:15:01,681 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,681 INFO L82 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-08-26 09:15:01,681 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,681 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076341522] [2021-08-26 09:15:01,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,682 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,717 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,717 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1076341522] [2021-08-26 09:15:01,717 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1076341522] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,718 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,718 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:01,718 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853161966] [2021-08-26 09:15:01,718 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:01,718 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:01,719 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:01,719 INFO L87 Difference]: Start difference. First operand 873 states and 1153 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,843 INFO L93 Difference]: Finished difference Result 2259 states and 2989 transitions. [2021-08-26 09:15:01,844 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:01,844 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-08-26 09:15:01,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,849 INFO L225 Difference]: With dead ends: 2259 [2021-08-26 09:15:01,849 INFO L226 Difference]: Without dead ends: 1687 [2021-08-26 09:15:01,850 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.8ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:01,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1687 states. [2021-08-26 09:15:01,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1687 to 1214. [2021-08-26 09:15:01,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1214 states, 1209 states have (on average 1.315963606286187) internal successors, (1591), 1213 states have internal predecessors, (1591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1214 states to 1214 states and 1591 transitions. [2021-08-26 09:15:01,903 INFO L78 Accepts]: Start accepts. Automaton has 1214 states and 1591 transitions. Word has length 77 [2021-08-26 09:15:01,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,903 INFO L470 AbstractCegarLoop]: Abstraction has 1214 states and 1591 transitions. [2021-08-26 09:15:01,903 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,903 INFO L276 IsEmpty]: Start isEmpty. Operand 1214 states and 1591 transitions. [2021-08-26 09:15:01,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-08-26 09:15:01,904 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,904 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,904 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-08-26 09:15:01,904 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,905 INFO L82 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-08-26 09:15:01,905 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,905 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [574048134] [2021-08-26 09:15:01,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,905 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,928 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,928 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [574048134] [2021-08-26 09:15:01,928 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [574048134] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,928 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,928 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:01,928 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495440049] [2021-08-26 09:15:01,929 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:01,929 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,929 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:01,929 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:01,929 INFO L87 Difference]: Start difference. First operand 1214 states and 1591 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,086 INFO L93 Difference]: Finished difference Result 2970 states and 3890 transitions. [2021-08-26 09:15:02,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,086 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-08-26 09:15:02,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,092 INFO L225 Difference]: With dead ends: 2970 [2021-08-26 09:15:02,092 INFO L226 Difference]: Without dead ends: 2014 [2021-08-26 09:15:02,093 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.5ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2014 states. [2021-08-26 09:15:02,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2014 to 1216. [2021-08-26 09:15:02,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1216 states, 1211 states have (on average 1.3154417836498762) internal successors, (1593), 1215 states have internal predecessors, (1593), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1216 states to 1216 states and 1593 transitions. [2021-08-26 09:15:02,151 INFO L78 Accepts]: Start accepts. Automaton has 1216 states and 1593 transitions. Word has length 78 [2021-08-26 09:15:02,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,151 INFO L470 AbstractCegarLoop]: Abstraction has 1216 states and 1593 transitions. [2021-08-26 09:15:02,151 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,151 INFO L276 IsEmpty]: Start isEmpty. Operand 1216 states and 1593 transitions. [2021-08-26 09:15:02,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-08-26 09:15:02,152 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,152 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,153 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-08-26 09:15:02,153 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,153 INFO L82 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-08-26 09:15:02,153 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,153 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807393414] [2021-08-26 09:15:02,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,154 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,197 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,198 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807393414] [2021-08-26 09:15:02,198 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [807393414] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,198 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,198 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:02,198 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1991838794] [2021-08-26 09:15:02,198 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:02,198 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:02,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:02,199 INFO L87 Difference]: Start difference. First operand 1216 states and 1593 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,310 INFO L93 Difference]: Finished difference Result 2522 states and 3298 transitions. [2021-08-26 09:15:02,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:02,311 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-08-26 09:15:02,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,314 INFO L225 Difference]: With dead ends: 2522 [2021-08-26 09:15:02,314 INFO L226 Difference]: Without dead ends: 1378 [2021-08-26 09:15:02,316 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 13.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:02,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1378 states. [2021-08-26 09:15:02,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1378 to 1021. [2021-08-26 09:15:02,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1021 states, 1016 states have (on average 1.3080708661417322) internal successors, (1329), 1020 states have internal predecessors, (1329), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1021 states to 1021 states and 1329 transitions. [2021-08-26 09:15:02,369 INFO L78 Accepts]: Start accepts. Automaton has 1021 states and 1329 transitions. Word has length 79 [2021-08-26 09:15:02,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,369 INFO L470 AbstractCegarLoop]: Abstraction has 1021 states and 1329 transitions. [2021-08-26 09:15:02,369 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,370 INFO L276 IsEmpty]: Start isEmpty. Operand 1021 states and 1329 transitions. [2021-08-26 09:15:02,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-08-26 09:15:02,370 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,370 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,370 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-08-26 09:15:02,371 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-08-26 09:15:02,371 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,371 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954865050] [2021-08-26 09:15:02,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,372 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,397 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,397 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [954865050] [2021-08-26 09:15:02,398 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [954865050] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,398 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,398 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:02,398 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1087888422] [2021-08-26 09:15:02,398 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:02,398 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,399 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:02,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,399 INFO L87 Difference]: Start difference. First operand 1021 states and 1329 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,567 INFO L93 Difference]: Finished difference Result 2417 states and 3163 transitions. [2021-08-26 09:15:02,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,567 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-08-26 09:15:02,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,571 INFO L225 Difference]: With dead ends: 2417 [2021-08-26 09:15:02,571 INFO L226 Difference]: Without dead ends: 1539 [2021-08-26 09:15:02,572 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1539 states. [2021-08-26 09:15:02,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1539 to 1027. [2021-08-26 09:15:02,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1027 states, 1022 states have (on average 1.3062622309197651) internal successors, (1335), 1026 states have internal predecessors, (1335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1027 states to 1027 states and 1335 transitions. [2021-08-26 09:15:02,636 INFO L78 Accepts]: Start accepts. Automaton has 1027 states and 1335 transitions. Word has length 80 [2021-08-26 09:15:02,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,636 INFO L470 AbstractCegarLoop]: Abstraction has 1027 states and 1335 transitions. [2021-08-26 09:15:02,636 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,636 INFO L276 IsEmpty]: Start isEmpty. Operand 1027 states and 1335 transitions. [2021-08-26 09:15:02,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-08-26 09:15:02,637 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,637 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,637 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-08-26 09:15:02,637 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-08-26 09:15:02,638 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,638 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566234314] [2021-08-26 09:15:02,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,638 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,677 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,677 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566234314] [2021-08-26 09:15:02,677 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566234314] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,678 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,678 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:02,678 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588221583] [2021-08-26 09:15:02,678 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:02,678 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:02,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:02,679 INFO L87 Difference]: Start difference. First operand 1027 states and 1335 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,773 INFO L93 Difference]: Finished difference Result 2370 states and 3088 transitions. [2021-08-26 09:15:02,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:02,773 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-08-26 09:15:02,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,777 INFO L225 Difference]: With dead ends: 2370 [2021-08-26 09:15:02,777 INFO L226 Difference]: Without dead ends: 1438 [2021-08-26 09:15:02,778 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 12.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:02,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1438 states. [2021-08-26 09:15:02,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1438 to 969. [2021-08-26 09:15:02,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.299792531120332) internal successors, (1253), 968 states have internal predecessors, (1253), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1253 transitions. [2021-08-26 09:15:02,844 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1253 transitions. Word has length 80 [2021-08-26 09:15:02,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,844 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1253 transitions. [2021-08-26 09:15:02,844 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,844 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1253 transitions. [2021-08-26 09:15:02,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2021-08-26 09:15:02,846 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,846 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,846 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-08-26 09:15:02,846 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,847 INFO L82 PathProgramCache]: Analyzing trace with hash -1625709510, now seen corresponding path program 1 times [2021-08-26 09:15:02,847 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,847 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980612268] [2021-08-26 09:15:02,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,847 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,935 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,935 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,936 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980612268] [2021-08-26 09:15:02,936 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1980612268] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:02,936 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [341832887] [2021-08-26 09:15:02,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,936 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:02,936 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:02,940 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:02,984 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-08-26 09:15:03,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:03,135 INFO L263 TraceCheckSpWp]: Trace formula consists of 715 conjuncts, 8 conjunts are in the unsatisfiable core [2021-08-26 09:15:03,141 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:03,575 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-08-26 09:15:03,576 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [341832887] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:03,576 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-08-26 09:15:03,576 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-08-26 09:15:03,576 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065508511] [2021-08-26 09:15:03,577 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:03,577 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:03,577 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:03,577 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-08-26 09:15:03,578 INFO L87 Difference]: Start difference. First operand 969 states and 1253 transitions. Second operand has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:03,818 INFO L93 Difference]: Finished difference Result 2494 states and 3326 transitions. [2021-08-26 09:15:03,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:03,821 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 126 [2021-08-26 09:15:03,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:03,825 INFO L225 Difference]: With dead ends: 2494 [2021-08-26 09:15:03,828 INFO L226 Difference]: Without dead ends: 1704 [2021-08-26 09:15:03,829 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 85.6ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-08-26 09:15:03,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1704 states. [2021-08-26 09:15:03,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1704 to 969. [2021-08-26 09:15:03,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.2987551867219918) internal successors, (1252), 968 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1252 transitions. [2021-08-26 09:15:03,910 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1252 transitions. Word has length 126 [2021-08-26 09:15:03,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:03,910 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1252 transitions. [2021-08-26 09:15:03,910 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,910 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1252 transitions. [2021-08-26 09:15:03,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-08-26 09:15:03,912 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:03,912 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:03,932 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:04,128 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-08-26 09:15:04,129 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:04,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:04,129 INFO L82 PathProgramCache]: Analyzing trace with hash 652850677, now seen corresponding path program 1 times [2021-08-26 09:15:04,129 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:04,129 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708546199] [2021-08-26 09:15:04,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:04,130 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:04,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:04,217 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:04,217 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:04,218 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708546199] [2021-08-26 09:15:04,218 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708546199] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:04,218 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1009704787] [2021-08-26 09:15:04,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:04,218 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:04,218 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:04,219 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:04,229 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-08-26 09:15:04,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:04,437 INFO L263 TraceCheckSpWp]: Trace formula consists of 729 conjuncts, 14 conjunts are in the unsatisfiable core [2021-08-26 09:15:04,443 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:04,858 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:04,859 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1009704787] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:04,859 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:04,859 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-08-26 09:15:04,859 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476912690] [2021-08-26 09:15:04,859 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-08-26 09:15:04,860 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:04,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-08-26 09:15:04,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-08-26 09:15:04,864 INFO L87 Difference]: Start difference. First operand 969 states and 1252 transitions. Second operand has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:12,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:12,690 INFO L93 Difference]: Finished difference Result 16611 states and 22057 transitions. [2021-08-26 09:15:12,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-08-26 09:15:12,691 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-08-26 09:15:12,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:12,717 INFO L225 Difference]: With dead ends: 16611 [2021-08-26 09:15:12,717 INFO L226 Difference]: Without dead ends: 15827 [2021-08-26 09:15:12,735 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 222 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 4435.1ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-08-26 09:15:12,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15827 states. [2021-08-26 09:15:12,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15827 to 2668. [2021-08-26 09:15:12,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2996620352985355) internal successors, (3461), 2667 states have internal predecessors, (3461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:13,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3461 transitions. [2021-08-26 09:15:13,001 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3461 transitions. Word has length 130 [2021-08-26 09:15:13,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:13,001 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3461 transitions. [2021-08-26 09:15:13,002 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:13,002 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3461 transitions. [2021-08-26 09:15:13,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-08-26 09:15:13,005 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:13,005 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:13,025 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:13,212 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-08-26 09:15:13,213 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:13,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:13,213 INFO L82 PathProgramCache]: Analyzing trace with hash 1302889785, now seen corresponding path program 1 times [2021-08-26 09:15:13,213 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:13,213 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98410465] [2021-08-26 09:15:13,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:13,213 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:13,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:13,348 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:13,348 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:13,348 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98410465] [2021-08-26 09:15:13,348 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98410465] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:13,348 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [395867313] [2021-08-26 09:15:13,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:13,349 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:13,349 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:13,350 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:13,392 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-08-26 09:15:13,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:13,615 INFO L263 TraceCheckSpWp]: Trace formula consists of 781 conjuncts, 14 conjunts are in the unsatisfiable core [2021-08-26 09:15:13,622 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:13,969 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:13,969 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [395867313] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:13,969 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:13,969 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-08-26 09:15:13,969 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2046222529] [2021-08-26 09:15:13,970 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-08-26 09:15:13,970 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:13,970 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-08-26 09:15:13,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-08-26 09:15:13,970 INFO L87 Difference]: Start difference. First operand 2668 states and 3461 transitions. Second operand has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:14,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:14,786 INFO L93 Difference]: Finished difference Result 9437 states and 12657 transitions. [2021-08-26 09:15:14,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-08-26 09:15:14,788 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-08-26 09:15:14,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:14,807 INFO L225 Difference]: With dead ends: 9437 [2021-08-26 09:15:14,807 INFO L226 Difference]: Without dead ends: 6988 [2021-08-26 09:15:14,812 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 141 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 129.8ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-08-26 09:15:14,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6988 states. [2021-08-26 09:15:15,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6988 to 2251. [2021-08-26 09:15:15,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2251 states, 2246 states have (on average 1.2943009795191451) internal successors, (2907), 2250 states have internal predecessors, (2907), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:15,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2251 states to 2251 states and 2907 transitions. [2021-08-26 09:15:15,032 INFO L78 Accepts]: Start accepts. Automaton has 2251 states and 2907 transitions. Word has length 131 [2021-08-26 09:15:15,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:15,032 INFO L470 AbstractCegarLoop]: Abstraction has 2251 states and 2907 transitions. [2021-08-26 09:15:15,032 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:15,032 INFO L276 IsEmpty]: Start isEmpty. Operand 2251 states and 2907 transitions. [2021-08-26 09:15:15,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-08-26 09:15:15,036 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:15,036 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:15,059 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:15,241 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-08-26 09:15:15,241 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:15,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:15,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1342385059, now seen corresponding path program 1 times [2021-08-26 09:15:15,241 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:15,242 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091121266] [2021-08-26 09:15:15,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:15,242 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:15,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:15,341 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-08-26 09:15:15,341 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:15,341 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091121266] [2021-08-26 09:15:15,341 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091121266] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:15,342 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:15,342 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-08-26 09:15:15,342 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999596071] [2021-08-26 09:15:15,342 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-08-26 09:15:15,343 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:15,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-08-26 09:15:15,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-08-26 09:15:15,343 INFO L87 Difference]: Start difference. First operand 2251 states and 2907 transitions. Second operand has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:16,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:16,463 INFO L93 Difference]: Finished difference Result 12947 states and 17105 transitions. [2021-08-26 09:15:16,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-08-26 09:15:16,463 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-08-26 09:15:16,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:16,476 INFO L225 Difference]: With dead ends: 12947 [2021-08-26 09:15:16,477 INFO L226 Difference]: Without dead ends: 10935 [2021-08-26 09:15:16,479 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 125.5ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-08-26 09:15:16,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10935 states. [2021-08-26 09:15:16,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10935 to 2671. [2021-08-26 09:15:16,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2768192048012004) internal successors, (3404), 2670 states have internal predecessors, (3404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:16,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3404 transitions. [2021-08-26 09:15:16,702 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3404 transitions. Word has length 132 [2021-08-26 09:15:16,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:16,702 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3404 transitions. [2021-08-26 09:15:16,702 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:16,703 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3404 transitions. [2021-08-26 09:15:16,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-08-26 09:15:16,706 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:16,707 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:16,707 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-08-26 09:15:16,708 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:16,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:16,708 INFO L82 PathProgramCache]: Analyzing trace with hash 2020329826, now seen corresponding path program 1 times [2021-08-26 09:15:16,709 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:16,709 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662401213] [2021-08-26 09:15:16,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:16,709 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:16,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:16,791 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-08-26 09:15:16,791 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:16,791 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662401213] [2021-08-26 09:15:16,791 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [662401213] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:16,791 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:16,791 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:16,791 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092163054] [2021-08-26 09:15:16,792 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:16,792 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:16,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:16,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:16,793 INFO L87 Difference]: Start difference. First operand 2671 states and 3404 transitions. Second operand has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:17,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:17,361 INFO L93 Difference]: Finished difference Result 8601 states and 11289 transitions. [2021-08-26 09:15:17,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:17,362 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-08-26 09:15:17,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:17,370 INFO L225 Difference]: With dead ends: 8601 [2021-08-26 09:15:17,371 INFO L226 Difference]: Without dead ends: 6109 [2021-08-26 09:15:17,374 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 42.0ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-08-26 09:15:17,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6109 states. [2021-08-26 09:15:17,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6109 to 2671. [2021-08-26 09:15:17,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.275318829707427) internal successors, (3400), 2670 states have internal predecessors, (3400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:17,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3400 transitions. [2021-08-26 09:15:17,669 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3400 transitions. Word has length 133 [2021-08-26 09:15:17,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:17,670 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3400 transitions. [2021-08-26 09:15:17,670 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:17,670 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3400 transitions. [2021-08-26 09:15:17,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-08-26 09:15:17,673 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:17,673 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:17,673 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-08-26 09:15:17,674 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:17,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:17,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1433899619, now seen corresponding path program 1 times [2021-08-26 09:15:17,674 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:17,674 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2297088] [2021-08-26 09:15:17,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:17,675 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:17,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:17,750 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-08-26 09:15:17,750 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:17,750 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2297088] [2021-08-26 09:15:17,750 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2297088] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:17,750 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:17,751 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:17,751 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614756124] [2021-08-26 09:15:17,751 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:17,751 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:17,752 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:17,752 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:17,752 INFO L87 Difference]: Start difference. First operand 2671 states and 3400 transitions. Second operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:18,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:18,290 INFO L93 Difference]: Finished difference Result 7787 states and 10093 transitions. [2021-08-26 09:15:18,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-08-26 09:15:18,290 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 137 [2021-08-26 09:15:18,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:18,295 INFO L225 Difference]: With dead ends: 7787 [2021-08-26 09:15:18,295 INFO L226 Difference]: Without dead ends: 5295 [2021-08-26 09:15:18,297 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 40.3ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-08-26 09:15:18,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5295 states. [2021-08-26 09:15:18,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5295 to 2671. [2021-08-26 09:15:18,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2738184546136535) internal successors, (3396), 2670 states have internal predecessors, (3396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:18,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3396 transitions. [2021-08-26 09:15:18,513 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3396 transitions. Word has length 137 [2021-08-26 09:15:18,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:18,514 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3396 transitions. [2021-08-26 09:15:18,514 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:18,514 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3396 transitions. [2021-08-26 09:15:18,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-08-26 09:15:18,517 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:18,517 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:18,517 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-08-26 09:15:18,518 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:18,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:18,518 INFO L82 PathProgramCache]: Analyzing trace with hash 1119861603, now seen corresponding path program 1 times [2021-08-26 09:15:18,518 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:18,518 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899648234] [2021-08-26 09:15:18,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:18,518 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:18,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:18,572 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-08-26 09:15:18,572 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:18,572 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899648234] [2021-08-26 09:15:18,573 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1899648234] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:18,573 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:18,573 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:18,573 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381877719] [2021-08-26 09:15:18,573 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:18,573 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:18,574 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:18,574 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:18,574 INFO L87 Difference]: Start difference. First operand 2671 states and 3396 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:18,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:18,752 INFO L93 Difference]: Finished difference Result 4373 states and 5591 transitions. [2021-08-26 09:15:18,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-08-26 09:15:18,753 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-08-26 09:15:18,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:18,755 INFO L225 Difference]: With dead ends: 4373 [2021-08-26 09:15:18,755 INFO L226 Difference]: Without dead ends: 1843 [2021-08-26 09:15:18,756 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 6.2ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:18,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1843 states. [2021-08-26 09:15:18,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1843 to 1843. [2021-08-26 09:15:18,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1843 states, 1838 states have (on average 1.2731229597388465) internal successors, (2340), 1842 states have internal predecessors, (2340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:18,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1843 states to 1843 states and 2340 transitions. [2021-08-26 09:15:18,895 INFO L78 Accepts]: Start accepts. Automaton has 1843 states and 2340 transitions. Word has length 140 [2021-08-26 09:15:18,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:18,895 INFO L470 AbstractCegarLoop]: Abstraction has 1843 states and 2340 transitions. [2021-08-26 09:15:18,895 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:18,895 INFO L276 IsEmpty]: Start isEmpty. Operand 1843 states and 2340 transitions. [2021-08-26 09:15:18,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-08-26 09:15:18,898 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:18,898 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:18,898 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-08-26 09:15:18,898 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:18,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:18,899 INFO L82 PathProgramCache]: Analyzing trace with hash 2051408537, now seen corresponding path program 1 times [2021-08-26 09:15:18,899 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:18,899 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180969623] [2021-08-26 09:15:18,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:18,899 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:18,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:19,022 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:19,023 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:19,023 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180969623] [2021-08-26 09:15:19,023 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [180969623] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:19,023 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [418281750] [2021-08-26 09:15:19,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:19,023 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:19,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:19,024 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:19,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-08-26 09:15:19,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:19,322 INFO L263 TraceCheckSpWp]: Trace formula consists of 808 conjuncts, 49 conjunts are in the unsatisfiable core [2021-08-26 09:15:19,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:20,781 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:20,782 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [418281750] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:20,782 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:20,782 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2021-08-26 09:15:20,782 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912926675] [2021-08-26 09:15:20,782 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2021-08-26 09:15:20,782 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:20,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-08-26 09:15:20,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=344, Unknown=0, NotChecked=0, Total=420 [2021-08-26 09:15:20,784 INFO L87 Difference]: Start difference. First operand 1843 states and 2340 transitions. Second operand has 21 states, 21 states have (on average 10.428571428571429) internal successors, (219), 20 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:22,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:22,381 INFO L93 Difference]: Finished difference Result 4482 states and 5733 transitions. [2021-08-26 09:15:22,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2021-08-26 09:15:22,381 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 10.428571428571429) internal successors, (219), 20 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-08-26 09:15:22,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:22,384 INFO L225 Difference]: With dead ends: 4482 [2021-08-26 09:15:22,384 INFO L226 Difference]: Without dead ends: 2828 [2021-08-26 09:15:22,387 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 127 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 591.7ms TimeCoverageRelationStatistics Valid=394, Invalid=1768, Unknown=0, NotChecked=0, Total=2162 [2021-08-26 09:15:22,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2828 states. [2021-08-26 09:15:22,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2828 to 2098. [2021-08-26 09:15:22,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2098 states, 2093 states have (on average 1.2694696607740086) internal successors, (2657), 2097 states have internal predecessors, (2657), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:22,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2098 states to 2098 states and 2657 transitions. [2021-08-26 09:15:22,591 INFO L78 Accepts]: Start accepts. Automaton has 2098 states and 2657 transitions. Word has length 140 [2021-08-26 09:15:22,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:22,591 INFO L470 AbstractCegarLoop]: Abstraction has 2098 states and 2657 transitions. [2021-08-26 09:15:22,592 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 10.428571428571429) internal successors, (219), 20 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:22,592 INFO L276 IsEmpty]: Start isEmpty. Operand 2098 states and 2657 transitions. [2021-08-26 09:15:22,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-08-26 09:15:22,594 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:22,595 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:22,615 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:22,808 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:22,809 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:22,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:22,809 INFO L82 PathProgramCache]: Analyzing trace with hash -90451941, now seen corresponding path program 1 times [2021-08-26 09:15:22,809 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:22,809 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518129662] [2021-08-26 09:15:22,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:22,809 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:22,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:22,877 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-08-26 09:15:22,877 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:22,877 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518129662] [2021-08-26 09:15:22,877 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1518129662] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:22,877 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:22,878 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:22,878 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655805013] [2021-08-26 09:15:22,878 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-08-26 09:15:22,878 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:22,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-26 09:15:22,881 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:22,881 INFO L87 Difference]: Start difference. First operand 2098 states and 2657 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:23,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:23,101 INFO L93 Difference]: Finished difference Result 3937 states and 5024 transitions. [2021-08-26 09:15:23,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:23,101 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-08-26 09:15:23,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:23,103 INFO L225 Difference]: With dead ends: 3937 [2021-08-26 09:15:23,103 INFO L226 Difference]: Without dead ends: 1969 [2021-08-26 09:15:23,105 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 9.3ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:23,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1969 states. [2021-08-26 09:15:23,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1969 to 1969. [2021-08-26 09:15:23,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1969 states, 1964 states have (on average 1.2724032586558045) internal successors, (2499), 1968 states have internal predecessors, (2499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:23,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1969 states to 1969 states and 2499 transitions. [2021-08-26 09:15:23,290 INFO L78 Accepts]: Start accepts. Automaton has 1969 states and 2499 transitions. Word has length 140 [2021-08-26 09:15:23,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:23,290 INFO L470 AbstractCegarLoop]: Abstraction has 1969 states and 2499 transitions. [2021-08-26 09:15:23,291 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:23,291 INFO L276 IsEmpty]: Start isEmpty. Operand 1969 states and 2499 transitions. [2021-08-26 09:15:23,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-08-26 09:15:23,292 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:23,292 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:23,293 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-08-26 09:15:23,293 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:23,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:23,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1205605747, now seen corresponding path program 1 times [2021-08-26 09:15:23,293 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:23,293 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015995633] [2021-08-26 09:15:23,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:23,294 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:23,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:23,416 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:23,416 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:23,416 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015995633] [2021-08-26 09:15:23,416 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1015995633] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:23,417 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2073067302] [2021-08-26 09:15:23,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:23,417 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:23,417 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:23,420 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:23,421 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-08-26 09:15:23,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:23,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 809 conjuncts, 47 conjunts are in the unsatisfiable core [2021-08-26 09:15:23,884 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:25,147 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:25,147 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2073067302] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:25,147 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:25,148 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2021-08-26 09:15:25,148 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448880676] [2021-08-26 09:15:25,148 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2021-08-26 09:15:25,148 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:25,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-08-26 09:15:25,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2021-08-26 09:15:25,149 INFO L87 Difference]: Start difference. First operand 1969 states and 2499 transitions. Second operand has 21 states, 21 states have (on average 10.857142857142858) internal successors, (228), 20 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:26,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:26,953 INFO L93 Difference]: Finished difference Result 5326 states and 6762 transitions. [2021-08-26 09:15:26,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2021-08-26 09:15:26,955 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 10.857142857142858) internal successors, (228), 20 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-08-26 09:15:26,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:26,959 INFO L225 Difference]: With dead ends: 5326 [2021-08-26 09:15:26,959 INFO L226 Difference]: Without dead ends: 3546 [2021-08-26 09:15:26,962 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 128 SyntacticMatches, 3 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 995 ImplicationChecksByTransitivity, 924.3ms TimeCoverageRelationStatistics Valid=649, Invalid=3133, Unknown=0, NotChecked=0, Total=3782 [2021-08-26 09:15:26,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3546 states. [2021-08-26 09:15:27,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3546 to 2223. [2021-08-26 09:15:27,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2223 states, 2218 states have (on average 1.2664562669071235) internal successors, (2809), 2222 states have internal predecessors, (2809), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:27,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2223 states to 2223 states and 2809 transitions. [2021-08-26 09:15:27,177 INFO L78 Accepts]: Start accepts. Automaton has 2223 states and 2809 transitions. Word has length 141 [2021-08-26 09:15:27,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:27,178 INFO L470 AbstractCegarLoop]: Abstraction has 2223 states and 2809 transitions. [2021-08-26 09:15:27,178 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 10.857142857142858) internal successors, (228), 20 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:27,178 INFO L276 IsEmpty]: Start isEmpty. Operand 2223 states and 2809 transitions. [2021-08-26 09:15:27,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-08-26 09:15:27,180 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:27,180 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:27,199 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2021-08-26 09:15:27,396 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2021-08-26 09:15:27,397 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:27,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:27,397 INFO L82 PathProgramCache]: Analyzing trace with hash 582324145, now seen corresponding path program 1 times [2021-08-26 09:15:27,397 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:27,397 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509861366] [2021-08-26 09:15:27,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:27,397 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:27,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:27,450 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-08-26 09:15:27,450 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:27,450 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509861366] [2021-08-26 09:15:27,451 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [509861366] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:27,451 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:27,451 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:27,451 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240736425] [2021-08-26 09:15:27,452 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:27,452 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:27,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:27,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:27,453 INFO L87 Difference]: Start difference. First operand 2223 states and 2809 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:27,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:27,670 INFO L93 Difference]: Finished difference Result 4092 states and 5204 transitions. [2021-08-26 09:15:27,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-08-26 09:15:27,671 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-08-26 09:15:27,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:27,673 INFO L225 Difference]: With dead ends: 4092 [2021-08-26 09:15:27,673 INFO L226 Difference]: Without dead ends: 2001 [2021-08-26 09:15:27,675 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.5ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:27,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2001 states. [2021-08-26 09:15:27,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2001 to 1993. [2021-08-26 09:15:27,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1993 states, 1988 states have (on average 1.2640845070422535) internal successors, (2513), 1992 states have internal predecessors, (2513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:27,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1993 states to 1993 states and 2513 transitions. [2021-08-26 09:15:27,854 INFO L78 Accepts]: Start accepts. Automaton has 1993 states and 2513 transitions. Word has length 141 [2021-08-26 09:15:27,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:27,854 INFO L470 AbstractCegarLoop]: Abstraction has 1993 states and 2513 transitions. [2021-08-26 09:15:27,855 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:27,855 INFO L276 IsEmpty]: Start isEmpty. Operand 1993 states and 2513 transitions. [2021-08-26 09:15:27,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-08-26 09:15:27,856 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:27,856 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:27,857 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-08-26 09:15:27,857 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:27,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:27,857 INFO L82 PathProgramCache]: Analyzing trace with hash 689093620, now seen corresponding path program 1 times [2021-08-26 09:15:27,857 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:27,857 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556649242] [2021-08-26 09:15:27,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:27,858 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:27,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-26 09:15:27,913 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-26 09:15:27,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-26 09:15:28,025 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-26 09:15:28,026 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-08-26 09:15:28,027 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,028 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,028 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,028 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,028 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,028 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,029 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,029 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,029 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,029 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,029 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,029 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,030 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,030 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,030 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,030 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,030 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:28,031 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-08-26 09:15:28,037 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-08-26 09:15:28,186 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.08 09:15:28 BoogieIcfgContainer [2021-08-26 09:15:28,186 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-08-26 09:15:28,187 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-08-26 09:15:28,187 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-08-26 09:15:28,187 INFO L275 PluginConnector]: Witness Printer initialized [2021-08-26 09:15:28,187 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.08 09:14:57" (3/4) ... [2021-08-26 09:15:28,188 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-08-26 09:15:28,319 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2021-08-26 09:15:28,320 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-08-26 09:15:28,324 INFO L168 Benchmark]: Toolchain (without parser) took 32167.57 ms. Allocated memory was 60.8 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 41.3 MB in the beginning and 473.8 MB in the end (delta: -432.6 MB). Peak memory consumption was 683.2 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,324 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 60.8 MB. Free memory is still 43.3 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-08-26 09:15:28,325 INFO L168 Benchmark]: CACSL2BoogieTranslator took 298.25 ms. Allocated memory is still 60.8 MB. Free memory was 41.1 MB in the beginning and 40.4 MB in the end (delta: 740.4 kB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,325 INFO L168 Benchmark]: Boogie Procedure Inliner took 52.79 ms. Allocated memory is still 60.8 MB. Free memory was 40.2 MB in the beginning and 35.5 MB in the end (delta: 4.7 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,325 INFO L168 Benchmark]: Boogie Preprocessor took 39.11 ms. Allocated memory is still 60.8 MB. Free memory was 35.5 MB in the beginning and 32.1 MB in the end (delta: 3.4 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,326 INFO L168 Benchmark]: RCFGBuilder took 841.39 ms. Allocated memory was 60.8 MB in the beginning and 81.8 MB in the end (delta: 21.0 MB). Free memory was 32.1 MB in the beginning and 55.6 MB in the end (delta: -23.5 MB). Peak memory consumption was 21.9 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,326 INFO L168 Benchmark]: TraceAbstraction took 30798.13 ms. Allocated memory was 81.8 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 55.1 MB in the beginning and 521.0 MB in the end (delta: -466.0 MB). Peak memory consumption was 628.2 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,326 INFO L168 Benchmark]: Witness Printer took 133.06 ms. Allocated memory is still 1.2 GB. Free memory was 521.0 MB in the beginning and 473.8 MB in the end (delta: 47.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:28,329 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 60.8 MB. Free memory is still 43.3 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 298.25 ms. Allocated memory is still 60.8 MB. Free memory was 41.1 MB in the beginning and 40.4 MB in the end (delta: 740.4 kB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 52.79 ms. Allocated memory is still 60.8 MB. Free memory was 40.2 MB in the beginning and 35.5 MB in the end (delta: 4.7 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 39.11 ms. Allocated memory is still 60.8 MB. Free memory was 35.5 MB in the beginning and 32.1 MB in the end (delta: 3.4 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 841.39 ms. Allocated memory was 60.8 MB in the beginning and 81.8 MB in the end (delta: 21.0 MB). Free memory was 32.1 MB in the beginning and 55.6 MB in the end (delta: -23.5 MB). Peak memory consumption was 21.9 MB. Max. memory is 16.1 GB. * TraceAbstraction took 30798.13 ms. Allocated memory was 81.8 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 55.1 MB in the beginning and 521.0 MB in the end (delta: -466.0 MB). Peak memory consumption was 628.2 MB. Max. memory is 16.1 GB. * Witness Printer took 133.06 ms. Allocated memory is still 1.2 GB. Free memory was 521.0 MB in the beginning and 473.8 MB in the end (delta: 47.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 612]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; [L413] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L535] int c1 ; [L536] int i2 ; [L539] c1 = 0 [L540] side1Failed = __VERIFIER_nondet_bool() [L541] side2Failed = __VERIFIER_nondet_bool() [L542] side1_written = __VERIFIER_nondet_char() [L543] side2_written = __VERIFIER_nondet_char() [L544] side1Failed_History_0 = __VERIFIER_nondet_bool() [L545] side1Failed_History_1 = __VERIFIER_nondet_bool() [L546] side1Failed_History_2 = __VERIFIER_nondet_bool() [L547] side2Failed_History_0 = __VERIFIER_nondet_bool() [L548] side2Failed_History_1 = __VERIFIER_nondet_bool() [L549] side2Failed_History_2 = __VERIFIER_nondet_bool() [L550] active_side_History_0 = __VERIFIER_nondet_char() [L551] active_side_History_1 = __VERIFIER_nondet_char() [L552] active_side_History_2 = __VERIFIER_nondet_char() [L553] manual_selection_History_0 = __VERIFIER_nondet_char() [L554] manual_selection_History_1 = __VERIFIER_nondet_char() [L555] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L556] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L558] cs1_old = nomsg [L559] cs1_new = nomsg [L560] cs2_old = nomsg [L561] cs2_new = nomsg [L562] s1s2_old = nomsg [L563] s1s2_new = nomsg [L564] s1s1_old = nomsg [L565] s1s1_new = nomsg [L566] s2s1_old = nomsg [L567] s2s1_new = nomsg [L568] s2s2_old = nomsg [L569] s2s2_new = nomsg [L570] s1p_old = nomsg [L571] s1p_new = nomsg [L572] s2p_old = nomsg [L573] s2p_new = nomsg [L574] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L575] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L581] cs1_old = cs1_new [L582] cs1_new = nomsg [L583] cs2_old = cs2_new [L584] cs2_new = nomsg [L585] s1s2_old = s1s2_new [L586] s1s2_new = nomsg [L587] s1s1_old = s1s1_new [L588] s1s1_new = nomsg [L589] s2s1_old = s2s1_new [L590] s2s1_new = nomsg [L591] s2s2_old = s2s2_new [L592] s2s2_new = nomsg [L593] s1p_old = s1p_new [L594] s1p_new = nomsg [L595] s2p_old = s2p_new [L596] s2p_new = nomsg [L416] int tmp ; [L417] msg_t tmp___0 ; [L418] _Bool tmp___1 ; [L419] _Bool tmp___2 ; [L420] _Bool tmp___3 ; [L421] _Bool tmp___4 ; [L422] int8_t tmp___5 ; [L423] _Bool tmp___6 ; [L424] _Bool tmp___7 ; [L425] _Bool tmp___8 ; [L426] int8_t tmp___9 ; [L427] _Bool tmp___10 ; [L428] _Bool tmp___11 ; [L429] _Bool tmp___12 ; [L430] msg_t tmp___13 ; [L431] _Bool tmp___14 ; [L432] _Bool tmp___15 ; [L433] _Bool tmp___16 ; [L434] _Bool tmp___17 ; [L435] int8_t tmp___18 ; [L436] int8_t tmp___19 ; [L437] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L440] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L443] COND TRUE ! side2Failed [L444] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L449] tmp___0 = read_manual_selection_history((unsigned char)1) [L450] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] tmp___1 = read_side1_failed_history((unsigned char)1) [L452] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L453] tmp___2 = read_side1_failed_history((unsigned char)0) [L454] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L479] tmp___7 = read_side1_failed_history((unsigned char)1) [L480] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L495] tmp___11 = read_side1_failed_history((unsigned char)1) [L496] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L497] tmp___12 = read_side2_failed_history((unsigned char)1) [L498] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L511] tmp___20 = read_active_side_history((unsigned char)2) [L512] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L530] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L597] c1 = check() [L610] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L599] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L575] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L581] cs1_old = cs1_new [L582] cs1_new = nomsg [L583] cs2_old = cs2_new [L584] cs2_new = nomsg [L585] s1s2_old = s1s2_new [L586] s1s2_new = nomsg [L587] s1s1_old = s1s1_new [L588] s1s1_new = nomsg [L589] s2s1_old = s2s1_new [L590] s2s1_new = nomsg [L591] s2s2_old = s2s2_new [L592] s2s2_new = nomsg [L593] s1p_old = s1p_new [L594] s1p_new = nomsg [L595] s2p_old = s2p_new [L596] s2p_new = nomsg [L416] int tmp ; [L417] msg_t tmp___0 ; [L418] _Bool tmp___1 ; [L419] _Bool tmp___2 ; [L420] _Bool tmp___3 ; [L421] _Bool tmp___4 ; [L422] int8_t tmp___5 ; [L423] _Bool tmp___6 ; [L424] _Bool tmp___7 ; [L425] _Bool tmp___8 ; [L426] int8_t tmp___9 ; [L427] _Bool tmp___10 ; [L428] _Bool tmp___11 ; [L429] _Bool tmp___12 ; [L430] msg_t tmp___13 ; [L431] _Bool tmp___14 ; [L432] _Bool tmp___15 ; [L433] _Bool tmp___16 ; [L434] _Bool tmp___17 ; [L435] int8_t tmp___18 ; [L436] int8_t tmp___19 ; [L437] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L440] COND TRUE ! side1Failed [L441] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L449] tmp___0 = read_manual_selection_history((unsigned char)1) [L450] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L479] tmp___7 = read_side1_failed_history((unsigned char)1) [L480] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L481] tmp___8 = read_side2_failed_history((unsigned char)1) [L482] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L483] tmp___5 = read_active_side_history((unsigned char)0) [L484] COND TRUE ! ((int )tmp___5 == 2) [L485] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L597] c1 = check() [L610] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L612] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 612]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 295 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 30600.9ms, OverallIterations: 38, TraceHistogramMax: 2, EmptinessCheckTime: 60.2ms, AutomataDifference: 18098.3ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 13.7ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 16863 SDtfs, 38365 SDslu, 45371 SDs, 0 SdLazy, 8189 SolverSat, 609 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4246.4ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1384 GetRequests, 847 SyntacticMatches, 7 SemanticMatches, 530 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30787 ImplicationChecksByTransitivity, 6785.4ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=2671occurred in iteration=30, InterpolantAutomatonStates: 536, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 2921.4ms AutomataMinimizationTime, 37 MinimizatonAttempts, 44595 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 307.2ms SsaConstructionTime, 1139.5ms SatisfiabilityAnalysisTime, 5662.7ms InterpolantComputationTime, 4004 NumberOfCodeBlocks, 4004 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3820 ConstructedInterpolants, 0 QuantifiedInterpolants, 14726 SizeOfPredicates, 36 NumberOfNonLiveVariables, 3842 ConjunctsInSsa, 132 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-08-26 09:15:28,364 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...