./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 20ed64ec Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f6b24c50e3f0cc159b6bbef47993696e36d91e8f ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-20ed64e [2021-08-26 09:14:57,401 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-08-26 09:14:57,404 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-08-26 09:14:57,449 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-08-26 09:14:57,450 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-08-26 09:14:57,453 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-08-26 09:14:57,455 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-08-26 09:14:57,460 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-08-26 09:14:57,463 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-08-26 09:14:57,468 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-08-26 09:14:57,469 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-08-26 09:14:57,473 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-08-26 09:14:57,474 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-08-26 09:14:57,475 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-08-26 09:14:57,477 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-08-26 09:14:57,478 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-08-26 09:14:57,482 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-08-26 09:14:57,482 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-08-26 09:14:57,484 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-08-26 09:14:57,486 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-08-26 09:14:57,490 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-08-26 09:14:57,491 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-08-26 09:14:57,492 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-08-26 09:14:57,494 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-08-26 09:14:57,498 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-08-26 09:14:57,498 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-08-26 09:14:57,498 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-08-26 09:14:57,499 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-08-26 09:14:57,500 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-08-26 09:14:57,501 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-08-26 09:14:57,501 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-08-26 09:14:57,502 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-08-26 09:14:57,503 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-08-26 09:14:57,504 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-08-26 09:14:57,505 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-08-26 09:14:57,505 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-08-26 09:14:57,506 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-08-26 09:14:57,506 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-08-26 09:14:57,506 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-08-26 09:14:57,508 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-08-26 09:14:57,508 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-08-26 09:14:57,509 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-08-26 09:14:57,542 INFO L113 SettingsManager]: Loading preferences was successful [2021-08-26 09:14:57,542 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-08-26 09:14:57,543 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-08-26 09:14:57,544 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-08-26 09:14:57,545 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-08-26 09:14:57,545 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-08-26 09:14:57,546 INFO L138 SettingsManager]: * Use SBE=true [2021-08-26 09:14:57,546 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-08-26 09:14:57,546 INFO L138 SettingsManager]: * sizeof long=4 [2021-08-26 09:14:57,546 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-08-26 09:14:57,547 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-08-26 09:14:57,547 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-08-26 09:14:57,547 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-08-26 09:14:57,547 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-08-26 09:14:57,548 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-08-26 09:14:57,548 INFO L138 SettingsManager]: * sizeof long double=12 [2021-08-26 09:14:57,548 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-08-26 09:14:57,548 INFO L138 SettingsManager]: * Use constant arrays=true [2021-08-26 09:14:57,548 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-08-26 09:14:57,549 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-08-26 09:14:57,549 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-08-26 09:14:57,549 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-08-26 09:14:57,549 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-08-26 09:14:57,557 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-08-26 09:14:57,557 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-08-26 09:14:57,557 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-08-26 09:14:57,557 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-08-26 09:14:57,557 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-08-26 09:14:57,557 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-08-26 09:14:57,558 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-08-26 09:14:57,558 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f6b24c50e3f0cc159b6bbef47993696e36d91e8f [2021-08-26 09:14:57,812 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-08-26 09:14:57,842 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-08-26 09:14:57,844 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-08-26 09:14:57,846 INFO L271 PluginConnector]: Initializing CDTParser... [2021-08-26 09:14:57,847 INFO L275 PluginConnector]: CDTParser initialized [2021-08-26 09:14:57,847 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-08-26 09:14:57,897 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5a67ae1b1/ee69d1b99a714675ae71e8c8a25ae9f2/FLAGceb17cbb8 [2021-08-26 09:14:58,285 INFO L306 CDTParser]: Found 1 translation units. [2021-08-26 09:14:58,299 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-08-26 09:14:58,312 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5a67ae1b1/ee69d1b99a714675ae71e8c8a25ae9f2/FLAGceb17cbb8 [2021-08-26 09:14:58,643 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5a67ae1b1/ee69d1b99a714675ae71e8c8a25ae9f2 [2021-08-26 09:14:58,651 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-08-26 09:14:58,653 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-08-26 09:14:58,654 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-08-26 09:14:58,654 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-08-26 09:14:58,657 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-08-26 09:14:58,658 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:58,660 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@31b95bf0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58, skipping insertion in model container [2021-08-26 09:14:58,660 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:58,666 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-08-26 09:14:58,713 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-08-26 09:14:58,871 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14734,14747] [2021-08-26 09:14:58,906 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-26 09:14:58,915 INFO L203 MainTranslator]: Completed pre-run [2021-08-26 09:14:58,975 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14734,14747] [2021-08-26 09:14:58,976 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-26 09:14:58,994 INFO L208 MainTranslator]: Completed translation [2021-08-26 09:14:58,995 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58 WrapperNode [2021-08-26 09:14:58,995 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-08-26 09:14:58,996 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-08-26 09:14:58,996 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-08-26 09:14:58,996 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-08-26 09:14:59,001 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,012 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,060 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-08-26 09:14:59,061 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-08-26 09:14:59,061 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-08-26 09:14:59,061 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-08-26 09:14:59,068 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,069 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,078 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,079 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,094 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,104 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,108 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,115 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-08-26 09:14:59,116 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-08-26 09:14:59,116 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-08-26 09:14:59,116 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-08-26 09:14:59,117 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (1/1) ... [2021-08-26 09:14:59,122 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-08-26 09:14:59,128 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:14:59,150 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-08-26 09:14:59,162 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-08-26 09:14:59,191 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-08-26 09:14:59,191 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-08-26 09:14:59,191 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-08-26 09:14:59,191 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-08-26 09:15:00,100 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-08-26 09:15:00,100 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-08-26 09:15:00,103 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.08 09:15:00 BoogieIcfgContainer [2021-08-26 09:15:00,103 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-08-26 09:15:00,104 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-08-26 09:15:00,105 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-08-26 09:15:00,107 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-08-26 09:15:00,107 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.08 09:14:58" (1/3) ... [2021-08-26 09:15:00,108 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4c72c945 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.08 09:15:00, skipping insertion in model container [2021-08-26 09:15:00,108 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.08 09:14:58" (2/3) ... [2021-08-26 09:15:00,108 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4c72c945 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.08 09:15:00, skipping insertion in model container [2021-08-26 09:15:00,108 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.08 09:15:00" (3/3) ... [2021-08-26 09:15:00,110 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-08-26 09:15:00,117 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-08-26 09:15:00,117 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-08-26 09:15:00,182 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-08-26 09:15:00,189 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-08-26 09:15:00,189 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-08-26 09:15:00,214 INFO L276 IsEmpty]: Start isEmpty. Operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-08-26 09:15:00,219 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,220 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,220 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,223 INFO L82 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-08-26 09:15:00,229 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,229 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827302279] [2021-08-26 09:15:00,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,230 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,449 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,450 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1827302279] [2021-08-26 09:15:00,450 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1827302279] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,451 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,451 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-08-26 09:15:00,463 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568613015] [2021-08-26 09:15:00,467 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-08-26 09:15:00,468 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,479 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-08-26 09:15:00,480 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-08-26 09:15:00,483 INFO L87 Difference]: Start difference. First operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:00,540 INFO L93 Difference]: Finished difference Result 568 states and 888 transitions. [2021-08-26 09:15:00,540 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-08-26 09:15:00,542 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-08-26 09:15:00,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:00,560 INFO L225 Difference]: With dead ends: 568 [2021-08-26 09:15:00,561 INFO L226 Difference]: Without dead ends: 290 [2021-08-26 09:15:00,568 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0ms TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-08-26 09:15:00,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-08-26 09:15:00,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-08-26 09:15:00,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5880149812734083) internal successors, (424), 289 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 424 transitions. [2021-08-26 09:15:00,636 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 424 transitions. Word has length 33 [2021-08-26 09:15:00,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:00,637 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 424 transitions. [2021-08-26 09:15:00,638 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,639 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 424 transitions. [2021-08-26 09:15:00,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-08-26 09:15:00,640 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,640 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,641 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-08-26 09:15:00,641 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-08-26 09:15:00,644 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,644 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1397156467] [2021-08-26 09:15:00,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,645 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,775 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,775 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1397156467] [2021-08-26 09:15:00,776 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1397156467] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,776 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,776 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:00,776 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850961653] [2021-08-26 09:15:00,777 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:00,778 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:00,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:00,780 INFO L87 Difference]: Start difference. First operand 290 states and 424 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:00,843 INFO L93 Difference]: Finished difference Result 566 states and 822 transitions. [2021-08-26 09:15:00,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-08-26 09:15:00,843 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-08-26 09:15:00,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:00,845 INFO L225 Difference]: With dead ends: 566 [2021-08-26 09:15:00,845 INFO L226 Difference]: Without dead ends: 290 [2021-08-26 09:15:00,847 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 12.0ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:00,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-08-26 09:15:00,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-08-26 09:15:00,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5430711610486891) internal successors, (412), 289 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 412 transitions. [2021-08-26 09:15:00,867 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 412 transitions. Word has length 33 [2021-08-26 09:15:00,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:00,867 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 412 transitions. [2021-08-26 09:15:00,868 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:00,868 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 412 transitions. [2021-08-26 09:15:00,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-08-26 09:15:00,871 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:00,871 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:00,872 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-08-26 09:15:00,872 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:00,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:00,881 INFO L82 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-08-26 09:15:00,881 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:00,881 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757103926] [2021-08-26 09:15:00,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:00,882 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:00,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:00,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:00,994 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:00,995 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757103926] [2021-08-26 09:15:00,995 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1757103926] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:00,995 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:00,995 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:00,995 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009091571] [2021-08-26 09:15:00,996 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:00,996 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:00,997 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:00,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:00,997 INFO L87 Difference]: Start difference. First operand 290 states and 412 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,048 INFO L93 Difference]: Finished difference Result 596 states and 856 transitions. [2021-08-26 09:15:01,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:01,053 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-08-26 09:15:01,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,056 INFO L225 Difference]: With dead ends: 596 [2021-08-26 09:15:01,056 INFO L226 Difference]: Without dead ends: 323 [2021-08-26 09:15:01,056 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:01,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2021-08-26 09:15:01,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 266. [2021-08-26 09:15:01,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 266 states, 247 states have (on average 1.5222672064777327) internal successors, (376), 265 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 376 transitions. [2021-08-26 09:15:01,065 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 376 transitions. Word has length 44 [2021-08-26 09:15:01,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,065 INFO L470 AbstractCegarLoop]: Abstraction has 266 states and 376 transitions. [2021-08-26 09:15:01,066 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,066 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 376 transitions. [2021-08-26 09:15:01,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-08-26 09:15:01,069 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,069 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,069 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-08-26 09:15:01,070 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,071 INFO L82 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-08-26 09:15:01,071 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,071 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866536326] [2021-08-26 09:15:01,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,072 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,177 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,177 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866536326] [2021-08-26 09:15:01,181 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [866536326] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,182 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,182 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:01,182 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075180528] [2021-08-26 09:15:01,183 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:01,183 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:01,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:01,184 INFO L87 Difference]: Start difference. First operand 266 states and 376 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,211 INFO L93 Difference]: Finished difference Result 741 states and 1059 transitions. [2021-08-26 09:15:01,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:01,212 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-08-26 09:15:01,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,215 INFO L225 Difference]: With dead ends: 741 [2021-08-26 09:15:01,215 INFO L226 Difference]: Without dead ends: 492 [2021-08-26 09:15:01,216 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.5ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:01,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2021-08-26 09:15:01,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 299. [2021-08-26 09:15:01,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 280 states have (on average 1.5142857142857142) internal successors, (424), 298 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 424 transitions. [2021-08-26 09:15:01,233 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 424 transitions. Word has length 53 [2021-08-26 09:15:01,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,234 INFO L470 AbstractCegarLoop]: Abstraction has 299 states and 424 transitions. [2021-08-26 09:15:01,235 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,235 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 424 transitions. [2021-08-26 09:15:01,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-08-26 09:15:01,237 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,237 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,237 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-08-26 09:15:01,238 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,239 INFO L82 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-08-26 09:15:01,239 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,240 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139835989] [2021-08-26 09:15:01,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,241 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,314 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,314 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139835989] [2021-08-26 09:15:01,315 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2139835989] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,315 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,315 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:01,315 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805382115] [2021-08-26 09:15:01,316 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:01,316 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:01,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:01,317 INFO L87 Difference]: Start difference. First operand 299 states and 424 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,356 INFO L93 Difference]: Finished difference Result 819 states and 1172 transitions. [2021-08-26 09:15:01,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:01,357 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-08-26 09:15:01,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,360 INFO L225 Difference]: With dead ends: 819 [2021-08-26 09:15:01,360 INFO L226 Difference]: Without dead ends: 537 [2021-08-26 09:15:01,361 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:01,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-08-26 09:15:01,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 320. [2021-08-26 09:15:01,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 301 states have (on average 1.5083056478405317) internal successors, (454), 319 states have internal predecessors, (454), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 454 transitions. [2021-08-26 09:15:01,370 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 454 transitions. Word has length 54 [2021-08-26 09:15:01,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,371 INFO L470 AbstractCegarLoop]: Abstraction has 320 states and 454 transitions. [2021-08-26 09:15:01,371 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,371 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 454 transitions. [2021-08-26 09:15:01,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-08-26 09:15:01,373 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,373 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,373 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-08-26 09:15:01,373 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,374 INFO L82 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-08-26 09:15:01,374 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,374 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450103916] [2021-08-26 09:15:01,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,374 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,464 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,464 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [450103916] [2021-08-26 09:15:01,465 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [450103916] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,465 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,465 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:01,465 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97765600] [2021-08-26 09:15:01,467 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-08-26 09:15:01,467 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-26 09:15:01,470 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:01,471 INFO L87 Difference]: Start difference. First operand 320 states and 454 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,660 INFO L93 Difference]: Finished difference Result 1000 states and 1433 transitions. [2021-08-26 09:15:01,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-26 09:15:01,661 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-08-26 09:15:01,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,664 INFO L225 Difference]: With dead ends: 1000 [2021-08-26 09:15:01,664 INFO L226 Difference]: Without dead ends: 697 [2021-08-26 09:15:01,665 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 24.1ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-08-26 09:15:01,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-08-26 09:15:01,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-08-26 09:15:01,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.481203007518797) internal successors, (591), 417 states have internal predecessors, (591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 591 transitions. [2021-08-26 09:15:01,680 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 591 transitions. Word has length 54 [2021-08-26 09:15:01,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,680 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 591 transitions. [2021-08-26 09:15:01,680 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,680 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 591 transitions. [2021-08-26 09:15:01,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-08-26 09:15:01,681 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,681 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,681 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-08-26 09:15:01,682 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,682 INFO L82 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-08-26 09:15:01,682 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,683 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555168914] [2021-08-26 09:15:01,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,683 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:01,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:01,741 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:01,741 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555168914] [2021-08-26 09:15:01,741 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [555168914] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:01,742 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:01,742 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:01,742 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810115998] [2021-08-26 09:15:01,742 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-08-26 09:15:01,743 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:01,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-26 09:15:01,743 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:01,743 INFO L87 Difference]: Start difference. First operand 418 states and 591 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:01,932 INFO L93 Difference]: Finished difference Result 1000 states and 1425 transitions. [2021-08-26 09:15:01,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-26 09:15:01,933 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-08-26 09:15:01,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:01,936 INFO L225 Difference]: With dead ends: 1000 [2021-08-26 09:15:01,936 INFO L226 Difference]: Without dead ends: 697 [2021-08-26 09:15:01,937 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 26.5ms TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-08-26 09:15:01,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-08-26 09:15:01,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-08-26 09:15:01,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.4711779448621554) internal successors, (587), 417 states have internal predecessors, (587), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 587 transitions. [2021-08-26 09:15:01,953 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 587 transitions. Word has length 55 [2021-08-26 09:15:01,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:01,953 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 587 transitions. [2021-08-26 09:15:01,953 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:01,954 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 587 transitions. [2021-08-26 09:15:01,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-08-26 09:15:01,954 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:01,954 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:01,954 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-08-26 09:15:01,955 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:01,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:01,955 INFO L82 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-08-26 09:15:01,955 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:01,955 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884100617] [2021-08-26 09:15:01,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:01,956 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:01,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,023 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,023 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884100617] [2021-08-26 09:15:02,024 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [884100617] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,024 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,024 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:02,024 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932917709] [2021-08-26 09:15:02,024 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:02,025 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:02,025 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,025 INFO L87 Difference]: Start difference. First operand 418 states and 587 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,051 INFO L93 Difference]: Finished difference Result 840 states and 1196 transitions. [2021-08-26 09:15:02,052 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,052 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-08-26 09:15:02,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,054 INFO L225 Difference]: With dead ends: 840 [2021-08-26 09:15:02,054 INFO L226 Difference]: Without dead ends: 537 [2021-08-26 09:15:02,055 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-08-26 09:15:02,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 413. [2021-08-26 09:15:02,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 395 states have (on average 1.4658227848101266) internal successors, (579), 412 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 579 transitions. [2021-08-26 09:15:02,068 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 579 transitions. Word has length 56 [2021-08-26 09:15:02,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,069 INFO L470 AbstractCegarLoop]: Abstraction has 413 states and 579 transitions. [2021-08-26 09:15:02,069 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,069 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 579 transitions. [2021-08-26 09:15:02,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-08-26 09:15:02,069 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,070 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,070 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-08-26 09:15:02,070 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,070 INFO L82 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-08-26 09:15:02,071 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,071 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448554659] [2021-08-26 09:15:02,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,071 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,161 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,161 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448554659] [2021-08-26 09:15:02,168 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448554659] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,169 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,169 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:02,169 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650013939] [2021-08-26 09:15:02,170 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:02,170 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:02,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,171 INFO L87 Difference]: Start difference. First operand 413 states and 579 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,236 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-08-26 09:15:02,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,236 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-08-26 09:15:02,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,239 INFO L225 Difference]: With dead ends: 839 [2021-08-26 09:15:02,239 INFO L226 Difference]: Without dead ends: 541 [2021-08-26 09:15:02,240 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2021-08-26 09:15:02,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 393. [2021-08-26 09:15:02,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 379 states have (on average 1.4432717678100264) internal successors, (547), 392 states have internal predecessors, (547), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 547 transitions. [2021-08-26 09:15:02,255 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 547 transitions. Word has length 60 [2021-08-26 09:15:02,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,256 INFO L470 AbstractCegarLoop]: Abstraction has 393 states and 547 transitions. [2021-08-26 09:15:02,256 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,256 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 547 transitions. [2021-08-26 09:15:02,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-08-26 09:15:02,257 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,257 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,257 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-08-26 09:15:02,258 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,258 INFO L82 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-08-26 09:15:02,258 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,258 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [208981711] [2021-08-26 09:15:02,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,259 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,306 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,306 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [208981711] [2021-08-26 09:15:02,307 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [208981711] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,307 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,307 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:02,307 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430241512] [2021-08-26 09:15:02,308 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:02,308 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,308 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:02,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,309 INFO L87 Difference]: Start difference. First operand 393 states and 547 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,352 INFO L93 Difference]: Finished difference Result 807 states and 1139 transitions. [2021-08-26 09:15:02,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,352 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-08-26 09:15:02,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,354 INFO L225 Difference]: With dead ends: 807 [2021-08-26 09:15:02,355 INFO L226 Difference]: Without dead ends: 529 [2021-08-26 09:15:02,355 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2021-08-26 09:15:02,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 381. [2021-08-26 09:15:02,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 369 states have (on average 1.4336043360433603) internal successors, (529), 380 states have internal predecessors, (529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 529 transitions. [2021-08-26 09:15:02,370 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 529 transitions. Word has length 64 [2021-08-26 09:15:02,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,371 INFO L470 AbstractCegarLoop]: Abstraction has 381 states and 529 transitions. [2021-08-26 09:15:02,371 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,371 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 529 transitions. [2021-08-26 09:15:02,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-08-26 09:15:02,372 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,372 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,372 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-08-26 09:15:02,372 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,373 INFO L82 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-08-26 09:15:02,373 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,373 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922345915] [2021-08-26 09:15:02,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,374 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,443 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,443 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922345915] [2021-08-26 09:15:02,443 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [922345915] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,443 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,444 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:02,444 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [596302727] [2021-08-26 09:15:02,444 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:02,444 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:02,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,445 INFO L87 Difference]: Start difference. First operand 381 states and 529 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,503 INFO L93 Difference]: Finished difference Result 803 states and 1131 transitions. [2021-08-26 09:15:02,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,504 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-08-26 09:15:02,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,506 INFO L225 Difference]: With dead ends: 803 [2021-08-26 09:15:02,507 INFO L226 Difference]: Without dead ends: 537 [2021-08-26 09:15:02,507 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-08-26 09:15:02,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 361. [2021-08-26 09:15:02,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 353 states have (on average 1.4079320113314449) internal successors, (497), 360 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 497 transitions. [2021-08-26 09:15:02,524 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 497 transitions. Word has length 65 [2021-08-26 09:15:02,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,524 INFO L470 AbstractCegarLoop]: Abstraction has 361 states and 497 transitions. [2021-08-26 09:15:02,524 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,525 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 497 transitions. [2021-08-26 09:15:02,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-08-26 09:15:02,525 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,525 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,526 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-08-26 09:15:02,526 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,526 INFO L82 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-08-26 09:15:02,527 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,527 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [228554603] [2021-08-26 09:15:02,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,527 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,629 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,629 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [228554603] [2021-08-26 09:15:02,629 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [228554603] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,629 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,629 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:02,630 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1648069851] [2021-08-26 09:15:02,630 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:02,630 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,630 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:02,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:02,631 INFO L87 Difference]: Start difference. First operand 361 states and 497 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,801 INFO L93 Difference]: Finished difference Result 1087 states and 1510 transitions. [2021-08-26 09:15:02,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-08-26 09:15:02,801 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-08-26 09:15:02,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,804 INFO L225 Difference]: With dead ends: 1087 [2021-08-26 09:15:02,804 INFO L226 Difference]: Without dead ends: 841 [2021-08-26 09:15:02,805 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 47.4ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-08-26 09:15:02,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 841 states. [2021-08-26 09:15:02,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 841 to 411. [2021-08-26 09:15:02,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 411 states, 403 states have (on average 1.401985111662531) internal successors, (565), 410 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 565 transitions. [2021-08-26 09:15:02,827 INFO L78 Accepts]: Start accepts. Automaton has 411 states and 565 transitions. Word has length 70 [2021-08-26 09:15:02,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,828 INFO L470 AbstractCegarLoop]: Abstraction has 411 states and 565 transitions. [2021-08-26 09:15:02,828 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,828 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 565 transitions. [2021-08-26 09:15:02,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-08-26 09:15:02,828 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,829 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,829 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-08-26 09:15:02,829 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-08-26 09:15:02,830 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,830 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976604427] [2021-08-26 09:15:02,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,830 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:02,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:02,880 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:02,880 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976604427] [2021-08-26 09:15:02,880 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976604427] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:02,880 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:02,880 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:02,881 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484081794] [2021-08-26 09:15:02,881 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:02,881 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:02,881 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:02,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,882 INFO L87 Difference]: Start difference. First operand 411 states and 565 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:02,943 INFO L93 Difference]: Finished difference Result 839 states and 1168 transitions. [2021-08-26 09:15:02,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:02,944 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-08-26 09:15:02,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:02,946 INFO L225 Difference]: With dead ends: 839 [2021-08-26 09:15:02,946 INFO L226 Difference]: Without dead ends: 576 [2021-08-26 09:15:02,947 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:02,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 576 states. [2021-08-26 09:15:02,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 576 to 395. [2021-08-26 09:15:02,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 389 states have (on average 1.3856041131105399) internal successors, (539), 394 states have internal predecessors, (539), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 539 transitions. [2021-08-26 09:15:02,971 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 539 transitions. Word has length 71 [2021-08-26 09:15:02,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:02,971 INFO L470 AbstractCegarLoop]: Abstraction has 395 states and 539 transitions. [2021-08-26 09:15:02,971 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:02,972 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 539 transitions. [2021-08-26 09:15:02,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-08-26 09:15:02,973 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:02,973 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:02,973 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-08-26 09:15:02,973 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:02,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:02,974 INFO L82 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-08-26 09:15:02,974 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:02,974 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849591092] [2021-08-26 09:15:02,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:02,974 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:02,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:03,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:03,038 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:03,038 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849591092] [2021-08-26 09:15:03,038 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [849591092] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:03,038 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:03,039 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:03,039 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [159754773] [2021-08-26 09:15:03,039 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:03,039 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:03,040 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:03,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:03,040 INFO L87 Difference]: Start difference. First operand 395 states and 539 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:03,084 INFO L93 Difference]: Finished difference Result 708 states and 982 transitions. [2021-08-26 09:15:03,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:03,084 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-08-26 09:15:03,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:03,086 INFO L225 Difference]: With dead ends: 708 [2021-08-26 09:15:03,087 INFO L226 Difference]: Without dead ends: 474 [2021-08-26 09:15:03,088 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:03,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2021-08-26 09:15:03,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 391. [2021-08-26 09:15:03,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.378238341968912) internal successors, (532), 390 states have internal predecessors, (532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 532 transitions. [2021-08-26 09:15:03,111 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 532 transitions. Word has length 71 [2021-08-26 09:15:03,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:03,111 INFO L470 AbstractCegarLoop]: Abstraction has 391 states and 532 transitions. [2021-08-26 09:15:03,111 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,111 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 532 transitions. [2021-08-26 09:15:03,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-08-26 09:15:03,112 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:03,112 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:03,112 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-08-26 09:15:03,113 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:03,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:03,113 INFO L82 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-08-26 09:15:03,113 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:03,113 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160168878] [2021-08-26 09:15:03,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:03,114 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:03,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:03,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:03,248 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:03,248 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160168878] [2021-08-26 09:15:03,248 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [160168878] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:03,248 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:03,248 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-08-26 09:15:03,249 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637445149] [2021-08-26 09:15:03,249 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-08-26 09:15:03,249 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:03,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-08-26 09:15:03,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-08-26 09:15:03,250 INFO L87 Difference]: Start difference. First operand 391 states and 532 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:03,499 INFO L93 Difference]: Finished difference Result 1349 states and 1849 transitions. [2021-08-26 09:15:03,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:03,500 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-08-26 09:15:03,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:03,504 INFO L225 Difference]: With dead ends: 1349 [2021-08-26 09:15:03,504 INFO L226 Difference]: Without dead ends: 1101 [2021-08-26 09:15:03,508 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 64.6ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-08-26 09:15:03,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2021-08-26 09:15:03,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 419. [2021-08-26 09:15:03,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 414 states have (on average 1.3623188405797102) internal successors, (564), 418 states have internal predecessors, (564), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 564 transitions. [2021-08-26 09:15:03,534 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 564 transitions. Word has length 74 [2021-08-26 09:15:03,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:03,534 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 564 transitions. [2021-08-26 09:15:03,535 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,535 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 564 transitions. [2021-08-26 09:15:03,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-08-26 09:15:03,535 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:03,535 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:03,536 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-08-26 09:15:03,536 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:03,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:03,538 INFO L82 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-08-26 09:15:03,538 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:03,538 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327680971] [2021-08-26 09:15:03,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:03,538 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:03,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:03,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:03,628 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:03,628 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327680971] [2021-08-26 09:15:03,630 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327680971] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:03,630 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:03,630 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:03,630 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781560491] [2021-08-26 09:15:03,630 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:03,631 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:03,631 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:03,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:03,632 INFO L87 Difference]: Start difference. First operand 419 states and 564 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:03,740 INFO L93 Difference]: Finished difference Result 1079 states and 1463 transitions. [2021-08-26 09:15:03,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:03,741 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-08-26 09:15:03,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:03,744 INFO L225 Difference]: With dead ends: 1079 [2021-08-26 09:15:03,744 INFO L226 Difference]: Without dead ends: 825 [2021-08-26 09:15:03,745 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.6ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:03,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 825 states. [2021-08-26 09:15:03,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 825 to 632. [2021-08-26 09:15:03,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 632 states, 627 states have (on average 1.342902711323764) internal successors, (842), 631 states have internal predecessors, (842), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 842 transitions. [2021-08-26 09:15:03,782 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 842 transitions. Word has length 74 [2021-08-26 09:15:03,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:03,783 INFO L470 AbstractCegarLoop]: Abstraction has 632 states and 842 transitions. [2021-08-26 09:15:03,783 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:03,783 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 842 transitions. [2021-08-26 09:15:03,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-08-26 09:15:03,784 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:03,784 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:03,784 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-08-26 09:15:03,784 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:03,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:03,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-08-26 09:15:03,785 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:03,785 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472841008] [2021-08-26 09:15:03,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:03,786 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:03,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:03,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:03,887 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:03,887 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472841008] [2021-08-26 09:15:03,887 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472841008] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:03,888 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:03,888 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:03,888 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603180043] [2021-08-26 09:15:03,889 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:03,889 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:03,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:03,890 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:03,890 INFO L87 Difference]: Start difference. First operand 632 states and 842 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:04,144 INFO L93 Difference]: Finished difference Result 1899 states and 2590 transitions. [2021-08-26 09:15:04,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-08-26 09:15:04,145 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-08-26 09:15:04,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:04,150 INFO L225 Difference]: With dead ends: 1899 [2021-08-26 09:15:04,151 INFO L226 Difference]: Without dead ends: 1534 [2021-08-26 09:15:04,152 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 46.5ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-08-26 09:15:04,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2021-08-26 09:15:04,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 620. [2021-08-26 09:15:04,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 620 states, 615 states have (on average 1.3463414634146342) internal successors, (828), 619 states have internal predecessors, (828), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 620 states to 620 states and 828 transitions. [2021-08-26 09:15:04,227 INFO L78 Accepts]: Start accepts. Automaton has 620 states and 828 transitions. Word has length 75 [2021-08-26 09:15:04,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:04,227 INFO L470 AbstractCegarLoop]: Abstraction has 620 states and 828 transitions. [2021-08-26 09:15:04,228 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,228 INFO L276 IsEmpty]: Start isEmpty. Operand 620 states and 828 transitions. [2021-08-26 09:15:04,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-08-26 09:15:04,231 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:04,232 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:04,232 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-08-26 09:15:04,232 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:04,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:04,233 INFO L82 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-08-26 09:15:04,233 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:04,233 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885957634] [2021-08-26 09:15:04,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:04,233 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:04,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:04,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:04,312 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:04,312 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [885957634] [2021-08-26 09:15:04,312 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [885957634] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:04,312 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:04,312 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:04,313 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837995082] [2021-08-26 09:15:04,314 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:04,314 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:04,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:04,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:04,315 INFO L87 Difference]: Start difference. First operand 620 states and 828 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:04,487 INFO L93 Difference]: Finished difference Result 971 states and 1314 transitions. [2021-08-26 09:15:04,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-08-26 09:15:04,487 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-08-26 09:15:04,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:04,491 INFO L225 Difference]: With dead ends: 971 [2021-08-26 09:15:04,491 INFO L226 Difference]: Without dead ends: 969 [2021-08-26 09:15:04,492 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 41.9ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-08-26 09:15:04,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states. [2021-08-26 09:15:04,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 622. [2021-08-26 09:15:04,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 622 states, 617 states have (on average 1.3452188006482981) internal successors, (830), 621 states have internal predecessors, (830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 830 transitions. [2021-08-26 09:15:04,546 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 830 transitions. Word has length 75 [2021-08-26 09:15:04,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:04,547 INFO L470 AbstractCegarLoop]: Abstraction has 622 states and 830 transitions. [2021-08-26 09:15:04,547 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,547 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 830 transitions. [2021-08-26 09:15:04,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-08-26 09:15:04,548 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:04,548 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:04,548 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-08-26 09:15:04,549 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:04,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:04,550 INFO L82 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-08-26 09:15:04,550 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:04,550 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576156251] [2021-08-26 09:15:04,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:04,551 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:04,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:04,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:04,648 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:04,648 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576156251] [2021-08-26 09:15:04,648 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1576156251] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:04,649 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:04,649 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:04,649 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766141542] [2021-08-26 09:15:04,650 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:04,651 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:04,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:04,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:04,651 INFO L87 Difference]: Start difference. First operand 622 states and 830 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:04,845 INFO L93 Difference]: Finished difference Result 1465 states and 2028 transitions. [2021-08-26 09:15:04,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:04,845 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-08-26 09:15:04,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:04,849 INFO L225 Difference]: With dead ends: 1465 [2021-08-26 09:15:04,849 INFO L226 Difference]: Without dead ends: 1098 [2021-08-26 09:15:04,850 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 35.9ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-08-26 09:15:04,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1098 states. [2021-08-26 09:15:04,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1098 to 628. [2021-08-26 09:15:04,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 628 states, 623 states have (on average 1.3418940609951846) internal successors, (836), 627 states have internal predecessors, (836), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 836 transitions. [2021-08-26 09:15:04,894 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 836 transitions. Word has length 76 [2021-08-26 09:15:04,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:04,894 INFO L470 AbstractCegarLoop]: Abstraction has 628 states and 836 transitions. [2021-08-26 09:15:04,895 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:04,895 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 836 transitions. [2021-08-26 09:15:04,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-08-26 09:15:04,896 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:04,896 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:04,896 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-08-26 09:15:04,897 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:04,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:04,897 INFO L82 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-08-26 09:15:04,897 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:04,897 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989958976] [2021-08-26 09:15:04,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:04,898 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:04,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:04,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:04,964 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:04,964 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989958976] [2021-08-26 09:15:04,964 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [989958976] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:04,965 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:04,965 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:04,965 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524979389] [2021-08-26 09:15:04,965 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:04,965 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:04,966 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:04,966 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:04,966 INFO L87 Difference]: Start difference. First operand 628 states and 836 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:05,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:05,109 INFO L93 Difference]: Finished difference Result 1463 states and 1952 transitions. [2021-08-26 09:15:05,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:05,110 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-08-26 09:15:05,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:05,114 INFO L225 Difference]: With dead ends: 1463 [2021-08-26 09:15:05,114 INFO L226 Difference]: Without dead ends: 1072 [2021-08-26 09:15:05,115 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:05,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states. [2021-08-26 09:15:05,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 818. [2021-08-26 09:15:05,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 818 states, 813 states have (on average 1.3333333333333333) internal successors, (1084), 817 states have internal predecessors, (1084), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:05,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 818 states to 818 states and 1084 transitions. [2021-08-26 09:15:05,169 INFO L78 Accepts]: Start accepts. Automaton has 818 states and 1084 transitions. Word has length 76 [2021-08-26 09:15:05,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:05,169 INFO L470 AbstractCegarLoop]: Abstraction has 818 states and 1084 transitions. [2021-08-26 09:15:05,170 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:05,171 INFO L276 IsEmpty]: Start isEmpty. Operand 818 states and 1084 transitions. [2021-08-26 09:15:05,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-08-26 09:15:05,172 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:05,172 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:05,172 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-08-26 09:15:05,172 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:05,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:05,173 INFO L82 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-08-26 09:15:05,173 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:05,173 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607396661] [2021-08-26 09:15:05,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:05,174 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:05,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:05,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:05,263 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:05,263 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607396661] [2021-08-26 09:15:05,263 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1607396661] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:05,264 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:05,264 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:05,264 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519537906] [2021-08-26 09:15:05,264 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:05,265 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:05,266 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:05,266 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:05,266 INFO L87 Difference]: Start difference. First operand 818 states and 1084 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:05,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:05,641 INFO L93 Difference]: Finished difference Result 3144 states and 4188 transitions. [2021-08-26 09:15:05,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:05,642 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-08-26 09:15:05,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:05,651 INFO L225 Difference]: With dead ends: 3144 [2021-08-26 09:15:05,652 INFO L226 Difference]: Without dead ends: 2626 [2021-08-26 09:15:05,654 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 66.8ms TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-08-26 09:15:05,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states. [2021-08-26 09:15:05,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 872. [2021-08-26 09:15:05,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 872 states, 867 states have (on average 1.328719723183391) internal successors, (1152), 871 states have internal predecessors, (1152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:05,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 872 states to 872 states and 1152 transitions. [2021-08-26 09:15:05,762 INFO L78 Accepts]: Start accepts. Automaton has 872 states and 1152 transitions. Word has length 76 [2021-08-26 09:15:05,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:05,762 INFO L470 AbstractCegarLoop]: Abstraction has 872 states and 1152 transitions. [2021-08-26 09:15:05,763 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:05,763 INFO L276 IsEmpty]: Start isEmpty. Operand 872 states and 1152 transitions. [2021-08-26 09:15:05,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-08-26 09:15:05,764 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:05,764 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:05,764 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-08-26 09:15:05,764 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:05,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:05,765 INFO L82 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-08-26 09:15:05,765 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:05,765 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052706931] [2021-08-26 09:15:05,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:05,766 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:05,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:05,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:05,819 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:05,819 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052706931] [2021-08-26 09:15:05,820 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052706931] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:05,820 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:05,820 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:05,820 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853559543] [2021-08-26 09:15:05,821 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:05,821 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:05,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:05,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:05,822 INFO L87 Difference]: Start difference. First operand 872 states and 1152 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:06,034 INFO L93 Difference]: Finished difference Result 2255 states and 2985 transitions. [2021-08-26 09:15:06,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:06,035 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-08-26 09:15:06,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:06,041 INFO L225 Difference]: With dead ends: 2255 [2021-08-26 09:15:06,042 INFO L226 Difference]: Without dead ends: 1684 [2021-08-26 09:15:06,044 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 8.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:06,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1684 states. [2021-08-26 09:15:06,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1684 to 1213. [2021-08-26 09:15:06,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1213 states, 1208 states have (on average 1.3162251655629138) internal successors, (1590), 1212 states have internal predecessors, (1590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1213 states to 1213 states and 1590 transitions. [2021-08-26 09:15:06,135 INFO L78 Accepts]: Start accepts. Automaton has 1213 states and 1590 transitions. Word has length 77 [2021-08-26 09:15:06,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:06,136 INFO L470 AbstractCegarLoop]: Abstraction has 1213 states and 1590 transitions. [2021-08-26 09:15:06,136 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,136 INFO L276 IsEmpty]: Start isEmpty. Operand 1213 states and 1590 transitions. [2021-08-26 09:15:06,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-08-26 09:15:06,137 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:06,137 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:06,138 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-08-26 09:15:06,138 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:06,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:06,138 INFO L82 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-08-26 09:15:06,139 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:06,139 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894469921] [2021-08-26 09:15:06,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:06,139 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:06,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:06,175 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:06,176 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:06,176 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894469921] [2021-08-26 09:15:06,176 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1894469921] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:06,176 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:06,176 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:06,177 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242443937] [2021-08-26 09:15:06,178 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:06,178 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:06,179 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:06,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:06,179 INFO L87 Difference]: Start difference. First operand 1213 states and 1590 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:06,396 INFO L93 Difference]: Finished difference Result 2967 states and 3887 transitions. [2021-08-26 09:15:06,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:06,396 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-08-26 09:15:06,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:06,403 INFO L225 Difference]: With dead ends: 2967 [2021-08-26 09:15:06,403 INFO L226 Difference]: Without dead ends: 2012 [2021-08-26 09:15:06,405 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:06,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2012 states. [2021-08-26 09:15:06,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2012 to 1215. [2021-08-26 09:15:06,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1215 states, 1210 states have (on average 1.315702479338843) internal successors, (1592), 1214 states have internal predecessors, (1592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1215 states to 1215 states and 1592 transitions. [2021-08-26 09:15:06,500 INFO L78 Accepts]: Start accepts. Automaton has 1215 states and 1592 transitions. Word has length 78 [2021-08-26 09:15:06,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:06,500 INFO L470 AbstractCegarLoop]: Abstraction has 1215 states and 1592 transitions. [2021-08-26 09:15:06,500 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,500 INFO L276 IsEmpty]: Start isEmpty. Operand 1215 states and 1592 transitions. [2021-08-26 09:15:06,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-08-26 09:15:06,501 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:06,502 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:06,502 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-08-26 09:15:06,502 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:06,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:06,503 INFO L82 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-08-26 09:15:06,503 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:06,503 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952009192] [2021-08-26 09:15:06,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:06,504 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:06,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:06,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:06,560 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:06,560 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952009192] [2021-08-26 09:15:06,561 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1952009192] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:06,561 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:06,561 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:06,561 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226837626] [2021-08-26 09:15:06,561 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:06,562 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:06,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:06,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:06,562 INFO L87 Difference]: Start difference. First operand 1215 states and 1592 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:06,717 INFO L93 Difference]: Finished difference Result 2519 states and 3295 transitions. [2021-08-26 09:15:06,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:06,718 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-08-26 09:15:06,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:06,722 INFO L225 Difference]: With dead ends: 2519 [2021-08-26 09:15:06,723 INFO L226 Difference]: Without dead ends: 1376 [2021-08-26 09:15:06,724 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 15.4ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:06,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2021-08-26 09:15:06,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1020. [2021-08-26 09:15:06,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1015 states have (on average 1.3083743842364532) internal successors, (1328), 1019 states have internal predecessors, (1328), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1328 transitions. [2021-08-26 09:15:06,814 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1328 transitions. Word has length 79 [2021-08-26 09:15:06,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:06,814 INFO L470 AbstractCegarLoop]: Abstraction has 1020 states and 1328 transitions. [2021-08-26 09:15:06,815 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:06,815 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1328 transitions. [2021-08-26 09:15:06,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-08-26 09:15:06,816 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:06,816 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:06,816 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-08-26 09:15:06,816 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:06,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:06,817 INFO L82 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-08-26 09:15:06,817 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:06,817 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085298109] [2021-08-26 09:15:06,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:06,817 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:06,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:06,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:06,848 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:06,849 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085298109] [2021-08-26 09:15:06,849 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1085298109] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:06,849 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:06,849 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-26 09:15:06,849 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019082517] [2021-08-26 09:15:06,849 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-08-26 09:15:06,850 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:06,850 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-26 09:15:06,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:06,850 INFO L87 Difference]: Start difference. First operand 1020 states and 1328 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:07,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:07,049 INFO L93 Difference]: Finished difference Result 2414 states and 3160 transitions. [2021-08-26 09:15:07,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-26 09:15:07,049 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-08-26 09:15:07,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:07,055 INFO L225 Difference]: With dead ends: 2414 [2021-08-26 09:15:07,055 INFO L226 Difference]: Without dead ends: 1537 [2021-08-26 09:15:07,057 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7ms TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-26 09:15:07,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1537 states. [2021-08-26 09:15:07,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1537 to 1026. [2021-08-26 09:15:07,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1026 states, 1021 states have (on average 1.306562193927522) internal successors, (1334), 1025 states have internal predecessors, (1334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:07,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1026 states to 1026 states and 1334 transitions. [2021-08-26 09:15:07,165 INFO L78 Accepts]: Start accepts. Automaton has 1026 states and 1334 transitions. Word has length 80 [2021-08-26 09:15:07,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:07,166 INFO L470 AbstractCegarLoop]: Abstraction has 1026 states and 1334 transitions. [2021-08-26 09:15:07,166 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:07,166 INFO L276 IsEmpty]: Start isEmpty. Operand 1026 states and 1334 transitions. [2021-08-26 09:15:07,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-08-26 09:15:07,167 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:07,168 INFO L512 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:07,168 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-08-26 09:15:07,168 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:07,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:07,168 INFO L82 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-08-26 09:15:07,169 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:07,169 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128355465] [2021-08-26 09:15:07,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:07,169 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:07,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:07,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:07,238 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:07,238 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128355465] [2021-08-26 09:15:07,238 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [128355465] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:07,238 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:07,238 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:07,238 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213650637] [2021-08-26 09:15:07,239 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:07,239 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:07,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:07,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:07,240 INFO L87 Difference]: Start difference. First operand 1026 states and 1334 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:07,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:07,395 INFO L93 Difference]: Finished difference Result 2367 states and 3085 transitions. [2021-08-26 09:15:07,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:07,396 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-08-26 09:15:07,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:07,401 INFO L225 Difference]: With dead ends: 2367 [2021-08-26 09:15:07,401 INFO L226 Difference]: Without dead ends: 1436 [2021-08-26 09:15:07,403 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 14.9ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:07,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2021-08-26 09:15:07,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 968. [2021-08-26 09:15:07,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.300103842159917) internal successors, (1252), 967 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:07,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1252 transitions. [2021-08-26 09:15:07,503 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1252 transitions. Word has length 80 [2021-08-26 09:15:07,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:07,503 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1252 transitions. [2021-08-26 09:15:07,503 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:07,504 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1252 transitions. [2021-08-26 09:15:07,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2021-08-26 09:15:07,506 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:07,506 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:07,506 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-08-26 09:15:07,507 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:07,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:07,507 INFO L82 PathProgramCache]: Analyzing trace with hash -1161164796, now seen corresponding path program 1 times [2021-08-26 09:15:07,507 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:07,507 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868512430] [2021-08-26 09:15:07,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:07,508 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:07,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:07,644 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:07,645 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:07,645 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [868512430] [2021-08-26 09:15:07,645 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [868512430] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:07,647 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1953952924] [2021-08-26 09:15:07,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:07,648 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:07,648 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:07,656 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:07,686 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-08-26 09:15:07,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:07,893 INFO L263 TraceCheckSpWp]: Trace formula consists of 711 conjuncts, 8 conjunts are in the unsatisfiable core [2021-08-26 09:15:07,901 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:08,381 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-08-26 09:15:08,381 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1953952924] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:08,382 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-08-26 09:15:08,382 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-08-26 09:15:08,382 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614901791] [2021-08-26 09:15:08,382 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:08,383 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:08,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:08,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-08-26 09:15:08,383 INFO L87 Difference]: Start difference. First operand 968 states and 1252 transitions. Second operand has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:08,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:08,754 INFO L93 Difference]: Finished difference Result 2490 states and 3322 transitions. [2021-08-26 09:15:08,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:08,754 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 125 [2021-08-26 09:15:08,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:08,760 INFO L225 Difference]: With dead ends: 2490 [2021-08-26 09:15:08,760 INFO L226 Difference]: Without dead ends: 1701 [2021-08-26 09:15:08,762 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 108.5ms TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-08-26 09:15:08,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1701 states. [2021-08-26 09:15:08,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1701 to 968. [2021-08-26 09:15:08,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.2990654205607477) internal successors, (1251), 967 states have internal predecessors, (1251), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:08,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1251 transitions. [2021-08-26 09:15:08,889 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1251 transitions. Word has length 125 [2021-08-26 09:15:08,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:08,889 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1251 transitions. [2021-08-26 09:15:08,889 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:08,889 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1251 transitions. [2021-08-26 09:15:08,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2021-08-26 09:15:08,891 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:08,892 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:08,921 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:09,105 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-08-26 09:15:09,105 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:09,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:09,105 INFO L82 PathProgramCache]: Analyzing trace with hash -1641852183, now seen corresponding path program 1 times [2021-08-26 09:15:09,105 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:09,105 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914237086] [2021-08-26 09:15:09,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:09,106 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:09,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:09,233 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:09,233 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:09,234 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914237086] [2021-08-26 09:15:09,234 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1914237086] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:09,234 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1099040177] [2021-08-26 09:15:09,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:09,234 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:09,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:09,235 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:09,263 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-08-26 09:15:09,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:09,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 725 conjuncts, 14 conjunts are in the unsatisfiable core [2021-08-26 09:15:09,483 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:09,924 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:09,925 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1099040177] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:09,925 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:09,925 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-08-26 09:15:09,925 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780122006] [2021-08-26 09:15:09,926 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-08-26 09:15:09,926 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:09,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-08-26 09:15:09,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-08-26 09:15:09,927 INFO L87 Difference]: Start difference. First operand 968 states and 1251 transitions. Second operand has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:19,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:19,051 INFO L93 Difference]: Finished difference Result 16562 states and 22008 transitions. [2021-08-26 09:15:19,052 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-08-26 09:15:19,052 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 129 [2021-08-26 09:15:19,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:19,087 INFO L225 Difference]: With dead ends: 16562 [2021-08-26 09:15:19,087 INFO L226 Difference]: Without dead ends: 15779 [2021-08-26 09:15:19,111 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 472 GetRequests, 221 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 5074.0ms TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-08-26 09:15:19,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15779 states. [2021-08-26 09:15:19,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15779 to 2664. [2021-08-26 09:15:19,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2664 states, 2659 states have (on average 1.300112824370064) internal successors, (3457), 2663 states have internal predecessors, (3457), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:19,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2664 states to 2664 states and 3457 transitions. [2021-08-26 09:15:19,472 INFO L78 Accepts]: Start accepts. Automaton has 2664 states and 3457 transitions. Word has length 129 [2021-08-26 09:15:19,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:19,472 INFO L470 AbstractCegarLoop]: Abstraction has 2664 states and 3457 transitions. [2021-08-26 09:15:19,472 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:19,472 INFO L276 IsEmpty]: Start isEmpty. Operand 2664 states and 3457 transitions. [2021-08-26 09:15:19,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-08-26 09:15:19,477 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:19,477 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:19,536 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-08-26 09:15:19,693 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-08-26 09:15:19,693 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:19,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:19,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1066693851, now seen corresponding path program 1 times [2021-08-26 09:15:19,694 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:19,694 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581747468] [2021-08-26 09:15:19,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:19,695 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:19,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:19,872 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:19,873 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:19,873 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581747468] [2021-08-26 09:15:19,873 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1581747468] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:19,873 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [965998280] [2021-08-26 09:15:19,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:19,874 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:19,874 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:19,875 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:19,884 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-08-26 09:15:20,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:20,183 INFO L263 TraceCheckSpWp]: Trace formula consists of 777 conjuncts, 14 conjunts are in the unsatisfiable core [2021-08-26 09:15:20,198 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:20,554 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:20,554 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [965998280] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:20,554 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:20,554 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-08-26 09:15:20,555 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710633543] [2021-08-26 09:15:20,555 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-08-26 09:15:20,555 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:20,556 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-08-26 09:15:20,556 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-08-26 09:15:20,556 INFO L87 Difference]: Start difference. First operand 2664 states and 3457 transitions. Second operand has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:21,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:21,559 INFO L93 Difference]: Finished difference Result 9414 states and 12634 transitions. [2021-08-26 09:15:21,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-08-26 09:15:21,560 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-08-26 09:15:21,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:21,574 INFO L225 Difference]: With dead ends: 9414 [2021-08-26 09:15:21,575 INFO L226 Difference]: Without dead ends: 6969 [2021-08-26 09:15:21,579 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 140 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 159.8ms TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-08-26 09:15:21,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6969 states. [2021-08-26 09:15:21,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6969 to 2248. [2021-08-26 09:15:21,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2248 states, 2243 states have (on average 1.294694605439144) internal successors, (2904), 2247 states have internal predecessors, (2904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:21,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2248 states to 2248 states and 2904 transitions. [2021-08-26 09:15:21,903 INFO L78 Accepts]: Start accepts. Automaton has 2248 states and 2904 transitions. Word has length 130 [2021-08-26 09:15:21,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:21,903 INFO L470 AbstractCegarLoop]: Abstraction has 2248 states and 2904 transitions. [2021-08-26 09:15:21,904 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:21,904 INFO L276 IsEmpty]: Start isEmpty. Operand 2248 states and 2904 transitions. [2021-08-26 09:15:21,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-08-26 09:15:21,907 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:21,908 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:21,936 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:22,133 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-08-26 09:15:22,133 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:22,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:22,133 INFO L82 PathProgramCache]: Analyzing trace with hash -2028457745, now seen corresponding path program 1 times [2021-08-26 09:15:22,134 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:22,134 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943228747] [2021-08-26 09:15:22,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:22,134 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:22,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:22,253 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-08-26 09:15:22,254 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:22,254 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943228747] [2021-08-26 09:15:22,254 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943228747] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:22,254 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:22,254 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-08-26 09:15:22,255 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1510679297] [2021-08-26 09:15:22,255 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-08-26 09:15:22,255 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:22,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-08-26 09:15:22,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-08-26 09:15:22,256 INFO L87 Difference]: Start difference. First operand 2248 states and 2904 transitions. Second operand has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:23,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:23,655 INFO L93 Difference]: Finished difference Result 12918 states and 17076 transitions. [2021-08-26 09:15:23,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-08-26 09:15:23,655 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-08-26 09:15:23,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:23,675 INFO L225 Difference]: With dead ends: 12918 [2021-08-26 09:15:23,675 INFO L226 Difference]: Without dead ends: 10909 [2021-08-26 09:15:23,680 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 128.9ms TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-08-26 09:15:23,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10909 states. [2021-08-26 09:15:23,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10909 to 2668. [2021-08-26 09:15:23,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2771310552009012) internal successors, (3401), 2667 states have internal predecessors, (3401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:23,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3401 transitions. [2021-08-26 09:15:23,993 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3401 transitions. Word has length 131 [2021-08-26 09:15:23,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:23,994 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3401 transitions. [2021-08-26 09:15:23,994 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:23,994 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3401 transitions. [2021-08-26 09:15:23,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-08-26 09:15:23,999 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:23,999 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:24,000 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-08-26 09:15:24,000 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:24,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:24,000 INFO L82 PathProgramCache]: Analyzing trace with hash 603418006, now seen corresponding path program 1 times [2021-08-26 09:15:24,001 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:24,001 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885118359] [2021-08-26 09:15:24,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:24,001 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:24,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:24,103 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-08-26 09:15:24,104 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:24,104 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [885118359] [2021-08-26 09:15:24,104 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [885118359] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:24,104 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:24,104 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:24,105 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813010034] [2021-08-26 09:15:24,105 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:24,105 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:24,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:24,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:24,106 INFO L87 Difference]: Start difference. First operand 2668 states and 3401 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:24,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:24,785 INFO L93 Difference]: Finished difference Result 8583 states and 11271 transitions. [2021-08-26 09:15:24,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-08-26 09:15:24,785 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-08-26 09:15:24,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:24,798 INFO L225 Difference]: With dead ends: 8583 [2021-08-26 09:15:24,798 INFO L226 Difference]: Without dead ends: 6094 [2021-08-26 09:15:24,804 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 46.3ms TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-08-26 09:15:24,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6094 states. [2021-08-26 09:15:25,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6094 to 2668. [2021-08-26 09:15:25,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2756289898610589) internal successors, (3397), 2667 states have internal predecessors, (3397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:25,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3397 transitions. [2021-08-26 09:15:25,169 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3397 transitions. Word has length 132 [2021-08-26 09:15:25,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:25,169 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3397 transitions. [2021-08-26 09:15:25,170 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:25,170 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3397 transitions. [2021-08-26 09:15:25,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-08-26 09:15:25,176 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:25,176 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:25,177 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-08-26 09:15:25,177 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:25,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:25,177 INFO L82 PathProgramCache]: Analyzing trace with hash 1877464571, now seen corresponding path program 1 times [2021-08-26 09:15:25,178 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:25,178 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118674527] [2021-08-26 09:15:25,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:25,178 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:25,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:25,283 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-08-26 09:15:25,284 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:25,284 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118674527] [2021-08-26 09:15:25,284 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [118674527] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:25,284 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:25,285 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-08-26 09:15:25,285 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871089611] [2021-08-26 09:15:25,286 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-08-26 09:15:25,286 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:25,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-08-26 09:15:25,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-08-26 09:15:25,287 INFO L87 Difference]: Start difference. First operand 2668 states and 3397 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:25,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:25,926 INFO L93 Difference]: Finished difference Result 7775 states and 10081 transitions. [2021-08-26 09:15:25,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-08-26 09:15:25,926 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-08-26 09:15:25,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:25,934 INFO L225 Difference]: With dead ends: 7775 [2021-08-26 09:15:25,935 INFO L226 Difference]: Without dead ends: 5286 [2021-08-26 09:15:25,939 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 43.6ms TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-08-26 09:15:25,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5286 states. [2021-08-26 09:15:26,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5286 to 2668. [2021-08-26 09:15:26,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2741269245212166) internal successors, (3393), 2667 states have internal predecessors, (3393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:26,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3393 transitions. [2021-08-26 09:15:26,277 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3393 transitions. Word has length 136 [2021-08-26 09:15:26,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:26,277 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3393 transitions. [2021-08-26 09:15:26,277 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:26,277 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3393 transitions. [2021-08-26 09:15:26,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-08-26 09:15:26,281 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:26,281 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:26,282 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-08-26 09:15:26,282 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:26,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:26,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1682749301, now seen corresponding path program 1 times [2021-08-26 09:15:26,282 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:26,283 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747879377] [2021-08-26 09:15:26,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:26,283 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:26,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:26,362 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-08-26 09:15:26,362 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:26,362 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747879377] [2021-08-26 09:15:26,363 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747879377] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:26,363 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:26,363 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:26,363 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459495885] [2021-08-26 09:15:26,363 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:26,364 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:26,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:26,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:26,364 INFO L87 Difference]: Start difference. First operand 2668 states and 3393 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:26,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:26,577 INFO L93 Difference]: Finished difference Result 4368 states and 5586 transitions. [2021-08-26 09:15:26,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-08-26 09:15:26,578 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-08-26 09:15:26,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:26,581 INFO L225 Difference]: With dead ends: 4368 [2021-08-26 09:15:26,581 INFO L226 Difference]: Without dead ends: 1841 [2021-08-26 09:15:26,584 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 7.3ms TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:26,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1841 states. [2021-08-26 09:15:26,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1841 to 1841. [2021-08-26 09:15:26,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1841 states, 1836 states have (on average 1.2734204793028323) internal successors, (2338), 1840 states have internal predecessors, (2338), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:26,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1841 states and 2338 transitions. [2021-08-26 09:15:26,787 INFO L78 Accepts]: Start accepts. Automaton has 1841 states and 2338 transitions. Word has length 139 [2021-08-26 09:15:26,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:26,787 INFO L470 AbstractCegarLoop]: Abstraction has 1841 states and 2338 transitions. [2021-08-26 09:15:26,787 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:26,788 INFO L276 IsEmpty]: Start isEmpty. Operand 1841 states and 2338 transitions. [2021-08-26 09:15:26,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-08-26 09:15:26,791 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:26,791 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:26,791 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-08-26 09:15:26,791 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:26,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:26,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1680671061, now seen corresponding path program 1 times [2021-08-26 09:15:26,792 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:26,792 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118455874] [2021-08-26 09:15:26,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:26,792 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:26,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:26,970 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:26,971 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:26,971 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118455874] [2021-08-26 09:15:26,971 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118455874] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:26,971 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [59144387] [2021-08-26 09:15:26,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:26,971 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:26,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:26,973 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:26,974 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-08-26 09:15:27,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:27,279 INFO L263 TraceCheckSpWp]: Trace formula consists of 804 conjuncts, 49 conjunts are in the unsatisfiable core [2021-08-26 09:15:27,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:29,038 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:29,038 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [59144387] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:29,038 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:29,039 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2021-08-26 09:15:29,039 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1627103899] [2021-08-26 09:15:29,039 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2021-08-26 09:15:29,039 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:29,040 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-08-26 09:15:29,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=344, Unknown=0, NotChecked=0, Total=420 [2021-08-26 09:15:29,040 INFO L87 Difference]: Start difference. First operand 1841 states and 2338 transitions. Second operand has 21 states, 21 states have (on average 10.333333333333334) internal successors, (217), 20 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:30,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:30,856 INFO L93 Difference]: Finished difference Result 4475 states and 5726 transitions. [2021-08-26 09:15:30,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2021-08-26 09:15:30,857 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 10.333333333333334) internal successors, (217), 20 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-08-26 09:15:30,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:30,860 INFO L225 Difference]: With dead ends: 4475 [2021-08-26 09:15:30,861 INFO L226 Difference]: Without dead ends: 2823 [2021-08-26 09:15:30,863 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 126 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 627.2ms TimeCoverageRelationStatistics Valid=394, Invalid=1768, Unknown=0, NotChecked=0, Total=2162 [2021-08-26 09:15:30,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2823 states. [2021-08-26 09:15:31,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2823 to 2095. [2021-08-26 09:15:31,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2095 states, 2090 states have (on average 1.2698564593301436) internal successors, (2654), 2094 states have internal predecessors, (2654), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:31,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2095 states to 2095 states and 2654 transitions. [2021-08-26 09:15:31,095 INFO L78 Accepts]: Start accepts. Automaton has 2095 states and 2654 transitions. Word has length 139 [2021-08-26 09:15:31,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:31,096 INFO L470 AbstractCegarLoop]: Abstraction has 2095 states and 2654 transitions. [2021-08-26 09:15:31,096 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 10.333333333333334) internal successors, (217), 20 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:31,096 INFO L276 IsEmpty]: Start isEmpty. Operand 2095 states and 2654 transitions. [2021-08-26 09:15:31,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-08-26 09:15:31,100 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:31,100 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:31,125 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:31,318 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:31,319 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:31,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:31,319 INFO L82 PathProgramCache]: Analyzing trace with hash 1991014633, now seen corresponding path program 1 times [2021-08-26 09:15:31,319 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:31,319 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589348092] [2021-08-26 09:15:31,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:31,319 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:31,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:31,403 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-08-26 09:15:31,403 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:31,403 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589348092] [2021-08-26 09:15:31,403 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589348092] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:31,404 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:31,404 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:31,404 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044902950] [2021-08-26 09:15:31,405 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-08-26 09:15:31,405 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:31,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-26 09:15:31,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:31,406 INFO L87 Difference]: Start difference. First operand 2095 states and 2654 transitions. Second operand has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:31,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:31,707 INFO L93 Difference]: Finished difference Result 3931 states and 5018 transitions. [2021-08-26 09:15:31,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-26 09:15:31,708 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-08-26 09:15:31,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:31,710 INFO L225 Difference]: With dead ends: 3931 [2021-08-26 09:15:31,711 INFO L226 Difference]: Without dead ends: 1966 [2021-08-26 09:15:31,713 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 10.6ms TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-08-26 09:15:31,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1966 states. [2021-08-26 09:15:31,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1966 to 1966. [2021-08-26 09:15:31,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1966 states, 1961 states have (on average 1.2728199898011219) internal successors, (2496), 1965 states have internal predecessors, (2496), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:31,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1966 states to 1966 states and 2496 transitions. [2021-08-26 09:15:31,949 INFO L78 Accepts]: Start accepts. Automaton has 1966 states and 2496 transitions. Word has length 139 [2021-08-26 09:15:31,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:31,949 INFO L470 AbstractCegarLoop]: Abstraction has 1966 states and 2496 transitions. [2021-08-26 09:15:31,949 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:31,949 INFO L276 IsEmpty]: Start isEmpty. Operand 1966 states and 2496 transitions. [2021-08-26 09:15:31,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-08-26 09:15:31,951 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:31,952 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:31,953 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-08-26 09:15:31,953 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:31,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:31,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1475255201, now seen corresponding path program 1 times [2021-08-26 09:15:31,954 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:31,954 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020750340] [2021-08-26 09:15:31,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:31,955 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:31,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:32,108 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:32,108 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:32,109 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020750340] [2021-08-26 09:15:32,109 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020750340] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:32,109 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1209659486] [2021-08-26 09:15:32,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:32,109 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-08-26 09:15:32,109 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-26 09:15:32,113 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-08-26 09:15:32,138 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-08-26 09:15:32,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:32,616 INFO L263 TraceCheckSpWp]: Trace formula consists of 805 conjuncts, 47 conjunts are in the unsatisfiable core [2021-08-26 09:15:32,619 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-08-26 09:15:33,970 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-26 09:15:33,970 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1209659486] provided 0 perfect and 1 imperfect interpolant sequences [2021-08-26 09:15:33,971 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-08-26 09:15:33,971 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2021-08-26 09:15:33,971 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674525625] [2021-08-26 09:15:33,971 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2021-08-26 09:15:33,971 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:33,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-08-26 09:15:33,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2021-08-26 09:15:33,972 INFO L87 Difference]: Start difference. First operand 1966 states and 2496 transitions. Second operand has 21 states, 21 states have (on average 10.761904761904763) internal successors, (226), 20 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:35,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:35,767 INFO L93 Difference]: Finished difference Result 5315 states and 6751 transitions. [2021-08-26 09:15:35,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2021-08-26 09:15:35,768 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 10.761904761904763) internal successors, (226), 20 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-08-26 09:15:35,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:35,772 INFO L225 Difference]: With dead ends: 5315 [2021-08-26 09:15:35,772 INFO L226 Difference]: Without dead ends: 3538 [2021-08-26 09:15:35,774 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 127 SyntacticMatches, 3 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 995 ImplicationChecksByTransitivity, 911.8ms TimeCoverageRelationStatistics Valid=649, Invalid=3133, Unknown=0, NotChecked=0, Total=3782 [2021-08-26 09:15:35,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3538 states. [2021-08-26 09:15:35,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3538 to 2219. [2021-08-26 09:15:35,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2219 states, 2214 states have (on average 1.2669376693766938) internal successors, (2805), 2218 states have internal predecessors, (2805), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:35,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 2805 transitions. [2021-08-26 09:15:35,980 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 2805 transitions. Word has length 140 [2021-08-26 09:15:35,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:35,981 INFO L470 AbstractCegarLoop]: Abstraction has 2219 states and 2805 transitions. [2021-08-26 09:15:35,981 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 10.761904761904763) internal successors, (226), 20 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:35,981 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 2805 transitions. [2021-08-26 09:15:35,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-08-26 09:15:35,984 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:35,984 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:36,010 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-08-26 09:15:36,201 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2021-08-26 09:15:36,202 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:36,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:36,202 INFO L82 PathProgramCache]: Analyzing trace with hash 1593696675, now seen corresponding path program 1 times [2021-08-26 09:15:36,202 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:36,202 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669914150] [2021-08-26 09:15:36,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:36,202 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:36,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-26 09:15:36,250 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-08-26 09:15:36,251 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-26 09:15:36,251 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669914150] [2021-08-26 09:15:36,251 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [669914150] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-26 09:15:36,251 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-26 09:15:36,251 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-26 09:15:36,252 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800753765] [2021-08-26 09:15:36,252 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-08-26 09:15:36,253 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-26 09:15:36,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-26 09:15:36,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:36,253 INFO L87 Difference]: Start difference. First operand 2219 states and 2805 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:36,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-26 09:15:36,544 INFO L93 Difference]: Finished difference Result 4085 states and 5197 transitions. [2021-08-26 09:15:36,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-08-26 09:15:36,544 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-08-26 09:15:36,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-08-26 09:15:36,547 INFO L225 Difference]: With dead ends: 4085 [2021-08-26 09:15:36,548 INFO L226 Difference]: Without dead ends: 1998 [2021-08-26 09:15:36,550 INFO L781 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.2ms TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-08-26 09:15:36,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1998 states. [2021-08-26 09:15:36,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1998 to 1990. [2021-08-26 09:15:36,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1990 states, 1985 states have (on average 1.2644836272040303) internal successors, (2510), 1989 states have internal predecessors, (2510), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:36,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1990 states to 1990 states and 2510 transitions. [2021-08-26 09:15:36,804 INFO L78 Accepts]: Start accepts. Automaton has 1990 states and 2510 transitions. Word has length 140 [2021-08-26 09:15:36,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-08-26 09:15:36,804 INFO L470 AbstractCegarLoop]: Abstraction has 1990 states and 2510 transitions. [2021-08-26 09:15:36,804 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-26 09:15:36,804 INFO L276 IsEmpty]: Start isEmpty. Operand 1990 states and 2510 transitions. [2021-08-26 09:15:36,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-08-26 09:15:36,806 INFO L504 BasicCegarLoop]: Found error trace [2021-08-26 09:15:36,806 INFO L512 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-26 09:15:36,807 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-08-26 09:15:36,807 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-08-26 09:15:36,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-26 09:15:36,807 INFO L82 PathProgramCache]: Analyzing trace with hash 458292102, now seen corresponding path program 1 times [2021-08-26 09:15:36,807 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-26 09:15:36,808 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606164704] [2021-08-26 09:15:36,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-26 09:15:36,808 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-26 09:15:36,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-26 09:15:36,865 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-26 09:15:36,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-26 09:15:36,992 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-26 09:15:36,995 INFO L626 BasicCegarLoop]: Counterexample is feasible [2021-08-26 09:15:36,997 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:36,998 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:36,999 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:36,999 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:36,999 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:36,999 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,000 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,000 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,000 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,001 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,001 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,001 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,001 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,001 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,001 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,002 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,002 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,003 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,003 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,003 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,003 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,003 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,004 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-08-26 09:15:37,004 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-08-26 09:15:37,012 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-08-26 09:15:37,194 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.08 09:15:37 BoogieIcfgContainer [2021-08-26 09:15:37,194 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-08-26 09:15:37,195 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-08-26 09:15:37,195 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-08-26 09:15:37,195 INFO L275 PluginConnector]: Witness Printer initialized [2021-08-26 09:15:37,196 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.08 09:15:00" (3/4) ... [2021-08-26 09:15:37,197 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-08-26 09:15:37,404 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2021-08-26 09:15:37,405 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-08-26 09:15:37,407 INFO L168 Benchmark]: Toolchain (without parser) took 38753.05 ms. Allocated memory was 60.8 MB in the beginning and 1.7 GB in the end (delta: 1.6 GB). Free memory was 41.0 MB in the beginning and 1.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 279.8 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,407 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 60.8 MB. Free memory is still 43.0 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-08-26 09:15:37,408 INFO L168 Benchmark]: CACSL2BoogieTranslator took 341.28 ms. Allocated memory is still 60.8 MB. Free memory was 40.8 MB in the beginning and 39.5 MB in the end (delta: 1.3 MB). Peak memory consumption was 14.7 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,408 INFO L168 Benchmark]: Boogie Procedure Inliner took 64.78 ms. Allocated memory is still 60.8 MB. Free memory was 39.5 MB in the beginning and 34.7 MB in the end (delta: 4.9 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,408 INFO L168 Benchmark]: Boogie Preprocessor took 53.71 ms. Allocated memory is still 60.8 MB. Free memory was 34.7 MB in the beginning and 31.2 MB in the end (delta: 3.5 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,409 INFO L168 Benchmark]: RCFGBuilder took 987.17 ms. Allocated memory was 60.8 MB in the beginning and 79.7 MB in the end (delta: 18.9 MB). Free memory was 31.2 MB in the beginning and 33.5 MB in the end (delta: -2.4 MB). Peak memory consumption was 21.8 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,409 INFO L168 Benchmark]: TraceAbstraction took 37089.92 ms. Allocated memory was 79.7 MB in the beginning and 1.7 GB in the end (delta: 1.6 GB). Free memory was 33.4 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 208.1 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,409 INFO L168 Benchmark]: Witness Printer took 210.51 ms. Allocated memory is still 1.7 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 45.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. [2021-08-26 09:15:37,413 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 60.8 MB. Free memory is still 43.0 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 341.28 ms. Allocated memory is still 60.8 MB. Free memory was 40.8 MB in the beginning and 39.5 MB in the end (delta: 1.3 MB). Peak memory consumption was 14.7 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 64.78 ms. Allocated memory is still 60.8 MB. Free memory was 39.5 MB in the beginning and 34.7 MB in the end (delta: 4.9 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 53.71 ms. Allocated memory is still 60.8 MB. Free memory was 34.7 MB in the beginning and 31.2 MB in the end (delta: 3.5 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 987.17 ms. Allocated memory was 60.8 MB in the beginning and 79.7 MB in the end (delta: 18.9 MB). Free memory was 31.2 MB in the beginning and 33.5 MB in the end (delta: -2.4 MB). Peak memory consumption was 21.8 MB. Max. memory is 16.1 GB. * TraceAbstraction took 37089.92 ms. Allocated memory was 79.7 MB in the beginning and 1.7 GB in the end (delta: 1.6 GB). Free memory was 33.4 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 208.1 MB. Max. memory is 16.1 GB. * Witness Printer took 210.51 ms. Allocated memory is still 1.7 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 45.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0ms ErrorAutomatonConstructionTimeTotal, 0.0ms FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0ms ErrorAutomatonConstructionTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeAvg, 0.0ms ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; [L413] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L535] int c1 ; [L536] int i2 ; [L539] c1 = 0 [L540] side1Failed = __VERIFIER_nondet_bool() [L541] side2Failed = __VERIFIER_nondet_bool() [L542] side1_written = __VERIFIER_nondet_char() [L543] side2_written = __VERIFIER_nondet_char() [L544] side1Failed_History_0 = __VERIFIER_nondet_bool() [L545] side1Failed_History_1 = __VERIFIER_nondet_bool() [L546] side1Failed_History_2 = __VERIFIER_nondet_bool() [L547] side2Failed_History_0 = __VERIFIER_nondet_bool() [L548] side2Failed_History_1 = __VERIFIER_nondet_bool() [L549] side2Failed_History_2 = __VERIFIER_nondet_bool() [L550] active_side_History_0 = __VERIFIER_nondet_char() [L551] active_side_History_1 = __VERIFIER_nondet_char() [L552] active_side_History_2 = __VERIFIER_nondet_char() [L553] manual_selection_History_0 = __VERIFIER_nondet_char() [L554] manual_selection_History_1 = __VERIFIER_nondet_char() [L555] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L556] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L558] cs1_old = nomsg [L559] cs1_new = nomsg [L560] cs2_old = nomsg [L561] cs2_new = nomsg [L562] s1s2_old = nomsg [L563] s1s2_new = nomsg [L564] s1s1_old = nomsg [L565] s1s1_new = nomsg [L566] s2s1_old = nomsg [L567] s2s1_new = nomsg [L568] s2s2_old = nomsg [L569] s2s2_new = nomsg [L570] s1p_old = nomsg [L571] s1p_new = nomsg [L572] s2p_old = nomsg [L573] s2p_new = nomsg [L574] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L575] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L581] cs1_old = cs1_new [L582] cs1_new = nomsg [L583] cs2_old = cs2_new [L584] cs2_new = nomsg [L585] s1s2_old = s1s2_new [L586] s1s2_new = nomsg [L587] s1s1_old = s1s1_new [L588] s1s1_new = nomsg [L589] s2s1_old = s2s1_new [L590] s2s1_new = nomsg [L591] s2s2_old = s2s2_new [L592] s2s2_new = nomsg [L593] s1p_old = s1p_new [L594] s1p_new = nomsg [L595] s2p_old = s2p_new [L596] s2p_new = nomsg [L416] int tmp ; [L417] msg_t tmp___0 ; [L418] _Bool tmp___1 ; [L419] _Bool tmp___2 ; [L420] _Bool tmp___3 ; [L421] _Bool tmp___4 ; [L422] int8_t tmp___5 ; [L423] _Bool tmp___6 ; [L424] _Bool tmp___7 ; [L425] _Bool tmp___8 ; [L426] int8_t tmp___9 ; [L427] _Bool tmp___10 ; [L428] _Bool tmp___11 ; [L429] _Bool tmp___12 ; [L430] msg_t tmp___13 ; [L431] _Bool tmp___14 ; [L432] _Bool tmp___15 ; [L433] _Bool tmp___16 ; [L434] _Bool tmp___17 ; [L435] int8_t tmp___18 ; [L436] int8_t tmp___19 ; [L437] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L440] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L443] COND TRUE ! side2Failed [L444] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L449] tmp___0 = read_manual_selection_history((unsigned char)1) [L450] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] tmp___1 = read_side1_failed_history((unsigned char)1) [L452] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L453] tmp___2 = read_side1_failed_history((unsigned char)0) [L454] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L479] tmp___7 = read_side1_failed_history((unsigned char)1) [L480] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L495] tmp___11 = read_side1_failed_history((unsigned char)1) [L496] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L497] tmp___12 = read_side2_failed_history((unsigned char)1) [L498] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L511] tmp___20 = read_active_side_history((unsigned char)2) [L512] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L530] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L597] c1 = check() [L609] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L575] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-128, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-128, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L581] cs1_old = cs1_new [L582] cs1_new = nomsg [L583] cs2_old = cs2_new [L584] cs2_new = nomsg [L585] s1s2_old = s1s2_new [L586] s1s2_new = nomsg [L587] s1s1_old = s1s1_new [L588] s1s1_new = nomsg [L589] s2s1_old = s2s1_new [L590] s2s1_new = nomsg [L591] s2s2_old = s2s2_new [L592] s2s2_new = nomsg [L593] s1p_old = s1p_new [L594] s1p_new = nomsg [L595] s2p_old = s2p_new [L596] s2p_new = nomsg [L416] int tmp ; [L417] msg_t tmp___0 ; [L418] _Bool tmp___1 ; [L419] _Bool tmp___2 ; [L420] _Bool tmp___3 ; [L421] _Bool tmp___4 ; [L422] int8_t tmp___5 ; [L423] _Bool tmp___6 ; [L424] _Bool tmp___7 ; [L425] _Bool tmp___8 ; [L426] int8_t tmp___9 ; [L427] _Bool tmp___10 ; [L428] _Bool tmp___11 ; [L429] _Bool tmp___12 ; [L430] msg_t tmp___13 ; [L431] _Bool tmp___14 ; [L432] _Bool tmp___15 ; [L433] _Bool tmp___16 ; [L434] _Bool tmp___17 ; [L435] int8_t tmp___18 ; [L436] int8_t tmp___19 ; [L437] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L440] COND TRUE ! side1Failed [L441] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L449] tmp___0 = read_manual_selection_history((unsigned char)1) [L450] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L479] tmp___7 = read_side1_failed_history((unsigned char)1) [L480] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L481] tmp___8 = read_side2_failed_history((unsigned char)1) [L482] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L483] tmp___5 = read_active_side_history((unsigned char)0) [L484] COND TRUE ! ((int )tmp___5 == 2) [L485] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L597] c1 = check() [L609] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L611] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-128, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 294 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 36829.7ms, OverallIterations: 38, TraceHistogramMax: 2, EmptinessCheckTime: 80.9ms, AutomataDifference: 21529.9ms, DeadEndRemovalTime: 0.0ms, HoareAnnotationTime: 0.0ms, InitialAbstractionConstructionTime: 18.1ms, PartialOrderReductionTime: 0.0ms, HoareTripleCheckerStatistics: 16794 SDtfs, 37788 SDslu, 45221 SDs, 0 SdLazy, 8629 SolverSat, 588 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4789.7ms Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1379 GetRequests, 842 SyntacticMatches, 7 SemanticMatches, 530 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30787 ImplicationChecksByTransitivity, 7565.8ms Time, 0.0ms BasicInterpolantAutomatonTime, BiggestAbstraction: size=2668occurred in iteration=30, InterpolantAutomatonStates: 536, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0ms DumpTime, AutomataMinimizationStatistics: 4102.7ms AutomataMinimizationTime, 37 MinimizatonAttempts, 44441 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 369.0ms SsaConstructionTime, 1418.6ms SatisfiabilityAnalysisTime, 6650.0ms InterpolantComputationTime, 3987 NumberOfCodeBlocks, 3987 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3804 ConstructedInterpolants, 0 QuantifiedInterpolants, 14646 SizeOfPredicates, 36 NumberOfNonLiveVariables, 3822 ConjunctsInSsa, 132 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-08-26 09:15:37,464 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...