./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/pc_sfifo_3.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 5fbdf5bf Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/pc_sfifo_3.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9ce92743863c5d30c478a48a973506d73113681a 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Execution finished normally Using bit-precise analysis No suitable file found in config dir /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config using search string *Termination*32bit*_Bitvector*.epf No suitable settings file found using Termination*32bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: ClassCastException: class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator cannot be cast to class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData (de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator and de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData are in unnamed module of loader org.eclipse.osgi.internal.loader.EquinoxClassLoader @560348e6) --- Real Ultimate output --- This is Ultimate 0.2.1-wip.dd.seqcomp-5fbdf5b [2021-08-31 04:18:14,138 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-08-31 04:18:14,140 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-08-31 04:18:14,169 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-08-31 04:18:14,170 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-08-31 04:18:14,172 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-08-31 04:18:14,173 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-08-31 04:18:14,177 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-08-31 04:18:14,179 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-08-31 04:18:14,182 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-08-31 04:18:14,192 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-08-31 04:18:14,193 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-08-31 04:18:14,193 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-08-31 04:18:14,195 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-08-31 04:18:14,196 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-08-31 04:18:14,200 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-08-31 04:18:14,201 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-08-31 04:18:14,201 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-08-31 04:18:14,203 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-08-31 04:18:14,207 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-08-31 04:18:14,208 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-08-31 04:18:14,209 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-08-31 04:18:14,210 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-08-31 04:18:14,211 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-08-31 04:18:14,215 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-08-31 04:18:14,215 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-08-31 04:18:14,216 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-08-31 04:18:14,217 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-08-31 04:18:14,217 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-08-31 04:18:14,217 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-08-31 04:18:14,217 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-08-31 04:18:14,218 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-08-31 04:18:14,219 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-08-31 04:18:14,219 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-08-31 04:18:14,220 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-08-31 04:18:14,220 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-08-31 04:18:14,221 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-08-31 04:18:14,221 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-08-31 04:18:14,221 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-08-31 04:18:14,222 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-08-31 04:18:14,223 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-08-31 04:18:14,226 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-08-31 04:18:14,253 INFO L113 SettingsManager]: Loading preferences was successful [2021-08-31 04:18:14,253 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-08-31 04:18:14,254 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-08-31 04:18:14,254 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-08-31 04:18:14,255 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-08-31 04:18:14,255 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-08-31 04:18:14,255 INFO L138 SettingsManager]: * Use SBE=true [2021-08-31 04:18:14,256 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-08-31 04:18:14,256 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-08-31 04:18:14,256 INFO L138 SettingsManager]: * Use old map elimination=false [2021-08-31 04:18:14,256 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-08-31 04:18:14,256 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-08-31 04:18:14,256 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-08-31 04:18:14,257 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * sizeof long=4 [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * sizeof long double=12 [2021-08-31 04:18:14,257 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-08-31 04:18:14,258 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-08-31 04:18:14,258 INFO L138 SettingsManager]: * Use constant arrays=true [2021-08-31 04:18:14,258 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-08-31 04:18:14,258 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-08-31 04:18:14,258 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-08-31 04:18:14,258 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-08-31 04:18:14,258 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-08-31 04:18:14,258 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-08-31 04:18:14,259 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-08-31 04:18:14,259 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9ce92743863c5d30c478a48a973506d73113681a [2021-08-31 04:18:14,541 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-08-31 04:18:14,562 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-08-31 04:18:14,564 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-08-31 04:18:14,564 INFO L271 PluginConnector]: Initializing CDTParser... [2021-08-31 04:18:14,565 INFO L275 PluginConnector]: CDTParser initialized [2021-08-31 04:18:14,566 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/pc_sfifo_3.cil.c [2021-08-31 04:18:14,618 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e74909313/0c13ac51ca7f45b99d2a570810605c4a/FLAG126dc95ea [2021-08-31 04:18:15,010 INFO L306 CDTParser]: Found 1 translation units. [2021-08-31 04:18:15,013 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_3.cil.c [2021-08-31 04:18:15,024 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e74909313/0c13ac51ca7f45b99d2a570810605c4a/FLAG126dc95ea [2021-08-31 04:18:15,035 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e74909313/0c13ac51ca7f45b99d2a570810605c4a [2021-08-31 04:18:15,036 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-08-31 04:18:15,038 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-08-31 04:18:15,040 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-08-31 04:18:15,040 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-08-31 04:18:15,042 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-08-31 04:18:15,042 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,043 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@23696676 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15, skipping insertion in model container [2021-08-31 04:18:15,043 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,047 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-08-31 04:18:15,076 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-08-31 04:18:15,183 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_3.cil.c[335,348] [2021-08-31 04:18:15,238 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-31 04:18:15,259 INFO L203 MainTranslator]: Completed pre-run [2021-08-31 04:18:15,277 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pc_sfifo_3.cil.c[335,348] [2021-08-31 04:18:15,301 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-08-31 04:18:15,319 INFO L208 MainTranslator]: Completed translation [2021-08-31 04:18:15,319 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15 WrapperNode [2021-08-31 04:18:15,319 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-08-31 04:18:15,320 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-08-31 04:18:15,320 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-08-31 04:18:15,320 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-08-31 04:18:15,324 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,339 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,372 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-08-31 04:18:15,374 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-08-31 04:18:15,374 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-08-31 04:18:15,374 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-08-31 04:18:15,379 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,380 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,385 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,385 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,394 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,402 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,407 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,409 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-08-31 04:18:15,411 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-08-31 04:18:15,411 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-08-31 04:18:15,412 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-08-31 04:18:15,412 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (1/1) ... [2021-08-31 04:18:15,417 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-08-31 04:18:15,424 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2021-08-31 04:18:15,433 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-08-31 04:18:15,452 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-08-31 04:18:15,461 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-08-31 04:18:15,461 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-08-31 04:18:15,461 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-08-31 04:18:15,461 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-08-31 04:18:15,598 INFO L757 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##104: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0; [2021-08-31 04:18:15,599 INFO L757 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##105: assume !(1 == ~q_free~0); [2021-08-31 04:18:15,603 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-08-31 04:18:15,603 INFO L299 CfgBuilder]: Removed 70 assume(true) statements. [2021-08-31 04:18:15,604 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.08 04:18:15 BoogieIcfgContainer [2021-08-31 04:18:15,605 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-08-31 04:18:15,605 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-08-31 04:18:15,605 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-08-31 04:18:15,607 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-08-31 04:18:15,608 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-08-31 04:18:15,608 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 31.08 04:18:15" (1/3) ... [2021-08-31 04:18:15,608 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5e488462 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.08 04:18:15, skipping insertion in model container [2021-08-31 04:18:15,608 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-08-31 04:18:15,609 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.08 04:18:15" (2/3) ... [2021-08-31 04:18:15,609 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5e488462 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 31.08 04:18:15, skipping insertion in model container [2021-08-31 04:18:15,609 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-08-31 04:18:15,609 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.08 04:18:15" (3/3) ... [2021-08-31 04:18:15,610 INFO L389 chiAutomizerObserver]: Analyzing ICFG pc_sfifo_3.cil.c [2021-08-31 04:18:15,657 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-08-31 04:18:15,658 INFO L360 BuchiCegarLoop]: Hoare is false [2021-08-31 04:18:15,658 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-08-31 04:18:15,658 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-08-31 04:18:15,658 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-08-31 04:18:15,658 INFO L364 BuchiCegarLoop]: Difference is false [2021-08-31 04:18:15,658 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-08-31 04:18:15,658 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-08-31 04:18:15,669 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 129 states, 128 states have (on average 1.6171875) internal successors, (207), 128 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:15,683 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 94 [2021-08-31 04:18:15,683 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:15,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:15,688 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:15,688 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:15,688 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-08-31 04:18:15,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 129 states, 128 states have (on average 1.6171875) internal successors, (207), 128 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:15,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 94 [2021-08-31 04:18:15,693 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:15,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:15,695 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:15,695 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:15,699 INFO L791 eck$LassoCheckResult]: Stem: 118#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 40#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 46#L543true havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 76#L250true assume !(1 == ~q_req_up~0); 86#L250-1true assume !(1 == ~p_dw_i~0);~p_dw_st~0 := 2; 116#L265-1true assume !(1 == ~c_dr_i~0);~c_dr_st~0 := 2; 15#L270-1true assume !(0 == ~q_read_ev~0); 93#L303-1true assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 31#L308-1true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 39#L58true assume 1 == ~p_dw_pc~0; 103#L59true assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 52#L79true is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 10#L80true activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 104#L379true assume !(0 != activate_threads_~tmp~1); 100#L379-2true havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 55#L87true assume 1 == ~c_dr_pc~0; 84#L88true assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 29#L108true is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 109#L109true activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 48#L387true assume !(0 != activate_threads_~tmp___0~1); 95#L387-2true assume !(1 == ~q_read_ev~0); 74#L321-1true assume !(1 == ~q_write_ev~0); 72#L483-1true [2021-08-31 04:18:15,700 INFO L793 eck$LassoCheckResult]: Loop: 72#L483-1true assume !false; 121#L484true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 75#L427true assume !true; 59#L443true start_simulation_~kernel_st~0 := 2; 106#L250-2true assume !(1 == ~q_req_up~0); 119#L250-3true start_simulation_~kernel_st~0 := 3; 83#L303-2true assume !(0 == ~q_read_ev~0); 73#L303-4true assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 122#L308-3true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 43#L58-3true assume 1 == ~p_dw_pc~0; 13#L59-1true assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 110#L79-1true is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 113#L80-1true activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 64#L379-3true assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 4#L379-5true havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 30#L87-3true assume 1 == ~c_dr_pc~0; 115#L88-1true assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 70#L108-1true is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 120#L109-1true activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 111#L387-3true assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 36#L387-5true assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 67#L321-3true assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 91#L326-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 65#L283-1true assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 97#L295-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 63#L296-1true start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 41#L502true assume !(0 == start_simulation_~tmp~4); 112#L502-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 18#L283-2true assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 35#L295-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 38#L296-2true stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 23#L457true assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 108#L464true stop_simulation_#res := stop_simulation_~__retres2~0; 130#L465true start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 42#L515true assume !(0 != start_simulation_~tmp___0~3); 72#L483-1true [2021-08-31 04:18:15,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:15,704 INFO L82 PathProgramCache]: Analyzing trace with hash -598217252, now seen corresponding path program 1 times [2021-08-31 04:18:15,709 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:15,709 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [384025837] [2021-08-31 04:18:15,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:15,710 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:15,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:15,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:15,833 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:15,833 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [384025837] [2021-08-31 04:18:15,834 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [384025837] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:15,834 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:15,834 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-31 04:18:15,835 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805959133] [2021-08-31 04:18:15,838 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-31 04:18:15,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:15,838 INFO L82 PathProgramCache]: Analyzing trace with hash -556986804, now seen corresponding path program 1 times [2021-08-31 04:18:15,839 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:15,839 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340751619] [2021-08-31 04:18:15,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:15,839 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:15,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:15,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:15,850 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:15,851 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340751619] [2021-08-31 04:18:15,851 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1340751619] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:15,851 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:15,851 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-08-31 04:18:15,851 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833437371] [2021-08-31 04:18:15,852 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:15,853 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:15,870 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-31 04:18:15,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-31 04:18:15,872 INFO L87 Difference]: Start difference. First operand has 129 states, 128 states have (on average 1.6171875) internal successors, (207), 128 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:16,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:16,105 INFO L93 Difference]: Finished difference Result 129 states and 196 transitions. [2021-08-31 04:18:16,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-31 04:18:16,109 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 196 transitions. [2021-08-31 04:18:16,112 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 92 [2021-08-31 04:18:16,126 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 123 states and 190 transitions. [2021-08-31 04:18:16,127 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 123 [2021-08-31 04:18:16,127 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 123 [2021-08-31 04:18:16,127 INFO L73 IsDeterministic]: Start isDeterministic. Operand 123 states and 190 transitions. [2021-08-31 04:18:16,128 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:16,128 INFO L681 BuchiCegarLoop]: Abstraction has 123 states and 190 transitions. [2021-08-31 04:18:16,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states and 190 transitions. [2021-08-31 04:18:16,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2021-08-31 04:18:16,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 123 states have (on average 1.5447154471544715) internal successors, (190), 122 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:16,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 190 transitions. [2021-08-31 04:18:16,160 INFO L704 BuchiCegarLoop]: Abstraction has 123 states and 190 transitions. [2021-08-31 04:18:16,160 INFO L587 BuchiCegarLoop]: Abstraction has 123 states and 190 transitions. [2021-08-31 04:18:16,161 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-08-31 04:18:16,161 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 123 states and 190 transitions. [2021-08-31 04:18:16,162 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 92 [2021-08-31 04:18:16,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:16,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:16,165 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:16,167 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:16,167 INFO L791 eck$LassoCheckResult]: Stem: 389#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 336#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 337#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 345#L250 assume !(1 == ~q_req_up~0); 351#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 379#L265-1 assume !(1 == ~c_dr_i~0);~c_dr_st~0 := 2; 293#L270-1 assume !(0 == ~q_read_ev~0); 294#L303-1 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 325#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 326#L58 assume 1 == ~p_dw_pc~0; 335#L59 assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 304#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 281#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 282#L379 assume !(0 != activate_threads_~tmp~1); 382#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 353#L87 assume 1 == ~c_dr_pc~0; 354#L88 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 321#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 322#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 346#L387 assume !(0 != activate_threads_~tmp___0~1); 347#L387-2 assume !(1 == ~q_read_ev~0); 372#L321-1 assume !(1 == ~q_write_ev~0); 342#L483-1 [2021-08-31 04:18:16,167 INFO L793 eck$LassoCheckResult]: Loop: 342#L483-1 assume !false; 369#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 328#L427 assume !false; 349#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 350#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 272#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 273#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 290#L407 assume !(0 != eval_~tmp___1~0); 292#L443 start_simulation_~kernel_st~0 := 2; 356#L250-2 assume !(1 == ~q_req_up~0); 385#L250-3 start_simulation_~kernel_st~0 := 3; 378#L303-2 assume !(0 == ~q_read_ev~0); 370#L303-4 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 371#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 343#L58-3 assume 1 == ~p_dw_pc~0; 287#L59-1 assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 288#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 387#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 359#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 267#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 268#L87-3 assume 1 == ~c_dr_pc~0; 324#L88-1 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 306#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 368#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 388#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 332#L387-5 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 333#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 364#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 360#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 362#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 358#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 338#L502 assume !(0 == start_simulation_~tmp~4); 339#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 301#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 302#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 331#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 314#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 315#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 386#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 341#L515 assume !(0 != start_simulation_~tmp___0~3); 342#L483-1 [2021-08-31 04:18:16,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:16,169 INFO L82 PathProgramCache]: Analyzing trace with hash 1395927454, now seen corresponding path program 1 times [2021-08-31 04:18:16,169 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:16,169 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103536666] [2021-08-31 04:18:16,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:16,170 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:16,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:16,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:16,214 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:16,214 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103536666] [2021-08-31 04:18:16,215 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103536666] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:16,215 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:16,215 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-31 04:18:16,215 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128706659] [2021-08-31 04:18:16,215 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-31 04:18:16,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:16,216 INFO L82 PathProgramCache]: Analyzing trace with hash -1442702753, now seen corresponding path program 1 times [2021-08-31 04:18:16,216 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:16,216 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734973579] [2021-08-31 04:18:16,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:16,218 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:16,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:16,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:16,253 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:16,254 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734973579] [2021-08-31 04:18:16,254 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1734973579] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:16,254 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:16,254 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:16,254 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288567194] [2021-08-31 04:18:16,255 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:16,255 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:16,255 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-31 04:18:16,255 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-31 04:18:16,256 INFO L87 Difference]: Start difference. First operand 123 states and 190 transitions. cyclomatic complexity: 68 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:16,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:16,448 INFO L93 Difference]: Finished difference Result 123 states and 189 transitions. [2021-08-31 04:18:16,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-31 04:18:16,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 123 states and 189 transitions. [2021-08-31 04:18:16,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 92 [2021-08-31 04:18:16,457 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 123 states to 123 states and 189 transitions. [2021-08-31 04:18:16,457 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 123 [2021-08-31 04:18:16,457 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 123 [2021-08-31 04:18:16,457 INFO L73 IsDeterministic]: Start isDeterministic. Operand 123 states and 189 transitions. [2021-08-31 04:18:16,458 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:16,458 INFO L681 BuchiCegarLoop]: Abstraction has 123 states and 189 transitions. [2021-08-31 04:18:16,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states and 189 transitions. [2021-08-31 04:18:16,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2021-08-31 04:18:16,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 123 states have (on average 1.5365853658536586) internal successors, (189), 122 states have internal predecessors, (189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:16,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 189 transitions. [2021-08-31 04:18:16,472 INFO L704 BuchiCegarLoop]: Abstraction has 123 states and 189 transitions. [2021-08-31 04:18:16,472 INFO L587 BuchiCegarLoop]: Abstraction has 123 states and 189 transitions. [2021-08-31 04:18:16,472 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-08-31 04:18:16,472 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 123 states and 189 transitions. [2021-08-31 04:18:16,473 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 92 [2021-08-31 04:18:16,473 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:16,473 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:16,474 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:16,474 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:16,474 INFO L791 eck$LassoCheckResult]: Stem: 644#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 591#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 592#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 600#L250 assume !(1 == ~q_req_up~0); 606#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 634#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 548#L270-1 assume !(0 == ~q_read_ev~0); 549#L303-1 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 580#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 581#L58 assume 1 == ~p_dw_pc~0; 590#L59 assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 559#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 536#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 537#L379 assume !(0 != activate_threads_~tmp~1); 637#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 608#L87 assume 1 == ~c_dr_pc~0; 609#L88 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 576#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 577#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 601#L387 assume !(0 != activate_threads_~tmp___0~1); 602#L387-2 assume !(1 == ~q_read_ev~0); 627#L321-1 assume !(1 == ~q_write_ev~0); 597#L483-1 [2021-08-31 04:18:16,475 INFO L793 eck$LassoCheckResult]: Loop: 597#L483-1 assume !false; 624#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 583#L427 assume !false; 604#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 605#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 527#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 528#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 545#L407 assume !(0 != eval_~tmp___1~0); 547#L443 start_simulation_~kernel_st~0 := 2; 611#L250-2 assume !(1 == ~q_req_up~0); 640#L250-3 start_simulation_~kernel_st~0 := 3; 633#L303-2 assume !(0 == ~q_read_ev~0); 625#L303-4 assume 0 == ~q_write_ev~0;~q_write_ev~0 := 1; 626#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 598#L58-3 assume 1 == ~p_dw_pc~0; 542#L59-1 assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 543#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 642#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 614#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 522#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 523#L87-3 assume 1 == ~c_dr_pc~0; 579#L88-1 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 561#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 623#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 643#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 587#L387-5 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 588#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 619#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 615#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 617#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 613#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 593#L502 assume !(0 == start_simulation_~tmp~4); 594#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 556#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 557#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 586#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 569#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 570#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 641#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 596#L515 assume !(0 != start_simulation_~tmp___0~3); 597#L483-1 [2021-08-31 04:18:16,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:16,477 INFO L82 PathProgramCache]: Analyzing trace with hash -1310691940, now seen corresponding path program 1 times [2021-08-31 04:18:16,477 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:16,477 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068176158] [2021-08-31 04:18:16,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:16,478 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:16,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:16,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:16,531 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:16,531 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2068176158] [2021-08-31 04:18:16,531 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2068176158] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:16,532 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:16,532 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-31 04:18:16,532 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112591514] [2021-08-31 04:18:16,532 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-31 04:18:16,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:16,533 INFO L82 PathProgramCache]: Analyzing trace with hash -1442702753, now seen corresponding path program 2 times [2021-08-31 04:18:16,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:16,533 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690582939] [2021-08-31 04:18:16,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:16,533 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:16,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:16,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:16,560 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:16,560 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690582939] [2021-08-31 04:18:16,561 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690582939] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:16,561 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:16,561 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:16,561 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639395251] [2021-08-31 04:18:16,561 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:16,561 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:16,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-08-31 04:18:16,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-08-31 04:18:16,562 INFO L87 Difference]: Start difference. First operand 123 states and 189 transitions. cyclomatic complexity: 67 Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:16,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:16,938 INFO L93 Difference]: Finished difference Result 251 states and 380 transitions. [2021-08-31 04:18:16,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-08-31 04:18:16,939 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 251 states and 380 transitions. [2021-08-31 04:18:16,954 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 189 [2021-08-31 04:18:16,956 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 251 states to 251 states and 380 transitions. [2021-08-31 04:18:16,956 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 251 [2021-08-31 04:18:16,956 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 251 [2021-08-31 04:18:16,956 INFO L73 IsDeterministic]: Start isDeterministic. Operand 251 states and 380 transitions. [2021-08-31 04:18:16,957 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:16,957 INFO L681 BuchiCegarLoop]: Abstraction has 251 states and 380 transitions. [2021-08-31 04:18:16,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states and 380 transitions. [2021-08-31 04:18:16,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 251. [2021-08-31 04:18:16,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 251 states, 251 states have (on average 1.5139442231075697) internal successors, (380), 250 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:16,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 380 transitions. [2021-08-31 04:18:16,973 INFO L704 BuchiCegarLoop]: Abstraction has 251 states and 380 transitions. [2021-08-31 04:18:16,973 INFO L587 BuchiCegarLoop]: Abstraction has 251 states and 380 transitions. [2021-08-31 04:18:16,973 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-08-31 04:18:16,973 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 251 states and 380 transitions. [2021-08-31 04:18:16,974 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 189 [2021-08-31 04:18:16,974 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:16,974 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:16,975 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:16,975 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:16,975 INFO L791 eck$LassoCheckResult]: Stem: 1060#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 979#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 980#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 991#L250 assume !(1 == ~q_req_up~0); 1029#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 1153#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 1152#L270-1 assume !(0 == ~q_read_ev~0); 1151#L303-1 assume !(0 == ~q_write_ev~0); 1150#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 1149#L58 assume 1 == ~p_dw_pc~0; 1147#L59 assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 1144#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 1143#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1142#L379 assume !(0 != activate_threads_~tmp~1); 1141#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 1140#L87 assume 1 == ~c_dr_pc~0; 1138#L88 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 962#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 963#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 992#L387 assume !(0 != activate_threads_~tmp___0~1); 993#L387-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 1041#L321-1 assume !(1 == ~q_write_ev~0); 1022#L483-1 [2021-08-31 04:18:16,976 INFO L793 eck$LassoCheckResult]: Loop: 1022#L483-1 assume !false; 1023#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 1027#L427 assume !false; 1028#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1038#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 913#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 914#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 1074#L407 assume !(0 != eval_~tmp___1~0); 1006#L443 start_simulation_~kernel_st~0 := 2; 1007#L250-2 assume !(1 == ~q_req_up~0); 1061#L250-3 start_simulation_~kernel_st~0 := 3; 1062#L303-2 assume !(0 == ~q_read_ev~0); 1072#L303-4 assume !(0 == ~q_write_ev~0); 1068#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 1135#L58-3 assume 1 == ~p_dw_pc~0; 928#L59-1 assume 1 == ~fast_clk_edge~0;is_do_write_p_triggered_~__retres1~0 := 1; 929#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 1056#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1011#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 908#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 909#L87-3 assume 1 == ~c_dr_pc~0; 965#L88-1 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 947#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 1020#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1057#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 974#L387-5 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 975#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 1016#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1012#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 1014#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1116#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 981#L502 assume !(0 == start_simulation_~tmp~4); 982#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 942#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 943#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 973#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 1088#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 1052#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 1053#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 1065#L515 assume !(0 != start_simulation_~tmp___0~3); 1022#L483-1 [2021-08-31 04:18:16,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:16,976 INFO L82 PathProgramCache]: Analyzing trace with hash 1704411616, now seen corresponding path program 1 times [2021-08-31 04:18:16,976 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:16,976 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719101895] [2021-08-31 04:18:16,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:16,977 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:16,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:17,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:17,020 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:17,020 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719101895] [2021-08-31 04:18:17,020 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [719101895] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:17,021 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:17,022 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-31 04:18:17,022 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872638920] [2021-08-31 04:18:17,022 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-31 04:18:17,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:17,023 INFO L82 PathProgramCache]: Analyzing trace with hash -1952175843, now seen corresponding path program 1 times [2021-08-31 04:18:17,023 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:17,023 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025716996] [2021-08-31 04:18:17,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:17,024 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:17,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:17,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:17,060 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:17,060 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025716996] [2021-08-31 04:18:17,060 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2025716996] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:17,060 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:17,061 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:17,061 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190779043] [2021-08-31 04:18:17,061 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:17,061 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:17,062 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-31 04:18:17,062 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-31 04:18:17,062 INFO L87 Difference]: Start difference. First operand 251 states and 380 transitions. cyclomatic complexity: 131 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:17,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:17,546 INFO L93 Difference]: Finished difference Result 883 states and 1295 transitions. [2021-08-31 04:18:17,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-31 04:18:17,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 883 states and 1295 transitions. [2021-08-31 04:18:17,551 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 850 [2021-08-31 04:18:17,555 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 883 states to 883 states and 1295 transitions. [2021-08-31 04:18:17,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 883 [2021-08-31 04:18:17,556 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 883 [2021-08-31 04:18:17,556 INFO L73 IsDeterministic]: Start isDeterministic. Operand 883 states and 1295 transitions. [2021-08-31 04:18:17,558 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:17,558 INFO L681 BuchiCegarLoop]: Abstraction has 883 states and 1295 transitions. [2021-08-31 04:18:17,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 883 states and 1295 transitions. [2021-08-31 04:18:17,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 883 to 857. [2021-08-31 04:18:17,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 857 states, 857 states have (on average 1.4807467911318553) internal successors, (1269), 856 states have internal predecessors, (1269), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:17,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 857 states to 857 states and 1269 transitions. [2021-08-31 04:18:17,600 INFO L704 BuchiCegarLoop]: Abstraction has 857 states and 1269 transitions. [2021-08-31 04:18:17,600 INFO L587 BuchiCegarLoop]: Abstraction has 857 states and 1269 transitions. [2021-08-31 04:18:17,601 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-08-31 04:18:17,601 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 857 states and 1269 transitions. [2021-08-31 04:18:17,604 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 828 [2021-08-31 04:18:17,604 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:17,604 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:17,605 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:17,605 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:17,605 INFO L791 eck$LassoCheckResult]: Stem: 2197#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 2121#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 2122#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 2132#L250 assume !(1 == ~q_req_up~0); 2162#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 2171#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 2080#L270-1 assume !(0 == ~q_read_ev~0); 2081#L303-1 assume !(0 == ~q_write_ev~0); 2111#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 2112#L58 assume !(1 == ~p_dw_pc~0); 2082#L58-2 assume !(2 == ~p_dw_pc~0); 2083#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 2138#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 2068#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 2069#L379 assume !(0 != activate_threads_~tmp~1); 2184#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 2139#L87 assume 1 == ~c_dr_pc~0; 2140#L88 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 2107#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 2108#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2133#L387 assume !(0 != activate_threads_~tmp___0~1); 2134#L387-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 2161#L321-1 assume !(1 == ~q_write_ev~0); 2127#L483-1 [2021-08-31 04:18:17,605 INFO L793 eck$LassoCheckResult]: Loop: 2127#L483-1 assume !false; 2158#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 2114#L427 assume !false; 2136#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2137#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 2062#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2063#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 2077#L407 assume !(0 != eval_~tmp___1~0); 2079#L443 start_simulation_~kernel_st~0 := 2; 2861#L250-2 assume !(1 == ~q_req_up~0); 2859#L250-3 start_simulation_~kernel_st~0 := 3; 2857#L303-2 assume !(0 == ~q_read_ev~0); 2855#L303-4 assume !(0 == ~q_write_ev~0); 2853#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 2851#L58-3 assume !(1 == ~p_dw_pc~0); 2849#L58-5 assume !(2 == ~p_dw_pc~0); 2847#L68-3 is_do_write_p_triggered_~__retres1~0 := 0; 2845#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 2843#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 2842#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 2841#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 2840#L87-3 assume 1 == ~c_dr_pc~0; 2836#L88-1 assume 1 == ~slow_clk_edge~0;is_do_read_c_triggered_~__retres1~1 := 1; 2835#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 2834#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2833#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 2118#L387-5 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 2119#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 2153#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2149#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 2151#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2147#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 2123#L502 assume !(0 == start_simulation_~tmp~4); 2124#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2087#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 2088#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2117#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 2097#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 2098#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 2192#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 2126#L515 assume !(0 != start_simulation_~tmp___0~3); 2127#L483-1 [2021-08-31 04:18:17,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:17,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1443448551, now seen corresponding path program 1 times [2021-08-31 04:18:17,606 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:17,606 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970516403] [2021-08-31 04:18:17,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:17,606 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:17,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:17,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:17,663 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:17,663 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970516403] [2021-08-31 04:18:17,663 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [970516403] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:17,663 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:17,663 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-08-31 04:18:17,664 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444405441] [2021-08-31 04:18:17,664 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-31 04:18:17,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:17,664 INFO L82 PathProgramCache]: Analyzing trace with hash 611599060, now seen corresponding path program 1 times [2021-08-31 04:18:17,664 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:17,664 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769381568] [2021-08-31 04:18:17,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:17,665 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:17,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:17,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:17,698 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:17,699 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1769381568] [2021-08-31 04:18:17,699 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1769381568] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:17,699 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:17,699 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:17,699 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [669864868] [2021-08-31 04:18:17,699 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:17,699 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:17,700 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-31 04:18:17,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-31 04:18:17,700 INFO L87 Difference]: Start difference. First operand 857 states and 1269 transitions. cyclomatic complexity: 416 Second operand has 5 states, 5 states have (on average 4.6) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:18,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:18,297 INFO L93 Difference]: Finished difference Result 2083 states and 2999 transitions. [2021-08-31 04:18:18,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-31 04:18:18,298 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2083 states and 2999 transitions. [2021-08-31 04:18:18,308 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2044 [2021-08-31 04:18:18,315 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2083 states to 2083 states and 2999 transitions. [2021-08-31 04:18:18,316 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2083 [2021-08-31 04:18:18,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2083 [2021-08-31 04:18:18,317 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2083 states and 2999 transitions. [2021-08-31 04:18:18,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:18,319 INFO L681 BuchiCegarLoop]: Abstraction has 2083 states and 2999 transitions. [2021-08-31 04:18:18,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2083 states and 2999 transitions. [2021-08-31 04:18:18,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2083 to 2017. [2021-08-31 04:18:18,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2017 states, 2017 states have (on average 1.4442240951908776) internal successors, (2913), 2016 states have internal predecessors, (2913), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:18,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2017 states to 2017 states and 2913 transitions. [2021-08-31 04:18:18,343 INFO L704 BuchiCegarLoop]: Abstraction has 2017 states and 2913 transitions. [2021-08-31 04:18:18,343 INFO L587 BuchiCegarLoop]: Abstraction has 2017 states and 2913 transitions. [2021-08-31 04:18:18,343 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-08-31 04:18:18,343 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2017 states and 2913 transitions. [2021-08-31 04:18:18,350 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 1980 [2021-08-31 04:18:18,350 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:18,350 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:18,351 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:18,351 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:18,351 INFO L791 eck$LassoCheckResult]: Stem: 5157#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 5081#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 5082#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 5087#L250 assume !(1 == ~q_req_up~0); 5120#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 5128#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 5034#L270-1 assume !(0 == ~q_read_ev~0); 5035#L303-1 assume !(0 == ~q_write_ev~0); 5068#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 5069#L58 assume !(1 == ~p_dw_pc~0); 5036#L58-2 assume !(2 == ~p_dw_pc~0); 5037#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 5094#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 5022#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 5023#L379 assume !(0 != activate_threads_~tmp~1); 5142#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 5095#L87 assume !(1 == ~c_dr_pc~0); 5014#L87-2 assume !(2 == ~c_dr_pc~0); 5015#L97-1 is_do_read_c_triggered_~__retres1~1 := 0; 5064#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 5065#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5088#L387 assume !(0 != activate_threads_~tmp___0~1); 5089#L387-2 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 5118#L321-1 assume !(1 == ~q_write_ev~0); 5119#L483-1 [2021-08-31 04:18:18,352 INFO L793 eck$LassoCheckResult]: Loop: 5119#L483-1 assume !false; 6694#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 6693#L427 assume !false; 6692#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6691#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 6689#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6688#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 6686#L407 assume !(0 != eval_~tmp___1~0); 6685#L443 start_simulation_~kernel_st~0 := 2; 6684#L250-2 assume !(1 == ~q_req_up~0); 6683#L250-3 start_simulation_~kernel_st~0 := 3; 6682#L303-2 assume !(0 == ~q_read_ev~0); 6681#L303-4 assume !(0 == ~q_write_ev~0); 6680#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 6679#L58-3 assume !(1 == ~p_dw_pc~0); 6678#L58-5 assume !(2 == ~p_dw_pc~0); 6677#L68-3 is_do_write_p_triggered_~__retres1~0 := 0; 6676#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 6675#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 6674#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 6673#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 6670#L87-3 assume !(1 == ~c_dr_pc~0); 5102#L87-5 assume !(2 == ~c_dr_pc~0); 5103#L97-3 is_do_read_c_triggered_~__retres1~1 := 0; 6727#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 6725#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 6723#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 6721#L387-5 assume 1 == ~q_read_ev~0;~q_read_ev~0 := 2; 6586#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 6579#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6717#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 6714#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6712#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 6709#L502 assume !(0 == start_simulation_~tmp~4); 6707#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6706#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 6704#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6703#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 6702#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 6701#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 6700#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 6699#L515 assume !(0 != start_simulation_~tmp___0~3); 5119#L483-1 [2021-08-31 04:18:18,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:18,352 INFO L82 PathProgramCache]: Analyzing trace with hash 1480396684, now seen corresponding path program 1 times [2021-08-31 04:18:18,353 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:18,353 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909608653] [2021-08-31 04:18:18,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:18,353 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:18,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:18,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:18,385 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:18,385 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1909608653] [2021-08-31 04:18:18,385 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1909608653] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:18,389 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:18,389 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-31 04:18:18,389 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764199590] [2021-08-31 04:18:18,390 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-08-31 04:18:18,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:18,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1634640237, now seen corresponding path program 1 times [2021-08-31 04:18:18,390 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:18,390 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679333159] [2021-08-31 04:18:18,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:18,391 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:18,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:18,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:18,422 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:18,422 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1679333159] [2021-08-31 04:18:18,423 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1679333159] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:18,423 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:18,423 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:18,423 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1657500868] [2021-08-31 04:18:18,426 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:18,427 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:18,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-31 04:18:18,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-31 04:18:18,428 INFO L87 Difference]: Start difference. First operand 2017 states and 2913 transitions. cyclomatic complexity: 904 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:18,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:18,651 INFO L93 Difference]: Finished difference Result 2666 states and 3813 transitions. [2021-08-31 04:18:18,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-31 04:18:18,652 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2666 states and 3813 transitions. [2021-08-31 04:18:18,664 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2630 [2021-08-31 04:18:18,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2666 states to 2666 states and 3813 transitions. [2021-08-31 04:18:18,675 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2666 [2021-08-31 04:18:18,677 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2666 [2021-08-31 04:18:18,677 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2666 states and 3813 transitions. [2021-08-31 04:18:18,680 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:18,680 INFO L681 BuchiCegarLoop]: Abstraction has 2666 states and 3813 transitions. [2021-08-31 04:18:18,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2666 states and 3813 transitions. [2021-08-31 04:18:18,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2666 to 1680. [2021-08-31 04:18:18,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1680 states, 1680 states have (on average 1.4386904761904762) internal successors, (2417), 1679 states have internal predecessors, (2417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:18,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1680 states to 1680 states and 2417 transitions. [2021-08-31 04:18:18,700 INFO L704 BuchiCegarLoop]: Abstraction has 1680 states and 2417 transitions. [2021-08-31 04:18:18,700 INFO L587 BuchiCegarLoop]: Abstraction has 1680 states and 2417 transitions. [2021-08-31 04:18:18,700 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-08-31 04:18:18,700 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1680 states and 2417 transitions. [2021-08-31 04:18:18,706 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1650 [2021-08-31 04:18:18,706 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:18,706 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:18,707 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:18,707 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:18,707 INFO L791 eck$LassoCheckResult]: Stem: 9850#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 9774#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 9775#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 9779#L250 assume !(1 == ~q_req_up~0); 9814#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 9825#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 9726#L270-1 assume !(0 == ~q_read_ev~0); 9727#L303-1 assume !(0 == ~q_write_ev~0); 9761#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 9762#L58 assume !(1 == ~p_dw_pc~0); 9728#L58-2 assume !(2 == ~p_dw_pc~0); 9729#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 9786#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 9714#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 9715#L379 assume !(0 != activate_threads_~tmp~1); 9837#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 9787#L87 assume !(1 == ~c_dr_pc~0); 9706#L87-2 assume !(2 == ~c_dr_pc~0); 9707#L97-1 is_do_read_c_triggered_~__retres1~1 := 0; 9757#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 9758#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 9780#L387 assume !(0 != activate_threads_~tmp___0~1); 9781#L387-2 assume !(1 == ~q_read_ev~0); 9812#L321-1 assume !(1 == ~q_write_ev~0); 9813#L483-1 [2021-08-31 04:18:18,708 INFO L793 eck$LassoCheckResult]: Loop: 9813#L483-1 assume !false; 9935#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 9934#L427 assume !false; 9933#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 9932#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 9930#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 9929#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 9927#L407 assume !(0 != eval_~tmp___1~0); 9928#L443 start_simulation_~kernel_st~0 := 2; 9988#L250-2 assume !(1 == ~q_req_up~0); 9987#L250-3 start_simulation_~kernel_st~0 := 3; 9986#L303-2 assume !(0 == ~q_read_ev~0); 9985#L303-4 assume !(0 == ~q_write_ev~0); 9984#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 9983#L58-3 assume !(1 == ~p_dw_pc~0); 9982#L58-5 assume !(2 == ~p_dw_pc~0); 9981#L68-3 is_do_write_p_triggered_~__retres1~0 := 0; 9980#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 9979#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 9977#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 9975#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 9973#L87-3 assume !(1 == ~c_dr_pc~0); 9971#L87-5 assume !(2 == ~c_dr_pc~0); 9969#L97-3 is_do_read_c_triggered_~__retres1~1 := 0; 9967#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 9965#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 9963#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 9961#L387-5 assume !(1 == ~q_read_ev~0); 9959#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 9957#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 9955#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 9952#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 9950#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 9947#L502 assume !(0 == start_simulation_~tmp~4); 9945#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 9944#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 9942#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 9941#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 9940#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 9939#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 9938#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 9937#L515 assume !(0 != start_simulation_~tmp___0~3); 9813#L483-1 [2021-08-31 04:18:18,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:18,709 INFO L82 PathProgramCache]: Analyzing trace with hash 1480396746, now seen corresponding path program 1 times [2021-08-31 04:18:18,709 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:18,710 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29588873] [2021-08-31 04:18:18,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:18,710 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:18,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:18,726 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:18,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:18,755 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:18,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:18,756 INFO L82 PathProgramCache]: Analyzing trace with hash 354776559, now seen corresponding path program 1 times [2021-08-31 04:18:18,756 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:18,756 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936664896] [2021-08-31 04:18:18,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:18,756 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:18,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:18,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:18,786 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:18,786 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [936664896] [2021-08-31 04:18:18,786 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [936664896] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:18,786 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:18,786 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:18,786 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990777001] [2021-08-31 04:18:18,787 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:18,787 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:18,787 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-31 04:18:18,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-31 04:18:18,788 INFO L87 Difference]: Start difference. First operand 1680 states and 2417 transitions. cyclomatic complexity: 741 Second operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 5 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:19,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:19,085 INFO L93 Difference]: Finished difference Result 2816 states and 3974 transitions. [2021-08-31 04:18:19,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-08-31 04:18:19,085 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2816 states and 3974 transitions. [2021-08-31 04:18:19,120 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2780 [2021-08-31 04:18:19,130 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2816 states to 2816 states and 3974 transitions. [2021-08-31 04:18:19,130 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2816 [2021-08-31 04:18:19,132 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2816 [2021-08-31 04:18:19,132 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2816 states and 3974 transitions. [2021-08-31 04:18:19,134 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:19,134 INFO L681 BuchiCegarLoop]: Abstraction has 2816 states and 3974 transitions. [2021-08-31 04:18:19,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2816 states and 3974 transitions. [2021-08-31 04:18:19,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2816 to 1743. [2021-08-31 04:18:19,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1743 states, 1743 states have (on average 1.4228341939185312) internal successors, (2480), 1742 states have internal predecessors, (2480), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:19,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1743 states to 1743 states and 2480 transitions. [2021-08-31 04:18:19,159 INFO L704 BuchiCegarLoop]: Abstraction has 1743 states and 2480 transitions. [2021-08-31 04:18:19,159 INFO L587 BuchiCegarLoop]: Abstraction has 1743 states and 2480 transitions. [2021-08-31 04:18:19,159 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-08-31 04:18:19,160 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1743 states and 2480 transitions. [2021-08-31 04:18:19,165 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1713 [2021-08-31 04:18:19,165 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:19,165 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:19,165 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:19,165 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:19,165 INFO L791 eck$LassoCheckResult]: Stem: 14365#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 14283#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 14284#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 14288#L250 assume !(1 == ~q_req_up~0); 14335#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 14342#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 14237#L270-1 assume !(0 == ~q_read_ev~0); 14238#L303-1 assume !(0 == ~q_write_ev~0); 14271#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 14272#L58 assume !(1 == ~p_dw_pc~0); 14239#L58-2 assume !(2 == ~p_dw_pc~0); 14240#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 14297#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 14226#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 14227#L379 assume !(0 != activate_threads_~tmp~1); 14351#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 14300#L87 assume !(1 == ~c_dr_pc~0); 14218#L87-2 assume !(2 == ~c_dr_pc~0); 14219#L97-1 is_do_read_c_triggered_~__retres1~1 := 0; 14267#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 14268#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 14289#L387 assume !(0 != activate_threads_~tmp___0~1); 14290#L387-2 assume !(1 == ~q_read_ev~0); 14332#L321-1 assume !(1 == ~q_write_ev~0); 14333#L483-1 [2021-08-31 04:18:19,166 INFO L793 eck$LassoCheckResult]: Loop: 14333#L483-1 assume !false; 15885#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 14303#L427 assume !false; 15766#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 15762#L283 assume !(0 == ~p_dw_st~0); 15760#L287 assume !(0 == ~c_dr_st~0);exists_runnable_thread_~__retres1~2 := 0; 15761#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 14291#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 14292#L407 assume !(0 != eval_~tmp___1~0); 15750#L443 start_simulation_~kernel_st~0 := 2; 15751#L250-2 assume !(1 == ~q_req_up~0); 15743#L250-3 start_simulation_~kernel_st~0 := 3; 15744#L303-2 assume !(0 == ~q_read_ev~0); 15739#L303-4 assume !(0 == ~q_write_ev~0); 15740#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 15733#L58-3 assume !(1 == ~p_dw_pc~0); 15734#L58-5 assume !(2 == ~p_dw_pc~0); 15773#L68-3 is_do_write_p_triggered_~__retres1~0 := 0; 15769#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 15770#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 15763#L379-3 assume 0 != activate_threads_~tmp~1;~p_dw_st~0 := 0; 15764#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 14265#L87-3 assume !(1 == ~c_dr_pc~0); 14266#L87-5 assume !(2 == ~c_dr_pc~0); 15919#L97-3 is_do_read_c_triggered_~__retres1~1 := 0; 15918#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 15917#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 15916#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 15915#L387-5 assume !(1 == ~q_read_ev~0); 15914#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 15913#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 15912#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 15908#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 15905#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 15901#L502 assume !(0 == start_simulation_~tmp~4); 15899#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 15898#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 15896#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 15895#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 15893#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 15891#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 15890#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 15888#L515 assume !(0 != start_simulation_~tmp___0~3); 14333#L483-1 [2021-08-31 04:18:19,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:19,166 INFO L82 PathProgramCache]: Analyzing trace with hash 1480396746, now seen corresponding path program 2 times [2021-08-31 04:18:19,166 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:19,166 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198016754] [2021-08-31 04:18:19,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:19,167 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:19,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:19,176 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:19,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:19,190 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:19,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:19,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1644874558, now seen corresponding path program 1 times [2021-08-31 04:18:19,190 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:19,190 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648115204] [2021-08-31 04:18:19,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:19,191 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:19,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:19,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:19,225 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:19,225 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648115204] [2021-08-31 04:18:19,225 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648115204] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:19,225 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:19,225 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-08-31 04:18:19,225 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145118830] [2021-08-31 04:18:19,226 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:19,226 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:19,226 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-08-31 04:18:19,226 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-08-31 04:18:19,226 INFO L87 Difference]: Start difference. First operand 1743 states and 2480 transitions. cyclomatic complexity: 741 Second operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 5 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:19,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:19,664 INFO L93 Difference]: Finished difference Result 4091 states and 5801 transitions. [2021-08-31 04:18:19,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-08-31 04:18:19,664 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4091 states and 5801 transitions. [2021-08-31 04:18:19,678 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4057 [2021-08-31 04:18:19,691 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4091 states to 4091 states and 5801 transitions. [2021-08-31 04:18:19,691 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4091 [2021-08-31 04:18:19,693 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4091 [2021-08-31 04:18:19,693 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4091 states and 5801 transitions. [2021-08-31 04:18:19,695 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:19,696 INFO L681 BuchiCegarLoop]: Abstraction has 4091 states and 5801 transitions. [2021-08-31 04:18:19,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4091 states and 5801 transitions. [2021-08-31 04:18:19,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4091 to 1821. [2021-08-31 04:18:19,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1821 states, 1821 states have (on average 1.3953871499176276) internal successors, (2541), 1820 states have internal predecessors, (2541), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:19,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1821 states to 1821 states and 2541 transitions. [2021-08-31 04:18:19,744 INFO L704 BuchiCegarLoop]: Abstraction has 1821 states and 2541 transitions. [2021-08-31 04:18:19,744 INFO L587 BuchiCegarLoop]: Abstraction has 1821 states and 2541 transitions. [2021-08-31 04:18:19,744 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-08-31 04:18:19,744 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1821 states and 2541 transitions. [2021-08-31 04:18:19,747 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1791 [2021-08-31 04:18:19,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:19,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:19,748 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:19,748 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:19,749 INFO L791 eck$LassoCheckResult]: Stem: 20207#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 20130#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 20131#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 20136#L250 assume !(1 == ~q_req_up~0); 20176#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 20187#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 20084#L270-1 assume !(0 == ~q_read_ev~0); 20085#L303-1 assume !(0 == ~q_write_ev~0); 20117#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 20118#L58 assume !(1 == ~p_dw_pc~0); 20086#L58-2 assume !(2 == ~p_dw_pc~0); 20087#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 20143#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 20073#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 20074#L379 assume !(0 != activate_threads_~tmp~1); 20195#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 20146#L87 assume !(1 == ~c_dr_pc~0); 20065#L87-2 assume !(2 == ~c_dr_pc~0); 20066#L97-1 is_do_read_c_triggered_~__retres1~1 := 0; 20113#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 20114#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 20137#L387 assume !(0 != activate_threads_~tmp___0~1); 20138#L387-2 assume !(1 == ~q_read_ev~0); 20173#L321-1 assume !(1 == ~q_write_ev~0); 20174#L483-1 [2021-08-31 04:18:19,749 INFO L793 eck$LassoCheckResult]: Loop: 20174#L483-1 assume !false; 20282#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 20267#L427 assume !false; 20281#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 20280#L283 assume !(0 == ~p_dw_st~0); 20279#L287 assume !(0 == ~c_dr_st~0);exists_runnable_thread_~__retres1~2 := 0; 20278#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 20276#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 20273#L407 assume !(0 != eval_~tmp___1~0); 20274#L443 start_simulation_~kernel_st~0 := 2; 20334#L250-2 assume !(1 == ~q_req_up~0); 20333#L250-3 start_simulation_~kernel_st~0 := 3; 20332#L303-2 assume !(0 == ~q_read_ev~0); 20331#L303-4 assume !(0 == ~q_write_ev~0); 20330#L308-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 20329#L58-3 assume !(1 == ~p_dw_pc~0); 20328#L58-5 assume !(2 == ~p_dw_pc~0); 20327#L68-3 is_do_write_p_triggered_~__retres1~0 := 0; 20326#L79-1 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 20325#L80-1 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 20323#L379-3 assume !(0 != activate_threads_~tmp~1); 20321#L379-5 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 20319#L87-3 assume !(1 == ~c_dr_pc~0); 20317#L87-5 assume !(2 == ~c_dr_pc~0); 20315#L97-3 is_do_read_c_triggered_~__retres1~1 := 0; 20313#L108-1 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 20311#L109-1 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 20309#L387-3 assume 0 != activate_threads_~tmp___0~1;~c_dr_st~0 := 0; 20307#L387-5 assume !(1 == ~q_read_ev~0); 20305#L321-3 assume 1 == ~q_write_ev~0;~q_write_ev~0 := 2; 20303#L326-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 20301#L283-1 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 20298#L295-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 20296#L296-1 start_simulation_#t~ret16 := exists_runnable_thread_#res;start_simulation_~tmp~4 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 20293#L502 assume !(0 == start_simulation_~tmp~4); 20291#L502-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret15, stop_simulation_~tmp~3, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~3;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 20290#L283-2 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 20288#L295-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 20287#L296-2 stop_simulation_#t~ret15 := exists_runnable_thread_#res;stop_simulation_~tmp~3 := stop_simulation_#t~ret15;havoc stop_simulation_#t~ret15; 20286#L457 assume 0 != stop_simulation_~tmp~3;stop_simulation_~__retres2~0 := 0; 20285#L464 stop_simulation_#res := stop_simulation_~__retres2~0; 20284#L465 start_simulation_#t~ret17 := stop_simulation_#res;start_simulation_~tmp___0~3 := start_simulation_#t~ret17;havoc start_simulation_#t~ret17; 20283#L515 assume !(0 != start_simulation_~tmp___0~3); 20174#L483-1 [2021-08-31 04:18:19,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:19,750 INFO L82 PathProgramCache]: Analyzing trace with hash 1480396746, now seen corresponding path program 3 times [2021-08-31 04:18:19,750 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:19,750 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202062557] [2021-08-31 04:18:19,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:19,751 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:19,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:19,757 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:19,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:19,769 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:19,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:19,770 INFO L82 PathProgramCache]: Analyzing trace with hash -160563776, now seen corresponding path program 1 times [2021-08-31 04:18:19,770 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:19,772 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443043282] [2021-08-31 04:18:19,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:19,772 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:19,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:19,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:19,800 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:19,800 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443043282] [2021-08-31 04:18:19,801 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [443043282] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:19,801 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:19,801 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-08-31 04:18:19,801 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699609272] [2021-08-31 04:18:19,801 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-08-31 04:18:19,801 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:19,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-31 04:18:19,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-31 04:18:19,803 INFO L87 Difference]: Start difference. First operand 1821 states and 2541 transitions. cyclomatic complexity: 724 Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:19,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:19,977 INFO L93 Difference]: Finished difference Result 2830 states and 3865 transitions. [2021-08-31 04:18:19,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-31 04:18:19,978 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2830 states and 3865 transitions. [2021-08-31 04:18:19,986 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 2795 [2021-08-31 04:18:19,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2830 states to 2830 states and 3865 transitions. [2021-08-31 04:18:19,994 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2830 [2021-08-31 04:18:19,995 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2830 [2021-08-31 04:18:19,995 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2830 states and 3865 transitions. [2021-08-31 04:18:19,997 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:19,997 INFO L681 BuchiCegarLoop]: Abstraction has 2830 states and 3865 transitions. [2021-08-31 04:18:19,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2830 states and 3865 transitions. [2021-08-31 04:18:20,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2830 to 2830. [2021-08-31 04:18:20,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2830 states, 2830 states have (on average 1.3657243816254416) internal successors, (3865), 2829 states have internal predecessors, (3865), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:20,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2830 states to 2830 states and 3865 transitions. [2021-08-31 04:18:20,028 INFO L704 BuchiCegarLoop]: Abstraction has 2830 states and 3865 transitions. [2021-08-31 04:18:20,028 INFO L587 BuchiCegarLoop]: Abstraction has 2830 states and 3865 transitions. [2021-08-31 04:18:20,028 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-08-31 04:18:20,028 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2830 states and 3865 transitions. [2021-08-31 04:18:20,033 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 2795 [2021-08-31 04:18:20,033 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:20,033 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:20,033 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:20,033 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:20,034 INFO L791 eck$LassoCheckResult]: Stem: 24871#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 24784#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 24785#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 24793#L250 assume !(1 == ~q_req_up~0); 24834#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 24845#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 24741#L270-1 assume !(0 == ~q_read_ev~0); 24742#L303-1 assume !(0 == ~q_write_ev~0); 24772#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 24773#L58 assume !(1 == ~p_dw_pc~0); 24743#L58-2 assume !(2 == ~p_dw_pc~0); 24744#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 24801#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 24730#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 24731#L379 assume !(0 != activate_threads_~tmp~1); 24855#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 24804#L87 assume !(1 == ~c_dr_pc~0); 24722#L87-2 assume !(2 == ~c_dr_pc~0); 24723#L97-1 is_do_read_c_triggered_~__retres1~1 := 0; 24769#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 24770#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 24794#L387 assume !(0 != activate_threads_~tmp___0~1); 24795#L387-2 assume !(1 == ~q_read_ev~0); 24831#L321-1 assume !(1 == ~q_write_ev~0); 24832#L483-1 assume !false; 26477#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 26463#L427 [2021-08-31 04:18:20,034 INFO L793 eck$LassoCheckResult]: Loop: 26463#L427 assume !false; 26474#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 26472#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 26471#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 26470#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 26469#L407 assume 0 != eval_~tmp___1~0; 26467#L407-1 assume 0 == ~p_dw_st~0;eval_~tmp~2 := eval_#t~nondet13;havoc eval_#t~nondet13; 26465#L416 assume !(0 != eval_~tmp~2); 26464#L412 assume !(0 == ~c_dr_st~0); 26463#L427 [2021-08-31 04:18:20,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:20,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1027102476, now seen corresponding path program 1 times [2021-08-31 04:18:20,035 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:20,035 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766252882] [2021-08-31 04:18:20,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:20,035 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:20,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,041 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:20,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,051 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:20,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:20,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1127629253, now seen corresponding path program 1 times [2021-08-31 04:18:20,052 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:20,052 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641765446] [2021-08-31 04:18:20,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:20,052 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:20,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,055 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:20,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,058 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:20,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:20,059 INFO L82 PathProgramCache]: Analyzing trace with hash -644372710, now seen corresponding path program 1 times [2021-08-31 04:18:20,059 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:20,059 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210753145] [2021-08-31 04:18:20,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:20,059 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:20,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-08-31 04:18:20,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-08-31 04:18:20,093 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-08-31 04:18:20,093 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210753145] [2021-08-31 04:18:20,093 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1210753145] provided 1 perfect and 0 imperfect interpolant sequences [2021-08-31 04:18:20,093 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-08-31 04:18:20,093 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-08-31 04:18:20,094 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587470250] [2021-08-31 04:18:20,164 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-08-31 04:18:20,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-08-31 04:18:20,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-08-31 04:18:20,165 INFO L87 Difference]: Start difference. First operand 2830 states and 3865 transitions. cyclomatic complexity: 1042 Second operand has 3 states, 2 states have (on average 17.5) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:20,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-08-31 04:18:20,424 INFO L93 Difference]: Finished difference Result 4193 states and 5700 transitions. [2021-08-31 04:18:20,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-08-31 04:18:20,427 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4193 states and 5700 transitions. [2021-08-31 04:18:20,442 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 4159 [2021-08-31 04:18:20,458 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4193 states to 4193 states and 5700 transitions. [2021-08-31 04:18:20,459 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4193 [2021-08-31 04:18:20,461 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4193 [2021-08-31 04:18:20,461 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4193 states and 5700 transitions. [2021-08-31 04:18:20,466 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-08-31 04:18:20,466 INFO L681 BuchiCegarLoop]: Abstraction has 4193 states and 5700 transitions. [2021-08-31 04:18:20,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4193 states and 5700 transitions. [2021-08-31 04:18:20,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4193 to 3691. [2021-08-31 04:18:20,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3691 states, 3691 states have (on average 1.3665673259279327) internal successors, (5044), 3690 states have internal predecessors, (5044), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-08-31 04:18:20,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3691 states to 3691 states and 5044 transitions. [2021-08-31 04:18:20,507 INFO L704 BuchiCegarLoop]: Abstraction has 3691 states and 5044 transitions. [2021-08-31 04:18:20,507 INFO L587 BuchiCegarLoop]: Abstraction has 3691 states and 5044 transitions. [2021-08-31 04:18:20,507 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-08-31 04:18:20,507 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3691 states and 5044 transitions. [2021-08-31 04:18:20,514 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 3657 [2021-08-31 04:18:20,514 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-08-31 04:18:20,514 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-08-31 04:18:20,514 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:20,515 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-08-31 04:18:20,515 INFO L791 eck$LassoCheckResult]: Stem: 31910#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(17);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~fast_clk_edge~0 := 0;~slow_clk_edge~0 := 0;~q_buf_0~0 := 0;~q_free~0 := 0;~q_read_ev~0 := 0;~q_write_ev~0 := 0;~q_req_up~0 := 0;~q_ev~0 := 0;~p_num_write~0 := 0;~p_last_write~0 := 0;~p_dw_st~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 0;~c_num_read~0 := 0;~c_last_read~0 := 0;~c_dr_st~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 0;~a_t~0 := 0;~t~0 := 0; 31815#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~fast_clk_edge~0 := 2;~slow_clk_edge~0 := 2;~q_free~0 := 1;~q_write_ev~0 := 2;~q_read_ev~0 := ~q_write_ev~0;~p_num_write~0 := 0;~p_dw_pc~0 := 0;~p_dw_i~0 := 1;~c_num_read~0 := 0;~c_dr_pc~0 := 0;~c_dr_i~0 := 1; 31816#L543 havoc start_simulation_#t~ret16, start_simulation_#t~ret17, start_simulation_~kernel_st~0, start_simulation_~tmp~4, start_simulation_~tmp___0~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~4;havoc start_simulation_~tmp___0~3;start_simulation_~kernel_st~0 := 0; 31826#L250 assume !(1 == ~q_req_up~0); 31864#L250-1 assume 1 == ~p_dw_i~0;~p_dw_st~0 := 0; 31876#L265-1 assume 1 == ~c_dr_i~0;~c_dr_st~0 := 0; 31772#L270-1 assume !(0 == ~q_read_ev~0); 31773#L303-1 assume !(0 == ~q_write_ev~0); 31803#L308-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~1;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~1;havoc is_do_write_p_triggered_#res;havoc is_do_write_p_triggered_~__retres1~0;havoc is_do_write_p_triggered_~__retres1~0; 31804#L58 assume !(1 == ~p_dw_pc~0); 31774#L58-2 assume !(2 == ~p_dw_pc~0); 31775#L68-1 is_do_write_p_triggered_~__retres1~0 := 0; 31832#L79 is_do_write_p_triggered_#res := is_do_write_p_triggered_~__retres1~0; 31761#L80 activate_threads_#t~ret10 := is_do_write_p_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 31762#L379 assume !(0 != activate_threads_~tmp~1); 31890#L379-2 havoc is_do_read_c_triggered_#res;havoc is_do_read_c_triggered_~__retres1~1;havoc is_do_read_c_triggered_~__retres1~1; 31834#L87 assume !(1 == ~c_dr_pc~0); 31753#L87-2 assume !(2 == ~c_dr_pc~0); 31754#L97-1 is_do_read_c_triggered_~__retres1~1 := 0; 31800#L108 is_do_read_c_triggered_#res := is_do_read_c_triggered_~__retres1~1; 31801#L109 activate_threads_#t~ret11 := is_do_read_c_triggered_#res;activate_threads_~tmp___0~1 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 31827#L387 assume !(0 != activate_threads_~tmp___0~1); 31828#L387-2 assume !(1 == ~q_read_ev~0); 31861#L321-1 assume !(1 == ~q_write_ev~0); 31862#L483-1 assume !false; 34351#L484 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret12, eval_#t~nondet13, eval_#t~nondet14, eval_~tmp~2, eval_~tmp___0~2, eval_~tmp___1~0;havoc eval_~tmp~2;havoc eval_~tmp___0~2;havoc eval_~tmp___1~0; 34329#L427 [2021-08-31 04:18:20,515 INFO L793 eck$LassoCheckResult]: Loop: 34329#L427 assume !false; 34349#L403 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 34346#L283 assume 0 == ~p_dw_st~0;exists_runnable_thread_~__retres1~2 := 1; 34344#L295 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 34342#L296 eval_#t~ret12 := exists_runnable_thread_#res;eval_~tmp___1~0 := eval_#t~ret12;havoc eval_#t~ret12; 34340#L407 assume 0 != eval_~tmp___1~0; 34337#L407-1 assume 0 == ~p_dw_st~0;eval_~tmp~2 := eval_#t~nondet13;havoc eval_#t~nondet13; 34333#L416 assume !(0 != eval_~tmp~2); 34331#L412 assume 0 == ~c_dr_st~0;eval_~tmp___0~2 := eval_#t~nondet14;havoc eval_#t~nondet14; 34328#L431 assume !(0 != eval_~tmp___0~2); 34329#L427 [2021-08-31 04:18:20,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:20,515 INFO L82 PathProgramCache]: Analyzing trace with hash 1027102476, now seen corresponding path program 2 times [2021-08-31 04:18:20,516 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:20,516 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966240343] [2021-08-31 04:18:20,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:20,516 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:20,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,520 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:20,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,525 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:20,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:20,526 INFO L82 PathProgramCache]: Analyzing trace with hash 596766931, now seen corresponding path program 1 times [2021-08-31 04:18:20,526 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:20,526 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714387893] [2021-08-31 04:18:20,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:20,526 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:20,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,528 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:20,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,530 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:20,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-08-31 04:18:20,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1499280926, now seen corresponding path program 1 times [2021-08-31 04:18:20,531 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-08-31 04:18:20,531 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042313950] [2021-08-31 04:18:20,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-08-31 04:18:20,531 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-08-31 04:18:20,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,535 INFO L354 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-08-31 04:18:20,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-08-31 04:18:20,541 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-08-31 04:18:21,375 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer has thrown an exception: java.lang.ClassCastException: class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator cannot be cast to class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData (de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator and de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData are in unnamed module of loader org.eclipse.osgi.internal.loader.EquinoxClassLoader @560348e6) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiCegarLoopBenchmark.prettyprintBenchmarkData(BuchiCegarLoopBenchmark.java:178) at de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData.toString(StatisticsData.java:100) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerTimingBenchmark.toString(BuchiAutomizerTimingBenchmark.java:44) at de.uni_freiburg.informatik.ultimate.core.lib.results.StatisticsResult.getLongDescription(StatisticsResult.java:58) at de.uni_freiburg.informatik.ultimate.core.coreplugin.services.ResultService.reportResult(ResultService.java:86) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.reportResult(BuchiAutomizerObserver.java:375) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:161) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:398) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-08-31 04:18:21,376 INFO L158 Benchmark]: Toolchain (without parser) took 6338.12ms. Allocated memory was 67.1MB in the beginning and 203.4MB in the end (delta: 136.3MB). Free memory was 47.0MB in the beginning and 137.0MB in the end (delta: -90.0MB). Peak memory consumption was 117.8MB. Max. memory is 16.1GB. [2021-08-31 04:18:21,376 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 67.1MB. Free memory was 49.1MB in the beginning and 49.0MB in the end (delta: 48.6kB). There was no memory consumed. Max. memory is 16.1GB. [2021-08-31 04:18:21,377 INFO L158 Benchmark]: CACSL2BoogieTranslator took 279.86ms. Allocated memory is still 67.1MB. Free memory was 46.9MB in the beginning and 48.4MB in the end (delta: -1.6MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2021-08-31 04:18:21,377 INFO L158 Benchmark]: Boogie Procedure Inliner took 53.17ms. Allocated memory is still 67.1MB. Free memory was 48.4MB in the beginning and 45.8MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-08-31 04:18:21,377 INFO L158 Benchmark]: Boogie Preprocessor took 36.78ms. Allocated memory is still 67.1MB. Free memory was 45.8MB in the beginning and 43.8MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2021-08-31 04:18:21,377 INFO L158 Benchmark]: RCFGBuilder took 193.54ms. Allocated memory is still 67.1MB. Free memory was 43.8MB in the beginning and 29.6MB in the end (delta: 14.2MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2021-08-31 04:18:21,377 INFO L158 Benchmark]: BuchiAutomizer took 5770.04ms. Allocated memory was 67.1MB in the beginning and 203.4MB in the end (delta: 136.3MB). Free memory was 29.6MB in the beginning and 137.0MB in the end (delta: -107.4MB). Peak memory consumption was 102.2MB. Max. memory is 16.1GB. [2021-08-31 04:18:21,379 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 67.1MB. Free memory was 49.1MB in the beginning and 49.0MB in the end (delta: 48.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 279.86ms. Allocated memory is still 67.1MB. Free memory was 46.9MB in the beginning and 48.4MB in the end (delta: -1.6MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 53.17ms. Allocated memory is still 67.1MB. Free memory was 48.4MB in the beginning and 45.8MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 36.78ms. Allocated memory is still 67.1MB. Free memory was 45.8MB in the beginning and 43.8MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 193.54ms. Allocated memory is still 67.1MB. Free memory was 43.8MB in the beginning and 29.6MB in the end (delta: 14.2MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * BuchiAutomizer took 5770.04ms. Allocated memory was 67.1MB in the beginning and 203.4MB in the end (delta: 136.3MB). Free memory was 29.6MB in the beginning and 137.0MB in the end (delta: -107.4MB). Peak memory consumption was 102.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 3691 locations. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: ClassCastException: class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator cannot be cast to class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData (de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator and de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData are in unnamed module of loader org.eclipse.osgi.internal.loader.EquinoxClassLoader @560348e6) de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: ClassCastException: class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator cannot be cast to class de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData (de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsAggregator and de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData are in unnamed module of loader org.eclipse.osgi.internal.loader.EquinoxClassLoader @560348e6): de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiCegarLoopBenchmark.prettyprintBenchmarkData(BuchiCegarLoopBenchmark.java:178) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2021-08-31 04:18:21,406 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...