./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-3.i --full-output -ea --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-3.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c098eb2ea0abe7b0f4b25f613d67df9ef36b2215e5396f258b75924d2167f9c8 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-21 04:39:10,464 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-21 04:39:10,479 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-21 04:39:10,500 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-21 04:39:10,502 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-21 04:39:10,504 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-21 04:39:10,505 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-21 04:39:10,508 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-21 04:39:10,511 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-21 04:39:10,513 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-21 04:39:10,514 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-21 04:39:10,516 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-21 04:39:10,516 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-21 04:39:10,518 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-21 04:39:10,519 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-21 04:39:10,520 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-21 04:39:10,521 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-21 04:39:10,521 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-21 04:39:10,523 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-21 04:39:10,524 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-21 04:39:10,525 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-21 04:39:10,526 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-21 04:39:10,527 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-21 04:39:10,527 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-21 04:39:10,529 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-21 04:39:10,530 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-21 04:39:10,530 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-21 04:39:10,531 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-21 04:39:10,531 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-21 04:39:10,532 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-21 04:39:10,534 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-21 04:39:10,535 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-21 04:39:10,536 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-21 04:39:10,537 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-21 04:39:10,540 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-21 04:39:10,541 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-21 04:39:10,541 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-21 04:39:10,541 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-21 04:39:10,542 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-21 04:39:10,542 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-21 04:39:10,544 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-21 04:39:10,545 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-02-21 04:39:10,566 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-21 04:39:10,567 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-21 04:39:10,568 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-21 04:39:10,568 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-21 04:39:10,569 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-21 04:39:10,569 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-21 04:39:10,569 INFO L138 SettingsManager]: * Use SBE=true [2022-02-21 04:39:10,569 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-02-21 04:39:10,569 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-02-21 04:39:10,570 INFO L138 SettingsManager]: * Use old map elimination=false [2022-02-21 04:39:10,570 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-02-21 04:39:10,571 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-02-21 04:39:10,571 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-02-21 04:39:10,571 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-21 04:39:10,571 INFO L138 SettingsManager]: * sizeof long=4 [2022-02-21 04:39:10,571 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-02-21 04:39:10,571 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-21 04:39:10,572 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-02-21 04:39:10,572 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-21 04:39:10,572 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-02-21 04:39:10,572 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-02-21 04:39:10,572 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-02-21 04:39:10,572 INFO L138 SettingsManager]: * sizeof long double=12 [2022-02-21 04:39:10,573 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-21 04:39:10,573 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-02-21 04:39:10,573 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-21 04:39:10,573 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-02-21 04:39:10,573 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-21 04:39:10,573 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-21 04:39:10,574 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-21 04:39:10,574 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-21 04:39:10,575 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-02-21 04:39:10,575 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c098eb2ea0abe7b0f4b25f613d67df9ef36b2215e5396f258b75924d2167f9c8 [2022-02-21 04:39:10,770 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-21 04:39:10,793 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-21 04:39:10,795 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-21 04:39:10,795 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-21 04:39:10,796 INFO L275 PluginConnector]: CDTParser initialized [2022-02-21 04:39:10,797 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-3.i [2022-02-21 04:39:10,862 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c90f5d3a9/e9cd76e5f60a46bfb7a9a3b27f99fe98/FLAG7849fdf2c [2022-02-21 04:39:11,352 INFO L306 CDTParser]: Found 1 translation units. [2022-02-21 04:39:11,353 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-3.i [2022-02-21 04:39:11,403 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c90f5d3a9/e9cd76e5f60a46bfb7a9a3b27f99fe98/FLAG7849fdf2c [2022-02-21 04:39:11,871 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c90f5d3a9/e9cd76e5f60a46bfb7a9a3b27f99fe98 [2022-02-21 04:39:11,880 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-21 04:39:11,896 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-21 04:39:11,899 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-21 04:39:11,899 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-21 04:39:11,902 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-21 04:39:11,903 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:39:11" (1/1) ... [2022-02-21 04:39:11,904 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@436a1148 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:11, skipping insertion in model container [2022-02-21 04:39:11,904 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:39:11" (1/1) ... [2022-02-21 04:39:11,909 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-21 04:39:11,944 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-21 04:39:12,281 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-3.i[33022,33035] [2022-02-21 04:39:12,489 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:39:12,504 INFO L203 MainTranslator]: Completed pre-run [2022-02-21 04:39:12,549 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-3.i[33022,33035] [2022-02-21 04:39:12,694 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:39:12,740 INFO L208 MainTranslator]: Completed translation [2022-02-21 04:39:12,741 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12 WrapperNode [2022-02-21 04:39:12,747 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-21 04:39:12,749 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-21 04:39:12,749 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-21 04:39:12,749 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-21 04:39:12,756 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:12,796 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:12,902 INFO L137 Inliner]: procedures = 177, calls = 623, calls flagged for inlining = 10, calls inlined = 22, statements flattened = 2605 [2022-02-21 04:39:12,902 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-21 04:39:12,903 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-21 04:39:12,903 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-21 04:39:12,903 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-21 04:39:12,921 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:12,921 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:12,938 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:12,938 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:13,022 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:13,044 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:13,077 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:13,091 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-21 04:39:13,092 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-21 04:39:13,093 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-21 04:39:13,093 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-21 04:39:13,094 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (1/1) ... [2022-02-21 04:39:13,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-02-21 04:39:13,106 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:39:13,128 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-02-21 04:39:13,146 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-02-21 04:39:13,159 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-21 04:39:13,159 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-21 04:39:13,160 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-21 04:39:13,160 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-21 04:39:13,161 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-21 04:39:13,161 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-21 04:39:13,161 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-21 04:39:13,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-21 04:39:13,449 INFO L234 CfgBuilder]: Building ICFG [2022-02-21 04:39:13,450 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-21 04:39:13,453 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-02-21 04:39:20,992 INFO L275 CfgBuilder]: Performing block encoding [2022-02-21 04:39:21,023 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-21 04:39:21,023 INFO L299 CfgBuilder]: Removed 168 assume(true) statements. [2022-02-21 04:39:21,026 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:39:21 BoogieIcfgContainer [2022-02-21 04:39:21,026 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-21 04:39:21,027 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-02-21 04:39:21,027 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-02-21 04:39:21,030 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-02-21 04:39:21,030 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:39:21,030 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.02 04:39:11" (1/3) ... [2022-02-21 04:39:21,032 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28d3b260 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:39:21, skipping insertion in model container [2022-02-21 04:39:21,032 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:39:21,032 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:39:12" (2/3) ... [2022-02-21 04:39:21,033 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28d3b260 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:39:21, skipping insertion in model container [2022-02-21 04:39:21,033 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:39:21,033 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:39:21" (3/3) ... [2022-02-21 04:39:21,034 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test10-3.i [2022-02-21 04:39:21,082 INFO L359 BuchiCegarLoop]: Interprodecural is true [2022-02-21 04:39:21,082 INFO L360 BuchiCegarLoop]: Hoare is false [2022-02-21 04:39:21,082 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-02-21 04:39:21,083 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-02-21 04:39:21,083 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-02-21 04:39:21,083 INFO L364 BuchiCegarLoop]: Difference is false [2022-02-21 04:39:21,083 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-02-21 04:39:21,083 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2022-02-21 04:39:21,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 509 states, 501 states have (on average 1.7045908183632734) internal successors, (854), 501 states have internal predecessors, (854), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:21,205 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 436 [2022-02-21 04:39:21,205 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:21,205 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:21,221 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:21,221 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:21,221 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2022-02-21 04:39:21,226 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 509 states, 501 states have (on average 1.7045908183632734) internal successors, (854), 501 states have internal predecessors, (854), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:21,268 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 436 [2022-02-21 04:39:21,269 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:21,269 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:21,270 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:21,270 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:21,276 INFO L791 eck$LassoCheckResult]: Stem: 496#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 427#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem498#1.base, main_#t~mem498#1.offset, main_#t~mem499#1.base, main_#t~mem499#1.offset, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~mem502#1.base, main_#t~mem502#1.offset, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1.base, main_#t~mem506#1.offset, main_#t~mem507#1.base, main_#t~mem507#1.offset, main_#t~mem508#1.base, main_#t~mem508#1.offset, main_#t~mem509#1, main_#t~mem510#1.base, main_#t~mem510#1.offset, main_#t~mem511#1.base, main_#t~mem511#1.offset, main_#t~mem512#1.base, main_#t~mem512#1.offset, main_#t~mem513#1, main_#t~mem514#1.base, main_#t~mem514#1.offset, main_#t~mem515#1.base, main_#t~mem515#1.offset, main_#t~mem516#1.base, main_#t~mem516#1.offset, main_#t~mem517#1.base, main_#t~mem517#1.offset, main_#t~mem518#1.base, main_#t~mem518#1.offset, main_#t~mem519#1, main_#t~mem520#1.base, main_#t~mem520#1.offset, main_#t~mem523#1, main_#t~mem521#1.base, main_#t~mem521#1.offset, main_#t~mem522#1, main_#t~mem524#1.base, main_#t~mem524#1.offset, main_#t~mem525#1.base, main_#t~mem525#1.offset, main_#t~mem526#1, main_#t~post527#1, main_#t~mem528#1.base, main_#t~mem528#1.offset, main_#t~mem529#1.base, main_#t~mem529#1.offset, main_#t~mem530#1.base, main_#t~mem530#1.offset, main_#t~mem531#1.base, main_#t~mem531#1.offset, main_#t~mem532#1.base, main_#t~mem532#1.offset, main_#t~mem533#1.base, main_#t~mem533#1.offset, main_#t~mem534#1.base, main_#t~mem534#1.offset, main_#t~mem535#1.base, main_#t~mem535#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem536#1.base, main_#t~mem536#1.offset, main_#t~mem537#1, main_#t~post538#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 265#L733-4true [2022-02-21 04:39:21,277 INFO L793 eck$LassoCheckResult]: Loop: 265#L733-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3#L733-1true assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 502#L735true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 112#L735-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 434#L740true assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 65#L743-123true assume !true; 67#L733-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 265#L733-4true [2022-02-21 04:39:21,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:21,281 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-02-21 04:39:21,289 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:21,289 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733850150] [2022-02-21 04:39:21,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:21,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:21,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:21,368 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:39:21,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:21,437 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:39:21,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:21,440 INFO L85 PathProgramCache]: Analyzing trace with hash -1529483753, now seen corresponding path program 1 times [2022-02-21 04:39:21,440 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:21,440 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996160701] [2022-02-21 04:39:21,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:21,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:21,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:21,484 INFO L290 TraceCheckUtils]: 0: Hoare triple {515#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {515#true} is VALID [2022-02-21 04:39:21,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {515#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {515#true} is VALID [2022-02-21 04:39:21,485 INFO L290 TraceCheckUtils]: 2: Hoare triple {515#true} assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; {516#false} is VALID [2022-02-21 04:39:21,485 INFO L290 TraceCheckUtils]: 3: Hoare triple {516#false} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {516#false} is VALID [2022-02-21 04:39:21,485 INFO L290 TraceCheckUtils]: 4: Hoare triple {516#false} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {516#false} is VALID [2022-02-21 04:39:21,485 INFO L290 TraceCheckUtils]: 5: Hoare triple {516#false} assume !true; {516#false} is VALID [2022-02-21 04:39:21,485 INFO L290 TraceCheckUtils]: 6: Hoare triple {516#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {516#false} is VALID [2022-02-21 04:39:21,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:39:21,486 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:39:21,487 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996160701] [2022-02-21 04:39:21,487 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [996160701] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:39:21,487 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:39:21,487 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-02-21 04:39:21,488 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156469492] [2022-02-21 04:39:21,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:39:21,491 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:39:21,491 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:39:21,518 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-02-21 04:39:21,519 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-02-21 04:39:21,522 INFO L87 Difference]: Start difference. First operand has 509 states, 501 states have (on average 1.7045908183632734) internal successors, (854), 501 states have internal predecessors, (854), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:22,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:22,310 INFO L93 Difference]: Finished difference Result 509 states and 675 transitions. [2022-02-21 04:39:22,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-02-21 04:39:22,311 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:22,324 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7 edges. 7 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:39:22,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 509 states and 675 transitions. [2022-02-21 04:39:22,349 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 268 [2022-02-21 04:39:22,365 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 509 states to 505 states and 671 transitions. [2022-02-21 04:39:22,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 505 [2022-02-21 04:39:22,367 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 505 [2022-02-21 04:39:22,367 INFO L73 IsDeterministic]: Start isDeterministic. Operand 505 states and 671 transitions. [2022-02-21 04:39:22,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:39:22,369 INFO L681 BuchiCegarLoop]: Abstraction has 505 states and 671 transitions. [2022-02-21 04:39:22,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states and 671 transitions. [2022-02-21 04:39:22,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 505. [2022-02-21 04:39:22,401 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:39:22,403 INFO L82 GeneralOperation]: Start isEquivalent. First operand 505 states and 671 transitions. Second operand has 505 states, 498 states have (on average 1.323293172690763) internal successors, (659), 497 states have internal predecessors, (659), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:22,405 INFO L74 IsIncluded]: Start isIncluded. First operand 505 states and 671 transitions. Second operand has 505 states, 498 states have (on average 1.323293172690763) internal successors, (659), 497 states have internal predecessors, (659), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:22,407 INFO L87 Difference]: Start difference. First operand 505 states and 671 transitions. Second operand has 505 states, 498 states have (on average 1.323293172690763) internal successors, (659), 497 states have internal predecessors, (659), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:22,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:22,427 INFO L93 Difference]: Finished difference Result 505 states and 671 transitions. [2022-02-21 04:39:22,428 INFO L276 IsEmpty]: Start isEmpty. Operand 505 states and 671 transitions. [2022-02-21 04:39:22,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:22,431 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:22,432 INFO L74 IsIncluded]: Start isIncluded. First operand has 505 states, 498 states have (on average 1.323293172690763) internal successors, (659), 497 states have internal predecessors, (659), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 505 states and 671 transitions. [2022-02-21 04:39:22,433 INFO L87 Difference]: Start difference. First operand has 505 states, 498 states have (on average 1.323293172690763) internal successors, (659), 497 states have internal predecessors, (659), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 505 states and 671 transitions. [2022-02-21 04:39:22,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:22,445 INFO L93 Difference]: Finished difference Result 505 states and 671 transitions. [2022-02-21 04:39:22,445 INFO L276 IsEmpty]: Start isEmpty. Operand 505 states and 671 transitions. [2022-02-21 04:39:22,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:22,447 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:22,447 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:39:22,447 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:39:22,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 505 states, 498 states have (on average 1.323293172690763) internal successors, (659), 497 states have internal predecessors, (659), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:22,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 505 states to 505 states and 671 transitions. [2022-02-21 04:39:22,461 INFO L704 BuchiCegarLoop]: Abstraction has 505 states and 671 transitions. [2022-02-21 04:39:22,461 INFO L587 BuchiCegarLoop]: Abstraction has 505 states and 671 transitions. [2022-02-21 04:39:22,461 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2022-02-21 04:39:22,461 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 505 states and 671 transitions. [2022-02-21 04:39:22,463 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 268 [2022-02-21 04:39:22,463 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:22,463 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:22,464 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:22,464 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:22,464 INFO L791 eck$LassoCheckResult]: Stem: 1530#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 1519#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem498#1.base, main_#t~mem498#1.offset, main_#t~mem499#1.base, main_#t~mem499#1.offset, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~mem502#1.base, main_#t~mem502#1.offset, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1.base, main_#t~mem506#1.offset, main_#t~mem507#1.base, main_#t~mem507#1.offset, main_#t~mem508#1.base, main_#t~mem508#1.offset, main_#t~mem509#1, main_#t~mem510#1.base, main_#t~mem510#1.offset, main_#t~mem511#1.base, main_#t~mem511#1.offset, main_#t~mem512#1.base, main_#t~mem512#1.offset, main_#t~mem513#1, main_#t~mem514#1.base, main_#t~mem514#1.offset, main_#t~mem515#1.base, main_#t~mem515#1.offset, main_#t~mem516#1.base, main_#t~mem516#1.offset, main_#t~mem517#1.base, main_#t~mem517#1.offset, main_#t~mem518#1.base, main_#t~mem518#1.offset, main_#t~mem519#1, main_#t~mem520#1.base, main_#t~mem520#1.offset, main_#t~mem523#1, main_#t~mem521#1.base, main_#t~mem521#1.offset, main_#t~mem522#1, main_#t~mem524#1.base, main_#t~mem524#1.offset, main_#t~mem525#1.base, main_#t~mem525#1.offset, main_#t~mem526#1, main_#t~post527#1, main_#t~mem528#1.base, main_#t~mem528#1.offset, main_#t~mem529#1.base, main_#t~mem529#1.offset, main_#t~mem530#1.base, main_#t~mem530#1.offset, main_#t~mem531#1.base, main_#t~mem531#1.offset, main_#t~mem532#1.base, main_#t~mem532#1.offset, main_#t~mem533#1.base, main_#t~mem533#1.offset, main_#t~mem534#1.base, main_#t~mem534#1.offset, main_#t~mem535#1.base, main_#t~mem535#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem536#1.base, main_#t~mem536#1.offset, main_#t~mem537#1, main_#t~post538#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1162#L733-4 [2022-02-21 04:39:22,466 INFO L793 eck$LassoCheckResult]: Loop: 1162#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1026#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1028#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1242#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1243#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 1158#L743-123 havoc main_~_ha_hashv~1#1; 1159#L743-48 goto; 1078#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 1079#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 1174#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 1175#L743-9 assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 1501#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 1308#L743-12 assume !main_#t~switch157#1; 1309#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 1360#L743-15 assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 1401#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 1402#L743-18 assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 1367#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 1368#L743-21 assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 1314#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 1315#L743-24 assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 1439#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 1310#L743-27 assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; 1311#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 1056#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 1057#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 1266#L743-33 assume !main_#t~switch157#1; 1475#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 1384#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 1385#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 1297#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 1298#L743-41 havoc main_#t~switch157#1; 1416#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 1417#L743-43 goto; 1444#L743-45 goto; 1122#L743-47 goto; 1115#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 1116#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 1371#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 1372#L743-65 goto; 1149#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 1150#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 1111#L743-69 goto; 1112#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 1292#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 1277#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 1190#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 1191#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 1183#L743-116 goto; 1184#L743-118 goto; 1305#L743-120 goto; 1500#L743-122 goto; 1161#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1162#L733-4 [2022-02-21 04:39:22,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:22,466 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-02-21 04:39:22,467 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:22,467 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1004620599] [2022-02-21 04:39:22,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:22,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:22,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:22,500 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:39:22,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:22,516 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:39:22,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:22,517 INFO L85 PathProgramCache]: Analyzing trace with hash 2000398624, now seen corresponding path program 1 times [2022-02-21 04:39:22,517 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:22,517 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474027578] [2022-02-21 04:39:22,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:22,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:22,636 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:39:22,637 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [353858765] [2022-02-21 04:39:22,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:22,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:39:22,637 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:39:22,639 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:39:22,640 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-21 04:39:23,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:23,275 INFO L263 TraceCheckSpWp]: Trace formula consists of 1830 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-21 04:39:23,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:23,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:39:23,441 INFO L290 TraceCheckUtils]: 0: Hoare triple {2546#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {2546#true} is VALID [2022-02-21 04:39:23,441 INFO L290 TraceCheckUtils]: 1: Hoare triple {2546#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {2546#true} is VALID [2022-02-21 04:39:23,442 INFO L290 TraceCheckUtils]: 2: Hoare triple {2546#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {2546#true} is VALID [2022-02-21 04:39:23,442 INFO L290 TraceCheckUtils]: 3: Hoare triple {2546#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {2546#true} is VALID [2022-02-21 04:39:23,442 INFO L290 TraceCheckUtils]: 4: Hoare triple {2546#true} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {2546#true} is VALID [2022-02-21 04:39:23,442 INFO L290 TraceCheckUtils]: 5: Hoare triple {2546#true} havoc main_~_ha_hashv~1#1; {2546#true} is VALID [2022-02-21 04:39:23,442 INFO L290 TraceCheckUtils]: 6: Hoare triple {2546#true} goto; {2546#true} is VALID [2022-02-21 04:39:23,443 INFO L290 TraceCheckUtils]: 7: Hoare triple {2546#true} havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; {2546#true} is VALID [2022-02-21 04:39:23,443 INFO L290 TraceCheckUtils]: 8: Hoare triple {2546#true} assume !(main_~_hj_k~1#1 % 4294967296 >= 12); {2546#true} is VALID [2022-02-21 04:39:23,443 INFO L290 TraceCheckUtils]: 9: Hoare triple {2546#true} main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; {2546#true} is VALID [2022-02-21 04:39:23,444 INFO L290 TraceCheckUtils]: 10: Hoare triple {2546#true} assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; {2581#|ULTIMATE.start_main_#t~switch157#1|} is VALID [2022-02-21 04:39:23,444 INFO L290 TraceCheckUtils]: 11: Hoare triple {2581#|ULTIMATE.start_main_#t~switch157#1|} main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; {2581#|ULTIMATE.start_main_#t~switch157#1|} is VALID [2022-02-21 04:39:23,445 INFO L290 TraceCheckUtils]: 12: Hoare triple {2581#|ULTIMATE.start_main_#t~switch157#1|} assume !main_#t~switch157#1; {2547#false} is VALID [2022-02-21 04:39:23,445 INFO L290 TraceCheckUtils]: 13: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,445 INFO L290 TraceCheckUtils]: 14: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; {2547#false} is VALID [2022-02-21 04:39:23,445 INFO L290 TraceCheckUtils]: 15: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,446 INFO L290 TraceCheckUtils]: 16: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; {2547#false} is VALID [2022-02-21 04:39:23,446 INFO L290 TraceCheckUtils]: 17: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,446 INFO L290 TraceCheckUtils]: 18: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; {2547#false} is VALID [2022-02-21 04:39:23,446 INFO L290 TraceCheckUtils]: 19: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,446 INFO L290 TraceCheckUtils]: 20: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; {2547#false} is VALID [2022-02-21 04:39:23,447 INFO L290 TraceCheckUtils]: 21: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,447 INFO L290 TraceCheckUtils]: 22: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; {2547#false} is VALID [2022-02-21 04:39:23,447 INFO L290 TraceCheckUtils]: 23: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,447 INFO L290 TraceCheckUtils]: 24: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; {2547#false} is VALID [2022-02-21 04:39:23,448 INFO L290 TraceCheckUtils]: 25: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,448 INFO L290 TraceCheckUtils]: 26: Hoare triple {2547#false} assume !main_#t~switch157#1; {2547#false} is VALID [2022-02-21 04:39:23,448 INFO L290 TraceCheckUtils]: 27: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,448 INFO L290 TraceCheckUtils]: 28: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; {2547#false} is VALID [2022-02-21 04:39:23,448 INFO L290 TraceCheckUtils]: 29: Hoare triple {2547#false} main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; {2547#false} is VALID [2022-02-21 04:39:23,449 INFO L290 TraceCheckUtils]: 30: Hoare triple {2547#false} assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; {2547#false} is VALID [2022-02-21 04:39:23,449 INFO L290 TraceCheckUtils]: 31: Hoare triple {2547#false} havoc main_#t~switch157#1; {2547#false} is VALID [2022-02-21 04:39:23,449 INFO L290 TraceCheckUtils]: 32: Hoare triple {2547#false} main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); {2547#false} is VALID [2022-02-21 04:39:23,449 INFO L290 TraceCheckUtils]: 33: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,450 INFO L290 TraceCheckUtils]: 34: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,450 INFO L290 TraceCheckUtils]: 35: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,450 INFO L290 TraceCheckUtils]: 36: Hoare triple {2547#false} call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); {2547#false} is VALID [2022-02-21 04:39:23,450 INFO L290 TraceCheckUtils]: 37: Hoare triple {2547#false} assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; {2547#false} is VALID [2022-02-21 04:39:23,450 INFO L290 TraceCheckUtils]: 38: Hoare triple {2547#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; {2547#false} is VALID [2022-02-21 04:39:23,451 INFO L290 TraceCheckUtils]: 39: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,451 INFO L290 TraceCheckUtils]: 40: Hoare triple {2547#false} havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; {2547#false} is VALID [2022-02-21 04:39:23,451 INFO L290 TraceCheckUtils]: 41: Hoare triple {2547#false} call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; {2547#false} is VALID [2022-02-21 04:39:23,451 INFO L290 TraceCheckUtils]: 42: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,452 INFO L290 TraceCheckUtils]: 43: Hoare triple {2547#false} call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); {2547#false} is VALID [2022-02-21 04:39:23,452 INFO L290 TraceCheckUtils]: 44: Hoare triple {2547#false} assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; {2547#false} is VALID [2022-02-21 04:39:23,452 INFO L290 TraceCheckUtils]: 45: Hoare triple {2547#false} call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; {2547#false} is VALID [2022-02-21 04:39:23,452 INFO L290 TraceCheckUtils]: 46: Hoare triple {2547#false} assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; {2547#false} is VALID [2022-02-21 04:39:23,452 INFO L290 TraceCheckUtils]: 47: Hoare triple {2547#false} assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; {2547#false} is VALID [2022-02-21 04:39:23,453 INFO L290 TraceCheckUtils]: 48: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,453 INFO L290 TraceCheckUtils]: 49: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,453 INFO L290 TraceCheckUtils]: 50: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,453 INFO L290 TraceCheckUtils]: 51: Hoare triple {2547#false} goto; {2547#false} is VALID [2022-02-21 04:39:23,454 INFO L290 TraceCheckUtils]: 52: Hoare triple {2547#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {2547#false} is VALID [2022-02-21 04:39:23,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:39:23,454 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:39:23,454 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:39:23,455 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474027578] [2022-02-21 04:39:23,455 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:39:23,455 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [353858765] [2022-02-21 04:39:23,455 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [353858765] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:39:23,456 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:39:23,456 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-21 04:39:23,456 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852608397] [2022-02-21 04:39:23,456 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:39:23,457 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:39:23,457 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:39:23,457 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-21 04:39:23,458 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-21 04:39:23,458 INFO L87 Difference]: Start difference. First operand 505 states and 671 transitions. cyclomatic complexity: 177 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:24,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:24,933 INFO L93 Difference]: Finished difference Result 526 states and 692 transitions. [2022-02-21 04:39:24,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-21 04:39:24,933 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:24,991 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:39:24,992 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 526 states and 692 transitions. [2022-02-21 04:39:25,011 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 289 [2022-02-21 04:39:25,030 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 526 states to 526 states and 692 transitions. [2022-02-21 04:39:25,030 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 526 [2022-02-21 04:39:25,031 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 526 [2022-02-21 04:39:25,031 INFO L73 IsDeterministic]: Start isDeterministic. Operand 526 states and 692 transitions. [2022-02-21 04:39:25,032 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:39:25,033 INFO L681 BuchiCegarLoop]: Abstraction has 526 states and 692 transitions. [2022-02-21 04:39:25,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 526 states and 692 transitions. [2022-02-21 04:39:25,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 526 to 525. [2022-02-21 04:39:25,045 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:39:25,047 INFO L82 GeneralOperation]: Start isEquivalent. First operand 526 states and 692 transitions. Second operand has 525 states, 518 states have (on average 1.3108108108108107) internal successors, (679), 517 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:25,048 INFO L74 IsIncluded]: Start isIncluded. First operand 526 states and 692 transitions. Second operand has 525 states, 518 states have (on average 1.3108108108108107) internal successors, (679), 517 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:25,049 INFO L87 Difference]: Start difference. First operand 526 states and 692 transitions. Second operand has 525 states, 518 states have (on average 1.3108108108108107) internal successors, (679), 517 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:25,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:25,070 INFO L93 Difference]: Finished difference Result 526 states and 692 transitions. [2022-02-21 04:39:25,070 INFO L276 IsEmpty]: Start isEmpty. Operand 526 states and 692 transitions. [2022-02-21 04:39:25,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:25,072 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:25,074 INFO L74 IsIncluded]: Start isIncluded. First operand has 525 states, 518 states have (on average 1.3108108108108107) internal successors, (679), 517 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 526 states and 692 transitions. [2022-02-21 04:39:25,075 INFO L87 Difference]: Start difference. First operand has 525 states, 518 states have (on average 1.3108108108108107) internal successors, (679), 517 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 526 states and 692 transitions. [2022-02-21 04:39:25,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:25,112 INFO L93 Difference]: Finished difference Result 526 states and 692 transitions. [2022-02-21 04:39:25,113 INFO L276 IsEmpty]: Start isEmpty. Operand 526 states and 692 transitions. [2022-02-21 04:39:25,114 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:25,114 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:25,114 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:39:25,114 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:39:25,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 525 states, 518 states have (on average 1.3108108108108107) internal successors, (679), 517 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:25,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 691 transitions. [2022-02-21 04:39:25,133 INFO L704 BuchiCegarLoop]: Abstraction has 525 states and 691 transitions. [2022-02-21 04:39:25,133 INFO L587 BuchiCegarLoop]: Abstraction has 525 states and 691 transitions. [2022-02-21 04:39:25,133 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2022-02-21 04:39:25,133 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 525 states and 691 transitions. [2022-02-21 04:39:25,136 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 288 [2022-02-21 04:39:25,136 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:25,136 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:25,139 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:25,139 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:25,139 INFO L791 eck$LassoCheckResult]: Stem: 3742#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 3731#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem498#1.base, main_#t~mem498#1.offset, main_#t~mem499#1.base, main_#t~mem499#1.offset, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~mem502#1.base, main_#t~mem502#1.offset, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1.base, main_#t~mem506#1.offset, main_#t~mem507#1.base, main_#t~mem507#1.offset, main_#t~mem508#1.base, main_#t~mem508#1.offset, main_#t~mem509#1, main_#t~mem510#1.base, main_#t~mem510#1.offset, main_#t~mem511#1.base, main_#t~mem511#1.offset, main_#t~mem512#1.base, main_#t~mem512#1.offset, main_#t~mem513#1, main_#t~mem514#1.base, main_#t~mem514#1.offset, main_#t~mem515#1.base, main_#t~mem515#1.offset, main_#t~mem516#1.base, main_#t~mem516#1.offset, main_#t~mem517#1.base, main_#t~mem517#1.offset, main_#t~mem518#1.base, main_#t~mem518#1.offset, main_#t~mem519#1, main_#t~mem520#1.base, main_#t~mem520#1.offset, main_#t~mem523#1, main_#t~mem521#1.base, main_#t~mem521#1.offset, main_#t~mem522#1, main_#t~mem524#1.base, main_#t~mem524#1.offset, main_#t~mem525#1.base, main_#t~mem525#1.offset, main_#t~mem526#1, main_#t~post527#1, main_#t~mem528#1.base, main_#t~mem528#1.offset, main_#t~mem529#1.base, main_#t~mem529#1.offset, main_#t~mem530#1.base, main_#t~mem530#1.offset, main_#t~mem531#1.base, main_#t~mem531#1.offset, main_#t~mem532#1.base, main_#t~mem532#1.offset, main_#t~mem533#1.base, main_#t~mem533#1.offset, main_#t~mem534#1.base, main_#t~mem534#1.offset, main_#t~mem535#1.base, main_#t~mem535#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem536#1.base, main_#t~mem536#1.offset, main_#t~mem537#1, main_#t~post538#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3367#L733-4 [2022-02-21 04:39:25,140 INFO L793 eck$LassoCheckResult]: Loop: 3367#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3231#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 3233#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3447#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3448#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 3363#L743-123 havoc main_~_ha_hashv~1#1; 3364#L743-48 goto; 3285#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 3286#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 3379#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 3380#L743-9 assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 3712#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 3513#L743-12 assume main_#t~switch157#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 3514#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 3673#L743-15 assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 3609#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 3610#L743-18 assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 3573#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 3574#L743-21 assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 3519#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 3520#L743-24 assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 3649#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 3515#L743-27 assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; 3516#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 3264#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 3265#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 3472#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 3687#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 3592#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 3593#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 3504#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 3505#L743-41 havoc main_#t~switch157#1; 3626#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 3627#L743-43 goto; 3654#L743-45 goto; 3327#L743-47 goto; 3320#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 3321#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 3577#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 3578#L743-65 goto; 3354#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 3355#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 3316#L743-69 goto; 3317#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 3497#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 3482#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 3395#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 3396#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 3388#L743-116 goto; 3389#L743-118 goto; 3510#L743-120 goto; 3711#L743-122 goto; 3366#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3367#L733-4 [2022-02-21 04:39:25,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:25,144 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-02-21 04:39:25,144 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:25,145 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062433225] [2022-02-21 04:39:25,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:25,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:25,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:25,187 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:39:25,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:25,224 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:39:25,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:25,225 INFO L85 PathProgramCache]: Analyzing trace with hash -346476132, now seen corresponding path program 1 times [2022-02-21 04:39:25,225 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:25,225 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997631831] [2022-02-21 04:39:25,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:25,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:25,398 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:39:25,399 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [871721510] [2022-02-21 04:39:25,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:25,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:39:25,400 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:39:25,401 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:39:25,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-21 04:39:26,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:26,135 INFO L263 TraceCheckSpWp]: Trace formula consists of 1842 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-21 04:39:26,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:26,156 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:39:26,270 INFO L290 TraceCheckUtils]: 0: Hoare triple {4813#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {4813#true} is VALID [2022-02-21 04:39:26,270 INFO L290 TraceCheckUtils]: 1: Hoare triple {4813#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {4813#true} is VALID [2022-02-21 04:39:26,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {4813#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {4813#true} is VALID [2022-02-21 04:39:26,271 INFO L290 TraceCheckUtils]: 3: Hoare triple {4813#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {4813#true} is VALID [2022-02-21 04:39:26,271 INFO L290 TraceCheckUtils]: 4: Hoare triple {4813#true} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {4813#true} is VALID [2022-02-21 04:39:26,271 INFO L290 TraceCheckUtils]: 5: Hoare triple {4813#true} havoc main_~_ha_hashv~1#1; {4813#true} is VALID [2022-02-21 04:39:26,271 INFO L290 TraceCheckUtils]: 6: Hoare triple {4813#true} goto; {4813#true} is VALID [2022-02-21 04:39:26,272 INFO L290 TraceCheckUtils]: 7: Hoare triple {4813#true} havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; {4839#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} is VALID [2022-02-21 04:39:26,272 INFO L290 TraceCheckUtils]: 8: Hoare triple {4839#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} assume !(main_~_hj_k~1#1 % 4294967296 >= 12); {4839#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} is VALID [2022-02-21 04:39:26,273 INFO L290 TraceCheckUtils]: 9: Hoare triple {4839#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; {4846#(not |ULTIMATE.start_main_#t~switch157#1|)} is VALID [2022-02-21 04:39:26,273 INFO L290 TraceCheckUtils]: 10: Hoare triple {4846#(not |ULTIMATE.start_main_#t~switch157#1|)} assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; {4814#false} is VALID [2022-02-21 04:39:26,273 INFO L290 TraceCheckUtils]: 11: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,273 INFO L290 TraceCheckUtils]: 12: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 13: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 14: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 15: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 16: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 17: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 18: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; {4814#false} is VALID [2022-02-21 04:39:26,274 INFO L290 TraceCheckUtils]: 19: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,275 INFO L290 TraceCheckUtils]: 20: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; {4814#false} is VALID [2022-02-21 04:39:26,275 INFO L290 TraceCheckUtils]: 21: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,275 INFO L290 TraceCheckUtils]: 22: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; {4814#false} is VALID [2022-02-21 04:39:26,275 INFO L290 TraceCheckUtils]: 23: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,275 INFO L290 TraceCheckUtils]: 24: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; {4814#false} is VALID [2022-02-21 04:39:26,275 INFO L290 TraceCheckUtils]: 25: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,276 INFO L290 TraceCheckUtils]: 26: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; {4814#false} is VALID [2022-02-21 04:39:26,276 INFO L290 TraceCheckUtils]: 27: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,276 INFO L290 TraceCheckUtils]: 28: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; {4814#false} is VALID [2022-02-21 04:39:26,276 INFO L290 TraceCheckUtils]: 29: Hoare triple {4814#false} main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; {4814#false} is VALID [2022-02-21 04:39:26,276 INFO L290 TraceCheckUtils]: 30: Hoare triple {4814#false} assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; {4814#false} is VALID [2022-02-21 04:39:26,276 INFO L290 TraceCheckUtils]: 31: Hoare triple {4814#false} havoc main_#t~switch157#1; {4814#false} is VALID [2022-02-21 04:39:26,277 INFO L290 TraceCheckUtils]: 32: Hoare triple {4814#false} main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); {4814#false} is VALID [2022-02-21 04:39:26,277 INFO L290 TraceCheckUtils]: 33: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,277 INFO L290 TraceCheckUtils]: 34: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,277 INFO L290 TraceCheckUtils]: 35: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,277 INFO L290 TraceCheckUtils]: 36: Hoare triple {4814#false} call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); {4814#false} is VALID [2022-02-21 04:39:26,277 INFO L290 TraceCheckUtils]: 37: Hoare triple {4814#false} assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; {4814#false} is VALID [2022-02-21 04:39:26,278 INFO L290 TraceCheckUtils]: 38: Hoare triple {4814#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; {4814#false} is VALID [2022-02-21 04:39:26,278 INFO L290 TraceCheckUtils]: 39: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,278 INFO L290 TraceCheckUtils]: 40: Hoare triple {4814#false} havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; {4814#false} is VALID [2022-02-21 04:39:26,278 INFO L290 TraceCheckUtils]: 41: Hoare triple {4814#false} call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; {4814#false} is VALID [2022-02-21 04:39:26,278 INFO L290 TraceCheckUtils]: 42: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,278 INFO L290 TraceCheckUtils]: 43: Hoare triple {4814#false} call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); {4814#false} is VALID [2022-02-21 04:39:26,279 INFO L290 TraceCheckUtils]: 44: Hoare triple {4814#false} assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; {4814#false} is VALID [2022-02-21 04:39:26,279 INFO L290 TraceCheckUtils]: 45: Hoare triple {4814#false} call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; {4814#false} is VALID [2022-02-21 04:39:26,279 INFO L290 TraceCheckUtils]: 46: Hoare triple {4814#false} assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; {4814#false} is VALID [2022-02-21 04:39:26,279 INFO L290 TraceCheckUtils]: 47: Hoare triple {4814#false} assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; {4814#false} is VALID [2022-02-21 04:39:26,279 INFO L290 TraceCheckUtils]: 48: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,279 INFO L290 TraceCheckUtils]: 49: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,280 INFO L290 TraceCheckUtils]: 50: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,280 INFO L290 TraceCheckUtils]: 51: Hoare triple {4814#false} goto; {4814#false} is VALID [2022-02-21 04:39:26,280 INFO L290 TraceCheckUtils]: 52: Hoare triple {4814#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {4814#false} is VALID [2022-02-21 04:39:26,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:39:26,280 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:39:26,281 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:39:26,281 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997631831] [2022-02-21 04:39:26,281 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:39:26,281 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [871721510] [2022-02-21 04:39:26,281 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [871721510] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:39:26,281 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:39:26,281 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-21 04:39:26,282 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803358538] [2022-02-21 04:39:26,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:39:26,282 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:39:26,282 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:39:26,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-21 04:39:26,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-21 04:39:26,283 INFO L87 Difference]: Start difference. First operand 525 states and 691 transitions. cyclomatic complexity: 177 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:29,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:29,233 INFO L93 Difference]: Finished difference Result 929 states and 1227 transitions. [2022-02-21 04:39:29,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-21 04:39:29,234 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:29,290 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:39:29,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 929 states and 1227 transitions. [2022-02-21 04:39:29,325 INFO L131 ngComponentsAnalysis]: Automaton has 22 accepting balls. 386 [2022-02-21 04:39:29,360 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 929 states to 929 states and 1227 transitions. [2022-02-21 04:39:29,361 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 929 [2022-02-21 04:39:29,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 929 [2022-02-21 04:39:29,362 INFO L73 IsDeterministic]: Start isDeterministic. Operand 929 states and 1227 transitions. [2022-02-21 04:39:29,363 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:39:29,363 INFO L681 BuchiCegarLoop]: Abstraction has 929 states and 1227 transitions. [2022-02-21 04:39:29,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 929 states and 1227 transitions. [2022-02-21 04:39:29,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 929 to 511. [2022-02-21 04:39:29,372 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:39:29,374 INFO L82 GeneralOperation]: Start isEquivalent. First operand 929 states and 1227 transitions. Second operand has 511 states, 504 states have (on average 1.3055555555555556) internal successors, (658), 503 states have internal predecessors, (658), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:29,375 INFO L74 IsIncluded]: Start isIncluded. First operand 929 states and 1227 transitions. Second operand has 511 states, 504 states have (on average 1.3055555555555556) internal successors, (658), 503 states have internal predecessors, (658), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:29,376 INFO L87 Difference]: Start difference. First operand 929 states and 1227 transitions. Second operand has 511 states, 504 states have (on average 1.3055555555555556) internal successors, (658), 503 states have internal predecessors, (658), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:29,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:29,413 INFO L93 Difference]: Finished difference Result 929 states and 1227 transitions. [2022-02-21 04:39:29,413 INFO L276 IsEmpty]: Start isEmpty. Operand 929 states and 1227 transitions. [2022-02-21 04:39:29,415 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:29,415 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:29,416 INFO L74 IsIncluded]: Start isIncluded. First operand has 511 states, 504 states have (on average 1.3055555555555556) internal successors, (658), 503 states have internal predecessors, (658), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 929 states and 1227 transitions. [2022-02-21 04:39:29,417 INFO L87 Difference]: Start difference. First operand has 511 states, 504 states have (on average 1.3055555555555556) internal successors, (658), 503 states have internal predecessors, (658), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 929 states and 1227 transitions. [2022-02-21 04:39:29,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:29,455 INFO L93 Difference]: Finished difference Result 929 states and 1227 transitions. [2022-02-21 04:39:29,455 INFO L276 IsEmpty]: Start isEmpty. Operand 929 states and 1227 transitions. [2022-02-21 04:39:29,457 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:29,457 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:29,457 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:39:29,458 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:39:29,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 511 states, 504 states have (on average 1.3055555555555556) internal successors, (658), 503 states have internal predecessors, (658), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:29,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 511 states to 511 states and 670 transitions. [2022-02-21 04:39:29,472 INFO L704 BuchiCegarLoop]: Abstraction has 511 states and 670 transitions. [2022-02-21 04:39:29,472 INFO L587 BuchiCegarLoop]: Abstraction has 511 states and 670 transitions. [2022-02-21 04:39:29,472 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2022-02-21 04:39:29,472 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 511 states and 670 transitions. [2022-02-21 04:39:29,475 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 274 [2022-02-21 04:39:29,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:29,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:29,476 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:29,476 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:29,476 INFO L791 eck$LassoCheckResult]: Stem: 6411#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 6400#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem498#1.base, main_#t~mem498#1.offset, main_#t~mem499#1.base, main_#t~mem499#1.offset, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~mem502#1.base, main_#t~mem502#1.offset, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1.base, main_#t~mem506#1.offset, main_#t~mem507#1.base, main_#t~mem507#1.offset, main_#t~mem508#1.base, main_#t~mem508#1.offset, main_#t~mem509#1, main_#t~mem510#1.base, main_#t~mem510#1.offset, main_#t~mem511#1.base, main_#t~mem511#1.offset, main_#t~mem512#1.base, main_#t~mem512#1.offset, main_#t~mem513#1, main_#t~mem514#1.base, main_#t~mem514#1.offset, main_#t~mem515#1.base, main_#t~mem515#1.offset, main_#t~mem516#1.base, main_#t~mem516#1.offset, main_#t~mem517#1.base, main_#t~mem517#1.offset, main_#t~mem518#1.base, main_#t~mem518#1.offset, main_#t~mem519#1, main_#t~mem520#1.base, main_#t~mem520#1.offset, main_#t~mem523#1, main_#t~mem521#1.base, main_#t~mem521#1.offset, main_#t~mem522#1, main_#t~mem524#1.base, main_#t~mem524#1.offset, main_#t~mem525#1.base, main_#t~mem525#1.offset, main_#t~mem526#1, main_#t~post527#1, main_#t~mem528#1.base, main_#t~mem528#1.offset, main_#t~mem529#1.base, main_#t~mem529#1.offset, main_#t~mem530#1.base, main_#t~mem530#1.offset, main_#t~mem531#1.base, main_#t~mem531#1.offset, main_#t~mem532#1.base, main_#t~mem532#1.offset, main_#t~mem533#1.base, main_#t~mem533#1.offset, main_#t~mem534#1.base, main_#t~mem534#1.offset, main_#t~mem535#1.base, main_#t~mem535#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem536#1.base, main_#t~mem536#1.offset, main_#t~mem537#1, main_#t~post538#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6041#L733-4 [2022-02-21 04:39:29,477 INFO L793 eck$LassoCheckResult]: Loop: 6041#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5904#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 5906#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6121#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6122#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 6037#L743-123 havoc main_~_ha_hashv~1#1; 6038#L743-48 goto; 5957#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 5958#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 6053#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 6054#L743-9 assume !main_#t~switch157#1; 6382#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 6187#L743-12 assume !main_#t~switch157#1; 6188#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 6239#L743-15 assume !main_#t~switch157#1; 6280#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 6281#L743-18 assume !main_#t~switch157#1; 6246#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 6247#L743-21 assume !main_#t~switch157#1; 6193#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 6194#L743-24 assume !main_#t~switch157#1; 6320#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 6189#L743-27 assume !main_#t~switch157#1; 6190#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 5934#L743-30 assume !main_#t~switch157#1; 5936#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 6412#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 6356#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 6263#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 6264#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 6176#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 6177#L743-41 havoc main_#t~switch157#1; 6295#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 6296#L743-43 goto; 6325#L743-45 goto; 6001#L743-47 goto; 5994#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 5995#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 6250#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 6251#L743-65 goto; 6028#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 6029#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 5990#L743-69 goto; 5991#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 6171#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 6156#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 6069#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 6070#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 6062#L743-116 goto; 6063#L743-118 goto; 6184#L743-120 goto; 6381#L743-122 goto; 6040#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 6041#L733-4 [2022-02-21 04:39:29,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:29,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-02-21 04:39:29,497 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:29,497 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769604077] [2022-02-21 04:39:29,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:29,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:29,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:29,536 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:39:29,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:29,562 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:39:29,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:29,563 INFO L85 PathProgramCache]: Analyzing trace with hash -834647124, now seen corresponding path program 1 times [2022-02-21 04:39:29,563 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:29,563 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144079980] [2022-02-21 04:39:29,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:29,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:29,678 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:39:29,678 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1706208747] [2022-02-21 04:39:29,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:29,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:39:29,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:39:29,704 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:39:29,706 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-02-21 04:39:30,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:30,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 1794 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-21 04:39:30,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:30,396 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:39:30,538 INFO L290 TraceCheckUtils]: 0: Hoare triple {8278#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {8278#true} is VALID [2022-02-21 04:39:30,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {8278#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {8278#true} is VALID [2022-02-21 04:39:30,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {8278#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {8278#true} is VALID [2022-02-21 04:39:30,539 INFO L290 TraceCheckUtils]: 3: Hoare triple {8278#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {8278#true} is VALID [2022-02-21 04:39:30,539 INFO L290 TraceCheckUtils]: 4: Hoare triple {8278#true} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {8278#true} is VALID [2022-02-21 04:39:30,539 INFO L290 TraceCheckUtils]: 5: Hoare triple {8278#true} havoc main_~_ha_hashv~1#1; {8278#true} is VALID [2022-02-21 04:39:30,539 INFO L290 TraceCheckUtils]: 6: Hoare triple {8278#true} goto; {8278#true} is VALID [2022-02-21 04:39:30,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {8278#true} havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,540 INFO L290 TraceCheckUtils]: 8: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !(main_~_hj_k~1#1 % 4294967296 >= 12); {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,540 INFO L290 TraceCheckUtils]: 9: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,541 INFO L290 TraceCheckUtils]: 10: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,541 INFO L290 TraceCheckUtils]: 11: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,542 INFO L290 TraceCheckUtils]: 13: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,542 INFO L290 TraceCheckUtils]: 14: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,542 INFO L290 TraceCheckUtils]: 15: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,543 INFO L290 TraceCheckUtils]: 16: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,544 INFO L290 TraceCheckUtils]: 19: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,544 INFO L290 TraceCheckUtils]: 20: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,544 INFO L290 TraceCheckUtils]: 21: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,545 INFO L290 TraceCheckUtils]: 22: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,545 INFO L290 TraceCheckUtils]: 23: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:30,546 INFO L290 TraceCheckUtils]: 24: Hoare triple {8304#(<= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {8356#(and (not |ULTIMATE.start_main_#t~switch157#1|) (<= 4 |ULTIMATE.start_main_~_hj_k~1#1|))} is VALID [2022-02-21 04:39:30,546 INFO L290 TraceCheckUtils]: 25: Hoare triple {8356#(and (not |ULTIMATE.start_main_#t~switch157#1|) (<= 4 |ULTIMATE.start_main_~_hj_k~1#1|))} main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; {8360#(not |ULTIMATE.start_main_#t~switch157#1|)} is VALID [2022-02-21 04:39:30,546 INFO L290 TraceCheckUtils]: 26: Hoare triple {8360#(not |ULTIMATE.start_main_#t~switch157#1|)} assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; {8279#false} is VALID [2022-02-21 04:39:30,547 INFO L290 TraceCheckUtils]: 27: Hoare triple {8279#false} main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; {8279#false} is VALID [2022-02-21 04:39:30,547 INFO L290 TraceCheckUtils]: 28: Hoare triple {8279#false} assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; {8279#false} is VALID [2022-02-21 04:39:30,547 INFO L290 TraceCheckUtils]: 29: Hoare triple {8279#false} main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; {8279#false} is VALID [2022-02-21 04:39:30,547 INFO L290 TraceCheckUtils]: 30: Hoare triple {8279#false} assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; {8279#false} is VALID [2022-02-21 04:39:30,547 INFO L290 TraceCheckUtils]: 31: Hoare triple {8279#false} havoc main_#t~switch157#1; {8279#false} is VALID [2022-02-21 04:39:30,547 INFO L290 TraceCheckUtils]: 32: Hoare triple {8279#false} main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 33: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 34: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 35: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 36: Hoare triple {8279#false} call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 37: Hoare triple {8279#false} assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 38: Hoare triple {8279#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; {8279#false} is VALID [2022-02-21 04:39:30,548 INFO L290 TraceCheckUtils]: 39: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,549 INFO L290 TraceCheckUtils]: 40: Hoare triple {8279#false} havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; {8279#false} is VALID [2022-02-21 04:39:30,549 INFO L290 TraceCheckUtils]: 41: Hoare triple {8279#false} call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; {8279#false} is VALID [2022-02-21 04:39:30,549 INFO L290 TraceCheckUtils]: 42: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,549 INFO L290 TraceCheckUtils]: 43: Hoare triple {8279#false} call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); {8279#false} is VALID [2022-02-21 04:39:30,549 INFO L290 TraceCheckUtils]: 44: Hoare triple {8279#false} assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 45: Hoare triple {8279#false} call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 46: Hoare triple {8279#false} assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 47: Hoare triple {8279#false} assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 48: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 49: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 50: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,550 INFO L290 TraceCheckUtils]: 51: Hoare triple {8279#false} goto; {8279#false} is VALID [2022-02-21 04:39:30,551 INFO L290 TraceCheckUtils]: 52: Hoare triple {8279#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {8279#false} is VALID [2022-02-21 04:39:30,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:39:30,551 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:39:30,551 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:39:30,551 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144079980] [2022-02-21 04:39:30,552 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:39:30,552 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1706208747] [2022-02-21 04:39:30,552 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1706208747] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:39:30,552 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:39:30,552 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-21 04:39:30,552 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663395628] [2022-02-21 04:39:30,552 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:39:30,553 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:39:30,553 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:39:30,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-21 04:39:30,553 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-21 04:39:30,553 INFO L87 Difference]: Start difference. First operand 511 states and 670 transitions. cyclomatic complexity: 170 Second operand has 5 states, 5 states have (on average 10.6) internal successors, (53), 5 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:33,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:33,483 INFO L93 Difference]: Finished difference Result 1017 states and 1332 transitions. [2022-02-21 04:39:33,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-21 04:39:33,484 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 10.6) internal successors, (53), 5 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:33,543 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:39:33,544 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,586 INFO L131 ngComponentsAnalysis]: Automaton has 20 accepting balls. 549 [2022-02-21 04:39:33,632 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1017 states to 1017 states and 1332 transitions. [2022-02-21 04:39:33,633 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1017 [2022-02-21 04:39:33,634 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1017 [2022-02-21 04:39:33,634 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,635 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:39:33,635 INFO L681 BuchiCegarLoop]: Abstraction has 1017 states and 1332 transitions. [2022-02-21 04:39:33,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 534. [2022-02-21 04:39:33,644 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:39:33,646 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1017 states and 1332 transitions. Second operand has 534 states, 527 states have (on average 1.2960151802656545) internal successors, (683), 526 states have internal predecessors, (683), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:33,647 INFO L74 IsIncluded]: Start isIncluded. First operand 1017 states and 1332 transitions. Second operand has 534 states, 527 states have (on average 1.2960151802656545) internal successors, (683), 526 states have internal predecessors, (683), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:33,648 INFO L87 Difference]: Start difference. First operand 1017 states and 1332 transitions. Second operand has 534 states, 527 states have (on average 1.2960151802656545) internal successors, (683), 526 states have internal predecessors, (683), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:33,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:33,693 INFO L93 Difference]: Finished difference Result 1017 states and 1332 transitions. [2022-02-21 04:39:33,693 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,696 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:33,696 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:33,698 INFO L74 IsIncluded]: Start isIncluded. First operand has 534 states, 527 states have (on average 1.2960151802656545) internal successors, (683), 526 states have internal predecessors, (683), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,698 INFO L87 Difference]: Start difference. First operand has 534 states, 527 states have (on average 1.2960151802656545) internal successors, (683), 526 states have internal predecessors, (683), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:33,724 INFO L93 Difference]: Finished difference Result 1017 states and 1332 transitions. [2022-02-21 04:39:33,724 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1332 transitions. [2022-02-21 04:39:33,726 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:33,726 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:33,726 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:39:33,726 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:39:33,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 534 states, 527 states have (on average 1.2960151802656545) internal successors, (683), 526 states have internal predecessors, (683), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:33,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 534 states to 534 states and 695 transitions. [2022-02-21 04:39:33,736 INFO L704 BuchiCegarLoop]: Abstraction has 534 states and 695 transitions. [2022-02-21 04:39:33,736 INFO L587 BuchiCegarLoop]: Abstraction has 534 states and 695 transitions. [2022-02-21 04:39:33,737 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2022-02-21 04:39:33,737 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 534 states and 695 transitions. [2022-02-21 04:39:33,738 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 297 [2022-02-21 04:39:33,738 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:33,738 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:33,739 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:33,739 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:33,739 INFO L791 eck$LassoCheckResult]: Stem: 9978#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 9965#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem498#1.base, main_#t~mem498#1.offset, main_#t~mem499#1.base, main_#t~mem499#1.offset, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~mem502#1.base, main_#t~mem502#1.offset, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1.base, main_#t~mem506#1.offset, main_#t~mem507#1.base, main_#t~mem507#1.offset, main_#t~mem508#1.base, main_#t~mem508#1.offset, main_#t~mem509#1, main_#t~mem510#1.base, main_#t~mem510#1.offset, main_#t~mem511#1.base, main_#t~mem511#1.offset, main_#t~mem512#1.base, main_#t~mem512#1.offset, main_#t~mem513#1, main_#t~mem514#1.base, main_#t~mem514#1.offset, main_#t~mem515#1.base, main_#t~mem515#1.offset, main_#t~mem516#1.base, main_#t~mem516#1.offset, main_#t~mem517#1.base, main_#t~mem517#1.offset, main_#t~mem518#1.base, main_#t~mem518#1.offset, main_#t~mem519#1, main_#t~mem520#1.base, main_#t~mem520#1.offset, main_#t~mem523#1, main_#t~mem521#1.base, main_#t~mem521#1.offset, main_#t~mem522#1, main_#t~mem524#1.base, main_#t~mem524#1.offset, main_#t~mem525#1.base, main_#t~mem525#1.offset, main_#t~mem526#1, main_#t~post527#1, main_#t~mem528#1.base, main_#t~mem528#1.offset, main_#t~mem529#1.base, main_#t~mem529#1.offset, main_#t~mem530#1.base, main_#t~mem530#1.offset, main_#t~mem531#1.base, main_#t~mem531#1.offset, main_#t~mem532#1.base, main_#t~mem532#1.offset, main_#t~mem533#1.base, main_#t~mem533#1.offset, main_#t~mem534#1.base, main_#t~mem534#1.offset, main_#t~mem535#1.base, main_#t~mem535#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem536#1.base, main_#t~mem536#1.offset, main_#t~mem537#1, main_#t~post538#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9593#L733-4 [2022-02-21 04:39:33,740 INFO L793 eck$LassoCheckResult]: Loop: 9593#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9456#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 9458#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9673#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9674#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 9589#L743-123 havoc main_~_ha_hashv~1#1; 9590#L743-48 goto; 9509#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 9510#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 9605#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 9606#L743-9 assume !main_#t~switch157#1; 9974#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 9975#L743-12 assume !main_#t~switch157#1; 9792#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 9793#L743-15 assume !main_#t~switch157#1; 9834#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 9835#L743-18 assume !main_#t~switch157#1; 9800#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 9801#L743-21 assume !main_#t~switch157#1; 9746#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 9747#L743-24 assume !main_#t~switch157#1; 9979#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 9980#L743-27 assume !main_#t~switch157#1; 9988#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 9986#L743-30 assume !main_#t~switch157#1; 9985#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 9984#L743-33 assume !main_#t~switch157#1; 9983#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 9817#L743-36 assume !main_#t~switch157#1; 9818#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 9729#L743-39 assume !main_#t~switch157#1; 9730#L743-41 havoc main_#t~switch157#1; 9849#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 9850#L743-43 goto; 9880#L743-45 goto; 9553#L743-47 goto; 9546#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 9547#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 9804#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 9805#L743-65 goto; 9580#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 9581#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 9542#L743-69 goto; 9543#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 9724#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 9709#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 9621#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 9622#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 9614#L743-116 goto; 9615#L743-118 goto; 9737#L743-120 goto; 9943#L743-122 goto; 9592#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 9593#L733-4 [2022-02-21 04:39:33,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:33,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2022-02-21 04:39:33,740 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:33,741 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644592298] [2022-02-21 04:39:33,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:33,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:33,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:33,779 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:39:33,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:33,805 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:39:33,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:33,806 INFO L85 PathProgramCache]: Analyzing trace with hash -576308814, now seen corresponding path program 1 times [2022-02-21 04:39:33,806 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:33,806 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656661056] [2022-02-21 04:39:33,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:33,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:33,926 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:39:33,927 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1503612076] [2022-02-21 04:39:33,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:33,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:39:33,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:39:33,929 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:39:33,930 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-02-21 04:39:34,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:34,779 INFO L263 TraceCheckSpWp]: Trace formula consists of 1776 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-21 04:39:34,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:39:34,796 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:39:34,912 INFO L290 TraceCheckUtils]: 0: Hoare triple {12029#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {12029#true} is VALID [2022-02-21 04:39:34,912 INFO L290 TraceCheckUtils]: 1: Hoare triple {12029#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {12029#true} is VALID [2022-02-21 04:39:34,915 INFO L290 TraceCheckUtils]: 2: Hoare triple {12029#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {12029#true} is VALID [2022-02-21 04:39:34,915 INFO L290 TraceCheckUtils]: 3: Hoare triple {12029#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {12029#true} is VALID [2022-02-21 04:39:34,915 INFO L290 TraceCheckUtils]: 4: Hoare triple {12029#true} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {12029#true} is VALID [2022-02-21 04:39:34,915 INFO L290 TraceCheckUtils]: 5: Hoare triple {12029#true} havoc main_~_ha_hashv~1#1; {12029#true} is VALID [2022-02-21 04:39:34,916 INFO L290 TraceCheckUtils]: 6: Hoare triple {12029#true} goto; {12029#true} is VALID [2022-02-21 04:39:34,917 INFO L290 TraceCheckUtils]: 7: Hoare triple {12029#true} havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,917 INFO L290 TraceCheckUtils]: 8: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !(main_~_hj_k~1#1 % 4294967296 >= 12); {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,919 INFO L290 TraceCheckUtils]: 9: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,919 INFO L290 TraceCheckUtils]: 10: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,919 INFO L290 TraceCheckUtils]: 11: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,922 INFO L290 TraceCheckUtils]: 12: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,922 INFO L290 TraceCheckUtils]: 13: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,923 INFO L290 TraceCheckUtils]: 14: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,923 INFO L290 TraceCheckUtils]: 15: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,924 INFO L290 TraceCheckUtils]: 16: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,924 INFO L290 TraceCheckUtils]: 17: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,925 INFO L290 TraceCheckUtils]: 18: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,925 INFO L290 TraceCheckUtils]: 19: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,926 INFO L290 TraceCheckUtils]: 20: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,926 INFO L290 TraceCheckUtils]: 21: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,927 INFO L290 TraceCheckUtils]: 22: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} assume !main_#t~switch157#1; {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} is VALID [2022-02-21 04:39:34,927 INFO L290 TraceCheckUtils]: 23: Hoare triple {12055#(= 4 |ULTIMATE.start_main_~_hj_k~1#1|)} main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; {12104#|ULTIMATE.start_main_#t~switch157#1|} is VALID [2022-02-21 04:39:34,928 INFO L290 TraceCheckUtils]: 24: Hoare triple {12104#|ULTIMATE.start_main_#t~switch157#1|} assume !main_#t~switch157#1; {12030#false} is VALID [2022-02-21 04:39:34,928 INFO L290 TraceCheckUtils]: 25: Hoare triple {12030#false} main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 26: Hoare triple {12030#false} assume !main_#t~switch157#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 27: Hoare triple {12030#false} main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 28: Hoare triple {12030#false} assume !main_#t~switch157#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 29: Hoare triple {12030#false} main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 30: Hoare triple {12030#false} assume !main_#t~switch157#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 31: Hoare triple {12030#false} havoc main_#t~switch157#1; {12030#false} is VALID [2022-02-21 04:39:34,929 INFO L290 TraceCheckUtils]: 32: Hoare triple {12030#false} main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); {12030#false} is VALID [2022-02-21 04:39:34,930 INFO L290 TraceCheckUtils]: 33: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,930 INFO L290 TraceCheckUtils]: 34: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,930 INFO L290 TraceCheckUtils]: 35: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,933 INFO L290 TraceCheckUtils]: 36: Hoare triple {12030#false} call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); {12030#false} is VALID [2022-02-21 04:39:34,933 INFO L290 TraceCheckUtils]: 37: Hoare triple {12030#false} assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 38: Hoare triple {12030#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 39: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 40: Hoare triple {12030#false} havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 41: Hoare triple {12030#false} call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 42: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 43: Hoare triple {12030#false} call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); {12030#false} is VALID [2022-02-21 04:39:34,934 INFO L290 TraceCheckUtils]: 44: Hoare triple {12030#false} assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; {12030#false} is VALID [2022-02-21 04:39:34,935 INFO L290 TraceCheckUtils]: 45: Hoare triple {12030#false} call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; {12030#false} is VALID [2022-02-21 04:39:34,935 INFO L290 TraceCheckUtils]: 46: Hoare triple {12030#false} assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; {12030#false} is VALID [2022-02-21 04:39:34,936 INFO L290 TraceCheckUtils]: 47: Hoare triple {12030#false} assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; {12030#false} is VALID [2022-02-21 04:39:34,936 INFO L290 TraceCheckUtils]: 48: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,936 INFO L290 TraceCheckUtils]: 49: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,936 INFO L290 TraceCheckUtils]: 50: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,937 INFO L290 TraceCheckUtils]: 51: Hoare triple {12030#false} goto; {12030#false} is VALID [2022-02-21 04:39:34,937 INFO L290 TraceCheckUtils]: 52: Hoare triple {12030#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {12030#false} is VALID [2022-02-21 04:39:34,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:39:34,937 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:39:34,937 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:39:34,937 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656661056] [2022-02-21 04:39:34,937 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:39:34,938 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1503612076] [2022-02-21 04:39:34,938 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1503612076] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:39:34,938 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:39:34,938 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-21 04:39:34,938 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777480049] [2022-02-21 04:39:34,938 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:39:34,939 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:39:34,939 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:39:34,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-21 04:39:34,940 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-21 04:39:34,940 INFO L87 Difference]: Start difference. First operand 534 states and 695 transitions. cyclomatic complexity: 172 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:38,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:38,182 INFO L93 Difference]: Finished difference Result 919 states and 1212 transitions. [2022-02-21 04:39:38,182 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-21 04:39:38,182 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:39:38,237 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:39:38,239 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 919 states and 1212 transitions. [2022-02-21 04:39:38,277 INFO L131 ngComponentsAnalysis]: Automaton has 22 accepting balls. 376 [2022-02-21 04:39:38,313 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 919 states to 919 states and 1212 transitions. [2022-02-21 04:39:38,313 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 919 [2022-02-21 04:39:38,314 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 919 [2022-02-21 04:39:38,314 INFO L73 IsDeterministic]: Start isDeterministic. Operand 919 states and 1212 transitions. [2022-02-21 04:39:38,315 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:39:38,315 INFO L681 BuchiCegarLoop]: Abstraction has 919 states and 1212 transitions. [2022-02-21 04:39:38,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 919 states and 1212 transitions. [2022-02-21 04:39:38,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 919 to 502. [2022-02-21 04:39:38,325 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:39:38,326 INFO L82 GeneralOperation]: Start isEquivalent. First operand 919 states and 1212 transitions. Second operand has 502 states, 495 states have (on average 1.301010101010101) internal successors, (644), 494 states have internal predecessors, (644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:38,328 INFO L74 IsIncluded]: Start isIncluded. First operand 919 states and 1212 transitions. Second operand has 502 states, 495 states have (on average 1.301010101010101) internal successors, (644), 494 states have internal predecessors, (644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:38,329 INFO L87 Difference]: Start difference. First operand 919 states and 1212 transitions. Second operand has 502 states, 495 states have (on average 1.301010101010101) internal successors, (644), 494 states have internal predecessors, (644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:38,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:38,363 INFO L93 Difference]: Finished difference Result 919 states and 1212 transitions. [2022-02-21 04:39:38,363 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1212 transitions. [2022-02-21 04:39:38,365 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:38,365 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:38,366 INFO L74 IsIncluded]: Start isIncluded. First operand has 502 states, 495 states have (on average 1.301010101010101) internal successors, (644), 494 states have internal predecessors, (644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 919 states and 1212 transitions. [2022-02-21 04:39:38,367 INFO L87 Difference]: Start difference. First operand has 502 states, 495 states have (on average 1.301010101010101) internal successors, (644), 494 states have internal predecessors, (644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 919 states and 1212 transitions. [2022-02-21 04:39:38,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:39:38,402 INFO L93 Difference]: Finished difference Result 919 states and 1212 transitions. [2022-02-21 04:39:38,403 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1212 transitions. [2022-02-21 04:39:38,404 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:39:38,404 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:39:38,405 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:39:38,405 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:39:38,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 502 states, 495 states have (on average 1.301010101010101) internal successors, (644), 494 states have internal predecessors, (644), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:39:38,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 656 transitions. [2022-02-21 04:39:38,420 INFO L704 BuchiCegarLoop]: Abstraction has 502 states and 656 transitions. [2022-02-21 04:39:38,420 INFO L587 BuchiCegarLoop]: Abstraction has 502 states and 656 transitions. [2022-02-21 04:39:38,420 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2022-02-21 04:39:38,423 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 502 states and 656 transitions. [2022-02-21 04:39:38,425 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 265 [2022-02-21 04:39:38,425 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:39:38,425 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:39:38,427 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:39:38,427 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:39:38,427 INFO L791 eck$LassoCheckResult]: Stem: 13611#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 13600#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem498#1.base, main_#t~mem498#1.offset, main_#t~mem499#1.base, main_#t~mem499#1.offset, main_#t~short500#1, main_#t~mem501#1.base, main_#t~mem501#1.offset, main_#t~mem502#1.base, main_#t~mem502#1.offset, main_#t~mem503#1.base, main_#t~mem503#1.offset, main_#t~mem504#1.base, main_#t~mem504#1.offset, main_#t~mem505#1.base, main_#t~mem505#1.offset, main_#t~mem506#1.base, main_#t~mem506#1.offset, main_#t~mem507#1.base, main_#t~mem507#1.offset, main_#t~mem508#1.base, main_#t~mem508#1.offset, main_#t~mem509#1, main_#t~mem510#1.base, main_#t~mem510#1.offset, main_#t~mem511#1.base, main_#t~mem511#1.offset, main_#t~mem512#1.base, main_#t~mem512#1.offset, main_#t~mem513#1, main_#t~mem514#1.base, main_#t~mem514#1.offset, main_#t~mem515#1.base, main_#t~mem515#1.offset, main_#t~mem516#1.base, main_#t~mem516#1.offset, main_#t~mem517#1.base, main_#t~mem517#1.offset, main_#t~mem518#1.base, main_#t~mem518#1.offset, main_#t~mem519#1, main_#t~mem520#1.base, main_#t~mem520#1.offset, main_#t~mem523#1, main_#t~mem521#1.base, main_#t~mem521#1.offset, main_#t~mem522#1, main_#t~mem524#1.base, main_#t~mem524#1.offset, main_#t~mem525#1.base, main_#t~mem525#1.offset, main_#t~mem526#1, main_#t~post527#1, main_#t~mem528#1.base, main_#t~mem528#1.offset, main_#t~mem529#1.base, main_#t~mem529#1.offset, main_#t~mem530#1.base, main_#t~mem530#1.offset, main_#t~mem531#1.base, main_#t~mem531#1.offset, main_#t~mem532#1.base, main_#t~mem532#1.offset, main_#t~mem533#1.base, main_#t~mem533#1.offset, main_#t~mem534#1.base, main_#t~mem534#1.offset, main_#t~mem535#1.base, main_#t~mem535#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem536#1.base, main_#t~mem536#1.offset, main_#t~mem537#1, main_#t~post538#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13246#L733-4 [2022-02-21 04:39:38,429 INFO L793 eck$LassoCheckResult]: Loop: 13246#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13114#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 13116#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13326#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13327#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 13242#L743-123 havoc main_~_ha_hashv~1#1; 13243#L743-48 goto; 13162#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 13163#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 13259#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 13260#L743-9 assume !main_#t~switch157#1; 13582#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 13391#L743-12 assume !main_#t~switch157#1; 13392#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 13443#L743-15 assume !main_#t~switch157#1; 13484#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 13485#L743-18 assume !main_#t~switch157#1; 13450#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 13451#L743-21 assume !main_#t~switch157#1; 13397#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 13398#L743-24 assume !main_#t~switch157#1; 13521#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 13393#L743-27 assume !main_#t~switch157#1; 13394#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 13143#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 13144#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 13350#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 13557#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 13467#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 13468#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 13382#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 13383#L743-41 havoc main_#t~switch157#1; 13498#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 13499#L743-43 goto; 13526#L743-45 goto; 13206#L743-47 goto; 13197#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 13198#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 13454#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 13455#L743-65 goto; 13233#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 13234#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 13195#L743-69 goto; 13196#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 13375#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 13360#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 13274#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 13275#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 13267#L743-116 goto; 13268#L743-118 goto; 13386#L743-120 goto; 13581#L743-122 goto; 13245#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 13246#L733-4 [2022-02-21 04:39:38,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:38,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2022-02-21 04:39:38,429 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:38,430 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123406540] [2022-02-21 04:39:38,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:38,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:38,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:38,469 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:39:38,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:39:38,496 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:39:38,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:39:38,497 INFO L85 PathProgramCache]: Analyzing trace with hash 2074116778, now seen corresponding path program 1 times [2022-02-21 04:39:38,497 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:39:38,498 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010159339] [2022-02-21 04:39:38,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:38,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:39:38,624 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:39:38,624 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1477882065] [2022-02-21 04:39:38,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:39:38,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:39:38,625 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:39:38,626 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:39:38,662 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process