./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test10-1.i --full-output -ea --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test10-1.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b06fba6fbf61d996c1af57497d908c6dba492febf0212a36ee7b28f5806d365e --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-21 04:41:28,591 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-21 04:41:28,595 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-21 04:41:28,622 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-21 04:41:28,626 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-21 04:41:28,629 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-21 04:41:28,631 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-21 04:41:28,637 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-21 04:41:28,638 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-21 04:41:28,642 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-21 04:41:28,643 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-21 04:41:28,644 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-21 04:41:28,645 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-21 04:41:28,646 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-21 04:41:28,648 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-21 04:41:28,649 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-21 04:41:28,650 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-21 04:41:28,651 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-21 04:41:28,655 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-21 04:41:28,656 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-21 04:41:28,659 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-21 04:41:28,660 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-21 04:41:28,662 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-21 04:41:28,662 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-21 04:41:28,664 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-21 04:41:28,664 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-21 04:41:28,664 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-21 04:41:28,665 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-21 04:41:28,665 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-21 04:41:28,666 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-21 04:41:28,666 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-21 04:41:28,667 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-21 04:41:28,667 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-21 04:41:28,668 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-21 04:41:28,669 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-21 04:41:28,669 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-21 04:41:28,670 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-21 04:41:28,670 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-21 04:41:28,670 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-21 04:41:28,672 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-21 04:41:28,672 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-21 04:41:28,674 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-02-21 04:41:28,701 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-21 04:41:28,701 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-21 04:41:28,701 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-21 04:41:28,702 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-21 04:41:28,703 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-21 04:41:28,703 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-21 04:41:28,703 INFO L138 SettingsManager]: * Use SBE=true [2022-02-21 04:41:28,703 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-02-21 04:41:28,704 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-02-21 04:41:28,704 INFO L138 SettingsManager]: * Use old map elimination=false [2022-02-21 04:41:28,704 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-02-21 04:41:28,705 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-02-21 04:41:28,705 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-02-21 04:41:28,705 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-21 04:41:28,705 INFO L138 SettingsManager]: * sizeof long=4 [2022-02-21 04:41:28,705 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-02-21 04:41:28,705 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-21 04:41:28,706 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-02-21 04:41:28,706 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-21 04:41:28,706 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-02-21 04:41:28,706 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-02-21 04:41:28,706 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-02-21 04:41:28,707 INFO L138 SettingsManager]: * sizeof long double=12 [2022-02-21 04:41:28,707 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-21 04:41:28,707 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-02-21 04:41:28,707 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-21 04:41:28,707 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-02-21 04:41:28,707 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-21 04:41:28,708 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-21 04:41:28,708 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-21 04:41:28,708 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-21 04:41:28,709 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-02-21 04:41:28,709 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b06fba6fbf61d996c1af57497d908c6dba492febf0212a36ee7b28f5806d365e [2022-02-21 04:41:28,906 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-21 04:41:28,924 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-21 04:41:28,926 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-21 04:41:28,927 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-21 04:41:28,928 INFO L275 PluginConnector]: CDTParser initialized [2022-02-21 04:41:28,929 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test10-1.i [2022-02-21 04:41:28,983 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3ef5b1d8b/64e597d1fb734d05ab26e8f933c1aad9/FLAG71627ff14 [2022-02-21 04:41:29,507 INFO L306 CDTParser]: Found 1 translation units. [2022-02-21 04:41:29,508 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test10-1.i [2022-02-21 04:41:29,530 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3ef5b1d8b/64e597d1fb734d05ab26e8f933c1aad9/FLAG71627ff14 [2022-02-21 04:41:29,787 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3ef5b1d8b/64e597d1fb734d05ab26e8f933c1aad9 [2022-02-21 04:41:29,789 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-21 04:41:29,790 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-21 04:41:29,792 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-21 04:41:29,792 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-21 04:41:29,795 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-21 04:41:29,796 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:41:29" (1/1) ... [2022-02-21 04:41:29,797 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2f0c16cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:29, skipping insertion in model container [2022-02-21 04:41:29,797 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:41:29" (1/1) ... [2022-02-21 04:41:29,804 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-21 04:41:29,868 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-21 04:41:30,221 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test10-1.i[33022,33035] [2022-02-21 04:41:30,448 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:41:30,456 INFO L203 MainTranslator]: Completed pre-run [2022-02-21 04:41:30,494 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test10-1.i[33022,33035] [2022-02-21 04:41:30,628 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:41:30,663 INFO L208 MainTranslator]: Completed translation [2022-02-21 04:41:30,664 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30 WrapperNode [2022-02-21 04:41:30,664 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-21 04:41:30,665 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-21 04:41:30,665 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-21 04:41:30,666 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-21 04:41:30,672 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:30,729 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:30,868 INFO L137 Inliner]: procedures = 177, calls = 524, calls flagged for inlining = 10, calls inlined = 22, statements flattened = 2313 [2022-02-21 04:41:30,869 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-21 04:41:30,870 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-21 04:41:30,870 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-21 04:41:30,870 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-21 04:41:30,877 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:30,878 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:30,899 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:30,899 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:31,010 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:31,041 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:31,050 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:31,072 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-21 04:41:31,073 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-21 04:41:31,074 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-21 04:41:31,074 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-21 04:41:31,076 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (1/1) ... [2022-02-21 04:41:31,082 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-02-21 04:41:31,092 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:41:31,135 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-02-21 04:41:31,142 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-02-21 04:41:31,170 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-21 04:41:31,170 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-21 04:41:31,170 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-21 04:41:31,170 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-21 04:41:31,170 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-21 04:41:31,170 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-21 04:41:31,170 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-21 04:41:31,171 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-21 04:41:31,171 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-21 04:41:31,171 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-21 04:41:31,171 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-21 04:41:31,171 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-21 04:41:31,171 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-21 04:41:31,171 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-21 04:41:31,457 INFO L234 CfgBuilder]: Building ICFG [2022-02-21 04:41:31,459 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-21 04:41:31,461 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-02-21 04:41:38,123 INFO L275 CfgBuilder]: Performing block encoding [2022-02-21 04:41:38,146 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-21 04:41:38,149 INFO L299 CfgBuilder]: Removed 151 assume(true) statements. [2022-02-21 04:41:38,152 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:41:38 BoogieIcfgContainer [2022-02-21 04:41:38,152 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-21 04:41:38,153 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-02-21 04:41:38,153 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-02-21 04:41:38,156 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-02-21 04:41:38,157 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:41:38,157 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.02 04:41:29" (1/3) ... [2022-02-21 04:41:38,159 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@60091f0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:41:38, skipping insertion in model container [2022-02-21 04:41:38,159 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:41:38,159 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:41:30" (2/3) ... [2022-02-21 04:41:38,159 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@60091f0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:41:38, skipping insertion in model container [2022-02-21 04:41:38,159 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:41:38,159 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:41:38" (3/3) ... [2022-02-21 04:41:38,161 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test10-1.i [2022-02-21 04:41:38,208 INFO L359 BuchiCegarLoop]: Interprodecural is true [2022-02-21 04:41:38,209 INFO L360 BuchiCegarLoop]: Hoare is false [2022-02-21 04:41:38,209 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-02-21 04:41:38,209 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-02-21 04:41:38,209 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-02-21 04:41:38,209 INFO L364 BuchiCegarLoop]: Difference is false [2022-02-21 04:41:38,209 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-02-21 04:41:38,210 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2022-02-21 04:41:38,268 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 459 states, 451 states have (on average 1.7028824833702882) internal successors, (768), 451 states have internal predecessors, (768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:38,380 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 389 [2022-02-21 04:41:38,380 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:41:38,381 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:41:38,387 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:41:38,387 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:41:38,387 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2022-02-21 04:41:38,389 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 459 states, 451 states have (on average 1.7028824833702882) internal successors, (768), 451 states have internal predecessors, (768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:38,447 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 389 [2022-02-21 04:41:38,448 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:41:38,448 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:41:38,449 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:41:38,449 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:41:38,455 INFO L791 eck$LassoCheckResult]: Stem: 447#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 386#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 243#L733-4true [2022-02-21 04:41:38,457 INFO L793 eck$LassoCheckResult]: Loop: 243#L733-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3#L733-1true assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 453#L735true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 100#L735-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 392#L740true assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 59#L743-123true assume !true; 61#L733-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 243#L733-4true [2022-02-21 04:41:38,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:38,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-02-21 04:41:38,469 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:38,469 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397034293] [2022-02-21 04:41:38,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:38,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:38,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:38,597 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:41:38,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:38,645 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:41:38,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:38,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1529483753, now seen corresponding path program 1 times [2022-02-21 04:41:38,647 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:38,648 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597163861] [2022-02-21 04:41:38,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:38,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:38,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:41:38,719 INFO L290 TraceCheckUtils]: 0: Hoare triple {465#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {465#true} is VALID [2022-02-21 04:41:38,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {465#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {465#true} is VALID [2022-02-21 04:41:38,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {465#true} assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; {466#false} is VALID [2022-02-21 04:41:38,721 INFO L290 TraceCheckUtils]: 3: Hoare triple {466#false} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {466#false} is VALID [2022-02-21 04:41:38,721 INFO L290 TraceCheckUtils]: 4: Hoare triple {466#false} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {466#false} is VALID [2022-02-21 04:41:38,721 INFO L290 TraceCheckUtils]: 5: Hoare triple {466#false} assume !true; {466#false} is VALID [2022-02-21 04:41:38,722 INFO L290 TraceCheckUtils]: 6: Hoare triple {466#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {466#false} is VALID [2022-02-21 04:41:38,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:41:38,724 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:41:38,724 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597163861] [2022-02-21 04:41:38,725 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [597163861] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:41:38,725 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:41:38,725 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-02-21 04:41:38,726 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1403367372] [2022-02-21 04:41:38,727 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:41:38,731 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:41:38,732 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:41:38,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-02-21 04:41:38,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-02-21 04:41:38,768 INFO L87 Difference]: Start difference. First operand has 459 states, 451 states have (on average 1.7028824833702882) internal successors, (768), 451 states have internal predecessors, (768), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:41:39,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:39,350 INFO L93 Difference]: Finished difference Result 459 states and 606 transitions. [2022-02-21 04:41:39,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-02-21 04:41:39,352 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:41:39,366 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7 edges. 7 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:41:39,371 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 459 states and 606 transitions. [2022-02-21 04:41:39,392 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 221 [2022-02-21 04:41:39,435 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 459 states to 438 states and 579 transitions. [2022-02-21 04:41:39,436 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 438 [2022-02-21 04:41:39,438 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 438 [2022-02-21 04:41:39,438 INFO L73 IsDeterministic]: Start isDeterministic. Operand 438 states and 579 transitions. [2022-02-21 04:41:39,441 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:41:39,441 INFO L681 BuchiCegarLoop]: Abstraction has 438 states and 579 transitions. [2022-02-21 04:41:39,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states and 579 transitions. [2022-02-21 04:41:39,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 438. [2022-02-21 04:41:39,479 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:41:39,482 INFO L82 GeneralOperation]: Start isEquivalent. First operand 438 states and 579 transitions. Second operand has 438 states, 431 states have (on average 1.3155452436194897) internal successors, (567), 430 states have internal predecessors, (567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:39,485 INFO L74 IsIncluded]: Start isIncluded. First operand 438 states and 579 transitions. Second operand has 438 states, 431 states have (on average 1.3155452436194897) internal successors, (567), 430 states have internal predecessors, (567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:39,488 INFO L87 Difference]: Start difference. First operand 438 states and 579 transitions. Second operand has 438 states, 431 states have (on average 1.3155452436194897) internal successors, (567), 430 states have internal predecessors, (567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:39,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:39,505 INFO L93 Difference]: Finished difference Result 438 states and 579 transitions. [2022-02-21 04:41:39,506 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 579 transitions. [2022-02-21 04:41:39,509 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:41:39,509 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:41:39,511 INFO L74 IsIncluded]: Start isIncluded. First operand has 438 states, 431 states have (on average 1.3155452436194897) internal successors, (567), 430 states have internal predecessors, (567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 438 states and 579 transitions. [2022-02-21 04:41:39,512 INFO L87 Difference]: Start difference. First operand has 438 states, 431 states have (on average 1.3155452436194897) internal successors, (567), 430 states have internal predecessors, (567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 438 states and 579 transitions. [2022-02-21 04:41:39,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:39,528 INFO L93 Difference]: Finished difference Result 438 states and 579 transitions. [2022-02-21 04:41:39,528 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 579 transitions. [2022-02-21 04:41:39,530 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:41:39,530 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:41:39,530 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:41:39,531 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:41:39,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 438 states, 431 states have (on average 1.3155452436194897) internal successors, (567), 430 states have internal predecessors, (567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:39,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 579 transitions. [2022-02-21 04:41:39,549 INFO L704 BuchiCegarLoop]: Abstraction has 438 states and 579 transitions. [2022-02-21 04:41:39,549 INFO L587 BuchiCegarLoop]: Abstraction has 438 states and 579 transitions. [2022-02-21 04:41:39,549 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2022-02-21 04:41:39,549 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 438 states and 579 transitions. [2022-02-21 04:41:39,551 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 221 [2022-02-21 04:41:39,551 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:41:39,551 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:41:39,552 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:41:39,552 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:41:39,553 INFO L791 eck$LassoCheckResult]: Stem: 1363#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 1353#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1047#L733-4 [2022-02-21 04:41:39,554 INFO L793 eck$LassoCheckResult]: Loop: 1047#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 926#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 928#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1112#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1113#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 1043#L743-123 havoc main_~_ha_hashv~1#1; 1044#L743-48 goto; 974#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 975#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 1056#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 1057#L743-9 assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 1336#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 1169#L743-12 assume !main_#t~switch157#1; 1170#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 1215#L743-15 assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 1254#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 1255#L743-18 assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 1222#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 1223#L743-21 assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 1175#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 1176#L743-24 assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 1287#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 1171#L743-27 assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; 1172#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 954#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 955#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 1132#L743-33 assume !main_#t~switch157#1; 1320#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 1239#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 1240#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 1160#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 1161#L743-41 havoc main_#t~switch157#1; 1268#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 1269#L743-43 goto; 1290#L743-45 goto; 1014#L743-47 goto; 1007#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 1008#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 1226#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 1227#L743-65 goto; 1039#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 1040#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 1003#L743-69 goto; 1004#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 1155#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 1142#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 1066#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 1067#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 1061#L743-116 goto; 1062#L743-118 goto; 1168#L743-120 goto; 1335#L743-122 goto; 1046#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1047#L733-4 [2022-02-21 04:41:39,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:39,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-02-21 04:41:39,556 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:39,556 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517320546] [2022-02-21 04:41:39,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:39,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:39,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:39,577 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:41:39,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:39,598 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:41:39,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:39,599 INFO L85 PathProgramCache]: Analyzing trace with hash 2000398624, now seen corresponding path program 1 times [2022-02-21 04:41:39,599 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:39,599 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220310174] [2022-02-21 04:41:39,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:39,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:39,769 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:41:39,771 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [618976751] [2022-02-21 04:41:39,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:39,772 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:41:39,772 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:41:39,779 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:41:39,807 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-21 04:41:40,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:41:40,411 INFO L263 TraceCheckSpWp]: Trace formula consists of 1830 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-21 04:41:40,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:41:40,431 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:41:40,561 INFO L290 TraceCheckUtils]: 0: Hoare triple {2245#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {2245#true} is VALID [2022-02-21 04:41:40,562 INFO L290 TraceCheckUtils]: 1: Hoare triple {2245#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {2245#true} is VALID [2022-02-21 04:41:40,562 INFO L290 TraceCheckUtils]: 2: Hoare triple {2245#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {2245#true} is VALID [2022-02-21 04:41:40,562 INFO L290 TraceCheckUtils]: 3: Hoare triple {2245#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {2245#true} is VALID [2022-02-21 04:41:40,563 INFO L290 TraceCheckUtils]: 4: Hoare triple {2245#true} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {2245#true} is VALID [2022-02-21 04:41:40,563 INFO L290 TraceCheckUtils]: 5: Hoare triple {2245#true} havoc main_~_ha_hashv~1#1; {2245#true} is VALID [2022-02-21 04:41:40,563 INFO L290 TraceCheckUtils]: 6: Hoare triple {2245#true} goto; {2245#true} is VALID [2022-02-21 04:41:40,563 INFO L290 TraceCheckUtils]: 7: Hoare triple {2245#true} havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; {2245#true} is VALID [2022-02-21 04:41:40,564 INFO L290 TraceCheckUtils]: 8: Hoare triple {2245#true} assume !(main_~_hj_k~1#1 % 4294967296 >= 12); {2245#true} is VALID [2022-02-21 04:41:40,564 INFO L290 TraceCheckUtils]: 9: Hoare triple {2245#true} main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; {2245#true} is VALID [2022-02-21 04:41:40,571 INFO L290 TraceCheckUtils]: 10: Hoare triple {2245#true} assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; {2280#|ULTIMATE.start_main_#t~switch157#1|} is VALID [2022-02-21 04:41:40,572 INFO L290 TraceCheckUtils]: 11: Hoare triple {2280#|ULTIMATE.start_main_#t~switch157#1|} main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; {2280#|ULTIMATE.start_main_#t~switch157#1|} is VALID [2022-02-21 04:41:40,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {2280#|ULTIMATE.start_main_#t~switch157#1|} assume !main_#t~switch157#1; {2246#false} is VALID [2022-02-21 04:41:40,573 INFO L290 TraceCheckUtils]: 13: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,573 INFO L290 TraceCheckUtils]: 14: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; {2246#false} is VALID [2022-02-21 04:41:40,573 INFO L290 TraceCheckUtils]: 15: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,574 INFO L290 TraceCheckUtils]: 16: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; {2246#false} is VALID [2022-02-21 04:41:40,574 INFO L290 TraceCheckUtils]: 17: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,574 INFO L290 TraceCheckUtils]: 18: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; {2246#false} is VALID [2022-02-21 04:41:40,574 INFO L290 TraceCheckUtils]: 19: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,575 INFO L290 TraceCheckUtils]: 20: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; {2246#false} is VALID [2022-02-21 04:41:40,575 INFO L290 TraceCheckUtils]: 21: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,575 INFO L290 TraceCheckUtils]: 22: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; {2246#false} is VALID [2022-02-21 04:41:40,575 INFO L290 TraceCheckUtils]: 23: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,576 INFO L290 TraceCheckUtils]: 24: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; {2246#false} is VALID [2022-02-21 04:41:40,576 INFO L290 TraceCheckUtils]: 25: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,576 INFO L290 TraceCheckUtils]: 26: Hoare triple {2246#false} assume !main_#t~switch157#1; {2246#false} is VALID [2022-02-21 04:41:40,576 INFO L290 TraceCheckUtils]: 27: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,576 INFO L290 TraceCheckUtils]: 28: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; {2246#false} is VALID [2022-02-21 04:41:40,577 INFO L290 TraceCheckUtils]: 29: Hoare triple {2246#false} main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; {2246#false} is VALID [2022-02-21 04:41:40,577 INFO L290 TraceCheckUtils]: 30: Hoare triple {2246#false} assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; {2246#false} is VALID [2022-02-21 04:41:40,577 INFO L290 TraceCheckUtils]: 31: Hoare triple {2246#false} havoc main_#t~switch157#1; {2246#false} is VALID [2022-02-21 04:41:40,577 INFO L290 TraceCheckUtils]: 32: Hoare triple {2246#false} main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); {2246#false} is VALID [2022-02-21 04:41:40,578 INFO L290 TraceCheckUtils]: 33: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,578 INFO L290 TraceCheckUtils]: 34: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,578 INFO L290 TraceCheckUtils]: 35: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,578 INFO L290 TraceCheckUtils]: 36: Hoare triple {2246#false} call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); {2246#false} is VALID [2022-02-21 04:41:40,579 INFO L290 TraceCheckUtils]: 37: Hoare triple {2246#false} assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; {2246#false} is VALID [2022-02-21 04:41:40,579 INFO L290 TraceCheckUtils]: 38: Hoare triple {2246#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; {2246#false} is VALID [2022-02-21 04:41:40,579 INFO L290 TraceCheckUtils]: 39: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,579 INFO L290 TraceCheckUtils]: 40: Hoare triple {2246#false} havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; {2246#false} is VALID [2022-02-21 04:41:40,580 INFO L290 TraceCheckUtils]: 41: Hoare triple {2246#false} call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; {2246#false} is VALID [2022-02-21 04:41:40,580 INFO L290 TraceCheckUtils]: 42: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,580 INFO L290 TraceCheckUtils]: 43: Hoare triple {2246#false} call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); {2246#false} is VALID [2022-02-21 04:41:40,580 INFO L290 TraceCheckUtils]: 44: Hoare triple {2246#false} assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; {2246#false} is VALID [2022-02-21 04:41:40,580 INFO L290 TraceCheckUtils]: 45: Hoare triple {2246#false} call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; {2246#false} is VALID [2022-02-21 04:41:40,581 INFO L290 TraceCheckUtils]: 46: Hoare triple {2246#false} assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; {2246#false} is VALID [2022-02-21 04:41:40,581 INFO L290 TraceCheckUtils]: 47: Hoare triple {2246#false} assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; {2246#false} is VALID [2022-02-21 04:41:40,581 INFO L290 TraceCheckUtils]: 48: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,581 INFO L290 TraceCheckUtils]: 49: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,582 INFO L290 TraceCheckUtils]: 50: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,582 INFO L290 TraceCheckUtils]: 51: Hoare triple {2246#false} goto; {2246#false} is VALID [2022-02-21 04:41:40,582 INFO L290 TraceCheckUtils]: 52: Hoare triple {2246#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {2246#false} is VALID [2022-02-21 04:41:40,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:41:40,583 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:41:40,583 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:41:40,583 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220310174] [2022-02-21 04:41:40,584 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:41:40,584 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [618976751] [2022-02-21 04:41:40,584 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [618976751] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:41:40,584 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:41:40,584 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-21 04:41:40,585 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767057484] [2022-02-21 04:41:40,585 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:41:40,585 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:41:40,585 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:41:40,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-21 04:41:40,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-21 04:41:40,587 INFO L87 Difference]: Start difference. First operand 438 states and 579 transitions. cyclomatic complexity: 151 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:41:42,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:42,050 INFO L93 Difference]: Finished difference Result 459 states and 600 transitions. [2022-02-21 04:41:42,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-21 04:41:42,050 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:41:42,100 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:41:42,101 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 459 states and 600 transitions. [2022-02-21 04:41:42,117 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 242 [2022-02-21 04:41:42,132 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 459 states to 459 states and 600 transitions. [2022-02-21 04:41:42,132 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 459 [2022-02-21 04:41:42,133 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 459 [2022-02-21 04:41:42,133 INFO L73 IsDeterministic]: Start isDeterministic. Operand 459 states and 600 transitions. [2022-02-21 04:41:42,134 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:41:42,134 INFO L681 BuchiCegarLoop]: Abstraction has 459 states and 600 transitions. [2022-02-21 04:41:42,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states and 600 transitions. [2022-02-21 04:41:42,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 458. [2022-02-21 04:41:42,146 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:41:42,147 INFO L82 GeneralOperation]: Start isEquivalent. First operand 459 states and 600 transitions. Second operand has 458 states, 451 states have (on average 1.3015521064301552) internal successors, (587), 450 states have internal predecessors, (587), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:42,148 INFO L74 IsIncluded]: Start isIncluded. First operand 459 states and 600 transitions. Second operand has 458 states, 451 states have (on average 1.3015521064301552) internal successors, (587), 450 states have internal predecessors, (587), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:42,150 INFO L87 Difference]: Start difference. First operand 459 states and 600 transitions. Second operand has 458 states, 451 states have (on average 1.3015521064301552) internal successors, (587), 450 states have internal predecessors, (587), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:42,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:42,164 INFO L93 Difference]: Finished difference Result 459 states and 600 transitions. [2022-02-21 04:41:42,165 INFO L276 IsEmpty]: Start isEmpty. Operand 459 states and 600 transitions. [2022-02-21 04:41:42,166 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:41:42,166 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:41:42,168 INFO L74 IsIncluded]: Start isIncluded. First operand has 458 states, 451 states have (on average 1.3015521064301552) internal successors, (587), 450 states have internal predecessors, (587), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 459 states and 600 transitions. [2022-02-21 04:41:42,169 INFO L87 Difference]: Start difference. First operand has 458 states, 451 states have (on average 1.3015521064301552) internal successors, (587), 450 states have internal predecessors, (587), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 459 states and 600 transitions. [2022-02-21 04:41:42,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:42,184 INFO L93 Difference]: Finished difference Result 459 states and 600 transitions. [2022-02-21 04:41:42,184 INFO L276 IsEmpty]: Start isEmpty. Operand 459 states and 600 transitions. [2022-02-21 04:41:42,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:41:42,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:41:42,185 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:41:42,185 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:41:42,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 458 states, 451 states have (on average 1.3015521064301552) internal successors, (587), 450 states have internal predecessors, (587), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:42,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 458 states to 458 states and 599 transitions. [2022-02-21 04:41:42,200 INFO L704 BuchiCegarLoop]: Abstraction has 458 states and 599 transitions. [2022-02-21 04:41:42,200 INFO L587 BuchiCegarLoop]: Abstraction has 458 states and 599 transitions. [2022-02-21 04:41:42,200 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2022-02-21 04:41:42,200 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 458 states and 599 transitions. [2022-02-21 04:41:42,202 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 241 [2022-02-21 04:41:42,202 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:41:42,202 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:41:42,203 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:41:42,203 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:41:42,203 INFO L791 eck$LassoCheckResult]: Stem: 3303#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 3293#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2984#L733-4 [2022-02-21 04:41:42,204 INFO L793 eck$LassoCheckResult]: Loop: 2984#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2863#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2865#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3049#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3050#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 2980#L743-123 havoc main_~_ha_hashv~1#1; 2981#L743-48 goto; 2911#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 2912#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 2993#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 2994#L743-9 assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 3275#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 3106#L743-12 assume main_#t~switch157#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 3107#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 3152#L743-15 assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 3191#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 3192#L743-18 assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 3159#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 3160#L743-21 assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 3112#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 3113#L743-24 assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 3226#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 3108#L743-27 assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; 3109#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 2891#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 2892#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 3069#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 3259#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 3176#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 3177#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 3097#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 3098#L743-41 havoc main_#t~switch157#1; 3205#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 3206#L743-43 goto; 3229#L743-45 goto; 2951#L743-47 goto; 2944#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 2945#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 3163#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 3164#L743-65 goto; 2976#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 2977#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 2940#L743-69 goto; 2941#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 3092#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 3079#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 3003#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 3004#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 2998#L743-116 goto; 2999#L743-118 goto; 3105#L743-120 goto; 3274#L743-122 goto; 2983#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2984#L733-4 [2022-02-21 04:41:42,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:42,205 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-02-21 04:41:42,205 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:42,205 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346390800] [2022-02-21 04:41:42,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:42,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:42,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:42,225 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:41:42,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:42,247 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:41:42,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:42,247 INFO L85 PathProgramCache]: Analyzing trace with hash -346476132, now seen corresponding path program 1 times [2022-02-21 04:41:42,248 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:42,248 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131209045] [2022-02-21 04:41:42,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:42,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:42,387 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:41:42,388 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [12699238] [2022-02-21 04:41:42,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:42,388 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:41:42,389 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:41:42,390 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:41:42,420 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-21 04:41:43,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:41:43,084 INFO L263 TraceCheckSpWp]: Trace formula consists of 1842 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-21 04:41:43,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:41:43,107 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:41:43,237 INFO L290 TraceCheckUtils]: 0: Hoare triple {4244#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {4244#true} is VALID [2022-02-21 04:41:43,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {4244#true} assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {4244#true} is VALID [2022-02-21 04:41:43,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {4244#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {4244#true} is VALID [2022-02-21 04:41:43,237 INFO L290 TraceCheckUtils]: 3: Hoare triple {4244#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {4244#true} is VALID [2022-02-21 04:41:43,237 INFO L290 TraceCheckUtils]: 4: Hoare triple {4244#true} assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; {4244#true} is VALID [2022-02-21 04:41:43,238 INFO L290 TraceCheckUtils]: 5: Hoare triple {4244#true} havoc main_~_ha_hashv~1#1; {4244#true} is VALID [2022-02-21 04:41:43,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {4244#true} goto; {4244#true} is VALID [2022-02-21 04:41:43,248 INFO L290 TraceCheckUtils]: 7: Hoare triple {4244#true} havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; {4270#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} is VALID [2022-02-21 04:41:43,248 INFO L290 TraceCheckUtils]: 8: Hoare triple {4270#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} assume !(main_~_hj_k~1#1 % 4294967296 >= 12); {4270#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} is VALID [2022-02-21 04:41:43,249 INFO L290 TraceCheckUtils]: 9: Hoare triple {4270#(<= |ULTIMATE.start_main_~_hj_k~1#1| 4)} main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; {4277#(not |ULTIMATE.start_main_#t~switch157#1|)} is VALID [2022-02-21 04:41:43,250 INFO L290 TraceCheckUtils]: 10: Hoare triple {4277#(not |ULTIMATE.start_main_#t~switch157#1|)} assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; {4245#false} is VALID [2022-02-21 04:41:43,251 INFO L290 TraceCheckUtils]: 11: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,251 INFO L290 TraceCheckUtils]: 12: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; {4245#false} is VALID [2022-02-21 04:41:43,251 INFO L290 TraceCheckUtils]: 13: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,251 INFO L290 TraceCheckUtils]: 14: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; {4245#false} is VALID [2022-02-21 04:41:43,252 INFO L290 TraceCheckUtils]: 15: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,252 INFO L290 TraceCheckUtils]: 16: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; {4245#false} is VALID [2022-02-21 04:41:43,252 INFO L290 TraceCheckUtils]: 17: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,252 INFO L290 TraceCheckUtils]: 18: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; {4245#false} is VALID [2022-02-21 04:41:43,252 INFO L290 TraceCheckUtils]: 19: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,253 INFO L290 TraceCheckUtils]: 20: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; {4245#false} is VALID [2022-02-21 04:41:43,253 INFO L290 TraceCheckUtils]: 21: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,253 INFO L290 TraceCheckUtils]: 22: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; {4245#false} is VALID [2022-02-21 04:41:43,253 INFO L290 TraceCheckUtils]: 23: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,254 INFO L290 TraceCheckUtils]: 24: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; {4245#false} is VALID [2022-02-21 04:41:43,254 INFO L290 TraceCheckUtils]: 25: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,254 INFO L290 TraceCheckUtils]: 26: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; {4245#false} is VALID [2022-02-21 04:41:43,254 INFO L290 TraceCheckUtils]: 27: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,254 INFO L290 TraceCheckUtils]: 28: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; {4245#false} is VALID [2022-02-21 04:41:43,255 INFO L290 TraceCheckUtils]: 29: Hoare triple {4245#false} main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; {4245#false} is VALID [2022-02-21 04:41:43,255 INFO L290 TraceCheckUtils]: 30: Hoare triple {4245#false} assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; {4245#false} is VALID [2022-02-21 04:41:43,255 INFO L290 TraceCheckUtils]: 31: Hoare triple {4245#false} havoc main_#t~switch157#1; {4245#false} is VALID [2022-02-21 04:41:43,255 INFO L290 TraceCheckUtils]: 32: Hoare triple {4245#false} main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); {4245#false} is VALID [2022-02-21 04:41:43,255 INFO L290 TraceCheckUtils]: 33: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,256 INFO L290 TraceCheckUtils]: 34: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,256 INFO L290 TraceCheckUtils]: 35: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,256 INFO L290 TraceCheckUtils]: 36: Hoare triple {4245#false} call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); {4245#false} is VALID [2022-02-21 04:41:43,256 INFO L290 TraceCheckUtils]: 37: Hoare triple {4245#false} assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; {4245#false} is VALID [2022-02-21 04:41:43,257 INFO L290 TraceCheckUtils]: 38: Hoare triple {4245#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; {4245#false} is VALID [2022-02-21 04:41:43,257 INFO L290 TraceCheckUtils]: 39: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,257 INFO L290 TraceCheckUtils]: 40: Hoare triple {4245#false} havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; {4245#false} is VALID [2022-02-21 04:41:43,257 INFO L290 TraceCheckUtils]: 41: Hoare triple {4245#false} call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; {4245#false} is VALID [2022-02-21 04:41:43,257 INFO L290 TraceCheckUtils]: 42: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,258 INFO L290 TraceCheckUtils]: 43: Hoare triple {4245#false} call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); {4245#false} is VALID [2022-02-21 04:41:43,258 INFO L290 TraceCheckUtils]: 44: Hoare triple {4245#false} assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; {4245#false} is VALID [2022-02-21 04:41:43,258 INFO L290 TraceCheckUtils]: 45: Hoare triple {4245#false} call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; {4245#false} is VALID [2022-02-21 04:41:43,258 INFO L290 TraceCheckUtils]: 46: Hoare triple {4245#false} assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; {4245#false} is VALID [2022-02-21 04:41:43,258 INFO L290 TraceCheckUtils]: 47: Hoare triple {4245#false} assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; {4245#false} is VALID [2022-02-21 04:41:43,259 INFO L290 TraceCheckUtils]: 48: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,259 INFO L290 TraceCheckUtils]: 49: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,259 INFO L290 TraceCheckUtils]: 50: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,259 INFO L290 TraceCheckUtils]: 51: Hoare triple {4245#false} goto; {4245#false} is VALID [2022-02-21 04:41:43,259 INFO L290 TraceCheckUtils]: 52: Hoare triple {4245#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {4245#false} is VALID [2022-02-21 04:41:43,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:41:43,260 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:41:43,260 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:41:43,260 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131209045] [2022-02-21 04:41:43,260 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:41:43,261 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [12699238] [2022-02-21 04:41:43,261 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [12699238] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:41:43,261 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:41:43,261 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-21 04:41:43,261 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1611624343] [2022-02-21 04:41:43,262 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:41:43,262 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:41:43,262 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:41:43,263 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-21 04:41:43,263 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-21 04:41:43,263 INFO L87 Difference]: Start difference. First operand 458 states and 599 transitions. cyclomatic complexity: 151 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:41:46,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:46,278 INFO L93 Difference]: Finished difference Result 795 states and 1043 transitions. [2022-02-21 04:41:46,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-21 04:41:46,278 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:41:46,330 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:41:46,331 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 795 states and 1043 transitions. [2022-02-21 04:41:46,360 INFO L131 ngComponentsAnalysis]: Automaton has 20 accepting balls. 292 [2022-02-21 04:41:46,392 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 795 states to 795 states and 1043 transitions. [2022-02-21 04:41:46,392 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 795 [2022-02-21 04:41:46,393 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 795 [2022-02-21 04:41:46,393 INFO L73 IsDeterministic]: Start isDeterministic. Operand 795 states and 1043 transitions. [2022-02-21 04:41:46,394 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:41:46,394 INFO L681 BuchiCegarLoop]: Abstraction has 795 states and 1043 transitions. [2022-02-21 04:41:46,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 795 states and 1043 transitions. [2022-02-21 04:41:46,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 795 to 444. [2022-02-21 04:41:46,403 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:41:46,404 INFO L82 GeneralOperation]: Start isEquivalent. First operand 795 states and 1043 transitions. Second operand has 444 states, 437 states have (on average 1.2951945080091534) internal successors, (566), 436 states have internal predecessors, (566), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:46,406 INFO L74 IsIncluded]: Start isIncluded. First operand 795 states and 1043 transitions. Second operand has 444 states, 437 states have (on average 1.2951945080091534) internal successors, (566), 436 states have internal predecessors, (566), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:46,408 INFO L87 Difference]: Start difference. First operand 795 states and 1043 transitions. Second operand has 444 states, 437 states have (on average 1.2951945080091534) internal successors, (566), 436 states have internal predecessors, (566), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:46,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:46,435 INFO L93 Difference]: Finished difference Result 795 states and 1043 transitions. [2022-02-21 04:41:46,435 INFO L276 IsEmpty]: Start isEmpty. Operand 795 states and 1043 transitions. [2022-02-21 04:41:46,441 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:41:46,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:41:46,444 INFO L74 IsIncluded]: Start isIncluded. First operand has 444 states, 437 states have (on average 1.2951945080091534) internal successors, (566), 436 states have internal predecessors, (566), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 795 states and 1043 transitions. [2022-02-21 04:41:46,445 INFO L87 Difference]: Start difference. First operand has 444 states, 437 states have (on average 1.2951945080091534) internal successors, (566), 436 states have internal predecessors, (566), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 795 states and 1043 transitions. [2022-02-21 04:41:46,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:41:46,477 INFO L93 Difference]: Finished difference Result 795 states and 1043 transitions. [2022-02-21 04:41:46,477 INFO L276 IsEmpty]: Start isEmpty. Operand 795 states and 1043 transitions. [2022-02-21 04:41:46,479 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:41:46,479 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:41:46,479 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:41:46,480 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:41:46,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 444 states, 437 states have (on average 1.2951945080091534) internal successors, (566), 436 states have internal predecessors, (566), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-02-21 04:41:46,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 578 transitions. [2022-02-21 04:41:46,493 INFO L704 BuchiCegarLoop]: Abstraction has 444 states and 578 transitions. [2022-02-21 04:41:46,493 INFO L587 BuchiCegarLoop]: Abstraction has 444 states and 578 transitions. [2022-02-21 04:41:46,493 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2022-02-21 04:41:46,494 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 444 states and 578 transitions. [2022-02-21 04:41:46,495 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 227 [2022-02-21 04:41:46,495 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:41:46,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:41:46,497 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:41:46,497 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:41:46,498 INFO L791 eck$LassoCheckResult]: Stem: 5641#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 5631#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5323#L733-4 [2022-02-21 04:41:46,498 INFO L793 eck$LassoCheckResult]: Loop: 5323#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5201#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 5203#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5388#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5389#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 5319#L743-123 havoc main_~_ha_hashv~1#1; 5320#L743-48 goto; 5250#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 5251#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 5332#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 5333#L743-9 assume !main_#t~switch157#1; 5614#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 5445#L743-12 assume !main_#t~switch157#1; 5446#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 5491#L743-15 assume !main_#t~switch157#1; 5530#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 5531#L743-18 assume !main_#t~switch157#1; 5498#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 5499#L743-21 assume !main_#t~switch157#1; 5451#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 5452#L743-24 assume !main_#t~switch157#1; 5565#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 5447#L743-27 assume !main_#t~switch157#1; 5448#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 5229#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 5230#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 5408#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 5598#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 5515#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 5516#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 5436#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 5437#L743-41 havoc main_#t~switch157#1; 5544#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 5545#L743-43 goto; 5568#L743-45 goto; 5290#L743-47 goto; 5283#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 5284#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 5502#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 5503#L743-65 goto; 5315#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 5316#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 5279#L743-69 goto; 5280#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 5431#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 5418#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 5342#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 5343#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 5337#L743-116 goto; 5338#L743-118 goto; 5444#L743-120 goto; 5613#L743-122 goto; 5322#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 5323#L733-4 [2022-02-21 04:41:46,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:46,499 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-02-21 04:41:46,499 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:46,499 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264036038] [2022-02-21 04:41:46,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:46,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:46,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:46,535 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:41:46,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:41:46,571 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:41:46,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:41:46,574 INFO L85 PathProgramCache]: Analyzing trace with hash 2074116778, now seen corresponding path program 1 times [2022-02-21 04:41:46,574 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:41:46,574 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1819512911] [2022-02-21 04:41:46,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:46,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:41:46,705 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:41:46,705 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1621872252] [2022-02-21 04:41:46,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:41:46,705 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:41:46,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:41:46,741 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:41:46,742 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process