./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i --full-output -ea --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 72a3b80a468e10df778a3b8ff41e4c2b1e0b82c1005f056b209a19315511b1a5 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-21 04:44:11,618 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-21 04:44:11,619 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-21 04:44:11,643 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-21 04:44:11,643 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-21 04:44:11,644 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-21 04:44:11,645 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-21 04:44:11,646 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-21 04:44:11,648 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-21 04:44:11,648 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-21 04:44:11,649 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-21 04:44:11,650 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-21 04:44:11,651 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-21 04:44:11,653 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-21 04:44:11,654 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-21 04:44:11,656 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-21 04:44:11,657 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-21 04:44:11,657 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-21 04:44:11,658 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-21 04:44:11,660 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-21 04:44:11,661 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-21 04:44:11,661 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-21 04:44:11,662 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-21 04:44:11,663 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-21 04:44:11,664 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-21 04:44:11,665 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-21 04:44:11,665 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-21 04:44:11,665 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-21 04:44:11,666 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-21 04:44:11,666 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-21 04:44:11,667 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-21 04:44:11,667 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-21 04:44:11,668 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-21 04:44:11,668 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-21 04:44:11,669 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-21 04:44:11,669 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-21 04:44:11,669 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-21 04:44:11,670 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-21 04:44:11,670 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-21 04:44:11,670 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-21 04:44:11,671 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-21 04:44:11,676 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-02-21 04:44:11,696 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-21 04:44:11,699 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-21 04:44:11,699 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-21 04:44:11,700 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-21 04:44:11,700 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-21 04:44:11,701 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-21 04:44:11,701 INFO L138 SettingsManager]: * Use SBE=true [2022-02-21 04:44:11,701 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-02-21 04:44:11,701 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-02-21 04:44:11,701 INFO L138 SettingsManager]: * Use old map elimination=false [2022-02-21 04:44:11,701 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-02-21 04:44:11,702 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-02-21 04:44:11,702 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-02-21 04:44:11,702 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-21 04:44:11,702 INFO L138 SettingsManager]: * sizeof long=4 [2022-02-21 04:44:11,702 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-02-21 04:44:11,702 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-21 04:44:11,702 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * sizeof long double=12 [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-21 04:44:11,703 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-02-21 04:44:11,704 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-21 04:44:11,705 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-02-21 04:44:11,706 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-21 04:44:11,706 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-21 04:44:11,706 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-21 04:44:11,706 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-21 04:44:11,707 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-02-21 04:44:11,707 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 72a3b80a468e10df778a3b8ff41e4c2b1e0b82c1005f056b209a19315511b1a5 [2022-02-21 04:44:11,872 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-21 04:44:11,890 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-21 04:44:11,894 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-21 04:44:11,895 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-21 04:44:11,895 INFO L275 PluginConnector]: CDTParser initialized [2022-02-21 04:44:11,896 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i [2022-02-21 04:44:11,948 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b4df3309c/832c7cd8286c42f891390f985fd03089/FLAG2a9fd6f85 [2022-02-21 04:44:12,364 INFO L306 CDTParser]: Found 1 translation units. [2022-02-21 04:44:12,364 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i [2022-02-21 04:44:12,399 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b4df3309c/832c7cd8286c42f891390f985fd03089/FLAG2a9fd6f85 [2022-02-21 04:44:12,417 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b4df3309c/832c7cd8286c42f891390f985fd03089 [2022-02-21 04:44:12,419 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-21 04:44:12,421 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-21 04:44:12,424 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-21 04:44:12,424 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-21 04:44:12,426 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-21 04:44:12,427 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:44:12" (1/1) ... [2022-02-21 04:44:12,429 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@202956d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:12, skipping insertion in model container [2022-02-21 04:44:12,429 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:44:12" (1/1) ... [2022-02-21 04:44:12,433 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-21 04:44:12,472 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-21 04:44:12,759 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i[33021,33034] [2022-02-21 04:44:12,881 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i[44590,44603] [2022-02-21 04:44:12,901 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:44:12,908 INFO L203 MainTranslator]: Completed pre-run [2022-02-21 04:44:12,926 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i[33021,33034] [2022-02-21 04:44:12,989 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test3-2.i[44590,44603] [2022-02-21 04:44:13,007 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:44:13,036 INFO L208 MainTranslator]: Completed translation [2022-02-21 04:44:13,037 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13 WrapperNode [2022-02-21 04:44:13,037 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-21 04:44:13,038 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-21 04:44:13,038 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-21 04:44:13,038 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-21 04:44:13,043 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,079 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,161 INFO L137 Inliner]: procedures = 177, calls = 336, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 1196 [2022-02-21 04:44:13,162 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-21 04:44:13,163 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-21 04:44:13,163 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-21 04:44:13,163 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-21 04:44:13,169 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,169 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,188 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,188 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,233 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,257 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,262 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,275 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-21 04:44:13,276 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-21 04:44:13,276 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-21 04:44:13,279 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-21 04:44:13,280 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (1/1) ... [2022-02-21 04:44:13,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-02-21 04:44:13,297 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:44:13,310 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-02-21 04:44:13,322 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-02-21 04:44:13,346 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-21 04:44:13,346 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-21 04:44:13,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-21 04:44:13,346 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-21 04:44:13,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-21 04:44:13,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-21 04:44:13,346 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-21 04:44:13,347 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-21 04:44:13,347 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-21 04:44:13,347 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-21 04:44:13,347 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-21 04:44:13,347 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-21 04:44:13,347 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-21 04:44:13,347 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-21 04:44:13,561 INFO L234 CfgBuilder]: Building ICFG [2022-02-21 04:44:13,562 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-21 04:44:13,564 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-02-21 04:44:16,257 INFO L275 CfgBuilder]: Performing block encoding [2022-02-21 04:44:16,268 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-21 04:44:16,268 INFO L299 CfgBuilder]: Removed 72 assume(true) statements. [2022-02-21 04:44:16,270 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:44:16 BoogieIcfgContainer [2022-02-21 04:44:16,270 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-21 04:44:16,271 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-02-21 04:44:16,271 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-02-21 04:44:16,273 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-02-21 04:44:16,274 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:44:16,274 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.02 04:44:12" (1/3) ... [2022-02-21 04:44:16,275 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d85527c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:44:16, skipping insertion in model container [2022-02-21 04:44:16,275 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:44:16,275 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:44:13" (2/3) ... [2022-02-21 04:44:16,275 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d85527c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:44:16, skipping insertion in model container [2022-02-21 04:44:16,276 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:44:16,276 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:44:16" (3/3) ... [2022-02-21 04:44:16,279 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test3-2.i [2022-02-21 04:44:16,315 INFO L359 BuchiCegarLoop]: Interprodecural is true [2022-02-21 04:44:16,316 INFO L360 BuchiCegarLoop]: Hoare is false [2022-02-21 04:44:16,316 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-02-21 04:44:16,316 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-02-21 04:44:16,316 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-02-21 04:44:16,316 INFO L364 BuchiCegarLoop]: Difference is false [2022-02-21 04:44:16,316 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-02-21 04:44:16,317 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2022-02-21 04:44:16,352 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 229 states, 224 states have (on average 1.6830357142857142) internal successors, (377), 224 states have internal predecessors, (377), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:16,403 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 214 [2022-02-21 04:44:16,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:44:16,403 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:44:16,407 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:44:16,407 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-02-21 04:44:16,408 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2022-02-21 04:44:16,409 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 229 states, 224 states have (on average 1.6830357142857142) internal successors, (377), 224 states have internal predecessors, (377), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:16,420 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 214 [2022-02-21 04:44:16,421 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:44:16,421 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:44:16,421 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:44:16,421 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2022-02-21 04:44:16,426 INFO L791 eck$LassoCheckResult]: Stem: 221#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 156#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~short191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem214#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~post218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~ite234#1.base, main_#t~ite234#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~post277#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite236#1.base, main_#t~ite236#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 187#L735-4true [2022-02-21 04:44:16,426 INFO L793 eck$LassoCheckResult]: Loop: 187#L735-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 42#L735-1true assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 16#L737true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 76#L737-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 62#L742-124true assume !true; 34#L735-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 187#L735-4true [2022-02-21 04:44:16,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:16,430 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-02-21 04:44:16,436 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:16,437 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860329147] [2022-02-21 04:44:16,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:16,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:16,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:16,535 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:44:16,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:16,582 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:44:16,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:16,584 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2022-02-21 04:44:16,584 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:16,584 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665708203] [2022-02-21 04:44:16,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:16,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:16,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:44:16,625 INFO L290 TraceCheckUtils]: 0: Hoare triple {235#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {235#true} is VALID [2022-02-21 04:44:16,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {235#true} assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {235#true} is VALID [2022-02-21 04:44:16,626 INFO L290 TraceCheckUtils]: 2: Hoare triple {235#true} assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; {236#false} is VALID [2022-02-21 04:44:16,627 INFO L290 TraceCheckUtils]: 3: Hoare triple {236#false} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; {236#false} is VALID [2022-02-21 04:44:16,627 INFO L290 TraceCheckUtils]: 4: Hoare triple {236#false} assume !true; {236#false} is VALID [2022-02-21 04:44:16,627 INFO L290 TraceCheckUtils]: 5: Hoare triple {236#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {236#false} is VALID [2022-02-21 04:44:16,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:44:16,628 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:44:16,628 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665708203] [2022-02-21 04:44:16,628 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1665708203] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:44:16,629 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:44:16,629 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-02-21 04:44:16,629 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146703023] [2022-02-21 04:44:16,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:44:16,632 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:44:16,632 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:44:16,649 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-02-21 04:44:16,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-02-21 04:44:16,652 INFO L87 Difference]: Start difference. First operand has 229 states, 224 states have (on average 1.6830357142857142) internal successors, (377), 224 states have internal predecessors, (377), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:44:16,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:16,925 INFO L93 Difference]: Finished difference Result 229 states and 301 transitions. [2022-02-21 04:44:16,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-02-21 04:44:16,926 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:44:16,938 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6 edges. 6 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:44:16,945 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 229 states and 301 transitions. [2022-02-21 04:44:16,958 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 214 [2022-02-21 04:44:16,970 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 229 states to 225 states and 297 transitions. [2022-02-21 04:44:16,971 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 225 [2022-02-21 04:44:16,971 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 225 [2022-02-21 04:44:16,972 INFO L73 IsDeterministic]: Start isDeterministic. Operand 225 states and 297 transitions. [2022-02-21 04:44:16,973 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:44:16,973 INFO L681 BuchiCegarLoop]: Abstraction has 225 states and 297 transitions. [2022-02-21 04:44:16,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states and 297 transitions. [2022-02-21 04:44:16,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 225. [2022-02-21 04:44:16,998 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:44:16,999 INFO L82 GeneralOperation]: Start isEquivalent. First operand 225 states and 297 transitions. Second operand has 225 states, 221 states have (on average 1.3167420814479638) internal successors, (291), 220 states have internal predecessors, (291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:17,000 INFO L74 IsIncluded]: Start isIncluded. First operand 225 states and 297 transitions. Second operand has 225 states, 221 states have (on average 1.3167420814479638) internal successors, (291), 220 states have internal predecessors, (291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:17,001 INFO L87 Difference]: Start difference. First operand 225 states and 297 transitions. Second operand has 225 states, 221 states have (on average 1.3167420814479638) internal successors, (291), 220 states have internal predecessors, (291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:17,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:17,009 INFO L93 Difference]: Finished difference Result 225 states and 297 transitions. [2022-02-21 04:44:17,009 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 297 transitions. [2022-02-21 04:44:17,010 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:44:17,011 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:44:17,011 INFO L74 IsIncluded]: Start isIncluded. First operand has 225 states, 221 states have (on average 1.3167420814479638) internal successors, (291), 220 states have internal predecessors, (291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 225 states and 297 transitions. [2022-02-21 04:44:17,012 INFO L87 Difference]: Start difference. First operand has 225 states, 221 states have (on average 1.3167420814479638) internal successors, (291), 220 states have internal predecessors, (291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 225 states and 297 transitions. [2022-02-21 04:44:17,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:17,018 INFO L93 Difference]: Finished difference Result 225 states and 297 transitions. [2022-02-21 04:44:17,018 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 297 transitions. [2022-02-21 04:44:17,019 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:44:17,019 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:44:17,019 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:44:17,020 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:44:17,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 225 states, 221 states have (on average 1.3167420814479638) internal successors, (291), 220 states have internal predecessors, (291), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:17,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 297 transitions. [2022-02-21 04:44:17,027 INFO L704 BuchiCegarLoop]: Abstraction has 225 states and 297 transitions. [2022-02-21 04:44:17,027 INFO L587 BuchiCegarLoop]: Abstraction has 225 states and 297 transitions. [2022-02-21 04:44:17,027 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2022-02-21 04:44:17,027 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 225 states and 297 transitions. [2022-02-21 04:44:17,028 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 214 [2022-02-21 04:44:17,028 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:44:17,028 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:44:17,029 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:44:17,029 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:44:17,029 INFO L791 eck$LassoCheckResult]: Stem: 690#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 669#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~short191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem214#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~post218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~ite234#1.base, main_#t~ite234#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~post277#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite236#1.base, main_#t~ite236#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 528#L735-4 [2022-02-21 04:44:17,030 INFO L793 eck$LassoCheckResult]: Loop: 528#L735-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 540#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 497#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 498#L737-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 574#L742-124 havoc main_~_ha_hashv~0#1; 575#L742-49 goto; 519#L742-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 520#L742-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 562#L742-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 684#L742-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 561#L742-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 534#L742-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 535#L742-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 623#L742-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 499#L742-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 500#L742-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 586#L742-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 618#L742-22 assume !main_#t~switch24#1; 670#L742-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 671#L742-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 571#L742-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 572#L742-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 641#L742-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 642#L742-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 550#L742-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 551#L742-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 639#L742-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 628#L742-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 580#L742-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 581#L742-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 632#L742-42 havoc main_#t~switch24#1; 681#L742-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 617#L742-44 goto; 556#L742-46 goto; 557#L742-48 goto; 517#L742-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 518#L742-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 683#L742-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 605#L742-66 goto; 606#L742-120 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 622#L742-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if 1 == main_#t~mem65#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem65#1 - 1 || 0 == main_#t~mem65#1 - 1 then main_#t~mem65#1 - 1 else (if main_#t~mem65#1 - 1 >= 0 then (main_#t~mem65#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 662#L742-70 goto; 663#L742-118 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 558#L742-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 487#L742-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 488#L742-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 542#L742-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 544#L742-117 goto; 491#L742-119 goto; 492#L742-121 goto; 579#L742-123 goto; 527#L735-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 528#L735-4 [2022-02-21 04:44:17,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:17,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-02-21 04:44:17,031 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:17,031 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661063992] [2022-02-21 04:44:17,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:17,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:17,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:17,045 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:44:17,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:17,059 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:44:17,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:17,060 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2022-02-21 04:44:17,060 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:17,060 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034313038] [2022-02-21 04:44:17,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:17,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:17,170 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:44:17,170 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1465001679] [2022-02-21 04:44:17,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:17,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:44:17,171 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:44:17,172 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:44:17,188 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-21 04:44:17,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:44:17,674 INFO L263 TraceCheckSpWp]: Trace formula consists of 1850 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-21 04:44:17,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:44:17,686 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:44:17,803 INFO L290 TraceCheckUtils]: 0: Hoare triple {1146#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {1146#true} is VALID [2022-02-21 04:44:17,804 INFO L290 TraceCheckUtils]: 1: Hoare triple {1146#true} assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {1146#true} is VALID [2022-02-21 04:44:17,804 INFO L290 TraceCheckUtils]: 2: Hoare triple {1146#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {1146#true} is VALID [2022-02-21 04:44:17,804 INFO L290 TraceCheckUtils]: 3: Hoare triple {1146#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; {1146#true} is VALID [2022-02-21 04:44:17,804 INFO L290 TraceCheckUtils]: 4: Hoare triple {1146#true} havoc main_~_ha_hashv~0#1; {1146#true} is VALID [2022-02-21 04:44:17,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {1146#true} goto; {1146#true} is VALID [2022-02-21 04:44:17,805 INFO L290 TraceCheckUtils]: 6: Hoare triple {1146#true} havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; {1146#true} is VALID [2022-02-21 04:44:17,805 INFO L290 TraceCheckUtils]: 7: Hoare triple {1146#true} assume !(main_~_hj_k~0#1 % 4294967296 >= 12); {1146#true} is VALID [2022-02-21 04:44:17,805 INFO L290 TraceCheckUtils]: 8: Hoare triple {1146#true} main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; {1146#true} is VALID [2022-02-21 04:44:17,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {1146#true} assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; {1146#true} is VALID [2022-02-21 04:44:17,805 INFO L290 TraceCheckUtils]: 10: Hoare triple {1146#true} main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; {1146#true} is VALID [2022-02-21 04:44:17,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {1146#true} assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; {1146#true} is VALID [2022-02-21 04:44:17,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {1146#true} main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; {1146#true} is VALID [2022-02-21 04:44:17,806 INFO L290 TraceCheckUtils]: 13: Hoare triple {1146#true} assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; {1146#true} is VALID [2022-02-21 04:44:17,806 INFO L290 TraceCheckUtils]: 14: Hoare triple {1146#true} main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; {1146#true} is VALID [2022-02-21 04:44:17,807 INFO L290 TraceCheckUtils]: 15: Hoare triple {1146#true} assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; {1196#|ULTIMATE.start_main_#t~switch24#1|} is VALID [2022-02-21 04:44:17,807 INFO L290 TraceCheckUtils]: 16: Hoare triple {1196#|ULTIMATE.start_main_#t~switch24#1|} main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; {1196#|ULTIMATE.start_main_#t~switch24#1|} is VALID [2022-02-21 04:44:17,808 INFO L290 TraceCheckUtils]: 17: Hoare triple {1196#|ULTIMATE.start_main_#t~switch24#1|} assume !main_#t~switch24#1; {1147#false} is VALID [2022-02-21 04:44:17,808 INFO L290 TraceCheckUtils]: 18: Hoare triple {1147#false} main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; {1147#false} is VALID [2022-02-21 04:44:17,808 INFO L290 TraceCheckUtils]: 19: Hoare triple {1147#false} assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; {1147#false} is VALID [2022-02-21 04:44:17,808 INFO L290 TraceCheckUtils]: 20: Hoare triple {1147#false} main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; {1147#false} is VALID [2022-02-21 04:44:17,808 INFO L290 TraceCheckUtils]: 21: Hoare triple {1147#false} assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; {1147#false} is VALID [2022-02-21 04:44:17,808 INFO L290 TraceCheckUtils]: 22: Hoare triple {1147#false} main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; {1147#false} is VALID [2022-02-21 04:44:17,809 INFO L290 TraceCheckUtils]: 23: Hoare triple {1147#false} assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; {1147#false} is VALID [2022-02-21 04:44:17,809 INFO L290 TraceCheckUtils]: 24: Hoare triple {1147#false} main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; {1147#false} is VALID [2022-02-21 04:44:17,809 INFO L290 TraceCheckUtils]: 25: Hoare triple {1147#false} assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; {1147#false} is VALID [2022-02-21 04:44:17,809 INFO L290 TraceCheckUtils]: 26: Hoare triple {1147#false} main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; {1147#false} is VALID [2022-02-21 04:44:17,823 INFO L290 TraceCheckUtils]: 27: Hoare triple {1147#false} assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; {1147#false} is VALID [2022-02-21 04:44:17,823 INFO L290 TraceCheckUtils]: 28: Hoare triple {1147#false} main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; {1147#false} is VALID [2022-02-21 04:44:17,824 INFO L290 TraceCheckUtils]: 29: Hoare triple {1147#false} assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; {1147#false} is VALID [2022-02-21 04:44:17,824 INFO L290 TraceCheckUtils]: 30: Hoare triple {1147#false} havoc main_#t~switch24#1; {1147#false} is VALID [2022-02-21 04:44:17,824 INFO L290 TraceCheckUtils]: 31: Hoare triple {1147#false} main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); {1147#false} is VALID [2022-02-21 04:44:17,824 INFO L290 TraceCheckUtils]: 32: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,824 INFO L290 TraceCheckUtils]: 33: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,825 INFO L290 TraceCheckUtils]: 34: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,825 INFO L290 TraceCheckUtils]: 35: Hoare triple {1147#false} call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); {1147#false} is VALID [2022-02-21 04:44:17,825 INFO L290 TraceCheckUtils]: 36: Hoare triple {1147#false} assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; {1147#false} is VALID [2022-02-21 04:44:17,825 INFO L290 TraceCheckUtils]: 37: Hoare triple {1147#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; {1147#false} is VALID [2022-02-21 04:44:17,825 INFO L290 TraceCheckUtils]: 38: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,825 INFO L290 TraceCheckUtils]: 39: Hoare triple {1147#false} havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; {1147#false} is VALID [2022-02-21 04:44:17,826 INFO L290 TraceCheckUtils]: 40: Hoare triple {1147#false} call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if 1 == main_#t~mem65#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem65#1 - 1 || 0 == main_#t~mem65#1 - 1 then main_#t~mem65#1 - 1 else (if main_#t~mem65#1 - 1 >= 0 then (main_#t~mem65#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; {1147#false} is VALID [2022-02-21 04:44:17,826 INFO L290 TraceCheckUtils]: 41: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,826 INFO L290 TraceCheckUtils]: 42: Hoare triple {1147#false} call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); {1147#false} is VALID [2022-02-21 04:44:17,826 INFO L290 TraceCheckUtils]: 43: Hoare triple {1147#false} assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; {1147#false} is VALID [2022-02-21 04:44:17,826 INFO L290 TraceCheckUtils]: 44: Hoare triple {1147#false} call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; {1147#false} is VALID [2022-02-21 04:44:17,827 INFO L290 TraceCheckUtils]: 45: Hoare triple {1147#false} assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; {1147#false} is VALID [2022-02-21 04:44:17,827 INFO L290 TraceCheckUtils]: 46: Hoare triple {1147#false} assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; {1147#false} is VALID [2022-02-21 04:44:17,828 INFO L290 TraceCheckUtils]: 47: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,829 INFO L290 TraceCheckUtils]: 48: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,829 INFO L290 TraceCheckUtils]: 49: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,829 INFO L290 TraceCheckUtils]: 50: Hoare triple {1147#false} goto; {1147#false} is VALID [2022-02-21 04:44:17,829 INFO L290 TraceCheckUtils]: 51: Hoare triple {1147#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {1147#false} is VALID [2022-02-21 04:44:17,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:44:17,829 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:44:17,830 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:44:17,830 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1034313038] [2022-02-21 04:44:17,830 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:44:17,830 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1465001679] [2022-02-21 04:44:17,830 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1465001679] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:44:17,830 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:44:17,830 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-21 04:44:17,830 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930588666] [2022-02-21 04:44:17,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:44:17,831 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:44:17,831 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:44:17,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-21 04:44:17,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-21 04:44:17,832 INFO L87 Difference]: Start difference. First operand 225 states and 297 transitions. cyclomatic complexity: 77 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:44:18,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:18,615 INFO L93 Difference]: Finished difference Result 246 states and 318 transitions. [2022-02-21 04:44:18,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-21 04:44:18,616 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:44:18,695 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:44:18,696 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 318 transitions. [2022-02-21 04:44:18,711 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 235 [2022-02-21 04:44:18,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 246 states and 318 transitions. [2022-02-21 04:44:18,719 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 246 [2022-02-21 04:44:18,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 246 [2022-02-21 04:44:18,723 INFO L73 IsDeterministic]: Start isDeterministic. Operand 246 states and 318 transitions. [2022-02-21 04:44:18,725 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:44:18,725 INFO L681 BuchiCegarLoop]: Abstraction has 246 states and 318 transitions. [2022-02-21 04:44:18,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states and 318 transitions. [2022-02-21 04:44:18,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 245. [2022-02-21 04:44:18,736 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:44:18,737 INFO L82 GeneralOperation]: Start isEquivalent. First operand 246 states and 318 transitions. Second operand has 245 states, 241 states have (on average 1.2904564315352698) internal successors, (311), 240 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:18,737 INFO L74 IsIncluded]: Start isIncluded. First operand 246 states and 318 transitions. Second operand has 245 states, 241 states have (on average 1.2904564315352698) internal successors, (311), 240 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:18,738 INFO L87 Difference]: Start difference. First operand 246 states and 318 transitions. Second operand has 245 states, 241 states have (on average 1.2904564315352698) internal successors, (311), 240 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:18,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:18,743 INFO L93 Difference]: Finished difference Result 246 states and 318 transitions. [2022-02-21 04:44:18,743 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 318 transitions. [2022-02-21 04:44:18,744 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:44:18,744 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:44:18,745 INFO L74 IsIncluded]: Start isIncluded. First operand has 245 states, 241 states have (on average 1.2904564315352698) internal successors, (311), 240 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 246 states and 318 transitions. [2022-02-21 04:44:18,745 INFO L87 Difference]: Start difference. First operand has 245 states, 241 states have (on average 1.2904564315352698) internal successors, (311), 240 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 246 states and 318 transitions. [2022-02-21 04:44:18,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:18,751 INFO L93 Difference]: Finished difference Result 246 states and 318 transitions. [2022-02-21 04:44:18,751 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 318 transitions. [2022-02-21 04:44:18,752 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:44:18,752 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:44:18,752 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:44:18,752 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:44:18,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 245 states, 241 states have (on average 1.2904564315352698) internal successors, (311), 240 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:18,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 245 states and 317 transitions. [2022-02-21 04:44:18,758 INFO L704 BuchiCegarLoop]: Abstraction has 245 states and 317 transitions. [2022-02-21 04:44:18,758 INFO L587 BuchiCegarLoop]: Abstraction has 245 states and 317 transitions. [2022-02-21 04:44:18,758 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2022-02-21 04:44:18,758 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 245 states and 317 transitions. [2022-02-21 04:44:18,759 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 234 [2022-02-21 04:44:18,759 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:44:18,759 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:44:18,760 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:44:18,760 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:44:18,760 INFO L791 eck$LassoCheckResult]: Stem: 1773#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1751#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~short191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem214#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~post218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~ite234#1.base, main_#t~ite234#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~post277#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite236#1.base, main_#t~ite236#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1610#L735-4 [2022-02-21 04:44:18,761 INFO L793 eck$LassoCheckResult]: Loop: 1610#L735-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1622#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 1579#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1580#L737-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 1656#L742-124 havoc main_~_ha_hashv~0#1; 1657#L742-49 goto; 1601#L742-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1602#L742-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1644#L742-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 1766#L742-10 assume !main_#t~switch24#1; 1767#L742-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 1783#L742-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 1619#L742-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 1705#L742-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 1581#L742-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 1582#L742-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 1668#L742-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 1700#L742-22 assume main_#t~switch24#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 1752#L742-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 1753#L742-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 1653#L742-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 1654#L742-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 1723#L742-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 1724#L742-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1632#L742-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 1633#L742-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 1721#L742-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 1710#L742-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 1662#L742-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 1663#L742-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 1714#L742-42 havoc main_#t~switch24#1; 1763#L742-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1699#L742-44 goto; 1638#L742-46 goto; 1639#L742-48 goto; 1599#L742-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1600#L742-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 1765#L742-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 1687#L742-66 goto; 1688#L742-120 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 1704#L742-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if 1 == main_#t~mem65#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem65#1 - 1 || 0 == main_#t~mem65#1 - 1 then main_#t~mem65#1 - 1 else (if main_#t~mem65#1 - 1 >= 0 then (main_#t~mem65#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 1744#L742-70 goto; 1745#L742-118 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1641#L742-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 1569#L742-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 1570#L742-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 1624#L742-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 1626#L742-117 goto; 1573#L742-119 goto; 1574#L742-121 goto; 1661#L742-123 goto; 1609#L735-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1610#L735-4 [2022-02-21 04:44:18,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:18,761 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-02-21 04:44:18,762 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:18,762 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689902116] [2022-02-21 04:44:18,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:18,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:18,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:18,777 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:44:18,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:18,791 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:44:18,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:18,792 INFO L85 PathProgramCache]: Analyzing trace with hash -1623964883, now seen corresponding path program 1 times [2022-02-21 04:44:18,792 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:18,792 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351813562] [2022-02-21 04:44:18,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:18,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:18,894 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:44:18,895 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [351732708] [2022-02-21 04:44:18,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:18,895 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:44:18,895 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:44:18,897 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:44:18,947 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-21 04:44:19,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:44:19,509 INFO L263 TraceCheckSpWp]: Trace formula consists of 1850 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-21 04:44:19,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:44:19,528 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:44:19,686 INFO L290 TraceCheckUtils]: 0: Hoare triple {2290#true} call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {2290#true} is VALID [2022-02-21 04:44:19,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {2290#true} assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; {2290#true} is VALID [2022-02-21 04:44:19,686 INFO L290 TraceCheckUtils]: 2: Hoare triple {2290#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {2290#true} is VALID [2022-02-21 04:44:19,686 INFO L290 TraceCheckUtils]: 3: Hoare triple {2290#true} call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; {2290#true} is VALID [2022-02-21 04:44:19,687 INFO L290 TraceCheckUtils]: 4: Hoare triple {2290#true} havoc main_~_ha_hashv~0#1; {2290#true} is VALID [2022-02-21 04:44:19,687 INFO L290 TraceCheckUtils]: 5: Hoare triple {2290#true} goto; {2290#true} is VALID [2022-02-21 04:44:19,696 INFO L290 TraceCheckUtils]: 6: Hoare triple {2290#true} havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; {2313#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} is VALID [2022-02-21 04:44:19,697 INFO L290 TraceCheckUtils]: 7: Hoare triple {2313#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} assume !(main_~_hj_k~0#1 % 4294967296 >= 12); {2313#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} is VALID [2022-02-21 04:44:19,697 INFO L290 TraceCheckUtils]: 8: Hoare triple {2313#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; {2313#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} is VALID [2022-02-21 04:44:19,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {2313#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} assume !main_#t~switch24#1; {2323#(and (<= |ULTIMATE.start_main_~_hj_k~0#1| 4) (not |ULTIMATE.start_main_#t~switch24#1|))} is VALID [2022-02-21 04:44:19,700 INFO L290 TraceCheckUtils]: 10: Hoare triple {2323#(and (<= |ULTIMATE.start_main_~_hj_k~0#1| 4) (not |ULTIMATE.start_main_#t~switch24#1|))} main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; {2327#(not |ULTIMATE.start_main_#t~switch24#1|)} is VALID [2022-02-21 04:44:19,700 INFO L290 TraceCheckUtils]: 11: Hoare triple {2327#(not |ULTIMATE.start_main_#t~switch24#1|)} assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; {2291#false} is VALID [2022-02-21 04:44:19,700 INFO L290 TraceCheckUtils]: 12: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,700 INFO L290 TraceCheckUtils]: 13: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; {2291#false} is VALID [2022-02-21 04:44:19,701 INFO L290 TraceCheckUtils]: 14: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,701 INFO L290 TraceCheckUtils]: 15: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; {2291#false} is VALID [2022-02-21 04:44:19,701 INFO L290 TraceCheckUtils]: 16: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,701 INFO L290 TraceCheckUtils]: 17: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; {2291#false} is VALID [2022-02-21 04:44:19,701 INFO L290 TraceCheckUtils]: 18: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,701 INFO L290 TraceCheckUtils]: 19: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; {2291#false} is VALID [2022-02-21 04:44:19,702 INFO L290 TraceCheckUtils]: 20: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,702 INFO L290 TraceCheckUtils]: 21: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; {2291#false} is VALID [2022-02-21 04:44:19,702 INFO L290 TraceCheckUtils]: 22: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,702 INFO L290 TraceCheckUtils]: 23: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; {2291#false} is VALID [2022-02-21 04:44:19,702 INFO L290 TraceCheckUtils]: 24: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,703 INFO L290 TraceCheckUtils]: 25: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; {2291#false} is VALID [2022-02-21 04:44:19,703 INFO L290 TraceCheckUtils]: 26: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,703 INFO L290 TraceCheckUtils]: 27: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; {2291#false} is VALID [2022-02-21 04:44:19,703 INFO L290 TraceCheckUtils]: 28: Hoare triple {2291#false} main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; {2291#false} is VALID [2022-02-21 04:44:19,703 INFO L290 TraceCheckUtils]: 29: Hoare triple {2291#false} assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; {2291#false} is VALID [2022-02-21 04:44:19,703 INFO L290 TraceCheckUtils]: 30: Hoare triple {2291#false} havoc main_#t~switch24#1; {2291#false} is VALID [2022-02-21 04:44:19,704 INFO L290 TraceCheckUtils]: 31: Hoare triple {2291#false} main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); {2291#false} is VALID [2022-02-21 04:44:19,704 INFO L290 TraceCheckUtils]: 32: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,704 INFO L290 TraceCheckUtils]: 33: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,704 INFO L290 TraceCheckUtils]: 34: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,704 INFO L290 TraceCheckUtils]: 35: Hoare triple {2291#false} call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); {2291#false} is VALID [2022-02-21 04:44:19,704 INFO L290 TraceCheckUtils]: 36: Hoare triple {2291#false} assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; {2291#false} is VALID [2022-02-21 04:44:19,705 INFO L290 TraceCheckUtils]: 37: Hoare triple {2291#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; {2291#false} is VALID [2022-02-21 04:44:19,705 INFO L290 TraceCheckUtils]: 38: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,705 INFO L290 TraceCheckUtils]: 39: Hoare triple {2291#false} havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; {2291#false} is VALID [2022-02-21 04:44:19,705 INFO L290 TraceCheckUtils]: 40: Hoare triple {2291#false} call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if 1 == main_#t~mem65#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem65#1 - 1 || 0 == main_#t~mem65#1 - 1 then main_#t~mem65#1 - 1 else (if main_#t~mem65#1 - 1 >= 0 then (main_#t~mem65#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; {2291#false} is VALID [2022-02-21 04:44:19,705 INFO L290 TraceCheckUtils]: 41: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,705 INFO L290 TraceCheckUtils]: 42: Hoare triple {2291#false} call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); {2291#false} is VALID [2022-02-21 04:44:19,706 INFO L290 TraceCheckUtils]: 43: Hoare triple {2291#false} assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; {2291#false} is VALID [2022-02-21 04:44:19,706 INFO L290 TraceCheckUtils]: 44: Hoare triple {2291#false} call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; {2291#false} is VALID [2022-02-21 04:44:19,706 INFO L290 TraceCheckUtils]: 45: Hoare triple {2291#false} assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; {2291#false} is VALID [2022-02-21 04:44:19,706 INFO L290 TraceCheckUtils]: 46: Hoare triple {2291#false} assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; {2291#false} is VALID [2022-02-21 04:44:19,706 INFO L290 TraceCheckUtils]: 47: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,706 INFO L290 TraceCheckUtils]: 48: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,707 INFO L290 TraceCheckUtils]: 49: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,707 INFO L290 TraceCheckUtils]: 50: Hoare triple {2291#false} goto; {2291#false} is VALID [2022-02-21 04:44:19,707 INFO L290 TraceCheckUtils]: 51: Hoare triple {2291#false} call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; {2291#false} is VALID [2022-02-21 04:44:19,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:44:19,707 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:44:19,707 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:44:19,708 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351813562] [2022-02-21 04:44:19,708 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:44:19,708 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [351732708] [2022-02-21 04:44:19,708 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [351732708] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:44:19,708 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:44:19,708 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-21 04:44:19,709 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058949793] [2022-02-21 04:44:19,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:44:19,709 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:44:19,709 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:44:19,709 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-21 04:44:19,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-21 04:44:19,710 INFO L87 Difference]: Start difference. First operand 245 states and 317 transitions. cyclomatic complexity: 77 Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:44:21,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:21,023 INFO L93 Difference]: Finished difference Result 369 states and 479 transitions. [2022-02-21 04:44:21,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-21 04:44:21,023 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:44:21,071 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:44:21,072 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 369 states and 479 transitions. [2022-02-21 04:44:21,080 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 346 [2022-02-21 04:44:21,087 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 369 states to 369 states and 479 transitions. [2022-02-21 04:44:21,087 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 369 [2022-02-21 04:44:21,088 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 369 [2022-02-21 04:44:21,088 INFO L73 IsDeterministic]: Start isDeterministic. Operand 369 states and 479 transitions. [2022-02-21 04:44:21,088 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:44:21,088 INFO L681 BuchiCegarLoop]: Abstraction has 369 states and 479 transitions. [2022-02-21 04:44:21,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states and 479 transitions. [2022-02-21 04:44:21,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 231. [2022-02-21 04:44:21,092 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:44:21,093 INFO L82 GeneralOperation]: Start isEquivalent. First operand 369 states and 479 transitions. Second operand has 231 states, 227 states have (on average 1.277533039647577) internal successors, (290), 226 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:21,093 INFO L74 IsIncluded]: Start isIncluded. First operand 369 states and 479 transitions. Second operand has 231 states, 227 states have (on average 1.277533039647577) internal successors, (290), 226 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:21,094 INFO L87 Difference]: Start difference. First operand 369 states and 479 transitions. Second operand has 231 states, 227 states have (on average 1.277533039647577) internal successors, (290), 226 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:21,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:21,101 INFO L93 Difference]: Finished difference Result 369 states and 479 transitions. [2022-02-21 04:44:21,101 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 479 transitions. [2022-02-21 04:44:21,101 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:44:21,101 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:44:21,102 INFO L74 IsIncluded]: Start isIncluded. First operand has 231 states, 227 states have (on average 1.277533039647577) internal successors, (290), 226 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 369 states and 479 transitions. [2022-02-21 04:44:21,102 INFO L87 Difference]: Start difference. First operand has 231 states, 227 states have (on average 1.277533039647577) internal successors, (290), 226 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 369 states and 479 transitions. [2022-02-21 04:44:21,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:44:21,110 INFO L93 Difference]: Finished difference Result 369 states and 479 transitions. [2022-02-21 04:44:21,110 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 479 transitions. [2022-02-21 04:44:21,110 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:44:21,110 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:44:21,111 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:44:21,111 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:44:21,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 231 states, 227 states have (on average 1.277533039647577) internal successors, (290), 226 states have internal predecessors, (290), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:44:21,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 296 transitions. [2022-02-21 04:44:21,115 INFO L704 BuchiCegarLoop]: Abstraction has 231 states and 296 transitions. [2022-02-21 04:44:21,115 INFO L587 BuchiCegarLoop]: Abstraction has 231 states and 296 transitions. [2022-02-21 04:44:21,115 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2022-02-21 04:44:21,116 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 231 states and 296 transitions. [2022-02-21 04:44:21,116 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 220 [2022-02-21 04:44:21,116 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:44:21,116 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:44:21,117 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:44:21,117 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:44:21,117 INFO L791 eck$LassoCheckResult]: Stem: 3046#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 3024#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~ite95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~pre109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~post114#1, main_#t~mem118#1, main_#t~mem116#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem117#1, main_#t~mem119#1, main_#t~post120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~post97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem137#1, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1, main_#t~ite140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem147#1, main_#t~mem146#1, main_#t~mem148#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem150#1, main_#t~mem152#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem154#1, main_#t~mem156#1, main_#t~mem157#1, main_#t~switch158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~short182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~ret184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1.base, main_#t~mem190#1.offset, main_#t~short191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem214#1, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~post218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem144#1, main_#t~mem145#1, main_#t~mem231#1, main_#t~mem232#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~ite234#1.base, main_#t~ite234#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem262#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1.base, main_#t~mem273#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~post277#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite236#1.base, main_#t~ite236#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2879#L735-4 [2022-02-21 04:44:21,117 INFO L793 eck$LassoCheckResult]: Loop: 2879#L735-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2891#L735-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2848#L737 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2849#L737-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 2925#L742-124 havoc main_~_ha_hashv~0#1; 2926#L742-49 goto; 2870#L742-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2871#L742-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2914#L742-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 3040#L742-10 assume !main_#t~switch24#1; 2912#L742-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 2887#L742-13 assume !main_#t~switch24#1; 2888#L742-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 2975#L742-16 assume !main_#t~switch24#1; 2850#L742-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 2851#L742-19 assume !main_#t~switch24#1; 2940#L742-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 2970#L742-22 assume !main_#t~switch24#1; 3025#L742-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 3026#L742-25 assume !main_#t~switch24#1; 2922#L742-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 2923#L742-28 assume !main_#t~switch24#1; 2994#L742-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 2995#L742-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 2901#L742-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 2902#L742-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 2992#L742-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 2979#L742-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 2980#L742-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 2984#L742-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 2985#L742-42 havoc main_#t~switch24#1; 3037#L742-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 2968#L742-44 goto; 2907#L742-46 goto; 2908#L742-48 goto; 2868#L742-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2869#L742-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 3039#L742-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 2954#L742-66 goto; 2955#L742-120 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 2971#L742-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if 1 == main_#t~mem65#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem65#1 - 1 || 0 == main_#t~mem65#1 - 1 then main_#t~mem65#1 - 1 else (if main_#t~mem65#1 - 1 >= 0 then (main_#t~mem65#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1))));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 3017#L742-70 goto; 3018#L742-118 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2909#L742-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 2838#L742-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 2839#L742-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 2893#L742-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 2895#L742-117 goto; 2842#L742-119 goto; 2843#L742-121 goto; 2929#L742-123 goto; 2878#L735-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2879#L735-4 [2022-02-21 04:44:21,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:21,118 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-02-21 04:44:21,118 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:21,118 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436240613] [2022-02-21 04:44:21,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:21,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:21,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:21,133 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:44:21,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:44:21,149 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:44:21,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:44:21,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2022-02-21 04:44:21,150 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:44:21,150 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236926480] [2022-02-21 04:44:21,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:21,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:44:21,246 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:44:21,247 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1815193900] [2022-02-21 04:44:21,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:44:21,247 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:44:21,247 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:44:21,248 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:44:21,261 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process