./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i --full-output -ea --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ff5be3465740cb655882704e7eef418c95d0bbd56a2060e741c7d3e996e58af7 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-21 04:46:59,812 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-21 04:46:59,813 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-21 04:46:59,865 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-21 04:46:59,865 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-21 04:46:59,870 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-21 04:46:59,872 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-21 04:46:59,876 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-21 04:46:59,878 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-21 04:46:59,885 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-21 04:46:59,886 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-21 04:46:59,888 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-21 04:46:59,888 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-21 04:46:59,891 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-21 04:46:59,892 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-21 04:46:59,895 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-21 04:46:59,896 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-21 04:46:59,897 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-21 04:46:59,899 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-21 04:46:59,902 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-21 04:46:59,905 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-21 04:46:59,906 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-21 04:46:59,908 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-21 04:46:59,909 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-21 04:46:59,913 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-21 04:46:59,913 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-21 04:46:59,913 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-21 04:46:59,915 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-21 04:46:59,916 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-21 04:46:59,916 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-21 04:46:59,917 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-21 04:46:59,918 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-21 04:46:59,919 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-21 04:46:59,920 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-21 04:46:59,921 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-21 04:46:59,922 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-21 04:46:59,922 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-21 04:46:59,922 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-21 04:46:59,923 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-21 04:46:59,924 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-21 04:46:59,924 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-21 04:46:59,926 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-02-21 04:46:59,963 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-21 04:46:59,963 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-21 04:46:59,964 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-21 04:46:59,964 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-21 04:46:59,965 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-21 04:46:59,965 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-21 04:46:59,965 INFO L138 SettingsManager]: * Use SBE=true [2022-02-21 04:46:59,966 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-02-21 04:46:59,966 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-02-21 04:46:59,966 INFO L138 SettingsManager]: * Use old map elimination=false [2022-02-21 04:46:59,967 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-02-21 04:46:59,967 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-02-21 04:46:59,967 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-02-21 04:46:59,967 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-21 04:46:59,968 INFO L138 SettingsManager]: * sizeof long=4 [2022-02-21 04:46:59,968 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-02-21 04:46:59,968 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-21 04:46:59,968 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-02-21 04:46:59,968 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-21 04:46:59,968 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-02-21 04:46:59,969 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-02-21 04:46:59,969 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-02-21 04:46:59,969 INFO L138 SettingsManager]: * sizeof long double=12 [2022-02-21 04:46:59,969 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-21 04:46:59,969 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-02-21 04:46:59,969 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-21 04:46:59,970 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-02-21 04:46:59,970 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-21 04:46:59,970 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-21 04:46:59,970 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-21 04:46:59,970 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-21 04:46:59,971 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-02-21 04:46:59,972 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ff5be3465740cb655882704e7eef418c95d0bbd56a2060e741c7d3e996e58af7 [2022-02-21 04:47:00,193 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-21 04:47:00,206 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-21 04:47:00,208 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-21 04:47:00,209 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-21 04:47:00,223 INFO L275 PluginConnector]: CDTParser initialized [2022-02-21 04:47:00,225 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i [2022-02-21 04:47:00,288 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f3faead0b/ad08bca4e6964a7db90a3dfb26009700/FLAG924644e1b [2022-02-21 04:47:00,765 INFO L306 CDTParser]: Found 1 translation units. [2022-02-21 04:47:00,766 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i [2022-02-21 04:47:00,792 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f3faead0b/ad08bca4e6964a7db90a3dfb26009700/FLAG924644e1b [2022-02-21 04:47:01,087 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f3faead0b/ad08bca4e6964a7db90a3dfb26009700 [2022-02-21 04:47:01,089 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-21 04:47:01,090 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-21 04:47:01,091 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-21 04:47:01,091 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-21 04:47:01,093 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-21 04:47:01,094 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:47:01" (1/1) ... [2022-02-21 04:47:01,095 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1f81cf12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:01, skipping insertion in model container [2022-02-21 04:47:01,095 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.02 04:47:01" (1/1) ... [2022-02-21 04:47:01,099 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-21 04:47:01,144 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-21 04:47:01,620 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[44118,44131] [2022-02-21 04:47:01,632 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[44660,44673] [2022-02-21 04:47:01,740 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[56247,56260] [2022-02-21 04:47:01,741 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[56368,56381] [2022-02-21 04:47:01,749 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:47:01,762 INFO L203 MainTranslator]: Completed pre-run [2022-02-21 04:47:01,834 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[44118,44131] [2022-02-21 04:47:01,846 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[44660,44673] [2022-02-21 04:47:02,000 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[56247,56260] [2022-02-21 04:47:02,003 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test6-1.i[56368,56381] [2022-02-21 04:47:02,020 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-21 04:47:02,122 INFO L208 MainTranslator]: Completed translation [2022-02-21 04:47:02,122 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02 WrapperNode [2022-02-21 04:47:02,123 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-21 04:47:02,124 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-21 04:47:02,124 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-21 04:47:02,124 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-21 04:47:02,130 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,170 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,249 INFO L137 Inliner]: procedures = 282, calls = 294, calls flagged for inlining = 19, calls inlined = 21, statements flattened = 1143 [2022-02-21 04:47:02,250 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-21 04:47:02,251 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-21 04:47:02,251 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-21 04:47:02,252 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-21 04:47:02,258 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,269 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,278 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,279 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,370 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,418 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,424 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,436 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-21 04:47:02,456 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-21 04:47:02,456 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-21 04:47:02,457 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-21 04:47:02,457 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (1/1) ... [2022-02-21 04:47:02,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-02-21 04:47:02,485 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:47:02,496 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-02-21 04:47:02,516 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-02-21 04:47:02,553 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-21 04:47:02,553 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-21 04:47:02,553 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-21 04:47:02,554 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-21 04:47:02,555 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-21 04:47:02,555 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-21 04:47:02,796 INFO L234 CfgBuilder]: Building ICFG [2022-02-21 04:47:02,805 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-21 04:47:02,808 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-02-21 04:47:06,015 INFO L275 CfgBuilder]: Performing block encoding [2022-02-21 04:47:06,037 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-21 04:47:06,037 INFO L299 CfgBuilder]: Removed 63 assume(true) statements. [2022-02-21 04:47:06,039 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:47:06 BoogieIcfgContainer [2022-02-21 04:47:06,039 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-21 04:47:06,040 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-02-21 04:47:06,040 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-02-21 04:47:06,043 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-02-21 04:47:06,065 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:47:06,066 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.02 04:47:01" (1/3) ... [2022-02-21 04:47:06,068 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6a101de5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:47:06, skipping insertion in model container [2022-02-21 04:47:06,068 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:47:06,068 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.02 04:47:02" (2/3) ... [2022-02-21 04:47:06,069 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6a101de5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.02 04:47:06, skipping insertion in model container [2022-02-21 04:47:06,069 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-02-21 04:47:06,069 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.02 04:47:06" (3/3) ... [2022-02-21 04:47:06,071 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test6-1.i [2022-02-21 04:47:06,153 INFO L359 BuchiCegarLoop]: Interprodecural is true [2022-02-21 04:47:06,153 INFO L360 BuchiCegarLoop]: Hoare is false [2022-02-21 04:47:06,153 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-02-21 04:47:06,154 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-02-21 04:47:06,154 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-02-21 04:47:06,154 INFO L364 BuchiCegarLoop]: Difference is false [2022-02-21 04:47:06,154 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-02-21 04:47:06,154 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2022-02-21 04:47:06,218 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 222 states, 217 states have (on average 1.6267281105990783) internal successors, (353), 217 states have internal predecessors, (353), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:06,332 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 204 [2022-02-21 04:47:06,332 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:47:06,359 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:47:06,365 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:47:06,365 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:47:06,366 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2022-02-21 04:47:06,373 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 222 states, 217 states have (on average 1.6267281105990783) internal successors, (353), 217 states have internal predecessors, (353), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:06,423 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 204 [2022-02-21 04:47:06,423 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:47:06,423 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:47:06,424 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:47:06,424 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:47:06,430 INFO L791 eck$LassoCheckResult]: Stem: 216#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call #Ultimate.allocInit(40, 3);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 140#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~switch59#1, main_#t~mem60#1, main_#t~mem61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret71#1.base, main_#t~ret71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~ret79#1.base, main_#t~ret79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~post102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem107#1, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~short110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~ret113#1.base, main_#t~ret113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~ite127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~pre141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem150#1, main_#t~mem148#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem149#1, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~ite174#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem182#1, main_#t~mem181#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem186#1, main_#t~mem185#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem190#1, main_#t~mem189#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~switch193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1, main_#t~mem216#1, main_#t~short217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~ret219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~short226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem251#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem178#1, main_#t~post179#1, main_#t~mem180#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10#L989-4true [2022-02-21 04:47:06,434 INFO L793 eck$LassoCheckResult]: Loop: 10#L989-4true call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5#L989-1true assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 88#L979true main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 11#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 82#L991-2true call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 205#L996-118true assume !true; 202#L989-3true call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 10#L989-4true [2022-02-21 04:47:06,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:06,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-02-21 04:47:06,469 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:06,469 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1567911379] [2022-02-21 04:47:06,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:06,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:06,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:06,711 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:47:06,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:06,821 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:47:06,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:06,838 INFO L85 PathProgramCache]: Analyzing trace with hash -1530816074, now seen corresponding path program 1 times [2022-02-21 04:47:06,838 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:06,839 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394304392] [2022-02-21 04:47:06,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:06,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:06,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:47:06,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {228#true} call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {228#true} is VALID [2022-02-21 04:47:06,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {228#true} assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; {228#true} is VALID [2022-02-21 04:47:06,977 INFO L290 TraceCheckUtils]: 2: Hoare triple {228#true} main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; {228#true} is VALID [2022-02-21 04:47:06,978 INFO L290 TraceCheckUtils]: 3: Hoare triple {228#true} assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; {229#false} is VALID [2022-02-21 04:47:06,979 INFO L290 TraceCheckUtils]: 4: Hoare triple {229#false} call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; {229#false} is VALID [2022-02-21 04:47:06,979 INFO L290 TraceCheckUtils]: 5: Hoare triple {229#false} assume !true; {229#false} is VALID [2022-02-21 04:47:06,979 INFO L290 TraceCheckUtils]: 6: Hoare triple {229#false} call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; {229#false} is VALID [2022-02-21 04:47:06,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:47:06,981 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:47:06,982 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1394304392] [2022-02-21 04:47:06,982 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1394304392] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:47:06,982 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:47:06,983 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-02-21 04:47:06,983 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629128080] [2022-02-21 04:47:06,984 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:47:06,988 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:47:06,989 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:47:07,013 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-02-21 04:47:07,013 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-02-21 04:47:07,016 INFO L87 Difference]: Start difference. First operand has 222 states, 217 states have (on average 1.6267281105990783) internal successors, (353), 217 states have internal predecessors, (353), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:47:07,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:07,297 INFO L93 Difference]: Finished difference Result 218 states and 276 transitions. [2022-02-21 04:47:07,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-02-21 04:47:07,298 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:47:07,313 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7 edges. 7 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:47:07,321 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 218 states and 276 transitions. [2022-02-21 04:47:07,332 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 199 [2022-02-21 04:47:07,346 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 218 states to 206 states and 264 transitions. [2022-02-21 04:47:07,347 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 206 [2022-02-21 04:47:07,347 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 206 [2022-02-21 04:47:07,348 INFO L73 IsDeterministic]: Start isDeterministic. Operand 206 states and 264 transitions. [2022-02-21 04:47:07,349 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:47:07,349 INFO L681 BuchiCegarLoop]: Abstraction has 206 states and 264 transitions. [2022-02-21 04:47:07,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states and 264 transitions. [2022-02-21 04:47:07,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2022-02-21 04:47:07,395 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:47:07,402 INFO L82 GeneralOperation]: Start isEquivalent. First operand 206 states and 264 transitions. Second operand has 206 states, 202 states have (on average 1.2772277227722773) internal successors, (258), 201 states have internal predecessors, (258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:07,404 INFO L74 IsIncluded]: Start isIncluded. First operand 206 states and 264 transitions. Second operand has 206 states, 202 states have (on average 1.2772277227722773) internal successors, (258), 201 states have internal predecessors, (258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:07,408 INFO L87 Difference]: Start difference. First operand 206 states and 264 transitions. Second operand has 206 states, 202 states have (on average 1.2772277227722773) internal successors, (258), 201 states have internal predecessors, (258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:07,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:07,426 INFO L93 Difference]: Finished difference Result 206 states and 264 transitions. [2022-02-21 04:47:07,427 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 264 transitions. [2022-02-21 04:47:07,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:47:07,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:47:07,431 INFO L74 IsIncluded]: Start isIncluded. First operand has 206 states, 202 states have (on average 1.2772277227722773) internal successors, (258), 201 states have internal predecessors, (258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 206 states and 264 transitions. [2022-02-21 04:47:07,431 INFO L87 Difference]: Start difference. First operand has 206 states, 202 states have (on average 1.2772277227722773) internal successors, (258), 201 states have internal predecessors, (258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 206 states and 264 transitions. [2022-02-21 04:47:07,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:07,451 INFO L93 Difference]: Finished difference Result 206 states and 264 transitions. [2022-02-21 04:47:07,451 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 264 transitions. [2022-02-21 04:47:07,456 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:47:07,459 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:47:07,459 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:47:07,459 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:47:07,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 202 states have (on average 1.2772277227722773) internal successors, (258), 201 states have internal predecessors, (258), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:07,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 264 transitions. [2022-02-21 04:47:07,472 INFO L704 BuchiCegarLoop]: Abstraction has 206 states and 264 transitions. [2022-02-21 04:47:07,472 INFO L587 BuchiCegarLoop]: Abstraction has 206 states and 264 transitions. [2022-02-21 04:47:07,472 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2022-02-21 04:47:07,472 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 206 states and 264 transitions. [2022-02-21 04:47:07,473 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 199 [2022-02-21 04:47:07,474 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:47:07,474 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:47:07,476 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:47:07,476 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:47:07,476 INFO L791 eck$LassoCheckResult]: Stem: 653#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call #Ultimate.allocInit(40, 3);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 631#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~switch59#1, main_#t~mem60#1, main_#t~mem61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret71#1.base, main_#t~ret71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~ret79#1.base, main_#t~ret79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~post102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem107#1, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~short110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~ret113#1.base, main_#t~ret113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~ite127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~pre141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem150#1, main_#t~mem148#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem149#1, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~ite174#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem182#1, main_#t~mem181#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem186#1, main_#t~mem185#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem190#1, main_#t~mem189#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~switch193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1, main_#t~mem216#1, main_#t~short217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~ret219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~short226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem251#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem178#1, main_#t~post179#1, main_#t~mem180#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 461#L989-4 [2022-02-21 04:47:07,483 INFO L793 eck$LassoCheckResult]: Loop: 461#L989-4 call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 452#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 454#L979 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 462#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 463#L991-2 call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 577#L996-118 havoc main_~_ha_hashv~0#1; 621#L996-49 goto; 622#L996-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 456#L996-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 480#L996-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch59#1 := 11 == main_~_hj_k~0#1; 648#L996-10 assume main_#t~switch59#1;call main_#t~mem60#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem60#1 % 256);havoc main_#t~mem60#1; 652#L996-12 main_#t~switch59#1 := main_#t~switch59#1 || 10 == main_~_hj_k~0#1; 552#L996-13 assume main_#t~switch59#1;call main_#t~mem61#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem61#1 % 256);havoc main_#t~mem61#1; 553#L996-15 main_#t~switch59#1 := main_#t~switch59#1 || 9 == main_~_hj_k~0#1; 649#L996-16 assume main_#t~switch59#1;call main_#t~mem62#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem62#1 % 256);havoc main_#t~mem62#1; 650#L996-18 main_#t~switch59#1 := main_#t~switch59#1 || 8 == main_~_hj_k~0#1; 641#L996-19 assume main_#t~switch59#1;call main_#t~mem63#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem63#1 % 256);havoc main_#t~mem63#1; 637#L996-21 main_#t~switch59#1 := main_#t~switch59#1 || 7 == main_~_hj_k~0#1; 618#L996-22 assume main_#t~switch59#1;call main_#t~mem64#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem64#1 % 256);havoc main_#t~mem64#1; 619#L996-24 main_#t~switch59#1 := main_#t~switch59#1 || 6 == main_~_hj_k~0#1; 634#L996-25 assume main_#t~switch59#1;call main_#t~mem65#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem65#1 % 256);havoc main_#t~mem65#1; 612#L996-27 main_#t~switch59#1 := main_#t~switch59#1 || 5 == main_~_hj_k~0#1; 457#L996-28 assume !main_#t~switch59#1; 458#L996-30 main_#t~switch59#1 := main_#t~switch59#1 || 4 == main_~_hj_k~0#1; 585#L996-31 assume main_#t~switch59#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; 603#L996-33 main_#t~switch59#1 := main_#t~switch59#1 || 3 == main_~_hj_k~0#1; 572#L996-34 assume main_#t~switch59#1;call main_#t~mem68#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem68#1 % 256);havoc main_#t~mem68#1; 573#L996-36 main_#t~switch59#1 := main_#t~switch59#1 || 2 == main_~_hj_k~0#1; 535#L996-37 assume main_#t~switch59#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; 536#L996-39 main_#t~switch59#1 := main_#t~switch59#1 || 1 == main_~_hj_k~0#1; 556#L996-40 assume main_#t~switch59#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem70#1 % 256;havoc main_#t~mem70#1; 586#L996-42 havoc main_#t~switch59#1; 507#L996-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 508#L996-44 goto; 598#L996-46 goto; 613#L996-48 goto; 639#L996-116 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 640#L996-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem86#1.base, main_#t~mem86#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 562#L996-63 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_#t~mem87#1.base, 16 + main_#t~mem87#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_#t~mem89#1.base, 20 + main_#t~mem89#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset - main_#t~mem90#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_#t~mem91#1.base, 16 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem92#1.base, 8 + main_#t~mem92#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset; 563#L996-62 goto; 510#L996-114 havoc main_~_ha_bkt~0#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem95#1 := read~int(main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);main_#t~post96#1 := main_#t~mem95#1;call write~int(1 + main_#t~post96#1, main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~post96#1; 551#L996-67 call main_#t~mem97#1.base, main_#t~mem97#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem98#1 := read~int(main_#t~mem97#1.base, 4 + main_#t~mem97#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem98#1 - 1 then 0 else (if 1 == main_#t~mem98#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem98#1 - 1 || 0 == main_#t~mem98#1 - 1 then main_#t~mem98#1 - 1 else (if main_#t~mem98#1 - 1 >= 0 then (main_#t~mem98#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))));havoc main_#t~mem97#1.base, main_#t~mem97#1.offset;havoc main_#t~mem98#1; 609#L996-66 goto; 645#L996-112 call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1.base, main_#t~mem100#1.offset := read~$Pointer$(main_#t~mem99#1.base, main_#t~mem99#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem100#1.base, main_#t~mem100#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1.base, main_#t~mem100#1.offset;call main_#t~mem101#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post102#1 := main_#t~mem101#1;call write~int(1 + main_#t~post102#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem101#1;havoc main_#t~post102#1;call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem103#1.base, main_#t~mem103#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 635#L996-69 assume main_#t~mem104#1.base != 0 || main_#t~mem104#1.offset != 0;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem105#1.base, 12 + main_#t~mem105#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset; 481#L996-71 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem107#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem106#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short110#1 := main_#t~mem107#1 % 4294967296 >= 10 * (1 + main_#t~mem106#1) % 4294967296; 482#L996-72 assume main_#t~short110#1;call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_#t~mem108#1.base, 36 + main_#t~mem108#1.offset, 4);main_#t~short110#1 := 0 == main_#t~mem109#1 % 4294967296; 540#L996-74 assume !main_#t~short110#1;havoc main_#t~mem107#1;havoc main_#t~mem106#1;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;havoc main_#t~mem109#1;havoc main_#t~short110#1; 500#L996-111 goto; 495#L996-113 goto; 496#L996-115 goto; 606#L996-117 goto; 607#L989-3 call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 461#L989-4 [2022-02-21 04:47:07,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:07,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-02-21 04:47:07,486 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:07,486 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134437520] [2022-02-21 04:47:07,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:07,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:07,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:07,526 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:47:07,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:07,544 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:47:07,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:07,545 INFO L85 PathProgramCache]: Analyzing trace with hash 1942584983, now seen corresponding path program 1 times [2022-02-21 04:47:07,545 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:07,545 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209997492] [2022-02-21 04:47:07,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:07,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:07,726 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:47:07,727 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1272659793] [2022-02-21 04:47:07,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:07,727 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:47:07,728 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:47:07,729 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:47:07,730 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-21 04:47:08,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:47:08,223 INFO L263 TraceCheckSpWp]: Trace formula consists of 1858 conjuncts, 3 conjunts are in the unsatisfiable core [2022-02-21 04:47:08,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:47:08,240 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:47:08,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {1071#true} call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {1071#true} is VALID [2022-02-21 04:47:08,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {1071#true} assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; {1071#true} is VALID [2022-02-21 04:47:08,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {1071#true} main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; {1071#true} is VALID [2022-02-21 04:47:08,383 INFO L290 TraceCheckUtils]: 3: Hoare triple {1071#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {1071#true} is VALID [2022-02-21 04:47:08,383 INFO L290 TraceCheckUtils]: 4: Hoare triple {1071#true} call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; {1071#true} is VALID [2022-02-21 04:47:08,383 INFO L290 TraceCheckUtils]: 5: Hoare triple {1071#true} havoc main_~_ha_hashv~0#1; {1071#true} is VALID [2022-02-21 04:47:08,383 INFO L290 TraceCheckUtils]: 6: Hoare triple {1071#true} goto; {1071#true} is VALID [2022-02-21 04:47:08,383 INFO L290 TraceCheckUtils]: 7: Hoare triple {1071#true} havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; {1071#true} is VALID [2022-02-21 04:47:08,384 INFO L290 TraceCheckUtils]: 8: Hoare triple {1071#true} assume !(main_~_hj_k~0#1 % 4294967296 >= 12); {1071#true} is VALID [2022-02-21 04:47:08,384 INFO L290 TraceCheckUtils]: 9: Hoare triple {1071#true} main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch59#1 := 11 == main_~_hj_k~0#1; {1071#true} is VALID [2022-02-21 04:47:08,384 INFO L290 TraceCheckUtils]: 10: Hoare triple {1071#true} assume main_#t~switch59#1;call main_#t~mem60#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem60#1 % 256);havoc main_#t~mem60#1; {1071#true} is VALID [2022-02-21 04:47:08,384 INFO L290 TraceCheckUtils]: 11: Hoare triple {1071#true} main_#t~switch59#1 := main_#t~switch59#1 || 10 == main_~_hj_k~0#1; {1071#true} is VALID [2022-02-21 04:47:08,384 INFO L290 TraceCheckUtils]: 12: Hoare triple {1071#true} assume main_#t~switch59#1;call main_#t~mem61#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem61#1 % 256);havoc main_#t~mem61#1; {1071#true} is VALID [2022-02-21 04:47:08,385 INFO L290 TraceCheckUtils]: 13: Hoare triple {1071#true} main_#t~switch59#1 := main_#t~switch59#1 || 9 == main_~_hj_k~0#1; {1071#true} is VALID [2022-02-21 04:47:08,385 INFO L290 TraceCheckUtils]: 14: Hoare triple {1071#true} assume main_#t~switch59#1;call main_#t~mem62#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem62#1 % 256);havoc main_#t~mem62#1; {1071#true} is VALID [2022-02-21 04:47:08,385 INFO L290 TraceCheckUtils]: 15: Hoare triple {1071#true} main_#t~switch59#1 := main_#t~switch59#1 || 8 == main_~_hj_k~0#1; {1071#true} is VALID [2022-02-21 04:47:08,385 INFO L290 TraceCheckUtils]: 16: Hoare triple {1071#true} assume main_#t~switch59#1;call main_#t~mem63#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem63#1 % 256);havoc main_#t~mem63#1; {1071#true} is VALID [2022-02-21 04:47:08,385 INFO L290 TraceCheckUtils]: 17: Hoare triple {1071#true} main_#t~switch59#1 := main_#t~switch59#1 || 7 == main_~_hj_k~0#1; {1071#true} is VALID [2022-02-21 04:47:08,386 INFO L290 TraceCheckUtils]: 18: Hoare triple {1071#true} assume main_#t~switch59#1;call main_#t~mem64#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem64#1 % 256);havoc main_#t~mem64#1; {1071#true} is VALID [2022-02-21 04:47:08,386 INFO L290 TraceCheckUtils]: 19: Hoare triple {1071#true} main_#t~switch59#1 := main_#t~switch59#1 || 6 == main_~_hj_k~0#1; {1071#true} is VALID [2022-02-21 04:47:08,386 INFO L290 TraceCheckUtils]: 20: Hoare triple {1071#true} assume main_#t~switch59#1;call main_#t~mem65#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem65#1 % 256);havoc main_#t~mem65#1; {1136#|ULTIMATE.start_main_#t~switch59#1|} is VALID [2022-02-21 04:47:08,387 INFO L290 TraceCheckUtils]: 21: Hoare triple {1136#|ULTIMATE.start_main_#t~switch59#1|} main_#t~switch59#1 := main_#t~switch59#1 || 5 == main_~_hj_k~0#1; {1136#|ULTIMATE.start_main_#t~switch59#1|} is VALID [2022-02-21 04:47:08,387 INFO L290 TraceCheckUtils]: 22: Hoare triple {1136#|ULTIMATE.start_main_#t~switch59#1|} assume !main_#t~switch59#1; {1072#false} is VALID [2022-02-21 04:47:08,388 INFO L290 TraceCheckUtils]: 23: Hoare triple {1072#false} main_#t~switch59#1 := main_#t~switch59#1 || 4 == main_~_hj_k~0#1; {1072#false} is VALID [2022-02-21 04:47:08,388 INFO L290 TraceCheckUtils]: 24: Hoare triple {1072#false} assume main_#t~switch59#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; {1072#false} is VALID [2022-02-21 04:47:08,388 INFO L290 TraceCheckUtils]: 25: Hoare triple {1072#false} main_#t~switch59#1 := main_#t~switch59#1 || 3 == main_~_hj_k~0#1; {1072#false} is VALID [2022-02-21 04:47:08,388 INFO L290 TraceCheckUtils]: 26: Hoare triple {1072#false} assume main_#t~switch59#1;call main_#t~mem68#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem68#1 % 256);havoc main_#t~mem68#1; {1072#false} is VALID [2022-02-21 04:47:08,388 INFO L290 TraceCheckUtils]: 27: Hoare triple {1072#false} main_#t~switch59#1 := main_#t~switch59#1 || 2 == main_~_hj_k~0#1; {1072#false} is VALID [2022-02-21 04:47:08,389 INFO L290 TraceCheckUtils]: 28: Hoare triple {1072#false} assume main_#t~switch59#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; {1072#false} is VALID [2022-02-21 04:47:08,389 INFO L290 TraceCheckUtils]: 29: Hoare triple {1072#false} main_#t~switch59#1 := main_#t~switch59#1 || 1 == main_~_hj_k~0#1; {1072#false} is VALID [2022-02-21 04:47:08,389 INFO L290 TraceCheckUtils]: 30: Hoare triple {1072#false} assume main_#t~switch59#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem70#1 % 256;havoc main_#t~mem70#1; {1072#false} is VALID [2022-02-21 04:47:08,389 INFO L290 TraceCheckUtils]: 31: Hoare triple {1072#false} havoc main_#t~switch59#1; {1072#false} is VALID [2022-02-21 04:47:08,389 INFO L290 TraceCheckUtils]: 32: Hoare triple {1072#false} main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); {1072#false} is VALID [2022-02-21 04:47:08,390 INFO L290 TraceCheckUtils]: 33: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,390 INFO L290 TraceCheckUtils]: 34: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,390 INFO L290 TraceCheckUtils]: 35: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,390 INFO L290 TraceCheckUtils]: 36: Hoare triple {1072#false} call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); {1072#false} is VALID [2022-02-21 04:47:08,390 INFO L290 TraceCheckUtils]: 37: Hoare triple {1072#false} assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem86#1.base, main_#t~mem86#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; {1072#false} is VALID [2022-02-21 04:47:08,391 INFO L290 TraceCheckUtils]: 38: Hoare triple {1072#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_#t~mem87#1.base, 16 + main_#t~mem87#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_#t~mem89#1.base, 20 + main_#t~mem89#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset - main_#t~mem90#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_#t~mem91#1.base, 16 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem92#1.base, 8 + main_#t~mem92#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset; {1072#false} is VALID [2022-02-21 04:47:08,391 INFO L290 TraceCheckUtils]: 39: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,391 INFO L290 TraceCheckUtils]: 40: Hoare triple {1072#false} havoc main_~_ha_bkt~0#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem95#1 := read~int(main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);main_#t~post96#1 := main_#t~mem95#1;call write~int(1 + main_#t~post96#1, main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~post96#1; {1072#false} is VALID [2022-02-21 04:47:08,391 INFO L290 TraceCheckUtils]: 41: Hoare triple {1072#false} call main_#t~mem97#1.base, main_#t~mem97#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem98#1 := read~int(main_#t~mem97#1.base, 4 + main_#t~mem97#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem98#1 - 1 then 0 else (if 1 == main_#t~mem98#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem98#1 - 1 || 0 == main_#t~mem98#1 - 1 then main_#t~mem98#1 - 1 else (if main_#t~mem98#1 - 1 >= 0 then (main_#t~mem98#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))));havoc main_#t~mem97#1.base, main_#t~mem97#1.offset;havoc main_#t~mem98#1; {1072#false} is VALID [2022-02-21 04:47:08,392 INFO L290 TraceCheckUtils]: 42: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,392 INFO L290 TraceCheckUtils]: 43: Hoare triple {1072#false} call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1.base, main_#t~mem100#1.offset := read~$Pointer$(main_#t~mem99#1.base, main_#t~mem99#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem100#1.base, main_#t~mem100#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1.base, main_#t~mem100#1.offset;call main_#t~mem101#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post102#1 := main_#t~mem101#1;call write~int(1 + main_#t~post102#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem101#1;havoc main_#t~post102#1;call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem103#1.base, main_#t~mem103#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); {1072#false} is VALID [2022-02-21 04:47:08,392 INFO L290 TraceCheckUtils]: 44: Hoare triple {1072#false} assume main_#t~mem104#1.base != 0 || main_#t~mem104#1.offset != 0;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem105#1.base, 12 + main_#t~mem105#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset; {1072#false} is VALID [2022-02-21 04:47:08,392 INFO L290 TraceCheckUtils]: 45: Hoare triple {1072#false} call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem107#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem106#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short110#1 := main_#t~mem107#1 % 4294967296 >= 10 * (1 + main_#t~mem106#1) % 4294967296; {1072#false} is VALID [2022-02-21 04:47:08,392 INFO L290 TraceCheckUtils]: 46: Hoare triple {1072#false} assume main_#t~short110#1;call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_#t~mem108#1.base, 36 + main_#t~mem108#1.offset, 4);main_#t~short110#1 := 0 == main_#t~mem109#1 % 4294967296; {1072#false} is VALID [2022-02-21 04:47:08,393 INFO L290 TraceCheckUtils]: 47: Hoare triple {1072#false} assume !main_#t~short110#1;havoc main_#t~mem107#1;havoc main_#t~mem106#1;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;havoc main_#t~mem109#1;havoc main_#t~short110#1; {1072#false} is VALID [2022-02-21 04:47:08,393 INFO L290 TraceCheckUtils]: 48: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,393 INFO L290 TraceCheckUtils]: 49: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,393 INFO L290 TraceCheckUtils]: 50: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,393 INFO L290 TraceCheckUtils]: 51: Hoare triple {1072#false} goto; {1072#false} is VALID [2022-02-21 04:47:08,394 INFO L290 TraceCheckUtils]: 52: Hoare triple {1072#false} call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; {1072#false} is VALID [2022-02-21 04:47:08,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:47:08,394 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:47:08,394 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:47:08,395 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209997492] [2022-02-21 04:47:08,395 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:47:08,395 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1272659793] [2022-02-21 04:47:08,395 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1272659793] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:47:08,395 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:47:08,395 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-21 04:47:08,396 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8518130] [2022-02-21 04:47:08,396 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:47:08,396 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:47:08,396 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:47:08,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-21 04:47:08,397 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-21 04:47:08,397 INFO L87 Difference]: Start difference. First operand 206 states and 264 transitions. cyclomatic complexity: 61 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:47:08,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:08,940 INFO L93 Difference]: Finished difference Result 227 states and 285 transitions. [2022-02-21 04:47:08,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-21 04:47:08,941 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:47:08,985 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:47:08,986 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 227 states and 285 transitions. [2022-02-21 04:47:08,991 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 220 [2022-02-21 04:47:08,995 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 227 states to 227 states and 285 transitions. [2022-02-21 04:47:08,995 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 227 [2022-02-21 04:47:08,996 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 227 [2022-02-21 04:47:08,996 INFO L73 IsDeterministic]: Start isDeterministic. Operand 227 states and 285 transitions. [2022-02-21 04:47:08,996 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:47:08,996 INFO L681 BuchiCegarLoop]: Abstraction has 227 states and 285 transitions. [2022-02-21 04:47:08,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states and 285 transitions. [2022-02-21 04:47:09,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 226. [2022-02-21 04:47:09,001 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:47:09,001 INFO L82 GeneralOperation]: Start isEquivalent. First operand 227 states and 285 transitions. Second operand has 226 states, 222 states have (on average 1.2522522522522523) internal successors, (278), 221 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:09,002 INFO L74 IsIncluded]: Start isIncluded. First operand 227 states and 285 transitions. Second operand has 226 states, 222 states have (on average 1.2522522522522523) internal successors, (278), 221 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:09,002 INFO L87 Difference]: Start difference. First operand 227 states and 285 transitions. Second operand has 226 states, 222 states have (on average 1.2522522522522523) internal successors, (278), 221 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:09,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:09,007 INFO L93 Difference]: Finished difference Result 227 states and 285 transitions. [2022-02-21 04:47:09,007 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 285 transitions. [2022-02-21 04:47:09,007 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:47:09,008 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:47:09,008 INFO L74 IsIncluded]: Start isIncluded. First operand has 226 states, 222 states have (on average 1.2522522522522523) internal successors, (278), 221 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 227 states and 285 transitions. [2022-02-21 04:47:09,009 INFO L87 Difference]: Start difference. First operand has 226 states, 222 states have (on average 1.2522522522522523) internal successors, (278), 221 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 227 states and 285 transitions. [2022-02-21 04:47:09,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:09,013 INFO L93 Difference]: Finished difference Result 227 states and 285 transitions. [2022-02-21 04:47:09,013 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 285 transitions. [2022-02-21 04:47:09,014 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:47:09,014 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:47:09,014 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:47:09,014 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:47:09,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 226 states, 222 states have (on average 1.2522522522522523) internal successors, (278), 221 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:09,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 284 transitions. [2022-02-21 04:47:09,018 INFO L704 BuchiCegarLoop]: Abstraction has 226 states and 284 transitions. [2022-02-21 04:47:09,018 INFO L587 BuchiCegarLoop]: Abstraction has 226 states and 284 transitions. [2022-02-21 04:47:09,019 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2022-02-21 04:47:09,019 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 226 states and 284 transitions. [2022-02-21 04:47:09,019 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 219 [2022-02-21 04:47:09,019 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:47:09,020 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:47:09,020 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:47:09,020 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:47:09,020 INFO L791 eck$LassoCheckResult]: Stem: 1665#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call #Ultimate.allocInit(40, 3);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1641#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~switch59#1, main_#t~mem60#1, main_#t~mem61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret71#1.base, main_#t~ret71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~ret79#1.base, main_#t~ret79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~post102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem107#1, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~short110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~ret113#1.base, main_#t~ret113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~ite127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~pre141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem150#1, main_#t~mem148#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem149#1, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~ite174#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem182#1, main_#t~mem181#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem186#1, main_#t~mem185#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem190#1, main_#t~mem189#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~switch193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1, main_#t~mem216#1, main_#t~short217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~ret219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~short226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem251#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem178#1, main_#t~post179#1, main_#t~mem180#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1470#L989-4 [2022-02-21 04:47:09,021 INFO L793 eck$LassoCheckResult]: Loop: 1470#L989-4 call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1461#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 1463#L979 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 1471#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1472#L991-2 call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 1587#L996-118 havoc main_~_ha_hashv~0#1; 1631#L996-49 goto; 1632#L996-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1465#L996-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1489#L996-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch59#1 := 11 == main_~_hj_k~0#1; 1659#L996-10 assume !main_#t~switch59#1; 1664#L996-12 main_#t~switch59#1 := main_#t~switch59#1 || 10 == main_~_hj_k~0#1; 1679#L996-13 assume main_#t~switch59#1;call main_#t~mem61#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem61#1 % 256);havoc main_#t~mem61#1; 1562#L996-15 main_#t~switch59#1 := main_#t~switch59#1 || 9 == main_~_hj_k~0#1; 1660#L996-16 assume main_#t~switch59#1;call main_#t~mem62#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem62#1 % 256);havoc main_#t~mem62#1; 1661#L996-18 main_#t~switch59#1 := main_#t~switch59#1 || 8 == main_~_hj_k~0#1; 1651#L996-19 assume main_#t~switch59#1;call main_#t~mem63#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem63#1 % 256);havoc main_#t~mem63#1; 1647#L996-21 main_#t~switch59#1 := main_#t~switch59#1 || 7 == main_~_hj_k~0#1; 1628#L996-22 assume main_#t~switch59#1;call main_#t~mem64#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem64#1 % 256);havoc main_#t~mem64#1; 1629#L996-24 main_#t~switch59#1 := main_#t~switch59#1 || 6 == main_~_hj_k~0#1; 1644#L996-25 assume main_#t~switch59#1;call main_#t~mem65#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem65#1 % 256);havoc main_#t~mem65#1; 1622#L996-27 main_#t~switch59#1 := main_#t~switch59#1 || 5 == main_~_hj_k~0#1; 1466#L996-28 assume main_#t~switch59#1;call main_#t~mem66#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem66#1 % 256;havoc main_#t~mem66#1; 1467#L996-30 main_#t~switch59#1 := main_#t~switch59#1 || 4 == main_~_hj_k~0#1; 1595#L996-31 assume main_#t~switch59#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; 1613#L996-33 main_#t~switch59#1 := main_#t~switch59#1 || 3 == main_~_hj_k~0#1; 1582#L996-34 assume main_#t~switch59#1;call main_#t~mem68#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem68#1 % 256);havoc main_#t~mem68#1; 1583#L996-36 main_#t~switch59#1 := main_#t~switch59#1 || 2 == main_~_hj_k~0#1; 1544#L996-37 assume main_#t~switch59#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; 1545#L996-39 main_#t~switch59#1 := main_#t~switch59#1 || 1 == main_~_hj_k~0#1; 1652#L996-40 assume main_#t~switch59#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem70#1 % 256;havoc main_#t~mem70#1; 1596#L996-42 havoc main_#t~switch59#1; 1516#L996-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1517#L996-44 goto; 1608#L996-46 goto; 1623#L996-48 goto; 1649#L996-116 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1650#L996-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem86#1.base, main_#t~mem86#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 1572#L996-63 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_#t~mem87#1.base, 16 + main_#t~mem87#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_#t~mem89#1.base, 20 + main_#t~mem89#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset - main_#t~mem90#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_#t~mem91#1.base, 16 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem92#1.base, 8 + main_#t~mem92#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset; 1573#L996-62 goto; 1519#L996-114 havoc main_~_ha_bkt~0#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem95#1 := read~int(main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);main_#t~post96#1 := main_#t~mem95#1;call write~int(1 + main_#t~post96#1, main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~post96#1; 1560#L996-67 call main_#t~mem97#1.base, main_#t~mem97#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem98#1 := read~int(main_#t~mem97#1.base, 4 + main_#t~mem97#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem98#1 - 1 then 0 else (if 1 == main_#t~mem98#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem98#1 - 1 || 0 == main_#t~mem98#1 - 1 then main_#t~mem98#1 - 1 else (if main_#t~mem98#1 - 1 >= 0 then (main_#t~mem98#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))));havoc main_#t~mem97#1.base, main_#t~mem97#1.offset;havoc main_#t~mem98#1; 1619#L996-66 goto; 1656#L996-112 call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1.base, main_#t~mem100#1.offset := read~$Pointer$(main_#t~mem99#1.base, main_#t~mem99#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem100#1.base, main_#t~mem100#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1.base, main_#t~mem100#1.offset;call main_#t~mem101#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post102#1 := main_#t~mem101#1;call write~int(1 + main_#t~post102#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem101#1;havoc main_#t~post102#1;call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem103#1.base, main_#t~mem103#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1645#L996-69 assume main_#t~mem104#1.base != 0 || main_#t~mem104#1.offset != 0;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem105#1.base, 12 + main_#t~mem105#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset; 1490#L996-71 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem107#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem106#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short110#1 := main_#t~mem107#1 % 4294967296 >= 10 * (1 + main_#t~mem106#1) % 4294967296; 1491#L996-72 assume main_#t~short110#1;call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_#t~mem108#1.base, 36 + main_#t~mem108#1.offset, 4);main_#t~short110#1 := 0 == main_#t~mem109#1 % 4294967296; 1549#L996-74 assume !main_#t~short110#1;havoc main_#t~mem107#1;havoc main_#t~mem106#1;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;havoc main_#t~mem109#1;havoc main_#t~short110#1; 1509#L996-111 goto; 1504#L996-113 goto; 1505#L996-115 goto; 1616#L996-117 goto; 1617#L989-3 call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 1470#L989-4 [2022-02-21 04:47:09,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:09,021 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-02-21 04:47:09,022 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:09,022 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500159835] [2022-02-21 04:47:09,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:09,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:09,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:09,036 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:47:09,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:09,049 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:47:09,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:09,050 INFO L85 PathProgramCache]: Analyzing trace with hash 343591831, now seen corresponding path program 1 times [2022-02-21 04:47:09,050 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:09,050 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268593735] [2022-02-21 04:47:09,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:09,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:09,231 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:47:09,231 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [147326921] [2022-02-21 04:47:09,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:09,232 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:47:09,232 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:47:09,237 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:47:09,294 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-21 04:47:09,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:47:09,846 INFO L263 TraceCheckSpWp]: Trace formula consists of 1858 conjuncts, 4 conjunts are in the unsatisfiable core [2022-02-21 04:47:09,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-21 04:47:09,862 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-21 04:47:10,071 INFO L290 TraceCheckUtils]: 0: Hoare triple {2142#true} call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); {2142#true} is VALID [2022-02-21 04:47:10,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {2142#true} assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; {2142#true} is VALID [2022-02-21 04:47:10,072 INFO L290 TraceCheckUtils]: 2: Hoare triple {2142#true} main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; {2142#true} is VALID [2022-02-21 04:47:10,072 INFO L290 TraceCheckUtils]: 3: Hoare triple {2142#true} assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); {2142#true} is VALID [2022-02-21 04:47:10,072 INFO L290 TraceCheckUtils]: 4: Hoare triple {2142#true} call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; {2142#true} is VALID [2022-02-21 04:47:10,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {2142#true} havoc main_~_ha_hashv~0#1; {2142#true} is VALID [2022-02-21 04:47:10,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {2142#true} goto; {2142#true} is VALID [2022-02-21 04:47:10,073 INFO L290 TraceCheckUtils]: 7: Hoare triple {2142#true} havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; {2168#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} is VALID [2022-02-21 04:47:10,073 INFO L290 TraceCheckUtils]: 8: Hoare triple {2168#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} assume !(main_~_hj_k~0#1 % 4294967296 >= 12); {2168#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} is VALID [2022-02-21 04:47:10,074 INFO L290 TraceCheckUtils]: 9: Hoare triple {2168#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch59#1 := 11 == main_~_hj_k~0#1; {2168#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} is VALID [2022-02-21 04:47:10,074 INFO L290 TraceCheckUtils]: 10: Hoare triple {2168#(<= |ULTIMATE.start_main_~_hj_k~0#1| 4)} assume !main_#t~switch59#1; {2178#(and (<= |ULTIMATE.start_main_~_hj_k~0#1| 4) (not |ULTIMATE.start_main_#t~switch59#1|))} is VALID [2022-02-21 04:47:10,075 INFO L290 TraceCheckUtils]: 11: Hoare triple {2178#(and (<= |ULTIMATE.start_main_~_hj_k~0#1| 4) (not |ULTIMATE.start_main_#t~switch59#1|))} main_#t~switch59#1 := main_#t~switch59#1 || 10 == main_~_hj_k~0#1; {2182#(not |ULTIMATE.start_main_#t~switch59#1|)} is VALID [2022-02-21 04:47:10,075 INFO L290 TraceCheckUtils]: 12: Hoare triple {2182#(not |ULTIMATE.start_main_#t~switch59#1|)} assume main_#t~switch59#1;call main_#t~mem61#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem61#1 % 256);havoc main_#t~mem61#1; {2143#false} is VALID [2022-02-21 04:47:10,075 INFO L290 TraceCheckUtils]: 13: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 9 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,076 INFO L290 TraceCheckUtils]: 14: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem62#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem62#1 % 256);havoc main_#t~mem62#1; {2143#false} is VALID [2022-02-21 04:47:10,076 INFO L290 TraceCheckUtils]: 15: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 8 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,076 INFO L290 TraceCheckUtils]: 16: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem63#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem63#1 % 256);havoc main_#t~mem63#1; {2143#false} is VALID [2022-02-21 04:47:10,076 INFO L290 TraceCheckUtils]: 17: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 7 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,076 INFO L290 TraceCheckUtils]: 18: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem64#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem64#1 % 256);havoc main_#t~mem64#1; {2143#false} is VALID [2022-02-21 04:47:10,077 INFO L290 TraceCheckUtils]: 19: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 6 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,077 INFO L290 TraceCheckUtils]: 20: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem65#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem65#1 % 256);havoc main_#t~mem65#1; {2143#false} is VALID [2022-02-21 04:47:10,077 INFO L290 TraceCheckUtils]: 21: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 5 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,077 INFO L290 TraceCheckUtils]: 22: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem66#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem66#1 % 256;havoc main_#t~mem66#1; {2143#false} is VALID [2022-02-21 04:47:10,077 INFO L290 TraceCheckUtils]: 23: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 4 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,078 INFO L290 TraceCheckUtils]: 24: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; {2143#false} is VALID [2022-02-21 04:47:10,078 INFO L290 TraceCheckUtils]: 25: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 3 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,078 INFO L290 TraceCheckUtils]: 26: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem68#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem68#1 % 256);havoc main_#t~mem68#1; {2143#false} is VALID [2022-02-21 04:47:10,078 INFO L290 TraceCheckUtils]: 27: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 2 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,079 INFO L290 TraceCheckUtils]: 28: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; {2143#false} is VALID [2022-02-21 04:47:10,079 INFO L290 TraceCheckUtils]: 29: Hoare triple {2143#false} main_#t~switch59#1 := main_#t~switch59#1 || 1 == main_~_hj_k~0#1; {2143#false} is VALID [2022-02-21 04:47:10,079 INFO L290 TraceCheckUtils]: 30: Hoare triple {2143#false} assume main_#t~switch59#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem70#1 % 256;havoc main_#t~mem70#1; {2143#false} is VALID [2022-02-21 04:47:10,079 INFO L290 TraceCheckUtils]: 31: Hoare triple {2143#false} havoc main_#t~switch59#1; {2143#false} is VALID [2022-02-21 04:47:10,079 INFO L290 TraceCheckUtils]: 32: Hoare triple {2143#false} main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); {2143#false} is VALID [2022-02-21 04:47:10,080 INFO L290 TraceCheckUtils]: 33: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,080 INFO L290 TraceCheckUtils]: 34: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,080 INFO L290 TraceCheckUtils]: 35: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,080 INFO L290 TraceCheckUtils]: 36: Hoare triple {2143#false} call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); {2143#false} is VALID [2022-02-21 04:47:10,080 INFO L290 TraceCheckUtils]: 37: Hoare triple {2143#false} assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem86#1.base, main_#t~mem86#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; {2143#false} is VALID [2022-02-21 04:47:10,080 INFO L290 TraceCheckUtils]: 38: Hoare triple {2143#false} call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_#t~mem87#1.base, 16 + main_#t~mem87#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_#t~mem89#1.base, 20 + main_#t~mem89#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset - main_#t~mem90#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_#t~mem91#1.base, 16 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem92#1.base, 8 + main_#t~mem92#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset; {2143#false} is VALID [2022-02-21 04:47:10,081 INFO L290 TraceCheckUtils]: 39: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,081 INFO L290 TraceCheckUtils]: 40: Hoare triple {2143#false} havoc main_~_ha_bkt~0#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem95#1 := read~int(main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);main_#t~post96#1 := main_#t~mem95#1;call write~int(1 + main_#t~post96#1, main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~post96#1; {2143#false} is VALID [2022-02-21 04:47:10,081 INFO L290 TraceCheckUtils]: 41: Hoare triple {2143#false} call main_#t~mem97#1.base, main_#t~mem97#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem98#1 := read~int(main_#t~mem97#1.base, 4 + main_#t~mem97#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem98#1 - 1 then 0 else (if 1 == main_#t~mem98#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem98#1 - 1 || 0 == main_#t~mem98#1 - 1 then main_#t~mem98#1 - 1 else (if main_#t~mem98#1 - 1 >= 0 then (main_#t~mem98#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))));havoc main_#t~mem97#1.base, main_#t~mem97#1.offset;havoc main_#t~mem98#1; {2143#false} is VALID [2022-02-21 04:47:10,081 INFO L290 TraceCheckUtils]: 42: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,081 INFO L290 TraceCheckUtils]: 43: Hoare triple {2143#false} call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1.base, main_#t~mem100#1.offset := read~$Pointer$(main_#t~mem99#1.base, main_#t~mem99#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem100#1.base, main_#t~mem100#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1.base, main_#t~mem100#1.offset;call main_#t~mem101#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post102#1 := main_#t~mem101#1;call write~int(1 + main_#t~post102#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem101#1;havoc main_#t~post102#1;call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem103#1.base, main_#t~mem103#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); {2143#false} is VALID [2022-02-21 04:47:10,081 INFO L290 TraceCheckUtils]: 44: Hoare triple {2143#false} assume main_#t~mem104#1.base != 0 || main_#t~mem104#1.offset != 0;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem105#1.base, 12 + main_#t~mem105#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset; {2143#false} is VALID [2022-02-21 04:47:10,082 INFO L290 TraceCheckUtils]: 45: Hoare triple {2143#false} call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem107#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem106#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short110#1 := main_#t~mem107#1 % 4294967296 >= 10 * (1 + main_#t~mem106#1) % 4294967296; {2143#false} is VALID [2022-02-21 04:47:10,082 INFO L290 TraceCheckUtils]: 46: Hoare triple {2143#false} assume main_#t~short110#1;call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_#t~mem108#1.base, 36 + main_#t~mem108#1.offset, 4);main_#t~short110#1 := 0 == main_#t~mem109#1 % 4294967296; {2143#false} is VALID [2022-02-21 04:47:10,082 INFO L290 TraceCheckUtils]: 47: Hoare triple {2143#false} assume !main_#t~short110#1;havoc main_#t~mem107#1;havoc main_#t~mem106#1;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;havoc main_#t~mem109#1;havoc main_#t~short110#1; {2143#false} is VALID [2022-02-21 04:47:10,082 INFO L290 TraceCheckUtils]: 48: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,082 INFO L290 TraceCheckUtils]: 49: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,082 INFO L290 TraceCheckUtils]: 50: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,083 INFO L290 TraceCheckUtils]: 51: Hoare triple {2143#false} goto; {2143#false} is VALID [2022-02-21 04:47:10,083 INFO L290 TraceCheckUtils]: 52: Hoare triple {2143#false} call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; {2143#false} is VALID [2022-02-21 04:47:10,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-21 04:47:10,083 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-21 04:47:10,083 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-21 04:47:10,084 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268593735] [2022-02-21 04:47:10,084 WARN L317 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-02-21 04:47:10,084 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [147326921] [2022-02-21 04:47:10,084 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [147326921] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-21 04:47:10,084 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-21 04:47:10,084 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-21 04:47:10,084 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78009653] [2022-02-21 04:47:10,085 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-21 04:47:10,085 INFO L808 eck$LassoCheckResult]: loop already infeasible [2022-02-21 04:47:10,085 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-21 04:47:10,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-21 04:47:10,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-21 04:47:10,086 INFO L87 Difference]: Start difference. First operand 226 states and 284 transitions. cyclomatic complexity: 61 Second operand has 5 states, 5 states have (on average 10.6) internal successors, (53), 5 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:47:11,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:11,077 INFO L93 Difference]: Finished difference Result 310 states and 389 transitions. [2022-02-21 04:47:11,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-02-21 04:47:11,078 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 10.6) internal successors, (53), 5 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-21 04:47:11,131 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-21 04:47:11,132 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 310 states and 389 transitions. [2022-02-21 04:47:11,141 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 294 [2022-02-21 04:47:11,149 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 310 states to 310 states and 389 transitions. [2022-02-21 04:47:11,150 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 310 [2022-02-21 04:47:11,150 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 310 [2022-02-21 04:47:11,150 INFO L73 IsDeterministic]: Start isDeterministic. Operand 310 states and 389 transitions. [2022-02-21 04:47:11,151 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-02-21 04:47:11,151 INFO L681 BuchiCegarLoop]: Abstraction has 310 states and 389 transitions. [2022-02-21 04:47:11,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states and 389 transitions. [2022-02-21 04:47:11,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 212. [2022-02-21 04:47:11,158 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-21 04:47:11,159 INFO L82 GeneralOperation]: Start isEquivalent. First operand 310 states and 389 transitions. Second operand has 212 states, 208 states have (on average 1.2355769230769231) internal successors, (257), 207 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:11,160 INFO L74 IsIncluded]: Start isIncluded. First operand 310 states and 389 transitions. Second operand has 212 states, 208 states have (on average 1.2355769230769231) internal successors, (257), 207 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:11,160 INFO L87 Difference]: Start difference. First operand 310 states and 389 transitions. Second operand has 212 states, 208 states have (on average 1.2355769230769231) internal successors, (257), 207 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:11,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:11,168 INFO L93 Difference]: Finished difference Result 310 states and 389 transitions. [2022-02-21 04:47:11,169 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 389 transitions. [2022-02-21 04:47:11,169 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:47:11,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:47:11,170 INFO L74 IsIncluded]: Start isIncluded. First operand has 212 states, 208 states have (on average 1.2355769230769231) internal successors, (257), 207 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 310 states and 389 transitions. [2022-02-21 04:47:11,171 INFO L87 Difference]: Start difference. First operand has 212 states, 208 states have (on average 1.2355769230769231) internal successors, (257), 207 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 310 states and 389 transitions. [2022-02-21 04:47:11,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-21 04:47:11,180 INFO L93 Difference]: Finished difference Result 310 states and 389 transitions. [2022-02-21 04:47:11,180 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 389 transitions. [2022-02-21 04:47:11,181 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-21 04:47:11,181 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-21 04:47:11,181 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-21 04:47:11,181 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-21 04:47:11,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 212 states, 208 states have (on average 1.2355769230769231) internal successors, (257), 207 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-21 04:47:11,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 263 transitions. [2022-02-21 04:47:11,187 INFO L704 BuchiCegarLoop]: Abstraction has 212 states and 263 transitions. [2022-02-21 04:47:11,187 INFO L587 BuchiCegarLoop]: Abstraction has 212 states and 263 transitions. [2022-02-21 04:47:11,187 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2022-02-21 04:47:11,187 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 212 states and 263 transitions. [2022-02-21 04:47:11,188 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 205 [2022-02-21 04:47:11,188 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-02-21 04:47:11,188 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-02-21 04:47:11,189 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2022-02-21 04:47:11,189 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-21 04:47:11,189 INFO L791 eck$LassoCheckResult]: Stem: 2822#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := 3, 0;call #Ultimate.allocInit(40, 3);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2798#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset, main_#t~mem44#1, main_#t~mem45#1, main_#t~mem46#1, main_#t~mem48#1, main_#t~mem47#1, main_#t~mem49#1, main_#t~mem50#1, main_#t~mem52#1, main_#t~mem51#1, main_#t~mem53#1, main_#t~mem54#1, main_#t~mem56#1, main_#t~mem55#1, main_#t~mem57#1, main_#t~mem58#1, main_#t~switch59#1, main_#t~mem60#1, main_#t~mem61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret71#1.base, main_#t~ret71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~ret79#1.base, main_#t~ret79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~post102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem107#1, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~short110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~ret113#1.base, main_#t~ret113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem126#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~ite127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~pre141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~post146#1, main_#t~mem150#1, main_#t~mem148#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem149#1, main_#t~mem151#1, main_#t~post152#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~post164#1, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~ite174#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem40#1, main_#t~post41#1, main_#t~mem42#1, main_#t~mem182#1, main_#t~mem181#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem186#1, main_#t~mem185#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem190#1, main_#t~mem189#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~switch193#1, main_#t~mem194#1, main_#t~mem195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1, main_#t~mem215#1, main_#t~mem216#1, main_#t~short217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~ret219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~short226#1, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem251#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~post255#1, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~post266#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem178#1, main_#t~post179#1, main_#t~mem180#1, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2626#L989-4 [2022-02-21 04:47:11,190 INFO L793 eck$LassoCheckResult]: Loop: 2626#L989-4 call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2617#L989-1 assume !!(main_#t~mem42#1 < 10);havoc main_#t~mem42#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset;havoc real_malloc_#t~malloc39#1.base, real_malloc_#t~malloc39#1.offset; 2619#L979 main_#t~ret43#1.base, main_#t~ret43#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret43#1.base, main_#t~ret43#1.offset;havoc main_#t~ret43#1.base, main_#t~ret43#1.offset; 2627#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2628#L991-2 call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem44#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem44#1;call main_#t~mem45#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem45#1 * main_#t~mem46#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem45#1;havoc main_#t~mem46#1; 2743#L996-118 havoc main_~_ha_hashv~0#1; 2788#L996-49 goto; 2789#L996-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2621#L996-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2645#L996-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch59#1 := 11 == main_~_hj_k~0#1; 2816#L996-10 assume !main_#t~switch59#1; 2821#L996-12 main_#t~switch59#1 := main_#t~switch59#1 || 10 == main_~_hj_k~0#1; 2717#L996-13 assume !main_#t~switch59#1; 2718#L996-15 main_#t~switch59#1 := main_#t~switch59#1 || 9 == main_~_hj_k~0#1; 2818#L996-16 assume !main_#t~switch59#1; 2819#L996-18 main_#t~switch59#1 := main_#t~switch59#1 || 8 == main_~_hj_k~0#1; 2808#L996-19 assume !main_#t~switch59#1; 2804#L996-21 main_#t~switch59#1 := main_#t~switch59#1 || 7 == main_~_hj_k~0#1; 2785#L996-22 assume !main_#t~switch59#1; 2786#L996-24 main_#t~switch59#1 := main_#t~switch59#1 || 6 == main_~_hj_k~0#1; 2801#L996-25 assume !main_#t~switch59#1; 2779#L996-27 main_#t~switch59#1 := main_#t~switch59#1 || 5 == main_~_hj_k~0#1; 2622#L996-28 assume !main_#t~switch59#1; 2623#L996-30 main_#t~switch59#1 := main_#t~switch59#1 || 4 == main_~_hj_k~0#1; 2751#L996-31 assume main_#t~switch59#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; 2817#L996-33 main_#t~switch59#1 := main_#t~switch59#1 || 3 == main_~_hj_k~0#1; 2738#L996-34 assume main_#t~switch59#1;call main_#t~mem68#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem68#1 % 256);havoc main_#t~mem68#1; 2739#L996-36 main_#t~switch59#1 := main_#t~switch59#1 || 2 == main_~_hj_k~0#1; 2700#L996-37 assume main_#t~switch59#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; 2701#L996-39 main_#t~switch59#1 := main_#t~switch59#1 || 1 == main_~_hj_k~0#1; 2809#L996-40 assume main_#t~switch59#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem70#1 % 256;havoc main_#t~mem70#1; 2752#L996-42 havoc main_#t~switch59#1; 2672#L996-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 2673#L996-44 goto; 2765#L996-46 goto; 2780#L996-48 goto; 2806#L996-116 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2807#L996-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem86#1.base, main_#t~mem86#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 2729#L996-63 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_#t~mem87#1.base, 16 + main_#t~mem87#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1 := read~int(main_#t~mem89#1.base, 20 + main_#t~mem89#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset - main_#t~mem90#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1.base, main_#t~mem92#1.offset := read~$Pointer$(main_#t~mem91#1.base, 16 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem92#1.base, 8 + main_#t~mem92#1.offset, 4);havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1.base, main_#t~mem92#1.offset;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset; 2730#L996-62 goto; 2675#L996-114 havoc main_~_ha_bkt~0#1;call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem95#1 := read~int(main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);main_#t~post96#1 := main_#t~mem95#1;call write~int(1 + main_#t~post96#1, main_#t~mem94#1.base, 12 + main_#t~mem94#1.offset, 4);havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;havoc main_#t~mem95#1;havoc main_#t~post96#1; 2716#L996-67 call main_#t~mem97#1.base, main_#t~mem97#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem98#1 := read~int(main_#t~mem97#1.base, 4 + main_#t~mem97#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem98#1 - 1 then 0 else (if 1 == main_#t~mem98#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem98#1 - 1 || 0 == main_#t~mem98#1 - 1 then main_#t~mem98#1 - 1 else (if main_#t~mem98#1 - 1 >= 0 then (main_#t~mem98#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem98#1 - 1))));havoc main_#t~mem97#1.base, main_#t~mem97#1.offset;havoc main_#t~mem98#1; 2776#L996-66 goto; 2813#L996-112 call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1.base, main_#t~mem100#1.offset := read~$Pointer$(main_#t~mem99#1.base, main_#t~mem99#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem100#1.base, main_#t~mem100#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1.base, main_#t~mem100#1.offset;call main_#t~mem101#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post102#1 := main_#t~mem101#1;call write~int(1 + main_#t~post102#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem101#1;havoc main_#t~post102#1;call main_#t~mem103#1.base, main_#t~mem103#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem103#1.base, main_#t~mem103#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem103#1.base, main_#t~mem103#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem104#1.base, main_#t~mem104#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2802#L996-69 assume main_#t~mem104#1.base != 0 || main_#t~mem104#1.offset != 0;havoc main_#t~mem104#1.base, main_#t~mem104#1.offset;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem105#1.base, 12 + main_#t~mem105#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset; 2646#L996-71 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem107#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem106#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short110#1 := main_#t~mem107#1 % 4294967296 >= 10 * (1 + main_#t~mem106#1) % 4294967296; 2647#L996-72 assume main_#t~short110#1;call main_#t~mem108#1.base, main_#t~mem108#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_#t~mem108#1.base, 36 + main_#t~mem108#1.offset, 4);main_#t~short110#1 := 0 == main_#t~mem109#1 % 4294967296; 2705#L996-74 assume !main_#t~short110#1;havoc main_#t~mem107#1;havoc main_#t~mem106#1;havoc main_#t~mem108#1.base, main_#t~mem108#1.offset;havoc main_#t~mem109#1;havoc main_#t~short110#1; 2663#L996-111 goto; 2660#L996-113 goto; 2661#L996-115 goto; 2773#L996-117 goto; 2774#L989-3 call main_#t~mem40#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post41#1 := main_#t~mem40#1;call write~int(1 + main_#t~post41#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem40#1;havoc main_#t~post41#1; 2626#L989-4 [2022-02-21 04:47:11,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:11,190 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-02-21 04:47:11,190 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:11,191 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800686943] [2022-02-21 04:47:11,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:11,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:11,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:11,208 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-02-21 04:47:11,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-02-21 04:47:11,219 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-02-21 04:47:11,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-21 04:47:11,220 INFO L85 PathProgramCache]: Analyzing trace with hash -633389277, now seen corresponding path program 1 times [2022-02-21 04:47:11,220 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-21 04:47:11,220 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68815626] [2022-02-21 04:47:11,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:11,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-21 04:47:11,327 ERROR L252 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-02-21 04:47:11,328 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [989559892] [2022-02-21 04:47:11,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-21 04:47:11,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-21 04:47:11,328 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-21 04:47:11,329 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-21 04:47:11,330 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process