./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash a18a7daf593dd77ad555545ec10f677585469ecf569b445600fb5f502940bb67 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:53:09,709 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:53:09,711 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:53:09,743 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:53:09,744 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:53:09,746 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:53:09,747 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:53:09,749 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:53:09,751 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:53:09,754 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:53:09,755 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:53:09,756 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:53:09,756 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:53:09,758 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:53:09,759 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:53:09,761 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:53:09,762 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:53:09,763 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:53:09,764 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:53:09,768 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:53:09,769 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:53:09,770 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:53:09,771 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:53:09,771 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:53:09,776 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:53:09,776 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:53:09,776 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:53:09,777 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:53:09,778 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:53:09,778 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:53:09,778 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:53:09,779 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:53:09,780 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:53:09,781 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:53:09,782 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:53:09,782 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:53:09,782 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:53:09,782 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:53:09,783 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:53:09,784 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:53:09,784 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:53:09,785 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:53:09,807 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:53:09,807 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:53:09,808 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:53:09,808 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:53:09,808 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:53:09,809 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:53:09,809 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:53:09,809 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:53:09,809 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:53:09,809 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:53:09,810 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:53:09,810 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:53:09,810 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:53:09,810 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:53:09,811 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:53:09,811 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:53:09,811 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:53:09,811 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:53:09,811 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:53:09,811 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:53:09,811 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:53:09,812 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:53:09,812 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:53:09,812 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:53:09,812 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:53:09,812 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:53:09,812 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:53:09,813 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:53:09,813 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:53:09,813 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:53:09,814 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a18a7daf593dd77ad555545ec10f677585469ecf569b445600fb5f502940bb67 [2022-02-20 21:53:09,996 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:53:10,012 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:53:10,014 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:53:10,015 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:53:10,016 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:53:10,016 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i [2022-02-20 21:53:10,070 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7abe80475/da55086defc64c0e93af5102ddcdff34/FLAG8074c3674 [2022-02-20 21:53:10,572 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:53:10,573 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i [2022-02-20 21:53:10,609 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7abe80475/da55086defc64c0e93af5102ddcdff34/FLAG8074c3674 [2022-02-20 21:53:10,798 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7abe80475/da55086defc64c0e93af5102ddcdff34 [2022-02-20 21:53:10,801 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:53:10,803 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:53:10,806 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:53:10,807 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:53:10,809 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:53:10,810 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:53:10" (1/1) ... [2022-02-20 21:53:10,812 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c484683 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:10, skipping insertion in model container [2022-02-20 21:53:10,812 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:53:10" (1/1) ... [2022-02-20 21:53:10,817 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:53:10,903 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:53:11,523 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i[161211,161224] [2022-02-20 21:53:11,906 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:53:11,924 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:53:12,054 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i[161211,161224] [2022-02-20 21:53:12,207 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:53:12,264 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:53:12,265 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12 WrapperNode [2022-02-20 21:53:12,266 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:53:12,267 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:53:12,267 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:53:12,268 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:53:12,272 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,328 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,452 INFO L137 Inliner]: procedures = 199, calls = 723, calls flagged for inlining = 106, calls inlined = 103, statements flattened = 2466 [2022-02-20 21:53:12,453 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:53:12,454 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:53:12,454 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:53:12,454 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:53:12,460 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,460 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,476 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,476 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,543 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,562 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,574 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,598 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:53:12,599 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:53:12,599 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:53:12,599 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:53:12,601 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (1/1) ... [2022-02-20 21:53:12,605 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:53:12,613 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:53:12,623 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:53:12,635 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:53:12,659 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:53:12,660 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:53:12,660 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-02-20 21:53:12,660 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-02-20 21:53:12,660 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:53:12,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:53:12,660 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:53:12,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:53:12,661 INFO L130 BoogieDeclarations]: Found specification of procedure setup_descriptors [2022-02-20 21:53:12,661 INFO L138 BoogieDeclarations]: Found implementation of procedure setup_descriptors [2022-02-20 21:53:12,661 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_skb_alloc [2022-02-20 21:53:12,661 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_skb_alloc [2022-02-20 21:53:12,661 INFO L130 BoogieDeclarations]: Found specification of procedure disable_all_interrupts [2022-02-20 21:53:12,661 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_all_interrupts [2022-02-20 21:53:12,661 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:53:12,661 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:53:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure xircom_interrupt [2022-02-20 21:53:12,662 INFO L138 BoogieDeclarations]: Found implementation of procedure xircom_interrupt [2022-02-20 21:53:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 21:53:12,662 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 21:53:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:53:12,662 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:53:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure ioread32 [2022-02-20 21:53:12,662 INFO L138 BoogieDeclarations]: Found implementation of procedure ioread32 [2022-02-20 21:53:12,662 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-02-20 21:53:12,663 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-02-20 21:53:12,663 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-02-20 21:53:12,663 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-02-20 21:53:12,663 INFO L130 BoogieDeclarations]: Found specification of procedure investigate_write_descriptor [2022-02-20 21:53:12,663 INFO L138 BoogieDeclarations]: Found implementation of procedure investigate_write_descriptor [2022-02-20 21:53:12,687 INFO L130 BoogieDeclarations]: Found specification of procedure netif_start_queue [2022-02-20 21:53:12,687 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_start_queue [2022-02-20 21:53:12,687 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:53:12,687 INFO L130 BoogieDeclarations]: Found specification of procedure eth_mac_addr [2022-02-20 21:53:12,687 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_mac_addr [2022-02-20 21:53:12,687 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:53:12,688 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_set_remove [2022-02-20 21:53:12,688 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_set_remove [2022-02-20 21:53:12,688 INFO L130 BoogieDeclarations]: Found specification of procedure iowrite32 [2022-02-20 21:53:12,688 INFO L138 BoogieDeclarations]: Found implementation of procedure iowrite32 [2022-02-20 21:53:12,688 INFO L130 BoogieDeclarations]: Found specification of procedure eth_validate_addr [2022-02-20 21:53:12,688 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_validate_addr [2022-02-20 21:53:12,688 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 21:53:12,688 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 21:53:12,689 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:53:12,689 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:53:12,689 INFO L130 BoogieDeclarations]: Found specification of procedure investigate_read_descriptor [2022-02-20 21:53:12,689 INFO L138 BoogieDeclarations]: Found implementation of procedure investigate_read_descriptor [2022-02-20 21:53:12,689 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-02-20 21:53:12,689 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-02-20 21:53:12,690 INFO L130 BoogieDeclarations]: Found specification of procedure eth_change_mtu [2022-02-20 21:53:12,690 INFO L138 BoogieDeclarations]: Found implementation of procedure eth_change_mtu [2022-02-20 21:53:12,690 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2022-02-20 21:53:12,690 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2022-02-20 21:53:12,691 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-02-20 21:53:12,691 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-02-20 21:53:12,691 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2022-02-20 21:53:12,691 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2022-02-20 21:53:12,692 INFO L130 BoogieDeclarations]: Found specification of procedure trigger_transmit [2022-02-20 21:53:12,692 INFO L138 BoogieDeclarations]: Found implementation of procedure trigger_transmit [2022-02-20 21:53:12,693 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:53:12,693 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:53:12,693 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:53:12,694 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_dword [2022-02-20 21:53:12,694 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_dword [2022-02-20 21:53:12,694 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 21:53:12,694 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 21:53:12,694 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:53:12,694 INFO L130 BoogieDeclarations]: Found specification of procedure dma_free_attrs [2022-02-20 21:53:12,695 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_free_attrs [2022-02-20 21:53:12,695 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:53:12,695 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-02-20 21:53:12,696 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-02-20 21:53:12,696 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:53:12,696 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:53:12,698 INFO L130 BoogieDeclarations]: Found specification of procedure xircom_poll_controller [2022-02-20 21:53:12,699 INFO L138 BoogieDeclarations]: Found implementation of procedure xircom_poll_controller [2022-02-20 21:53:12,699 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:53:12,699 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-02-20 21:53:12,699 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-02-20 21:53:12,699 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:53:12,699 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:53:12,699 INFO L130 BoogieDeclarations]: Found specification of procedure receive_active [2022-02-20 21:53:12,699 INFO L138 BoogieDeclarations]: Found implementation of procedure receive_active [2022-02-20 21:53:12,699 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:53:12,700 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:53:12,700 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 21:53:12,700 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 21:53:12,700 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:53:12,700 INFO L130 BoogieDeclarations]: Found specification of procedure transmit_active [2022-02-20 21:53:12,700 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit_active [2022-02-20 21:53:12,701 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2022-02-20 21:53:12,701 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2022-02-20 21:53:12,701 INFO L130 BoogieDeclarations]: Found specification of procedure trigger_receive [2022-02-20 21:53:12,701 INFO L138 BoogieDeclarations]: Found implementation of procedure trigger_receive [2022-02-20 21:53:12,701 INFO L130 BoogieDeclarations]: Found specification of procedure pci_iounmap [2022-02-20 21:53:12,701 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_iounmap [2022-02-20 21:53:12,702 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 21:53:12,702 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 21:53:12,702 INFO L130 BoogieDeclarations]: Found specification of procedure dma_alloc_attrs [2022-02-20 21:53:12,702 INFO L138 BoogieDeclarations]: Found implementation of procedure dma_alloc_attrs [2022-02-20 21:53:12,703 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:53:12,703 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:53:12,703 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:53:13,084 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:53:13,086 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:53:13,370 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:53:14,898 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:53:14,918 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:53:14,919 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-02-20 21:53:14,921 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:53:14 BoogieIcfgContainer [2022-02-20 21:53:14,921 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:53:14,922 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:53:14,923 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:53:14,925 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:53:14,925 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:53:10" (1/3) ... [2022-02-20 21:53:14,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cc25deb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:53:14, skipping insertion in model container [2022-02-20 21:53:14,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:53:12" (2/3) ... [2022-02-20 21:53:14,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cc25deb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:53:14, skipping insertion in model container [2022-02-20 21:53:14,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:53:14" (3/3) ... [2022-02-20 21:53:14,927 INFO L111 eAbstractionObserver]: Analyzing ICFG 205_9a_array_safes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--ethernet--dec--tulip--xircom_cb.ko-entry_point.cil.out.i [2022-02-20 21:53:14,931 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:53:14,931 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:53:14,963 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:53:14,967 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:53:14,968 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:53:14,997 INFO L276 IsEmpty]: Start isEmpty. Operand has 888 states, 644 states have (on average 1.406832298136646) internal successors, (906), 659 states have internal predecessors, (906), 199 states have call successors, (199), 44 states have call predecessors, (199), 43 states have return successors, (193), 192 states have call predecessors, (193), 193 states have call successors, (193) [2022-02-20 21:53:15,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-02-20 21:53:15,003 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:53:15,003 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:53:15,004 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:53:15,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:53:15,008 INFO L85 PathProgramCache]: Analyzing trace with hash -979232113, now seen corresponding path program 1 times [2022-02-20 21:53:15,014 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:53:15,014 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598593351] [2022-02-20 21:53:15,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:53:15,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:53:15,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:15,278 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:53:15,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:15,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {891#true} is VALID [2022-02-20 21:53:15,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {891#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {891#true} assume true; {891#true} is VALID [2022-02-20 21:53:15,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {891#true} {891#true} #2231#return; {891#true} is VALID [2022-02-20 21:53:15,304 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:53:15,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:15,334 INFO L290 TraceCheckUtils]: 0: Hoare triple {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {891#true} is VALID [2022-02-20 21:53:15,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {891#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {891#true} assume true; {891#true} is VALID [2022-02-20 21:53:15,335 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {891#true} {891#true} #2233#return; {891#true} is VALID [2022-02-20 21:53:15,335 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:53:15,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:15,345 INFO L290 TraceCheckUtils]: 0: Hoare triple {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {891#true} is VALID [2022-02-20 21:53:15,346 INFO L290 TraceCheckUtils]: 1: Hoare triple {891#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,346 INFO L290 TraceCheckUtils]: 2: Hoare triple {891#true} assume true; {891#true} is VALID [2022-02-20 21:53:15,346 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {891#true} {891#true} #2235#return; {891#true} is VALID [2022-02-20 21:53:15,347 INFO L290 TraceCheckUtils]: 0: Hoare triple {891#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(119, 2);call #Ultimate.allocInit(37, 3);call #Ultimate.allocInit(26, 4);call #Ultimate.allocInit(74, 5);call #Ultimate.allocInit(10, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(46, 8);call #Ultimate.allocInit(13, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(47, 11);call #Ultimate.allocInit(13, 12);call #Ultimate.allocInit(38, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(240, 16);call #Ultimate.allocInit(25, 17);call #Ultimate.allocInit(25, 18);call #Ultimate.allocInit(17, 19);call #Ultimate.allocInit(44, 20);call #Ultimate.allocInit(31, 21);call #Ultimate.allocInit(32, 22);call #Ultimate.allocInit(31, 23);call #Ultimate.allocInit(34, 24);call #Ultimate.allocInit(35, 25);call #Ultimate.allocInit(34, 26);call #Ultimate.allocInit(10, 27);call #Ultimate.allocInit(17, 28);call #Ultimate.allocInit(240, 29);call #Ultimate.allocInit(6, 30);call write~init~int(32, 30, 0, 1);call write~init~int(37, 30, 1, 1);call write~init~int(112, 30, 2, 1);call write~init~int(77, 30, 3, 1);call write~init~int(10, 30, 4, 1);call write~init~int(0, 30, 5, 1);call #Ultimate.allocInit(17, 31);call #Ultimate.allocInit(27, 32);call #Ultimate.allocInit(10, 33);~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~netdev_ops_group1~0.base, ~netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ref_cnt~0 := 0;~xircom_ops_group0~0.base, ~xircom_ops_group0~0.offset := 0, 0;~ldv_irq_line_1_1~0 := 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~#bufferoffsets~0.base, ~#bufferoffsets~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(128, ~#bufferoffsets~0.base, ~#bufferoffsets~0.offset, 4);call write~init~int(2048, ~#bufferoffsets~0.base, 4 + ~#bufferoffsets~0.offset, 4);call write~init~int(4096, ~#bufferoffsets~0.base, 8 + ~#bufferoffsets~0.offset, 4);call write~init~int(6144, ~#bufferoffsets~0.base, 12 + ~#bufferoffsets~0.offset, 4);~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset := 35, 0;call #Ultimate.allocInit(64, 35);call write~init~int(4445, ~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, 4);call write~init~int(3, ~#xircom_pci_table~0.base, 4 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 8 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 12 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 16 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 20 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 24 + ~#xircom_pci_table~0.offset, 8);call write~init~int(0, ~#xircom_pci_table~0.base, 32 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 36 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 40 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 44 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 48 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 52 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 56 + ~#xircom_pci_table~0.offset, 8);~__mod_pci__xircom_pci_table_device_table~0.vendor := 0;~__mod_pci__xircom_pci_table_device_table~0.device := 0;~__mod_pci__xircom_pci_table_device_table~0.subvendor := 0;~__mod_pci__xircom_pci_table_device_table~0.subdevice := 0;~__mod_pci__xircom_pci_table_device_table~0.class := 0;~__mod_pci__xircom_pci_table_device_table~0.class_mask := 0;~__mod_pci__xircom_pci_table_device_table~0.driver_data := 0;~#xircom_ops~0.base, ~#xircom_ops~0.offset := 36, 0;call #Ultimate.allocInit(301, 36);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 8 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(6, 0, ~#xircom_ops~0.base, 16 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, ~#xircom_ops~0.base, 24 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_probe.base, #funAddr~xircom_probe.offset, ~#xircom_ops~0.base, 32 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_remove.base, #funAddr~xircom_remove.offset, ~#xircom_ops~0.base, 40 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 48 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 56 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 64 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 72 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 80 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 88 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 96 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 104 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 112 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 120 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 128 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 136 + ~#xircom_ops~0.offset, 1);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 137 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 145 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 153 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 161 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 169 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 177 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 185 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 193 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 201 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 209 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 217 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 221 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 225 + ~#xircom_ops~0.offset, 4);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 229 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 237 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 245 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 253 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 261 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 269 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 273 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 285 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 293 + ~#xircom_ops~0.offset, 8);~#netdev_ops~0.base, ~#netdev_ops~0.offset := 37, 0;call #Ultimate.allocInit(480, 37);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 8 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_open.base, #funAddr~xircom_open.offset, ~#netdev_ops~0.base, 16 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_close.base, #funAddr~xircom_close.offset, ~#netdev_ops~0.base, 24 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_start_xmit.base, #funAddr~xircom_start_xmit.offset, ~#netdev_ops~0.base, 32 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 40 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 48 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 56 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#netdev_ops~0.base, 64 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#netdev_ops~0.base, 72 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 80 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 88 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#netdev_ops~0.base, 96 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 104 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 112 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 120 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 128 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 136 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 144 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_poll_controller.base, #funAddr~xircom_poll_controller.offset, ~#netdev_ops~0.base, 152 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 160 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 168 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 176 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 184 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 192 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 200 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 208 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 216 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 224 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 232 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 240 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 248 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 256 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 264 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 272 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 280 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 288 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 296 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 304 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 312 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 320 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 328 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 336 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 344 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 352 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 360 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 368 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 376 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 384 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 392 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 400 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 408 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 416 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 424 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 432 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 440 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 448 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 456 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 464 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 472 + ~#netdev_ops~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~#set_impl~0.base, ~#set_impl~0.offset := 38, 0;call #Ultimate.allocInit(120, 38);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base);~last_index~0 := 0;~LDV_SKBS~0.base, ~LDV_SKBS~0.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {891#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset, main_#t~ret429#1.base, main_#t~ret429#1.offset, main_#t~nondet430#1, main_#t~ret431#1.base, main_#t~ret431#1.offset, main_#t~nondet432#1, main_#t~switch433#1, main_#t~nondet434#1, main_#t~switch435#1, main_#t~ret436#1, main_#t~nondet437#1, main_#t~switch438#1, main_#t~ret439#1, main_#t~nondet440#1, main_#t~switch441#1, main_#t~ret442#1, main_#t~ret443#1, main_#t~ret444#1, main_#t~ret445#1, main_#t~ret446#1, main_#t~ret447#1, main_#t~ret448#1, main_#t~ret449#1, main_#t~ret450#1, main_#t~ret451#1, main_#t~ret452#1, main_#t~ret453#1, main_#t~ret454#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~43#1.base, main_~tmp~43#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset, main_~ldvarg3~0#1, main_~tmp___1~7#1, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset, main_~tmp___3~1#1, main_~tmp___4~1#1, main_~tmp___5~1#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~43#1.base, main_~tmp~43#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;havoc main_~ldvarg3~0#1;havoc main_~tmp___1~7#1;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;havoc main_~tmp___3~1#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~1#1;havoc main_~tmp___6~0#1; {891#true} is VALID [2022-02-20 21:53:15,349 INFO L272 TraceCheckUtils]: 2: Hoare triple {891#true} call main_#t~ret428#1.base, main_#t~ret428#1.offset := ldv_zalloc(32); {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:15,349 INFO L290 TraceCheckUtils]: 3: Hoare triple {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {891#true} is VALID [2022-02-20 21:53:15,349 INFO L290 TraceCheckUtils]: 4: Hoare triple {891#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,349 INFO L290 TraceCheckUtils]: 5: Hoare triple {891#true} assume true; {891#true} is VALID [2022-02-20 21:53:15,349 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {891#true} {891#true} #2231#return; {891#true} is VALID [2022-02-20 21:53:15,350 INFO L290 TraceCheckUtils]: 7: Hoare triple {891#true} main_~tmp~43#1.base, main_~tmp~43#1.offset := main_#t~ret428#1.base, main_#t~ret428#1.offset;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~43#1.base, main_~tmp~43#1.offset; {891#true} is VALID [2022-02-20 21:53:15,350 INFO L272 TraceCheckUtils]: 8: Hoare triple {891#true} call main_#t~ret429#1.base, main_#t~ret429#1.offset := ldv_zalloc(1); {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:15,350 INFO L290 TraceCheckUtils]: 9: Hoare triple {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {891#true} is VALID [2022-02-20 21:53:15,351 INFO L290 TraceCheckUtils]: 10: Hoare triple {891#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,351 INFO L290 TraceCheckUtils]: 11: Hoare triple {891#true} assume true; {891#true} is VALID [2022-02-20 21:53:15,351 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {891#true} {891#true} #2233#return; {891#true} is VALID [2022-02-20 21:53:15,351 INFO L290 TraceCheckUtils]: 13: Hoare triple {891#true} main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset := main_#t~ret429#1.base, main_#t~ret429#1.offset;havoc main_#t~ret429#1.base, main_#t~ret429#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;assume -2147483648 <= main_#t~nondet430#1 && main_#t~nondet430#1 <= 2147483647;main_~tmp___1~7#1 := main_#t~nondet430#1;havoc main_#t~nondet430#1;main_~ldvarg3~0#1 := main_~tmp___1~7#1; {891#true} is VALID [2022-02-20 21:53:15,352 INFO L272 TraceCheckUtils]: 14: Hoare triple {891#true} call main_#t~ret431#1.base, main_#t~ret431#1.offset := ldv_zalloc(232); {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:15,352 INFO L290 TraceCheckUtils]: 15: Hoare triple {906#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {891#true} is VALID [2022-02-20 21:53:15,352 INFO L290 TraceCheckUtils]: 16: Hoare triple {891#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {891#true} is VALID [2022-02-20 21:53:15,352 INFO L290 TraceCheckUtils]: 17: Hoare triple {891#true} assume true; {891#true} is VALID [2022-02-20 21:53:15,353 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {891#true} {891#true} #2235#return; {891#true} is VALID [2022-02-20 21:53:15,353 INFO L290 TraceCheckUtils]: 19: Hoare triple {891#true} main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset := main_#t~ret431#1.base, main_#t~ret431#1.offset;havoc main_#t~ret431#1.base, main_#t~ret431#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;assume { :begin_inline_ldv_initialize } true;assume { :begin_inline_ldv_set_init } true;ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ~#set_impl~0.base, ~#set_impl~0.offset;~last_index~0 := 0; {891#true} is VALID [2022-02-20 21:53:15,353 INFO L290 TraceCheckUtils]: 20: Hoare triple {891#true} assume { :end_inline_ldv_set_init } true; {891#true} is VALID [2022-02-20 21:53:15,354 INFO L290 TraceCheckUtils]: 21: Hoare triple {891#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {905#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:53:15,354 INFO L290 TraceCheckUtils]: 22: Hoare triple {905#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet432#1 && main_#t~nondet432#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet432#1;havoc main_#t~nondet432#1;main_#t~switch433#1 := 0 == main_~tmp___3~1#1; {905#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:53:15,354 INFO L290 TraceCheckUtils]: 23: Hoare triple {905#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 1 == main_~tmp___3~1#1; {905#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:53:15,355 INFO L290 TraceCheckUtils]: 24: Hoare triple {905#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch433#1; {905#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:53:15,355 INFO L290 TraceCheckUtils]: 25: Hoare triple {905#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet434#1 && main_#t~nondet434#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet434#1;havoc main_#t~nondet434#1;main_#t~switch435#1 := 0 == main_~tmp___4~1#1; {905#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:53:15,356 INFO L290 TraceCheckUtils]: 26: Hoare triple {905#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch435#1; {905#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:53:15,356 INFO L290 TraceCheckUtils]: 27: Hoare triple {905#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_xircom_ops_exit } true;assume { :begin_inline_pci_unregister_driver } true;pci_unregister_driver_#in~arg0#1.base, pci_unregister_driver_#in~arg0#1.offset := ~#xircom_ops~0.base, ~#xircom_ops~0.offset;havoc pci_unregister_driver_~arg0#1.base, pci_unregister_driver_~arg0#1.offset;pci_unregister_driver_~arg0#1.base, pci_unregister_driver_~arg0#1.offset := pci_unregister_driver_#in~arg0#1.base, pci_unregister_driver_#in~arg0#1.offset; {892#false} is VALID [2022-02-20 21:53:15,356 INFO L290 TraceCheckUtils]: 28: Hoare triple {892#false} assume { :end_inline_pci_unregister_driver } true; {892#false} is VALID [2022-02-20 21:53:15,357 INFO L290 TraceCheckUtils]: 29: Hoare triple {892#false} assume { :end_inline_xircom_ops_exit } true;~ldv_state_variable_0~0 := 2; {892#false} is VALID [2022-02-20 21:53:15,357 INFO L290 TraceCheckUtils]: 30: Hoare triple {892#false} assume { :begin_inline_ldv_check_final_state } true;havoc ldv_check_final_state_#t~ret469#1, ldv_check_final_state_~tmp___7~5#1;havoc ldv_check_final_state_~tmp___7~5#1;assume { :begin_inline_ldv_set_is_empty } true;ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_is_empty_#res#1;havoc ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset;ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset := ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset;ldv_set_is_empty_#res#1 := (if 0 == ~last_index~0 then 1 else 0); {892#false} is VALID [2022-02-20 21:53:15,357 INFO L290 TraceCheckUtils]: 31: Hoare triple {892#false} ldv_check_final_state_#t~ret469#1 := ldv_set_is_empty_#res#1;assume { :end_inline_ldv_set_is_empty } true;assume -2147483648 <= ldv_check_final_state_#t~ret469#1 && ldv_check_final_state_#t~ret469#1 <= 2147483647;ldv_check_final_state_~tmp___7~5#1 := ldv_check_final_state_#t~ret469#1;havoc ldv_check_final_state_#t~ret469#1; {892#false} is VALID [2022-02-20 21:53:15,357 INFO L290 TraceCheckUtils]: 32: Hoare triple {892#false} assume !(0 != ldv_check_final_state_~tmp___7~5#1); {892#false} is VALID [2022-02-20 21:53:15,357 INFO L272 TraceCheckUtils]: 33: Hoare triple {892#false} call ldv_error(); {892#false} is VALID [2022-02-20 21:53:15,358 INFO L290 TraceCheckUtils]: 34: Hoare triple {892#false} assume !false; {892#false} is VALID [2022-02-20 21:53:15,358 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-02-20 21:53:15,358 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:53:15,359 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598593351] [2022-02-20 21:53:15,359 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1598593351] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:53:15,359 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:53:15,360 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:53:15,361 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140037428] [2022-02-20 21:53:15,361 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:53:15,365 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 35 [2022-02-20 21:53:15,366 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:53:15,369 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:15,404 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:53:15,404 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:53:15,405 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:53:15,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:53:15,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:53:15,438 INFO L87 Difference]: Start difference. First operand has 888 states, 644 states have (on average 1.406832298136646) internal successors, (906), 659 states have internal predecessors, (906), 199 states have call successors, (199), 44 states have call predecessors, (199), 43 states have return successors, (193), 192 states have call predecessors, (193), 193 states have call successors, (193) Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:21,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:21,954 INFO L93 Difference]: Finished difference Result 2727 states and 4064 transitions. [2022-02-20 21:53:21,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:53:21,954 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 35 [2022-02-20 21:53:21,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:53:21,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:22,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 4064 transitions. [2022-02-20 21:53:22,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:22,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 4064 transitions. [2022-02-20 21:53:22,135 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 4064 transitions. [2022-02-20 21:53:24,872 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4064 edges. 4064 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:53:25,110 INFO L225 Difference]: With dead ends: 2727 [2022-02-20 21:53:25,110 INFO L226 Difference]: Without dead ends: 1818 [2022-02-20 21:53:25,117 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:53:25,119 INFO L933 BasicCegarLoop]: 1358 mSDtfsCounter, 1491 mSDsluCounter, 1359 mSDsCounter, 0 mSdLazyCounter, 936 mSolverCounterSat, 494 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1671 SdHoareTripleChecker+Valid, 2717 SdHoareTripleChecker+Invalid, 1430 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 494 IncrementalHoareTripleChecker+Valid, 936 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-02-20 21:53:25,119 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1671 Valid, 2717 Invalid, 1430 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [494 Valid, 936 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-02-20 21:53:25,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1818 states. [2022-02-20 21:53:25,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1818 to 1720. [2022-02-20 21:53:25,209 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:53:25,227 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1818 states. Second operand has 1720 states, 1254 states have (on average 1.2854864433811801) internal successors, (1612), 1268 states have internal predecessors, (1612), 381 states have call successors, (381), 85 states have call predecessors, (381), 84 states have return successors, (380), 378 states have call predecessors, (380), 380 states have call successors, (380) [2022-02-20 21:53:25,234 INFO L74 IsIncluded]: Start isIncluded. First operand 1818 states. Second operand has 1720 states, 1254 states have (on average 1.2854864433811801) internal successors, (1612), 1268 states have internal predecessors, (1612), 381 states have call successors, (381), 85 states have call predecessors, (381), 84 states have return successors, (380), 378 states have call predecessors, (380), 380 states have call successors, (380) [2022-02-20 21:53:25,238 INFO L87 Difference]: Start difference. First operand 1818 states. Second operand has 1720 states, 1254 states have (on average 1.2854864433811801) internal successors, (1612), 1268 states have internal predecessors, (1612), 381 states have call successors, (381), 85 states have call predecessors, (381), 84 states have return successors, (380), 378 states have call predecessors, (380), 380 states have call successors, (380) [2022-02-20 21:53:25,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:25,367 INFO L93 Difference]: Finished difference Result 1818 states and 2529 transitions. [2022-02-20 21:53:25,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1818 states and 2529 transitions. [2022-02-20 21:53:25,376 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:53:25,377 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:53:25,381 INFO L74 IsIncluded]: Start isIncluded. First operand has 1720 states, 1254 states have (on average 1.2854864433811801) internal successors, (1612), 1268 states have internal predecessors, (1612), 381 states have call successors, (381), 85 states have call predecessors, (381), 84 states have return successors, (380), 378 states have call predecessors, (380), 380 states have call successors, (380) Second operand 1818 states. [2022-02-20 21:53:25,384 INFO L87 Difference]: Start difference. First operand has 1720 states, 1254 states have (on average 1.2854864433811801) internal successors, (1612), 1268 states have internal predecessors, (1612), 381 states have call successors, (381), 85 states have call predecessors, (381), 84 states have return successors, (380), 378 states have call predecessors, (380), 380 states have call successors, (380) Second operand 1818 states. [2022-02-20 21:53:25,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:25,518 INFO L93 Difference]: Finished difference Result 1818 states and 2529 transitions. [2022-02-20 21:53:25,518 INFO L276 IsEmpty]: Start isEmpty. Operand 1818 states and 2529 transitions. [2022-02-20 21:53:25,523 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:53:25,523 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:53:25,523 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:53:25,524 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:53:25,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1720 states, 1254 states have (on average 1.2854864433811801) internal successors, (1612), 1268 states have internal predecessors, (1612), 381 states have call successors, (381), 85 states have call predecessors, (381), 84 states have return successors, (380), 378 states have call predecessors, (380), 380 states have call successors, (380) [2022-02-20 21:53:25,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1720 states to 1720 states and 2373 transitions. [2022-02-20 21:53:25,670 INFO L78 Accepts]: Start accepts. Automaton has 1720 states and 2373 transitions. Word has length 35 [2022-02-20 21:53:25,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:53:25,672 INFO L470 AbstractCegarLoop]: Abstraction has 1720 states and 2373 transitions. [2022-02-20 21:53:25,673 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:25,673 INFO L276 IsEmpty]: Start isEmpty. Operand 1720 states and 2373 transitions. [2022-02-20 21:53:25,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-02-20 21:53:25,674 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:53:25,675 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:53:25,675 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:53:25,675 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:53:25,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:53:25,680 INFO L85 PathProgramCache]: Analyzing trace with hash 2045075246, now seen corresponding path program 1 times [2022-02-20 21:53:25,681 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:53:25,681 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032395687] [2022-02-20 21:53:25,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:53:25,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:53:25,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:25,822 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:53:25,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:25,830 INFO L290 TraceCheckUtils]: 0: Hoare triple {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {10866#true} is VALID [2022-02-20 21:53:25,831 INFO L290 TraceCheckUtils]: 1: Hoare triple {10866#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,831 INFO L290 TraceCheckUtils]: 2: Hoare triple {10866#true} assume true; {10866#true} is VALID [2022-02-20 21:53:25,831 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10866#true} {10866#true} #2231#return; {10866#true} is VALID [2022-02-20 21:53:25,832 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:53:25,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:25,839 INFO L290 TraceCheckUtils]: 0: Hoare triple {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {10866#true} is VALID [2022-02-20 21:53:25,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {10866#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {10866#true} assume true; {10866#true} is VALID [2022-02-20 21:53:25,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10866#true} {10866#true} #2233#return; {10866#true} is VALID [2022-02-20 21:53:25,840 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:53:25,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:25,846 INFO L290 TraceCheckUtils]: 0: Hoare triple {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {10866#true} is VALID [2022-02-20 21:53:25,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {10866#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {10866#true} assume true; {10866#true} is VALID [2022-02-20 21:53:25,846 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10866#true} {10866#true} #2235#return; {10866#true} is VALID [2022-02-20 21:53:25,847 INFO L290 TraceCheckUtils]: 0: Hoare triple {10866#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(119, 2);call #Ultimate.allocInit(37, 3);call #Ultimate.allocInit(26, 4);call #Ultimate.allocInit(74, 5);call #Ultimate.allocInit(10, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(46, 8);call #Ultimate.allocInit(13, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(47, 11);call #Ultimate.allocInit(13, 12);call #Ultimate.allocInit(38, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(240, 16);call #Ultimate.allocInit(25, 17);call #Ultimate.allocInit(25, 18);call #Ultimate.allocInit(17, 19);call #Ultimate.allocInit(44, 20);call #Ultimate.allocInit(31, 21);call #Ultimate.allocInit(32, 22);call #Ultimate.allocInit(31, 23);call #Ultimate.allocInit(34, 24);call #Ultimate.allocInit(35, 25);call #Ultimate.allocInit(34, 26);call #Ultimate.allocInit(10, 27);call #Ultimate.allocInit(17, 28);call #Ultimate.allocInit(240, 29);call #Ultimate.allocInit(6, 30);call write~init~int(32, 30, 0, 1);call write~init~int(37, 30, 1, 1);call write~init~int(112, 30, 2, 1);call write~init~int(77, 30, 3, 1);call write~init~int(10, 30, 4, 1);call write~init~int(0, 30, 5, 1);call #Ultimate.allocInit(17, 31);call #Ultimate.allocInit(27, 32);call #Ultimate.allocInit(10, 33);~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~netdev_ops_group1~0.base, ~netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ref_cnt~0 := 0;~xircom_ops_group0~0.base, ~xircom_ops_group0~0.offset := 0, 0;~ldv_irq_line_1_1~0 := 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~#bufferoffsets~0.base, ~#bufferoffsets~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(128, ~#bufferoffsets~0.base, ~#bufferoffsets~0.offset, 4);call write~init~int(2048, ~#bufferoffsets~0.base, 4 + ~#bufferoffsets~0.offset, 4);call write~init~int(4096, ~#bufferoffsets~0.base, 8 + ~#bufferoffsets~0.offset, 4);call write~init~int(6144, ~#bufferoffsets~0.base, 12 + ~#bufferoffsets~0.offset, 4);~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset := 35, 0;call #Ultimate.allocInit(64, 35);call write~init~int(4445, ~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, 4);call write~init~int(3, ~#xircom_pci_table~0.base, 4 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 8 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 12 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 16 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 20 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 24 + ~#xircom_pci_table~0.offset, 8);call write~init~int(0, ~#xircom_pci_table~0.base, 32 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 36 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 40 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 44 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 48 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 52 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 56 + ~#xircom_pci_table~0.offset, 8);~__mod_pci__xircom_pci_table_device_table~0.vendor := 0;~__mod_pci__xircom_pci_table_device_table~0.device := 0;~__mod_pci__xircom_pci_table_device_table~0.subvendor := 0;~__mod_pci__xircom_pci_table_device_table~0.subdevice := 0;~__mod_pci__xircom_pci_table_device_table~0.class := 0;~__mod_pci__xircom_pci_table_device_table~0.class_mask := 0;~__mod_pci__xircom_pci_table_device_table~0.driver_data := 0;~#xircom_ops~0.base, ~#xircom_ops~0.offset := 36, 0;call #Ultimate.allocInit(301, 36);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 8 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(6, 0, ~#xircom_ops~0.base, 16 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, ~#xircom_ops~0.base, 24 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_probe.base, #funAddr~xircom_probe.offset, ~#xircom_ops~0.base, 32 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_remove.base, #funAddr~xircom_remove.offset, ~#xircom_ops~0.base, 40 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 48 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 56 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 64 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 72 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 80 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 88 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 96 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 104 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 112 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 120 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 128 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 136 + ~#xircom_ops~0.offset, 1);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 137 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 145 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 153 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 161 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 169 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 177 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 185 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 193 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 201 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 209 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 217 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 221 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 225 + ~#xircom_ops~0.offset, 4);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 229 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 237 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 245 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 253 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 261 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 269 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 273 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 285 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 293 + ~#xircom_ops~0.offset, 8);~#netdev_ops~0.base, ~#netdev_ops~0.offset := 37, 0;call #Ultimate.allocInit(480, 37);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 8 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_open.base, #funAddr~xircom_open.offset, ~#netdev_ops~0.base, 16 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_close.base, #funAddr~xircom_close.offset, ~#netdev_ops~0.base, 24 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_start_xmit.base, #funAddr~xircom_start_xmit.offset, ~#netdev_ops~0.base, 32 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 40 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 48 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 56 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#netdev_ops~0.base, 64 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#netdev_ops~0.base, 72 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 80 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 88 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#netdev_ops~0.base, 96 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 104 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 112 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 120 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 128 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 136 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 144 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_poll_controller.base, #funAddr~xircom_poll_controller.offset, ~#netdev_ops~0.base, 152 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 160 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 168 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 176 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 184 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 192 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 200 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 208 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 216 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 224 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 232 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 240 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 248 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 256 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 264 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 272 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 280 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 288 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 296 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 304 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 312 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 320 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 328 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 336 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 344 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 352 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 360 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 368 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 376 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 384 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 392 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 400 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 408 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 416 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 424 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 432 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 440 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 448 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 456 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 464 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 472 + ~#netdev_ops~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~#set_impl~0.base, ~#set_impl~0.offset := 38, 0;call #Ultimate.allocInit(120, 38);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base);~last_index~0 := 0;~LDV_SKBS~0.base, ~LDV_SKBS~0.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {10866#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset, main_#t~ret429#1.base, main_#t~ret429#1.offset, main_#t~nondet430#1, main_#t~ret431#1.base, main_#t~ret431#1.offset, main_#t~nondet432#1, main_#t~switch433#1, main_#t~nondet434#1, main_#t~switch435#1, main_#t~ret436#1, main_#t~nondet437#1, main_#t~switch438#1, main_#t~ret439#1, main_#t~nondet440#1, main_#t~switch441#1, main_#t~ret442#1, main_#t~ret443#1, main_#t~ret444#1, main_#t~ret445#1, main_#t~ret446#1, main_#t~ret447#1, main_#t~ret448#1, main_#t~ret449#1, main_#t~ret450#1, main_#t~ret451#1, main_#t~ret452#1, main_#t~ret453#1, main_#t~ret454#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~43#1.base, main_~tmp~43#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset, main_~ldvarg3~0#1, main_~tmp___1~7#1, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset, main_~tmp___3~1#1, main_~tmp___4~1#1, main_~tmp___5~1#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~43#1.base, main_~tmp~43#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;havoc main_~ldvarg3~0#1;havoc main_~tmp___1~7#1;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;havoc main_~tmp___3~1#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~1#1;havoc main_~tmp___6~0#1; {10866#true} is VALID [2022-02-20 21:53:25,848 INFO L272 TraceCheckUtils]: 2: Hoare triple {10866#true} call main_#t~ret428#1.base, main_#t~ret428#1.offset := ldv_zalloc(32); {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:25,848 INFO L290 TraceCheckUtils]: 3: Hoare triple {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {10866#true} is VALID [2022-02-20 21:53:25,848 INFO L290 TraceCheckUtils]: 4: Hoare triple {10866#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {10866#true} assume true; {10866#true} is VALID [2022-02-20 21:53:25,849 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {10866#true} {10866#true} #2231#return; {10866#true} is VALID [2022-02-20 21:53:25,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {10866#true} main_~tmp~43#1.base, main_~tmp~43#1.offset := main_#t~ret428#1.base, main_#t~ret428#1.offset;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~43#1.base, main_~tmp~43#1.offset; {10866#true} is VALID [2022-02-20 21:53:25,849 INFO L272 TraceCheckUtils]: 8: Hoare triple {10866#true} call main_#t~ret429#1.base, main_#t~ret429#1.offset := ldv_zalloc(1); {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:25,850 INFO L290 TraceCheckUtils]: 9: Hoare triple {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {10866#true} is VALID [2022-02-20 21:53:25,850 INFO L290 TraceCheckUtils]: 10: Hoare triple {10866#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,850 INFO L290 TraceCheckUtils]: 11: Hoare triple {10866#true} assume true; {10866#true} is VALID [2022-02-20 21:53:25,850 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {10866#true} {10866#true} #2233#return; {10866#true} is VALID [2022-02-20 21:53:25,850 INFO L290 TraceCheckUtils]: 13: Hoare triple {10866#true} main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset := main_#t~ret429#1.base, main_#t~ret429#1.offset;havoc main_#t~ret429#1.base, main_#t~ret429#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;assume -2147483648 <= main_#t~nondet430#1 && main_#t~nondet430#1 <= 2147483647;main_~tmp___1~7#1 := main_#t~nondet430#1;havoc main_#t~nondet430#1;main_~ldvarg3~0#1 := main_~tmp___1~7#1; {10866#true} is VALID [2022-02-20 21:53:25,851 INFO L272 TraceCheckUtils]: 14: Hoare triple {10866#true} call main_#t~ret431#1.base, main_#t~ret431#1.offset := ldv_zalloc(232); {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:25,851 INFO L290 TraceCheckUtils]: 15: Hoare triple {10883#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {10866#true} is VALID [2022-02-20 21:53:25,851 INFO L290 TraceCheckUtils]: 16: Hoare triple {10866#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {10866#true} is VALID [2022-02-20 21:53:25,851 INFO L290 TraceCheckUtils]: 17: Hoare triple {10866#true} assume true; {10866#true} is VALID [2022-02-20 21:53:25,852 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {10866#true} {10866#true} #2235#return; {10866#true} is VALID [2022-02-20 21:53:25,852 INFO L290 TraceCheckUtils]: 19: Hoare triple {10866#true} main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset := main_#t~ret431#1.base, main_#t~ret431#1.offset;havoc main_#t~ret431#1.base, main_#t~ret431#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;assume { :begin_inline_ldv_initialize } true;assume { :begin_inline_ldv_set_init } true;ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ~#set_impl~0.base, ~#set_impl~0.offset;~last_index~0 := 0; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,852 INFO L290 TraceCheckUtils]: 20: Hoare triple {10880#(= ~last_index~0 0)} assume { :end_inline_ldv_set_init } true; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,853 INFO L290 TraceCheckUtils]: 21: Hoare triple {10880#(= ~last_index~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,853 INFO L290 TraceCheckUtils]: 22: Hoare triple {10880#(= ~last_index~0 0)} assume -2147483648 <= main_#t~nondet432#1 && main_#t~nondet432#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet432#1;havoc main_#t~nondet432#1;main_#t~switch433#1 := 0 == main_~tmp___3~1#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,863 INFO L290 TraceCheckUtils]: 23: Hoare triple {10880#(= ~last_index~0 0)} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 1 == main_~tmp___3~1#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,864 INFO L290 TraceCheckUtils]: 24: Hoare triple {10880#(= ~last_index~0 0)} assume main_#t~switch433#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,864 INFO L290 TraceCheckUtils]: 25: Hoare triple {10880#(= ~last_index~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet434#1 && main_#t~nondet434#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet434#1;havoc main_#t~nondet434#1;main_#t~switch435#1 := 0 == main_~tmp___4~1#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,865 INFO L290 TraceCheckUtils]: 26: Hoare triple {10880#(= ~last_index~0 0)} assume !main_#t~switch435#1;main_#t~switch435#1 := main_#t~switch435#1 || 1 == main_~tmp___4~1#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,865 INFO L290 TraceCheckUtils]: 27: Hoare triple {10880#(= ~last_index~0 0)} assume main_#t~switch435#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,865 INFO L290 TraceCheckUtils]: 28: Hoare triple {10880#(= ~last_index~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_xircom_ops_init } true;havoc xircom_ops_init_#res#1;havoc xircom_ops_init_#t~ret416#1, xircom_ops_init_~tmp~38#1;havoc xircom_ops_init_~tmp~38#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#xircom_ops~0.base, ~#xircom_ops~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 33, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet472#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet472#1 && __pci_register_driver_#t~nondet472#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet472#1;havoc __pci_register_driver_#t~nondet472#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,866 INFO L290 TraceCheckUtils]: 29: Hoare triple {10880#(= ~last_index~0 0)} xircom_ops_init_#t~ret416#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= xircom_ops_init_#t~ret416#1 && xircom_ops_init_#t~ret416#1 <= 2147483647;xircom_ops_init_~tmp~38#1 := xircom_ops_init_#t~ret416#1;havoc xircom_ops_init_#t~ret416#1;xircom_ops_init_#res#1 := xircom_ops_init_~tmp~38#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,870 INFO L290 TraceCheckUtils]: 30: Hoare triple {10880#(= ~last_index~0 0)} main_#t~ret436#1 := xircom_ops_init_#res#1;assume { :end_inline_xircom_ops_init } true;assume -2147483648 <= main_#t~ret436#1 && main_#t~ret436#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret436#1;havoc main_#t~ret436#1; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,871 INFO L290 TraceCheckUtils]: 31: Hoare triple {10880#(= ~last_index~0 0)} assume !(0 == ~ldv_retval_0~0); {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,871 INFO L290 TraceCheckUtils]: 32: Hoare triple {10880#(= ~last_index~0 0)} assume 0 != ~ldv_retval_0~0;~ldv_state_variable_0~0 := 2; {10880#(= ~last_index~0 0)} is VALID [2022-02-20 21:53:25,872 INFO L290 TraceCheckUtils]: 33: Hoare triple {10880#(= ~last_index~0 0)} assume { :begin_inline_ldv_check_final_state } true;havoc ldv_check_final_state_#t~ret469#1, ldv_check_final_state_~tmp___7~5#1;havoc ldv_check_final_state_~tmp___7~5#1;assume { :begin_inline_ldv_set_is_empty } true;ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_is_empty_#res#1;havoc ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset;ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset := ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset;ldv_set_is_empty_#res#1 := (if 0 == ~last_index~0 then 1 else 0); {10881#(not (= |ULTIMATE.start_ldv_set_is_empty_#res#1| 0))} is VALID [2022-02-20 21:53:25,872 INFO L290 TraceCheckUtils]: 34: Hoare triple {10881#(not (= |ULTIMATE.start_ldv_set_is_empty_#res#1| 0))} ldv_check_final_state_#t~ret469#1 := ldv_set_is_empty_#res#1;assume { :end_inline_ldv_set_is_empty } true;assume -2147483648 <= ldv_check_final_state_#t~ret469#1 && ldv_check_final_state_#t~ret469#1 <= 2147483647;ldv_check_final_state_~tmp___7~5#1 := ldv_check_final_state_#t~ret469#1;havoc ldv_check_final_state_#t~ret469#1; {10882#(not (= |ULTIMATE.start_ldv_check_final_state_~tmp___7~5#1| 0))} is VALID [2022-02-20 21:53:25,873 INFO L290 TraceCheckUtils]: 35: Hoare triple {10882#(not (= |ULTIMATE.start_ldv_check_final_state_~tmp___7~5#1| 0))} assume !(0 != ldv_check_final_state_~tmp___7~5#1); {10867#false} is VALID [2022-02-20 21:53:25,873 INFO L272 TraceCheckUtils]: 36: Hoare triple {10867#false} call ldv_error(); {10867#false} is VALID [2022-02-20 21:53:25,873 INFO L290 TraceCheckUtils]: 37: Hoare triple {10867#false} assume !false; {10867#false} is VALID [2022-02-20 21:53:25,873 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-02-20 21:53:25,874 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:53:25,874 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032395687] [2022-02-20 21:53:25,874 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2032395687] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:53:25,875 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:53:25,875 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 21:53:25,876 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [908390166] [2022-02-20 21:53:25,876 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:53:25,877 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 38 [2022-02-20 21:53:25,878 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:53:25,878 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:25,910 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:53:25,910 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 21:53:25,910 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:53:25,911 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 21:53:25,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-02-20 21:53:25,912 INFO L87 Difference]: Start difference. First operand 1720 states and 2373 transitions. Second operand has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:36,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:36,139 INFO L93 Difference]: Finished difference Result 5329 states and 7448 transitions. [2022-02-20 21:53:36,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:53:36,139 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 38 [2022-02-20 21:53:36,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:53:36,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:36,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 3759 transitions. [2022-02-20 21:53:36,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:36,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 3759 transitions. [2022-02-20 21:53:36,270 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 3759 transitions. [2022-02-20 21:53:38,823 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3759 edges. 3759 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:53:39,427 INFO L225 Difference]: With dead ends: 5329 [2022-02-20 21:53:39,427 INFO L226 Difference]: Without dead ends: 3614 [2022-02-20 21:53:39,432 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-02-20 21:53:39,433 INFO L933 BasicCegarLoop]: 1342 mSDtfsCounter, 1460 mSDsluCounter, 3013 mSDsCounter, 0 mSdLazyCounter, 2149 mSolverCounterSat, 487 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1638 SdHoareTripleChecker+Valid, 4355 SdHoareTripleChecker+Invalid, 2636 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 487 IncrementalHoareTripleChecker+Valid, 2149 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-02-20 21:53:39,433 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1638 Valid, 4355 Invalid, 2636 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [487 Valid, 2149 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2022-02-20 21:53:39,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3614 states. [2022-02-20 21:53:39,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3614 to 3446. [2022-02-20 21:53:39,543 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:53:39,551 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3614 states. Second operand has 3446 states, 2511 states have (on average 1.2855436081242533) internal successors, (3228), 2543 states have internal predecessors, (3228), 758 states have call successors, (758), 169 states have call predecessors, (758), 176 states have return successors, (802), 755 states have call predecessors, (802), 757 states have call successors, (802) [2022-02-20 21:53:39,559 INFO L74 IsIncluded]: Start isIncluded. First operand 3614 states. Second operand has 3446 states, 2511 states have (on average 1.2855436081242533) internal successors, (3228), 2543 states have internal predecessors, (3228), 758 states have call successors, (758), 169 states have call predecessors, (758), 176 states have return successors, (802), 755 states have call predecessors, (802), 757 states have call successors, (802) [2022-02-20 21:53:39,567 INFO L87 Difference]: Start difference. First operand 3614 states. Second operand has 3446 states, 2511 states have (on average 1.2855436081242533) internal successors, (3228), 2543 states have internal predecessors, (3228), 758 states have call successors, (758), 169 states have call predecessors, (758), 176 states have return successors, (802), 755 states have call predecessors, (802), 757 states have call successors, (802) [2022-02-20 21:53:39,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:39,979 INFO L93 Difference]: Finished difference Result 3614 states and 5052 transitions. [2022-02-20 21:53:39,979 INFO L276 IsEmpty]: Start isEmpty. Operand 3614 states and 5052 transitions. [2022-02-20 21:53:39,990 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:53:39,991 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:53:40,009 INFO L74 IsIncluded]: Start isIncluded. First operand has 3446 states, 2511 states have (on average 1.2855436081242533) internal successors, (3228), 2543 states have internal predecessors, (3228), 758 states have call successors, (758), 169 states have call predecessors, (758), 176 states have return successors, (802), 755 states have call predecessors, (802), 757 states have call successors, (802) Second operand 3614 states. [2022-02-20 21:53:40,016 INFO L87 Difference]: Start difference. First operand has 3446 states, 2511 states have (on average 1.2855436081242533) internal successors, (3228), 2543 states have internal predecessors, (3228), 758 states have call successors, (758), 169 states have call predecessors, (758), 176 states have return successors, (802), 755 states have call predecessors, (802), 757 states have call successors, (802) Second operand 3614 states. [2022-02-20 21:53:40,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:40,432 INFO L93 Difference]: Finished difference Result 3614 states and 5052 transitions. [2022-02-20 21:53:40,432 INFO L276 IsEmpty]: Start isEmpty. Operand 3614 states and 5052 transitions. [2022-02-20 21:53:40,442 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:53:40,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:53:40,443 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:53:40,443 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:53:40,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3446 states, 2511 states have (on average 1.2855436081242533) internal successors, (3228), 2543 states have internal predecessors, (3228), 758 states have call successors, (758), 169 states have call predecessors, (758), 176 states have return successors, (802), 755 states have call predecessors, (802), 757 states have call successors, (802) [2022-02-20 21:53:41,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3446 states to 3446 states and 4788 transitions. [2022-02-20 21:53:41,029 INFO L78 Accepts]: Start accepts. Automaton has 3446 states and 4788 transitions. Word has length 38 [2022-02-20 21:53:41,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:53:41,030 INFO L470 AbstractCegarLoop]: Abstraction has 3446 states and 4788 transitions. [2022-02-20 21:53:41,030 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:53:41,030 INFO L276 IsEmpty]: Start isEmpty. Operand 3446 states and 4788 transitions. [2022-02-20 21:53:41,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2022-02-20 21:53:41,036 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:53:41,036 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:53:41,037 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:53:41,037 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:53:41,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:53:41,038 INFO L85 PathProgramCache]: Analyzing trace with hash 967723845, now seen corresponding path program 1 times [2022-02-20 21:53:41,038 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:53:41,038 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350536938] [2022-02-20 21:53:41,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:53:41,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:53:41,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,188 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:53:41,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,203 INFO L290 TraceCheckUtils]: 0: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,204 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,207 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30536#true} {30538#(= ~ldv_irq_1_2~0 0)} #2231#return; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,207 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:53:41,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,221 INFO L290 TraceCheckUtils]: 0: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,223 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,223 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,224 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30536#true} {30538#(= ~ldv_irq_1_2~0 0)} #2233#return; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,224 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:53:41,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,237 INFO L290 TraceCheckUtils]: 0: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,238 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30536#true} {30538#(= ~ldv_irq_1_2~0 0)} #2235#return; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,247 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-02-20 21:53:41,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,328 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2022-02-20 21:53:41,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,365 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:53:41,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,370 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {30536#true} is VALID [2022-02-20 21:53:41,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,371 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30536#true} {30536#true} #2187#return; {30536#true} is VALID [2022-02-20 21:53:41,371 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:53:41,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,377 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30536#true} {30536#true} #2189#return; {30536#true} is VALID [2022-02-20 21:53:41,377 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:53:41,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,383 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30536#true} {30536#true} #2193#return; {30536#true} is VALID [2022-02-20 21:53:41,383 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-02-20 21:53:41,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,388 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,389 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,390 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30536#true} {30536#true} #2199#return; {30536#true} is VALID [2022-02-20 21:53:41,390 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-02-20 21:53:41,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,421 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2022-02-20 21:53:41,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,443 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:53:41,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,450 INFO L290 TraceCheckUtils]: 0: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,459 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,459 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30536#true} {30536#true} #2179#return; {30536#true} is VALID [2022-02-20 21:53:41,460 INFO L290 TraceCheckUtils]: 0: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,461 INFO L272 TraceCheckUtils]: 1: Hoare triple {30536#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,461 INFO L290 TraceCheckUtils]: 2: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,461 INFO L290 TraceCheckUtils]: 3: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,461 INFO L290 TraceCheckUtils]: 4: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,461 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {30536#true} {30536#true} #2179#return; {30536#true} is VALID [2022-02-20 21:53:41,462 INFO L290 TraceCheckUtils]: 6: Hoare triple {30536#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,462 INFO L290 TraceCheckUtils]: 7: Hoare triple {30536#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,462 INFO L290 TraceCheckUtils]: 8: Hoare triple {30536#true} assume !false; {30536#true} is VALID [2022-02-20 21:53:41,462 INFO L290 TraceCheckUtils]: 9: Hoare triple {30536#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {30536#true} is VALID [2022-02-20 21:53:41,462 INFO L290 TraceCheckUtils]: 10: Hoare triple {30536#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {30536#true} is VALID [2022-02-20 21:53:41,463 INFO L290 TraceCheckUtils]: 11: Hoare triple {30536#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,463 INFO L290 TraceCheckUtils]: 12: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,463 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {30536#true} {30536#true} #2207#return; {30536#true} is VALID [2022-02-20 21:53:41,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-02-20 21:53:41,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,480 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:53:41,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,485 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,485 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,485 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30536#true} {30536#true} #2163#return; {30536#true} is VALID [2022-02-20 21:53:41,486 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {30536#true} is VALID [2022-02-20 21:53:41,486 INFO L272 TraceCheckUtils]: 1: Hoare triple {30536#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {30536#true} is VALID [2022-02-20 21:53:41,486 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,486 INFO L290 TraceCheckUtils]: 3: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,486 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {30536#true} {30536#true} #2163#return; {30536#true} is VALID [2022-02-20 21:53:41,487 INFO L290 TraceCheckUtils]: 5: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,487 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {30536#true} {30536#true} #2213#return; {30536#true} is VALID [2022-02-20 21:53:41,488 INFO L290 TraceCheckUtils]: 0: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {30536#true} is VALID [2022-02-20 21:53:41,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {30536#true} is VALID [2022-02-20 21:53:41,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {30536#true} is VALID [2022-02-20 21:53:41,488 INFO L290 TraceCheckUtils]: 3: Hoare triple {30536#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,489 INFO L272 TraceCheckUtils]: 4: Hoare triple {30536#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,489 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,490 INFO L272 TraceCheckUtils]: 6: Hoare triple {30536#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,490 INFO L290 TraceCheckUtils]: 7: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,491 INFO L290 TraceCheckUtils]: 8: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,491 INFO L290 TraceCheckUtils]: 9: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,491 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {30536#true} {30536#true} #2179#return; {30536#true} is VALID [2022-02-20 21:53:41,491 INFO L290 TraceCheckUtils]: 11: Hoare triple {30536#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,491 INFO L290 TraceCheckUtils]: 12: Hoare triple {30536#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,491 INFO L290 TraceCheckUtils]: 13: Hoare triple {30536#true} assume !false; {30536#true} is VALID [2022-02-20 21:53:41,492 INFO L290 TraceCheckUtils]: 14: Hoare triple {30536#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {30536#true} is VALID [2022-02-20 21:53:41,492 INFO L290 TraceCheckUtils]: 15: Hoare triple {30536#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {30536#true} is VALID [2022-02-20 21:53:41,492 INFO L290 TraceCheckUtils]: 16: Hoare triple {30536#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,492 INFO L290 TraceCheckUtils]: 17: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,492 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {30536#true} {30536#true} #2207#return; {30536#true} is VALID [2022-02-20 21:53:41,493 INFO L290 TraceCheckUtils]: 19: Hoare triple {30536#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,493 INFO L290 TraceCheckUtils]: 20: Hoare triple {30536#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,493 INFO L290 TraceCheckUtils]: 21: Hoare triple {30536#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {30536#true} is VALID [2022-02-20 21:53:41,493 INFO L290 TraceCheckUtils]: 22: Hoare triple {30536#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,493 INFO L272 TraceCheckUtils]: 23: Hoare triple {30536#true} call trigger_receive(~card#1.base, ~card#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,493 INFO L290 TraceCheckUtils]: 24: Hoare triple {30536#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {30536#true} is VALID [2022-02-20 21:53:41,494 INFO L272 TraceCheckUtils]: 25: Hoare triple {30536#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {30536#true} is VALID [2022-02-20 21:53:41,494 INFO L290 TraceCheckUtils]: 26: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,494 INFO L290 TraceCheckUtils]: 27: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,494 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {30536#true} {30536#true} #2163#return; {30536#true} is VALID [2022-02-20 21:53:41,494 INFO L290 TraceCheckUtils]: 29: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,495 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {30536#true} {30536#true} #2213#return; {30536#true} is VALID [2022-02-20 21:53:41,495 INFO L290 TraceCheckUtils]: 31: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,495 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {30536#true} {30537#false} #2203#return; {30537#false} is VALID [2022-02-20 21:53:41,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 67 [2022-02-20 21:53:41,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:53:41,500 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,501 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume { :end_inline__raw_spin_unlock } true; {30536#true} is VALID [2022-02-20 21:53:41,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30536#true} {30537#false} #2205#return; {30537#false} is VALID [2022-02-20 21:53:41,501 INFO L290 TraceCheckUtils]: 0: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~irq#1 := #in~irq#1;~dev_instance#1.base, ~dev_instance#1.offset := #in~dev_instance#1.base, #in~dev_instance#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~card~1#1.base, ~card~1#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~ioaddr~0#1.base, ~ioaddr~0#1.offset;havoc ~status~0#1;havoc ~i~0#1;havoc ~newlink~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;~dev~2#1.base, ~dev~2#1.offset := ~dev_instance#1.base, ~dev_instance#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,502 INFO L272 TraceCheckUtils]: 1: Hoare triple {30536#true} call #t~ret209#1.base, #t~ret209#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,502 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {30536#true} is VALID [2022-02-20 21:53:41,502 INFO L290 TraceCheckUtils]: 3: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,502 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {30536#true} {30536#true} #2187#return; {30536#true} is VALID [2022-02-20 21:53:41,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {30536#true} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret209#1.base, #t~ret209#1.offset;havoc #t~ret209#1.base, #t~ret209#1.offset;~card~1#1.base, ~card~1#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;call #t~mem210#1.base, #t~mem210#1.offset := read~$Pointer$(~card~1#1.base, 64 + ~card~1#1.offset, 8);~ioaddr~0#1.base, ~ioaddr~0#1.offset := #t~mem210#1.base, #t~mem210#1.offset;havoc #t~mem210#1.base, #t~mem210#1.offset;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := ~card~1#1.base, 80 + ~card~1#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {30536#true} assume { :end_inline__raw_spin_lock } true; {30536#true} is VALID [2022-02-20 21:53:41,503 INFO L290 TraceCheckUtils]: 7: Hoare triple {30536#true} assume { :end_inline_spin_lock } true; {30536#true} is VALID [2022-02-20 21:53:41,504 INFO L272 TraceCheckUtils]: 8: Hoare triple {30536#true} call #t~ret211#1 := ioread32(~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,504 INFO L290 TraceCheckUtils]: 9: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,504 INFO L290 TraceCheckUtils]: 10: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,504 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {30536#true} {30536#true} #2189#return; {30536#true} is VALID [2022-02-20 21:53:41,504 INFO L290 TraceCheckUtils]: 12: Hoare triple {30536#true} ~status~0#1 := #t~ret211#1;havoc #t~ret211#1; {30536#true} is VALID [2022-02-20 21:53:41,505 INFO L290 TraceCheckUtils]: 13: Hoare triple {30536#true} assume !(0 == ~status~0#1 % 4294967296 || 4294967295 == ~status~0#1 % 4294967296);assume { :begin_inline_link_status_changed } true;link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset := ~card~1#1.base, ~card~1#1.offset;havoc link_status_changed_#res#1;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset, link_status_changed_#t~ret299#1, link_status_changed_~card#1.base, link_status_changed_~card#1.offset, link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset, link_status_changed_~val~2#1;link_status_changed_~card#1.base, link_status_changed_~card#1.offset := link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset;havoc link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset;havoc link_status_changed_~val~2#1;call link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset := read~$Pointer$(link_status_changed_~card#1.base, 64 + link_status_changed_~card#1.offset, 8);link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset := link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,506 INFO L272 TraceCheckUtils]: 14: Hoare triple {30536#true} call link_status_changed_#t~ret299#1 := ioread32(link_status_changed_~ioaddr~6#1.base, 40 + link_status_changed_~ioaddr~6#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,506 INFO L290 TraceCheckUtils]: 15: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,506 INFO L290 TraceCheckUtils]: 16: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,507 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {30536#true} {30536#true} #2193#return; {30536#true} is VALID [2022-02-20 21:53:41,508 INFO L290 TraceCheckUtils]: 18: Hoare triple {30536#true} link_status_changed_~val~2#1 := link_status_changed_#t~ret299#1;havoc link_status_changed_#t~ret299#1; {30536#true} is VALID [2022-02-20 21:53:41,508 INFO L290 TraceCheckUtils]: 19: Hoare triple {30536#true} assume 0 == (if 0 == link_status_changed_~val~2#1 then 0 else (if 1 == link_status_changed_~val~2#1 then 0 else ~bitwiseAnd(link_status_changed_~val~2#1, 134217728))) % 4294967296;link_status_changed_#res#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,508 INFO L290 TraceCheckUtils]: 20: Hoare triple {30536#true} #t~ret212#1 := link_status_changed_#res#1;assume { :end_inline_link_status_changed } true;assume -2147483648 <= #t~ret212#1 && #t~ret212#1 <= 2147483647;~tmp___1~3#1 := #t~ret212#1;havoc #t~ret212#1; {30536#true} is VALID [2022-02-20 21:53:41,508 INFO L290 TraceCheckUtils]: 21: Hoare triple {30536#true} assume !(0 != ~tmp___1~3#1); {30536#true} is VALID [2022-02-20 21:53:41,509 INFO L290 TraceCheckUtils]: 22: Hoare triple {30536#true} ~status~0#1 := 4294967295; {30536#true} is VALID [2022-02-20 21:53:41,509 INFO L272 TraceCheckUtils]: 23: Hoare triple {30536#true} call iowrite32(~status~0#1, ~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,509 INFO L290 TraceCheckUtils]: 24: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,509 INFO L290 TraceCheckUtils]: 25: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,509 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {30536#true} {30536#true} #2199#return; {30536#true} is VALID [2022-02-20 21:53:41,510 INFO L290 TraceCheckUtils]: 27: Hoare triple {30536#true} ~i~0#1 := 0; {30724#(= |xircom_interrupt_~i~0#1| 0)} is VALID [2022-02-20 21:53:41,510 INFO L290 TraceCheckUtils]: 28: Hoare triple {30724#(= |xircom_interrupt_~i~0#1| 0)} assume !(~i~0#1 <= 3);~i~0#1 := 0; {30537#false} is VALID [2022-02-20 21:53:41,510 INFO L290 TraceCheckUtils]: 29: Hoare triple {30537#false} assume ~i~0#1 <= 3; {30537#false} is VALID [2022-02-20 21:53:41,510 INFO L290 TraceCheckUtils]: 30: Hoare triple {30537#false} call #t~mem219#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {30537#false} is VALID [2022-02-20 21:53:41,511 INFO L272 TraceCheckUtils]: 31: Hoare triple {30537#false} call investigate_read_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem219#1); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,511 INFO L290 TraceCheckUtils]: 32: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {30536#true} is VALID [2022-02-20 21:53:41,511 INFO L290 TraceCheckUtils]: 33: Hoare triple {30536#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {30536#true} is VALID [2022-02-20 21:53:41,511 INFO L290 TraceCheckUtils]: 34: Hoare triple {30536#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {30536#true} is VALID [2022-02-20 21:53:41,511 INFO L290 TraceCheckUtils]: 35: Hoare triple {30536#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,512 INFO L272 TraceCheckUtils]: 36: Hoare triple {30536#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,512 INFO L290 TraceCheckUtils]: 37: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,513 INFO L272 TraceCheckUtils]: 38: Hoare triple {30536#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,513 INFO L290 TraceCheckUtils]: 39: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,513 INFO L290 TraceCheckUtils]: 40: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,513 INFO L290 TraceCheckUtils]: 41: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,514 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {30536#true} {30536#true} #2179#return; {30536#true} is VALID [2022-02-20 21:53:41,514 INFO L290 TraceCheckUtils]: 43: Hoare triple {30536#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,514 INFO L290 TraceCheckUtils]: 44: Hoare triple {30536#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,514 INFO L290 TraceCheckUtils]: 45: Hoare triple {30536#true} assume !false; {30536#true} is VALID [2022-02-20 21:53:41,514 INFO L290 TraceCheckUtils]: 46: Hoare triple {30536#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {30536#true} is VALID [2022-02-20 21:53:41,514 INFO L290 TraceCheckUtils]: 47: Hoare triple {30536#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {30536#true} is VALID [2022-02-20 21:53:41,515 INFO L290 TraceCheckUtils]: 48: Hoare triple {30536#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,515 INFO L290 TraceCheckUtils]: 49: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,515 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {30536#true} {30536#true} #2207#return; {30536#true} is VALID [2022-02-20 21:53:41,515 INFO L290 TraceCheckUtils]: 51: Hoare triple {30536#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,515 INFO L290 TraceCheckUtils]: 52: Hoare triple {30536#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,515 INFO L290 TraceCheckUtils]: 53: Hoare triple {30536#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {30536#true} is VALID [2022-02-20 21:53:41,516 INFO L290 TraceCheckUtils]: 54: Hoare triple {30536#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,516 INFO L272 TraceCheckUtils]: 55: Hoare triple {30536#true} call trigger_receive(~card#1.base, ~card#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,516 INFO L290 TraceCheckUtils]: 56: Hoare triple {30536#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {30536#true} is VALID [2022-02-20 21:53:41,516 INFO L272 TraceCheckUtils]: 57: Hoare triple {30536#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {30536#true} is VALID [2022-02-20 21:53:41,516 INFO L290 TraceCheckUtils]: 58: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,517 INFO L290 TraceCheckUtils]: 59: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,517 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {30536#true} {30536#true} #2163#return; {30536#true} is VALID [2022-02-20 21:53:41,517 INFO L290 TraceCheckUtils]: 61: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,517 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {30536#true} {30536#true} #2213#return; {30536#true} is VALID [2022-02-20 21:53:41,518 INFO L290 TraceCheckUtils]: 63: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,518 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {30536#true} {30537#false} #2203#return; {30537#false} is VALID [2022-02-20 21:53:41,518 INFO L290 TraceCheckUtils]: 65: Hoare triple {30537#false} havoc #t~mem219#1;~i~0#1 := 1 + ~i~0#1; {30537#false} is VALID [2022-02-20 21:53:41,518 INFO L290 TraceCheckUtils]: 66: Hoare triple {30537#false} assume !(~i~0#1 <= 3); {30537#false} is VALID [2022-02-20 21:53:41,519 INFO L272 TraceCheckUtils]: 67: Hoare triple {30537#false} call spin_unlock(~card~1#1.base, 80 + ~card~1#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,519 INFO L290 TraceCheckUtils]: 68: Hoare triple {30536#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,519 INFO L290 TraceCheckUtils]: 69: Hoare triple {30536#true} assume { :end_inline__raw_spin_unlock } true; {30536#true} is VALID [2022-02-20 21:53:41,519 INFO L290 TraceCheckUtils]: 70: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,519 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {30536#true} {30537#false} #2205#return; {30537#false} is VALID [2022-02-20 21:53:41,520 INFO L290 TraceCheckUtils]: 72: Hoare triple {30537#false} #res#1 := 1;call ULTIMATE.dealloc(~#descriptor~0#1.base, ~#descriptor~0#1.offset);havoc ~#descriptor~0#1.base, ~#descriptor~0#1.offset; {30537#false} is VALID [2022-02-20 21:53:41,520 INFO L290 TraceCheckUtils]: 73: Hoare triple {30537#false} assume true; {30537#false} is VALID [2022-02-20 21:53:41,520 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {30537#false} {30536#true} #2149#return; {30537#false} is VALID [2022-02-20 21:53:41,520 INFO L290 TraceCheckUtils]: 0: Hoare triple {30635#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~LDV_IN_INTERRUPT~0)| ~LDV_IN_INTERRUPT~0) (= |old(~last_index~0)| ~last_index~0))} ~state := #in~state;~line := #in~line;~data.base, ~data.offset := #in~data.base, #in~data.offset;havoc ~irq_retval~0;havoc ~tmp~40; {30536#true} is VALID [2022-02-20 21:53:41,521 INFO L290 TraceCheckUtils]: 1: Hoare triple {30536#true} assume 0 != ~state;assume -2147483648 <= #t~nondet418 && #t~nondet418 <= 2147483647;~tmp~40 := #t~nondet418;havoc #t~nondet418;#t~switch419 := 0 == ~tmp~40; {30536#true} is VALID [2022-02-20 21:53:41,521 INFO L290 TraceCheckUtils]: 2: Hoare triple {30536#true} assume #t~switch419; {30536#true} is VALID [2022-02-20 21:53:41,521 INFO L290 TraceCheckUtils]: 3: Hoare triple {30536#true} assume 1 == ~state;~LDV_IN_INTERRUPT~0 := 2; {30536#true} is VALID [2022-02-20 21:53:41,522 INFO L272 TraceCheckUtils]: 4: Hoare triple {30536#true} call #t~ret420 := xircom_interrupt(~line, ~data.base, ~data.offset); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,522 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~irq#1 := #in~irq#1;~dev_instance#1.base, ~dev_instance#1.offset := #in~dev_instance#1.base, #in~dev_instance#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~card~1#1.base, ~card~1#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~ioaddr~0#1.base, ~ioaddr~0#1.offset;havoc ~status~0#1;havoc ~i~0#1;havoc ~newlink~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;~dev~2#1.base, ~dev~2#1.offset := ~dev_instance#1.base, ~dev_instance#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,522 INFO L272 TraceCheckUtils]: 6: Hoare triple {30536#true} call #t~ret209#1.base, #t~ret209#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,522 INFO L290 TraceCheckUtils]: 7: Hoare triple {30536#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {30536#true} is VALID [2022-02-20 21:53:41,523 INFO L290 TraceCheckUtils]: 8: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,523 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {30536#true} {30536#true} #2187#return; {30536#true} is VALID [2022-02-20 21:53:41,523 INFO L290 TraceCheckUtils]: 10: Hoare triple {30536#true} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret209#1.base, #t~ret209#1.offset;havoc #t~ret209#1.base, #t~ret209#1.offset;~card~1#1.base, ~card~1#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;call #t~mem210#1.base, #t~mem210#1.offset := read~$Pointer$(~card~1#1.base, 64 + ~card~1#1.offset, 8);~ioaddr~0#1.base, ~ioaddr~0#1.offset := #t~mem210#1.base, #t~mem210#1.offset;havoc #t~mem210#1.base, #t~mem210#1.offset;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := ~card~1#1.base, 80 + ~card~1#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,523 INFO L290 TraceCheckUtils]: 11: Hoare triple {30536#true} assume { :end_inline__raw_spin_lock } true; {30536#true} is VALID [2022-02-20 21:53:41,523 INFO L290 TraceCheckUtils]: 12: Hoare triple {30536#true} assume { :end_inline_spin_lock } true; {30536#true} is VALID [2022-02-20 21:53:41,523 INFO L272 TraceCheckUtils]: 13: Hoare triple {30536#true} call #t~ret211#1 := ioread32(~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,524 INFO L290 TraceCheckUtils]: 14: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,524 INFO L290 TraceCheckUtils]: 15: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,524 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {30536#true} {30536#true} #2189#return; {30536#true} is VALID [2022-02-20 21:53:41,524 INFO L290 TraceCheckUtils]: 17: Hoare triple {30536#true} ~status~0#1 := #t~ret211#1;havoc #t~ret211#1; {30536#true} is VALID [2022-02-20 21:53:41,524 INFO L290 TraceCheckUtils]: 18: Hoare triple {30536#true} assume !(0 == ~status~0#1 % 4294967296 || 4294967295 == ~status~0#1 % 4294967296);assume { :begin_inline_link_status_changed } true;link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset := ~card~1#1.base, ~card~1#1.offset;havoc link_status_changed_#res#1;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset, link_status_changed_#t~ret299#1, link_status_changed_~card#1.base, link_status_changed_~card#1.offset, link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset, link_status_changed_~val~2#1;link_status_changed_~card#1.base, link_status_changed_~card#1.offset := link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset;havoc link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset;havoc link_status_changed_~val~2#1;call link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset := read~$Pointer$(link_status_changed_~card#1.base, 64 + link_status_changed_~card#1.offset, 8);link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset := link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,524 INFO L272 TraceCheckUtils]: 19: Hoare triple {30536#true} call link_status_changed_#t~ret299#1 := ioread32(link_status_changed_~ioaddr~6#1.base, 40 + link_status_changed_~ioaddr~6#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,525 INFO L290 TraceCheckUtils]: 20: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,525 INFO L290 TraceCheckUtils]: 21: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,525 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {30536#true} {30536#true} #2193#return; {30536#true} is VALID [2022-02-20 21:53:41,525 INFO L290 TraceCheckUtils]: 23: Hoare triple {30536#true} link_status_changed_~val~2#1 := link_status_changed_#t~ret299#1;havoc link_status_changed_#t~ret299#1; {30536#true} is VALID [2022-02-20 21:53:41,525 INFO L290 TraceCheckUtils]: 24: Hoare triple {30536#true} assume 0 == (if 0 == link_status_changed_~val~2#1 then 0 else (if 1 == link_status_changed_~val~2#1 then 0 else ~bitwiseAnd(link_status_changed_~val~2#1, 134217728))) % 4294967296;link_status_changed_#res#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,525 INFO L290 TraceCheckUtils]: 25: Hoare triple {30536#true} #t~ret212#1 := link_status_changed_#res#1;assume { :end_inline_link_status_changed } true;assume -2147483648 <= #t~ret212#1 && #t~ret212#1 <= 2147483647;~tmp___1~3#1 := #t~ret212#1;havoc #t~ret212#1; {30536#true} is VALID [2022-02-20 21:53:41,526 INFO L290 TraceCheckUtils]: 26: Hoare triple {30536#true} assume !(0 != ~tmp___1~3#1); {30536#true} is VALID [2022-02-20 21:53:41,526 INFO L290 TraceCheckUtils]: 27: Hoare triple {30536#true} ~status~0#1 := 4294967295; {30536#true} is VALID [2022-02-20 21:53:41,526 INFO L272 TraceCheckUtils]: 28: Hoare triple {30536#true} call iowrite32(~status~0#1, ~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,526 INFO L290 TraceCheckUtils]: 29: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,526 INFO L290 TraceCheckUtils]: 30: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,526 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {30536#true} {30536#true} #2199#return; {30536#true} is VALID [2022-02-20 21:53:41,527 INFO L290 TraceCheckUtils]: 32: Hoare triple {30536#true} ~i~0#1 := 0; {30724#(= |xircom_interrupt_~i~0#1| 0)} is VALID [2022-02-20 21:53:41,527 INFO L290 TraceCheckUtils]: 33: Hoare triple {30724#(= |xircom_interrupt_~i~0#1| 0)} assume !(~i~0#1 <= 3);~i~0#1 := 0; {30537#false} is VALID [2022-02-20 21:53:41,527 INFO L290 TraceCheckUtils]: 34: Hoare triple {30537#false} assume ~i~0#1 <= 3; {30537#false} is VALID [2022-02-20 21:53:41,528 INFO L290 TraceCheckUtils]: 35: Hoare triple {30537#false} call #t~mem219#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {30537#false} is VALID [2022-02-20 21:53:41,528 INFO L272 TraceCheckUtils]: 36: Hoare triple {30537#false} call investigate_read_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem219#1); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,528 INFO L290 TraceCheckUtils]: 37: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {30536#true} is VALID [2022-02-20 21:53:41,528 INFO L290 TraceCheckUtils]: 38: Hoare triple {30536#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {30536#true} is VALID [2022-02-20 21:53:41,528 INFO L290 TraceCheckUtils]: 39: Hoare triple {30536#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {30536#true} is VALID [2022-02-20 21:53:41,528 INFO L290 TraceCheckUtils]: 40: Hoare triple {30536#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,529 INFO L272 TraceCheckUtils]: 41: Hoare triple {30536#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,529 INFO L290 TraceCheckUtils]: 42: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,530 INFO L272 TraceCheckUtils]: 43: Hoare triple {30536#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,530 INFO L290 TraceCheckUtils]: 44: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,530 INFO L290 TraceCheckUtils]: 45: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,530 INFO L290 TraceCheckUtils]: 46: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,530 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {30536#true} {30536#true} #2179#return; {30536#true} is VALID [2022-02-20 21:53:41,531 INFO L290 TraceCheckUtils]: 48: Hoare triple {30536#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,531 INFO L290 TraceCheckUtils]: 49: Hoare triple {30536#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,531 INFO L290 TraceCheckUtils]: 50: Hoare triple {30536#true} assume !false; {30536#true} is VALID [2022-02-20 21:53:41,531 INFO L290 TraceCheckUtils]: 51: Hoare triple {30536#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {30536#true} is VALID [2022-02-20 21:53:41,531 INFO L290 TraceCheckUtils]: 52: Hoare triple {30536#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {30536#true} is VALID [2022-02-20 21:53:41,531 INFO L290 TraceCheckUtils]: 53: Hoare triple {30536#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,532 INFO L290 TraceCheckUtils]: 54: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,532 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {30536#true} {30536#true} #2207#return; {30536#true} is VALID [2022-02-20 21:53:41,532 INFO L290 TraceCheckUtils]: 56: Hoare triple {30536#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,532 INFO L290 TraceCheckUtils]: 57: Hoare triple {30536#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,532 INFO L290 TraceCheckUtils]: 58: Hoare triple {30536#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {30536#true} is VALID [2022-02-20 21:53:41,532 INFO L290 TraceCheckUtils]: 59: Hoare triple {30536#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,533 INFO L272 TraceCheckUtils]: 60: Hoare triple {30536#true} call trigger_receive(~card#1.base, ~card#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,533 INFO L290 TraceCheckUtils]: 61: Hoare triple {30536#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {30536#true} is VALID [2022-02-20 21:53:41,533 INFO L272 TraceCheckUtils]: 62: Hoare triple {30536#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {30536#true} is VALID [2022-02-20 21:53:41,533 INFO L290 TraceCheckUtils]: 63: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,533 INFO L290 TraceCheckUtils]: 64: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,533 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {30536#true} {30536#true} #2163#return; {30536#true} is VALID [2022-02-20 21:53:41,538 INFO L290 TraceCheckUtils]: 66: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,538 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {30536#true} {30536#true} #2213#return; {30536#true} is VALID [2022-02-20 21:53:41,538 INFO L290 TraceCheckUtils]: 68: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,538 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {30536#true} {30537#false} #2203#return; {30537#false} is VALID [2022-02-20 21:53:41,539 INFO L290 TraceCheckUtils]: 70: Hoare triple {30537#false} havoc #t~mem219#1;~i~0#1 := 1 + ~i~0#1; {30537#false} is VALID [2022-02-20 21:53:41,539 INFO L290 TraceCheckUtils]: 71: Hoare triple {30537#false} assume !(~i~0#1 <= 3); {30537#false} is VALID [2022-02-20 21:53:41,539 INFO L272 TraceCheckUtils]: 72: Hoare triple {30537#false} call spin_unlock(~card~1#1.base, 80 + ~card~1#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,539 INFO L290 TraceCheckUtils]: 73: Hoare triple {30536#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,539 INFO L290 TraceCheckUtils]: 74: Hoare triple {30536#true} assume { :end_inline__raw_spin_unlock } true; {30536#true} is VALID [2022-02-20 21:53:41,540 INFO L290 TraceCheckUtils]: 75: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,540 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {30536#true} {30537#false} #2205#return; {30537#false} is VALID [2022-02-20 21:53:41,540 INFO L290 TraceCheckUtils]: 77: Hoare triple {30537#false} #res#1 := 1;call ULTIMATE.dealloc(~#descriptor~0#1.base, ~#descriptor~0#1.offset);havoc ~#descriptor~0#1.base, ~#descriptor~0#1.offset; {30537#false} is VALID [2022-02-20 21:53:41,540 INFO L290 TraceCheckUtils]: 78: Hoare triple {30537#false} assume true; {30537#false} is VALID [2022-02-20 21:53:41,540 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {30537#false} {30536#true} #2149#return; {30537#false} is VALID [2022-02-20 21:53:41,540 INFO L290 TraceCheckUtils]: 80: Hoare triple {30537#false} assume -2147483648 <= #t~ret420 && #t~ret420 <= 2147483647;~irq_retval~0 := #t~ret420;havoc #t~ret420;~LDV_IN_INTERRUPT~0 := 1;#res := ~state; {30537#false} is VALID [2022-02-20 21:53:41,541 INFO L290 TraceCheckUtils]: 81: Hoare triple {30537#false} assume true; {30537#false} is VALID [2022-02-20 21:53:41,541 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {30537#false} {30538#(= ~ldv_irq_1_2~0 0)} #2241#return; {30537#false} is VALID [2022-02-20 21:53:41,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {30536#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(119, 2);call #Ultimate.allocInit(37, 3);call #Ultimate.allocInit(26, 4);call #Ultimate.allocInit(74, 5);call #Ultimate.allocInit(10, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(46, 8);call #Ultimate.allocInit(13, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(47, 11);call #Ultimate.allocInit(13, 12);call #Ultimate.allocInit(38, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(240, 16);call #Ultimate.allocInit(25, 17);call #Ultimate.allocInit(25, 18);call #Ultimate.allocInit(17, 19);call #Ultimate.allocInit(44, 20);call #Ultimate.allocInit(31, 21);call #Ultimate.allocInit(32, 22);call #Ultimate.allocInit(31, 23);call #Ultimate.allocInit(34, 24);call #Ultimate.allocInit(35, 25);call #Ultimate.allocInit(34, 26);call #Ultimate.allocInit(10, 27);call #Ultimate.allocInit(17, 28);call #Ultimate.allocInit(240, 29);call #Ultimate.allocInit(6, 30);call write~init~int(32, 30, 0, 1);call write~init~int(37, 30, 1, 1);call write~init~int(112, 30, 2, 1);call write~init~int(77, 30, 3, 1);call write~init~int(10, 30, 4, 1);call write~init~int(0, 30, 5, 1);call #Ultimate.allocInit(17, 31);call #Ultimate.allocInit(27, 32);call #Ultimate.allocInit(10, 33);~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~netdev_ops_group1~0.base, ~netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ref_cnt~0 := 0;~xircom_ops_group0~0.base, ~xircom_ops_group0~0.offset := 0, 0;~ldv_irq_line_1_1~0 := 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~#bufferoffsets~0.base, ~#bufferoffsets~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(128, ~#bufferoffsets~0.base, ~#bufferoffsets~0.offset, 4);call write~init~int(2048, ~#bufferoffsets~0.base, 4 + ~#bufferoffsets~0.offset, 4);call write~init~int(4096, ~#bufferoffsets~0.base, 8 + ~#bufferoffsets~0.offset, 4);call write~init~int(6144, ~#bufferoffsets~0.base, 12 + ~#bufferoffsets~0.offset, 4);~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset := 35, 0;call #Ultimate.allocInit(64, 35);call write~init~int(4445, ~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, 4);call write~init~int(3, ~#xircom_pci_table~0.base, 4 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 8 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 12 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 16 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 20 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 24 + ~#xircom_pci_table~0.offset, 8);call write~init~int(0, ~#xircom_pci_table~0.base, 32 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 36 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 40 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 44 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 48 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 52 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 56 + ~#xircom_pci_table~0.offset, 8);~__mod_pci__xircom_pci_table_device_table~0.vendor := 0;~__mod_pci__xircom_pci_table_device_table~0.device := 0;~__mod_pci__xircom_pci_table_device_table~0.subvendor := 0;~__mod_pci__xircom_pci_table_device_table~0.subdevice := 0;~__mod_pci__xircom_pci_table_device_table~0.class := 0;~__mod_pci__xircom_pci_table_device_table~0.class_mask := 0;~__mod_pci__xircom_pci_table_device_table~0.driver_data := 0;~#xircom_ops~0.base, ~#xircom_ops~0.offset := 36, 0;call #Ultimate.allocInit(301, 36);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 8 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(6, 0, ~#xircom_ops~0.base, 16 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, ~#xircom_ops~0.base, 24 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_probe.base, #funAddr~xircom_probe.offset, ~#xircom_ops~0.base, 32 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_remove.base, #funAddr~xircom_remove.offset, ~#xircom_ops~0.base, 40 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 48 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 56 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 64 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 72 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 80 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 88 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 96 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 104 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 112 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 120 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 128 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 136 + ~#xircom_ops~0.offset, 1);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 137 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 145 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 153 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 161 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 169 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 177 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 185 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 193 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 201 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 209 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 217 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 221 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 225 + ~#xircom_ops~0.offset, 4);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 229 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 237 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 245 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 253 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 261 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 269 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 273 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 285 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 293 + ~#xircom_ops~0.offset, 8);~#netdev_ops~0.base, ~#netdev_ops~0.offset := 37, 0;call #Ultimate.allocInit(480, 37);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 8 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_open.base, #funAddr~xircom_open.offset, ~#netdev_ops~0.base, 16 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_close.base, #funAddr~xircom_close.offset, ~#netdev_ops~0.base, 24 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_start_xmit.base, #funAddr~xircom_start_xmit.offset, ~#netdev_ops~0.base, 32 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 40 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 48 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 56 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#netdev_ops~0.base, 64 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#netdev_ops~0.base, 72 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 80 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 88 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#netdev_ops~0.base, 96 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 104 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 112 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 120 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 128 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 136 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 144 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_poll_controller.base, #funAddr~xircom_poll_controller.offset, ~#netdev_ops~0.base, 152 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 160 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 168 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 176 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 184 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 192 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 200 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 208 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 216 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 224 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 232 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 240 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 248 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 256 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 264 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 272 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 280 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 288 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 296 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 304 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 312 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 320 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 328 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 336 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 344 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 352 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 360 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 368 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 376 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 384 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 392 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 400 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 408 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 416 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 424 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 432 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 440 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 448 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 456 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 464 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 472 + ~#netdev_ops~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~#set_impl~0.base, ~#set_impl~0.offset := 38, 0;call #Ultimate.allocInit(120, 38);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base);~last_index~0 := 0;~LDV_SKBS~0.base, ~LDV_SKBS~0.offset := 0, 0; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset, main_#t~ret429#1.base, main_#t~ret429#1.offset, main_#t~nondet430#1, main_#t~ret431#1.base, main_#t~ret431#1.offset, main_#t~nondet432#1, main_#t~switch433#1, main_#t~nondet434#1, main_#t~switch435#1, main_#t~ret436#1, main_#t~nondet437#1, main_#t~switch438#1, main_#t~ret439#1, main_#t~nondet440#1, main_#t~switch441#1, main_#t~ret442#1, main_#t~ret443#1, main_#t~ret444#1, main_#t~ret445#1, main_#t~ret446#1, main_#t~ret447#1, main_#t~ret448#1, main_#t~ret449#1, main_#t~ret450#1, main_#t~ret451#1, main_#t~ret452#1, main_#t~ret453#1, main_#t~ret454#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~43#1.base, main_~tmp~43#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset, main_~ldvarg3~0#1, main_~tmp___1~7#1, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset, main_~tmp___3~1#1, main_~tmp___4~1#1, main_~tmp___5~1#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~43#1.base, main_~tmp~43#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;havoc main_~ldvarg3~0#1;havoc main_~tmp___1~7#1;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;havoc main_~tmp___3~1#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~1#1;havoc main_~tmp___6~0#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,544 INFO L272 TraceCheckUtils]: 2: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} call main_#t~ret428#1.base, main_#t~ret428#1.offset := ldv_zalloc(32); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,544 INFO L290 TraceCheckUtils]: 3: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,544 INFO L290 TraceCheckUtils]: 4: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,544 INFO L290 TraceCheckUtils]: 5: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,545 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {30536#true} {30538#(= ~ldv_irq_1_2~0 0)} #2231#return; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,545 INFO L290 TraceCheckUtils]: 7: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} main_~tmp~43#1.base, main_~tmp~43#1.offset := main_#t~ret428#1.base, main_#t~ret428#1.offset;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~43#1.base, main_~tmp~43#1.offset; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,546 INFO L272 TraceCheckUtils]: 8: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} call main_#t~ret429#1.base, main_#t~ret429#1.offset := ldv_zalloc(1); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,546 INFO L290 TraceCheckUtils]: 10: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,547 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {30536#true} {30538#(= ~ldv_irq_1_2~0 0)} #2233#return; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,547 INFO L290 TraceCheckUtils]: 13: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset := main_#t~ret429#1.base, main_#t~ret429#1.offset;havoc main_#t~ret429#1.base, main_#t~ret429#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;assume -2147483648 <= main_#t~nondet430#1 && main_#t~nondet430#1 <= 2147483647;main_~tmp___1~7#1 := main_#t~nondet430#1;havoc main_#t~nondet430#1;main_~ldvarg3~0#1 := main_~tmp___1~7#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,548 INFO L272 TraceCheckUtils]: 14: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} call main_#t~ret431#1.base, main_#t~ret431#1.offset := ldv_zalloc(232); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,548 INFO L290 TraceCheckUtils]: 15: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,548 INFO L290 TraceCheckUtils]: 16: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,548 INFO L290 TraceCheckUtils]: 17: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,549 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {30536#true} {30538#(= ~ldv_irq_1_2~0 0)} #2235#return; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,549 INFO L290 TraceCheckUtils]: 19: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset := main_#t~ret431#1.base, main_#t~ret431#1.offset;havoc main_#t~ret431#1.base, main_#t~ret431#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;assume { :begin_inline_ldv_initialize } true;assume { :begin_inline_ldv_set_init } true;ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ~#set_impl~0.base, ~#set_impl~0.offset;~last_index~0 := 0; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,549 INFO L290 TraceCheckUtils]: 20: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume { :end_inline_ldv_set_init } true; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,550 INFO L290 TraceCheckUtils]: 21: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,550 INFO L290 TraceCheckUtils]: 22: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume -2147483648 <= main_#t~nondet432#1 && main_#t~nondet432#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet432#1;havoc main_#t~nondet432#1;main_#t~switch433#1 := 0 == main_~tmp___3~1#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,550 INFO L290 TraceCheckUtils]: 23: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume main_#t~switch433#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,551 INFO L290 TraceCheckUtils]: 24: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume 0 != ~ldv_state_variable_1~0;assume { :begin_inline_choose_interrupt_1 } true;havoc choose_interrupt_1_#t~nondet421#1, choose_interrupt_1_#t~switch422#1, choose_interrupt_1_#t~ret423#1, choose_interrupt_1_#t~ret424#1, choose_interrupt_1_#t~ret425#1, choose_interrupt_1_#t~ret426#1, choose_interrupt_1_~tmp~41#1;havoc choose_interrupt_1_~tmp~41#1;assume -2147483648 <= choose_interrupt_1_#t~nondet421#1 && choose_interrupt_1_#t~nondet421#1 <= 2147483647;choose_interrupt_1_~tmp~41#1 := choose_interrupt_1_#t~nondet421#1;havoc choose_interrupt_1_#t~nondet421#1;choose_interrupt_1_#t~switch422#1 := 0 == choose_interrupt_1_~tmp~41#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,551 INFO L290 TraceCheckUtils]: 25: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume !choose_interrupt_1_#t~switch422#1;choose_interrupt_1_#t~switch422#1 := choose_interrupt_1_#t~switch422#1 || 1 == choose_interrupt_1_~tmp~41#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,551 INFO L290 TraceCheckUtils]: 26: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume !choose_interrupt_1_#t~switch422#1;choose_interrupt_1_#t~switch422#1 := choose_interrupt_1_#t~switch422#1 || 2 == choose_interrupt_1_~tmp~41#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,552 INFO L290 TraceCheckUtils]: 27: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} assume choose_interrupt_1_#t~switch422#1; {30538#(= ~ldv_irq_1_2~0 0)} is VALID [2022-02-20 21:53:41,553 INFO L272 TraceCheckUtils]: 28: Hoare triple {30538#(= ~ldv_irq_1_2~0 0)} call choose_interrupt_1_#t~ret425#1 := ldv_irq_1(~ldv_irq_1_2~0, ~ldv_irq_line_1_2~0, ~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset); {30635#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~LDV_IN_INTERRUPT~0)| ~LDV_IN_INTERRUPT~0) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,553 INFO L290 TraceCheckUtils]: 29: Hoare triple {30635#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~LDV_IN_INTERRUPT~0)| ~LDV_IN_INTERRUPT~0) (= |old(~last_index~0)| ~last_index~0))} ~state := #in~state;~line := #in~line;~data.base, ~data.offset := #in~data.base, #in~data.offset;havoc ~irq_retval~0;havoc ~tmp~40; {30536#true} is VALID [2022-02-20 21:53:41,553 INFO L290 TraceCheckUtils]: 30: Hoare triple {30536#true} assume 0 != ~state;assume -2147483648 <= #t~nondet418 && #t~nondet418 <= 2147483647;~tmp~40 := #t~nondet418;havoc #t~nondet418;#t~switch419 := 0 == ~tmp~40; {30536#true} is VALID [2022-02-20 21:53:41,553 INFO L290 TraceCheckUtils]: 31: Hoare triple {30536#true} assume #t~switch419; {30536#true} is VALID [2022-02-20 21:53:41,553 INFO L290 TraceCheckUtils]: 32: Hoare triple {30536#true} assume 1 == ~state;~LDV_IN_INTERRUPT~0 := 2; {30536#true} is VALID [2022-02-20 21:53:41,557 INFO L272 TraceCheckUtils]: 33: Hoare triple {30536#true} call #t~ret420 := xircom_interrupt(~line, ~data.base, ~data.offset); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,559 INFO L290 TraceCheckUtils]: 34: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~irq#1 := #in~irq#1;~dev_instance#1.base, ~dev_instance#1.offset := #in~dev_instance#1.base, #in~dev_instance#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~card~1#1.base, ~card~1#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~ioaddr~0#1.base, ~ioaddr~0#1.offset;havoc ~status~0#1;havoc ~i~0#1;havoc ~newlink~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;~dev~2#1.base, ~dev~2#1.offset := ~dev_instance#1.base, ~dev_instance#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,564 INFO L272 TraceCheckUtils]: 35: Hoare triple {30536#true} call #t~ret209#1.base, #t~ret209#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,565 INFO L290 TraceCheckUtils]: 36: Hoare triple {30536#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {30536#true} is VALID [2022-02-20 21:53:41,565 INFO L290 TraceCheckUtils]: 37: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,566 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {30536#true} {30536#true} #2187#return; {30536#true} is VALID [2022-02-20 21:53:41,566 INFO L290 TraceCheckUtils]: 39: Hoare triple {30536#true} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret209#1.base, #t~ret209#1.offset;havoc #t~ret209#1.base, #t~ret209#1.offset;~card~1#1.base, ~card~1#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;call #t~mem210#1.base, #t~mem210#1.offset := read~$Pointer$(~card~1#1.base, 64 + ~card~1#1.offset, 8);~ioaddr~0#1.base, ~ioaddr~0#1.offset := #t~mem210#1.base, #t~mem210#1.offset;havoc #t~mem210#1.base, #t~mem210#1.offset;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := ~card~1#1.base, 80 + ~card~1#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,568 INFO L290 TraceCheckUtils]: 40: Hoare triple {30536#true} assume { :end_inline__raw_spin_lock } true; {30536#true} is VALID [2022-02-20 21:53:41,568 INFO L290 TraceCheckUtils]: 41: Hoare triple {30536#true} assume { :end_inline_spin_lock } true; {30536#true} is VALID [2022-02-20 21:53:41,570 INFO L272 TraceCheckUtils]: 42: Hoare triple {30536#true} call #t~ret211#1 := ioread32(~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,571 INFO L290 TraceCheckUtils]: 43: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,571 INFO L290 TraceCheckUtils]: 44: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,571 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {30536#true} {30536#true} #2189#return; {30536#true} is VALID [2022-02-20 21:53:41,571 INFO L290 TraceCheckUtils]: 46: Hoare triple {30536#true} ~status~0#1 := #t~ret211#1;havoc #t~ret211#1; {30536#true} is VALID [2022-02-20 21:53:41,571 INFO L290 TraceCheckUtils]: 47: Hoare triple {30536#true} assume !(0 == ~status~0#1 % 4294967296 || 4294967295 == ~status~0#1 % 4294967296);assume { :begin_inline_link_status_changed } true;link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset := ~card~1#1.base, ~card~1#1.offset;havoc link_status_changed_#res#1;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset, link_status_changed_#t~ret299#1, link_status_changed_~card#1.base, link_status_changed_~card#1.offset, link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset, link_status_changed_~val~2#1;link_status_changed_~card#1.base, link_status_changed_~card#1.offset := link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset;havoc link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset;havoc link_status_changed_~val~2#1;call link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset := read~$Pointer$(link_status_changed_~card#1.base, 64 + link_status_changed_~card#1.offset, 8);link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset := link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,571 INFO L272 TraceCheckUtils]: 48: Hoare triple {30536#true} call link_status_changed_#t~ret299#1 := ioread32(link_status_changed_~ioaddr~6#1.base, 40 + link_status_changed_~ioaddr~6#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L290 TraceCheckUtils]: 49: Hoare triple {30536#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L290 TraceCheckUtils]: 50: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {30536#true} {30536#true} #2193#return; {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L290 TraceCheckUtils]: 52: Hoare triple {30536#true} link_status_changed_~val~2#1 := link_status_changed_#t~ret299#1;havoc link_status_changed_#t~ret299#1; {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L290 TraceCheckUtils]: 53: Hoare triple {30536#true} assume 0 == (if 0 == link_status_changed_~val~2#1 then 0 else (if 1 == link_status_changed_~val~2#1 then 0 else ~bitwiseAnd(link_status_changed_~val~2#1, 134217728))) % 4294967296;link_status_changed_#res#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L290 TraceCheckUtils]: 54: Hoare triple {30536#true} #t~ret212#1 := link_status_changed_#res#1;assume { :end_inline_link_status_changed } true;assume -2147483648 <= #t~ret212#1 && #t~ret212#1 <= 2147483647;~tmp___1~3#1 := #t~ret212#1;havoc #t~ret212#1; {30536#true} is VALID [2022-02-20 21:53:41,572 INFO L290 TraceCheckUtils]: 55: Hoare triple {30536#true} assume !(0 != ~tmp___1~3#1); {30536#true} is VALID [2022-02-20 21:53:41,573 INFO L290 TraceCheckUtils]: 56: Hoare triple {30536#true} ~status~0#1 := 4294967295; {30536#true} is VALID [2022-02-20 21:53:41,573 INFO L272 TraceCheckUtils]: 57: Hoare triple {30536#true} call iowrite32(~status~0#1, ~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,573 INFO L290 TraceCheckUtils]: 58: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,573 INFO L290 TraceCheckUtils]: 59: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,573 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {30536#true} {30536#true} #2199#return; {30536#true} is VALID [2022-02-20 21:53:41,574 INFO L290 TraceCheckUtils]: 61: Hoare triple {30536#true} ~i~0#1 := 0; {30724#(= |xircom_interrupt_~i~0#1| 0)} is VALID [2022-02-20 21:53:41,574 INFO L290 TraceCheckUtils]: 62: Hoare triple {30724#(= |xircom_interrupt_~i~0#1| 0)} assume !(~i~0#1 <= 3);~i~0#1 := 0; {30537#false} is VALID [2022-02-20 21:53:41,574 INFO L290 TraceCheckUtils]: 63: Hoare triple {30537#false} assume ~i~0#1 <= 3; {30537#false} is VALID [2022-02-20 21:53:41,574 INFO L290 TraceCheckUtils]: 64: Hoare triple {30537#false} call #t~mem219#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {30537#false} is VALID [2022-02-20 21:53:41,574 INFO L272 TraceCheckUtils]: 65: Hoare triple {30537#false} call investigate_read_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem219#1); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,574 INFO L290 TraceCheckUtils]: 66: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {30536#true} is VALID [2022-02-20 21:53:41,575 INFO L290 TraceCheckUtils]: 67: Hoare triple {30536#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {30536#true} is VALID [2022-02-20 21:53:41,575 INFO L290 TraceCheckUtils]: 68: Hoare triple {30536#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {30536#true} is VALID [2022-02-20 21:53:41,575 INFO L290 TraceCheckUtils]: 69: Hoare triple {30536#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,576 INFO L272 TraceCheckUtils]: 70: Hoare triple {30536#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:53:41,576 INFO L290 TraceCheckUtils]: 71: Hoare triple {30711#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,576 INFO L272 TraceCheckUtils]: 72: Hoare triple {30536#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:53:41,576 INFO L290 TraceCheckUtils]: 73: Hoare triple {30634#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {30536#true} is VALID [2022-02-20 21:53:41,576 INFO L290 TraceCheckUtils]: 74: Hoare triple {30536#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L290 TraceCheckUtils]: 75: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {30536#true} {30536#true} #2179#return; {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L290 TraceCheckUtils]: 77: Hoare triple {30536#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L290 TraceCheckUtils]: 78: Hoare triple {30536#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L290 TraceCheckUtils]: 79: Hoare triple {30536#true} assume !false; {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L290 TraceCheckUtils]: 80: Hoare triple {30536#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {30536#true} is VALID [2022-02-20 21:53:41,577 INFO L290 TraceCheckUtils]: 81: Hoare triple {30536#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L290 TraceCheckUtils]: 82: Hoare triple {30536#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L290 TraceCheckUtils]: 83: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L284 TraceCheckUtils]: 84: Hoare quadruple {30536#true} {30536#true} #2207#return; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L290 TraceCheckUtils]: 85: Hoare triple {30536#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L290 TraceCheckUtils]: 86: Hoare triple {30536#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L290 TraceCheckUtils]: 87: Hoare triple {30536#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {30536#true} is VALID [2022-02-20 21:53:41,578 INFO L290 TraceCheckUtils]: 88: Hoare triple {30536#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,579 INFO L272 TraceCheckUtils]: 89: Hoare triple {30536#true} call trigger_receive(~card#1.base, ~card#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,579 INFO L290 TraceCheckUtils]: 90: Hoare triple {30536#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {30536#true} is VALID [2022-02-20 21:53:41,579 INFO L272 TraceCheckUtils]: 91: Hoare triple {30536#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {30536#true} is VALID [2022-02-20 21:53:41,579 INFO L290 TraceCheckUtils]: 92: Hoare triple {30536#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {30536#true} is VALID [2022-02-20 21:53:41,579 INFO L290 TraceCheckUtils]: 93: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,579 INFO L284 TraceCheckUtils]: 94: Hoare quadruple {30536#true} {30536#true} #2163#return; {30536#true} is VALID [2022-02-20 21:53:41,580 INFO L290 TraceCheckUtils]: 95: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,580 INFO L284 TraceCheckUtils]: 96: Hoare quadruple {30536#true} {30536#true} #2213#return; {30536#true} is VALID [2022-02-20 21:53:41,580 INFO L290 TraceCheckUtils]: 97: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,580 INFO L284 TraceCheckUtils]: 98: Hoare quadruple {30536#true} {30537#false} #2203#return; {30537#false} is VALID [2022-02-20 21:53:41,580 INFO L290 TraceCheckUtils]: 99: Hoare triple {30537#false} havoc #t~mem219#1;~i~0#1 := 1 + ~i~0#1; {30537#false} is VALID [2022-02-20 21:53:41,580 INFO L290 TraceCheckUtils]: 100: Hoare triple {30537#false} assume !(~i~0#1 <= 3); {30537#false} is VALID [2022-02-20 21:53:41,580 INFO L272 TraceCheckUtils]: 101: Hoare triple {30537#false} call spin_unlock(~card~1#1.base, 80 + ~card~1#1.offset); {30536#true} is VALID [2022-02-20 21:53:41,581 INFO L290 TraceCheckUtils]: 102: Hoare triple {30536#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {30536#true} is VALID [2022-02-20 21:53:41,581 INFO L290 TraceCheckUtils]: 103: Hoare triple {30536#true} assume { :end_inline__raw_spin_unlock } true; {30536#true} is VALID [2022-02-20 21:53:41,581 INFO L290 TraceCheckUtils]: 104: Hoare triple {30536#true} assume true; {30536#true} is VALID [2022-02-20 21:53:41,581 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {30536#true} {30537#false} #2205#return; {30537#false} is VALID [2022-02-20 21:53:41,581 INFO L290 TraceCheckUtils]: 106: Hoare triple {30537#false} #res#1 := 1;call ULTIMATE.dealloc(~#descriptor~0#1.base, ~#descriptor~0#1.offset);havoc ~#descriptor~0#1.base, ~#descriptor~0#1.offset; {30537#false} is VALID [2022-02-20 21:53:41,581 INFO L290 TraceCheckUtils]: 107: Hoare triple {30537#false} assume true; {30537#false} is VALID [2022-02-20 21:53:41,581 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {30537#false} {30536#true} #2149#return; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L290 TraceCheckUtils]: 109: Hoare triple {30537#false} assume -2147483648 <= #t~ret420 && #t~ret420 <= 2147483647;~irq_retval~0 := #t~ret420;havoc #t~ret420;~LDV_IN_INTERRUPT~0 := 1;#res := ~state; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L290 TraceCheckUtils]: 110: Hoare triple {30537#false} assume true; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L284 TraceCheckUtils]: 111: Hoare quadruple {30537#false} {30538#(= ~ldv_irq_1_2~0 0)} #2241#return; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L290 TraceCheckUtils]: 112: Hoare triple {30537#false} assume -2147483648 <= choose_interrupt_1_#t~ret425#1 && choose_interrupt_1_#t~ret425#1 <= 2147483647;~ldv_irq_1_0~0 := choose_interrupt_1_#t~ret425#1;havoc choose_interrupt_1_#t~ret425#1; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L290 TraceCheckUtils]: 113: Hoare triple {30537#false} assume { :end_inline_choose_interrupt_1 } true; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L290 TraceCheckUtils]: 114: Hoare triple {30537#false} assume -2147483648 <= main_#t~nondet432#1 && main_#t~nondet432#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet432#1;havoc main_#t~nondet432#1;main_#t~switch433#1 := 0 == main_~tmp___3~1#1; {30537#false} is VALID [2022-02-20 21:53:41,582 INFO L290 TraceCheckUtils]: 115: Hoare triple {30537#false} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 1 == main_~tmp___3~1#1; {30537#false} is VALID [2022-02-20 21:53:41,583 INFO L290 TraceCheckUtils]: 116: Hoare triple {30537#false} assume main_#t~switch433#1; {30537#false} is VALID [2022-02-20 21:53:41,583 INFO L290 TraceCheckUtils]: 117: Hoare triple {30537#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet434#1 && main_#t~nondet434#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet434#1;havoc main_#t~nondet434#1;main_#t~switch435#1 := 0 == main_~tmp___4~1#1; {30537#false} is VALID [2022-02-20 21:53:41,583 INFO L290 TraceCheckUtils]: 118: Hoare triple {30537#false} assume !main_#t~switch435#1;main_#t~switch435#1 := main_#t~switch435#1 || 1 == main_~tmp___4~1#1; {30537#false} is VALID [2022-02-20 21:53:41,583 INFO L290 TraceCheckUtils]: 119: Hoare triple {30537#false} assume main_#t~switch435#1; {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 120: Hoare triple {30537#false} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_xircom_ops_init } true;havoc xircom_ops_init_#res#1;havoc xircom_ops_init_#t~ret416#1, xircom_ops_init_~tmp~38#1;havoc xircom_ops_init_~tmp~38#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#xircom_ops~0.base, ~#xircom_ops~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 33, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet472#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet472#1 && __pci_register_driver_#t~nondet472#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet472#1;havoc __pci_register_driver_#t~nondet472#1; {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 121: Hoare triple {30537#false} xircom_ops_init_#t~ret416#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= xircom_ops_init_#t~ret416#1 && xircom_ops_init_#t~ret416#1 <= 2147483647;xircom_ops_init_~tmp~38#1 := xircom_ops_init_#t~ret416#1;havoc xircom_ops_init_#t~ret416#1;xircom_ops_init_#res#1 := xircom_ops_init_~tmp~38#1; {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 122: Hoare triple {30537#false} main_#t~ret436#1 := xircom_ops_init_#res#1;assume { :end_inline_xircom_ops_init } true;assume -2147483648 <= main_#t~ret436#1 && main_#t~ret436#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret436#1;havoc main_#t~ret436#1; {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 123: Hoare triple {30537#false} assume !(0 == ~ldv_retval_0~0); {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 124: Hoare triple {30537#false} assume 0 != ~ldv_retval_0~0;~ldv_state_variable_0~0 := 2; {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 125: Hoare triple {30537#false} assume { :begin_inline_ldv_check_final_state } true;havoc ldv_check_final_state_#t~ret469#1, ldv_check_final_state_~tmp___7~5#1;havoc ldv_check_final_state_~tmp___7~5#1;assume { :begin_inline_ldv_set_is_empty } true;ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_is_empty_#res#1;havoc ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset;ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset := ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset;ldv_set_is_empty_#res#1 := (if 0 == ~last_index~0 then 1 else 0); {30537#false} is VALID [2022-02-20 21:53:41,584 INFO L290 TraceCheckUtils]: 126: Hoare triple {30537#false} ldv_check_final_state_#t~ret469#1 := ldv_set_is_empty_#res#1;assume { :end_inline_ldv_set_is_empty } true;assume -2147483648 <= ldv_check_final_state_#t~ret469#1 && ldv_check_final_state_#t~ret469#1 <= 2147483647;ldv_check_final_state_~tmp___7~5#1 := ldv_check_final_state_#t~ret469#1;havoc ldv_check_final_state_#t~ret469#1; {30537#false} is VALID [2022-02-20 21:53:41,585 INFO L290 TraceCheckUtils]: 127: Hoare triple {30537#false} assume !(0 != ldv_check_final_state_~tmp___7~5#1); {30537#false} is VALID [2022-02-20 21:53:41,585 INFO L272 TraceCheckUtils]: 128: Hoare triple {30537#false} call ldv_error(); {30537#false} is VALID [2022-02-20 21:53:41,585 INFO L290 TraceCheckUtils]: 129: Hoare triple {30537#false} assume !false; {30537#false} is VALID [2022-02-20 21:53:41,586 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-02-20 21:53:41,586 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:53:41,587 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350536938] [2022-02-20 21:53:41,587 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350536938] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:53:41,587 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:53:41,588 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-02-20 21:53:41,588 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [81101369] [2022-02-20 21:53:41,588 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:53:41,589 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 130 [2022-02-20 21:53:41,590 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:53:41,591 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 21:53:41,671 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:53:41,671 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-02-20 21:53:41,671 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:53:41,671 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-02-20 21:53:41,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-02-20 21:53:41,672 INFO L87 Difference]: Start difference. First operand 3446 states and 4788 transitions. Second operand has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 21:53:58,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:53:58,277 INFO L93 Difference]: Finished difference Result 10690 states and 15047 transitions. [2022-02-20 21:53:58,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-02-20 21:53:58,277 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) Word has length 130 [2022-02-20 21:53:58,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:53:58,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 21:53:58,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 3785 transitions. [2022-02-20 21:53:58,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 21:53:58,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 3785 transitions. [2022-02-20 21:53:58,378 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 3785 transitions. [2022-02-20 21:54:01,008 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3785 edges. 3785 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:54:03,311 INFO L225 Difference]: With dead ends: 10690 [2022-02-20 21:54:03,312 INFO L226 Difference]: Without dead ends: 7254 [2022-02-20 21:54:03,327 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2022-02-20 21:54:03,327 INFO L933 BasicCegarLoop]: 1427 mSDtfsCounter, 1904 mSDsluCounter, 2839 mSDsCounter, 0 mSdLazyCounter, 2195 mSolverCounterSat, 896 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2090 SdHoareTripleChecker+Valid, 4266 SdHoareTripleChecker+Invalid, 3091 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 896 IncrementalHoareTripleChecker+Valid, 2195 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:54:03,328 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2090 Valid, 4266 Invalid, 3091 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [896 Valid, 2195 Invalid, 0 Unknown, 0 Unchecked, 4.0s Time] [2022-02-20 21:54:03,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7254 states. [2022-02-20 21:54:03,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7254 to 6894. [2022-02-20 21:54:03,490 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:54:03,500 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7254 states. Second operand has 6894 states, 5025 states have (on average 1.2829850746268656) internal successors, (6447), 5093 states have internal predecessors, (6447), 1512 states have call successors, (1512), 337 states have call predecessors, (1512), 356 states have return successors, (1605), 1507 states have call predecessors, (1605), 1511 states have call successors, (1605) [2022-02-20 21:54:03,511 INFO L74 IsIncluded]: Start isIncluded. First operand 7254 states. Second operand has 6894 states, 5025 states have (on average 1.2829850746268656) internal successors, (6447), 5093 states have internal predecessors, (6447), 1512 states have call successors, (1512), 337 states have call predecessors, (1512), 356 states have return successors, (1605), 1507 states have call predecessors, (1605), 1511 states have call successors, (1605) [2022-02-20 21:54:03,522 INFO L87 Difference]: Start difference. First operand 7254 states. Second operand has 6894 states, 5025 states have (on average 1.2829850746268656) internal successors, (6447), 5093 states have internal predecessors, (6447), 1512 states have call successors, (1512), 337 states have call predecessors, (1512), 356 states have return successors, (1605), 1507 states have call predecessors, (1605), 1511 states have call successors, (1605) [2022-02-20 21:54:05,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:54:05,021 INFO L93 Difference]: Finished difference Result 7254 states and 10140 transitions. [2022-02-20 21:54:05,021 INFO L276 IsEmpty]: Start isEmpty. Operand 7254 states and 10140 transitions. [2022-02-20 21:54:05,038 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:54:05,039 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:54:05,050 INFO L74 IsIncluded]: Start isIncluded. First operand has 6894 states, 5025 states have (on average 1.2829850746268656) internal successors, (6447), 5093 states have internal predecessors, (6447), 1512 states have call successors, (1512), 337 states have call predecessors, (1512), 356 states have return successors, (1605), 1507 states have call predecessors, (1605), 1511 states have call successors, (1605) Second operand 7254 states. [2022-02-20 21:54:05,061 INFO L87 Difference]: Start difference. First operand has 6894 states, 5025 states have (on average 1.2829850746268656) internal successors, (6447), 5093 states have internal predecessors, (6447), 1512 states have call successors, (1512), 337 states have call predecessors, (1512), 356 states have return successors, (1605), 1507 states have call predecessors, (1605), 1511 states have call successors, (1605) Second operand 7254 states. [2022-02-20 21:54:06,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:54:06,714 INFO L93 Difference]: Finished difference Result 7254 states and 10140 transitions. [2022-02-20 21:54:06,714 INFO L276 IsEmpty]: Start isEmpty. Operand 7254 states and 10140 transitions. [2022-02-20 21:54:06,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:54:06,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:54:06,730 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:54:06,730 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:54:06,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6894 states, 5025 states have (on average 1.2829850746268656) internal successors, (6447), 5093 states have internal predecessors, (6447), 1512 states have call successors, (1512), 337 states have call predecessors, (1512), 356 states have return successors, (1605), 1507 states have call predecessors, (1605), 1511 states have call successors, (1605) [2022-02-20 21:54:08,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6894 states to 6894 states and 9564 transitions. [2022-02-20 21:54:08,855 INFO L78 Accepts]: Start accepts. Automaton has 6894 states and 9564 transitions. Word has length 130 [2022-02-20 21:54:08,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:54:08,855 INFO L470 AbstractCegarLoop]: Abstraction has 6894 states and 9564 transitions. [2022-02-20 21:54:08,856 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.285714285714286) internal successors, (86), 4 states have internal predecessors, (86), 3 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (15), 3 states have call predecessors, (15), 3 states have call successors, (15) [2022-02-20 21:54:08,856 INFO L276 IsEmpty]: Start isEmpty. Operand 6894 states and 9564 transitions. [2022-02-20 21:54:08,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2022-02-20 21:54:08,863 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:54:08,863 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:54:08,863 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:54:08,863 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:54:08,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:54:08,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1324144406, now seen corresponding path program 1 times [2022-02-20 21:54:08,864 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:54:08,864 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599088006] [2022-02-20 21:54:08,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:54:08,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:54:08,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:08,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:54:08,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:08,943 INFO L290 TraceCheckUtils]: 0: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:08,943 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:08,943 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:08,944 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {70201#true} {70201#true} #2231#return; {70201#true} is VALID [2022-02-20 21:54:08,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:54:08,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:08,951 INFO L290 TraceCheckUtils]: 0: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:08,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:08,951 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:08,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {70201#true} {70201#true} #2233#return; {70201#true} is VALID [2022-02-20 21:54:08,952 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:54:08,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:08,958 INFO L290 TraceCheckUtils]: 0: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:08,959 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:08,959 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:08,959 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {70201#true} {70201#true} #2235#return; {70201#true} is VALID [2022-02-20 21:54:08,967 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-02-20 21:54:08,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,011 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:54:09,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,022 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,022 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,022 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {70201#true} {70201#true} #2183#return; {70201#true} is VALID [2022-02-20 21:54:09,023 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:54:09,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:54:09,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,056 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,056 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,056 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {70201#true} {70201#true} #2187#return; {70201#true} is VALID [2022-02-20 21:54:09,056 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:54:09,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,060 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,061 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {70201#true} {70201#true} #2189#return; {70201#true} is VALID [2022-02-20 21:54:09,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:54:09,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,065 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,065 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,065 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {70201#true} {70201#true} #2193#return; {70201#true} is VALID [2022-02-20 21:54:09,066 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-02-20 21:54:09,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,070 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,070 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {70201#true} {70201#true} #2199#return; {70201#true} is VALID [2022-02-20 21:54:09,076 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-02-20 21:54:09,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,082 INFO L290 TraceCheckUtils]: 0: Hoare triple {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~2#1;call #t~mem406#1.base, #t~mem406#1.offset := read~$Pointer$(~card#1.base, 8 + ~card#1.offset, 8);call #t~mem407#1 := read~int(#t~mem406#1.base, #t~mem406#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~2#1 := (if #t~mem407#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem407#1 % 4294967296 % 4294967296 else #t~mem407#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem406#1.base, #t~mem406#1.offset;havoc #t~mem407#1; {70201#true} is VALID [2022-02-20 21:54:09,082 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume !(~status~2#1 > 0); {70201#true} is VALID [2022-02-20 21:54:09,082 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,082 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {70201#true} {70201#true} #2201#return; {70201#true} is VALID [2022-02-20 21:54:09,083 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-02-20 21:54:09,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,098 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 4 [2022-02-20 21:54:09,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,108 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:54:09,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,112 INFO L290 TraceCheckUtils]: 0: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,113 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,113 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,113 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {70201#true} {70201#true} #2179#return; {70201#true} is VALID [2022-02-20 21:54:09,114 INFO L290 TraceCheckUtils]: 0: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,114 INFO L272 TraceCheckUtils]: 1: Hoare triple {70201#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,114 INFO L290 TraceCheckUtils]: 2: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,115 INFO L290 TraceCheckUtils]: 3: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,115 INFO L290 TraceCheckUtils]: 4: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,115 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {70201#true} {70201#true} #2179#return; {70201#true} is VALID [2022-02-20 21:54:09,116 INFO L290 TraceCheckUtils]: 6: Hoare triple {70201#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,116 INFO L290 TraceCheckUtils]: 7: Hoare triple {70201#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,116 INFO L290 TraceCheckUtils]: 8: Hoare triple {70201#true} assume !false; {70201#true} is VALID [2022-02-20 21:54:09,116 INFO L290 TraceCheckUtils]: 9: Hoare triple {70201#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {70201#true} is VALID [2022-02-20 21:54:09,116 INFO L290 TraceCheckUtils]: 10: Hoare triple {70201#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {70201#true} is VALID [2022-02-20 21:54:09,116 INFO L290 TraceCheckUtils]: 11: Hoare triple {70201#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,117 INFO L290 TraceCheckUtils]: 12: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,117 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {70201#true} {70201#true} #2207#return; {70201#true} is VALID [2022-02-20 21:54:09,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-02-20 21:54:09,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,126 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:54:09,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,130 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,130 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,130 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {70201#true} {70201#true} #2163#return; {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L272 TraceCheckUtils]: 1: Hoare triple {70201#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L290 TraceCheckUtils]: 3: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {70201#true} {70201#true} #2163#return; {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L290 TraceCheckUtils]: 5: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,131 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {70201#true} {70201#true} #2213#return; {70201#true} is VALID [2022-02-20 21:54:09,132 INFO L290 TraceCheckUtils]: 0: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {70201#true} is VALID [2022-02-20 21:54:09,132 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {70201#true} is VALID [2022-02-20 21:54:09,132 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {70201#true} is VALID [2022-02-20 21:54:09,132 INFO L290 TraceCheckUtils]: 3: Hoare triple {70201#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,133 INFO L272 TraceCheckUtils]: 4: Hoare triple {70201#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,133 INFO L290 TraceCheckUtils]: 5: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,134 INFO L272 TraceCheckUtils]: 6: Hoare triple {70201#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,134 INFO L290 TraceCheckUtils]: 7: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,134 INFO L290 TraceCheckUtils]: 8: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,134 INFO L290 TraceCheckUtils]: 9: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,134 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {70201#true} {70201#true} #2179#return; {70201#true} is VALID [2022-02-20 21:54:09,134 INFO L290 TraceCheckUtils]: 11: Hoare triple {70201#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,134 INFO L290 TraceCheckUtils]: 12: Hoare triple {70201#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,135 INFO L290 TraceCheckUtils]: 13: Hoare triple {70201#true} assume !false; {70201#true} is VALID [2022-02-20 21:54:09,135 INFO L290 TraceCheckUtils]: 14: Hoare triple {70201#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {70201#true} is VALID [2022-02-20 21:54:09,135 INFO L290 TraceCheckUtils]: 15: Hoare triple {70201#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {70201#true} is VALID [2022-02-20 21:54:09,135 INFO L290 TraceCheckUtils]: 16: Hoare triple {70201#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,135 INFO L290 TraceCheckUtils]: 17: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,135 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {70201#true} {70201#true} #2207#return; {70201#true} is VALID [2022-02-20 21:54:09,136 INFO L290 TraceCheckUtils]: 19: Hoare triple {70201#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,136 INFO L290 TraceCheckUtils]: 20: Hoare triple {70201#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,136 INFO L290 TraceCheckUtils]: 21: Hoare triple {70201#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {70201#true} is VALID [2022-02-20 21:54:09,136 INFO L290 TraceCheckUtils]: 22: Hoare triple {70201#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,136 INFO L272 TraceCheckUtils]: 23: Hoare triple {70201#true} call trigger_receive(~card#1.base, ~card#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,136 INFO L290 TraceCheckUtils]: 24: Hoare triple {70201#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {70201#true} is VALID [2022-02-20 21:54:09,137 INFO L272 TraceCheckUtils]: 25: Hoare triple {70201#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {70201#true} is VALID [2022-02-20 21:54:09,137 INFO L290 TraceCheckUtils]: 26: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,137 INFO L290 TraceCheckUtils]: 27: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,137 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {70201#true} {70201#true} #2163#return; {70201#true} is VALID [2022-02-20 21:54:09,137 INFO L290 TraceCheckUtils]: 29: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,137 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {70201#true} {70201#true} #2213#return; {70201#true} is VALID [2022-02-20 21:54:09,138 INFO L290 TraceCheckUtils]: 31: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,138 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {70201#true} {70201#true} #2203#return; {70201#true} is VALID [2022-02-20 21:54:09,138 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2022-02-20 21:54:09,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:54:09,142 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,143 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume { :end_inline__raw_spin_unlock } true; {70201#true} is VALID [2022-02-20 21:54:09,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,143 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {70201#true} {70201#true} #2205#return; {70201#true} is VALID [2022-02-20 21:54:09,143 INFO L290 TraceCheckUtils]: 0: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~irq#1 := #in~irq#1;~dev_instance#1.base, ~dev_instance#1.offset := #in~dev_instance#1.base, #in~dev_instance#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~card~1#1.base, ~card~1#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~ioaddr~0#1.base, ~ioaddr~0#1.offset;havoc ~status~0#1;havoc ~i~0#1;havoc ~newlink~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;~dev~2#1.base, ~dev~2#1.offset := ~dev_instance#1.base, ~dev_instance#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,143 INFO L272 TraceCheckUtils]: 1: Hoare triple {70201#true} call #t~ret209#1.base, #t~ret209#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L290 TraceCheckUtils]: 3: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {70201#true} {70201#true} #2187#return; {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L290 TraceCheckUtils]: 5: Hoare triple {70201#true} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret209#1.base, #t~ret209#1.offset;havoc #t~ret209#1.base, #t~ret209#1.offset;~card~1#1.base, ~card~1#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;call #t~mem210#1.base, #t~mem210#1.offset := read~$Pointer$(~card~1#1.base, 64 + ~card~1#1.offset, 8);~ioaddr~0#1.base, ~ioaddr~0#1.offset := #t~mem210#1.base, #t~mem210#1.offset;havoc #t~mem210#1.base, #t~mem210#1.offset;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := ~card~1#1.base, 80 + ~card~1#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L290 TraceCheckUtils]: 6: Hoare triple {70201#true} assume { :end_inline__raw_spin_lock } true; {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L290 TraceCheckUtils]: 7: Hoare triple {70201#true} assume { :end_inline_spin_lock } true; {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L272 TraceCheckUtils]: 8: Hoare triple {70201#true} call #t~ret211#1 := ioread32(~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,144 INFO L290 TraceCheckUtils]: 9: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,145 INFO L290 TraceCheckUtils]: 10: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,145 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {70201#true} {70201#true} #2189#return; {70201#true} is VALID [2022-02-20 21:54:09,145 INFO L290 TraceCheckUtils]: 12: Hoare triple {70201#true} ~status~0#1 := #t~ret211#1;havoc #t~ret211#1; {70201#true} is VALID [2022-02-20 21:54:09,145 INFO L290 TraceCheckUtils]: 13: Hoare triple {70201#true} assume !(0 == ~status~0#1 % 4294967296 || 4294967295 == ~status~0#1 % 4294967296);assume { :begin_inline_link_status_changed } true;link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset := ~card~1#1.base, ~card~1#1.offset;havoc link_status_changed_#res#1;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset, link_status_changed_#t~ret299#1, link_status_changed_~card#1.base, link_status_changed_~card#1.offset, link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset, link_status_changed_~val~2#1;link_status_changed_~card#1.base, link_status_changed_~card#1.offset := link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset;havoc link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset;havoc link_status_changed_~val~2#1;call link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset := read~$Pointer$(link_status_changed_~card#1.base, 64 + link_status_changed_~card#1.offset, 8);link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset := link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,145 INFO L272 TraceCheckUtils]: 14: Hoare triple {70201#true} call link_status_changed_#t~ret299#1 := ioread32(link_status_changed_~ioaddr~6#1.base, 40 + link_status_changed_~ioaddr~6#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L290 TraceCheckUtils]: 16: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {70201#true} {70201#true} #2193#return; {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L290 TraceCheckUtils]: 18: Hoare triple {70201#true} link_status_changed_~val~2#1 := link_status_changed_#t~ret299#1;havoc link_status_changed_#t~ret299#1; {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L290 TraceCheckUtils]: 19: Hoare triple {70201#true} assume 0 == (if 0 == link_status_changed_~val~2#1 then 0 else (if 1 == link_status_changed_~val~2#1 then 0 else ~bitwiseAnd(link_status_changed_~val~2#1, 134217728))) % 4294967296;link_status_changed_#res#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L290 TraceCheckUtils]: 20: Hoare triple {70201#true} #t~ret212#1 := link_status_changed_#res#1;assume { :end_inline_link_status_changed } true;assume -2147483648 <= #t~ret212#1 && #t~ret212#1 <= 2147483647;~tmp___1~3#1 := #t~ret212#1;havoc #t~ret212#1; {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L290 TraceCheckUtils]: 21: Hoare triple {70201#true} assume !(0 != ~tmp___1~3#1); {70201#true} is VALID [2022-02-20 21:54:09,146 INFO L290 TraceCheckUtils]: 22: Hoare triple {70201#true} ~status~0#1 := 4294967295; {70201#true} is VALID [2022-02-20 21:54:09,147 INFO L272 TraceCheckUtils]: 23: Hoare triple {70201#true} call iowrite32(~status~0#1, ~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,147 INFO L290 TraceCheckUtils]: 24: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,147 INFO L290 TraceCheckUtils]: 25: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,147 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {70201#true} {70201#true} #2199#return; {70201#true} is VALID [2022-02-20 21:54:09,147 INFO L290 TraceCheckUtils]: 27: Hoare triple {70201#true} ~i~0#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,147 INFO L290 TraceCheckUtils]: 28: Hoare triple {70201#true} assume ~i~0#1 <= 3; {70201#true} is VALID [2022-02-20 21:54:09,148 INFO L290 TraceCheckUtils]: 29: Hoare triple {70201#true} call #t~mem218#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {70201#true} is VALID [2022-02-20 21:54:09,149 INFO L272 TraceCheckUtils]: 30: Hoare triple {70201#true} call investigate_write_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem218#1); {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:54:09,149 INFO L290 TraceCheckUtils]: 31: Hoare triple {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~2#1;call #t~mem406#1.base, #t~mem406#1.offset := read~$Pointer$(~card#1.base, 8 + ~card#1.offset, 8);call #t~mem407#1 := read~int(#t~mem406#1.base, #t~mem406#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~2#1 := (if #t~mem407#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem407#1 % 4294967296 % 4294967296 else #t~mem407#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem406#1.base, #t~mem406#1.offset;havoc #t~mem407#1; {70201#true} is VALID [2022-02-20 21:54:09,149 INFO L290 TraceCheckUtils]: 32: Hoare triple {70201#true} assume !(~status~2#1 > 0); {70201#true} is VALID [2022-02-20 21:54:09,149 INFO L290 TraceCheckUtils]: 33: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,149 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {70201#true} {70201#true} #2201#return; {70201#true} is VALID [2022-02-20 21:54:09,149 INFO L290 TraceCheckUtils]: 35: Hoare triple {70201#true} havoc #t~mem218#1;~i~0#1 := 1 + ~i~0#1; {70201#true} is VALID [2022-02-20 21:54:09,150 INFO L290 TraceCheckUtils]: 36: Hoare triple {70201#true} assume !(~i~0#1 <= 3);~i~0#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,150 INFO L290 TraceCheckUtils]: 37: Hoare triple {70201#true} assume ~i~0#1 <= 3; {70201#true} is VALID [2022-02-20 21:54:09,150 INFO L290 TraceCheckUtils]: 38: Hoare triple {70201#true} call #t~mem219#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {70201#true} is VALID [2022-02-20 21:54:09,151 INFO L272 TraceCheckUtils]: 39: Hoare triple {70201#true} call investigate_read_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem219#1); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,151 INFO L290 TraceCheckUtils]: 40: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {70201#true} is VALID [2022-02-20 21:54:09,151 INFO L290 TraceCheckUtils]: 41: Hoare triple {70201#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {70201#true} is VALID [2022-02-20 21:54:09,151 INFO L290 TraceCheckUtils]: 42: Hoare triple {70201#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {70201#true} is VALID [2022-02-20 21:54:09,152 INFO L290 TraceCheckUtils]: 43: Hoare triple {70201#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,152 INFO L272 TraceCheckUtils]: 44: Hoare triple {70201#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,152 INFO L290 TraceCheckUtils]: 45: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,153 INFO L272 TraceCheckUtils]: 46: Hoare triple {70201#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,153 INFO L290 TraceCheckUtils]: 47: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,153 INFO L290 TraceCheckUtils]: 48: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,153 INFO L290 TraceCheckUtils]: 49: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,153 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {70201#true} {70201#true} #2179#return; {70201#true} is VALID [2022-02-20 21:54:09,154 INFO L290 TraceCheckUtils]: 51: Hoare triple {70201#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,154 INFO L290 TraceCheckUtils]: 52: Hoare triple {70201#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,154 INFO L290 TraceCheckUtils]: 53: Hoare triple {70201#true} assume !false; {70201#true} is VALID [2022-02-20 21:54:09,154 INFO L290 TraceCheckUtils]: 54: Hoare triple {70201#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {70201#true} is VALID [2022-02-20 21:54:09,154 INFO L290 TraceCheckUtils]: 55: Hoare triple {70201#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {70201#true} is VALID [2022-02-20 21:54:09,154 INFO L290 TraceCheckUtils]: 56: Hoare triple {70201#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L290 TraceCheckUtils]: 57: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {70201#true} {70201#true} #2207#return; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L290 TraceCheckUtils]: 59: Hoare triple {70201#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L290 TraceCheckUtils]: 60: Hoare triple {70201#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L290 TraceCheckUtils]: 61: Hoare triple {70201#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L290 TraceCheckUtils]: 62: Hoare triple {70201#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,155 INFO L272 TraceCheckUtils]: 63: Hoare triple {70201#true} call trigger_receive(~card#1.base, ~card#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,156 INFO L290 TraceCheckUtils]: 64: Hoare triple {70201#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {70201#true} is VALID [2022-02-20 21:54:09,156 INFO L272 TraceCheckUtils]: 65: Hoare triple {70201#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {70201#true} is VALID [2022-02-20 21:54:09,157 INFO L290 TraceCheckUtils]: 66: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,157 INFO L290 TraceCheckUtils]: 67: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,157 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {70201#true} {70201#true} #2163#return; {70201#true} is VALID [2022-02-20 21:54:09,157 INFO L290 TraceCheckUtils]: 69: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,157 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {70201#true} {70201#true} #2213#return; {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L290 TraceCheckUtils]: 71: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {70201#true} {70201#true} #2203#return; {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L290 TraceCheckUtils]: 73: Hoare triple {70201#true} havoc #t~mem219#1;~i~0#1 := 1 + ~i~0#1; {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L290 TraceCheckUtils]: 74: Hoare triple {70201#true} assume !(~i~0#1 <= 3); {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L272 TraceCheckUtils]: 75: Hoare triple {70201#true} call spin_unlock(~card~1#1.base, 80 + ~card~1#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L290 TraceCheckUtils]: 76: Hoare triple {70201#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,158 INFO L290 TraceCheckUtils]: 77: Hoare triple {70201#true} assume { :end_inline__raw_spin_unlock } true; {70201#true} is VALID [2022-02-20 21:54:09,159 INFO L290 TraceCheckUtils]: 78: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,159 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {70201#true} {70201#true} #2205#return; {70201#true} is VALID [2022-02-20 21:54:09,159 INFO L290 TraceCheckUtils]: 80: Hoare triple {70201#true} #res#1 := 1;call ULTIMATE.dealloc(~#descriptor~0#1.base, ~#descriptor~0#1.offset);havoc ~#descriptor~0#1.base, ~#descriptor~0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,159 INFO L290 TraceCheckUtils]: 81: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,159 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {70201#true} {70201#true} #2185#return; {70201#true} is VALID [2022-02-20 21:54:09,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;havoc ~xp~1#1.base, ~xp~1#1.offset;havoc ~tmp~25#1.base, ~tmp~25#1.offset;havoc ~irq~1#1; {70201#true} is VALID [2022-02-20 21:54:09,160 INFO L272 TraceCheckUtils]: 1: Hoare triple {70201#true} call #t~ret255#1.base, #t~ret255#1.offset := netdev_priv(~dev#1.base, ~dev#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,160 INFO L290 TraceCheckUtils]: 2: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,160 INFO L290 TraceCheckUtils]: 3: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,160 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {70201#true} {70201#true} #2183#return; {70201#true} is VALID [2022-02-20 21:54:09,161 INFO L290 TraceCheckUtils]: 5: Hoare triple {70201#true} ~tmp~25#1.base, ~tmp~25#1.offset := #t~ret255#1.base, #t~ret255#1.offset;havoc #t~ret255#1.base, #t~ret255#1.offset;~xp~1#1.base, ~xp~1#1.offset := ~tmp~25#1.base, ~tmp~25#1.offset;call #t~mem256#1.base, #t~mem256#1.offset := read~$Pointer$(~xp~1#1.base, 148 + ~xp~1#1.offset, 8);call #t~mem257#1 := read~int(#t~mem256#1.base, 1496 + #t~mem256#1.offset, 4);~irq~1#1 := (if #t~mem257#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem257#1 % 4294967296 % 4294967296 else #t~mem257#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem256#1.base, #t~mem256#1.offset;havoc #t~mem257#1;assume { :begin_inline_disable_irq } true;disable_irq_#in~arg0#1 := ~irq~1#1;havoc disable_irq_~arg0#1;disable_irq_~arg0#1 := disable_irq_#in~arg0#1; {70201#true} is VALID [2022-02-20 21:54:09,161 INFO L290 TraceCheckUtils]: 6: Hoare triple {70201#true} assume { :end_inline_disable_irq } true; {70201#true} is VALID [2022-02-20 21:54:09,162 INFO L272 TraceCheckUtils]: 7: Hoare triple {70201#true} call #t~ret258#1 := xircom_interrupt(~irq~1#1, ~dev#1.base, ~dev#1.offset); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,162 INFO L290 TraceCheckUtils]: 8: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~irq#1 := #in~irq#1;~dev_instance#1.base, ~dev_instance#1.offset := #in~dev_instance#1.base, #in~dev_instance#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~card~1#1.base, ~card~1#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~ioaddr~0#1.base, ~ioaddr~0#1.offset;havoc ~status~0#1;havoc ~i~0#1;havoc ~newlink~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;~dev~2#1.base, ~dev~2#1.offset := ~dev_instance#1.base, ~dev_instance#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,162 INFO L272 TraceCheckUtils]: 9: Hoare triple {70201#true} call #t~ret209#1.base, #t~ret209#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,162 INFO L290 TraceCheckUtils]: 10: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L290 TraceCheckUtils]: 11: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {70201#true} {70201#true} #2187#return; {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L290 TraceCheckUtils]: 13: Hoare triple {70201#true} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret209#1.base, #t~ret209#1.offset;havoc #t~ret209#1.base, #t~ret209#1.offset;~card~1#1.base, ~card~1#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;call #t~mem210#1.base, #t~mem210#1.offset := read~$Pointer$(~card~1#1.base, 64 + ~card~1#1.offset, 8);~ioaddr~0#1.base, ~ioaddr~0#1.offset := #t~mem210#1.base, #t~mem210#1.offset;havoc #t~mem210#1.base, #t~mem210#1.offset;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := ~card~1#1.base, 80 + ~card~1#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L290 TraceCheckUtils]: 14: Hoare triple {70201#true} assume { :end_inline__raw_spin_lock } true; {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L290 TraceCheckUtils]: 15: Hoare triple {70201#true} assume { :end_inline_spin_lock } true; {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L272 TraceCheckUtils]: 16: Hoare triple {70201#true} call #t~ret211#1 := ioread32(~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,163 INFO L290 TraceCheckUtils]: 17: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,164 INFO L290 TraceCheckUtils]: 18: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,164 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {70201#true} {70201#true} #2189#return; {70201#true} is VALID [2022-02-20 21:54:09,164 INFO L290 TraceCheckUtils]: 20: Hoare triple {70201#true} ~status~0#1 := #t~ret211#1;havoc #t~ret211#1; {70201#true} is VALID [2022-02-20 21:54:09,164 INFO L290 TraceCheckUtils]: 21: Hoare triple {70201#true} assume !(0 == ~status~0#1 % 4294967296 || 4294967295 == ~status~0#1 % 4294967296);assume { :begin_inline_link_status_changed } true;link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset := ~card~1#1.base, ~card~1#1.offset;havoc link_status_changed_#res#1;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset, link_status_changed_#t~ret299#1, link_status_changed_~card#1.base, link_status_changed_~card#1.offset, link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset, link_status_changed_~val~2#1;link_status_changed_~card#1.base, link_status_changed_~card#1.offset := link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset;havoc link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset;havoc link_status_changed_~val~2#1;call link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset := read~$Pointer$(link_status_changed_~card#1.base, 64 + link_status_changed_~card#1.offset, 8);link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset := link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,164 INFO L272 TraceCheckUtils]: 22: Hoare triple {70201#true} call link_status_changed_#t~ret299#1 := ioread32(link_status_changed_~ioaddr~6#1.base, 40 + link_status_changed_~ioaddr~6#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,164 INFO L290 TraceCheckUtils]: 23: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L290 TraceCheckUtils]: 24: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {70201#true} {70201#true} #2193#return; {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L290 TraceCheckUtils]: 26: Hoare triple {70201#true} link_status_changed_~val~2#1 := link_status_changed_#t~ret299#1;havoc link_status_changed_#t~ret299#1; {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L290 TraceCheckUtils]: 27: Hoare triple {70201#true} assume 0 == (if 0 == link_status_changed_~val~2#1 then 0 else (if 1 == link_status_changed_~val~2#1 then 0 else ~bitwiseAnd(link_status_changed_~val~2#1, 134217728))) % 4294967296;link_status_changed_#res#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L290 TraceCheckUtils]: 28: Hoare triple {70201#true} #t~ret212#1 := link_status_changed_#res#1;assume { :end_inline_link_status_changed } true;assume -2147483648 <= #t~ret212#1 && #t~ret212#1 <= 2147483647;~tmp___1~3#1 := #t~ret212#1;havoc #t~ret212#1; {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L290 TraceCheckUtils]: 29: Hoare triple {70201#true} assume !(0 != ~tmp___1~3#1); {70201#true} is VALID [2022-02-20 21:54:09,165 INFO L290 TraceCheckUtils]: 30: Hoare triple {70201#true} ~status~0#1 := 4294967295; {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L272 TraceCheckUtils]: 31: Hoare triple {70201#true} call iowrite32(~status~0#1, ~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L290 TraceCheckUtils]: 32: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L290 TraceCheckUtils]: 33: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {70201#true} {70201#true} #2199#return; {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L290 TraceCheckUtils]: 35: Hoare triple {70201#true} ~i~0#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L290 TraceCheckUtils]: 36: Hoare triple {70201#true} assume ~i~0#1 <= 3; {70201#true} is VALID [2022-02-20 21:54:09,166 INFO L290 TraceCheckUtils]: 37: Hoare triple {70201#true} call #t~mem218#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {70201#true} is VALID [2022-02-20 21:54:09,167 INFO L272 TraceCheckUtils]: 38: Hoare triple {70201#true} call investigate_write_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem218#1); {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:54:09,168 INFO L290 TraceCheckUtils]: 39: Hoare triple {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~2#1;call #t~mem406#1.base, #t~mem406#1.offset := read~$Pointer$(~card#1.base, 8 + ~card#1.offset, 8);call #t~mem407#1 := read~int(#t~mem406#1.base, #t~mem406#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~2#1 := (if #t~mem407#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem407#1 % 4294967296 % 4294967296 else #t~mem407#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem406#1.base, #t~mem406#1.offset;havoc #t~mem407#1; {70201#true} is VALID [2022-02-20 21:54:09,168 INFO L290 TraceCheckUtils]: 40: Hoare triple {70201#true} assume !(~status~2#1 > 0); {70201#true} is VALID [2022-02-20 21:54:09,168 INFO L290 TraceCheckUtils]: 41: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,168 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {70201#true} {70201#true} #2201#return; {70201#true} is VALID [2022-02-20 21:54:09,168 INFO L290 TraceCheckUtils]: 43: Hoare triple {70201#true} havoc #t~mem218#1;~i~0#1 := 1 + ~i~0#1; {70201#true} is VALID [2022-02-20 21:54:09,168 INFO L290 TraceCheckUtils]: 44: Hoare triple {70201#true} assume !(~i~0#1 <= 3);~i~0#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,168 INFO L290 TraceCheckUtils]: 45: Hoare triple {70201#true} assume ~i~0#1 <= 3; {70201#true} is VALID [2022-02-20 21:54:09,169 INFO L290 TraceCheckUtils]: 46: Hoare triple {70201#true} call #t~mem219#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {70201#true} is VALID [2022-02-20 21:54:09,170 INFO L272 TraceCheckUtils]: 47: Hoare triple {70201#true} call investigate_read_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem219#1); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,170 INFO L290 TraceCheckUtils]: 48: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {70201#true} is VALID [2022-02-20 21:54:09,170 INFO L290 TraceCheckUtils]: 49: Hoare triple {70201#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {70201#true} is VALID [2022-02-20 21:54:09,170 INFO L290 TraceCheckUtils]: 50: Hoare triple {70201#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {70201#true} is VALID [2022-02-20 21:54:09,170 INFO L290 TraceCheckUtils]: 51: Hoare triple {70201#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,171 INFO L272 TraceCheckUtils]: 52: Hoare triple {70201#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,171 INFO L290 TraceCheckUtils]: 53: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,172 INFO L272 TraceCheckUtils]: 54: Hoare triple {70201#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,182 INFO L290 TraceCheckUtils]: 55: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,192 INFO L290 TraceCheckUtils]: 56: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,192 INFO L290 TraceCheckUtils]: 57: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,192 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {70201#true} {70201#true} #2179#return; {70201#true} is VALID [2022-02-20 21:54:09,192 INFO L290 TraceCheckUtils]: 59: Hoare triple {70201#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L290 TraceCheckUtils]: 60: Hoare triple {70201#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L290 TraceCheckUtils]: 61: Hoare triple {70201#true} assume !false; {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L290 TraceCheckUtils]: 62: Hoare triple {70201#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L290 TraceCheckUtils]: 63: Hoare triple {70201#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L290 TraceCheckUtils]: 64: Hoare triple {70201#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L290 TraceCheckUtils]: 65: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,193 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {70201#true} {70201#true} #2207#return; {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L290 TraceCheckUtils]: 67: Hoare triple {70201#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L290 TraceCheckUtils]: 68: Hoare triple {70201#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L290 TraceCheckUtils]: 69: Hoare triple {70201#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L290 TraceCheckUtils]: 70: Hoare triple {70201#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L272 TraceCheckUtils]: 71: Hoare triple {70201#true} call trigger_receive(~card#1.base, ~card#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L290 TraceCheckUtils]: 72: Hoare triple {70201#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {70201#true} is VALID [2022-02-20 21:54:09,194 INFO L272 TraceCheckUtils]: 73: Hoare triple {70201#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L290 TraceCheckUtils]: 74: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L290 TraceCheckUtils]: 75: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {70201#true} {70201#true} #2163#return; {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L290 TraceCheckUtils]: 77: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {70201#true} {70201#true} #2213#return; {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L290 TraceCheckUtils]: 79: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,195 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {70201#true} {70201#true} #2203#return; {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L290 TraceCheckUtils]: 81: Hoare triple {70201#true} havoc #t~mem219#1;~i~0#1 := 1 + ~i~0#1; {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L290 TraceCheckUtils]: 82: Hoare triple {70201#true} assume !(~i~0#1 <= 3); {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L272 TraceCheckUtils]: 83: Hoare triple {70201#true} call spin_unlock(~card~1#1.base, 80 + ~card~1#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L290 TraceCheckUtils]: 84: Hoare triple {70201#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L290 TraceCheckUtils]: 85: Hoare triple {70201#true} assume { :end_inline__raw_spin_unlock } true; {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L290 TraceCheckUtils]: 86: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,196 INFO L284 TraceCheckUtils]: 87: Hoare quadruple {70201#true} {70201#true} #2205#return; {70201#true} is VALID [2022-02-20 21:54:09,197 INFO L290 TraceCheckUtils]: 88: Hoare triple {70201#true} #res#1 := 1;call ULTIMATE.dealloc(~#descriptor~0#1.base, ~#descriptor~0#1.offset);havoc ~#descriptor~0#1.base, ~#descriptor~0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,197 INFO L290 TraceCheckUtils]: 89: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,197 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {70201#true} {70201#true} #2185#return; {70201#true} is VALID [2022-02-20 21:54:09,197 INFO L290 TraceCheckUtils]: 91: Hoare triple {70201#true} assume -2147483648 <= #t~ret258#1 && #t~ret258#1 <= 2147483647;havoc #t~ret258#1;assume { :begin_inline_enable_irq } true;enable_irq_#in~arg0#1 := ~irq~1#1;havoc enable_irq_~arg0#1;enable_irq_~arg0#1 := enable_irq_#in~arg0#1; {70201#true} is VALID [2022-02-20 21:54:09,197 INFO L290 TraceCheckUtils]: 92: Hoare triple {70201#true} assume { :end_inline_enable_irq } true; {70201#true} is VALID [2022-02-20 21:54:09,198 INFO L290 TraceCheckUtils]: 93: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,198 INFO L284 TraceCheckUtils]: 94: Hoare quadruple {70201#true} {70202#false} #2531#return; {70202#false} is VALID [2022-02-20 21:54:09,199 INFO L290 TraceCheckUtils]: 0: Hoare triple {70201#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(119, 2);call #Ultimate.allocInit(37, 3);call #Ultimate.allocInit(26, 4);call #Ultimate.allocInit(74, 5);call #Ultimate.allocInit(10, 6);call #Ultimate.allocInit(10, 7);call #Ultimate.allocInit(46, 8);call #Ultimate.allocInit(13, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(47, 11);call #Ultimate.allocInit(13, 12);call #Ultimate.allocInit(38, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(240, 16);call #Ultimate.allocInit(25, 17);call #Ultimate.allocInit(25, 18);call #Ultimate.allocInit(17, 19);call #Ultimate.allocInit(44, 20);call #Ultimate.allocInit(31, 21);call #Ultimate.allocInit(32, 22);call #Ultimate.allocInit(31, 23);call #Ultimate.allocInit(34, 24);call #Ultimate.allocInit(35, 25);call #Ultimate.allocInit(34, 26);call #Ultimate.allocInit(10, 27);call #Ultimate.allocInit(17, 28);call #Ultimate.allocInit(240, 29);call #Ultimate.allocInit(6, 30);call write~init~int(32, 30, 0, 1);call write~init~int(37, 30, 1, 1);call write~init~int(112, 30, 2, 1);call write~init~int(77, 30, 3, 1);call write~init~int(10, 30, 4, 1);call write~init~int(0, 30, 5, 1);call #Ultimate.allocInit(17, 31);call #Ultimate.allocInit(27, 32);call #Ultimate.allocInit(10, 33);~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~netdev_ops_group1~0.base, ~netdev_ops_group1~0.offset := 0, 0;~ldv_irq_1_0~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ref_cnt~0 := 0;~xircom_ops_group0~0.base, ~xircom_ops_group0~0.offset := 0, 0;~ldv_irq_line_1_1~0 := 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~#bufferoffsets~0.base, ~#bufferoffsets~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(128, ~#bufferoffsets~0.base, ~#bufferoffsets~0.offset, 4);call write~init~int(2048, ~#bufferoffsets~0.base, 4 + ~#bufferoffsets~0.offset, 4);call write~init~int(4096, ~#bufferoffsets~0.base, 8 + ~#bufferoffsets~0.offset, 4);call write~init~int(6144, ~#bufferoffsets~0.base, 12 + ~#bufferoffsets~0.offset, 4);~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset := 35, 0;call #Ultimate.allocInit(64, 35);call write~init~int(4445, ~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, 4);call write~init~int(3, ~#xircom_pci_table~0.base, 4 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 8 + ~#xircom_pci_table~0.offset, 4);call write~init~int(4294967295, ~#xircom_pci_table~0.base, 12 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 16 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 20 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 24 + ~#xircom_pci_table~0.offset, 8);call write~init~int(0, ~#xircom_pci_table~0.base, 32 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 36 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 40 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 44 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 48 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 52 + ~#xircom_pci_table~0.offset, 4);call write~init~int(0, ~#xircom_pci_table~0.base, 56 + ~#xircom_pci_table~0.offset, 8);~__mod_pci__xircom_pci_table_device_table~0.vendor := 0;~__mod_pci__xircom_pci_table_device_table~0.device := 0;~__mod_pci__xircom_pci_table_device_table~0.subvendor := 0;~__mod_pci__xircom_pci_table_device_table~0.subdevice := 0;~__mod_pci__xircom_pci_table_device_table~0.class := 0;~__mod_pci__xircom_pci_table_device_table~0.class_mask := 0;~__mod_pci__xircom_pci_table_device_table~0.driver_data := 0;~#xircom_ops~0.base, ~#xircom_ops~0.offset := 36, 0;call #Ultimate.allocInit(301, 36);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 8 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(6, 0, ~#xircom_ops~0.base, 16 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(~#xircom_pci_table~0.base, ~#xircom_pci_table~0.offset, ~#xircom_ops~0.base, 24 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_probe.base, #funAddr~xircom_probe.offset, ~#xircom_ops~0.base, 32 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_remove.base, #funAddr~xircom_remove.offset, ~#xircom_ops~0.base, 40 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 48 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 56 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 64 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 72 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 80 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 88 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 96 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 104 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 112 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 120 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 128 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 136 + ~#xircom_ops~0.offset, 1);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 137 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 145 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 153 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 161 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 169 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 177 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 185 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 193 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 201 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 209 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 217 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 221 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 225 + ~#xircom_ops~0.offset, 4);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 229 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 237 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 245 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 253 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 261 + ~#xircom_ops~0.offset, 8);call write~init~int(0, ~#xircom_ops~0.base, 269 + ~#xircom_ops~0.offset, 4);call write~init~int(0, ~#xircom_ops~0.base, 273 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 285 + ~#xircom_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#xircom_ops~0.base, 293 + ~#xircom_ops~0.offset, 8);~#netdev_ops~0.base, ~#netdev_ops~0.offset := 37, 0;call #Ultimate.allocInit(480, 37);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 8 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_open.base, #funAddr~xircom_open.offset, ~#netdev_ops~0.base, 16 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_close.base, #funAddr~xircom_close.offset, ~#netdev_ops~0.base, 24 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_start_xmit.base, #funAddr~xircom_start_xmit.offset, ~#netdev_ops~0.base, 32 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 40 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 48 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 56 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_mac_addr.base, #funAddr~eth_mac_addr.offset, ~#netdev_ops~0.base, 64 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_validate_addr.base, #funAddr~eth_validate_addr.offset, ~#netdev_ops~0.base, 72 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 80 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 88 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~eth_change_mtu.base, #funAddr~eth_change_mtu.offset, ~#netdev_ops~0.base, 96 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 104 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 112 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 120 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 128 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 136 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 144 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~xircom_poll_controller.base, #funAddr~xircom_poll_controller.offset, ~#netdev_ops~0.base, 152 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 160 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 168 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 176 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 184 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 192 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 200 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 208 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 216 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 224 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 232 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 240 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 248 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 256 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 264 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 272 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 280 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 288 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 296 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 304 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 312 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 320 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 328 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 336 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 344 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 352 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 360 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 368 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 376 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 384 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 392 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 400 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 408 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 416 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 424 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 432 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 440 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 448 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 456 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 464 + ~#netdev_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#netdev_ops~0.base, 472 + ~#netdev_ops~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_3~0 := 0;~#set_impl~0.base, ~#set_impl~0.offset := 38, 0;call #Ultimate.allocInit(120, 38);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base);~last_index~0 := 0;~LDV_SKBS~0.base, ~LDV_SKBS~0.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,199 INFO L290 TraceCheckUtils]: 1: Hoare triple {70201#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset, main_#t~ret429#1.base, main_#t~ret429#1.offset, main_#t~nondet430#1, main_#t~ret431#1.base, main_#t~ret431#1.offset, main_#t~nondet432#1, main_#t~switch433#1, main_#t~nondet434#1, main_#t~switch435#1, main_#t~ret436#1, main_#t~nondet437#1, main_#t~switch438#1, main_#t~ret439#1, main_#t~nondet440#1, main_#t~switch441#1, main_#t~ret442#1, main_#t~ret443#1, main_#t~ret444#1, main_#t~ret445#1, main_#t~ret446#1, main_#t~ret447#1, main_#t~ret448#1, main_#t~ret449#1, main_#t~ret450#1, main_#t~ret451#1, main_#t~ret452#1, main_#t~ret453#1, main_#t~ret454#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~43#1.base, main_~tmp~43#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset, main_~ldvarg3~0#1, main_~tmp___1~7#1, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset, main_~tmp___3~1#1, main_~tmp___4~1#1, main_~tmp___5~1#1, main_~tmp___6~0#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~43#1.base, main_~tmp~43#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;havoc main_~ldvarg3~0#1;havoc main_~tmp___1~7#1;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;havoc main_~tmp___3~1#1;havoc main_~tmp___4~1#1;havoc main_~tmp___5~1#1;havoc main_~tmp___6~0#1; {70201#true} is VALID [2022-02-20 21:54:09,200 INFO L272 TraceCheckUtils]: 2: Hoare triple {70201#true} call main_#t~ret428#1.base, main_#t~ret428#1.offset := ldv_zalloc(32); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,200 INFO L290 TraceCheckUtils]: 3: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,200 INFO L290 TraceCheckUtils]: 4: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,200 INFO L290 TraceCheckUtils]: 5: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,200 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {70201#true} {70201#true} #2231#return; {70201#true} is VALID [2022-02-20 21:54:09,200 INFO L290 TraceCheckUtils]: 7: Hoare triple {70201#true} main_~tmp~43#1.base, main_~tmp~43#1.offset := main_#t~ret428#1.base, main_#t~ret428#1.offset;havoc main_#t~ret428#1.base, main_#t~ret428#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~43#1.base, main_~tmp~43#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,201 INFO L272 TraceCheckUtils]: 8: Hoare triple {70201#true} call main_#t~ret429#1.base, main_#t~ret429#1.offset := ldv_zalloc(1); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,201 INFO L290 TraceCheckUtils]: 9: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,201 INFO L290 TraceCheckUtils]: 10: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,201 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {70201#true} {70201#true} #2233#return; {70201#true} is VALID [2022-02-20 21:54:09,201 INFO L290 TraceCheckUtils]: 13: Hoare triple {70201#true} main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset := main_#t~ret429#1.base, main_#t~ret429#1.offset;havoc main_#t~ret429#1.base, main_#t~ret429#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~14#1.base, main_~tmp___0~14#1.offset;assume -2147483648 <= main_#t~nondet430#1 && main_#t~nondet430#1 <= 2147483647;main_~tmp___1~7#1 := main_#t~nondet430#1;havoc main_#t~nondet430#1;main_~ldvarg3~0#1 := main_~tmp___1~7#1; {70201#true} is VALID [2022-02-20 21:54:09,202 INFO L272 TraceCheckUtils]: 14: Hoare triple {70201#true} call main_#t~ret431#1.base, main_#t~ret431#1.offset := ldv_zalloc(232); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,202 INFO L290 TraceCheckUtils]: 15: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,202 INFO L290 TraceCheckUtils]: 16: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,202 INFO L290 TraceCheckUtils]: 17: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,203 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {70201#true} {70201#true} #2235#return; {70201#true} is VALID [2022-02-20 21:54:09,203 INFO L290 TraceCheckUtils]: 19: Hoare triple {70201#true} main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset := main_#t~ret431#1.base, main_#t~ret431#1.offset;havoc main_#t~ret431#1.base, main_#t~ret431#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___2~2#1.base, main_~tmp___2~2#1.offset;assume { :begin_inline_ldv_initialize } true;assume { :begin_inline_ldv_set_init } true;ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ~#set_impl~0.base, ~#set_impl~0.offset;~last_index~0 := 0; {70201#true} is VALID [2022-02-20 21:54:09,203 INFO L290 TraceCheckUtils]: 20: Hoare triple {70201#true} assume { :end_inline_ldv_set_init } true; {70201#true} is VALID [2022-02-20 21:54:09,203 INFO L290 TraceCheckUtils]: 21: Hoare triple {70201#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {70215#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:54:09,203 INFO L290 TraceCheckUtils]: 22: Hoare triple {70215#(= ~ldv_state_variable_2~0 0)} assume -2147483648 <= main_#t~nondet432#1 && main_#t~nondet432#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet432#1;havoc main_#t~nondet432#1;main_#t~switch433#1 := 0 == main_~tmp___3~1#1; {70215#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:54:09,204 INFO L290 TraceCheckUtils]: 23: Hoare triple {70215#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 1 == main_~tmp___3~1#1; {70215#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:54:09,204 INFO L290 TraceCheckUtils]: 24: Hoare triple {70215#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 2 == main_~tmp___3~1#1; {70215#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:54:09,204 INFO L290 TraceCheckUtils]: 25: Hoare triple {70215#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 3 == main_~tmp___3~1#1; {70215#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:54:09,205 INFO L290 TraceCheckUtils]: 26: Hoare triple {70215#(= ~ldv_state_variable_2~0 0)} assume main_#t~switch433#1; {70215#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:54:09,205 INFO L290 TraceCheckUtils]: 27: Hoare triple {70215#(= ~ldv_state_variable_2~0 0)} assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= main_#t~nondet440#1 && main_#t~nondet440#1 <= 2147483647;main_~tmp___6~0#1 := main_#t~nondet440#1;havoc main_#t~nondet440#1;main_#t~switch441#1 := 0 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,205 INFO L290 TraceCheckUtils]: 28: Hoare triple {70202#false} assume !main_#t~switch441#1;main_#t~switch441#1 := main_#t~switch441#1 || 1 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,205 INFO L290 TraceCheckUtils]: 29: Hoare triple {70202#false} assume !main_#t~switch441#1;main_#t~switch441#1 := main_#t~switch441#1 || 2 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,205 INFO L290 TraceCheckUtils]: 30: Hoare triple {70202#false} assume !main_#t~switch441#1;main_#t~switch441#1 := main_#t~switch441#1 || 3 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 31: Hoare triple {70202#false} assume !main_#t~switch441#1;main_#t~switch441#1 := main_#t~switch441#1 || 4 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 32: Hoare triple {70202#false} assume !main_#t~switch441#1;main_#t~switch441#1 := main_#t~switch441#1 || 5 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 33: Hoare triple {70202#false} assume !main_#t~switch441#1;main_#t~switch441#1 := main_#t~switch441#1 || 6 == main_~tmp___6~0#1; {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 34: Hoare triple {70202#false} assume main_#t~switch441#1; {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 35: Hoare triple {70202#false} assume !(1 == ~ldv_state_variable_2~0); {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 36: Hoare triple {70202#false} assume !(3 == ~ldv_state_variable_2~0); {70202#false} is VALID [2022-02-20 21:54:09,206 INFO L290 TraceCheckUtils]: 37: Hoare triple {70202#false} assume 2 == ~ldv_state_variable_2~0; {70202#false} is VALID [2022-02-20 21:54:09,207 INFO L272 TraceCheckUtils]: 38: Hoare triple {70202#false} call xircom_poll_controller(~netdev_ops_group1~0.base, ~netdev_ops_group1~0.offset); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,207 INFO L290 TraceCheckUtils]: 39: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;havoc ~xp~1#1.base, ~xp~1#1.offset;havoc ~tmp~25#1.base, ~tmp~25#1.offset;havoc ~irq~1#1; {70201#true} is VALID [2022-02-20 21:54:09,207 INFO L272 TraceCheckUtils]: 40: Hoare triple {70201#true} call #t~ret255#1.base, #t~ret255#1.offset := netdev_priv(~dev#1.base, ~dev#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,207 INFO L290 TraceCheckUtils]: 41: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,207 INFO L290 TraceCheckUtils]: 42: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,207 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {70201#true} {70201#true} #2183#return; {70201#true} is VALID [2022-02-20 21:54:09,207 INFO L290 TraceCheckUtils]: 44: Hoare triple {70201#true} ~tmp~25#1.base, ~tmp~25#1.offset := #t~ret255#1.base, #t~ret255#1.offset;havoc #t~ret255#1.base, #t~ret255#1.offset;~xp~1#1.base, ~xp~1#1.offset := ~tmp~25#1.base, ~tmp~25#1.offset;call #t~mem256#1.base, #t~mem256#1.offset := read~$Pointer$(~xp~1#1.base, 148 + ~xp~1#1.offset, 8);call #t~mem257#1 := read~int(#t~mem256#1.base, 1496 + #t~mem256#1.offset, 4);~irq~1#1 := (if #t~mem257#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem257#1 % 4294967296 % 4294967296 else #t~mem257#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem256#1.base, #t~mem256#1.offset;havoc #t~mem257#1;assume { :begin_inline_disable_irq } true;disable_irq_#in~arg0#1 := ~irq~1#1;havoc disable_irq_~arg0#1;disable_irq_~arg0#1 := disable_irq_#in~arg0#1; {70201#true} is VALID [2022-02-20 21:54:09,208 INFO L290 TraceCheckUtils]: 45: Hoare triple {70201#true} assume { :end_inline_disable_irq } true; {70201#true} is VALID [2022-02-20 21:54:09,209 INFO L272 TraceCheckUtils]: 46: Hoare triple {70201#true} call #t~ret258#1 := xircom_interrupt(~irq~1#1, ~dev#1.base, ~dev#1.offset); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,209 INFO L290 TraceCheckUtils]: 47: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~irq#1 := #in~irq#1;~dev_instance#1.base, ~dev_instance#1.offset := #in~dev_instance#1.base, #in~dev_instance#1.offset;havoc ~dev~2#1.base, ~dev~2#1.offset;havoc ~card~1#1.base, ~card~1#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~ioaddr~0#1.base, ~ioaddr~0#1.offset;havoc ~status~0#1;havoc ~i~0#1;havoc ~newlink~0#1;call ~#descriptor~0#1.base, ~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc ~tmp___0~7#1;havoc ~tmp___1~3#1;~dev~2#1.base, ~dev~2#1.offset := ~dev_instance#1.base, ~dev_instance#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,209 INFO L272 TraceCheckUtils]: 48: Hoare triple {70201#true} call #t~ret209#1.base, #t~ret209#1.offset := netdev_priv(~dev~2#1.base, ~dev~2#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,209 INFO L290 TraceCheckUtils]: 49: Hoare triple {70201#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;#res.base, #res.offset := ~dev.base, 3264 + ~dev.offset; {70201#true} is VALID [2022-02-20 21:54:09,209 INFO L290 TraceCheckUtils]: 50: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,209 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {70201#true} {70201#true} #2187#return; {70201#true} is VALID [2022-02-20 21:54:09,209 INFO L290 TraceCheckUtils]: 52: Hoare triple {70201#true} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret209#1.base, #t~ret209#1.offset;havoc #t~ret209#1.base, #t~ret209#1.offset;~card~1#1.base, ~card~1#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;call #t~mem210#1.base, #t~mem210#1.offset := read~$Pointer$(~card~1#1.base, 64 + ~card~1#1.offset, 8);~ioaddr~0#1.base, ~ioaddr~0#1.offset := #t~mem210#1.base, #t~mem210#1.offset;havoc #t~mem210#1.base, #t~mem210#1.offset;assume { :begin_inline_spin_lock } true;spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset := ~card~1#1.base, 80 + ~card~1#1.offset;havoc spin_lock_~lock#1.base, spin_lock_~lock#1.offset;spin_lock_~lock#1.base, spin_lock_~lock#1.offset := spin_lock_#in~lock#1.base, spin_lock_#in~lock#1.offset;assume { :begin_inline__raw_spin_lock } true;_raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset := spin_lock_~lock#1.base, spin_lock_~lock#1.offset;havoc _raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset;_raw_spin_lock_~arg0#1.base, _raw_spin_lock_~arg0#1.offset := _raw_spin_lock_#in~arg0#1.base, _raw_spin_lock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,210 INFO L290 TraceCheckUtils]: 53: Hoare triple {70201#true} assume { :end_inline__raw_spin_lock } true; {70201#true} is VALID [2022-02-20 21:54:09,215 INFO L290 TraceCheckUtils]: 54: Hoare triple {70201#true} assume { :end_inline_spin_lock } true; {70201#true} is VALID [2022-02-20 21:54:09,216 INFO L272 TraceCheckUtils]: 55: Hoare triple {70201#true} call #t~ret211#1 := ioread32(~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,216 INFO L290 TraceCheckUtils]: 56: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,216 INFO L290 TraceCheckUtils]: 57: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,216 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {70201#true} {70201#true} #2189#return; {70201#true} is VALID [2022-02-20 21:54:09,216 INFO L290 TraceCheckUtils]: 59: Hoare triple {70201#true} ~status~0#1 := #t~ret211#1;havoc #t~ret211#1; {70201#true} is VALID [2022-02-20 21:54:09,216 INFO L290 TraceCheckUtils]: 60: Hoare triple {70201#true} assume !(0 == ~status~0#1 % 4294967296 || 4294967295 == ~status~0#1 % 4294967296);assume { :begin_inline_link_status_changed } true;link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset := ~card~1#1.base, ~card~1#1.offset;havoc link_status_changed_#res#1;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset, link_status_changed_#t~ret299#1, link_status_changed_~card#1.base, link_status_changed_~card#1.offset, link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset, link_status_changed_~val~2#1;link_status_changed_~card#1.base, link_status_changed_~card#1.offset := link_status_changed_#in~card#1.base, link_status_changed_#in~card#1.offset;havoc link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset;havoc link_status_changed_~val~2#1;call link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset := read~$Pointer$(link_status_changed_~card#1.base, 64 + link_status_changed_~card#1.offset, 8);link_status_changed_~ioaddr~6#1.base, link_status_changed_~ioaddr~6#1.offset := link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset;havoc link_status_changed_#t~mem298#1.base, link_status_changed_#t~mem298#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L272 TraceCheckUtils]: 61: Hoare triple {70201#true} call link_status_changed_#t~ret299#1 := ioread32(link_status_changed_~ioaddr~6#1.base, 40 + link_status_changed_~ioaddr~6#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L290 TraceCheckUtils]: 62: Hoare triple {70201#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset;#res := #t~nondet479;havoc #t~nondet479; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L290 TraceCheckUtils]: 63: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {70201#true} {70201#true} #2193#return; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L290 TraceCheckUtils]: 65: Hoare triple {70201#true} link_status_changed_~val~2#1 := link_status_changed_#t~ret299#1;havoc link_status_changed_#t~ret299#1; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L290 TraceCheckUtils]: 66: Hoare triple {70201#true} assume 0 == (if 0 == link_status_changed_~val~2#1 then 0 else (if 1 == link_status_changed_~val~2#1 then 0 else ~bitwiseAnd(link_status_changed_~val~2#1, 134217728))) % 4294967296;link_status_changed_#res#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L290 TraceCheckUtils]: 67: Hoare triple {70201#true} #t~ret212#1 := link_status_changed_#res#1;assume { :end_inline_link_status_changed } true;assume -2147483648 <= #t~ret212#1 && #t~ret212#1 <= 2147483647;~tmp___1~3#1 := #t~ret212#1;havoc #t~ret212#1; {70201#true} is VALID [2022-02-20 21:54:09,217 INFO L290 TraceCheckUtils]: 68: Hoare triple {70201#true} assume !(0 != ~tmp___1~3#1); {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L290 TraceCheckUtils]: 69: Hoare triple {70201#true} ~status~0#1 := 4294967295; {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L272 TraceCheckUtils]: 70: Hoare triple {70201#true} call iowrite32(~status~0#1, ~ioaddr~0#1.base, 40 + ~ioaddr~0#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L290 TraceCheckUtils]: 71: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L290 TraceCheckUtils]: 72: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {70201#true} {70201#true} #2199#return; {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L290 TraceCheckUtils]: 74: Hoare triple {70201#true} ~i~0#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,218 INFO L290 TraceCheckUtils]: 75: Hoare triple {70201#true} assume ~i~0#1 <= 3; {70201#true} is VALID [2022-02-20 21:54:09,219 INFO L290 TraceCheckUtils]: 76: Hoare triple {70201#true} call #t~mem218#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {70201#true} is VALID [2022-02-20 21:54:09,220 INFO L272 TraceCheckUtils]: 77: Hoare triple {70201#true} call investigate_write_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem218#1); {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 21:54:09,220 INFO L290 TraceCheckUtils]: 78: Hoare triple {70452#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~2#1;call #t~mem406#1.base, #t~mem406#1.offset := read~$Pointer$(~card#1.base, 8 + ~card#1.offset, 8);call #t~mem407#1 := read~int(#t~mem406#1.base, #t~mem406#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~2#1 := (if #t~mem407#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem407#1 % 4294967296 % 4294967296 else #t~mem407#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem406#1.base, #t~mem406#1.offset;havoc #t~mem407#1; {70201#true} is VALID [2022-02-20 21:54:09,220 INFO L290 TraceCheckUtils]: 79: Hoare triple {70201#true} assume !(~status~2#1 > 0); {70201#true} is VALID [2022-02-20 21:54:09,220 INFO L290 TraceCheckUtils]: 80: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,220 INFO L284 TraceCheckUtils]: 81: Hoare quadruple {70201#true} {70201#true} #2201#return; {70201#true} is VALID [2022-02-20 21:54:09,221 INFO L290 TraceCheckUtils]: 82: Hoare triple {70201#true} havoc #t~mem218#1;~i~0#1 := 1 + ~i~0#1; {70201#true} is VALID [2022-02-20 21:54:09,221 INFO L290 TraceCheckUtils]: 83: Hoare triple {70201#true} assume !(~i~0#1 <= 3);~i~0#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,221 INFO L290 TraceCheckUtils]: 84: Hoare triple {70201#true} assume ~i~0#1 <= 3; {70201#true} is VALID [2022-02-20 21:54:09,221 INFO L290 TraceCheckUtils]: 85: Hoare triple {70201#true} call #t~mem219#1 := read~int(~#bufferoffsets~0.base, ~#bufferoffsets~0.offset + 4 * ~i~0#1, 4); {70201#true} is VALID [2022-02-20 21:54:09,222 INFO L272 TraceCheckUtils]: 86: Hoare triple {70201#true} call investigate_read_descriptor(~dev~2#1.base, ~dev~2#1.offset, ~card~1#1.base, ~card~1#1.offset, ~i~0#1, #t~mem219#1); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,222 INFO L290 TraceCheckUtils]: 87: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~card#1.base, ~card#1.offset := #in~card#1.base, #in~card#1.offset;~descnr#1 := #in~descnr#1;~bufferoffset#1 := #in~bufferoffset#1;havoc ~status~1#1;havoc ~pkt_len~0#1;havoc ~skb~0#1.base, ~skb~0#1.offset;call #t~mem394#1.base, #t~mem394#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call #t~mem395#1 := read~int(#t~mem394#1.base, #t~mem394#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);~status~1#1 := (if #t~mem395#1 % 4294967296 % 4294967296 <= 2147483647 then #t~mem395#1 % 4294967296 % 4294967296 else #t~mem395#1 % 4294967296 % 4294967296 - 4294967296);havoc #t~mem394#1.base, #t~mem394#1.offset;havoc #t~mem395#1; {70201#true} is VALID [2022-02-20 21:54:09,222 INFO L290 TraceCheckUtils]: 88: Hoare triple {70201#true} assume ~status~1#1 > 0;~pkt_len~0#1 := (if (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 <= 32767 then (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 else (65532 + (if 0 == ~status~1#1 / 65536 % 65536 then 0 else (if 1 == ~status~1#1 / 65536 % 65536 then 1 else ~bitwiseAnd(~status~1#1 / 65536 % 65536, 2047)))) % 4294967296 % 65536 - 65536); {70201#true} is VALID [2022-02-20 21:54:09,223 INFO L290 TraceCheckUtils]: 89: Hoare triple {70201#true} assume ~pkt_len~0#1 > 1518;havoc #t~nondet396#1;~pkt_len~0#1 := 1518; {70201#true} is VALID [2022-02-20 21:54:09,223 INFO L290 TraceCheckUtils]: 90: Hoare triple {70201#true} assume { :begin_inline_ldv_netdev_alloc_skb_18 } true;ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset, ldv_netdev_alloc_skb_18_#in~length#1 := ~dev#1.base, ~dev#1.offset, 2 + ~pkt_len~0#1;havoc ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset, ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset, ldv_netdev_alloc_skb_18_~length#1, ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset;ldv_netdev_alloc_skb_18_~dev#1.base, ldv_netdev_alloc_skb_18_~dev#1.offset := ldv_netdev_alloc_skb_18_#in~dev#1.base, ldv_netdev_alloc_skb_18_#in~dev#1.offset;ldv_netdev_alloc_skb_18_~length#1 := ldv_netdev_alloc_skb_18_#in~length#1;havoc ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,223 INFO L272 TraceCheckUtils]: 91: Hoare triple {70201#true} call ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset := ldv_skb_alloc(); {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} is VALID [2022-02-20 21:54:09,223 INFO L290 TraceCheckUtils]: 92: Hoare triple {70312#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|) (= |old(~last_index~0)| ~last_index~0))} havoc ~skb~1#1.base, ~skb~1#1.offset;havoc ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,224 INFO L272 TraceCheckUtils]: 93: Hoare triple {70201#true} call #t~ret465#1.base, #t~ret465#1.offset := ldv_zalloc(248); {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:54:09,224 INFO L290 TraceCheckUtils]: 94: Hoare triple {70311#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~6#1.base, ~tmp~6#1.offset;havoc ~tmp___0~3#1;assume -2147483648 <= #t~nondet95#1 && #t~nondet95#1 <= 2147483647;~tmp___0~3#1 := #t~nondet95#1;havoc #t~nondet95#1; {70201#true} is VALID [2022-02-20 21:54:09,224 INFO L290 TraceCheckUtils]: 95: Hoare triple {70201#true} assume 0 != ~tmp___0~3#1;#res#1.base, #res#1.offset := 0, 0; {70201#true} is VALID [2022-02-20 21:54:09,224 INFO L290 TraceCheckUtils]: 96: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L284 TraceCheckUtils]: 97: Hoare quadruple {70201#true} {70201#true} #2179#return; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 98: Hoare triple {70201#true} ~tmp___7~1#1.base, ~tmp___7~1#1.offset := #t~ret465#1.base, #t~ret465#1.offset;havoc #t~ret465#1.base, #t~ret465#1.offset;~skb~1#1.base, ~skb~1#1.offset := ~tmp___7~1#1.base, ~tmp___7~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 99: Hoare triple {70201#true} assume !(~skb~1#1.base == 0 && ~skb~1#1.offset == 0);assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset, ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset, ~skb~1#1.base, ~skb~1#1.offset;havoc ldv_set_add_#t~mem460#1.base, ldv_set_add_#t~mem460#1.offset, ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset, ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ldv_set_add_~i~4#1;ldv_set_add_~set#1.base, ldv_set_add_~set#1.offset := ldv_set_add_#in~set#1.base, ldv_set_add_#in~set#1.offset;ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset := ldv_set_add_#in~e#1.base, ldv_set_add_#in~e#1.offset;havoc ldv_set_add_~i~4#1;ldv_set_add_~i~4#1 := 0; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 100: Hoare triple {70201#true} assume !false; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 101: Hoare triple {70201#true} assume !(ldv_set_add_~i~4#1 < ~last_index~0); {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 102: Hoare triple {70201#true} assume ~last_index~0 < 15;call write~$Pointer$(ldv_set_add_~e#1.base, ldv_set_add_~e#1.offset, ~#set_impl~0.base, ~#set_impl~0.offset + 8 * ~last_index~0, 8);~last_index~0 := 1 + ~last_index~0; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 103: Hoare triple {70201#true} assume { :end_inline_ldv_set_add } true;#res#1.base, #res#1.offset := ~skb~1#1.base, ~skb~1#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,225 INFO L290 TraceCheckUtils]: 104: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L284 TraceCheckUtils]: 105: Hoare quadruple {70201#true} {70201#true} #2207#return; {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L290 TraceCheckUtils]: 106: Hoare triple {70201#true} ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset := ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;havoc ldv_netdev_alloc_skb_18_#t~ret458#1.base, ldv_netdev_alloc_skb_18_#t~ret458#1.offset;ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset := ldv_netdev_alloc_skb_18_~tmp~46#1.base, ldv_netdev_alloc_skb_18_~tmp~46#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L290 TraceCheckUtils]: 107: Hoare triple {70201#true} #t~ret397#1.base, #t~ret397#1.offset := ldv_netdev_alloc_skb_18_#res#1.base, ldv_netdev_alloc_skb_18_#res#1.offset;assume { :end_inline_ldv_netdev_alloc_skb_18 } true;~skb~0#1.base, ~skb~0#1.offset := #t~ret397#1.base, #t~ret397#1.offset;havoc #t~ret397#1.base, #t~ret397#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L290 TraceCheckUtils]: 108: Hoare triple {70201#true} assume 0 == (~skb~0#1.base + ~skb~0#1.offset) % 18446744073709551616;call #t~mem398#1 := read~int(~dev#1.base, 308 + ~dev#1.offset, 8);call write~int(1 + #t~mem398#1, ~dev#1.base, 308 + ~dev#1.offset, 8);havoc #t~mem398#1; {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L290 TraceCheckUtils]: 109: Hoare triple {70201#true} call #t~mem405#1.base, #t~mem405#1.offset := read~$Pointer$(~card#1.base, ~card#1.offset, 8);call write~int(2147483648, #t~mem405#1.base, #t~mem405#1.offset + 4 * (if 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 else 4 * ~descnr#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc #t~mem405#1.base, #t~mem405#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L272 TraceCheckUtils]: 110: Hoare triple {70201#true} call trigger_receive(~card#1.base, ~card#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,226 INFO L290 TraceCheckUtils]: 111: Hoare triple {70201#true} ~card.base, ~card.offset := #in~card.base, #in~card.offset;havoc ~ioaddr~3.base, ~ioaddr~3.offset;call #t~mem267.base, #t~mem267.offset := read~$Pointer$(~card.base, 64 + ~card.offset, 8);~ioaddr~3.base, ~ioaddr~3.offset := #t~mem267.base, #t~mem267.offset;havoc #t~mem267.base, #t~mem267.offset; {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L272 TraceCheckUtils]: 112: Hoare triple {70201#true} call iowrite32(0, ~ioaddr~3.base, 16 + ~ioaddr~3.offset); {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L290 TraceCheckUtils]: 113: Hoare triple {70201#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L290 TraceCheckUtils]: 114: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L284 TraceCheckUtils]: 115: Hoare quadruple {70201#true} {70201#true} #2163#return; {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L290 TraceCheckUtils]: 116: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L284 TraceCheckUtils]: 117: Hoare quadruple {70201#true} {70201#true} #2213#return; {70201#true} is VALID [2022-02-20 21:54:09,227 INFO L290 TraceCheckUtils]: 118: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L284 TraceCheckUtils]: 119: Hoare quadruple {70201#true} {70201#true} #2203#return; {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L290 TraceCheckUtils]: 120: Hoare triple {70201#true} havoc #t~mem219#1;~i~0#1 := 1 + ~i~0#1; {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L290 TraceCheckUtils]: 121: Hoare triple {70201#true} assume !(~i~0#1 <= 3); {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L272 TraceCheckUtils]: 122: Hoare triple {70201#true} call spin_unlock(~card~1#1.base, 80 + ~card~1#1.offset); {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L290 TraceCheckUtils]: 123: Hoare triple {70201#true} ~lock#1.base, ~lock#1.offset := #in~lock#1.base, #in~lock#1.offset;assume { :begin_inline__raw_spin_unlock } true;_raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset := ~lock#1.base, ~lock#1.offset;havoc _raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset;_raw_spin_unlock_~arg0#1.base, _raw_spin_unlock_~arg0#1.offset := _raw_spin_unlock_#in~arg0#1.base, _raw_spin_unlock_#in~arg0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L290 TraceCheckUtils]: 124: Hoare triple {70201#true} assume { :end_inline__raw_spin_unlock } true; {70201#true} is VALID [2022-02-20 21:54:09,228 INFO L290 TraceCheckUtils]: 125: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {70201#true} {70201#true} #2205#return; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L290 TraceCheckUtils]: 127: Hoare triple {70201#true} #res#1 := 1;call ULTIMATE.dealloc(~#descriptor~0#1.base, ~#descriptor~0#1.offset);havoc ~#descriptor~0#1.base, ~#descriptor~0#1.offset; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L290 TraceCheckUtils]: 128: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L284 TraceCheckUtils]: 129: Hoare quadruple {70201#true} {70201#true} #2185#return; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L290 TraceCheckUtils]: 130: Hoare triple {70201#true} assume -2147483648 <= #t~ret258#1 && #t~ret258#1 <= 2147483647;havoc #t~ret258#1;assume { :begin_inline_enable_irq } true;enable_irq_#in~arg0#1 := ~irq~1#1;havoc enable_irq_~arg0#1;enable_irq_~arg0#1 := enable_irq_#in~arg0#1; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L290 TraceCheckUtils]: 131: Hoare triple {70201#true} assume { :end_inline_enable_irq } true; {70201#true} is VALID [2022-02-20 21:54:09,229 INFO L290 TraceCheckUtils]: 132: Hoare triple {70201#true} assume true; {70201#true} is VALID [2022-02-20 21:54:09,230 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {70201#true} {70202#false} #2531#return; {70202#false} is VALID [2022-02-20 21:54:09,230 INFO L290 TraceCheckUtils]: 134: Hoare triple {70202#false} ~ldv_state_variable_2~0 := 2; {70202#false} is VALID [2022-02-20 21:54:09,230 INFO L290 TraceCheckUtils]: 135: Hoare triple {70202#false} assume -2147483648 <= main_#t~nondet432#1 && main_#t~nondet432#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet432#1;havoc main_#t~nondet432#1;main_#t~switch433#1 := 0 == main_~tmp___3~1#1; {70202#false} is VALID [2022-02-20 21:54:09,230 INFO L290 TraceCheckUtils]: 136: Hoare triple {70202#false} assume !main_#t~switch433#1;main_#t~switch433#1 := main_#t~switch433#1 || 1 == main_~tmp___3~1#1; {70202#false} is VALID [2022-02-20 21:54:09,230 INFO L290 TraceCheckUtils]: 137: Hoare triple {70202#false} assume main_#t~switch433#1; {70202#false} is VALID [2022-02-20 21:54:09,230 INFO L290 TraceCheckUtils]: 138: Hoare triple {70202#false} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet434#1 && main_#t~nondet434#1 <= 2147483647;main_~tmp___4~1#1 := main_#t~nondet434#1;havoc main_#t~nondet434#1;main_#t~switch435#1 := 0 == main_~tmp___4~1#1; {70202#false} is VALID [2022-02-20 21:54:09,230 INFO L290 TraceCheckUtils]: 139: Hoare triple {70202#false} assume !main_#t~switch435#1;main_#t~switch435#1 := main_#t~switch435#1 || 1 == main_~tmp___4~1#1; {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 140: Hoare triple {70202#false} assume main_#t~switch435#1; {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 141: Hoare triple {70202#false} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_xircom_ops_init } true;havoc xircom_ops_init_#res#1;havoc xircom_ops_init_#t~ret416#1, xircom_ops_init_~tmp~38#1;havoc xircom_ops_init_~tmp~38#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#xircom_ops~0.base, ~#xircom_ops~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 33, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet472#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet472#1 && __pci_register_driver_#t~nondet472#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet472#1;havoc __pci_register_driver_#t~nondet472#1; {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 142: Hoare triple {70202#false} xircom_ops_init_#t~ret416#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= xircom_ops_init_#t~ret416#1 && xircom_ops_init_#t~ret416#1 <= 2147483647;xircom_ops_init_~tmp~38#1 := xircom_ops_init_#t~ret416#1;havoc xircom_ops_init_#t~ret416#1;xircom_ops_init_#res#1 := xircom_ops_init_~tmp~38#1; {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 143: Hoare triple {70202#false} main_#t~ret436#1 := xircom_ops_init_#res#1;assume { :end_inline_xircom_ops_init } true;assume -2147483648 <= main_#t~ret436#1 && main_#t~ret436#1 <= 2147483647;~ldv_retval_0~0 := main_#t~ret436#1;havoc main_#t~ret436#1; {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 144: Hoare triple {70202#false} assume !(0 == ~ldv_retval_0~0); {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 145: Hoare triple {70202#false} assume 0 != ~ldv_retval_0~0;~ldv_state_variable_0~0 := 2; {70202#false} is VALID [2022-02-20 21:54:09,231 INFO L290 TraceCheckUtils]: 146: Hoare triple {70202#false} assume { :begin_inline_ldv_check_final_state } true;havoc ldv_check_final_state_#t~ret469#1, ldv_check_final_state_~tmp___7~5#1;havoc ldv_check_final_state_~tmp___7~5#1;assume { :begin_inline_ldv_set_is_empty } true;ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_is_empty_#res#1;havoc ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset;ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset := ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset;ldv_set_is_empty_#res#1 := (if 0 == ~last_index~0 then 1 else 0); {70202#false} is VALID [2022-02-20 21:54:09,232 INFO L290 TraceCheckUtils]: 147: Hoare triple {70202#false} ldv_check_final_state_#t~ret469#1 := ldv_set_is_empty_#res#1;assume { :end_inline_ldv_set_is_empty } true;assume -2147483648 <= ldv_check_final_state_#t~ret469#1 && ldv_check_final_state_#t~ret469#1 <= 2147483647;ldv_check_final_state_~tmp___7~5#1 := ldv_check_final_state_#t~ret469#1;havoc ldv_check_final_state_#t~ret469#1; {70202#false} is VALID [2022-02-20 21:54:09,232 INFO L290 TraceCheckUtils]: 148: Hoare triple {70202#false} assume !(0 != ldv_check_final_state_~tmp___7~5#1); {70202#false} is VALID [2022-02-20 21:54:09,232 INFO L272 TraceCheckUtils]: 149: Hoare triple {70202#false} call ldv_error(); {70202#false} is VALID [2022-02-20 21:54:09,232 INFO L290 TraceCheckUtils]: 150: Hoare triple {70202#false} assume !false; {70202#false} is VALID [2022-02-20 21:54:09,233 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-02-20 21:54:09,233 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:54:09,233 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599088006] [2022-02-20 21:54:09,233 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599088006] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:54:09,233 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:54:09,233 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 21:54:09,234 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473034795] [2022-02-20 21:54:09,234 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:54:09,235 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 16.833333333333332) internal successors, (101), 3 states have internal predecessors, (101), 2 states have call successors, (18), 5 states have call predecessors, (18), 1 states have return successors, (17), 2 states have call predecessors, (17), 2 states have call successors, (17) Word has length 151 [2022-02-20 21:54:09,236 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:54:09,236 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 16.833333333333332) internal successors, (101), 3 states have internal predecessors, (101), 2 states have call successors, (18), 5 states have call predecessors, (18), 1 states have return successors, (17), 2 states have call predecessors, (17), 2 states have call successors, (17) [2022-02-20 21:54:09,322 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 136 edges. 136 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:54:09,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 21:54:09,323 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:54:09,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 21:54:09,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-02-20 21:54:09,324 INFO L87 Difference]: Start difference. First operand 6894 states and 9564 transitions. Second operand has 6 states, 6 states have (on average 16.833333333333332) internal successors, (101), 3 states have internal predecessors, (101), 2 states have call successors, (18), 5 states have call predecessors, (18), 1 states have return successors, (17), 2 states have call predecessors, (17), 2 states have call successors, (17)