./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4e928bce7a5eba940349fe986fce1ee6d952316584823caa32f480aa4c9f0c38 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:56:12,992 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:56:12,993 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:56:13,012 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:56:13,019 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:56:13,020 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:56:13,021 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:56:13,022 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:56:13,023 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:56:13,023 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:56:13,024 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:56:13,024 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:56:13,025 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:56:13,025 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:56:13,026 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:56:13,027 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:56:13,027 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:56:13,028 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:56:13,029 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:56:13,030 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:56:13,031 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:56:13,032 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:56:13,033 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:56:13,033 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:56:13,035 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:56:13,036 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:56:13,036 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:56:13,036 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:56:13,037 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:56:13,037 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:56:13,038 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:56:13,038 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:56:13,039 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:56:13,039 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:56:13,040 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:56:13,040 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:56:13,040 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:56:13,041 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:56:13,041 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:56:13,041 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:56:13,042 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:56:13,043 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:56:13,056 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:56:13,056 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:56:13,057 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:56:13,057 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:56:13,057 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:56:13,057 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:56:13,058 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:56:13,058 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:56:13,058 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:56:13,058 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:56:13,059 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:56:13,059 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:56:13,059 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:56:13,059 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:56:13,059 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:56:13,059 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:56:13,060 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:56:13,060 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:56:13,060 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:56:13,060 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:56:13,060 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:56:13,060 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:56:13,061 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:56:13,061 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:56:13,061 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:56:13,061 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:56:13,061 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:56:13,062 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:56:13,062 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:56:13,063 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:56:13,063 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4e928bce7a5eba940349fe986fce1ee6d952316584823caa32f480aa4c9f0c38 [2022-02-20 21:56:13,257 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:56:13,274 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:56:13,276 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:56:13,277 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:56:13,278 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:56:13,279 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i [2022-02-20 21:56:13,332 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5ebd79ba0/f8699eaa62ee494c9332990fd515be13/FLAG2902dd83b [2022-02-20 21:56:14,009 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:56:14,010 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i [2022-02-20 21:56:14,043 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5ebd79ba0/f8699eaa62ee494c9332990fd515be13/FLAG2902dd83b [2022-02-20 21:56:14,362 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5ebd79ba0/f8699eaa62ee494c9332990fd515be13 [2022-02-20 21:56:14,365 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:56:14,366 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:56:14,367 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:56:14,367 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:56:14,369 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:56:14,370 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:56:14" (1/1) ... [2022-02-20 21:56:14,372 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c3a1d81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:14, skipping insertion in model container [2022-02-20 21:56:14,372 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:56:14" (1/1) ... [2022-02-20 21:56:14,376 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:56:14,475 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:56:15,056 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i[209352,209365] [2022-02-20 21:56:15,741 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:56:15,779 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:56:15,899 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i[209352,209365] [2022-02-20 21:56:16,086 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:56:16,185 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:56:16,186 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16 WrapperNode [2022-02-20 21:56:16,187 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:56:16,188 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:56:16,188 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:56:16,188 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:56:16,193 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,273 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,435 INFO L137 Inliner]: procedures = 188, calls = 2240, calls flagged for inlining = 91, calls inlined = 86, statements flattened = 4997 [2022-02-20 21:56:16,435 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:56:16,436 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:56:16,436 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:56:16,436 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:56:16,442 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,442 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,471 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,473 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,604 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,629 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,649 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,673 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:56:16,675 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:56:16,675 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:56:16,675 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:56:16,676 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (1/1) ... [2022-02-20 21:56:16,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:56:16,692 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:56:16,720 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:56:16,728 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:56:16,756 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2022-02-20 21:56:16,757 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2022-02-20 21:56:16,757 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_alloc_skb_14 [2022-02-20 21:56:16,757 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_alloc_skb_14 [2022-02-20 21:56:16,757 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:56:16,757 INFO L130 BoogieDeclarations]: Found specification of procedure sdio_release_host [2022-02-20 21:56:16,757 INFO L138 BoogieDeclarations]: Found implementation of procedure sdio_release_host [2022-02-20 21:56:16,757 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_write_data_to_card [2022-02-20 21:56:16,758 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_write_data_to_card [2022-02-20 21:56:16,758 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:56:16,758 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:56:16,758 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:56:16,758 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:56:16,758 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:56:16,758 INFO L130 BoogieDeclarations]: Found specification of procedure sdio_get_host_pm_caps [2022-02-20 21:56:16,758 INFO L138 BoogieDeclarations]: Found implementation of procedure sdio_get_host_pm_caps [2022-02-20 21:56:16,758 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_write_data_sync [2022-02-20 21:56:16,759 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_write_data_sync [2022-02-20 21:56:16,759 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:56:16,759 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:56:16,759 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_sdio_card_to_host [2022-02-20 21:56:16,759 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_sdio_card_to_host [2022-02-20 21:56:16,759 INFO L130 BoogieDeclarations]: Found specification of procedure mp_tx_aggr_port_limit_reached [2022-02-20 21:56:16,760 INFO L138 BoogieDeclarations]: Found implementation of procedure mp_tx_aggr_port_limit_reached [2022-02-20 21:56:16,760 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:56:16,760 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:56:16,760 INFO L130 BoogieDeclarations]: Found specification of procedure skb_trim [2022-02-20 21:56:16,760 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_trim [2022-02-20 21:56:16,760 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_get_priv [2022-02-20 21:56:16,760 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_get_priv [2022-02-20 21:56:16,760 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_skb_alloc [2022-02-20 21:56:16,760 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_skb_alloc [2022-02-20 21:56:16,761 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 21:56:16,761 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 21:56:16,761 INFO L130 BoogieDeclarations]: Found specification of procedure usleep_range [2022-02-20 21:56:16,761 INFO L138 BoogieDeclarations]: Found implementation of procedure usleep_range [2022-02-20 21:56:16,761 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_read_reg [2022-02-20 21:56:16,761 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_read_reg [2022-02-20 21:56:16,761 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:56:16,762 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_write_reg [2022-02-20 21:56:16,762 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_write_reg [2022-02-20 21:56:16,762 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:56:16,762 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:56:16,762 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_read_data_sync [2022-02-20 21:56:16,762 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_read_data_sync [2022-02-20 21:56:16,762 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:56:16,762 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:56:16,762 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_u16 [2022-02-20 21:56:16,763 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:56:16,763 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:56:16,763 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:56:16,763 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-02-20 21:56:16,763 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-02-20 21:56:16,763 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2022-02-20 21:56:16,764 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_kfree_skb_any [2022-02-20 21:56:16,764 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:56:16,764 INFO L130 BoogieDeclarations]: Found specification of procedure sdio_release_irq [2022-02-20 21:56:16,764 INFO L138 BoogieDeclarations]: Found implementation of procedure sdio_release_irq [2022-02-20 21:56:16,765 INFO L130 BoogieDeclarations]: Found specification of procedure sdio_disable_func [2022-02-20 21:56:16,765 INFO L138 BoogieDeclarations]: Found implementation of procedure sdio_disable_func [2022-02-20 21:56:16,765 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:56:16,766 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:56:16,766 INFO L130 BoogieDeclarations]: Found specification of procedure sdio_claim_host [2022-02-20 21:56:16,766 INFO L138 BoogieDeclarations]: Found implementation of procedure sdio_claim_host [2022-02-20 21:56:16,766 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_write_reg_locked [2022-02-20 21:56:16,766 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_write_reg_locked [2022-02-20 21:56:16,766 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_sdio_cmdrsp_complete [2022-02-20 21:56:16,766 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_sdio_cmdrsp_complete [2022-02-20 21:56:16,766 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:56:16,766 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_u32 [2022-02-20 21:56:16,767 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 21:56:16,767 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 21:56:16,767 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:56:16,767 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2022-02-20 21:56:16,767 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2022-02-20 21:56:16,768 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:56:16,768 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-02-20 21:56:16,768 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-02-20 21:56:16,768 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 21:56:16,768 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 21:56:16,768 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memmove [2022-02-20 21:56:16,768 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memmove [2022-02-20 21:56:16,768 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-02-20 21:56:16,768 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-02-20 21:56:16,769 INFO L130 BoogieDeclarations]: Found specification of procedure dev_name [2022-02-20 21:56:16,769 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_name [2022-02-20 21:56:16,769 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:56:16,769 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_host_to_card_mp_aggr [2022-02-20 21:56:16,769 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_host_to_card_mp_aggr [2022-02-20 21:56:16,769 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_sdio_resume [2022-02-20 21:56:16,769 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_sdio_resume [2022-02-20 21:56:16,770 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:56:16,770 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_u8 [2022-02-20 21:56:16,770 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:56:16,770 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:56:16,770 INFO L130 BoogieDeclarations]: Found specification of procedure mwifiex_decode_rx_packet [2022-02-20 21:56:16,771 INFO L138 BoogieDeclarations]: Found implementation of procedure mwifiex_decode_rx_packet [2022-02-20 21:56:16,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:56:16,771 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:56:17,370 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:56:17,372 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:56:17,516 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:56:25,008 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:56:25,022 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:56:25,023 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-02-20 21:56:25,025 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:56:25 BoogieIcfgContainer [2022-02-20 21:56:25,025 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:56:25,026 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:56:25,026 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:56:25,029 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:56:25,029 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:56:14" (1/3) ... [2022-02-20 21:56:25,029 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d13c185 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:56:25, skipping insertion in model container [2022-02-20 21:56:25,030 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:56:16" (2/3) ... [2022-02-20 21:56:25,030 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d13c185 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:56:25, skipping insertion in model container [2022-02-20 21:56:25,030 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:56:25" (3/3) ... [2022-02-20 21:56:25,031 INFO L111 eAbstractionObserver]: Analyzing ICFG 205_9a_array_unsafes_linux-3.16-rc1.tar.xz-205_9a-drivers--net--wireless--mwifiex--mwifiex_sdio.ko-entry_point.cil.out.i [2022-02-20 21:56:25,035 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:56:25,035 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:56:25,071 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:56:25,076 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:56:25,076 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:56:25,118 INFO L276 IsEmpty]: Start isEmpty. Operand has 1121 states, 888 states have (on average 1.4617117117117118) internal successors, (1298), 901 states have internal predecessors, (1298), 192 states have call successors, (192), 40 states have call predecessors, (192), 39 states have return successors, (186), 185 states have call predecessors, (186), 186 states have call successors, (186) [2022-02-20 21:56:25,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-02-20 21:56:25,135 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:56:25,136 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:56:25,137 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:56:25,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:56:25,146 INFO L85 PathProgramCache]: Analyzing trace with hash -67190774, now seen corresponding path program 1 times [2022-02-20 21:56:25,156 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:56:25,160 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894963038] [2022-02-20 21:56:25,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:56:25,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:56:25,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:25,640 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:56:25,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:25,669 INFO L290 TraceCheckUtils]: 0: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,669 INFO L290 TraceCheckUtils]: 1: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,669 INFO L290 TraceCheckUtils]: 2: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,669 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1124#true} {1124#true} #3157#return; {1124#true} is VALID [2022-02-20 21:56:25,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:56:25,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:25,683 INFO L290 TraceCheckUtils]: 0: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,683 INFO L290 TraceCheckUtils]: 1: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,684 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1124#true} {1124#true} #3159#return; {1124#true} is VALID [2022-02-20 21:56:25,684 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:56:25,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:25,693 INFO L290 TraceCheckUtils]: 0: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,693 INFO L290 TraceCheckUtils]: 1: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,694 INFO L290 TraceCheckUtils]: 2: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,694 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1124#true} {1124#true} #3161#return; {1124#true} is VALID [2022-02-20 21:56:25,694 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:56:25,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:25,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,703 INFO L290 TraceCheckUtils]: 1: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,703 INFO L290 TraceCheckUtils]: 2: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,704 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1124#true} {1124#true} #3163#return; {1124#true} is VALID [2022-02-20 21:56:25,706 INFO L290 TraceCheckUtils]: 0: Hoare triple {1124#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(121, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(16, 4);call #Ultimate.allocInit(23, 5);call #Ultimate.allocInit(23, 6);call #Ultimate.allocInit(23, 7);call #Ultimate.allocInit(23, 8);call #Ultimate.allocInit(13, 9);call #Ultimate.allocInit(19, 10);call #Ultimate.allocInit(232, 11);call #Ultimate.allocInit(60, 12);call #Ultimate.allocInit(74, 13);call #Ultimate.allocInit(46, 14);call #Ultimate.allocInit(19, 15);call #Ultimate.allocInit(36, 16);call #Ultimate.allocInit(19, 17);call #Ultimate.allocInit(48, 18);call #Ultimate.allocInit(51, 19);call #Ultimate.allocInit(24, 20);call #Ultimate.allocInit(13, 21);call #Ultimate.allocInit(20, 22);call #Ultimate.allocInit(232, 23);call #Ultimate.allocInit(24, 24);call #Ultimate.allocInit(38, 25);call #Ultimate.allocInit(13, 26);call #Ultimate.allocInit(21, 27);call #Ultimate.allocInit(232, 28);call #Ultimate.allocInit(34, 29);call #Ultimate.allocInit(48, 30);call #Ultimate.allocInit(64, 31);call #Ultimate.allocInit(49, 32);call #Ultimate.allocInit(52, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(13, 35);call #Ultimate.allocInit(21, 36);call #Ultimate.allocInit(232, 37);call #Ultimate.allocInit(37, 38);call #Ultimate.allocInit(37, 39);call #Ultimate.allocInit(13, 40);call #Ultimate.allocInit(33, 41);call #Ultimate.allocInit(24, 42);call #Ultimate.allocInit(13, 43);call #Ultimate.allocInit(23, 44);call #Ultimate.allocInit(232, 45);call #Ultimate.allocInit(25, 46);call #Ultimate.allocInit(25, 47);call #Ultimate.allocInit(13, 48);call #Ultimate.allocInit(32, 49);call #Ultimate.allocInit(232, 50);call #Ultimate.allocInit(30, 51);call #Ultimate.allocInit(30, 52);call #Ultimate.allocInit(13, 53);call #Ultimate.allocInit(25, 54);call #Ultimate.allocInit(232, 55);call #Ultimate.allocInit(31, 56);call #Ultimate.allocInit(45, 57);call #Ultimate.allocInit(43, 58);call #Ultimate.allocInit(22, 59);call #Ultimate.allocInit(13, 60);call #Ultimate.allocInit(20, 61);call #Ultimate.allocInit(232, 62);call #Ultimate.allocInit(27, 63);call #Ultimate.allocInit(27, 64);call #Ultimate.allocInit(13, 65);call #Ultimate.allocInit(20, 66);call #Ultimate.allocInit(232, 67);call #Ultimate.allocInit(35, 68);call #Ultimate.allocInit(35, 69);call #Ultimate.allocInit(13, 70);call #Ultimate.allocInit(20, 71);call #Ultimate.allocInit(232, 72);call #Ultimate.allocInit(45, 73);call #Ultimate.allocInit(45, 74);call #Ultimate.allocInit(13, 75);call #Ultimate.allocInit(25, 76);call #Ultimate.allocInit(232, 77);call #Ultimate.allocInit(27, 78);call #Ultimate.allocInit(27, 79);call #Ultimate.allocInit(64, 80);call #Ultimate.allocInit(13, 81);call #Ultimate.allocInit(25, 82);call #Ultimate.allocInit(232, 83);call #Ultimate.allocInit(45, 84);call #Ultimate.allocInit(45, 85);call #Ultimate.allocInit(37, 86);call #Ultimate.allocInit(21, 87);call #Ultimate.allocInit(13, 88);call #Ultimate.allocInit(25, 89);call #Ultimate.allocInit(232, 90);call #Ultimate.allocInit(22, 91);call #Ultimate.allocInit(22, 92);call #Ultimate.allocInit(13, 93);call #Ultimate.allocInit(23, 94);call #Ultimate.allocInit(232, 95);call #Ultimate.allocInit(33, 96);call #Ultimate.allocInit(47, 97);call #Ultimate.allocInit(26, 98);call #Ultimate.allocInit(30, 99);call #Ultimate.allocInit(20, 100);call #Ultimate.allocInit(26, 101);call #Ultimate.allocInit(27, 102);call #Ultimate.allocInit(26, 103);call #Ultimate.allocInit(39, 104);call #Ultimate.allocInit(26, 105);call #Ultimate.allocInit(48, 106);call #Ultimate.allocInit(13, 107);call #Ultimate.allocInit(25, 108);call #Ultimate.allocInit(232, 109);call #Ultimate.allocInit(39, 110);call #Ultimate.allocInit(39, 111);call #Ultimate.allocInit(51, 112);call #Ultimate.allocInit(67, 113);call #Ultimate.allocInit(67, 114);call #Ultimate.allocInit(40, 115);call #Ultimate.allocInit(37, 116);call #Ultimate.allocInit(55, 117);call #Ultimate.allocInit(43, 118);call #Ultimate.allocInit(22, 119);call #Ultimate.allocInit(13, 120);call #Ultimate.allocInit(25, 121);call #Ultimate.allocInit(232, 122);call #Ultimate.allocInit(39, 123);call #Ultimate.allocInit(39, 124);call #Ultimate.allocInit(13, 125);call #Ultimate.allocInit(25, 126);call #Ultimate.allocInit(232, 127);call #Ultimate.allocInit(31, 128);call #Ultimate.allocInit(31, 129);call #Ultimate.allocInit(13, 130);call #Ultimate.allocInit(25, 131);call #Ultimate.allocInit(232, 132);call #Ultimate.allocInit(32, 133);call #Ultimate.allocInit(32, 134);call #Ultimate.allocInit(13, 135);call #Ultimate.allocInit(25, 136);call #Ultimate.allocInit(232, 137);call #Ultimate.allocInit(25, 138);call #Ultimate.allocInit(25, 139);call #Ultimate.allocInit(25, 140);call #Ultimate.allocInit(13, 141);call #Ultimate.allocInit(34, 142);call #Ultimate.allocInit(232, 143);call #Ultimate.allocInit(43, 144);call #Ultimate.allocInit(43, 145);call #Ultimate.allocInit(34, 146);call #Ultimate.allocInit(13, 147);call #Ultimate.allocInit(34, 148);call #Ultimate.allocInit(232, 149);call #Ultimate.allocInit(35, 150);call #Ultimate.allocInit(35, 151);call #Ultimate.allocInit(34, 152);call #Ultimate.allocInit(13, 153);call #Ultimate.allocInit(34, 154);call #Ultimate.allocInit(232, 155);call #Ultimate.allocInit(27, 156);call #Ultimate.allocInit(27, 157);call #Ultimate.allocInit(34, 158);call #Ultimate.allocInit(13, 159);call #Ultimate.allocInit(34, 160);call #Ultimate.allocInit(232, 161);call #Ultimate.allocInit(23, 162);call #Ultimate.allocInit(23, 163);call #Ultimate.allocInit(34, 164);call #Ultimate.allocInit(13, 165);call #Ultimate.allocInit(34, 166);call #Ultimate.allocInit(232, 167);call #Ultimate.allocInit(34, 168);call #Ultimate.allocInit(34, 169);call #Ultimate.allocInit(13, 170);call #Ultimate.allocInit(34, 171);call #Ultimate.allocInit(232, 172);call #Ultimate.allocInit(43, 173);call #Ultimate.allocInit(43, 174);call #Ultimate.allocInit(34, 175);call #Ultimate.allocInit(13, 176);call #Ultimate.allocInit(34, 177);call #Ultimate.allocInit(232, 178);call #Ultimate.allocInit(38, 179);call #Ultimate.allocInit(38, 180);call #Ultimate.allocInit(43, 181);call #Ultimate.allocInit(13, 182);call #Ultimate.allocInit(34, 183);call #Ultimate.allocInit(232, 184);call #Ultimate.allocInit(32, 185);call #Ultimate.allocInit(32, 186);call #Ultimate.allocInit(27, 187);call #Ultimate.allocInit(27, 188);call #Ultimate.allocInit(37, 189);call #Ultimate.allocInit(27, 190);call #Ultimate.allocInit(13, 191);call #Ultimate.allocInit(27, 192);call #Ultimate.allocInit(232, 193);call #Ultimate.allocInit(27, 194);call #Ultimate.allocInit(27, 195);call #Ultimate.allocInit(13, 196);call #Ultimate.allocInit(27, 197);call #Ultimate.allocInit(232, 198);call #Ultimate.allocInit(36, 199);call #Ultimate.allocInit(36, 200);call #Ultimate.allocInit(13, 201);call #Ultimate.allocInit(27, 202);call #Ultimate.allocInit(232, 203);call #Ultimate.allocInit(32, 204);call #Ultimate.allocInit(32, 205);call #Ultimate.allocInit(13, 206);call #Ultimate.allocInit(27, 207);call #Ultimate.allocInit(232, 208);call #Ultimate.allocInit(27, 209);call #Ultimate.allocInit(27, 210);call #Ultimate.allocInit(13, 211);call #Ultimate.allocInit(27, 212);call #Ultimate.allocInit(232, 213);call #Ultimate.allocInit(33, 214);call #Ultimate.allocInit(33, 215);call #Ultimate.allocInit(13, 216);call #Ultimate.allocInit(27, 217);call #Ultimate.allocInit(232, 218);call #Ultimate.allocInit(29, 219);call #Ultimate.allocInit(29, 220);call #Ultimate.allocInit(19, 221);call #Ultimate.allocInit(24, 222);call #Ultimate.allocInit(27, 223);call #Ultimate.allocInit(13, 224);call #Ultimate.allocInit(27, 225);call #Ultimate.allocInit(232, 226);call #Ultimate.allocInit(33, 227);call #Ultimate.allocInit(33, 228);call #Ultimate.allocInit(41, 229);call #Ultimate.allocInit(21, 230);call #Ultimate.allocInit(13, 231);call #Ultimate.allocInit(27, 232);call #Ultimate.allocInit(232, 233);call #Ultimate.allocInit(24, 234);call #Ultimate.allocInit(24, 235);call #Ultimate.allocInit(22, 236);call #Ultimate.allocInit(13, 237);call #Ultimate.allocInit(27, 238);call #Ultimate.allocInit(232, 239);call #Ultimate.allocInit(21, 240);call #Ultimate.allocInit(21, 241);call #Ultimate.allocInit(21, 242);call #Ultimate.allocInit(13, 243);call #Ultimate.allocInit(27, 244);call #Ultimate.allocInit(232, 245);call #Ultimate.allocInit(23, 246);call #Ultimate.allocInit(23, 247);call #Ultimate.allocInit(13, 248);call #Ultimate.allocInit(29, 249);call #Ultimate.allocInit(232, 250);call #Ultimate.allocInit(35, 251);call #Ultimate.allocInit(35, 252);call #Ultimate.allocInit(29, 253);call #Ultimate.allocInit(13, 254);call #Ultimate.allocInit(29, 255);call #Ultimate.allocInit(232, 256);call #Ultimate.allocInit(34, 257);call #Ultimate.allocInit(34, 258);call #Ultimate.allocInit(29, 259);call #Ultimate.allocInit(13, 260);call #Ultimate.allocInit(29, 261);call #Ultimate.allocInit(232, 262);call #Ultimate.allocInit(36, 263);call #Ultimate.allocInit(36, 264);call #Ultimate.allocInit(29, 265);call #Ultimate.allocInit(13, 266);call #Ultimate.allocInit(29, 267);call #Ultimate.allocInit(232, 268);call #Ultimate.allocInit(34, 269);call #Ultimate.allocInit(34, 270);call #Ultimate.allocInit(29, 271);call #Ultimate.allocInit(13, 272);call #Ultimate.allocInit(29, 273);call #Ultimate.allocInit(232, 274);call #Ultimate.allocInit(35, 275);call #Ultimate.allocInit(35, 276);call #Ultimate.allocInit(29, 277);call #Ultimate.allocInit(13, 278);call #Ultimate.allocInit(29, 279);call #Ultimate.allocInit(232, 280);call #Ultimate.allocInit(34, 281);call #Ultimate.allocInit(34, 282);call #Ultimate.allocInit(29, 283);call #Ultimate.allocInit(13, 284);call #Ultimate.allocInit(29, 285);call #Ultimate.allocInit(232, 286);call #Ultimate.allocInit(35, 287);call #Ultimate.allocInit(35, 288);call #Ultimate.allocInit(29, 289);call #Ultimate.allocInit(26, 290);call #Ultimate.allocInit(26, 291);call #Ultimate.allocInit(23, 292);call #Ultimate.allocInit(26, 293);call #Ultimate.allocInit(43, 294);call #Ultimate.allocInit(35, 295);call #Ultimate.allocInit(13, 296);call #Ultimate.allocInit(27, 297);call #Ultimate.allocInit(232, 298);call #Ultimate.allocInit(42, 299);call #Ultimate.allocInit(42, 300);call #Ultimate.allocInit(34, 301);call #Ultimate.allocInit(16, 302);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~mwifiex_sdio_group0~0.base, ~mwifiex_sdio_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~sdio_ops_group0~0.base, ~sdio_ops_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~mwifiex_sdio_pm_ops_group1~0.base, ~mwifiex_sdio_pm_ops_group1~0.offset := 0, 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_0~0 := 0;~sdio_ops_group1~0.base, ~sdio_ops_group1~0.offset := 0, 0;~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset := 303, 0;call #Ultimate.allocInit(25, 303);call write~init~int(1, ~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(1, ~#mwifiex_reg_sd87xx~0.base, 1 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(64, ~#mwifiex_reg_sd87xx~0.base, 2 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(65, ~#mwifiex_reg_sd87xx~0.base, 3 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(48, ~#mwifiex_reg_sd87xx~0.base, 4 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(3, ~#mwifiex_reg_sd87xx~0.base, 5 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(96, ~#mwifiex_reg_sd87xx~0.base, 6 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(97, ~#mwifiex_reg_sd87xx~0.base, 7 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(63, ~#mwifiex_reg_sd87xx~0.base, 8 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(65534, ~#mwifiex_reg_sd87xx~0.base, 9 + ~#mwifiex_reg_sd87xx~0.offset, 4);call write~init~int(64, ~#mwifiex_reg_sd87xx~0.base, 13 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(4, ~#mwifiex_reg_sd87xx~0.base, 14 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(5, ~#mwifiex_reg_sd87xx~0.base, 15 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 16 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 17 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(6, ~#mwifiex_reg_sd87xx~0.base, 18 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(7, ~#mwifiex_reg_sd87xx~0.base, 19 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 20 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 21 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(8, ~#mwifiex_reg_sd87xx~0.base, 22 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(9, ~#mwifiex_reg_sd87xx~0.base, 23 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(108, ~#mwifiex_reg_sd87xx~0.base, 24 + ~#mwifiex_reg_sd87xx~0.offset, 1);~#mwifiex_reg_sd8897~0.base, ~#mwifiex_reg_sd8897~0.offset := 304, 0;call #Ultimate.allocInit(25, 304);call write~init~int(0, ~#mwifiex_reg_sd8897~0.base, ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd8897~0.base, 1 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(96, ~#mwifiex_reg_sd8897~0.base, 2 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(97, ~#mwifiex_reg_sd8897~0.base, 3 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(80, ~#mwifiex_reg_sd8897~0.base, 4 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(195, ~#mwifiex_reg_sd8897~0.base, 5 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(192, ~#mwifiex_reg_sd8897~0.base, 6 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(193, ~#mwifiex_reg_sd8897~0.base, 7 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(255, ~#mwifiex_reg_sd8897~0.base, 8 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(4294967295, ~#mwifiex_reg_sd8897~0.base, 9 + ~#mwifiex_reg_sd8897~0.offset, 4);call write~init~int(184, ~#mwifiex_reg_sd8897~0.base, 13 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(4, ~#mwifiex_reg_sd8897~0.base, 14 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(5, ~#mwifiex_reg_sd8897~0.base, 15 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(6, ~#mwifiex_reg_sd8897~0.base, 16 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(7, ~#mwifiex_reg_sd8897~0.base, 17 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(8, ~#mwifiex_reg_sd8897~0.base, 18 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(9, ~#mwifiex_reg_sd8897~0.base, 19 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(10, ~#mwifiex_reg_sd8897~0.base, 20 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(11, ~#mwifiex_reg_sd8897~0.base, 21 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(12, ~#mwifiex_reg_sd8897~0.base, 22 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(13, ~#mwifiex_reg_sd8897~0.base, 23 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(204, ~#mwifiex_reg_sd8897~0.base, 24 + ~#mwifiex_reg_sd8897~0.offset, 1);~#mwifiex_sdio_sd8786~0.base, ~#mwifiex_sdio_sd8786~0.offset := 305, 0;call #Ultimate.allocInit(30, 305);call write~init~$Pointer$(5, 0, ~#mwifiex_sdio_sd8786~0.base, ~#mwifiex_sdio_sd8786~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, ~#mwifiex_sdio_sd8786~0.base, 8 + ~#mwifiex_sdio_sd8786~0.offset, 8);call write~init~int(16, ~#mwifiex_sdio_sd8786~0.base, 16 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(8, ~#mwifiex_sdio_sd8786~0.base, 17 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8786~0.base, 18 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8786~0.base, 19 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(2048, ~#mwifiex_sdio_sd8786~0.base, 20 + ~#mwifiex_sdio_sd8786~0.offset, 2);call write~init~int(16384, ~#mwifiex_sdio_sd8786~0.base, 22 + ~#mwifiex_sdio_sd8786~0.offset, 4);call write~init~int(16384, ~#mwifiex_sdio_sd8786~0.base, 26 + ~#mwifiex_sdio_sd8786~0.offset, 4);~#mwifiex_sdio_sd8787~0.base, ~#mwifiex_sdio_sd8787~0.offset := 306, 0;call #Ultimate.allocInit(30, 306);call write~init~$Pointer$(6, 0, ~#mwifiex_sdio_sd8787~0.base, ~#mwifiex_sdio_sd8787~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, ~#mwifiex_sdio_sd8787~0.base, 8 + ~#mwifiex_sdio_sd8787~0.offset, 8);call write~init~int(16, ~#mwifiex_sdio_sd8787~0.base, 16 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(8, ~#mwifiex_sdio_sd8787~0.base, 17 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8787~0.base, 18 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8787~0.base, 19 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(2048, ~#mwifiex_sdio_sd8787~0.base, 20 + ~#mwifiex_sdio_sd8787~0.offset, 2);call write~init~int(16384, ~#mwifiex_sdio_sd8787~0.base, 22 + ~#mwifiex_sdio_sd8787~0.offset, 4);call write~init~int(16384, ~#mwifiex_sdio_sd8787~0.base, 26 + ~#mwifiex_sdio_sd8787~0.offset, 4);~#mwifiex_sdio_sd8797~0.base, ~#mwifiex_sdio_sd8797~0.offset := 307, 0;call #Ultimate.allocInit(30, 307);call write~init~$Pointer$(7, 0, ~#mwifiex_sdio_sd8797~0.base, ~#mwifiex_sdio_sd8797~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, ~#mwifiex_sdio_sd8797~0.base, 8 + ~#mwifiex_sdio_sd8797~0.offset, 8);call write~init~int(16, ~#mwifiex_sdio_sd8797~0.base, 16 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(8, ~#mwifiex_sdio_sd8797~0.base, 17 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8797~0.base, 18 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8797~0.base, 19 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(2048, ~#mwifiex_sdio_sd8797~0.base, 20 + ~#mwifiex_sdio_sd8797~0.offset, 2);call write~init~int(16384, ~#mwifiex_sdio_sd8797~0.base, 22 + ~#mwifiex_sdio_sd8797~0.offset, 4);call write~init~int(16384, ~#mwifiex_sdio_sd8797~0.base, 26 + ~#mwifiex_sdio_sd8797~0.offset, 4);~#mwifiex_sdio_sd8897~0.base, ~#mwifiex_sdio_sd8897~0.offset := 308, 0;call #Ultimate.allocInit(30, 308);call write~init~$Pointer$(8, 0, ~#mwifiex_sdio_sd8897~0.base, ~#mwifiex_sdio_sd8897~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd8897~0.base, ~#mwifiex_reg_sd8897~0.offset, ~#mwifiex_sdio_sd8897~0.base, 8 + ~#mwifiex_sdio_sd8897~0.offset, 8);call write~init~int(32, ~#mwifiex_sdio_sd8897~0.base, 16 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(16, ~#mwifiex_sdio_sd8897~0.base, 17 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8897~0.base, 18 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8897~0.base, 19 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(4096, ~#mwifiex_sdio_sd8897~0.base, 20 + ~#mwifiex_sdio_sd8897~0.offset, 2);call write~init~int(32768, ~#mwifiex_sdio_sd8897~0.base, 22 + ~#mwifiex_sdio_sd8897~0.offset, 4);call write~init~int(32768, ~#mwifiex_sdio_sd8897~0.base, 26 + ~#mwifiex_sdio_sd8897~0.offset, 4);~user_rmmod~0 := 0;~#add_remove_card_sem~0.base, ~#add_remove_card_sem~0.offset := 309, 0;call #Ultimate.allocInit(84, 309);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#add_remove_card_sem~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#add_remove_card_sem~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#add_remove_card_sem~0.base);~#mwifiex_ids~0.base, ~#mwifiex_ids~0.offset := 310, 0;call #Ultimate.allocInit(65, 310);call write~init~int(255, ~#mwifiex_ids~0.base, ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 1 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37142, ~#mwifiex_ids~0.base, 3 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8786~0.base + ~#mwifiex_sdio_sd8786~0.offset, ~#mwifiex_ids~0.base, 5 + ~#mwifiex_ids~0.offset, 8);call write~init~int(255, ~#mwifiex_ids~0.base, 13 + ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 14 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37145, ~#mwifiex_ids~0.base, 16 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8787~0.base + ~#mwifiex_sdio_sd8787~0.offset, ~#mwifiex_ids~0.base, 18 + ~#mwifiex_ids~0.offset, 8);call write~init~int(255, ~#mwifiex_ids~0.base, 26 + ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 27 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37161, ~#mwifiex_ids~0.base, 29 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8797~0.base + ~#mwifiex_sdio_sd8797~0.offset, ~#mwifiex_ids~0.base, 31 + ~#mwifiex_ids~0.offset, 8);call write~init~int(255, ~#mwifiex_ids~0.base, 39 + ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 40 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37165, ~#mwifiex_ids~0.base, 42 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8897~0.base + ~#mwifiex_sdio_sd8897~0.offset, ~#mwifiex_ids~0.base, 44 + ~#mwifiex_ids~0.offset, 8);call write~init~int(0, ~#mwifiex_ids~0.base, 52 + ~#mwifiex_ids~0.offset, 1);call write~init~int(0, ~#mwifiex_ids~0.base, 53 + ~#mwifiex_ids~0.offset, 2);call write~init~int(0, ~#mwifiex_ids~0.base, 55 + ~#mwifiex_ids~0.offset, 2);call write~init~int(0, ~#mwifiex_ids~0.base, 57 + ~#mwifiex_ids~0.offset, 8);~__mod_sdio__mwifiex_ids_device_table~0.class := 0;~__mod_sdio__mwifiex_ids_device_table~0.vendor := 0;~__mod_sdio__mwifiex_ids_device_table~0.device := 0;~__mod_sdio__mwifiex_ids_device_table~0.driver_data := 0;~#mwifiex_sdio_pm_ops~0.base, ~#mwifiex_sdio_pm_ops~0.offset := 311, 0;call #Ultimate.allocInit(184, 311);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 8 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_suspend.base, #funAddr~mwifiex_sdio_suspend.offset, ~#mwifiex_sdio_pm_ops~0.base, 16 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_resume.base, #funAddr~mwifiex_sdio_resume.offset, ~#mwifiex_sdio_pm_ops~0.base, 24 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 32 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 40 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 48 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 56 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 64 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 72 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 80 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 88 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 96 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 104 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 112 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 120 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 128 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 136 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 144 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 152 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 160 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 168 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 176 + ~#mwifiex_sdio_pm_ops~0.offset, 8);~#mwifiex_sdio~0.base, ~#mwifiex_sdio~0.offset := 312, 0;call #Ultimate.allocInit(145, 312);call write~init~$Pointer$(40, 0, ~#mwifiex_sdio~0.base, ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(~#mwifiex_ids~0.base, ~#mwifiex_ids~0.offset, ~#mwifiex_sdio~0.base, 8 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_probe.base, #funAddr~mwifiex_sdio_probe.offset, ~#mwifiex_sdio~0.base, 16 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_remove.base, #funAddr~mwifiex_sdio_remove.offset, ~#mwifiex_sdio~0.base, 24 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 32 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 40 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mwifiex_sdio~0.base, 48 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 56 + ~#mwifiex_sdio~0.offset, 8);call write~init~int(0, ~#mwifiex_sdio~0.base, 64 + ~#mwifiex_sdio~0.offset, 1);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 65 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 73 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 81 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 89 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 97 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 105 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 113 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 121 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(~#mwifiex_sdio_pm_ops~0.base, ~#mwifiex_sdio_pm_ops~0.offset, ~#mwifiex_sdio~0.base, 129 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 137 + ~#mwifiex_sdio~0.offset, 8);~reset_host~0.base, ~reset_host~0.offset := 0, 0;~#card_reset_work~0.base, ~#card_reset_work~0.offset := 313, 0;call #Ultimate.allocInit(76, 313);call write~init~int(137438953424, ~#card_reset_work~0.base, ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(~#card_reset_work~0.base, 8 + ~#card_reset_work~0.offset, ~#card_reset_work~0.base, 8 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(~#card_reset_work~0.base, 8 + ~#card_reset_work~0.offset, ~#card_reset_work~0.base, 16 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(#funAddr~sdio_card_reset_worker.base, #funAddr~sdio_card_reset_worker.offset, ~#card_reset_work~0.base, 24 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(~#card_reset_work~0.base, ~#card_reset_work~0.offset, ~#card_reset_work~0.base, 32 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(0, 0, ~#card_reset_work~0.base, 40 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(0, 0, ~#card_reset_work~0.base, 48 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(302, 0, ~#card_reset_work~0.base, 56 + ~#card_reset_work~0.offset, 8);call write~init~int(0, ~#card_reset_work~0.base, 64 + ~#card_reset_work~0.offset, 4);call write~init~int(0, ~#card_reset_work~0.base, 68 + ~#card_reset_work~0.offset, 8);~#sdio_ops~0.base, ~#sdio_ops~0.offset := 314, 0;call #Ultimate.allocInit(176, 314);call write~init~$Pointer$(#funAddr~mwifiex_init_sdio.base, #funAddr~mwifiex_init_sdio.offset, ~#sdio_ops~0.base, ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_cleanup_sdio.base, #funAddr~mwifiex_cleanup_sdio.offset, ~#sdio_ops~0.base, 8 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_check_fw_status.base, #funAddr~mwifiex_check_fw_status.offset, ~#sdio_ops~0.base, 16 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_prog_fw_w_helper.base, #funAddr~mwifiex_prog_fw_w_helper.offset, ~#sdio_ops~0.base, 24 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_register_dev.base, #funAddr~mwifiex_register_dev.offset, ~#sdio_ops~0.base, 32 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_unregister_dev.base, #funAddr~mwifiex_unregister_dev.offset, ~#sdio_ops~0.base, 40 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_enable_host_int.base, #funAddr~mwifiex_sdio_enable_host_int.offset, ~#sdio_ops~0.base, 48 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_disable_host_int.base, #funAddr~mwifiex_sdio_disable_host_int.offset, ~#sdio_ops~0.base, 56 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_process_int_status.base, #funAddr~mwifiex_process_int_status.offset, ~#sdio_ops~0.base, 64 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_host_to_card.base, #funAddr~mwifiex_sdio_host_to_card.offset, ~#sdio_ops~0.base, 72 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_pm_wakeup_card.base, #funAddr~mwifiex_pm_wakeup_card.offset, ~#sdio_ops~0.base, 80 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_pm_wakeup_card_complete.base, #funAddr~mwifiex_pm_wakeup_card_complete.offset, ~#sdio_ops~0.base, 88 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_update_mp_end_port.base, #funAddr~mwifiex_update_mp_end_port.offset, ~#sdio_ops~0.base, 96 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_cleanup_mpa_buf.base, #funAddr~mwifiex_cleanup_mpa_buf.offset, ~#sdio_ops~0.base, 104 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_cmdrsp_complete.base, #funAddr~mwifiex_sdio_cmdrsp_complete.offset, ~#sdio_ops~0.base, 112 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_cmdrsp_complete.base, #funAddr~mwifiex_sdio_cmdrsp_complete.offset, ~#sdio_ops~0.base, 120 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 128 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 136 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 144 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_card_reset.base, #funAddr~mwifiex_sdio_card_reset.offset, ~#sdio_ops~0.base, 152 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 160 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 168 + ~#sdio_ops~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_8~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_7~0 := 0;~#set_impl~0.base, ~#set_impl~0.offset := 315, 0;call #Ultimate.allocInit(120, 315);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base);~last_index~0 := 0;~LDV_SKBS~0.base, ~LDV_SKBS~0.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,707 INFO L290 TraceCheckUtils]: 1: Hoare triple {1124#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret1041#1, main_#t~ret1042#1, main_#t~ret1043#1, main_#t~ret1044#1.base, main_#t~ret1044#1.offset, main_#t~ret1045#1.base, main_#t~ret1045#1.offset, main_#t~ret1046#1.base, main_#t~ret1046#1.offset, main_#t~ret1047#1.base, main_#t~ret1047#1.offset, main_#t~nondet1048#1, main_#t~switch1049#1, main_#t~nondet1050#1, main_#t~switch1051#1, main_#t~ret1052#1, main_#t~ret1053#1, main_#t~ret1054#1, main_#t~ret1055#1, main_#t~ret1056#1, main_#t~ret1057#1, main_#t~ret1058#1, main_#t~ret1059#1, main_#t~nondet1060#1, main_#t~switch1061#1, main_#t~ret1062#1, main_#t~ret1063#1, main_#t~ret1064#1, main_#t~ret1065#1, main_#t~ret1066#1, main_#t~ret1067#1, main_#t~ret1068#1, main_#t~ret1069#1, main_#t~ret1070#1, main_#t~ret1071#1, main_#t~ret1072#1, main_#t~nondet1073#1, main_#t~switch1074#1, main_#t~ret1075#1, main_#t~nondet1076#1, main_#t~switch1077#1, main_#t~ret1078#1, main_#t~nondet1079#1, main_#t~switch1080#1, main_~ldvarg1~0#1, main_~tmp~40#1, main_~ldvarg4~0#1, main_~tmp___0~23#1, main_~ldvarg3~0#1, main_~tmp___1~12#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset, main_~tmp___6~3#1, main_~tmp___7~3#1, main_~tmp___8~3#1, main_~tmp___9~3#1, main_~tmp___10~1#1, main_~tmp___11~1#1;havoc main_~ldvarg1~0#1;havoc main_~tmp~40#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___0~23#1;havoc main_~ldvarg3~0#1;havoc main_~tmp___1~12#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset;havoc main_~tmp___6~3#1;havoc main_~tmp___7~3#1;havoc main_~tmp___8~3#1;havoc main_~tmp___9~3#1;havoc main_~tmp___10~1#1;havoc main_~tmp___11~1#1;call main_#t~ret1041#1 := __VERIFIER_nondet_u32();main_~tmp~40#1 := main_#t~ret1041#1;havoc main_#t~ret1041#1;main_~ldvarg1~0#1 := main_~tmp~40#1;call main_#t~ret1042#1 := __VERIFIER_nondet_u16();main_~tmp___0~23#1 := main_#t~ret1042#1;havoc main_#t~ret1042#1;main_~ldvarg4~0#1 := main_~tmp___0~23#1;call main_#t~ret1043#1 := __VERIFIER_nondet_u8();main_~tmp___1~12#1 := main_#t~ret1043#1;havoc main_#t~ret1043#1;main_~ldvarg3~0#1 := main_~tmp___1~12#1; {1124#true} is VALID [2022-02-20 21:56:25,708 INFO L272 TraceCheckUtils]: 2: Hoare triple {1124#true} call main_#t~ret1044#1.base, main_#t~ret1044#1.offset := ldv_zalloc(32); {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:25,708 INFO L290 TraceCheckUtils]: 3: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,708 INFO L290 TraceCheckUtils]: 4: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,708 INFO L290 TraceCheckUtils]: 5: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,708 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {1124#true} {1124#true} #3157#return; {1124#true} is VALID [2022-02-20 21:56:25,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {1124#true} main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset := main_#t~ret1044#1.base, main_#t~ret1044#1.offset;havoc main_#t~ret1044#1.base, main_#t~ret1044#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset; {1124#true} is VALID [2022-02-20 21:56:25,709 INFO L272 TraceCheckUtils]: 8: Hoare triple {1124#true} call main_#t~ret1045#1.base, main_#t~ret1045#1.offset := ldv_zalloc(4); {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:25,709 INFO L290 TraceCheckUtils]: 9: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,710 INFO L290 TraceCheckUtils]: 10: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,710 INFO L290 TraceCheckUtils]: 11: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,710 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {1124#true} {1124#true} #3159#return; {1124#true} is VALID [2022-02-20 21:56:25,710 INFO L290 TraceCheckUtils]: 13: Hoare triple {1124#true} main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset := main_#t~ret1045#1.base, main_#t~ret1045#1.offset;havoc main_#t~ret1045#1.base, main_#t~ret1045#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset; {1124#true} is VALID [2022-02-20 21:56:25,711 INFO L272 TraceCheckUtils]: 14: Hoare triple {1124#true} call main_#t~ret1046#1.base, main_#t~ret1046#1.offset := ldv_zalloc(16); {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:25,711 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,711 INFO L290 TraceCheckUtils]: 16: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,712 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1124#true} {1124#true} #3161#return; {1124#true} is VALID [2022-02-20 21:56:25,712 INFO L290 TraceCheckUtils]: 19: Hoare triple {1124#true} main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset := main_#t~ret1046#1.base, main_#t~ret1046#1.offset;havoc main_#t~ret1046#1.base, main_#t~ret1046#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset; {1124#true} is VALID [2022-02-20 21:56:25,712 INFO L272 TraceCheckUtils]: 20: Hoare triple {1124#true} call main_#t~ret1047#1.base, main_#t~ret1047#1.offset := ldv_zalloc(80); {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:25,713 INFO L290 TraceCheckUtils]: 21: Hoare triple {1143#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {1124#true} is VALID [2022-02-20 21:56:25,713 INFO L290 TraceCheckUtils]: 22: Hoare triple {1124#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1124#true} is VALID [2022-02-20 21:56:25,713 INFO L290 TraceCheckUtils]: 23: Hoare triple {1124#true} assume true; {1124#true} is VALID [2022-02-20 21:56:25,713 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {1124#true} {1124#true} #3163#return; {1124#true} is VALID [2022-02-20 21:56:25,713 INFO L290 TraceCheckUtils]: 25: Hoare triple {1124#true} main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset := main_#t~ret1047#1.base, main_#t~ret1047#1.offset;havoc main_#t~ret1047#1.base, main_#t~ret1047#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset;assume { :begin_inline_ldv_initialize } true;assume { :begin_inline_ldv_set_init } true;ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ~#set_impl~0.base, ~#set_impl~0.offset;~last_index~0 := 0; {1124#true} is VALID [2022-02-20 21:56:25,714 INFO L290 TraceCheckUtils]: 26: Hoare triple {1124#true} assume { :end_inline_ldv_set_init } true; {1124#true} is VALID [2022-02-20 21:56:25,714 INFO L290 TraceCheckUtils]: 27: Hoare triple {1124#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,715 INFO L290 TraceCheckUtils]: 28: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet1048#1 && main_#t~nondet1048#1 <= 2147483647;main_~tmp___6~3#1 := main_#t~nondet1048#1;havoc main_#t~nondet1048#1;main_#t~switch1049#1 := 0 == main_~tmp___6~3#1; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,715 INFO L290 TraceCheckUtils]: 29: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch1049#1;main_#t~switch1049#1 := main_#t~switch1049#1 || 1 == main_~tmp___6~3#1; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,715 INFO L290 TraceCheckUtils]: 30: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch1049#1;main_#t~switch1049#1 := main_#t~switch1049#1 || 2 == main_~tmp___6~3#1; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,716 INFO L290 TraceCheckUtils]: 31: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch1049#1; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,716 INFO L290 TraceCheckUtils]: 32: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1073#1 && main_#t~nondet1073#1 <= 2147483647;main_~tmp___9~3#1 := main_#t~nondet1073#1;havoc main_#t~nondet1073#1;main_#t~switch1074#1 := 0 == main_~tmp___9~3#1; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,717 INFO L290 TraceCheckUtils]: 33: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch1074#1; {1142#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:56:25,717 INFO L290 TraceCheckUtils]: 34: Hoare triple {1142#(= ~ldv_state_variable_0~0 1)} assume 2 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_mwifiex_sdio_cleanup_module } true;havoc mwifiex_sdio_cleanup_module_#t~ret1035#1, mwifiex_sdio_cleanup_module_#t~ret1036#1, mwifiex_sdio_cleanup_module_~tmp~36#1;havoc mwifiex_sdio_cleanup_module_~tmp~36#1;assume { :begin_inline_down_interruptible } true;down_interruptible_#in~arg0#1.base, down_interruptible_#in~arg0#1.offset := ~#add_remove_card_sem~0.base, ~#add_remove_card_sem~0.offset;havoc down_interruptible_#res#1;havoc down_interruptible_#t~nondet1098#1, down_interruptible_~arg0#1.base, down_interruptible_~arg0#1.offset;down_interruptible_~arg0#1.base, down_interruptible_~arg0#1.offset := down_interruptible_#in~arg0#1.base, down_interruptible_#in~arg0#1.offset;assume -2147483648 <= down_interruptible_#t~nondet1098#1 && down_interruptible_#t~nondet1098#1 <= 2147483647;down_interruptible_#res#1 := down_interruptible_#t~nondet1098#1;havoc down_interruptible_#t~nondet1098#1; {1125#false} is VALID [2022-02-20 21:56:25,717 INFO L290 TraceCheckUtils]: 35: Hoare triple {1125#false} mwifiex_sdio_cleanup_module_#t~ret1035#1 := down_interruptible_#res#1;assume { :end_inline_down_interruptible } true;assume -2147483648 <= mwifiex_sdio_cleanup_module_#t~ret1035#1 && mwifiex_sdio_cleanup_module_#t~ret1035#1 <= 2147483647;mwifiex_sdio_cleanup_module_~tmp~36#1 := mwifiex_sdio_cleanup_module_#t~ret1035#1;havoc mwifiex_sdio_cleanup_module_#t~ret1035#1; {1125#false} is VALID [2022-02-20 21:56:25,718 INFO L290 TraceCheckUtils]: 36: Hoare triple {1125#false} assume !(0 == mwifiex_sdio_cleanup_module_~tmp~36#1); {1125#false} is VALID [2022-02-20 21:56:25,718 INFO L290 TraceCheckUtils]: 37: Hoare triple {1125#false} ~user_rmmod~0 := 1;assume { :begin_inline_cancel_work_sync } true;cancel_work_sync_#in~arg0#1.base, cancel_work_sync_#in~arg0#1.offset := ~#card_reset_work~0.base, ~#card_reset_work~0.offset;havoc cancel_work_sync_#res#1;havoc cancel_work_sync_#t~nondet1095#1, cancel_work_sync_~arg0#1.base, cancel_work_sync_~arg0#1.offset;cancel_work_sync_~arg0#1.base, cancel_work_sync_~arg0#1.offset := cancel_work_sync_#in~arg0#1.base, cancel_work_sync_#in~arg0#1.offset;cancel_work_sync_#res#1 := cancel_work_sync_#t~nondet1095#1;havoc cancel_work_sync_#t~nondet1095#1; {1125#false} is VALID [2022-02-20 21:56:25,718 INFO L290 TraceCheckUtils]: 38: Hoare triple {1125#false} mwifiex_sdio_cleanup_module_#t~ret1036#1 := cancel_work_sync_#res#1;assume { :end_inline_cancel_work_sync } true;havoc mwifiex_sdio_cleanup_module_#t~ret1036#1;assume { :begin_inline_sdio_unregister_driver } true;sdio_unregister_driver_#in~arg0#1.base, sdio_unregister_driver_#in~arg0#1.offset := ~#mwifiex_sdio~0.base, ~#mwifiex_sdio~0.offset;havoc sdio_unregister_driver_~arg0#1.base, sdio_unregister_driver_~arg0#1.offset;sdio_unregister_driver_~arg0#1.base, sdio_unregister_driver_~arg0#1.offset := sdio_unregister_driver_#in~arg0#1.base, sdio_unregister_driver_#in~arg0#1.offset; {1125#false} is VALID [2022-02-20 21:56:25,718 INFO L290 TraceCheckUtils]: 39: Hoare triple {1125#false} assume { :end_inline_sdio_unregister_driver } true; {1125#false} is VALID [2022-02-20 21:56:25,718 INFO L290 TraceCheckUtils]: 40: Hoare triple {1125#false} assume { :end_inline_mwifiex_sdio_cleanup_module } true;~ldv_state_variable_0~0 := 3; {1125#false} is VALID [2022-02-20 21:56:25,719 INFO L290 TraceCheckUtils]: 41: Hoare triple {1125#false} assume { :begin_inline_ldv_check_final_state } true;havoc ldv_check_final_state_#t~ret1091#1, ldv_check_final_state_~tmp___7~9#1;havoc ldv_check_final_state_~tmp___7~9#1;assume { :begin_inline_ldv_set_is_empty } true;ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_is_empty_#res#1;havoc ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset;ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset := ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset;ldv_set_is_empty_#res#1 := (if 0 == ~last_index~0 then 1 else 0); {1125#false} is VALID [2022-02-20 21:56:25,719 INFO L290 TraceCheckUtils]: 42: Hoare triple {1125#false} ldv_check_final_state_#t~ret1091#1 := ldv_set_is_empty_#res#1;assume { :end_inline_ldv_set_is_empty } true;assume -2147483648 <= ldv_check_final_state_#t~ret1091#1 && ldv_check_final_state_#t~ret1091#1 <= 2147483647;ldv_check_final_state_~tmp___7~9#1 := ldv_check_final_state_#t~ret1091#1;havoc ldv_check_final_state_#t~ret1091#1; {1125#false} is VALID [2022-02-20 21:56:25,719 INFO L290 TraceCheckUtils]: 43: Hoare triple {1125#false} assume !(0 != ldv_check_final_state_~tmp___7~9#1); {1125#false} is VALID [2022-02-20 21:56:25,719 INFO L272 TraceCheckUtils]: 44: Hoare triple {1125#false} call ldv_error(); {1125#false} is VALID [2022-02-20 21:56:25,719 INFO L290 TraceCheckUtils]: 45: Hoare triple {1125#false} assume !false; {1125#false} is VALID [2022-02-20 21:56:25,720 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:56:25,720 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:56:25,720 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894963038] [2022-02-20 21:56:25,721 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894963038] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:56:25,721 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:56:25,721 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:56:25,723 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166786548] [2022-02-20 21:56:25,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:56:25,727 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 46 [2022-02-20 21:56:25,728 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:56:25,731 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:25,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:56:25,875 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:56:25,876 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:56:25,903 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:56:25,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:56:25,915 INFO L87 Difference]: Start difference. First operand has 1121 states, 888 states have (on average 1.4617117117117118) internal successors, (1298), 901 states have internal predecessors, (1298), 192 states have call successors, (192), 40 states have call predecessors, (192), 39 states have return successors, (186), 185 states have call predecessors, (186), 186 states have call successors, (186) Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:28,301 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:56:41,103 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.85s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:56:45,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:56:45,687 INFO L93 Difference]: Finished difference Result 3392 states and 5178 transitions. [2022-02-20 21:56:45,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:56:45,687 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 46 [2022-02-20 21:56:45,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:56:45,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:45,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5178 transitions. [2022-02-20 21:56:45,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:45,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5178 transitions. [2022-02-20 21:56:45,961 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 5178 transitions. [2022-02-20 21:56:50,124 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5178 edges. 5178 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:56:50,442 INFO L225 Difference]: With dead ends: 3392 [2022-02-20 21:56:50,443 INFO L226 Difference]: Without dead ends: 2256 [2022-02-20 21:56:50,452 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:56:50,455 INFO L933 BasicCegarLoop]: 1911 mSDtfsCounter, 1828 mSDsluCounter, 2321 mSDsCounter, 0 mSdLazyCounter, 978 mSolverCounterSat, 421 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1950 SdHoareTripleChecker+Valid, 4232 SdHoareTripleChecker+Invalid, 1400 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 421 IncrementalHoareTripleChecker+Valid, 978 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.8s IncrementalHoareTripleChecker+Time [2022-02-20 21:56:50,456 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1950 Valid, 4232 Invalid, 1400 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [421 Valid, 978 Invalid, 1 Unknown, 0 Unchecked, 6.8s Time] [2022-02-20 21:56:50,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2256 states. [2022-02-20 21:56:50,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2256 to 2174. [2022-02-20 21:56:50,590 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:56:50,607 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2256 states. Second operand has 2174 states, 1734 states have (on average 1.4452133794694348) internal successors, (2506), 1744 states have internal predecessors, (2506), 363 states have call successors, (363), 77 states have call predecessors, (363), 76 states have return successors, (362), 360 states have call predecessors, (362), 362 states have call successors, (362) [2022-02-20 21:56:50,614 INFO L74 IsIncluded]: Start isIncluded. First operand 2256 states. Second operand has 2174 states, 1734 states have (on average 1.4452133794694348) internal successors, (2506), 1744 states have internal predecessors, (2506), 363 states have call successors, (363), 77 states have call predecessors, (363), 76 states have return successors, (362), 360 states have call predecessors, (362), 362 states have call successors, (362) [2022-02-20 21:56:50,619 INFO L87 Difference]: Start difference. First operand 2256 states. Second operand has 2174 states, 1734 states have (on average 1.4452133794694348) internal successors, (2506), 1744 states have internal predecessors, (2506), 363 states have call successors, (363), 77 states have call predecessors, (363), 76 states have return successors, (362), 360 states have call predecessors, (362), 362 states have call successors, (362) [2022-02-20 21:56:50,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:56:50,789 INFO L93 Difference]: Finished difference Result 2256 states and 3375 transitions. [2022-02-20 21:56:50,789 INFO L276 IsEmpty]: Start isEmpty. Operand 2256 states and 3375 transitions. [2022-02-20 21:56:50,800 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:56:50,803 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:56:50,809 INFO L74 IsIncluded]: Start isIncluded. First operand has 2174 states, 1734 states have (on average 1.4452133794694348) internal successors, (2506), 1744 states have internal predecessors, (2506), 363 states have call successors, (363), 77 states have call predecessors, (363), 76 states have return successors, (362), 360 states have call predecessors, (362), 362 states have call successors, (362) Second operand 2256 states. [2022-02-20 21:56:50,815 INFO L87 Difference]: Start difference. First operand has 2174 states, 1734 states have (on average 1.4452133794694348) internal successors, (2506), 1744 states have internal predecessors, (2506), 363 states have call successors, (363), 77 states have call predecessors, (363), 76 states have return successors, (362), 360 states have call predecessors, (362), 362 states have call successors, (362) Second operand 2256 states. [2022-02-20 21:56:50,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:56:50,983 INFO L93 Difference]: Finished difference Result 2256 states and 3375 transitions. [2022-02-20 21:56:50,983 INFO L276 IsEmpty]: Start isEmpty. Operand 2256 states and 3375 transitions. [2022-02-20 21:56:50,991 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:56:50,991 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:56:50,992 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:56:50,992 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:56:50,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2174 states, 1734 states have (on average 1.4452133794694348) internal successors, (2506), 1744 states have internal predecessors, (2506), 363 states have call successors, (363), 77 states have call predecessors, (363), 76 states have return successors, (362), 360 states have call predecessors, (362), 362 states have call successors, (362) [2022-02-20 21:56:51,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2174 states to 2174 states and 3231 transitions. [2022-02-20 21:56:51,225 INFO L78 Accepts]: Start accepts. Automaton has 2174 states and 3231 transitions. Word has length 46 [2022-02-20 21:56:51,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:56:51,226 INFO L470 AbstractCegarLoop]: Abstraction has 2174 states and 3231 transitions. [2022-02-20 21:56:51,226 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:51,226 INFO L276 IsEmpty]: Start isEmpty. Operand 2174 states and 3231 transitions. [2022-02-20 21:56:51,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-02-20 21:56:51,227 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:56:51,228 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:56:51,228 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:56:51,228 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:56:51,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:56:51,229 INFO L85 PathProgramCache]: Analyzing trace with hash -1446790162, now seen corresponding path program 1 times [2022-02-20 21:56:51,229 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:56:51,229 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [667012467] [2022-02-20 21:56:51,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:56:51,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:56:51,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:51,509 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:56:51,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:51,522 INFO L290 TraceCheckUtils]: 0: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,523 INFO L290 TraceCheckUtils]: 1: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,523 INFO L290 TraceCheckUtils]: 2: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,523 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12974#true} {12974#true} #3157#return; {12974#true} is VALID [2022-02-20 21:56:51,524 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:56:51,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:51,544 INFO L290 TraceCheckUtils]: 0: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,545 INFO L290 TraceCheckUtils]: 2: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12974#true} {12974#true} #3159#return; {12974#true} is VALID [2022-02-20 21:56:51,545 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:56:51,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:51,557 INFO L290 TraceCheckUtils]: 0: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,558 INFO L290 TraceCheckUtils]: 1: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,558 INFO L290 TraceCheckUtils]: 2: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,558 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12974#true} {12974#true} #3161#return; {12974#true} is VALID [2022-02-20 21:56:51,558 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:56:51,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:56:51,571 INFO L290 TraceCheckUtils]: 0: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,572 INFO L290 TraceCheckUtils]: 1: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,572 INFO L290 TraceCheckUtils]: 2: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,572 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12974#true} {12974#true} #3163#return; {12974#true} is VALID [2022-02-20 21:56:51,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {12974#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(121, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(16, 4);call #Ultimate.allocInit(23, 5);call #Ultimate.allocInit(23, 6);call #Ultimate.allocInit(23, 7);call #Ultimate.allocInit(23, 8);call #Ultimate.allocInit(13, 9);call #Ultimate.allocInit(19, 10);call #Ultimate.allocInit(232, 11);call #Ultimate.allocInit(60, 12);call #Ultimate.allocInit(74, 13);call #Ultimate.allocInit(46, 14);call #Ultimate.allocInit(19, 15);call #Ultimate.allocInit(36, 16);call #Ultimate.allocInit(19, 17);call #Ultimate.allocInit(48, 18);call #Ultimate.allocInit(51, 19);call #Ultimate.allocInit(24, 20);call #Ultimate.allocInit(13, 21);call #Ultimate.allocInit(20, 22);call #Ultimate.allocInit(232, 23);call #Ultimate.allocInit(24, 24);call #Ultimate.allocInit(38, 25);call #Ultimate.allocInit(13, 26);call #Ultimate.allocInit(21, 27);call #Ultimate.allocInit(232, 28);call #Ultimate.allocInit(34, 29);call #Ultimate.allocInit(48, 30);call #Ultimate.allocInit(64, 31);call #Ultimate.allocInit(49, 32);call #Ultimate.allocInit(52, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(13, 35);call #Ultimate.allocInit(21, 36);call #Ultimate.allocInit(232, 37);call #Ultimate.allocInit(37, 38);call #Ultimate.allocInit(37, 39);call #Ultimate.allocInit(13, 40);call #Ultimate.allocInit(33, 41);call #Ultimate.allocInit(24, 42);call #Ultimate.allocInit(13, 43);call #Ultimate.allocInit(23, 44);call #Ultimate.allocInit(232, 45);call #Ultimate.allocInit(25, 46);call #Ultimate.allocInit(25, 47);call #Ultimate.allocInit(13, 48);call #Ultimate.allocInit(32, 49);call #Ultimate.allocInit(232, 50);call #Ultimate.allocInit(30, 51);call #Ultimate.allocInit(30, 52);call #Ultimate.allocInit(13, 53);call #Ultimate.allocInit(25, 54);call #Ultimate.allocInit(232, 55);call #Ultimate.allocInit(31, 56);call #Ultimate.allocInit(45, 57);call #Ultimate.allocInit(43, 58);call #Ultimate.allocInit(22, 59);call #Ultimate.allocInit(13, 60);call #Ultimate.allocInit(20, 61);call #Ultimate.allocInit(232, 62);call #Ultimate.allocInit(27, 63);call #Ultimate.allocInit(27, 64);call #Ultimate.allocInit(13, 65);call #Ultimate.allocInit(20, 66);call #Ultimate.allocInit(232, 67);call #Ultimate.allocInit(35, 68);call #Ultimate.allocInit(35, 69);call #Ultimate.allocInit(13, 70);call #Ultimate.allocInit(20, 71);call #Ultimate.allocInit(232, 72);call #Ultimate.allocInit(45, 73);call #Ultimate.allocInit(45, 74);call #Ultimate.allocInit(13, 75);call #Ultimate.allocInit(25, 76);call #Ultimate.allocInit(232, 77);call #Ultimate.allocInit(27, 78);call #Ultimate.allocInit(27, 79);call #Ultimate.allocInit(64, 80);call #Ultimate.allocInit(13, 81);call #Ultimate.allocInit(25, 82);call #Ultimate.allocInit(232, 83);call #Ultimate.allocInit(45, 84);call #Ultimate.allocInit(45, 85);call #Ultimate.allocInit(37, 86);call #Ultimate.allocInit(21, 87);call #Ultimate.allocInit(13, 88);call #Ultimate.allocInit(25, 89);call #Ultimate.allocInit(232, 90);call #Ultimate.allocInit(22, 91);call #Ultimate.allocInit(22, 92);call #Ultimate.allocInit(13, 93);call #Ultimate.allocInit(23, 94);call #Ultimate.allocInit(232, 95);call #Ultimate.allocInit(33, 96);call #Ultimate.allocInit(47, 97);call #Ultimate.allocInit(26, 98);call #Ultimate.allocInit(30, 99);call #Ultimate.allocInit(20, 100);call #Ultimate.allocInit(26, 101);call #Ultimate.allocInit(27, 102);call #Ultimate.allocInit(26, 103);call #Ultimate.allocInit(39, 104);call #Ultimate.allocInit(26, 105);call #Ultimate.allocInit(48, 106);call #Ultimate.allocInit(13, 107);call #Ultimate.allocInit(25, 108);call #Ultimate.allocInit(232, 109);call #Ultimate.allocInit(39, 110);call #Ultimate.allocInit(39, 111);call #Ultimate.allocInit(51, 112);call #Ultimate.allocInit(67, 113);call #Ultimate.allocInit(67, 114);call #Ultimate.allocInit(40, 115);call #Ultimate.allocInit(37, 116);call #Ultimate.allocInit(55, 117);call #Ultimate.allocInit(43, 118);call #Ultimate.allocInit(22, 119);call #Ultimate.allocInit(13, 120);call #Ultimate.allocInit(25, 121);call #Ultimate.allocInit(232, 122);call #Ultimate.allocInit(39, 123);call #Ultimate.allocInit(39, 124);call #Ultimate.allocInit(13, 125);call #Ultimate.allocInit(25, 126);call #Ultimate.allocInit(232, 127);call #Ultimate.allocInit(31, 128);call #Ultimate.allocInit(31, 129);call #Ultimate.allocInit(13, 130);call #Ultimate.allocInit(25, 131);call #Ultimate.allocInit(232, 132);call #Ultimate.allocInit(32, 133);call #Ultimate.allocInit(32, 134);call #Ultimate.allocInit(13, 135);call #Ultimate.allocInit(25, 136);call #Ultimate.allocInit(232, 137);call #Ultimate.allocInit(25, 138);call #Ultimate.allocInit(25, 139);call #Ultimate.allocInit(25, 140);call #Ultimate.allocInit(13, 141);call #Ultimate.allocInit(34, 142);call #Ultimate.allocInit(232, 143);call #Ultimate.allocInit(43, 144);call #Ultimate.allocInit(43, 145);call #Ultimate.allocInit(34, 146);call #Ultimate.allocInit(13, 147);call #Ultimate.allocInit(34, 148);call #Ultimate.allocInit(232, 149);call #Ultimate.allocInit(35, 150);call #Ultimate.allocInit(35, 151);call #Ultimate.allocInit(34, 152);call #Ultimate.allocInit(13, 153);call #Ultimate.allocInit(34, 154);call #Ultimate.allocInit(232, 155);call #Ultimate.allocInit(27, 156);call #Ultimate.allocInit(27, 157);call #Ultimate.allocInit(34, 158);call #Ultimate.allocInit(13, 159);call #Ultimate.allocInit(34, 160);call #Ultimate.allocInit(232, 161);call #Ultimate.allocInit(23, 162);call #Ultimate.allocInit(23, 163);call #Ultimate.allocInit(34, 164);call #Ultimate.allocInit(13, 165);call #Ultimate.allocInit(34, 166);call #Ultimate.allocInit(232, 167);call #Ultimate.allocInit(34, 168);call #Ultimate.allocInit(34, 169);call #Ultimate.allocInit(13, 170);call #Ultimate.allocInit(34, 171);call #Ultimate.allocInit(232, 172);call #Ultimate.allocInit(43, 173);call #Ultimate.allocInit(43, 174);call #Ultimate.allocInit(34, 175);call #Ultimate.allocInit(13, 176);call #Ultimate.allocInit(34, 177);call #Ultimate.allocInit(232, 178);call #Ultimate.allocInit(38, 179);call #Ultimate.allocInit(38, 180);call #Ultimate.allocInit(43, 181);call #Ultimate.allocInit(13, 182);call #Ultimate.allocInit(34, 183);call #Ultimate.allocInit(232, 184);call #Ultimate.allocInit(32, 185);call #Ultimate.allocInit(32, 186);call #Ultimate.allocInit(27, 187);call #Ultimate.allocInit(27, 188);call #Ultimate.allocInit(37, 189);call #Ultimate.allocInit(27, 190);call #Ultimate.allocInit(13, 191);call #Ultimate.allocInit(27, 192);call #Ultimate.allocInit(232, 193);call #Ultimate.allocInit(27, 194);call #Ultimate.allocInit(27, 195);call #Ultimate.allocInit(13, 196);call #Ultimate.allocInit(27, 197);call #Ultimate.allocInit(232, 198);call #Ultimate.allocInit(36, 199);call #Ultimate.allocInit(36, 200);call #Ultimate.allocInit(13, 201);call #Ultimate.allocInit(27, 202);call #Ultimate.allocInit(232, 203);call #Ultimate.allocInit(32, 204);call #Ultimate.allocInit(32, 205);call #Ultimate.allocInit(13, 206);call #Ultimate.allocInit(27, 207);call #Ultimate.allocInit(232, 208);call #Ultimate.allocInit(27, 209);call #Ultimate.allocInit(27, 210);call #Ultimate.allocInit(13, 211);call #Ultimate.allocInit(27, 212);call #Ultimate.allocInit(232, 213);call #Ultimate.allocInit(33, 214);call #Ultimate.allocInit(33, 215);call #Ultimate.allocInit(13, 216);call #Ultimate.allocInit(27, 217);call #Ultimate.allocInit(232, 218);call #Ultimate.allocInit(29, 219);call #Ultimate.allocInit(29, 220);call #Ultimate.allocInit(19, 221);call #Ultimate.allocInit(24, 222);call #Ultimate.allocInit(27, 223);call #Ultimate.allocInit(13, 224);call #Ultimate.allocInit(27, 225);call #Ultimate.allocInit(232, 226);call #Ultimate.allocInit(33, 227);call #Ultimate.allocInit(33, 228);call #Ultimate.allocInit(41, 229);call #Ultimate.allocInit(21, 230);call #Ultimate.allocInit(13, 231);call #Ultimate.allocInit(27, 232);call #Ultimate.allocInit(232, 233);call #Ultimate.allocInit(24, 234);call #Ultimate.allocInit(24, 235);call #Ultimate.allocInit(22, 236);call #Ultimate.allocInit(13, 237);call #Ultimate.allocInit(27, 238);call #Ultimate.allocInit(232, 239);call #Ultimate.allocInit(21, 240);call #Ultimate.allocInit(21, 241);call #Ultimate.allocInit(21, 242);call #Ultimate.allocInit(13, 243);call #Ultimate.allocInit(27, 244);call #Ultimate.allocInit(232, 245);call #Ultimate.allocInit(23, 246);call #Ultimate.allocInit(23, 247);call #Ultimate.allocInit(13, 248);call #Ultimate.allocInit(29, 249);call #Ultimate.allocInit(232, 250);call #Ultimate.allocInit(35, 251);call #Ultimate.allocInit(35, 252);call #Ultimate.allocInit(29, 253);call #Ultimate.allocInit(13, 254);call #Ultimate.allocInit(29, 255);call #Ultimate.allocInit(232, 256);call #Ultimate.allocInit(34, 257);call #Ultimate.allocInit(34, 258);call #Ultimate.allocInit(29, 259);call #Ultimate.allocInit(13, 260);call #Ultimate.allocInit(29, 261);call #Ultimate.allocInit(232, 262);call #Ultimate.allocInit(36, 263);call #Ultimate.allocInit(36, 264);call #Ultimate.allocInit(29, 265);call #Ultimate.allocInit(13, 266);call #Ultimate.allocInit(29, 267);call #Ultimate.allocInit(232, 268);call #Ultimate.allocInit(34, 269);call #Ultimate.allocInit(34, 270);call #Ultimate.allocInit(29, 271);call #Ultimate.allocInit(13, 272);call #Ultimate.allocInit(29, 273);call #Ultimate.allocInit(232, 274);call #Ultimate.allocInit(35, 275);call #Ultimate.allocInit(35, 276);call #Ultimate.allocInit(29, 277);call #Ultimate.allocInit(13, 278);call #Ultimate.allocInit(29, 279);call #Ultimate.allocInit(232, 280);call #Ultimate.allocInit(34, 281);call #Ultimate.allocInit(34, 282);call #Ultimate.allocInit(29, 283);call #Ultimate.allocInit(13, 284);call #Ultimate.allocInit(29, 285);call #Ultimate.allocInit(232, 286);call #Ultimate.allocInit(35, 287);call #Ultimate.allocInit(35, 288);call #Ultimate.allocInit(29, 289);call #Ultimate.allocInit(26, 290);call #Ultimate.allocInit(26, 291);call #Ultimate.allocInit(23, 292);call #Ultimate.allocInit(26, 293);call #Ultimate.allocInit(43, 294);call #Ultimate.allocInit(35, 295);call #Ultimate.allocInit(13, 296);call #Ultimate.allocInit(27, 297);call #Ultimate.allocInit(232, 298);call #Ultimate.allocInit(42, 299);call #Ultimate.allocInit(42, 300);call #Ultimate.allocInit(34, 301);call #Ultimate.allocInit(16, 302);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~mwifiex_sdio_group0~0.base, ~mwifiex_sdio_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~sdio_ops_group0~0.base, ~sdio_ops_group0~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~mwifiex_sdio_pm_ops_group1~0.base, ~mwifiex_sdio_pm_ops_group1~0.offset := 0, 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_0~0 := 0;~sdio_ops_group1~0.base, ~sdio_ops_group1~0.offset := 0, 0;~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset := 303, 0;call #Ultimate.allocInit(25, 303);call write~init~int(1, ~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(1, ~#mwifiex_reg_sd87xx~0.base, 1 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(64, ~#mwifiex_reg_sd87xx~0.base, 2 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(65, ~#mwifiex_reg_sd87xx~0.base, 3 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(48, ~#mwifiex_reg_sd87xx~0.base, 4 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(3, ~#mwifiex_reg_sd87xx~0.base, 5 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(96, ~#mwifiex_reg_sd87xx~0.base, 6 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(97, ~#mwifiex_reg_sd87xx~0.base, 7 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(63, ~#mwifiex_reg_sd87xx~0.base, 8 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(65534, ~#mwifiex_reg_sd87xx~0.base, 9 + ~#mwifiex_reg_sd87xx~0.offset, 4);call write~init~int(64, ~#mwifiex_reg_sd87xx~0.base, 13 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(4, ~#mwifiex_reg_sd87xx~0.base, 14 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(5, ~#mwifiex_reg_sd87xx~0.base, 15 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 16 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 17 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(6, ~#mwifiex_reg_sd87xx~0.base, 18 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(7, ~#mwifiex_reg_sd87xx~0.base, 19 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 20 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd87xx~0.base, 21 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(8, ~#mwifiex_reg_sd87xx~0.base, 22 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(9, ~#mwifiex_reg_sd87xx~0.base, 23 + ~#mwifiex_reg_sd87xx~0.offset, 1);call write~init~int(108, ~#mwifiex_reg_sd87xx~0.base, 24 + ~#mwifiex_reg_sd87xx~0.offset, 1);~#mwifiex_reg_sd8897~0.base, ~#mwifiex_reg_sd8897~0.offset := 304, 0;call #Ultimate.allocInit(25, 304);call write~init~int(0, ~#mwifiex_reg_sd8897~0.base, ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(0, ~#mwifiex_reg_sd8897~0.base, 1 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(96, ~#mwifiex_reg_sd8897~0.base, 2 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(97, ~#mwifiex_reg_sd8897~0.base, 3 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(80, ~#mwifiex_reg_sd8897~0.base, 4 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(195, ~#mwifiex_reg_sd8897~0.base, 5 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(192, ~#mwifiex_reg_sd8897~0.base, 6 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(193, ~#mwifiex_reg_sd8897~0.base, 7 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(255, ~#mwifiex_reg_sd8897~0.base, 8 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(4294967295, ~#mwifiex_reg_sd8897~0.base, 9 + ~#mwifiex_reg_sd8897~0.offset, 4);call write~init~int(184, ~#mwifiex_reg_sd8897~0.base, 13 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(4, ~#mwifiex_reg_sd8897~0.base, 14 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(5, ~#mwifiex_reg_sd8897~0.base, 15 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(6, ~#mwifiex_reg_sd8897~0.base, 16 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(7, ~#mwifiex_reg_sd8897~0.base, 17 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(8, ~#mwifiex_reg_sd8897~0.base, 18 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(9, ~#mwifiex_reg_sd8897~0.base, 19 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(10, ~#mwifiex_reg_sd8897~0.base, 20 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(11, ~#mwifiex_reg_sd8897~0.base, 21 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(12, ~#mwifiex_reg_sd8897~0.base, 22 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(13, ~#mwifiex_reg_sd8897~0.base, 23 + ~#mwifiex_reg_sd8897~0.offset, 1);call write~init~int(204, ~#mwifiex_reg_sd8897~0.base, 24 + ~#mwifiex_reg_sd8897~0.offset, 1);~#mwifiex_sdio_sd8786~0.base, ~#mwifiex_sdio_sd8786~0.offset := 305, 0;call #Ultimate.allocInit(30, 305);call write~init~$Pointer$(5, 0, ~#mwifiex_sdio_sd8786~0.base, ~#mwifiex_sdio_sd8786~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, ~#mwifiex_sdio_sd8786~0.base, 8 + ~#mwifiex_sdio_sd8786~0.offset, 8);call write~init~int(16, ~#mwifiex_sdio_sd8786~0.base, 16 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(8, ~#mwifiex_sdio_sd8786~0.base, 17 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8786~0.base, 18 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8786~0.base, 19 + ~#mwifiex_sdio_sd8786~0.offset, 1);call write~init~int(2048, ~#mwifiex_sdio_sd8786~0.base, 20 + ~#mwifiex_sdio_sd8786~0.offset, 2);call write~init~int(16384, ~#mwifiex_sdio_sd8786~0.base, 22 + ~#mwifiex_sdio_sd8786~0.offset, 4);call write~init~int(16384, ~#mwifiex_sdio_sd8786~0.base, 26 + ~#mwifiex_sdio_sd8786~0.offset, 4);~#mwifiex_sdio_sd8787~0.base, ~#mwifiex_sdio_sd8787~0.offset := 306, 0;call #Ultimate.allocInit(30, 306);call write~init~$Pointer$(6, 0, ~#mwifiex_sdio_sd8787~0.base, ~#mwifiex_sdio_sd8787~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, ~#mwifiex_sdio_sd8787~0.base, 8 + ~#mwifiex_sdio_sd8787~0.offset, 8);call write~init~int(16, ~#mwifiex_sdio_sd8787~0.base, 16 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(8, ~#mwifiex_sdio_sd8787~0.base, 17 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8787~0.base, 18 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8787~0.base, 19 + ~#mwifiex_sdio_sd8787~0.offset, 1);call write~init~int(2048, ~#mwifiex_sdio_sd8787~0.base, 20 + ~#mwifiex_sdio_sd8787~0.offset, 2);call write~init~int(16384, ~#mwifiex_sdio_sd8787~0.base, 22 + ~#mwifiex_sdio_sd8787~0.offset, 4);call write~init~int(16384, ~#mwifiex_sdio_sd8787~0.base, 26 + ~#mwifiex_sdio_sd8787~0.offset, 4);~#mwifiex_sdio_sd8797~0.base, ~#mwifiex_sdio_sd8797~0.offset := 307, 0;call #Ultimate.allocInit(30, 307);call write~init~$Pointer$(7, 0, ~#mwifiex_sdio_sd8797~0.base, ~#mwifiex_sdio_sd8797~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd87xx~0.base, ~#mwifiex_reg_sd87xx~0.offset, ~#mwifiex_sdio_sd8797~0.base, 8 + ~#mwifiex_sdio_sd8797~0.offset, 8);call write~init~int(16, ~#mwifiex_sdio_sd8797~0.base, 16 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(8, ~#mwifiex_sdio_sd8797~0.base, 17 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8797~0.base, 18 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8797~0.base, 19 + ~#mwifiex_sdio_sd8797~0.offset, 1);call write~init~int(2048, ~#mwifiex_sdio_sd8797~0.base, 20 + ~#mwifiex_sdio_sd8797~0.offset, 2);call write~init~int(16384, ~#mwifiex_sdio_sd8797~0.base, 22 + ~#mwifiex_sdio_sd8797~0.offset, 4);call write~init~int(16384, ~#mwifiex_sdio_sd8797~0.base, 26 + ~#mwifiex_sdio_sd8797~0.offset, 4);~#mwifiex_sdio_sd8897~0.base, ~#mwifiex_sdio_sd8897~0.offset := 308, 0;call #Ultimate.allocInit(30, 308);call write~init~$Pointer$(8, 0, ~#mwifiex_sdio_sd8897~0.base, ~#mwifiex_sdio_sd8897~0.offset, 8);call write~init~$Pointer$(~#mwifiex_reg_sd8897~0.base, ~#mwifiex_reg_sd8897~0.offset, ~#mwifiex_sdio_sd8897~0.base, 8 + ~#mwifiex_sdio_sd8897~0.offset, 8);call write~init~int(32, ~#mwifiex_sdio_sd8897~0.base, 16 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(16, ~#mwifiex_sdio_sd8897~0.base, 17 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(1, ~#mwifiex_sdio_sd8897~0.base, 18 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(0, ~#mwifiex_sdio_sd8897~0.base, 19 + ~#mwifiex_sdio_sd8897~0.offset, 1);call write~init~int(4096, ~#mwifiex_sdio_sd8897~0.base, 20 + ~#mwifiex_sdio_sd8897~0.offset, 2);call write~init~int(32768, ~#mwifiex_sdio_sd8897~0.base, 22 + ~#mwifiex_sdio_sd8897~0.offset, 4);call write~init~int(32768, ~#mwifiex_sdio_sd8897~0.base, 26 + ~#mwifiex_sdio_sd8897~0.offset, 4);~user_rmmod~0 := 0;~#add_remove_card_sem~0.base, ~#add_remove_card_sem~0.offset := 309, 0;call #Ultimate.allocInit(84, 309);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#add_remove_card_sem~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#add_remove_card_sem~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#add_remove_card_sem~0.base);~#mwifiex_ids~0.base, ~#mwifiex_ids~0.offset := 310, 0;call #Ultimate.allocInit(65, 310);call write~init~int(255, ~#mwifiex_ids~0.base, ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 1 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37142, ~#mwifiex_ids~0.base, 3 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8786~0.base + ~#mwifiex_sdio_sd8786~0.offset, ~#mwifiex_ids~0.base, 5 + ~#mwifiex_ids~0.offset, 8);call write~init~int(255, ~#mwifiex_ids~0.base, 13 + ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 14 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37145, ~#mwifiex_ids~0.base, 16 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8787~0.base + ~#mwifiex_sdio_sd8787~0.offset, ~#mwifiex_ids~0.base, 18 + ~#mwifiex_ids~0.offset, 8);call write~init~int(255, ~#mwifiex_ids~0.base, 26 + ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 27 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37161, ~#mwifiex_ids~0.base, 29 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8797~0.base + ~#mwifiex_sdio_sd8797~0.offset, ~#mwifiex_ids~0.base, 31 + ~#mwifiex_ids~0.offset, 8);call write~init~int(255, ~#mwifiex_ids~0.base, 39 + ~#mwifiex_ids~0.offset, 1);call write~init~int(735, ~#mwifiex_ids~0.base, 40 + ~#mwifiex_ids~0.offset, 2);call write~init~int(37165, ~#mwifiex_ids~0.base, 42 + ~#mwifiex_ids~0.offset, 2);call write~init~int(~#mwifiex_sdio_sd8897~0.base + ~#mwifiex_sdio_sd8897~0.offset, ~#mwifiex_ids~0.base, 44 + ~#mwifiex_ids~0.offset, 8);call write~init~int(0, ~#mwifiex_ids~0.base, 52 + ~#mwifiex_ids~0.offset, 1);call write~init~int(0, ~#mwifiex_ids~0.base, 53 + ~#mwifiex_ids~0.offset, 2);call write~init~int(0, ~#mwifiex_ids~0.base, 55 + ~#mwifiex_ids~0.offset, 2);call write~init~int(0, ~#mwifiex_ids~0.base, 57 + ~#mwifiex_ids~0.offset, 8);~__mod_sdio__mwifiex_ids_device_table~0.class := 0;~__mod_sdio__mwifiex_ids_device_table~0.vendor := 0;~__mod_sdio__mwifiex_ids_device_table~0.device := 0;~__mod_sdio__mwifiex_ids_device_table~0.driver_data := 0;~#mwifiex_sdio_pm_ops~0.base, ~#mwifiex_sdio_pm_ops~0.offset := 311, 0;call #Ultimate.allocInit(184, 311);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 8 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_suspend.base, #funAddr~mwifiex_sdio_suspend.offset, ~#mwifiex_sdio_pm_ops~0.base, 16 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_resume.base, #funAddr~mwifiex_sdio_resume.offset, ~#mwifiex_sdio_pm_ops~0.base, 24 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 32 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 40 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 48 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 56 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 64 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 72 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 80 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 88 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 96 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 104 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 112 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 120 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 128 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 136 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 144 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 152 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 160 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 168 + ~#mwifiex_sdio_pm_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio_pm_ops~0.base, 176 + ~#mwifiex_sdio_pm_ops~0.offset, 8);~#mwifiex_sdio~0.base, ~#mwifiex_sdio~0.offset := 312, 0;call #Ultimate.allocInit(145, 312);call write~init~$Pointer$(40, 0, ~#mwifiex_sdio~0.base, ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(~#mwifiex_ids~0.base, ~#mwifiex_ids~0.offset, ~#mwifiex_sdio~0.base, 8 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_probe.base, #funAddr~mwifiex_sdio_probe.offset, ~#mwifiex_sdio~0.base, 16 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_remove.base, #funAddr~mwifiex_sdio_remove.offset, ~#mwifiex_sdio~0.base, 24 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 32 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 40 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#mwifiex_sdio~0.base, 48 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 56 + ~#mwifiex_sdio~0.offset, 8);call write~init~int(0, ~#mwifiex_sdio~0.base, 64 + ~#mwifiex_sdio~0.offset, 1);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 65 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 73 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 81 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 89 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 97 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 105 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 113 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 121 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(~#mwifiex_sdio_pm_ops~0.base, ~#mwifiex_sdio_pm_ops~0.offset, ~#mwifiex_sdio~0.base, 129 + ~#mwifiex_sdio~0.offset, 8);call write~init~$Pointer$(0, 0, ~#mwifiex_sdio~0.base, 137 + ~#mwifiex_sdio~0.offset, 8);~reset_host~0.base, ~reset_host~0.offset := 0, 0;~#card_reset_work~0.base, ~#card_reset_work~0.offset := 313, 0;call #Ultimate.allocInit(76, 313);call write~init~int(137438953424, ~#card_reset_work~0.base, ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(~#card_reset_work~0.base, 8 + ~#card_reset_work~0.offset, ~#card_reset_work~0.base, 8 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(~#card_reset_work~0.base, 8 + ~#card_reset_work~0.offset, ~#card_reset_work~0.base, 16 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(#funAddr~sdio_card_reset_worker.base, #funAddr~sdio_card_reset_worker.offset, ~#card_reset_work~0.base, 24 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(~#card_reset_work~0.base, ~#card_reset_work~0.offset, ~#card_reset_work~0.base, 32 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(0, 0, ~#card_reset_work~0.base, 40 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(0, 0, ~#card_reset_work~0.base, 48 + ~#card_reset_work~0.offset, 8);call write~init~$Pointer$(302, 0, ~#card_reset_work~0.base, 56 + ~#card_reset_work~0.offset, 8);call write~init~int(0, ~#card_reset_work~0.base, 64 + ~#card_reset_work~0.offset, 4);call write~init~int(0, ~#card_reset_work~0.base, 68 + ~#card_reset_work~0.offset, 8);~#sdio_ops~0.base, ~#sdio_ops~0.offset := 314, 0;call #Ultimate.allocInit(176, 314);call write~init~$Pointer$(#funAddr~mwifiex_init_sdio.base, #funAddr~mwifiex_init_sdio.offset, ~#sdio_ops~0.base, ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_cleanup_sdio.base, #funAddr~mwifiex_cleanup_sdio.offset, ~#sdio_ops~0.base, 8 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_check_fw_status.base, #funAddr~mwifiex_check_fw_status.offset, ~#sdio_ops~0.base, 16 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_prog_fw_w_helper.base, #funAddr~mwifiex_prog_fw_w_helper.offset, ~#sdio_ops~0.base, 24 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_register_dev.base, #funAddr~mwifiex_register_dev.offset, ~#sdio_ops~0.base, 32 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_unregister_dev.base, #funAddr~mwifiex_unregister_dev.offset, ~#sdio_ops~0.base, 40 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_enable_host_int.base, #funAddr~mwifiex_sdio_enable_host_int.offset, ~#sdio_ops~0.base, 48 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_disable_host_int.base, #funAddr~mwifiex_sdio_disable_host_int.offset, ~#sdio_ops~0.base, 56 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_process_int_status.base, #funAddr~mwifiex_process_int_status.offset, ~#sdio_ops~0.base, 64 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_host_to_card.base, #funAddr~mwifiex_sdio_host_to_card.offset, ~#sdio_ops~0.base, 72 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_pm_wakeup_card.base, #funAddr~mwifiex_pm_wakeup_card.offset, ~#sdio_ops~0.base, 80 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_pm_wakeup_card_complete.base, #funAddr~mwifiex_pm_wakeup_card_complete.offset, ~#sdio_ops~0.base, 88 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_update_mp_end_port.base, #funAddr~mwifiex_update_mp_end_port.offset, ~#sdio_ops~0.base, 96 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_cleanup_mpa_buf.base, #funAddr~mwifiex_cleanup_mpa_buf.offset, ~#sdio_ops~0.base, 104 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_cmdrsp_complete.base, #funAddr~mwifiex_sdio_cmdrsp_complete.offset, ~#sdio_ops~0.base, 112 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_cmdrsp_complete.base, #funAddr~mwifiex_sdio_cmdrsp_complete.offset, ~#sdio_ops~0.base, 120 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 128 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 136 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 144 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~mwifiex_sdio_card_reset.base, #funAddr~mwifiex_sdio_card_reset.offset, ~#sdio_ops~0.base, 152 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 160 + ~#sdio_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#sdio_ops~0.base, 168 + ~#sdio_ops~0.offset, 8);~ldv_retval_2~0 := 0;~ldv_retval_5~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_6~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_4~0 := 0;~ldv_retval_8~0 := 0;~ldv_retval_3~0 := 0;~ldv_retval_7~0 := 0;~#set_impl~0.base, ~#set_impl~0.offset := 315, 0;call #Ultimate.allocInit(120, 315);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#set_impl~0.base);~last_index~0 := 0;~LDV_SKBS~0.base, ~LDV_SKBS~0.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {12974#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret1041#1, main_#t~ret1042#1, main_#t~ret1043#1, main_#t~ret1044#1.base, main_#t~ret1044#1.offset, main_#t~ret1045#1.base, main_#t~ret1045#1.offset, main_#t~ret1046#1.base, main_#t~ret1046#1.offset, main_#t~ret1047#1.base, main_#t~ret1047#1.offset, main_#t~nondet1048#1, main_#t~switch1049#1, main_#t~nondet1050#1, main_#t~switch1051#1, main_#t~ret1052#1, main_#t~ret1053#1, main_#t~ret1054#1, main_#t~ret1055#1, main_#t~ret1056#1, main_#t~ret1057#1, main_#t~ret1058#1, main_#t~ret1059#1, main_#t~nondet1060#1, main_#t~switch1061#1, main_#t~ret1062#1, main_#t~ret1063#1, main_#t~ret1064#1, main_#t~ret1065#1, main_#t~ret1066#1, main_#t~ret1067#1, main_#t~ret1068#1, main_#t~ret1069#1, main_#t~ret1070#1, main_#t~ret1071#1, main_#t~ret1072#1, main_#t~nondet1073#1, main_#t~switch1074#1, main_#t~ret1075#1, main_#t~nondet1076#1, main_#t~switch1077#1, main_#t~ret1078#1, main_#t~nondet1079#1, main_#t~switch1080#1, main_~ldvarg1~0#1, main_~tmp~40#1, main_~ldvarg4~0#1, main_~tmp___0~23#1, main_~ldvarg3~0#1, main_~tmp___1~12#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset, main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset, main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset, main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset, main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset, main_~tmp___6~3#1, main_~tmp___7~3#1, main_~tmp___8~3#1, main_~tmp___9~3#1, main_~tmp___10~1#1, main_~tmp___11~1#1;havoc main_~ldvarg1~0#1;havoc main_~tmp~40#1;havoc main_~ldvarg4~0#1;havoc main_~tmp___0~23#1;havoc main_~ldvarg3~0#1;havoc main_~tmp___1~12#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset;havoc main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset;havoc main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset;havoc main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset;havoc main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset;havoc main_~tmp___6~3#1;havoc main_~tmp___7~3#1;havoc main_~tmp___8~3#1;havoc main_~tmp___9~3#1;havoc main_~tmp___10~1#1;havoc main_~tmp___11~1#1;call main_#t~ret1041#1 := __VERIFIER_nondet_u32();main_~tmp~40#1 := main_#t~ret1041#1;havoc main_#t~ret1041#1;main_~ldvarg1~0#1 := main_~tmp~40#1;call main_#t~ret1042#1 := __VERIFIER_nondet_u16();main_~tmp___0~23#1 := main_#t~ret1042#1;havoc main_#t~ret1042#1;main_~ldvarg4~0#1 := main_~tmp___0~23#1;call main_#t~ret1043#1 := __VERIFIER_nondet_u8();main_~tmp___1~12#1 := main_#t~ret1043#1;havoc main_#t~ret1043#1;main_~ldvarg3~0#1 := main_~tmp___1~12#1; {12974#true} is VALID [2022-02-20 21:56:51,574 INFO L272 TraceCheckUtils]: 2: Hoare triple {12974#true} call main_#t~ret1044#1.base, main_#t~ret1044#1.offset := ldv_zalloc(32); {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:51,575 INFO L290 TraceCheckUtils]: 3: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,575 INFO L290 TraceCheckUtils]: 4: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,576 INFO L290 TraceCheckUtils]: 5: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,576 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {12974#true} {12974#true} #3157#return; {12974#true} is VALID [2022-02-20 21:56:51,576 INFO L290 TraceCheckUtils]: 7: Hoare triple {12974#true} main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset := main_#t~ret1044#1.base, main_#t~ret1044#1.offset;havoc main_#t~ret1044#1.base, main_#t~ret1044#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___2~8#1.base, main_~tmp___2~8#1.offset; {12974#true} is VALID [2022-02-20 21:56:51,577 INFO L272 TraceCheckUtils]: 8: Hoare triple {12974#true} call main_#t~ret1045#1.base, main_#t~ret1045#1.offset := ldv_zalloc(4); {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:51,577 INFO L290 TraceCheckUtils]: 9: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,577 INFO L290 TraceCheckUtils]: 10: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,577 INFO L290 TraceCheckUtils]: 11: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,578 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {12974#true} {12974#true} #3159#return; {12974#true} is VALID [2022-02-20 21:56:51,578 INFO L290 TraceCheckUtils]: 13: Hoare triple {12974#true} main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset := main_#t~ret1045#1.base, main_#t~ret1045#1.offset;havoc main_#t~ret1045#1.base, main_#t~ret1045#1.offset;main_~ldvarg2~0#1.base, main_~ldvarg2~0#1.offset := main_~tmp___3~6#1.base, main_~tmp___3~6#1.offset; {12974#true} is VALID [2022-02-20 21:56:51,578 INFO L272 TraceCheckUtils]: 14: Hoare triple {12974#true} call main_#t~ret1046#1.base, main_#t~ret1046#1.offset := ldv_zalloc(16); {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:51,579 INFO L290 TraceCheckUtils]: 15: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,579 INFO L290 TraceCheckUtils]: 16: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,579 INFO L290 TraceCheckUtils]: 17: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,579 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {12974#true} {12974#true} #3161#return; {12974#true} is VALID [2022-02-20 21:56:51,580 INFO L290 TraceCheckUtils]: 19: Hoare triple {12974#true} main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset := main_#t~ret1046#1.base, main_#t~ret1046#1.offset;havoc main_#t~ret1046#1.base, main_#t~ret1046#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~6#1.base, main_~tmp___4~6#1.offset; {12974#true} is VALID [2022-02-20 21:56:51,580 INFO L272 TraceCheckUtils]: 20: Hoare triple {12974#true} call main_#t~ret1047#1.base, main_#t~ret1047#1.offset := ldv_zalloc(80); {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:56:51,580 INFO L290 TraceCheckUtils]: 21: Hoare triple {12995#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet48#1 && #t~nondet48#1 <= 2147483647;~tmp___0~1#1 := #t~nondet48#1;havoc #t~nondet48#1; {12974#true} is VALID [2022-02-20 21:56:51,583 INFO L290 TraceCheckUtils]: 22: Hoare triple {12974#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {12974#true} is VALID [2022-02-20 21:56:51,583 INFO L290 TraceCheckUtils]: 23: Hoare triple {12974#true} assume true; {12974#true} is VALID [2022-02-20 21:56:51,583 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {12974#true} {12974#true} #3163#return; {12974#true} is VALID [2022-02-20 21:56:51,584 INFO L290 TraceCheckUtils]: 25: Hoare triple {12974#true} main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset := main_#t~ret1047#1.base, main_#t~ret1047#1.offset;havoc main_#t~ret1047#1.base, main_#t~ret1047#1.offset;main_~ldvarg6~0#1.base, main_~ldvarg6~0#1.offset := main_~tmp___5~4#1.base, main_~tmp___5~4#1.offset;assume { :begin_inline_ldv_initialize } true;assume { :begin_inline_ldv_set_init } true;ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ldv_set_init_#in~set#1.base, ldv_set_init_#in~set#1.offset;ldv_set_init_~set#1.base, ldv_set_init_~set#1.offset := ~#set_impl~0.base, ~#set_impl~0.offset;~last_index~0 := 0; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,584 INFO L290 TraceCheckUtils]: 26: Hoare triple {12992#(= ~last_index~0 0)} assume { :end_inline_ldv_set_init } true; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,585 INFO L290 TraceCheckUtils]: 27: Hoare triple {12992#(= ~last_index~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_4~0 := 0;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,585 INFO L290 TraceCheckUtils]: 28: Hoare triple {12992#(= ~last_index~0 0)} assume -2147483648 <= main_#t~nondet1048#1 && main_#t~nondet1048#1 <= 2147483647;main_~tmp___6~3#1 := main_#t~nondet1048#1;havoc main_#t~nondet1048#1;main_#t~switch1049#1 := 0 == main_~tmp___6~3#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,586 INFO L290 TraceCheckUtils]: 29: Hoare triple {12992#(= ~last_index~0 0)} assume !main_#t~switch1049#1;main_#t~switch1049#1 := main_#t~switch1049#1 || 1 == main_~tmp___6~3#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,587 INFO L290 TraceCheckUtils]: 30: Hoare triple {12992#(= ~last_index~0 0)} assume !main_#t~switch1049#1;main_#t~switch1049#1 := main_#t~switch1049#1 || 2 == main_~tmp___6~3#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,587 INFO L290 TraceCheckUtils]: 31: Hoare triple {12992#(= ~last_index~0 0)} assume main_#t~switch1049#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,588 INFO L290 TraceCheckUtils]: 32: Hoare triple {12992#(= ~last_index~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1073#1 && main_#t~nondet1073#1 <= 2147483647;main_~tmp___9~3#1 := main_#t~nondet1073#1;havoc main_#t~nondet1073#1;main_#t~switch1074#1 := 0 == main_~tmp___9~3#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,589 INFO L290 TraceCheckUtils]: 33: Hoare triple {12992#(= ~last_index~0 0)} assume !main_#t~switch1074#1;main_#t~switch1074#1 := main_#t~switch1074#1 || 1 == main_~tmp___9~3#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,590 INFO L290 TraceCheckUtils]: 34: Hoare triple {12992#(= ~last_index~0 0)} assume main_#t~switch1074#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,603 INFO L290 TraceCheckUtils]: 35: Hoare triple {12992#(= ~last_index~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_mwifiex_sdio_init_module } true;havoc mwifiex_sdio_init_module_#res#1;havoc mwifiex_sdio_init_module_#t~ret1034#1, mwifiex_sdio_init_module_~tmp~35#1;havoc mwifiex_sdio_init_module_~tmp~35#1;assume { :begin_inline_sema_init } true;sema_init_#in~sem#1.base, sema_init_#in~sem#1.offset, sema_init_#in~val#1 := ~#add_remove_card_sem~0.base, ~#add_remove_card_sem~0.offset, 1;havoc sema_init_#t~mem56#1, sema_init_#t~mem57#1, sema_init_#t~mem58#1, sema_init_#t~mem59#1, sema_init_#t~mem60#1, sema_init_#t~mem61#1.base, sema_init_#t~mem61#1.offset, sema_init_#t~mem62#1.base, sema_init_#t~mem62#1.offset, sema_init_#t~arrayCopy63#1.base, sema_init_#t~arrayCopy63#1.offset, sema_init_#t~mem64#1.base, sema_init_#t~mem64#1.offset, sema_init_#t~mem65#1.base, sema_init_#t~mem65#1.offset, sema_init_#t~mem66#1.base, sema_init_#t~mem66#1.offset, sema_init_#t~mem67#1, sema_init_#t~mem68#1, sema_init_#t~mem69#1, sema_init_#t~mem70#1.base, sema_init_#t~mem70#1.offset, sema_init_#t~mem71#1.base, sema_init_#t~mem71#1.offset, sema_init_~sem#1.base, sema_init_~sem#1.offset, sema_init_~val#1, sema_init_~#__key~0#1.base, sema_init_~#__key~0#1.offset, sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset;sema_init_~sem#1.base, sema_init_~sem#1.offset := sema_init_#in~sem#1.base, sema_init_#in~sem#1.offset;sema_init_~val#1 := sema_init_#in~val#1;call sema_init_~#__key~0#1.base, sema_init_~#__key~0#1.offset := #Ultimate.allocOnStack(8);call sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(84);call write~int(0, sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset, 4);call write~int(3735899821, sema_init_~#__constr_expr_0~0#1.base, 4 + sema_init_~#__constr_expr_0~0#1.offset, 4);call write~int(4294967295, sema_init_~#__constr_expr_0~0#1.base, 8 + sema_init_~#__constr_expr_0~0#1.offset, 4);call write~$Pointer$(0, -1, sema_init_~#__constr_expr_0~0#1.base, 12 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~$Pointer$(0, 0, sema_init_~#__constr_expr_0~0#1.base, 20 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~$Pointer$(0, 0, sema_init_~#__constr_expr_0~0#1.base, 28 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~$Pointer$(0, 0, sema_init_~#__constr_expr_0~0#1.base, 36 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~$Pointer$(3, 0, sema_init_~#__constr_expr_0~0#1.base, 44 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~int(0, sema_init_~#__constr_expr_0~0#1.base, 52 + sema_init_~#__constr_expr_0~0#1.offset, 4);call write~int(0, sema_init_~#__constr_expr_0~0#1.base, 56 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~int(sema_init_~val#1, sema_init_~#__constr_expr_0~0#1.base, 64 + sema_init_~#__constr_expr_0~0#1.offset, 4);call write~$Pointer$(sema_init_~sem#1.base, 68 + sema_init_~sem#1.offset, sema_init_~#__constr_expr_0~0#1.base, 68 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~$Pointer$(sema_init_~sem#1.base, 68 + sema_init_~sem#1.offset, sema_init_~#__constr_expr_0~0#1.base, 76 + sema_init_~#__constr_expr_0~0#1.offset, 8);call sema_init_#t~mem56#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset, 4);call sema_init_#t~mem57#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset, 2);call sema_init_#t~mem58#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, 2 + sema_init_~#__constr_expr_0~0#1.offset, 2);call sema_init_#t~mem59#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, 4 + sema_init_~#__constr_expr_0~0#1.offset, 4);call sema_init_#t~mem60#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, 8 + sema_init_~#__constr_expr_0~0#1.offset, 4);call sema_init_#t~mem61#1.base, sema_init_#t~mem61#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 12 + sema_init_~#__constr_expr_0~0#1.offset, 8);call sema_init_#t~mem62#1.base, sema_init_#t~mem62#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 20 + sema_init_~#__constr_expr_0~0#1.offset, 8);call sema_init_#t~mem64#1.base, sema_init_#t~mem64#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 28 + sema_init_~#__constr_expr_0~0#1.offset, 8);sema_init_#t~arrayCopy63#1.base, sema_init_#t~arrayCopy63#1.offset := sema_init_#t~arrayCopy63#1.base[0 := sema_init_#t~mem64#1.base], sema_init_#t~arrayCopy63#1.offset[0 := sema_init_#t~mem64#1.offset];call sema_init_#t~mem65#1.base, sema_init_#t~mem65#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 36 + sema_init_~#__constr_expr_0~0#1.offset, 8);sema_init_#t~arrayCopy63#1.base, sema_init_#t~arrayCopy63#1.offset := sema_init_#t~arrayCopy63#1.base[1 := sema_init_#t~mem65#1.base], sema_init_#t~arrayCopy63#1.offset[1 := sema_init_#t~mem65#1.offset];call sema_init_#t~mem66#1.base, sema_init_#t~mem66#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 44 + sema_init_~#__constr_expr_0~0#1.offset, 8);call sema_init_#t~mem67#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, 52 + sema_init_~#__constr_expr_0~0#1.offset, 4);call sema_init_#t~mem68#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, 56 + sema_init_~#__constr_expr_0~0#1.offset, 8);call sema_init_#t~mem69#1 := read~int(sema_init_~#__constr_expr_0~0#1.base, 64 + sema_init_~#__constr_expr_0~0#1.offset, 4);call sema_init_#t~mem70#1.base, sema_init_#t~mem70#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 68 + sema_init_~#__constr_expr_0~0#1.offset, 8);call sema_init_#t~mem71#1.base, sema_init_#t~mem71#1.offset := read~$Pointer$(sema_init_~#__constr_expr_0~0#1.base, 76 + sema_init_~#__constr_expr_0~0#1.offset, 8);call write~int(sema_init_#t~mem56#1, sema_init_~sem#1.base, sema_init_~sem#1.offset, 4);call write~int(sema_init_#t~mem57#1, sema_init_~sem#1.base, sema_init_~sem#1.offset, 2);call write~int(sema_init_#t~mem58#1, sema_init_~sem#1.base, 2 + sema_init_~sem#1.offset, 2);call write~int(sema_init_#t~mem59#1, sema_init_~sem#1.base, 4 + sema_init_~sem#1.offset, 4);call write~int(sema_init_#t~mem60#1, sema_init_~sem#1.base, 8 + sema_init_~sem#1.offset, 4);call write~$Pointer$(sema_init_#t~mem61#1.base, sema_init_#t~mem61#1.offset, sema_init_~sem#1.base, 12 + sema_init_~sem#1.offset, 8);call write~$Pointer$(sema_init_#t~mem62#1.base, sema_init_#t~mem62#1.offset, sema_init_~sem#1.base, 20 + sema_init_~sem#1.offset, 8);call write~$Pointer$(sema_init_#t~arrayCopy63#1.base[0], sema_init_#t~arrayCopy63#1.offset[0], sema_init_~sem#1.base, 28 + sema_init_~sem#1.offset, 8);call write~$Pointer$(sema_init_#t~arrayCopy63#1.base[1], sema_init_#t~arrayCopy63#1.offset[1], sema_init_~sem#1.base, 36 + sema_init_~sem#1.offset, 8);call write~$Pointer$(sema_init_#t~mem66#1.base, sema_init_#t~mem66#1.offset, sema_init_~sem#1.base, 44 + sema_init_~sem#1.offset, 8);call write~int(sema_init_#t~mem67#1, sema_init_~sem#1.base, 52 + sema_init_~sem#1.offset, 4);call write~int(sema_init_#t~mem68#1, sema_init_~sem#1.base, 56 + sema_init_~sem#1.offset, 8);call write~int(sema_init_#t~mem69#1, sema_init_~sem#1.base, 64 + sema_init_~sem#1.offset, 4);call write~$Pointer$(sema_init_#t~mem70#1.base, sema_init_#t~mem70#1.offset, sema_init_~sem#1.base, 68 + sema_init_~sem#1.offset, 8);call write~$Pointer$(sema_init_#t~mem71#1.base, sema_init_#t~mem71#1.offset, sema_init_~sem#1.base, 76 + sema_init_~sem#1.offset, 8);havoc sema_init_#t~mem56#1;havoc sema_init_#t~mem57#1;havoc sema_init_#t~mem58#1;havoc sema_init_#t~mem59#1;havoc sema_init_#t~mem60#1;havoc sema_init_#t~mem61#1.base, sema_init_#t~mem61#1.offset;havoc sema_init_#t~mem62#1.base, sema_init_#t~mem62#1.offset;havoc sema_init_#t~arrayCopy63#1.base, sema_init_#t~arrayCopy63#1.offset;havoc sema_init_#t~mem64#1.base, sema_init_#t~mem64#1.offset;havoc sema_init_#t~mem65#1.base, sema_init_#t~mem65#1.offset;havoc sema_init_#t~mem66#1.base, sema_init_#t~mem66#1.offset;havoc sema_init_#t~mem67#1;havoc sema_init_#t~mem68#1;havoc sema_init_#t~mem69#1;havoc sema_init_#t~mem70#1.base, sema_init_#t~mem70#1.offset;havoc sema_init_#t~mem71#1.base, sema_init_#t~mem71#1.offset;assume { :begin_inline_lockdep_init_map } true;lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset, lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset, lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset, lockdep_init_map_#in~arg3#1 := sema_init_~sem#1.base, 20 + sema_init_~sem#1.offset, 4, 0, sema_init_~#__key~0#1.base, sema_init_~#__key~0#1.offset, 0;havoc lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset, lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset, lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset, lockdep_init_map_~arg3#1;lockdep_init_map_~arg0#1.base, lockdep_init_map_~arg0#1.offset := lockdep_init_map_#in~arg0#1.base, lockdep_init_map_#in~arg0#1.offset;lockdep_init_map_~arg1#1.base, lockdep_init_map_~arg1#1.offset := lockdep_init_map_#in~arg1#1.base, lockdep_init_map_#in~arg1#1.offset;lockdep_init_map_~arg2#1.base, lockdep_init_map_~arg2#1.offset := lockdep_init_map_#in~arg2#1.base, lockdep_init_map_#in~arg2#1.offset;lockdep_init_map_~arg3#1 := lockdep_init_map_#in~arg3#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,606 INFO L290 TraceCheckUtils]: 36: Hoare triple {12992#(= ~last_index~0 0)} assume { :end_inline_lockdep_init_map } true;call ULTIMATE.dealloc(sema_init_~#__key~0#1.base, sema_init_~#__key~0#1.offset);havoc sema_init_~#__key~0#1.base, sema_init_~#__key~0#1.offset;call ULTIMATE.dealloc(sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset);havoc sema_init_~#__constr_expr_0~0#1.base, sema_init_~#__constr_expr_0~0#1.offset; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,607 INFO L290 TraceCheckUtils]: 37: Hoare triple {12992#(= ~last_index~0 0)} assume { :end_inline_sema_init } true;~user_rmmod~0 := 0;assume { :begin_inline_sdio_register_driver } true;sdio_register_driver_#in~arg0#1.base, sdio_register_driver_#in~arg0#1.offset := ~#mwifiex_sdio~0.base, ~#mwifiex_sdio~0.offset;havoc sdio_register_driver_#res#1;havoc sdio_register_driver_#t~nondet1122#1, sdio_register_driver_~arg0#1.base, sdio_register_driver_~arg0#1.offset;sdio_register_driver_~arg0#1.base, sdio_register_driver_~arg0#1.offset := sdio_register_driver_#in~arg0#1.base, sdio_register_driver_#in~arg0#1.offset;assume -2147483648 <= sdio_register_driver_#t~nondet1122#1 && sdio_register_driver_#t~nondet1122#1 <= 2147483647;sdio_register_driver_#res#1 := sdio_register_driver_#t~nondet1122#1;havoc sdio_register_driver_#t~nondet1122#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,607 INFO L290 TraceCheckUtils]: 38: Hoare triple {12992#(= ~last_index~0 0)} mwifiex_sdio_init_module_#t~ret1034#1 := sdio_register_driver_#res#1;assume { :end_inline_sdio_register_driver } true;assume -2147483648 <= mwifiex_sdio_init_module_#t~ret1034#1 && mwifiex_sdio_init_module_#t~ret1034#1 <= 2147483647;mwifiex_sdio_init_module_~tmp~35#1 := mwifiex_sdio_init_module_#t~ret1034#1;havoc mwifiex_sdio_init_module_#t~ret1034#1;mwifiex_sdio_init_module_#res#1 := mwifiex_sdio_init_module_~tmp~35#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,607 INFO L290 TraceCheckUtils]: 39: Hoare triple {12992#(= ~last_index~0 0)} main_#t~ret1075#1 := mwifiex_sdio_init_module_#res#1;assume { :end_inline_mwifiex_sdio_init_module } true;assume -2147483648 <= main_#t~ret1075#1 && main_#t~ret1075#1 <= 2147483647;~ldv_retval_7~0 := main_#t~ret1075#1;havoc main_#t~ret1075#1; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,608 INFO L290 TraceCheckUtils]: 40: Hoare triple {12992#(= ~last_index~0 0)} assume 0 != ~ldv_retval_7~0;~ldv_state_variable_0~0 := 3; {12992#(= ~last_index~0 0)} is VALID [2022-02-20 21:56:51,609 INFO L290 TraceCheckUtils]: 41: Hoare triple {12992#(= ~last_index~0 0)} assume { :begin_inline_ldv_check_final_state } true;havoc ldv_check_final_state_#t~ret1091#1, ldv_check_final_state_~tmp___7~9#1;havoc ldv_check_final_state_~tmp___7~9#1;assume { :begin_inline_ldv_set_is_empty } true;ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset := ~LDV_SKBS~0.base, ~LDV_SKBS~0.offset;havoc ldv_set_is_empty_#res#1;havoc ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset;ldv_set_is_empty_~set#1.base, ldv_set_is_empty_~set#1.offset := ldv_set_is_empty_#in~set#1.base, ldv_set_is_empty_#in~set#1.offset;ldv_set_is_empty_#res#1 := (if 0 == ~last_index~0 then 1 else 0); {12993#(not (= |ULTIMATE.start_ldv_set_is_empty_#res#1| 0))} is VALID [2022-02-20 21:56:51,610 INFO L290 TraceCheckUtils]: 42: Hoare triple {12993#(not (= |ULTIMATE.start_ldv_set_is_empty_#res#1| 0))} ldv_check_final_state_#t~ret1091#1 := ldv_set_is_empty_#res#1;assume { :end_inline_ldv_set_is_empty } true;assume -2147483648 <= ldv_check_final_state_#t~ret1091#1 && ldv_check_final_state_#t~ret1091#1 <= 2147483647;ldv_check_final_state_~tmp___7~9#1 := ldv_check_final_state_#t~ret1091#1;havoc ldv_check_final_state_#t~ret1091#1; {12994#(not (= |ULTIMATE.start_ldv_check_final_state_~tmp___7~9#1| 0))} is VALID [2022-02-20 21:56:51,610 INFO L290 TraceCheckUtils]: 43: Hoare triple {12994#(not (= |ULTIMATE.start_ldv_check_final_state_~tmp___7~9#1| 0))} assume !(0 != ldv_check_final_state_~tmp___7~9#1); {12975#false} is VALID [2022-02-20 21:56:51,611 INFO L272 TraceCheckUtils]: 44: Hoare triple {12975#false} call ldv_error(); {12975#false} is VALID [2022-02-20 21:56:51,611 INFO L290 TraceCheckUtils]: 45: Hoare triple {12975#false} assume !false; {12975#false} is VALID [2022-02-20 21:56:51,611 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-02-20 21:56:51,612 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:56:51,612 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [667012467] [2022-02-20 21:56:51,612 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [667012467] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:56:51,613 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:56:51,613 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 21:56:51,613 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801956335] [2022-02-20 21:56:51,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:56:51,614 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 4.666666666666667) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 46 [2022-02-20 21:56:51,614 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:56:51,615 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 4.666666666666667) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:51,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:56:51,683 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 21:56:51,684 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:56:51,684 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 21:56:51,684 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-02-20 21:56:51,685 INFO L87 Difference]: Start difference. First operand 2174 states and 3231 transitions. Second operand has 6 states, 6 states have (on average 4.666666666666667) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-02-20 21:56:56,244 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers []