./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f37e3824e515882c7bcf8c367d3f56b0297fad2493f001664c6f9188e65f0eab --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:44:17,814 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:44:17,815 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:44:17,841 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:44:17,844 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:44:17,847 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:44:17,849 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:44:17,854 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:44:17,856 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:44:17,860 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:44:17,861 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:44:17,862 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:44:17,862 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:44:17,865 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:44:17,866 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:44:17,868 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:44:17,869 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:44:17,870 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:44:17,873 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:44:17,880 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:44:17,881 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:44:17,888 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:44:17,889 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:44:17,890 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:44:17,894 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:44:17,894 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:44:17,894 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:44:17,896 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:44:17,896 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:44:17,897 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:44:17,898 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:44:17,898 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:44:17,900 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:44:17,901 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:44:17,902 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:44:17,902 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:44:17,903 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:44:17,903 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:44:17,903 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:44:17,904 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:44:17,904 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:44:17,905 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:44:17,940 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:44:17,941 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:44:17,942 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:44:17,942 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:44:17,943 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:44:17,943 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:44:17,943 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:44:17,944 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:44:17,944 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:44:17,944 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:44:17,945 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:44:17,945 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:44:17,945 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:44:17,945 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:44:17,946 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:44:17,946 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:44:17,946 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:44:17,946 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:44:17,946 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:44:17,947 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:44:17,947 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:44:17,947 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:44:17,947 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:44:17,948 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:44:17,948 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:44:17,948 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:44:17,948 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:44:17,948 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:44:17,948 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:44:17,949 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:44:17,949 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f37e3824e515882c7bcf8c367d3f56b0297fad2493f001664c6f9188e65f0eab [2022-02-20 21:44:18,132 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:44:18,152 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:44:18,156 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:44:18,158 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:44:18,159 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:44:18,160 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i [2022-02-20 21:44:18,224 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/187fd1346/98b51aade94a413f9cb6b28be9c83220/FLAG356b63ecb [2022-02-20 21:44:18,825 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:44:18,826 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i [2022-02-20 21:44:18,863 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/187fd1346/98b51aade94a413f9cb6b28be9c83220/FLAG356b63ecb [2022-02-20 21:44:19,181 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/187fd1346/98b51aade94a413f9cb6b28be9c83220 [2022-02-20 21:44:19,183 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:44:19,184 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:44:19,186 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:44:19,186 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:44:19,188 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:44:19,189 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:44:19" (1/1) ... [2022-02-20 21:44:19,190 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@50a4f8a7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:19, skipping insertion in model container [2022-02-20 21:44:19,190 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:44:19" (1/1) ... [2022-02-20 21:44:19,194 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:44:19,269 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:44:20,493 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i[213319,213332] [2022-02-20 21:44:20,586 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:44:20,612 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:44:20,926 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i[213319,213332] [2022-02-20 21:44:20,948 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:44:21,015 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:44:21,015 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21 WrapperNode [2022-02-20 21:44:21,016 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:44:21,018 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:44:21,018 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:44:21,018 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:44:21,023 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,094 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,252 INFO L137 Inliner]: procedures = 269, calls = 1577, calls flagged for inlining = 115, calls inlined = 90, statements flattened = 3691 [2022-02-20 21:44:21,253 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:44:21,254 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:44:21,254 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:44:21,254 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:44:21,260 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,260 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,280 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,280 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,353 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,372 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,393 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,415 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:44:21,417 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:44:21,417 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:44:21,417 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:44:21,418 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,438 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:44:21,446 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:44:21,461 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:44:21,483 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:44:21,496 INFO L130 BoogieDeclarations]: Found specification of procedure free_hba [2022-02-20 21:44:21,497 INFO L138 BoogieDeclarations]: Found implementation of procedure free_hba [2022-02-20 21:44:21,497 INFO L130 BoogieDeclarations]: Found specification of procedure smart1_submit_command [2022-02-20 21:44:21,497 INFO L138 BoogieDeclarations]: Found implementation of procedure smart1_submit_command [2022-02-20 21:44:21,497 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unregister_driver [2022-02-20 21:44:21,497 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unregister_driver [2022-02-20 21:44:21,497 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 [2022-02-20 21:44:21,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~X~int~X~int~X~$Pointer$~TO~~dma_addr_t~0 [2022-02-20 21:44:21,497 INFO L130 BoogieDeclarations]: Found specification of procedure cpqarray_remove_one [2022-02-20 21:44:21,498 INFO L138 BoogieDeclarations]: Found implementation of procedure cpqarray_remove_one [2022-02-20 21:44:21,498 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_cpqarray_hba [2022-02-20 21:44:21,498 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_cpqarray_hba [2022-02-20 21:44:21,498 INFO L130 BoogieDeclarations]: Found specification of procedure smart4_intr_mask [2022-02-20 21:44:21,498 INFO L138 BoogieDeclarations]: Found implementation of procedure smart4_intr_mask [2022-02-20 21:44:21,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:44:21,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:44:21,499 INFO L130 BoogieDeclarations]: Found specification of procedure add_disk [2022-02-20 21:44:21,499 INFO L138 BoogieDeclarations]: Found implementation of procedure add_disk [2022-02-20 21:44:21,499 INFO L130 BoogieDeclarations]: Found specification of procedure smart2_completed [2022-02-20 21:44:21,499 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2_completed [2022-02-20 21:44:21,499 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_byte [2022-02-20 21:44:21,499 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_byte [2022-02-20 21:44:21,499 INFO L130 BoogieDeclarations]: Found specification of procedure smart4_intr_pending [2022-02-20 21:44:21,499 INFO L138 BoogieDeclarations]: Found implementation of procedure smart4_intr_pending [2022-02-20 21:44:21,500 INFO L130 BoogieDeclarations]: Found specification of procedure smart2e_intr_mask [2022-02-20 21:44:21,500 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2e_intr_mask [2022-02-20 21:44:21,500 INFO L130 BoogieDeclarations]: Found specification of procedure kmemcheck_mark_initialized [2022-02-20 21:44:21,500 INFO L138 BoogieDeclarations]: Found implementation of procedure kmemcheck_mark_initialized [2022-02-20 21:44:21,500 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-02-20 21:44:21,500 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-02-20 21:44:21,500 INFO L130 BoogieDeclarations]: Found specification of procedure del_gendisk [2022-02-20 21:44:21,500 INFO L138 BoogieDeclarations]: Found implementation of procedure del_gendisk [2022-02-20 21:44:21,500 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2022-02-20 21:44:21,501 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2022-02-20 21:44:21,501 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:44:21,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:44:21,501 INFO L130 BoogieDeclarations]: Found specification of procedure pci_map_single [2022-02-20 21:44:21,501 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_map_single [2022-02-20 21:44:21,501 INFO L130 BoogieDeclarations]: Found specification of procedure set_capacity [2022-02-20 21:44:21,501 INFO L138 BoogieDeclarations]: Found implementation of procedure set_capacity [2022-02-20 21:44:21,501 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 21:44:21,501 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 21:44:21,502 INFO L130 BoogieDeclarations]: Found specification of procedure start_io [2022-02-20 21:44:21,502 INFO L138 BoogieDeclarations]: Found implementation of procedure start_io [2022-02-20 21:44:21,502 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_cpqarray_mutex [2022-02-20 21:44:21,502 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_cpqarray_mutex [2022-02-20 21:44:21,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 21:44:21,502 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 21:44:21,502 INFO L130 BoogieDeclarations]: Found specification of procedure smart1_completed [2022-02-20 21:44:21,502 INFO L138 BoogieDeclarations]: Found implementation of procedure smart1_completed [2022-02-20 21:44:21,503 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_cpqarray_mutex [2022-02-20 21:44:21,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_cpqarray_mutex [2022-02-20 21:44:21,503 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-02-20 21:44:21,503 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-02-20 21:44:21,503 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock [2022-02-20 21:44:21,504 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock [2022-02-20 21:44:21,504 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~int~TO~VOID [2022-02-20 21:44:21,504 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~int~TO~VOID [2022-02-20 21:44:21,505 INFO L130 BoogieDeclarations]: Found specification of procedure cmd_free [2022-02-20 21:44:21,505 INFO L138 BoogieDeclarations]: Found implementation of procedure cmd_free [2022-02-20 21:44:21,505 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_unmap_page [2022-02-20 21:44:21,506 INFO L138 BoogieDeclarations]: Found implementation of procedure debug_dma_unmap_page [2022-02-20 21:44:21,506 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-02-20 21:44:21,506 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-02-20 21:44:21,506 INFO L130 BoogieDeclarations]: Found specification of procedure smart4_completed [2022-02-20 21:44:21,506 INFO L138 BoogieDeclarations]: Found implementation of procedure smart4_completed [2022-02-20 21:44:21,506 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc [2022-02-20 21:44:21,506 INFO L138 BoogieDeclarations]: Found implementation of procedure __kmalloc [2022-02-20 21:44:21,506 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:44:21,506 INFO L130 BoogieDeclarations]: Found specification of procedure smart2e_fifo_full [2022-02-20 21:44:21,507 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2e_fifo_full [2022-02-20 21:44:21,507 INFO L130 BoogieDeclarations]: Found specification of procedure release_io_mem [2022-02-20 21:44:21,507 INFO L138 BoogieDeclarations]: Found implementation of procedure release_io_mem [2022-02-20 21:44:21,507 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:44:21,508 INFO L130 BoogieDeclarations]: Found specification of procedure pci_get_drvdata [2022-02-20 21:44:21,508 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_get_drvdata [2022-02-20 21:44:21,508 INFO L130 BoogieDeclarations]: Found specification of procedure remove_proc_entry [2022-02-20 21:44:21,508 INFO L138 BoogieDeclarations]: Found implementation of procedure remove_proc_entry [2022-02-20 21:44:21,508 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2022-02-20 21:44:21,508 INFO L138 BoogieDeclarations]: Found implementation of procedure add_timer [2022-02-20 21:44:21,508 INFO L130 BoogieDeclarations]: Found specification of procedure smart2_intr_pending [2022-02-20 21:44:21,508 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2_intr_pending [2022-02-20 21:44:21,508 INFO L130 BoogieDeclarations]: Found specification of procedure blk_queue_logical_block_size [2022-02-20 21:44:21,508 INFO L138 BoogieDeclarations]: Found implementation of procedure blk_queue_logical_block_size [2022-02-20 21:44:21,509 INFO L130 BoogieDeclarations]: Found specification of procedure sendcmd [2022-02-20 21:44:21,509 INFO L138 BoogieDeclarations]: Found implementation of procedure sendcmd [2022-02-20 21:44:21,509 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 21:44:21,509 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 21:44:21,509 INFO L130 BoogieDeclarations]: Found specification of procedure get_drv [2022-02-20 21:44:21,509 INFO L138 BoogieDeclarations]: Found implementation of procedure get_drv [2022-02-20 21:44:21,510 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2022-02-20 21:44:21,510 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2022-02-20 21:44:21,510 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:44:21,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:44:21,510 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2022-02-20 21:44:21,510 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2022-02-20 21:44:21,511 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2022-02-20 21:44:21,511 INFO L138 BoogieDeclarations]: Found implementation of procedure capable [2022-02-20 21:44:21,511 INFO L130 BoogieDeclarations]: Found specification of procedure ida_revalidate [2022-02-20 21:44:21,511 INFO L138 BoogieDeclarations]: Found implementation of procedure ida_revalidate [2022-02-20 21:44:21,512 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 21:44:21,512 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 21:44:21,512 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2022-02-20 21:44:21,512 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2022-02-20 21:44:21,512 INFO L130 BoogieDeclarations]: Found specification of procedure smart2_submit_command [2022-02-20 21:44:21,512 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2_submit_command [2022-02-20 21:44:21,512 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-02-20 21:44:21,513 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-02-20 21:44:21,513 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-02-20 21:44:21,513 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-02-20 21:44:21,513 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure cpqarray_register_ctlr [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure cpqarray_register_ctlr [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure ida_ioctl [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure ida_ioctl [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure cmd_alloc [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure cmd_alloc [2022-02-20 21:44:21,561 INFO L130 BoogieDeclarations]: Found specification of procedure smart2_fifo_full [2022-02-20 21:44:21,561 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2_fifo_full [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure smart2e_intr_pending [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2e_intr_pending [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure smart1_fifo_full [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure smart1_fifo_full [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure smart2e_submit_command [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2e_submit_command [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure smart1_intr_pending [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure smart1_intr_pending [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure get_host [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure get_host [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure smart4_submit_command [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure smart4_submit_command [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_blkdev [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_blkdev [2022-02-20 21:44:21,562 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2022-02-20 21:44:21,562 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2022-02-20 21:44:21,563 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:44:21,563 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2022-02-20 21:44:21,563 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2022-02-20 21:44:21,564 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_drvdata [2022-02-20 21:44:21,564 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_drvdata [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure removeQ [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure removeQ [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure smart1_intr_mask [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure smart1_intr_mask [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure PTR_ERR [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure PTR_ERR [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~X~$Pointer$~TO~VOID [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~dma_addr_t~0~X~int~X~int~X~$Pointer$~TO~VOID [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_map_page [2022-02-20 21:44:21,565 INFO L138 BoogieDeclarations]: Found implementation of procedure debug_dma_map_page [2022-02-20 21:44:21,565 INFO L130 BoogieDeclarations]: Found specification of procedure smart2_intr_mask [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2_intr_mask [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure getgeometry [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure getgeometry [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure ida_getgeo [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure ida_getgeo [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure put_disk [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure put_disk [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure smart4_fifo_full [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure smart4_fifo_full [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure memdup_user [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure memdup_user [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-02-20 21:44:21,566 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-02-20 21:44:21,566 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-02-20 21:44:21,567 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-02-20 21:44:21,567 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~VOID [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~VOID [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure __request_region [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure __request_region [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure smart2e_completed [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure smart2e_completed [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure addQ [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure addQ [2022-02-20 21:44:21,568 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-02-20 21:44:21,568 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-02-20 21:44:22,155 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:44:22,157 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:44:24,501 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:44:24,514 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:44:24,515 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:44:24,532 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:44:24 BoogieIcfgContainer [2022-02-20 21:44:24,532 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:44:24,534 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:44:24,534 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:44:24,536 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:44:24,536 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:44:19" (1/3) ... [2022-02-20 21:44:24,537 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c396b14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:44:24, skipping insertion in model container [2022-02-20 21:44:24,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (2/3) ... [2022-02-20 21:44:24,537 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c396b14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:44:24, skipping insertion in model container [2022-02-20 21:44:24,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:44:24" (3/3) ... [2022-02-20 21:44:24,538 INFO L111 eAbstractionObserver]: Analyzing ICFG 32_7a_cilled_linux-3.8-rc1-drivers--block--cpqarray.ko-main.cil.out.i [2022-02-20 21:44:24,542 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:44:24,542 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:44:24,577 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:44:24,581 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:44:24,582 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:44:24,625 INFO L276 IsEmpty]: Start isEmpty. Operand has 1365 states, 984 states have (on average 1.3556910569105691) internal successors, (1334), 1011 states have internal predecessors, (1334), 284 states have call successors, (284), 95 states have call predecessors, (284), 95 states have return successors, (284), 278 states have call predecessors, (284), 284 states have call successors, (284) [2022-02-20 21:44:24,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-02-20 21:44:24,632 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:24,632 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:24,633 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:24,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:24,638 INFO L85 PathProgramCache]: Analyzing trace with hash 1553813294, now seen corresponding path program 1 times [2022-02-20 21:44:24,645 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:24,645 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250870745] [2022-02-20 21:44:24,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:24,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:24,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:25,071 INFO L290 TraceCheckUtils]: 0: Hoare triple {1368#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(70, 2);call #Ultimate.allocInit(125, 3);call #Ultimate.allocInit(124, 4);call #Ultimate.allocInit(27, 5);call #Ultimate.allocInit(25, 6);call #Ultimate.allocInit(15, 7);call #Ultimate.allocInit(4, 8);call write~init~int(73, 8, 0, 1);call write~init~int(68, 8, 1, 1);call write~init~int(65, 8, 2, 1);call write~init~int(0, 8, 3, 1);call #Ultimate.allocInit(6, 9);call write~init~int(73, 9, 0, 1);call write~init~int(68, 9, 1, 1);call write~init~int(65, 9, 2, 1);call write~init~int(45, 9, 3, 1);call write~init~int(50, 9, 4, 1);call write~init~int(0, 9, 5, 1);call #Ultimate.allocInit(5, 10);call write~init~int(73, 10, 0, 1);call write~init~int(65, 10, 1, 1);call write~init~int(69, 10, 2, 1);call write~init~int(83, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(6, 11);call write~init~int(83, 11, 0, 1);call write~init~int(77, 11, 1, 1);call write~init~int(65, 11, 2, 1);call write~init~int(82, 11, 3, 1);call write~init~int(84, 11, 4, 1);call write~init~int(0, 11, 5, 1);call #Ultimate.allocInit(10, 12);call #Ultimate.allocInit(10, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(16, 19);call #Ultimate.allocInit(17, 20);call #Ultimate.allocInit(19, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(16, 23);call #Ultimate.allocInit(304, 24);call #Ultimate.allocInit(21, 25);call #Ultimate.allocInit(33, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(37, 29);call #Ultimate.allocInit(63, 30);call #Ultimate.allocInit(63, 31);call #Ultimate.allocInit(40, 32);call #Ultimate.allocInit(32, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(17, 35);call #Ultimate.allocInit(11, 36);call #Ultimate.allocInit(25, 37);call #Ultimate.allocInit(64, 38);call #Ultimate.allocInit(6, 39);call write~init~int(105, 39, 0, 1);call write~init~int(100, 39, 1, 1);call write~init~int(97, 39, 2, 1);call write~init~int(37, 39, 3, 1);call write~init~int(100, 39, 4, 1);call write~init~int(0, 39, 5, 1);call #Ultimate.allocInit(9, 40);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(9, 42);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(61, 44);call #Ultimate.allocInit(40, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(46, 47);call #Ultimate.allocInit(9, 48);call #Ultimate.allocInit(65, 49);call #Ultimate.allocInit(79, 50);call #Ultimate.allocInit(79, 51);call #Ultimate.allocInit(9, 52);call #Ultimate.allocInit(61, 53);call #Ultimate.allocInit(6, 54);call write~init~int(105, 54, 0, 1);call write~init~int(100, 54, 1, 1);call write~init~int(97, 54, 2, 1);call write~init~int(37, 54, 3, 1);call write~init~int(100, 54, 4, 1);call write~init~int(0, 54, 5, 1);call #Ultimate.allocInit(46, 55);call #Ultimate.allocInit(32, 56);call #Ultimate.allocInit(28, 57);call #Ultimate.allocInit(71, 58);call #Ultimate.allocInit(40, 59);call #Ultimate.allocInit(52, 60);call #Ultimate.allocInit(79, 61);call #Ultimate.allocInit(79, 62);call #Ultimate.allocInit(101, 63);call #Ultimate.allocInit(59, 64);call #Ultimate.allocInit(54, 65);call #Ultimate.allocInit(66, 66);call #Ultimate.allocInit(50, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(28, 69);call #Ultimate.allocInit(28, 70);call #Ultimate.allocInit(28, 71);call #Ultimate.allocInit(40, 72);call #Ultimate.allocInit(7, 73);call write~init~int(32, 73, 0, 1);call write~init~int(40, 73, 1, 1);call write~init~int(37, 73, 2, 1);call write~init~int(115, 73, 3, 1);call write~init~int(41, 73, 4, 1);call write~init~int(10, 73, 5, 1);call write~init~int(0, 73, 6, 1);call #Ultimate.allocInit(117, 74);call #Ultimate.allocInit(134, 75);call #Ultimate.allocInit(43, 76);call #Ultimate.allocInit(39, 77);call #Ultimate.allocInit(40, 78);call #Ultimate.allocInit(16, 79);~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~#smart4_access~0.base, ~#smart4_access~0.offset := 80, 0;call #Ultimate.allocInit(40, 80);call write~init~$Pointer$(#funAddr~smart4_submit_command.base, #funAddr~smart4_submit_command.offset, ~#smart4_access~0.base, ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_mask.base, #funAddr~smart4_intr_mask.offset, ~#smart4_access~0.base, 8 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_fifo_full.base, #funAddr~smart4_fifo_full.offset, ~#smart4_access~0.base, 16 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_pending.base, #funAddr~smart4_intr_pending.offset, ~#smart4_access~0.base, 24 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_completed.base, #funAddr~smart4_completed.offset, ~#smart4_access~0.base, 32 + ~#smart4_access~0.offset, 8);~#smart2_access~0.base, ~#smart2_access~0.offset := 81, 0;call #Ultimate.allocInit(40, 81);call write~init~$Pointer$(#funAddr~smart2_submit_command.base, #funAddr~smart2_submit_command.offset, ~#smart2_access~0.base, ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_mask.base, #funAddr~smart2_intr_mask.offset, ~#smart2_access~0.base, 8 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_fifo_full.base, #funAddr~smart2_fifo_full.offset, ~#smart2_access~0.base, 16 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_pending.base, #funAddr~smart2_intr_pending.offset, ~#smart2_access~0.base, 24 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_completed.base, #funAddr~smart2_completed.offset, ~#smart2_access~0.base, 32 + ~#smart2_access~0.offset, 8);~#smart2e_access~0.base, ~#smart2e_access~0.offset := 82, 0;call #Ultimate.allocInit(40, 82);call write~init~$Pointer$(#funAddr~smart2e_submit_command.base, #funAddr~smart2e_submit_command.offset, ~#smart2e_access~0.base, ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_mask.base, #funAddr~smart2e_intr_mask.offset, ~#smart2e_access~0.base, 8 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_fifo_full.base, #funAddr~smart2e_fifo_full.offset, ~#smart2e_access~0.base, 16 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_pending.base, #funAddr~smart2e_intr_pending.offset, ~#smart2e_access~0.base, 24 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_completed.base, #funAddr~smart2e_completed.offset, ~#smart2e_access~0.base, 32 + ~#smart2e_access~0.offset, 8);~#smart1_access~0.base, ~#smart1_access~0.offset := 83, 0;call #Ultimate.allocInit(40, 83);call write~init~$Pointer$(#funAddr~smart1_submit_command.base, #funAddr~smart1_submit_command.offset, ~#smart1_access~0.base, ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_mask.base, #funAddr~smart1_intr_mask.offset, ~#smart1_access~0.base, 8 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_fifo_full.base, #funAddr~smart1_fifo_full.offset, ~#smart1_access~0.base, 16 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_pending.base, #funAddr~smart1_intr_pending.offset, ~#smart1_access~0.base, 24 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_completed.base, #funAddr~smart1_completed.offset, ~#smart1_access~0.base, 32 + ~#smart1_access~0.offset, 8);~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset := 84, 0;call #Ultimate.allocInit(156, 84);call write~init~int(1, ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 4 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(3735899821, ~#cpqarray_mutex~0.base, 8 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(4294967295, ~#cpqarray_mutex~0.base, 12 + ~#cpqarray_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#cpqarray_mutex~0.base, 16 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 24 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 32 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 40 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(6, 0, ~#cpqarray_mutex~0.base, 48 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 56 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 60 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 80 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 88 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 96 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 104 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 112 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 120 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 128 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(7, 0, ~#cpqarray_mutex~0.base, 136 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 144 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 148 + ~#cpqarray_mutex~0.offset, 8);~nr_ctlr~0 := 0;~#hba~0.base, ~#hba~0.offset := 85, 0;call #Ultimate.allocInit(64, 85);call write~init~$Pointer$(0, 0, ~#hba~0.base, ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 8 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 16 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 24 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 32 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 40 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 48 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 56 + ~#hba~0.offset, 8);~#eisa~0.base, ~#eisa~0.offset := 86, 0;call #Ultimate.allocInit(32, 86);call write~init~int(0, ~#eisa~0.base, ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 4 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 8 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 12 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 16 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 20 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 24 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 28 + ~#eisa~0.offset, 4);~#products~0.base, ~#products~0.offset := 87, 0;call #Ultimate.allocInit(300, 87);call write~init~int(4198670, ~#products~0.base, ~#products~0.offset, 4);call write~init~$Pointer$(8, 0, ~#products~0.base, 4 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 12 + ~#products~0.offset, 8);call write~init~int(20975886, ~#products~0.base, 20 + ~#products~0.offset, 4);call write~init~$Pointer$(9, 0, ~#products~0.base, 24 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 32 + ~#products~0.offset, 8);call write~init~int(272634126, ~#products~0.base, 40 + ~#products~0.offset, 4);call write~init~$Pointer$(10, 0, ~#products~0.base, 44 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 52 + ~#products~0.offset, 8);call write~init~int(541069582, ~#products~0.base, 60 + ~#products~0.offset, 4);call write~init~$Pointer$(11, 0, ~#products~0.base, 64 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 72 + ~#products~0.offset, 8);call write~init~int(809505038, ~#products~0.base, 80 + ~#products~0.offset, 4);call write~init~$Pointer$(12, 0, ~#products~0.base, 84 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2e_access~0.base, ~#smart2e_access~0.offset, ~#products~0.base, 92 + ~#products~0.offset, 8);call write~init~int(1076891153, ~#products~0.base, 100 + ~#products~0.offset, 4);call write~init~$Pointer$(13, 0, ~#products~0.base, 104 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 112 + ~#products~0.offset, 8);call write~init~int(1076956689, ~#products~0.base, 120 + ~#products~0.offset, 4);call write~init~$Pointer$(14, 0, ~#products~0.base, 124 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 132 + ~#products~0.offset, 8);call write~init~int(1077022225, ~#products~0.base, 140 + ~#products~0.offset, 4);call write~init~$Pointer$(15, 0, ~#products~0.base, 144 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 152 + ~#products~0.offset, 8);call write~init~int(1077087761, ~#products~0.base, 160 + ~#products~0.offset, 4);call write~init~$Pointer$(16, 0, ~#products~0.base, 164 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 172 + ~#products~0.offset, 8);call write~init~int(1077153297, ~#products~0.base, 180 + ~#products~0.offset, 4);call write~init~$Pointer$(17, 0, ~#products~0.base, 184 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 192 + ~#products~0.offset, 8);call write~init~int(1077939729, ~#products~0.base, 200 + ~#products~0.offset, 4);call write~init~$Pointer$(18, 0, ~#products~0.base, 204 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 212 + ~#products~0.offset, 8);call write~init~int(1078464017, ~#products~0.base, 220 + ~#products~0.offset, 4);call write~init~$Pointer$(19, 0, ~#products~0.base, 224 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 232 + ~#products~0.offset, 8);call write~init~int(1078988305, ~#products~0.base, 240 + ~#products~0.offset, 4);call write~init~$Pointer$(20, 0, ~#products~0.base, 244 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 252 + ~#products~0.offset, 8);call write~init~int(1079053841, ~#products~0.base, 260 + ~#products~0.offset, 4);call write~init~$Pointer$(21, 0, ~#products~0.base, 264 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 272 + ~#products~0.offset, 8);call write~init~int(1079512593, ~#products~0.base, 280 + ~#products~0.offset, 4);call write~init~$Pointer$(22, 0, ~#products~0.base, 284 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 292 + ~#products~0.offset, 8);~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset := 88, 0;call #Ultimate.allocInit(352, 88);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 4 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 8 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16472, ~#cpqarray_pci_device_id~0.base, 12 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 16 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 20 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 24 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 32 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 36 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 40 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16465, ~#cpqarray_pci_device_id~0.base, 44 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 48 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 52 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 56 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 64 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 68 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 72 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16464, ~#cpqarray_pci_device_id~0.base, 76 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 80 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 84 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 88 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 96 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 100 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 104 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16456, ~#cpqarray_pci_device_id~0.base, 108 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 112 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 116 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 120 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 128 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 132 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 136 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16448, ~#cpqarray_pci_device_id~0.base, 140 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 144 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 148 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 152 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 160 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 164 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 168 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16436, ~#cpqarray_pci_device_id~0.base, 172 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 176 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 180 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 184 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 192 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 196 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 200 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16435, ~#cpqarray_pci_device_id~0.base, 204 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 208 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 212 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 216 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 224 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 228 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 232 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16434, ~#cpqarray_pci_device_id~0.base, 236 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 240 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 244 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 248 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 256 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 260 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 264 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16433, ~#cpqarray_pci_device_id~0.base, 268 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 272 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 276 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 280 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 288 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 292 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 296 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16432, ~#cpqarray_pci_device_id~0.base, 300 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 304 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 308 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 312 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 320 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 324 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 328 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 332 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 336 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 340 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 344 + ~#cpqarray_pci_device_id~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#ida_gendisk~0.base, ~#ida_gendisk~0.offset := 89, 0;call #Ultimate.allocInit(1024, 89);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base);~#ida_fops~0.base, ~#ida_fops~0.offset := 90, 0;call #Ultimate.allocInit(96, 90);call write~init~$Pointer$(#funAddr~ida_unlocked_open.base, #funAddr~ida_unlocked_open.offset, ~#ida_fops~0.base, ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_release.base, #funAddr~ida_release.offset, ~#ida_fops~0.base, 8 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_ioctl.base, #funAddr~ida_ioctl.offset, ~#ida_fops~0.base, 16 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 24 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 32 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 40 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 48 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 56 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_revalidate.base, #funAddr~ida_revalidate.offset, ~#ida_fops~0.base, 64 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_getgeo.base, #funAddr~ida_getgeo.offset, ~#ida_fops~0.base, 72 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 80 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_fops~0.base, 88 + ~#ida_fops~0.offset, 8);~proc_array~0.base, ~proc_array~0.offset := 0, 0;~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset := 91, 0;call #Ultimate.allocInit(216, 91);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_lseek.base, #funAddr~seq_lseek.offset, ~#ida_proc_fops~0.base, 8 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_read.base, #funAddr~seq_read.offset, ~#ida_proc_fops~0.base, 16 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 24 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 32 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 40 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 48 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 56 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 64 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 72 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 80 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_proc_open.base, #funAddr~ida_proc_open.offset, ~#ida_proc_fops~0.base, 88 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 96 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~single_release.base, #funAddr~single_release.offset, ~#ida_proc_fops~0.base, 104 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 112 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 120 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 128 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 136 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 144 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 152 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 160 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 168 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 176 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 184 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 192 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 200 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 208 + ~#ida_proc_fops~0.offset, 8);~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset := 92, 0;call #Ultimate.allocInit(301, 92);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 8 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(40, 0, ~#cpqarray_pci_driver~0.base, 16 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, ~#cpqarray_pci_driver~0.base, 24 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_init_one.base, #funAddr~cpqarray_init_one.offset, ~#cpqarray_pci_driver~0.base, 32 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_remove_one_pci.base, #funAddr~cpqarray_remove_one_pci.offset, ~#cpqarray_pci_driver~0.base, 40 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 48 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 56 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 64 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 72 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 80 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 88 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 96 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 104 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 112 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 120 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 128 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 136 + ~#cpqarray_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 137 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 145 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 153 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 161 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 169 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 177 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 185 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 193 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 201 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 209 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 217 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 221 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 225 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 229 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 237 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 245 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 253 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 261 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 269 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 273 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 285 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 293 + ~#cpqarray_pci_driver~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg32~0.base, ~ldvarg32~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg23~0 := 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg1~0 := 0;~ldvarg37~0.base, ~ldvarg37~0.offset := 0, 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg29~0.base, ~ldvarg29~0.offset := 0, 0;~ldvarg24~0.base, ~ldvarg24~0.offset := 0, 0;~ldvarg35~0.base, ~ldvarg35~0.offset := 0, 0;~ida_fops_group0~0.base, ~ida_fops_group0~0.offset := 0, 0;~ida_proc_fops_group1~0.base, ~ida_proc_fops_group1~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg38~0.base, ~ldvarg38~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0.base, ~ldvarg33~0.offset := 0, 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg14~0 := 0;~ldvarg4~0.base, ~ldvarg4~0.offset := 0, 0;~ldvarg34~0 := 0;~ldvarg28~0.base, ~ldvarg28~0.offset := 0, 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldvarg39~0.base, ~ldvarg39~0.offset := 0, 0;~ldvarg31~0.base, ~ldvarg31~0.offset := 0, 0;~ldvarg20~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~ldvarg36~0.base, ~ldvarg36~0.offset := 0, 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~cpqarray_pci_driver_group0~0.base, ~cpqarray_pci_driver_group0~0.offset := 0, 0;~ida_proc_fops_group2~0.base, ~ida_proc_fops_group2~0.offset := 0, 0;~ldvarg27~0 := 0;~ldvarg26~0.base, ~ldvarg26~0.offset := 0, 0;~ldvarg30~0.base, ~ldvarg30~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg21~0 := 0;~ida_fops_group1~0.base, ~ida_fops_group1~0.offset := 0, 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg17~0.base, ~ldvarg17~0.offset := 0, 0;~ldvarg22~0.base, ~ldvarg22~0.offset := 0, 0;~ldvarg19~0.base, ~ldvarg19~0.offset := 0, 0;~ldv_retval_3~0 := 0;~ldv_mutex_cpqarray_mutex~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {1368#true} is VALID [2022-02-20 21:44:25,074 INFO L290 TraceCheckUtils]: 1: Hoare triple {1368#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet964#1, main_#t~switch965#1, main_#t~nondet966#1, main_#t~switch967#1, main_#t~ret968#1, main_#t~ret969#1, main_#t~ret970#1, main_#t~nondet971#1, main_#t~switch972#1, main_#t~ret973#1, main_#t~ret974#1, main_#t~ret975#1, main_#t~ret976#1, main_#t~ret977#1, main_#t~ret978#1, main_#t~ret979#1, main_#t~ret980#1, main_#t~nondet981#1, main_#t~switch982#1, main_#t~ret983#1, main_#t~ret984#1, main_#t~ret985#1, main_#t~nondet986#1, main_#t~switch987#1, main_#t~ret988#1, main_#t~ret989#1, main_#t~ret990#1, main_#t~ret991#1, main_#t~nondet992#1, main_#t~switch993#1, main_#t~ret994#1, main_#t~nondet995#1, main_#t~switch996#1, main_#t~ret997#1, main_#t~ret998#1, main_#t~ret999#1, main_#t~nondet1000#1, main_#t~switch1001#1, main_#t~ret1002#1, main_#t~nondet1003#1, main_#t~switch1004#1, main_#t~ret1005#1, main_#t~ret1006#1, main_#t~ret1007#1, main_~tmp~66#1, main_~tmp___0~26#1, main_~tmp___1~17#1, main_~tmp___2~10#1, main_~tmp___3~6#1, main_~tmp___4~3#1, main_~tmp___5~2#1, main_~tmp___6~2#1, main_~tmp___7~2#1;havoc main_~tmp~66#1;havoc main_~tmp___0~26#1;havoc main_~tmp___1~17#1;havoc main_~tmp___2~10#1;havoc main_~tmp___3~6#1;havoc main_~tmp___4~3#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;havoc main_~tmp___7~2#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cpqarray_mutex~0 := 1;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {1368#true} is VALID [2022-02-20 21:44:25,075 INFO L290 TraceCheckUtils]: 2: Hoare triple {1368#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {1370#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:44:25,075 INFO L290 TraceCheckUtils]: 3: Hoare triple {1370#(= ~ldv_state_variable_3~0 0)} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {1370#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:44:25,076 INFO L290 TraceCheckUtils]: 4: Hoare triple {1370#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {1370#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:44:25,077 INFO L290 TraceCheckUtils]: 5: Hoare triple {1370#(= ~ldv_state_variable_3~0 0)} assume main_#t~switch965#1; {1370#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:44:25,078 INFO L290 TraceCheckUtils]: 6: Hoare triple {1370#(= ~ldv_state_variable_3~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet971#1 && main_#t~nondet971#1 <= 2147483647;main_~tmp___1~17#1 := main_#t~nondet971#1;havoc main_#t~nondet971#1;main_#t~switch972#1 := 0 == main_~tmp___1~17#1; {1369#false} is VALID [2022-02-20 21:44:25,079 INFO L290 TraceCheckUtils]: 7: Hoare triple {1369#false} assume main_#t~switch972#1; {1369#false} is VALID [2022-02-20 21:44:25,079 INFO L290 TraceCheckUtils]: 8: Hoare triple {1369#false} assume 2 == ~ldv_state_variable_3~0;assume { :begin_inline_ida_release } true;ida_release_#in~disk#1.base, ida_release_#in~disk#1.offset, ida_release_#in~mode#1 := ~ida_fops_group0~0.base, ~ida_fops_group0~0.offset, ~ldvarg12~0;havoc ida_release_#res#1;havoc ida_release_#t~ret625#1.base, ida_release_#t~ret625#1.offset, ida_release_#t~mem626#1, ida_release_~disk#1.base, ida_release_~disk#1.offset, ida_release_~mode#1, ida_release_~host~1#1.base, ida_release_~host~1#1.offset;ida_release_~disk#1.base, ida_release_~disk#1.offset := ida_release_#in~disk#1.base, ida_release_#in~disk#1.offset;ida_release_~mode#1 := ida_release_#in~mode#1;havoc ida_release_~host~1#1.base, ida_release_~host~1#1.offset;assume { :begin_inline_ldv_mutex_lock_10 } true;ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset := ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset;havoc ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset;ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset := ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset; {1369#false} is VALID [2022-02-20 21:44:25,079 INFO L272 TraceCheckUtils]: 9: Hoare triple {1369#false} call ldv_mutex_lock_cpqarray_mutex(ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset); {1369#false} is VALID [2022-02-20 21:44:25,079 INFO L290 TraceCheckUtils]: 10: Hoare triple {1369#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {1369#false} is VALID [2022-02-20 21:44:25,080 INFO L290 TraceCheckUtils]: 11: Hoare triple {1369#false} assume !(1 == ~ldv_mutex_cpqarray_mutex~0); {1369#false} is VALID [2022-02-20 21:44:25,080 INFO L272 TraceCheckUtils]: 12: Hoare triple {1369#false} call ldv_error(); {1369#false} is VALID [2022-02-20 21:44:25,081 INFO L290 TraceCheckUtils]: 13: Hoare triple {1369#false} assume !false; {1369#false} is VALID [2022-02-20 21:44:25,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:25,083 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:25,083 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250870745] [2022-02-20 21:44:25,084 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [250870745] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:25,084 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:25,084 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:25,085 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1627142570] [2022-02-20 21:44:25,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:25,090 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-02-20 21:44:25,092 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:25,094 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:25,131 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:25,131 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:25,132 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:25,151 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:25,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:25,161 INFO L87 Difference]: Start difference. First operand has 1365 states, 984 states have (on average 1.3556910569105691) internal successors, (1334), 1011 states have internal predecessors, (1334), 284 states have call successors, (284), 95 states have call predecessors, (284), 95 states have return successors, (284), 278 states have call predecessors, (284), 284 states have call successors, (284) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:29,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:29,921 INFO L93 Difference]: Finished difference Result 3712 states and 5261 transitions. [2022-02-20 21:44:29,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:29,922 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-02-20 21:44:29,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:29,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:30,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5261 transitions. [2022-02-20 21:44:30,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:30,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5261 transitions. [2022-02-20 21:44:30,207 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 5261 transitions. [2022-02-20 21:44:33,966 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5261 edges. 5261 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:34,369 INFO L225 Difference]: With dead ends: 3712 [2022-02-20 21:44:34,370 INFO L226 Difference]: Without dead ends: 2336 [2022-02-20 21:44:34,384 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:34,388 INFO L933 BasicCegarLoop]: 2122 mSDtfsCounter, 1335 mSDsluCounter, 1850 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1335 SdHoareTripleChecker+Valid, 3972 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:34,389 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1335 Valid, 3972 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:34,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2336 states. [2022-02-20 21:44:34,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2336 to 2324. [2022-02-20 21:44:34,560 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:34,580 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2336 states. Second operand has 2324 states, 1681 states have (on average 1.3337299226650803) internal successors, (2242), 1723 states have internal predecessors, (2242), 474 states have call successors, (474), 169 states have call predecessors, (474), 168 states have return successors, (468), 455 states have call predecessors, (468), 468 states have call successors, (468) [2022-02-20 21:44:34,588 INFO L74 IsIncluded]: Start isIncluded. First operand 2336 states. Second operand has 2324 states, 1681 states have (on average 1.3337299226650803) internal successors, (2242), 1723 states have internal predecessors, (2242), 474 states have call successors, (474), 169 states have call predecessors, (474), 168 states have return successors, (468), 455 states have call predecessors, (468), 468 states have call successors, (468) [2022-02-20 21:44:34,598 INFO L87 Difference]: Start difference. First operand 2336 states. Second operand has 2324 states, 1681 states have (on average 1.3337299226650803) internal successors, (2242), 1723 states have internal predecessors, (2242), 474 states have call successors, (474), 169 states have call predecessors, (474), 168 states have return successors, (468), 455 states have call predecessors, (468), 468 states have call successors, (468) [2022-02-20 21:44:34,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:34,777 INFO L93 Difference]: Finished difference Result 2336 states and 3198 transitions. [2022-02-20 21:44:34,777 INFO L276 IsEmpty]: Start isEmpty. Operand 2336 states and 3198 transitions. [2022-02-20 21:44:34,794 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:34,795 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:34,801 INFO L74 IsIncluded]: Start isIncluded. First operand has 2324 states, 1681 states have (on average 1.3337299226650803) internal successors, (2242), 1723 states have internal predecessors, (2242), 474 states have call successors, (474), 169 states have call predecessors, (474), 168 states have return successors, (468), 455 states have call predecessors, (468), 468 states have call successors, (468) Second operand 2336 states. [2022-02-20 21:44:34,808 INFO L87 Difference]: Start difference. First operand has 2324 states, 1681 states have (on average 1.3337299226650803) internal successors, (2242), 1723 states have internal predecessors, (2242), 474 states have call successors, (474), 169 states have call predecessors, (474), 168 states have return successors, (468), 455 states have call predecessors, (468), 468 states have call successors, (468) Second operand 2336 states. [2022-02-20 21:44:34,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:34,978 INFO L93 Difference]: Finished difference Result 2336 states and 3198 transitions. [2022-02-20 21:44:34,978 INFO L276 IsEmpty]: Start isEmpty. Operand 2336 states and 3198 transitions. [2022-02-20 21:44:34,986 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:34,986 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:34,987 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:34,987 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:34,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2324 states, 1681 states have (on average 1.3337299226650803) internal successors, (2242), 1723 states have internal predecessors, (2242), 474 states have call successors, (474), 169 states have call predecessors, (474), 168 states have return successors, (468), 455 states have call predecessors, (468), 468 states have call successors, (468) [2022-02-20 21:44:35,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 3184 transitions. [2022-02-20 21:44:35,258 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 3184 transitions. Word has length 14 [2022-02-20 21:44:35,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:44:35,258 INFO L470 AbstractCegarLoop]: Abstraction has 2324 states and 3184 transitions. [2022-02-20 21:44:35,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:35,260 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 3184 transitions. [2022-02-20 21:44:35,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-02-20 21:44:35,261 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:35,261 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:35,262 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:44:35,262 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:35,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:35,265 INFO L85 PathProgramCache]: Analyzing trace with hash -1765942261, now seen corresponding path program 1 times [2022-02-20 21:44:35,266 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:35,268 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268347594] [2022-02-20 21:44:35,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:35,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:35,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:35,425 INFO L290 TraceCheckUtils]: 0: Hoare triple {14487#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(70, 2);call #Ultimate.allocInit(125, 3);call #Ultimate.allocInit(124, 4);call #Ultimate.allocInit(27, 5);call #Ultimate.allocInit(25, 6);call #Ultimate.allocInit(15, 7);call #Ultimate.allocInit(4, 8);call write~init~int(73, 8, 0, 1);call write~init~int(68, 8, 1, 1);call write~init~int(65, 8, 2, 1);call write~init~int(0, 8, 3, 1);call #Ultimate.allocInit(6, 9);call write~init~int(73, 9, 0, 1);call write~init~int(68, 9, 1, 1);call write~init~int(65, 9, 2, 1);call write~init~int(45, 9, 3, 1);call write~init~int(50, 9, 4, 1);call write~init~int(0, 9, 5, 1);call #Ultimate.allocInit(5, 10);call write~init~int(73, 10, 0, 1);call write~init~int(65, 10, 1, 1);call write~init~int(69, 10, 2, 1);call write~init~int(83, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(6, 11);call write~init~int(83, 11, 0, 1);call write~init~int(77, 11, 1, 1);call write~init~int(65, 11, 2, 1);call write~init~int(82, 11, 3, 1);call write~init~int(84, 11, 4, 1);call write~init~int(0, 11, 5, 1);call #Ultimate.allocInit(10, 12);call #Ultimate.allocInit(10, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(16, 19);call #Ultimate.allocInit(17, 20);call #Ultimate.allocInit(19, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(16, 23);call #Ultimate.allocInit(304, 24);call #Ultimate.allocInit(21, 25);call #Ultimate.allocInit(33, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(37, 29);call #Ultimate.allocInit(63, 30);call #Ultimate.allocInit(63, 31);call #Ultimate.allocInit(40, 32);call #Ultimate.allocInit(32, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(17, 35);call #Ultimate.allocInit(11, 36);call #Ultimate.allocInit(25, 37);call #Ultimate.allocInit(64, 38);call #Ultimate.allocInit(6, 39);call write~init~int(105, 39, 0, 1);call write~init~int(100, 39, 1, 1);call write~init~int(97, 39, 2, 1);call write~init~int(37, 39, 3, 1);call write~init~int(100, 39, 4, 1);call write~init~int(0, 39, 5, 1);call #Ultimate.allocInit(9, 40);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(9, 42);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(61, 44);call #Ultimate.allocInit(40, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(46, 47);call #Ultimate.allocInit(9, 48);call #Ultimate.allocInit(65, 49);call #Ultimate.allocInit(79, 50);call #Ultimate.allocInit(79, 51);call #Ultimate.allocInit(9, 52);call #Ultimate.allocInit(61, 53);call #Ultimate.allocInit(6, 54);call write~init~int(105, 54, 0, 1);call write~init~int(100, 54, 1, 1);call write~init~int(97, 54, 2, 1);call write~init~int(37, 54, 3, 1);call write~init~int(100, 54, 4, 1);call write~init~int(0, 54, 5, 1);call #Ultimate.allocInit(46, 55);call #Ultimate.allocInit(32, 56);call #Ultimate.allocInit(28, 57);call #Ultimate.allocInit(71, 58);call #Ultimate.allocInit(40, 59);call #Ultimate.allocInit(52, 60);call #Ultimate.allocInit(79, 61);call #Ultimate.allocInit(79, 62);call #Ultimate.allocInit(101, 63);call #Ultimate.allocInit(59, 64);call #Ultimate.allocInit(54, 65);call #Ultimate.allocInit(66, 66);call #Ultimate.allocInit(50, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(28, 69);call #Ultimate.allocInit(28, 70);call #Ultimate.allocInit(28, 71);call #Ultimate.allocInit(40, 72);call #Ultimate.allocInit(7, 73);call write~init~int(32, 73, 0, 1);call write~init~int(40, 73, 1, 1);call write~init~int(37, 73, 2, 1);call write~init~int(115, 73, 3, 1);call write~init~int(41, 73, 4, 1);call write~init~int(10, 73, 5, 1);call write~init~int(0, 73, 6, 1);call #Ultimate.allocInit(117, 74);call #Ultimate.allocInit(134, 75);call #Ultimate.allocInit(43, 76);call #Ultimate.allocInit(39, 77);call #Ultimate.allocInit(40, 78);call #Ultimate.allocInit(16, 79);~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~#smart4_access~0.base, ~#smart4_access~0.offset := 80, 0;call #Ultimate.allocInit(40, 80);call write~init~$Pointer$(#funAddr~smart4_submit_command.base, #funAddr~smart4_submit_command.offset, ~#smart4_access~0.base, ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_mask.base, #funAddr~smart4_intr_mask.offset, ~#smart4_access~0.base, 8 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_fifo_full.base, #funAddr~smart4_fifo_full.offset, ~#smart4_access~0.base, 16 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_pending.base, #funAddr~smart4_intr_pending.offset, ~#smart4_access~0.base, 24 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_completed.base, #funAddr~smart4_completed.offset, ~#smart4_access~0.base, 32 + ~#smart4_access~0.offset, 8);~#smart2_access~0.base, ~#smart2_access~0.offset := 81, 0;call #Ultimate.allocInit(40, 81);call write~init~$Pointer$(#funAddr~smart2_submit_command.base, #funAddr~smart2_submit_command.offset, ~#smart2_access~0.base, ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_mask.base, #funAddr~smart2_intr_mask.offset, ~#smart2_access~0.base, 8 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_fifo_full.base, #funAddr~smart2_fifo_full.offset, ~#smart2_access~0.base, 16 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_pending.base, #funAddr~smart2_intr_pending.offset, ~#smart2_access~0.base, 24 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_completed.base, #funAddr~smart2_completed.offset, ~#smart2_access~0.base, 32 + ~#smart2_access~0.offset, 8);~#smart2e_access~0.base, ~#smart2e_access~0.offset := 82, 0;call #Ultimate.allocInit(40, 82);call write~init~$Pointer$(#funAddr~smart2e_submit_command.base, #funAddr~smart2e_submit_command.offset, ~#smart2e_access~0.base, ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_mask.base, #funAddr~smart2e_intr_mask.offset, ~#smart2e_access~0.base, 8 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_fifo_full.base, #funAddr~smart2e_fifo_full.offset, ~#smart2e_access~0.base, 16 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_pending.base, #funAddr~smart2e_intr_pending.offset, ~#smart2e_access~0.base, 24 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_completed.base, #funAddr~smart2e_completed.offset, ~#smart2e_access~0.base, 32 + ~#smart2e_access~0.offset, 8);~#smart1_access~0.base, ~#smart1_access~0.offset := 83, 0;call #Ultimate.allocInit(40, 83);call write~init~$Pointer$(#funAddr~smart1_submit_command.base, #funAddr~smart1_submit_command.offset, ~#smart1_access~0.base, ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_mask.base, #funAddr~smart1_intr_mask.offset, ~#smart1_access~0.base, 8 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_fifo_full.base, #funAddr~smart1_fifo_full.offset, ~#smart1_access~0.base, 16 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_pending.base, #funAddr~smart1_intr_pending.offset, ~#smart1_access~0.base, 24 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_completed.base, #funAddr~smart1_completed.offset, ~#smart1_access~0.base, 32 + ~#smart1_access~0.offset, 8);~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset := 84, 0;call #Ultimate.allocInit(156, 84);call write~init~int(1, ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 4 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(3735899821, ~#cpqarray_mutex~0.base, 8 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(4294967295, ~#cpqarray_mutex~0.base, 12 + ~#cpqarray_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#cpqarray_mutex~0.base, 16 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 24 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 32 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 40 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(6, 0, ~#cpqarray_mutex~0.base, 48 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 56 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 60 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 80 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 88 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 96 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 104 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 112 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 120 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 128 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(7, 0, ~#cpqarray_mutex~0.base, 136 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 144 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 148 + ~#cpqarray_mutex~0.offset, 8);~nr_ctlr~0 := 0;~#hba~0.base, ~#hba~0.offset := 85, 0;call #Ultimate.allocInit(64, 85);call write~init~$Pointer$(0, 0, ~#hba~0.base, ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 8 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 16 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 24 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 32 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 40 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 48 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 56 + ~#hba~0.offset, 8);~#eisa~0.base, ~#eisa~0.offset := 86, 0;call #Ultimate.allocInit(32, 86);call write~init~int(0, ~#eisa~0.base, ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 4 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 8 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 12 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 16 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 20 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 24 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 28 + ~#eisa~0.offset, 4);~#products~0.base, ~#products~0.offset := 87, 0;call #Ultimate.allocInit(300, 87);call write~init~int(4198670, ~#products~0.base, ~#products~0.offset, 4);call write~init~$Pointer$(8, 0, ~#products~0.base, 4 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 12 + ~#products~0.offset, 8);call write~init~int(20975886, ~#products~0.base, 20 + ~#products~0.offset, 4);call write~init~$Pointer$(9, 0, ~#products~0.base, 24 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 32 + ~#products~0.offset, 8);call write~init~int(272634126, ~#products~0.base, 40 + ~#products~0.offset, 4);call write~init~$Pointer$(10, 0, ~#products~0.base, 44 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 52 + ~#products~0.offset, 8);call write~init~int(541069582, ~#products~0.base, 60 + ~#products~0.offset, 4);call write~init~$Pointer$(11, 0, ~#products~0.base, 64 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 72 + ~#products~0.offset, 8);call write~init~int(809505038, ~#products~0.base, 80 + ~#products~0.offset, 4);call write~init~$Pointer$(12, 0, ~#products~0.base, 84 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2e_access~0.base, ~#smart2e_access~0.offset, ~#products~0.base, 92 + ~#products~0.offset, 8);call write~init~int(1076891153, ~#products~0.base, 100 + ~#products~0.offset, 4);call write~init~$Pointer$(13, 0, ~#products~0.base, 104 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 112 + ~#products~0.offset, 8);call write~init~int(1076956689, ~#products~0.base, 120 + ~#products~0.offset, 4);call write~init~$Pointer$(14, 0, ~#products~0.base, 124 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 132 + ~#products~0.offset, 8);call write~init~int(1077022225, ~#products~0.base, 140 + ~#products~0.offset, 4);call write~init~$Pointer$(15, 0, ~#products~0.base, 144 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 152 + ~#products~0.offset, 8);call write~init~int(1077087761, ~#products~0.base, 160 + ~#products~0.offset, 4);call write~init~$Pointer$(16, 0, ~#products~0.base, 164 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 172 + ~#products~0.offset, 8);call write~init~int(1077153297, ~#products~0.base, 180 + ~#products~0.offset, 4);call write~init~$Pointer$(17, 0, ~#products~0.base, 184 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 192 + ~#products~0.offset, 8);call write~init~int(1077939729, ~#products~0.base, 200 + ~#products~0.offset, 4);call write~init~$Pointer$(18, 0, ~#products~0.base, 204 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 212 + ~#products~0.offset, 8);call write~init~int(1078464017, ~#products~0.base, 220 + ~#products~0.offset, 4);call write~init~$Pointer$(19, 0, ~#products~0.base, 224 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 232 + ~#products~0.offset, 8);call write~init~int(1078988305, ~#products~0.base, 240 + ~#products~0.offset, 4);call write~init~$Pointer$(20, 0, ~#products~0.base, 244 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 252 + ~#products~0.offset, 8);call write~init~int(1079053841, ~#products~0.base, 260 + ~#products~0.offset, 4);call write~init~$Pointer$(21, 0, ~#products~0.base, 264 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 272 + ~#products~0.offset, 8);call write~init~int(1079512593, ~#products~0.base, 280 + ~#products~0.offset, 4);call write~init~$Pointer$(22, 0, ~#products~0.base, 284 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 292 + ~#products~0.offset, 8);~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset := 88, 0;call #Ultimate.allocInit(352, 88);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 4 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 8 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16472, ~#cpqarray_pci_device_id~0.base, 12 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 16 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 20 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 24 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 32 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 36 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 40 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16465, ~#cpqarray_pci_device_id~0.base, 44 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 48 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 52 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 56 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 64 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 68 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 72 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16464, ~#cpqarray_pci_device_id~0.base, 76 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 80 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 84 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 88 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 96 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 100 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 104 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16456, ~#cpqarray_pci_device_id~0.base, 108 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 112 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 116 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 120 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 128 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 132 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 136 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16448, ~#cpqarray_pci_device_id~0.base, 140 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 144 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 148 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 152 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 160 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 164 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 168 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16436, ~#cpqarray_pci_device_id~0.base, 172 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 176 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 180 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 184 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 192 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 196 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 200 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16435, ~#cpqarray_pci_device_id~0.base, 204 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 208 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 212 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 216 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 224 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 228 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 232 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16434, ~#cpqarray_pci_device_id~0.base, 236 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 240 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 244 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 248 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 256 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 260 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 264 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16433, ~#cpqarray_pci_device_id~0.base, 268 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 272 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 276 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 280 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 288 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 292 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 296 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16432, ~#cpqarray_pci_device_id~0.base, 300 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 304 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 308 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 312 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 320 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 324 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 328 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 332 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 336 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 340 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 344 + ~#cpqarray_pci_device_id~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#ida_gendisk~0.base, ~#ida_gendisk~0.offset := 89, 0;call #Ultimate.allocInit(1024, 89);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base);~#ida_fops~0.base, ~#ida_fops~0.offset := 90, 0;call #Ultimate.allocInit(96, 90);call write~init~$Pointer$(#funAddr~ida_unlocked_open.base, #funAddr~ida_unlocked_open.offset, ~#ida_fops~0.base, ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_release.base, #funAddr~ida_release.offset, ~#ida_fops~0.base, 8 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_ioctl.base, #funAddr~ida_ioctl.offset, ~#ida_fops~0.base, 16 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 24 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 32 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 40 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 48 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 56 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_revalidate.base, #funAddr~ida_revalidate.offset, ~#ida_fops~0.base, 64 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_getgeo.base, #funAddr~ida_getgeo.offset, ~#ida_fops~0.base, 72 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 80 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_fops~0.base, 88 + ~#ida_fops~0.offset, 8);~proc_array~0.base, ~proc_array~0.offset := 0, 0;~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset := 91, 0;call #Ultimate.allocInit(216, 91);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_lseek.base, #funAddr~seq_lseek.offset, ~#ida_proc_fops~0.base, 8 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_read.base, #funAddr~seq_read.offset, ~#ida_proc_fops~0.base, 16 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 24 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 32 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 40 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 48 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 56 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 64 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 72 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 80 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_proc_open.base, #funAddr~ida_proc_open.offset, ~#ida_proc_fops~0.base, 88 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 96 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~single_release.base, #funAddr~single_release.offset, ~#ida_proc_fops~0.base, 104 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 112 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 120 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 128 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 136 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 144 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 152 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 160 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 168 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 176 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 184 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 192 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 200 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 208 + ~#ida_proc_fops~0.offset, 8);~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset := 92, 0;call #Ultimate.allocInit(301, 92);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 8 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(40, 0, ~#cpqarray_pci_driver~0.base, 16 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, ~#cpqarray_pci_driver~0.base, 24 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_init_one.base, #funAddr~cpqarray_init_one.offset, ~#cpqarray_pci_driver~0.base, 32 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_remove_one_pci.base, #funAddr~cpqarray_remove_one_pci.offset, ~#cpqarray_pci_driver~0.base, 40 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 48 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 56 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 64 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 72 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 80 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 88 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 96 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 104 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 112 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 120 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 128 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 136 + ~#cpqarray_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 137 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 145 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 153 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 161 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 169 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 177 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 185 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 193 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 201 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 209 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 217 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 221 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 225 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 229 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 237 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 245 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 253 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 261 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 269 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 273 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 285 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 293 + ~#cpqarray_pci_driver~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg32~0.base, ~ldvarg32~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg23~0 := 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg1~0 := 0;~ldvarg37~0.base, ~ldvarg37~0.offset := 0, 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg29~0.base, ~ldvarg29~0.offset := 0, 0;~ldvarg24~0.base, ~ldvarg24~0.offset := 0, 0;~ldvarg35~0.base, ~ldvarg35~0.offset := 0, 0;~ida_fops_group0~0.base, ~ida_fops_group0~0.offset := 0, 0;~ida_proc_fops_group1~0.base, ~ida_proc_fops_group1~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg38~0.base, ~ldvarg38~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0.base, ~ldvarg33~0.offset := 0, 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg14~0 := 0;~ldvarg4~0.base, ~ldvarg4~0.offset := 0, 0;~ldvarg34~0 := 0;~ldvarg28~0.base, ~ldvarg28~0.offset := 0, 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldvarg39~0.base, ~ldvarg39~0.offset := 0, 0;~ldvarg31~0.base, ~ldvarg31~0.offset := 0, 0;~ldvarg20~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~ldvarg36~0.base, ~ldvarg36~0.offset := 0, 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~cpqarray_pci_driver_group0~0.base, ~cpqarray_pci_driver_group0~0.offset := 0, 0;~ida_proc_fops_group2~0.base, ~ida_proc_fops_group2~0.offset := 0, 0;~ldvarg27~0 := 0;~ldvarg26~0.base, ~ldvarg26~0.offset := 0, 0;~ldvarg30~0.base, ~ldvarg30~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg21~0 := 0;~ida_fops_group1~0.base, ~ida_fops_group1~0.offset := 0, 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg17~0.base, ~ldvarg17~0.offset := 0, 0;~ldvarg22~0.base, ~ldvarg22~0.offset := 0, 0;~ldvarg19~0.base, ~ldvarg19~0.offset := 0, 0;~ldv_retval_3~0 := 0;~ldv_mutex_cpqarray_mutex~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {14487#true} is VALID [2022-02-20 21:44:35,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {14487#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet964#1, main_#t~switch965#1, main_#t~nondet966#1, main_#t~switch967#1, main_#t~ret968#1, main_#t~ret969#1, main_#t~ret970#1, main_#t~nondet971#1, main_#t~switch972#1, main_#t~ret973#1, main_#t~ret974#1, main_#t~ret975#1, main_#t~ret976#1, main_#t~ret977#1, main_#t~ret978#1, main_#t~ret979#1, main_#t~ret980#1, main_#t~nondet981#1, main_#t~switch982#1, main_#t~ret983#1, main_#t~ret984#1, main_#t~ret985#1, main_#t~nondet986#1, main_#t~switch987#1, main_#t~ret988#1, main_#t~ret989#1, main_#t~ret990#1, main_#t~ret991#1, main_#t~nondet992#1, main_#t~switch993#1, main_#t~ret994#1, main_#t~nondet995#1, main_#t~switch996#1, main_#t~ret997#1, main_#t~ret998#1, main_#t~ret999#1, main_#t~nondet1000#1, main_#t~switch1001#1, main_#t~ret1002#1, main_#t~nondet1003#1, main_#t~switch1004#1, main_#t~ret1005#1, main_#t~ret1006#1, main_#t~ret1007#1, main_~tmp~66#1, main_~tmp___0~26#1, main_~tmp___1~17#1, main_~tmp___2~10#1, main_~tmp___3~6#1, main_~tmp___4~3#1, main_~tmp___5~2#1, main_~tmp___6~2#1, main_~tmp___7~2#1;havoc main_~tmp~66#1;havoc main_~tmp___0~26#1;havoc main_~tmp___1~17#1;havoc main_~tmp___2~10#1;havoc main_~tmp___3~6#1;havoc main_~tmp___4~3#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;havoc main_~tmp___7~2#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cpqarray_mutex~0 := 1;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,427 INFO L290 TraceCheckUtils]: 2: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,427 INFO L290 TraceCheckUtils]: 3: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,428 INFO L290 TraceCheckUtils]: 4: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,428 INFO L290 TraceCheckUtils]: 5: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 2 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,428 INFO L290 TraceCheckUtils]: 6: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 3 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,430 INFO L290 TraceCheckUtils]: 7: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 4 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,431 INFO L290 TraceCheckUtils]: 8: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 5 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 6 == main_~tmp~66#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,431 INFO L290 TraceCheckUtils]: 10: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume main_#t~switch965#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,432 INFO L290 TraceCheckUtils]: 11: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1000#1 && main_#t~nondet1000#1 <= 2147483647;main_~tmp___6~2#1 := main_#t~nondet1000#1;havoc main_#t~nondet1000#1;main_#t~switch1001#1 := 0 == main_~tmp___6~2#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,432 INFO L290 TraceCheckUtils]: 12: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !main_#t~switch1001#1;main_#t~switch1001#1 := main_#t~switch1001#1 || 1 == main_~tmp___6~2#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,433 INFO L290 TraceCheckUtils]: 13: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume main_#t~switch1001#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,433 INFO L290 TraceCheckUtils]: 14: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cpqarray_init } true;havoc cpqarray_init_#res#1;havoc cpqarray_init_#t~nondet520#1, cpqarray_init_#t~ret521#1, cpqarray_init_#t~ret522#1, cpqarray_init_#t~mem523#1.base, cpqarray_init_#t~mem523#1.offset, cpqarray_init_~num_cntlrs_reg~0#1, cpqarray_init_~i~3#1, cpqarray_init_~rc~0#1;havoc cpqarray_init_~num_cntlrs_reg~0#1;havoc cpqarray_init_~i~3#1;havoc cpqarray_init_~rc~0#1;cpqarray_init_~num_cntlrs_reg~0#1 := 0;cpqarray_init_~rc~0#1 := 0;havoc cpqarray_init_#t~nondet520#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 42, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1030#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1030#1 && __pci_register_driver_#t~nondet1030#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1030#1;havoc __pci_register_driver_#t~nondet1030#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,433 INFO L290 TraceCheckUtils]: 15: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} cpqarray_init_#t~ret521#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= cpqarray_init_#t~ret521#1 && cpqarray_init_#t~ret521#1 <= 2147483647;cpqarray_init_~rc~0#1 := cpqarray_init_#t~ret521#1;havoc cpqarray_init_#t~ret521#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume 0 != cpqarray_init_~rc~0#1;cpqarray_init_#res#1 := cpqarray_init_~rc~0#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} main_#t~ret1002#1 := cpqarray_init_#res#1;assume { :end_inline_cpqarray_init } true;assume -2147483648 <= main_#t~ret1002#1 && main_#t~ret1002#1 <= 2147483647;~ldv_retval_3~0 := main_#t~ret1002#1;havoc main_#t~ret1002#1; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !(0 == ~ldv_retval_3~0); {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,435 INFO L290 TraceCheckUtils]: 19: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume 0 != ~ldv_retval_3~0;~ldv_state_variable_0~0 := 2; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume { :begin_inline_ldv_check_final_state } true; {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} is VALID [2022-02-20 21:44:35,435 INFO L290 TraceCheckUtils]: 21: Hoare triple {14489#(= ~ldv_mutex_cpqarray_mutex~0 1)} assume !(1 == ~ldv_mutex_cpqarray_mutex~0); {14488#false} is VALID [2022-02-20 21:44:35,435 INFO L272 TraceCheckUtils]: 22: Hoare triple {14488#false} call ldv_error(); {14488#false} is VALID [2022-02-20 21:44:35,436 INFO L290 TraceCheckUtils]: 23: Hoare triple {14488#false} assume !false; {14488#false} is VALID [2022-02-20 21:44:35,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:35,437 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:35,437 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268347594] [2022-02-20 21:44:35,437 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1268347594] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:35,437 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:35,438 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:35,438 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1030434915] [2022-02-20 21:44:35,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:35,439 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-02-20 21:44:35,439 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:35,439 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:35,472 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:35,472 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:35,472 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:35,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:35,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:35,473 INFO L87 Difference]: Start difference. First operand 2324 states and 3184 transitions. Second operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:39,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:39,459 INFO L93 Difference]: Finished difference Result 2844 states and 3825 transitions. [2022-02-20 21:44:39,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:39,460 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-02-20 21:44:39,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:39,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:39,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2511 transitions. [2022-02-20 21:44:39,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:39,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2511 transitions. [2022-02-20 21:44:39,596 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 2511 transitions. [2022-02-20 21:44:41,461 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2511 edges. 2511 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:41,825 INFO L225 Difference]: With dead ends: 2844 [2022-02-20 21:44:41,825 INFO L226 Difference]: Without dead ends: 2840 [2022-02-20 21:44:41,827 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:41,830 INFO L933 BasicCegarLoop]: 2040 mSDtfsCounter, 1392 mSDsluCounter, 1089 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1392 SdHoareTripleChecker+Valid, 3129 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:41,831 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1392 Valid, 3129 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:41,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2840 states. [2022-02-20 21:44:41,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2840 to 2838. [2022-02-20 21:44:41,918 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:41,938 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2840 states. Second operand has 2838 states, 2033 states have (on average 1.3138219380226266) internal successors, (2671), 2083 states have internal predecessors, (2671), 576 states have call successors, (576), 229 states have call predecessors, (576), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:41,944 INFO L74 IsIncluded]: Start isIncluded. First operand 2840 states. Second operand has 2838 states, 2033 states have (on average 1.3138219380226266) internal successors, (2671), 2083 states have internal predecessors, (2671), 576 states have call successors, (576), 229 states have call predecessors, (576), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:41,952 INFO L87 Difference]: Start difference. First operand 2840 states. Second operand has 2838 states, 2033 states have (on average 1.3138219380226266) internal successors, (2671), 2083 states have internal predecessors, (2671), 576 states have call successors, (576), 229 states have call predecessors, (576), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:42,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:42,221 INFO L93 Difference]: Finished difference Result 2840 states and 3820 transitions. [2022-02-20 21:44:42,221 INFO L276 IsEmpty]: Start isEmpty. Operand 2840 states and 3820 transitions. [2022-02-20 21:44:42,232 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:42,232 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:42,238 INFO L74 IsIncluded]: Start isIncluded. First operand has 2838 states, 2033 states have (on average 1.3138219380226266) internal successors, (2671), 2083 states have internal predecessors, (2671), 576 states have call successors, (576), 229 states have call predecessors, (576), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) Second operand 2840 states. [2022-02-20 21:44:42,245 INFO L87 Difference]: Start difference. First operand has 2838 states, 2033 states have (on average 1.3138219380226266) internal successors, (2671), 2083 states have internal predecessors, (2671), 576 states have call successors, (576), 229 states have call predecessors, (576), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) Second operand 2840 states. [2022-02-20 21:44:42,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:42,511 INFO L93 Difference]: Finished difference Result 2840 states and 3820 transitions. [2022-02-20 21:44:42,511 INFO L276 IsEmpty]: Start isEmpty. Operand 2840 states and 3820 transitions. [2022-02-20 21:44:42,524 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:42,524 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:42,525 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:42,525 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:42,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2838 states, 2033 states have (on average 1.3138219380226266) internal successors, (2671), 2083 states have internal predecessors, (2671), 576 states have call successors, (576), 229 states have call predecessors, (576), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:42,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2838 states to 2838 states and 3819 transitions. [2022-02-20 21:44:42,939 INFO L78 Accepts]: Start accepts. Automaton has 2838 states and 3819 transitions. Word has length 24 [2022-02-20 21:44:42,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:44:42,940 INFO L470 AbstractCegarLoop]: Abstraction has 2838 states and 3819 transitions. [2022-02-20 21:44:42,940 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:42,940 INFO L276 IsEmpty]: Start isEmpty. Operand 2838 states and 3819 transitions. [2022-02-20 21:44:42,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-02-20 21:44:42,941 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:42,941 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:42,941 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:44:42,941 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:42,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:42,942 INFO L85 PathProgramCache]: Analyzing trace with hash 1089819993, now seen corresponding path program 1 times [2022-02-20 21:44:42,942 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:42,942 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125179084] [2022-02-20 21:44:42,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:42,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:42,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:43,034 INFO L290 TraceCheckUtils]: 0: Hoare triple {28098#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(70, 2);call #Ultimate.allocInit(125, 3);call #Ultimate.allocInit(124, 4);call #Ultimate.allocInit(27, 5);call #Ultimate.allocInit(25, 6);call #Ultimate.allocInit(15, 7);call #Ultimate.allocInit(4, 8);call write~init~int(73, 8, 0, 1);call write~init~int(68, 8, 1, 1);call write~init~int(65, 8, 2, 1);call write~init~int(0, 8, 3, 1);call #Ultimate.allocInit(6, 9);call write~init~int(73, 9, 0, 1);call write~init~int(68, 9, 1, 1);call write~init~int(65, 9, 2, 1);call write~init~int(45, 9, 3, 1);call write~init~int(50, 9, 4, 1);call write~init~int(0, 9, 5, 1);call #Ultimate.allocInit(5, 10);call write~init~int(73, 10, 0, 1);call write~init~int(65, 10, 1, 1);call write~init~int(69, 10, 2, 1);call write~init~int(83, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(6, 11);call write~init~int(83, 11, 0, 1);call write~init~int(77, 11, 1, 1);call write~init~int(65, 11, 2, 1);call write~init~int(82, 11, 3, 1);call write~init~int(84, 11, 4, 1);call write~init~int(0, 11, 5, 1);call #Ultimate.allocInit(10, 12);call #Ultimate.allocInit(10, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(16, 19);call #Ultimate.allocInit(17, 20);call #Ultimate.allocInit(19, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(16, 23);call #Ultimate.allocInit(304, 24);call #Ultimate.allocInit(21, 25);call #Ultimate.allocInit(33, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(37, 29);call #Ultimate.allocInit(63, 30);call #Ultimate.allocInit(63, 31);call #Ultimate.allocInit(40, 32);call #Ultimate.allocInit(32, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(17, 35);call #Ultimate.allocInit(11, 36);call #Ultimate.allocInit(25, 37);call #Ultimate.allocInit(64, 38);call #Ultimate.allocInit(6, 39);call write~init~int(105, 39, 0, 1);call write~init~int(100, 39, 1, 1);call write~init~int(97, 39, 2, 1);call write~init~int(37, 39, 3, 1);call write~init~int(100, 39, 4, 1);call write~init~int(0, 39, 5, 1);call #Ultimate.allocInit(9, 40);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(9, 42);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(61, 44);call #Ultimate.allocInit(40, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(46, 47);call #Ultimate.allocInit(9, 48);call #Ultimate.allocInit(65, 49);call #Ultimate.allocInit(79, 50);call #Ultimate.allocInit(79, 51);call #Ultimate.allocInit(9, 52);call #Ultimate.allocInit(61, 53);call #Ultimate.allocInit(6, 54);call write~init~int(105, 54, 0, 1);call write~init~int(100, 54, 1, 1);call write~init~int(97, 54, 2, 1);call write~init~int(37, 54, 3, 1);call write~init~int(100, 54, 4, 1);call write~init~int(0, 54, 5, 1);call #Ultimate.allocInit(46, 55);call #Ultimate.allocInit(32, 56);call #Ultimate.allocInit(28, 57);call #Ultimate.allocInit(71, 58);call #Ultimate.allocInit(40, 59);call #Ultimate.allocInit(52, 60);call #Ultimate.allocInit(79, 61);call #Ultimate.allocInit(79, 62);call #Ultimate.allocInit(101, 63);call #Ultimate.allocInit(59, 64);call #Ultimate.allocInit(54, 65);call #Ultimate.allocInit(66, 66);call #Ultimate.allocInit(50, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(28, 69);call #Ultimate.allocInit(28, 70);call #Ultimate.allocInit(28, 71);call #Ultimate.allocInit(40, 72);call #Ultimate.allocInit(7, 73);call write~init~int(32, 73, 0, 1);call write~init~int(40, 73, 1, 1);call write~init~int(37, 73, 2, 1);call write~init~int(115, 73, 3, 1);call write~init~int(41, 73, 4, 1);call write~init~int(10, 73, 5, 1);call write~init~int(0, 73, 6, 1);call #Ultimate.allocInit(117, 74);call #Ultimate.allocInit(134, 75);call #Ultimate.allocInit(43, 76);call #Ultimate.allocInit(39, 77);call #Ultimate.allocInit(40, 78);call #Ultimate.allocInit(16, 79);~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~#smart4_access~0.base, ~#smart4_access~0.offset := 80, 0;call #Ultimate.allocInit(40, 80);call write~init~$Pointer$(#funAddr~smart4_submit_command.base, #funAddr~smart4_submit_command.offset, ~#smart4_access~0.base, ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_mask.base, #funAddr~smart4_intr_mask.offset, ~#smart4_access~0.base, 8 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_fifo_full.base, #funAddr~smart4_fifo_full.offset, ~#smart4_access~0.base, 16 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_pending.base, #funAddr~smart4_intr_pending.offset, ~#smart4_access~0.base, 24 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_completed.base, #funAddr~smart4_completed.offset, ~#smart4_access~0.base, 32 + ~#smart4_access~0.offset, 8);~#smart2_access~0.base, ~#smart2_access~0.offset := 81, 0;call #Ultimate.allocInit(40, 81);call write~init~$Pointer$(#funAddr~smart2_submit_command.base, #funAddr~smart2_submit_command.offset, ~#smart2_access~0.base, ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_mask.base, #funAddr~smart2_intr_mask.offset, ~#smart2_access~0.base, 8 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_fifo_full.base, #funAddr~smart2_fifo_full.offset, ~#smart2_access~0.base, 16 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_pending.base, #funAddr~smart2_intr_pending.offset, ~#smart2_access~0.base, 24 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_completed.base, #funAddr~smart2_completed.offset, ~#smart2_access~0.base, 32 + ~#smart2_access~0.offset, 8);~#smart2e_access~0.base, ~#smart2e_access~0.offset := 82, 0;call #Ultimate.allocInit(40, 82);call write~init~$Pointer$(#funAddr~smart2e_submit_command.base, #funAddr~smart2e_submit_command.offset, ~#smart2e_access~0.base, ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_mask.base, #funAddr~smart2e_intr_mask.offset, ~#smart2e_access~0.base, 8 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_fifo_full.base, #funAddr~smart2e_fifo_full.offset, ~#smart2e_access~0.base, 16 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_pending.base, #funAddr~smart2e_intr_pending.offset, ~#smart2e_access~0.base, 24 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_completed.base, #funAddr~smart2e_completed.offset, ~#smart2e_access~0.base, 32 + ~#smart2e_access~0.offset, 8);~#smart1_access~0.base, ~#smart1_access~0.offset := 83, 0;call #Ultimate.allocInit(40, 83);call write~init~$Pointer$(#funAddr~smart1_submit_command.base, #funAddr~smart1_submit_command.offset, ~#smart1_access~0.base, ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_mask.base, #funAddr~smart1_intr_mask.offset, ~#smart1_access~0.base, 8 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_fifo_full.base, #funAddr~smart1_fifo_full.offset, ~#smart1_access~0.base, 16 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_pending.base, #funAddr~smart1_intr_pending.offset, ~#smart1_access~0.base, 24 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_completed.base, #funAddr~smart1_completed.offset, ~#smart1_access~0.base, 32 + ~#smart1_access~0.offset, 8);~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset := 84, 0;call #Ultimate.allocInit(156, 84);call write~init~int(1, ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 4 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(3735899821, ~#cpqarray_mutex~0.base, 8 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(4294967295, ~#cpqarray_mutex~0.base, 12 + ~#cpqarray_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#cpqarray_mutex~0.base, 16 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 24 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 32 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 40 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(6, 0, ~#cpqarray_mutex~0.base, 48 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 56 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 60 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 80 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 88 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 96 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 104 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 112 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 120 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 128 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(7, 0, ~#cpqarray_mutex~0.base, 136 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 144 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 148 + ~#cpqarray_mutex~0.offset, 8);~nr_ctlr~0 := 0;~#hba~0.base, ~#hba~0.offset := 85, 0;call #Ultimate.allocInit(64, 85);call write~init~$Pointer$(0, 0, ~#hba~0.base, ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 8 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 16 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 24 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 32 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 40 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 48 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 56 + ~#hba~0.offset, 8);~#eisa~0.base, ~#eisa~0.offset := 86, 0;call #Ultimate.allocInit(32, 86);call write~init~int(0, ~#eisa~0.base, ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 4 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 8 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 12 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 16 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 20 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 24 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 28 + ~#eisa~0.offset, 4);~#products~0.base, ~#products~0.offset := 87, 0;call #Ultimate.allocInit(300, 87);call write~init~int(4198670, ~#products~0.base, ~#products~0.offset, 4);call write~init~$Pointer$(8, 0, ~#products~0.base, 4 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 12 + ~#products~0.offset, 8);call write~init~int(20975886, ~#products~0.base, 20 + ~#products~0.offset, 4);call write~init~$Pointer$(9, 0, ~#products~0.base, 24 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 32 + ~#products~0.offset, 8);call write~init~int(272634126, ~#products~0.base, 40 + ~#products~0.offset, 4);call write~init~$Pointer$(10, 0, ~#products~0.base, 44 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 52 + ~#products~0.offset, 8);call write~init~int(541069582, ~#products~0.base, 60 + ~#products~0.offset, 4);call write~init~$Pointer$(11, 0, ~#products~0.base, 64 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 72 + ~#products~0.offset, 8);call write~init~int(809505038, ~#products~0.base, 80 + ~#products~0.offset, 4);call write~init~$Pointer$(12, 0, ~#products~0.base, 84 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2e_access~0.base, ~#smart2e_access~0.offset, ~#products~0.base, 92 + ~#products~0.offset, 8);call write~init~int(1076891153, ~#products~0.base, 100 + ~#products~0.offset, 4);call write~init~$Pointer$(13, 0, ~#products~0.base, 104 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 112 + ~#products~0.offset, 8);call write~init~int(1076956689, ~#products~0.base, 120 + ~#products~0.offset, 4);call write~init~$Pointer$(14, 0, ~#products~0.base, 124 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 132 + ~#products~0.offset, 8);call write~init~int(1077022225, ~#products~0.base, 140 + ~#products~0.offset, 4);call write~init~$Pointer$(15, 0, ~#products~0.base, 144 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 152 + ~#products~0.offset, 8);call write~init~int(1077087761, ~#products~0.base, 160 + ~#products~0.offset, 4);call write~init~$Pointer$(16, 0, ~#products~0.base, 164 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 172 + ~#products~0.offset, 8);call write~init~int(1077153297, ~#products~0.base, 180 + ~#products~0.offset, 4);call write~init~$Pointer$(17, 0, ~#products~0.base, 184 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 192 + ~#products~0.offset, 8);call write~init~int(1077939729, ~#products~0.base, 200 + ~#products~0.offset, 4);call write~init~$Pointer$(18, 0, ~#products~0.base, 204 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 212 + ~#products~0.offset, 8);call write~init~int(1078464017, ~#products~0.base, 220 + ~#products~0.offset, 4);call write~init~$Pointer$(19, 0, ~#products~0.base, 224 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 232 + ~#products~0.offset, 8);call write~init~int(1078988305, ~#products~0.base, 240 + ~#products~0.offset, 4);call write~init~$Pointer$(20, 0, ~#products~0.base, 244 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 252 + ~#products~0.offset, 8);call write~init~int(1079053841, ~#products~0.base, 260 + ~#products~0.offset, 4);call write~init~$Pointer$(21, 0, ~#products~0.base, 264 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 272 + ~#products~0.offset, 8);call write~init~int(1079512593, ~#products~0.base, 280 + ~#products~0.offset, 4);call write~init~$Pointer$(22, 0, ~#products~0.base, 284 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 292 + ~#products~0.offset, 8);~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset := 88, 0;call #Ultimate.allocInit(352, 88);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 4 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 8 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16472, ~#cpqarray_pci_device_id~0.base, 12 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 16 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 20 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 24 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 32 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 36 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 40 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16465, ~#cpqarray_pci_device_id~0.base, 44 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 48 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 52 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 56 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 64 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 68 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 72 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16464, ~#cpqarray_pci_device_id~0.base, 76 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 80 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 84 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 88 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 96 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 100 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 104 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16456, ~#cpqarray_pci_device_id~0.base, 108 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 112 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 116 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 120 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 128 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 132 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 136 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16448, ~#cpqarray_pci_device_id~0.base, 140 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 144 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 148 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 152 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 160 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 164 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 168 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16436, ~#cpqarray_pci_device_id~0.base, 172 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 176 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 180 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 184 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 192 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 196 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 200 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16435, ~#cpqarray_pci_device_id~0.base, 204 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 208 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 212 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 216 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 224 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 228 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 232 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16434, ~#cpqarray_pci_device_id~0.base, 236 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 240 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 244 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 248 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 256 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 260 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 264 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16433, ~#cpqarray_pci_device_id~0.base, 268 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 272 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 276 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 280 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 288 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 292 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 296 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16432, ~#cpqarray_pci_device_id~0.base, 300 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 304 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 308 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 312 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 320 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 324 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 328 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 332 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 336 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 340 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 344 + ~#cpqarray_pci_device_id~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#ida_gendisk~0.base, ~#ida_gendisk~0.offset := 89, 0;call #Ultimate.allocInit(1024, 89);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base);~#ida_fops~0.base, ~#ida_fops~0.offset := 90, 0;call #Ultimate.allocInit(96, 90);call write~init~$Pointer$(#funAddr~ida_unlocked_open.base, #funAddr~ida_unlocked_open.offset, ~#ida_fops~0.base, ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_release.base, #funAddr~ida_release.offset, ~#ida_fops~0.base, 8 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_ioctl.base, #funAddr~ida_ioctl.offset, ~#ida_fops~0.base, 16 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 24 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 32 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 40 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 48 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 56 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_revalidate.base, #funAddr~ida_revalidate.offset, ~#ida_fops~0.base, 64 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_getgeo.base, #funAddr~ida_getgeo.offset, ~#ida_fops~0.base, 72 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 80 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_fops~0.base, 88 + ~#ida_fops~0.offset, 8);~proc_array~0.base, ~proc_array~0.offset := 0, 0;~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset := 91, 0;call #Ultimate.allocInit(216, 91);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_lseek.base, #funAddr~seq_lseek.offset, ~#ida_proc_fops~0.base, 8 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_read.base, #funAddr~seq_read.offset, ~#ida_proc_fops~0.base, 16 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 24 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 32 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 40 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 48 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 56 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 64 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 72 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 80 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_proc_open.base, #funAddr~ida_proc_open.offset, ~#ida_proc_fops~0.base, 88 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 96 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~single_release.base, #funAddr~single_release.offset, ~#ida_proc_fops~0.base, 104 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 112 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 120 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 128 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 136 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 144 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 152 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 160 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 168 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 176 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 184 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 192 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 200 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 208 + ~#ida_proc_fops~0.offset, 8);~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset := 92, 0;call #Ultimate.allocInit(301, 92);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 8 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(40, 0, ~#cpqarray_pci_driver~0.base, 16 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, ~#cpqarray_pci_driver~0.base, 24 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_init_one.base, #funAddr~cpqarray_init_one.offset, ~#cpqarray_pci_driver~0.base, 32 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_remove_one_pci.base, #funAddr~cpqarray_remove_one_pci.offset, ~#cpqarray_pci_driver~0.base, 40 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 48 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 56 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 64 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 72 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 80 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 88 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 96 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 104 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 112 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 120 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 128 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 136 + ~#cpqarray_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 137 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 145 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 153 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 161 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 169 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 177 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 185 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 193 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 201 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 209 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 217 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 221 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 225 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 229 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 237 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 245 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 253 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 261 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 269 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 273 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 285 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 293 + ~#cpqarray_pci_driver~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg32~0.base, ~ldvarg32~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg23~0 := 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg1~0 := 0;~ldvarg37~0.base, ~ldvarg37~0.offset := 0, 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg29~0.base, ~ldvarg29~0.offset := 0, 0;~ldvarg24~0.base, ~ldvarg24~0.offset := 0, 0;~ldvarg35~0.base, ~ldvarg35~0.offset := 0, 0;~ida_fops_group0~0.base, ~ida_fops_group0~0.offset := 0, 0;~ida_proc_fops_group1~0.base, ~ida_proc_fops_group1~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg38~0.base, ~ldvarg38~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0.base, ~ldvarg33~0.offset := 0, 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg14~0 := 0;~ldvarg4~0.base, ~ldvarg4~0.offset := 0, 0;~ldvarg34~0 := 0;~ldvarg28~0.base, ~ldvarg28~0.offset := 0, 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldvarg39~0.base, ~ldvarg39~0.offset := 0, 0;~ldvarg31~0.base, ~ldvarg31~0.offset := 0, 0;~ldvarg20~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~ldvarg36~0.base, ~ldvarg36~0.offset := 0, 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~cpqarray_pci_driver_group0~0.base, ~cpqarray_pci_driver_group0~0.offset := 0, 0;~ida_proc_fops_group2~0.base, ~ida_proc_fops_group2~0.offset := 0, 0;~ldvarg27~0 := 0;~ldvarg26~0.base, ~ldvarg26~0.offset := 0, 0;~ldvarg30~0.base, ~ldvarg30~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg21~0 := 0;~ida_fops_group1~0.base, ~ida_fops_group1~0.offset := 0, 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg17~0.base, ~ldvarg17~0.offset := 0, 0;~ldvarg22~0.base, ~ldvarg22~0.offset := 0, 0;~ldvarg19~0.base, ~ldvarg19~0.offset := 0, 0;~ldv_retval_3~0 := 0;~ldv_mutex_cpqarray_mutex~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {28098#true} is VALID [2022-02-20 21:44:43,035 INFO L290 TraceCheckUtils]: 1: Hoare triple {28098#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet964#1, main_#t~switch965#1, main_#t~nondet966#1, main_#t~switch967#1, main_#t~ret968#1, main_#t~ret969#1, main_#t~ret970#1, main_#t~nondet971#1, main_#t~switch972#1, main_#t~ret973#1, main_#t~ret974#1, main_#t~ret975#1, main_#t~ret976#1, main_#t~ret977#1, main_#t~ret978#1, main_#t~ret979#1, main_#t~ret980#1, main_#t~nondet981#1, main_#t~switch982#1, main_#t~ret983#1, main_#t~ret984#1, main_#t~ret985#1, main_#t~nondet986#1, main_#t~switch987#1, main_#t~ret988#1, main_#t~ret989#1, main_#t~ret990#1, main_#t~ret991#1, main_#t~nondet992#1, main_#t~switch993#1, main_#t~ret994#1, main_#t~nondet995#1, main_#t~switch996#1, main_#t~ret997#1, main_#t~ret998#1, main_#t~ret999#1, main_#t~nondet1000#1, main_#t~switch1001#1, main_#t~ret1002#1, main_#t~nondet1003#1, main_#t~switch1004#1, main_#t~ret1005#1, main_#t~ret1006#1, main_#t~ret1007#1, main_~tmp~66#1, main_~tmp___0~26#1, main_~tmp___1~17#1, main_~tmp___2~10#1, main_~tmp___3~6#1, main_~tmp___4~3#1, main_~tmp___5~2#1, main_~tmp___6~2#1, main_~tmp___7~2#1;havoc main_~tmp~66#1;havoc main_~tmp___0~26#1;havoc main_~tmp___1~17#1;havoc main_~tmp___2~10#1;havoc main_~tmp___3~6#1;havoc main_~tmp___4~3#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;havoc main_~tmp___7~2#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cpqarray_mutex~0 := 1;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,036 INFO L290 TraceCheckUtils]: 2: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,036 INFO L290 TraceCheckUtils]: 3: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,036 INFO L290 TraceCheckUtils]: 4: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,037 INFO L290 TraceCheckUtils]: 5: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 2 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,037 INFO L290 TraceCheckUtils]: 6: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 3 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,037 INFO L290 TraceCheckUtils]: 7: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 4 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,038 INFO L290 TraceCheckUtils]: 8: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 5 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,038 INFO L290 TraceCheckUtils]: 9: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 6 == main_~tmp~66#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,038 INFO L290 TraceCheckUtils]: 10: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume main_#t~switch965#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,041 INFO L290 TraceCheckUtils]: 11: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1000#1 && main_#t~nondet1000#1 <= 2147483647;main_~tmp___6~2#1 := main_#t~nondet1000#1;havoc main_#t~nondet1000#1;main_#t~switch1001#1 := 0 == main_~tmp___6~2#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,043 INFO L290 TraceCheckUtils]: 12: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch1001#1;main_#t~switch1001#1 := main_#t~switch1001#1 || 1 == main_~tmp___6~2#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,044 INFO L290 TraceCheckUtils]: 13: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume main_#t~switch1001#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,045 INFO L290 TraceCheckUtils]: 14: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cpqarray_init } true;havoc cpqarray_init_#res#1;havoc cpqarray_init_#t~nondet520#1, cpqarray_init_#t~ret521#1, cpqarray_init_#t~ret522#1, cpqarray_init_#t~mem523#1.base, cpqarray_init_#t~mem523#1.offset, cpqarray_init_~num_cntlrs_reg~0#1, cpqarray_init_~i~3#1, cpqarray_init_~rc~0#1;havoc cpqarray_init_~num_cntlrs_reg~0#1;havoc cpqarray_init_~i~3#1;havoc cpqarray_init_~rc~0#1;cpqarray_init_~num_cntlrs_reg~0#1 := 0;cpqarray_init_~rc~0#1 := 0;havoc cpqarray_init_#t~nondet520#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 42, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1030#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1030#1 && __pci_register_driver_#t~nondet1030#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1030#1;havoc __pci_register_driver_#t~nondet1030#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,045 INFO L290 TraceCheckUtils]: 15: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} cpqarray_init_#t~ret521#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= cpqarray_init_#t~ret521#1 && cpqarray_init_#t~ret521#1 <= 2147483647;cpqarray_init_~rc~0#1 := cpqarray_init_#t~ret521#1;havoc cpqarray_init_#t~ret521#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,046 INFO L290 TraceCheckUtils]: 16: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != cpqarray_init_~rc~0#1;cpqarray_init_#res#1 := cpqarray_init_~rc~0#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,046 INFO L290 TraceCheckUtils]: 17: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} main_#t~ret1002#1 := cpqarray_init_#res#1;assume { :end_inline_cpqarray_init } true;assume -2147483648 <= main_#t~ret1002#1 && main_#t~ret1002#1 <= 2147483647;~ldv_retval_3~0 := main_#t~ret1002#1;havoc main_#t~ret1002#1; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,046 INFO L290 TraceCheckUtils]: 18: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !(0 == ~ldv_retval_3~0); {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,047 INFO L290 TraceCheckUtils]: 19: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != ~ldv_retval_3~0;~ldv_state_variable_0~0 := 2; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,047 INFO L290 TraceCheckUtils]: 20: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume { :begin_inline_ldv_check_final_state } true; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,047 INFO L290 TraceCheckUtils]: 21: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 1 == ~ldv_mutex_cpqarray_mutex~0; {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:44:43,048 INFO L290 TraceCheckUtils]: 22: Hoare triple {28100#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {28099#false} is VALID [2022-02-20 21:44:43,049 INFO L272 TraceCheckUtils]: 23: Hoare triple {28099#false} call ldv_error(); {28099#false} is VALID [2022-02-20 21:44:43,049 INFO L290 TraceCheckUtils]: 24: Hoare triple {28099#false} assume !false; {28099#false} is VALID [2022-02-20 21:44:43,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:43,050 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:43,052 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125179084] [2022-02-20 21:44:43,052 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1125179084] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:43,052 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:43,052 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:43,052 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503714430] [2022-02-20 21:44:43,052 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:43,053 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-02-20 21:44:43,053 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:43,053 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:43,083 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:43,083 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:43,083 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:43,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:43,084 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:43,084 INFO L87 Difference]: Start difference. First operand 2838 states and 3819 transitions. Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:46,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:46,233 INFO L93 Difference]: Finished difference Result 2840 states and 3820 transitions. [2022-02-20 21:44:46,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:46,234 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-02-20 21:44:46,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:46,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:46,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1867 transitions. [2022-02-20 21:44:46,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:46,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1867 transitions. [2022-02-20 21:44:46,349 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1867 transitions. [2022-02-20 21:44:47,862 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1867 edges. 1867 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:48,198 INFO L225 Difference]: With dead ends: 2840 [2022-02-20 21:44:48,198 INFO L226 Difference]: Without dead ends: 2837 [2022-02-20 21:44:48,199 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:48,200 INFO L933 BasicCegarLoop]: 1863 mSDtfsCounter, 1842 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1842 SdHoareTripleChecker+Valid, 1863 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:48,200 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1842 Valid, 1863 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:48,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2837 states. [2022-02-20 21:44:48,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2837 to 2837. [2022-02-20 21:44:48,248 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:48,252 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2837 states. Second operand has 2837 states, 2033 states have (on average 1.3133300541072308) internal successors, (2670), 2082 states have internal predecessors, (2670), 575 states have call successors, (575), 229 states have call predecessors, (575), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:48,256 INFO L74 IsIncluded]: Start isIncluded. First operand 2837 states. Second operand has 2837 states, 2033 states have (on average 1.3133300541072308) internal successors, (2670), 2082 states have internal predecessors, (2670), 575 states have call successors, (575), 229 states have call predecessors, (575), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:48,260 INFO L87 Difference]: Start difference. First operand 2837 states. Second operand has 2837 states, 2033 states have (on average 1.3133300541072308) internal successors, (2670), 2082 states have internal predecessors, (2670), 575 states have call successors, (575), 229 states have call predecessors, (575), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:48,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:48,472 INFO L93 Difference]: Finished difference Result 2837 states and 3817 transitions. [2022-02-20 21:44:48,472 INFO L276 IsEmpty]: Start isEmpty. Operand 2837 states and 3817 transitions. [2022-02-20 21:44:48,480 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:48,481 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:48,486 INFO L74 IsIncluded]: Start isIncluded. First operand has 2837 states, 2033 states have (on average 1.3133300541072308) internal successors, (2670), 2082 states have internal predecessors, (2670), 575 states have call successors, (575), 229 states have call predecessors, (575), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) Second operand 2837 states. [2022-02-20 21:44:48,490 INFO L87 Difference]: Start difference. First operand has 2837 states, 2033 states have (on average 1.3133300541072308) internal successors, (2670), 2082 states have internal predecessors, (2670), 575 states have call successors, (575), 229 states have call predecessors, (575), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) Second operand 2837 states. [2022-02-20 21:44:48,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:48,699 INFO L93 Difference]: Finished difference Result 2837 states and 3817 transitions. [2022-02-20 21:44:48,699 INFO L276 IsEmpty]: Start isEmpty. Operand 2837 states and 3817 transitions. [2022-02-20 21:44:48,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:48,707 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:48,707 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:48,708 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:48,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2837 states, 2033 states have (on average 1.3133300541072308) internal successors, (2670), 2082 states have internal predecessors, (2670), 575 states have call successors, (575), 229 states have call predecessors, (575), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:49,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2837 states to 2837 states and 3817 transitions. [2022-02-20 21:44:49,061 INFO L78 Accepts]: Start accepts. Automaton has 2837 states and 3817 transitions. Word has length 25 [2022-02-20 21:44:49,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:44:49,061 INFO L470 AbstractCegarLoop]: Abstraction has 2837 states and 3817 transitions. [2022-02-20 21:44:49,061 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:49,061 INFO L276 IsEmpty]: Start isEmpty. Operand 2837 states and 3817 transitions. [2022-02-20 21:44:49,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-02-20 21:44:49,062 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:49,063 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:49,063 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:44:49,063 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:49,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:49,064 INFO L85 PathProgramCache]: Analyzing trace with hash -575858482, now seen corresponding path program 1 times [2022-02-20 21:44:49,064 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:49,064 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565674771] [2022-02-20 21:44:49,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:49,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:49,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:49,153 INFO L290 TraceCheckUtils]: 0: Hoare triple {41694#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(70, 2);call #Ultimate.allocInit(125, 3);call #Ultimate.allocInit(124, 4);call #Ultimate.allocInit(27, 5);call #Ultimate.allocInit(25, 6);call #Ultimate.allocInit(15, 7);call #Ultimate.allocInit(4, 8);call write~init~int(73, 8, 0, 1);call write~init~int(68, 8, 1, 1);call write~init~int(65, 8, 2, 1);call write~init~int(0, 8, 3, 1);call #Ultimate.allocInit(6, 9);call write~init~int(73, 9, 0, 1);call write~init~int(68, 9, 1, 1);call write~init~int(65, 9, 2, 1);call write~init~int(45, 9, 3, 1);call write~init~int(50, 9, 4, 1);call write~init~int(0, 9, 5, 1);call #Ultimate.allocInit(5, 10);call write~init~int(73, 10, 0, 1);call write~init~int(65, 10, 1, 1);call write~init~int(69, 10, 2, 1);call write~init~int(83, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(6, 11);call write~init~int(83, 11, 0, 1);call write~init~int(77, 11, 1, 1);call write~init~int(65, 11, 2, 1);call write~init~int(82, 11, 3, 1);call write~init~int(84, 11, 4, 1);call write~init~int(0, 11, 5, 1);call #Ultimate.allocInit(10, 12);call #Ultimate.allocInit(10, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(16, 19);call #Ultimate.allocInit(17, 20);call #Ultimate.allocInit(19, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(16, 23);call #Ultimate.allocInit(304, 24);call #Ultimate.allocInit(21, 25);call #Ultimate.allocInit(33, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(37, 29);call #Ultimate.allocInit(63, 30);call #Ultimate.allocInit(63, 31);call #Ultimate.allocInit(40, 32);call #Ultimate.allocInit(32, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(17, 35);call #Ultimate.allocInit(11, 36);call #Ultimate.allocInit(25, 37);call #Ultimate.allocInit(64, 38);call #Ultimate.allocInit(6, 39);call write~init~int(105, 39, 0, 1);call write~init~int(100, 39, 1, 1);call write~init~int(97, 39, 2, 1);call write~init~int(37, 39, 3, 1);call write~init~int(100, 39, 4, 1);call write~init~int(0, 39, 5, 1);call #Ultimate.allocInit(9, 40);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(9, 42);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(61, 44);call #Ultimate.allocInit(40, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(46, 47);call #Ultimate.allocInit(9, 48);call #Ultimate.allocInit(65, 49);call #Ultimate.allocInit(79, 50);call #Ultimate.allocInit(79, 51);call #Ultimate.allocInit(9, 52);call #Ultimate.allocInit(61, 53);call #Ultimate.allocInit(6, 54);call write~init~int(105, 54, 0, 1);call write~init~int(100, 54, 1, 1);call write~init~int(97, 54, 2, 1);call write~init~int(37, 54, 3, 1);call write~init~int(100, 54, 4, 1);call write~init~int(0, 54, 5, 1);call #Ultimate.allocInit(46, 55);call #Ultimate.allocInit(32, 56);call #Ultimate.allocInit(28, 57);call #Ultimate.allocInit(71, 58);call #Ultimate.allocInit(40, 59);call #Ultimate.allocInit(52, 60);call #Ultimate.allocInit(79, 61);call #Ultimate.allocInit(79, 62);call #Ultimate.allocInit(101, 63);call #Ultimate.allocInit(59, 64);call #Ultimate.allocInit(54, 65);call #Ultimate.allocInit(66, 66);call #Ultimate.allocInit(50, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(28, 69);call #Ultimate.allocInit(28, 70);call #Ultimate.allocInit(28, 71);call #Ultimate.allocInit(40, 72);call #Ultimate.allocInit(7, 73);call write~init~int(32, 73, 0, 1);call write~init~int(40, 73, 1, 1);call write~init~int(37, 73, 2, 1);call write~init~int(115, 73, 3, 1);call write~init~int(41, 73, 4, 1);call write~init~int(10, 73, 5, 1);call write~init~int(0, 73, 6, 1);call #Ultimate.allocInit(117, 74);call #Ultimate.allocInit(134, 75);call #Ultimate.allocInit(43, 76);call #Ultimate.allocInit(39, 77);call #Ultimate.allocInit(40, 78);call #Ultimate.allocInit(16, 79);~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~#smart4_access~0.base, ~#smart4_access~0.offset := 80, 0;call #Ultimate.allocInit(40, 80);call write~init~$Pointer$(#funAddr~smart4_submit_command.base, #funAddr~smart4_submit_command.offset, ~#smart4_access~0.base, ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_mask.base, #funAddr~smart4_intr_mask.offset, ~#smart4_access~0.base, 8 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_fifo_full.base, #funAddr~smart4_fifo_full.offset, ~#smart4_access~0.base, 16 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_pending.base, #funAddr~smart4_intr_pending.offset, ~#smart4_access~0.base, 24 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_completed.base, #funAddr~smart4_completed.offset, ~#smart4_access~0.base, 32 + ~#smart4_access~0.offset, 8);~#smart2_access~0.base, ~#smart2_access~0.offset := 81, 0;call #Ultimate.allocInit(40, 81);call write~init~$Pointer$(#funAddr~smart2_submit_command.base, #funAddr~smart2_submit_command.offset, ~#smart2_access~0.base, ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_mask.base, #funAddr~smart2_intr_mask.offset, ~#smart2_access~0.base, 8 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_fifo_full.base, #funAddr~smart2_fifo_full.offset, ~#smart2_access~0.base, 16 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_pending.base, #funAddr~smart2_intr_pending.offset, ~#smart2_access~0.base, 24 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_completed.base, #funAddr~smart2_completed.offset, ~#smart2_access~0.base, 32 + ~#smart2_access~0.offset, 8);~#smart2e_access~0.base, ~#smart2e_access~0.offset := 82, 0;call #Ultimate.allocInit(40, 82);call write~init~$Pointer$(#funAddr~smart2e_submit_command.base, #funAddr~smart2e_submit_command.offset, ~#smart2e_access~0.base, ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_mask.base, #funAddr~smart2e_intr_mask.offset, ~#smart2e_access~0.base, 8 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_fifo_full.base, #funAddr~smart2e_fifo_full.offset, ~#smart2e_access~0.base, 16 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_pending.base, #funAddr~smart2e_intr_pending.offset, ~#smart2e_access~0.base, 24 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_completed.base, #funAddr~smart2e_completed.offset, ~#smart2e_access~0.base, 32 + ~#smart2e_access~0.offset, 8);~#smart1_access~0.base, ~#smart1_access~0.offset := 83, 0;call #Ultimate.allocInit(40, 83);call write~init~$Pointer$(#funAddr~smart1_submit_command.base, #funAddr~smart1_submit_command.offset, ~#smart1_access~0.base, ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_mask.base, #funAddr~smart1_intr_mask.offset, ~#smart1_access~0.base, 8 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_fifo_full.base, #funAddr~smart1_fifo_full.offset, ~#smart1_access~0.base, 16 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_pending.base, #funAddr~smart1_intr_pending.offset, ~#smart1_access~0.base, 24 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_completed.base, #funAddr~smart1_completed.offset, ~#smart1_access~0.base, 32 + ~#smart1_access~0.offset, 8);~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset := 84, 0;call #Ultimate.allocInit(156, 84);call write~init~int(1, ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 4 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(3735899821, ~#cpqarray_mutex~0.base, 8 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(4294967295, ~#cpqarray_mutex~0.base, 12 + ~#cpqarray_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#cpqarray_mutex~0.base, 16 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 24 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 32 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 40 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(6, 0, ~#cpqarray_mutex~0.base, 48 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 56 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 60 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 80 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 88 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 96 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 104 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 112 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 120 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 128 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(7, 0, ~#cpqarray_mutex~0.base, 136 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 144 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 148 + ~#cpqarray_mutex~0.offset, 8);~nr_ctlr~0 := 0;~#hba~0.base, ~#hba~0.offset := 85, 0;call #Ultimate.allocInit(64, 85);call write~init~$Pointer$(0, 0, ~#hba~0.base, ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 8 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 16 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 24 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 32 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 40 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 48 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 56 + ~#hba~0.offset, 8);~#eisa~0.base, ~#eisa~0.offset := 86, 0;call #Ultimate.allocInit(32, 86);call write~init~int(0, ~#eisa~0.base, ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 4 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 8 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 12 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 16 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 20 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 24 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 28 + ~#eisa~0.offset, 4);~#products~0.base, ~#products~0.offset := 87, 0;call #Ultimate.allocInit(300, 87);call write~init~int(4198670, ~#products~0.base, ~#products~0.offset, 4);call write~init~$Pointer$(8, 0, ~#products~0.base, 4 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 12 + ~#products~0.offset, 8);call write~init~int(20975886, ~#products~0.base, 20 + ~#products~0.offset, 4);call write~init~$Pointer$(9, 0, ~#products~0.base, 24 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 32 + ~#products~0.offset, 8);call write~init~int(272634126, ~#products~0.base, 40 + ~#products~0.offset, 4);call write~init~$Pointer$(10, 0, ~#products~0.base, 44 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 52 + ~#products~0.offset, 8);call write~init~int(541069582, ~#products~0.base, 60 + ~#products~0.offset, 4);call write~init~$Pointer$(11, 0, ~#products~0.base, 64 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 72 + ~#products~0.offset, 8);call write~init~int(809505038, ~#products~0.base, 80 + ~#products~0.offset, 4);call write~init~$Pointer$(12, 0, ~#products~0.base, 84 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2e_access~0.base, ~#smart2e_access~0.offset, ~#products~0.base, 92 + ~#products~0.offset, 8);call write~init~int(1076891153, ~#products~0.base, 100 + ~#products~0.offset, 4);call write~init~$Pointer$(13, 0, ~#products~0.base, 104 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 112 + ~#products~0.offset, 8);call write~init~int(1076956689, ~#products~0.base, 120 + ~#products~0.offset, 4);call write~init~$Pointer$(14, 0, ~#products~0.base, 124 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 132 + ~#products~0.offset, 8);call write~init~int(1077022225, ~#products~0.base, 140 + ~#products~0.offset, 4);call write~init~$Pointer$(15, 0, ~#products~0.base, 144 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 152 + ~#products~0.offset, 8);call write~init~int(1077087761, ~#products~0.base, 160 + ~#products~0.offset, 4);call write~init~$Pointer$(16, 0, ~#products~0.base, 164 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 172 + ~#products~0.offset, 8);call write~init~int(1077153297, ~#products~0.base, 180 + ~#products~0.offset, 4);call write~init~$Pointer$(17, 0, ~#products~0.base, 184 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 192 + ~#products~0.offset, 8);call write~init~int(1077939729, ~#products~0.base, 200 + ~#products~0.offset, 4);call write~init~$Pointer$(18, 0, ~#products~0.base, 204 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 212 + ~#products~0.offset, 8);call write~init~int(1078464017, ~#products~0.base, 220 + ~#products~0.offset, 4);call write~init~$Pointer$(19, 0, ~#products~0.base, 224 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 232 + ~#products~0.offset, 8);call write~init~int(1078988305, ~#products~0.base, 240 + ~#products~0.offset, 4);call write~init~$Pointer$(20, 0, ~#products~0.base, 244 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 252 + ~#products~0.offset, 8);call write~init~int(1079053841, ~#products~0.base, 260 + ~#products~0.offset, 4);call write~init~$Pointer$(21, 0, ~#products~0.base, 264 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 272 + ~#products~0.offset, 8);call write~init~int(1079512593, ~#products~0.base, 280 + ~#products~0.offset, 4);call write~init~$Pointer$(22, 0, ~#products~0.base, 284 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 292 + ~#products~0.offset, 8);~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset := 88, 0;call #Ultimate.allocInit(352, 88);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 4 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 8 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16472, ~#cpqarray_pci_device_id~0.base, 12 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 16 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 20 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 24 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 32 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 36 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 40 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16465, ~#cpqarray_pci_device_id~0.base, 44 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 48 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 52 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 56 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 64 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 68 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 72 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16464, ~#cpqarray_pci_device_id~0.base, 76 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 80 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 84 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 88 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 96 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 100 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 104 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16456, ~#cpqarray_pci_device_id~0.base, 108 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 112 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 116 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 120 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 128 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 132 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 136 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16448, ~#cpqarray_pci_device_id~0.base, 140 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 144 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 148 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 152 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 160 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 164 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 168 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16436, ~#cpqarray_pci_device_id~0.base, 172 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 176 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 180 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 184 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 192 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 196 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 200 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16435, ~#cpqarray_pci_device_id~0.base, 204 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 208 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 212 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 216 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 224 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 228 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 232 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16434, ~#cpqarray_pci_device_id~0.base, 236 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 240 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 244 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 248 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 256 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 260 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 264 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16433, ~#cpqarray_pci_device_id~0.base, 268 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 272 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 276 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 280 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 288 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 292 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 296 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16432, ~#cpqarray_pci_device_id~0.base, 300 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 304 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 308 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 312 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 320 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 324 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 328 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 332 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 336 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 340 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 344 + ~#cpqarray_pci_device_id~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#ida_gendisk~0.base, ~#ida_gendisk~0.offset := 89, 0;call #Ultimate.allocInit(1024, 89);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base);~#ida_fops~0.base, ~#ida_fops~0.offset := 90, 0;call #Ultimate.allocInit(96, 90);call write~init~$Pointer$(#funAddr~ida_unlocked_open.base, #funAddr~ida_unlocked_open.offset, ~#ida_fops~0.base, ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_release.base, #funAddr~ida_release.offset, ~#ida_fops~0.base, 8 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_ioctl.base, #funAddr~ida_ioctl.offset, ~#ida_fops~0.base, 16 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 24 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 32 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 40 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 48 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 56 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_revalidate.base, #funAddr~ida_revalidate.offset, ~#ida_fops~0.base, 64 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_getgeo.base, #funAddr~ida_getgeo.offset, ~#ida_fops~0.base, 72 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 80 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_fops~0.base, 88 + ~#ida_fops~0.offset, 8);~proc_array~0.base, ~proc_array~0.offset := 0, 0;~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset := 91, 0;call #Ultimate.allocInit(216, 91);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_lseek.base, #funAddr~seq_lseek.offset, ~#ida_proc_fops~0.base, 8 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_read.base, #funAddr~seq_read.offset, ~#ida_proc_fops~0.base, 16 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 24 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 32 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 40 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 48 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 56 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 64 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 72 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 80 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_proc_open.base, #funAddr~ida_proc_open.offset, ~#ida_proc_fops~0.base, 88 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 96 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~single_release.base, #funAddr~single_release.offset, ~#ida_proc_fops~0.base, 104 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 112 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 120 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 128 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 136 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 144 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 152 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 160 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 168 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 176 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 184 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 192 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 200 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 208 + ~#ida_proc_fops~0.offset, 8);~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset := 92, 0;call #Ultimate.allocInit(301, 92);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 8 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(40, 0, ~#cpqarray_pci_driver~0.base, 16 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, ~#cpqarray_pci_driver~0.base, 24 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_init_one.base, #funAddr~cpqarray_init_one.offset, ~#cpqarray_pci_driver~0.base, 32 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_remove_one_pci.base, #funAddr~cpqarray_remove_one_pci.offset, ~#cpqarray_pci_driver~0.base, 40 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 48 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 56 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 64 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 72 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 80 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 88 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 96 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 104 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 112 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 120 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 128 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 136 + ~#cpqarray_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 137 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 145 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 153 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 161 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 169 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 177 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 185 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 193 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 201 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 209 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 217 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 221 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 225 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 229 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 237 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 245 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 253 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 261 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 269 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 273 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 285 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 293 + ~#cpqarray_pci_driver~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg32~0.base, ~ldvarg32~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg23~0 := 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg1~0 := 0;~ldvarg37~0.base, ~ldvarg37~0.offset := 0, 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg29~0.base, ~ldvarg29~0.offset := 0, 0;~ldvarg24~0.base, ~ldvarg24~0.offset := 0, 0;~ldvarg35~0.base, ~ldvarg35~0.offset := 0, 0;~ida_fops_group0~0.base, ~ida_fops_group0~0.offset := 0, 0;~ida_proc_fops_group1~0.base, ~ida_proc_fops_group1~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg38~0.base, ~ldvarg38~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0.base, ~ldvarg33~0.offset := 0, 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg14~0 := 0;~ldvarg4~0.base, ~ldvarg4~0.offset := 0, 0;~ldvarg34~0 := 0;~ldvarg28~0.base, ~ldvarg28~0.offset := 0, 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldvarg39~0.base, ~ldvarg39~0.offset := 0, 0;~ldvarg31~0.base, ~ldvarg31~0.offset := 0, 0;~ldvarg20~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~ldvarg36~0.base, ~ldvarg36~0.offset := 0, 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~cpqarray_pci_driver_group0~0.base, ~cpqarray_pci_driver_group0~0.offset := 0, 0;~ida_proc_fops_group2~0.base, ~ida_proc_fops_group2~0.offset := 0, 0;~ldvarg27~0 := 0;~ldvarg26~0.base, ~ldvarg26~0.offset := 0, 0;~ldvarg30~0.base, ~ldvarg30~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg21~0 := 0;~ida_fops_group1~0.base, ~ida_fops_group1~0.offset := 0, 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg17~0.base, ~ldvarg17~0.offset := 0, 0;~ldvarg22~0.base, ~ldvarg22~0.offset := 0, 0;~ldvarg19~0.base, ~ldvarg19~0.offset := 0, 0;~ldv_retval_3~0 := 0;~ldv_mutex_cpqarray_mutex~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {41694#true} is VALID [2022-02-20 21:44:49,154 INFO L290 TraceCheckUtils]: 1: Hoare triple {41694#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet964#1, main_#t~switch965#1, main_#t~nondet966#1, main_#t~switch967#1, main_#t~ret968#1, main_#t~ret969#1, main_#t~ret970#1, main_#t~nondet971#1, main_#t~switch972#1, main_#t~ret973#1, main_#t~ret974#1, main_#t~ret975#1, main_#t~ret976#1, main_#t~ret977#1, main_#t~ret978#1, main_#t~ret979#1, main_#t~ret980#1, main_#t~nondet981#1, main_#t~switch982#1, main_#t~ret983#1, main_#t~ret984#1, main_#t~ret985#1, main_#t~nondet986#1, main_#t~switch987#1, main_#t~ret988#1, main_#t~ret989#1, main_#t~ret990#1, main_#t~ret991#1, main_#t~nondet992#1, main_#t~switch993#1, main_#t~ret994#1, main_#t~nondet995#1, main_#t~switch996#1, main_#t~ret997#1, main_#t~ret998#1, main_#t~ret999#1, main_#t~nondet1000#1, main_#t~switch1001#1, main_#t~ret1002#1, main_#t~nondet1003#1, main_#t~switch1004#1, main_#t~ret1005#1, main_#t~ret1006#1, main_#t~ret1007#1, main_~tmp~66#1, main_~tmp___0~26#1, main_~tmp___1~17#1, main_~tmp___2~10#1, main_~tmp___3~6#1, main_~tmp___4~3#1, main_~tmp___5~2#1, main_~tmp___6~2#1, main_~tmp___7~2#1;havoc main_~tmp~66#1;havoc main_~tmp___0~26#1;havoc main_~tmp___1~17#1;havoc main_~tmp___2~10#1;havoc main_~tmp___3~6#1;havoc main_~tmp___4~3#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;havoc main_~tmp___7~2#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cpqarray_mutex~0 := 1;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,154 INFO L290 TraceCheckUtils]: 2: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,155 INFO L290 TraceCheckUtils]: 3: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,155 INFO L290 TraceCheckUtils]: 4: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,155 INFO L290 TraceCheckUtils]: 5: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 2 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,156 INFO L290 TraceCheckUtils]: 6: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 3 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,156 INFO L290 TraceCheckUtils]: 7: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 4 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,156 INFO L290 TraceCheckUtils]: 8: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 5 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,156 INFO L290 TraceCheckUtils]: 9: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 6 == main_~tmp~66#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,157 INFO L290 TraceCheckUtils]: 10: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume main_#t~switch965#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,157 INFO L290 TraceCheckUtils]: 11: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1000#1 && main_#t~nondet1000#1 <= 2147483647;main_~tmp___6~2#1 := main_#t~nondet1000#1;havoc main_#t~nondet1000#1;main_#t~switch1001#1 := 0 == main_~tmp___6~2#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,157 INFO L290 TraceCheckUtils]: 12: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch1001#1;main_#t~switch1001#1 := main_#t~switch1001#1 || 1 == main_~tmp___6~2#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,158 INFO L290 TraceCheckUtils]: 13: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume main_#t~switch1001#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,158 INFO L290 TraceCheckUtils]: 14: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cpqarray_init } true;havoc cpqarray_init_#res#1;havoc cpqarray_init_#t~nondet520#1, cpqarray_init_#t~ret521#1, cpqarray_init_#t~ret522#1, cpqarray_init_#t~mem523#1.base, cpqarray_init_#t~mem523#1.offset, cpqarray_init_~num_cntlrs_reg~0#1, cpqarray_init_~i~3#1, cpqarray_init_~rc~0#1;havoc cpqarray_init_~num_cntlrs_reg~0#1;havoc cpqarray_init_~i~3#1;havoc cpqarray_init_~rc~0#1;cpqarray_init_~num_cntlrs_reg~0#1 := 0;cpqarray_init_~rc~0#1 := 0;havoc cpqarray_init_#t~nondet520#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 42, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1030#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1030#1 && __pci_register_driver_#t~nondet1030#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1030#1;havoc __pci_register_driver_#t~nondet1030#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,158 INFO L290 TraceCheckUtils]: 15: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} cpqarray_init_#t~ret521#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= cpqarray_init_#t~ret521#1 && cpqarray_init_#t~ret521#1 <= 2147483647;cpqarray_init_~rc~0#1 := cpqarray_init_#t~ret521#1;havoc cpqarray_init_#t~ret521#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,159 INFO L290 TraceCheckUtils]: 16: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume 0 != cpqarray_init_~rc~0#1;cpqarray_init_#res#1 := cpqarray_init_~rc~0#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,159 INFO L290 TraceCheckUtils]: 17: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} main_#t~ret1002#1 := cpqarray_init_#res#1;assume { :end_inline_cpqarray_init } true;assume -2147483648 <= main_#t~ret1002#1 && main_#t~ret1002#1 <= 2147483647;~ldv_retval_3~0 := main_#t~ret1002#1;havoc main_#t~ret1002#1; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,159 INFO L290 TraceCheckUtils]: 18: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !(0 == ~ldv_retval_3~0); {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,160 INFO L290 TraceCheckUtils]: 19: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_retval_3~0;~ldv_state_variable_0~0 := 2; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,160 INFO L290 TraceCheckUtils]: 20: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume { :begin_inline_ldv_check_final_state } true; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,160 INFO L290 TraceCheckUtils]: 21: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_mutex_cpqarray_mutex~0; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,160 INFO L290 TraceCheckUtils]: 22: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {41696#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:44:49,161 INFO L290 TraceCheckUtils]: 23: Hoare triple {41696#(= ~ldv_mutex_lock~0 1)} assume !(1 == ~ldv_mutex_lock~0); {41695#false} is VALID [2022-02-20 21:44:49,161 INFO L272 TraceCheckUtils]: 24: Hoare triple {41695#false} call ldv_error(); {41695#false} is VALID [2022-02-20 21:44:49,161 INFO L290 TraceCheckUtils]: 25: Hoare triple {41695#false} assume !false; {41695#false} is VALID [2022-02-20 21:44:49,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:49,162 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:49,162 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565674771] [2022-02-20 21:44:49,162 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1565674771] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:49,162 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:49,162 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:49,162 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022387842] [2022-02-20 21:44:49,162 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:49,163 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-02-20 21:44:49,163 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:49,163 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:49,193 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:49,193 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:49,194 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:49,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:49,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:49,195 INFO L87 Difference]: Start difference. First operand 2837 states and 3817 transitions. Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:51,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:51,434 INFO L93 Difference]: Finished difference Result 2839 states and 3818 transitions. [2022-02-20 21:44:51,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:51,434 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-02-20 21:44:51,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:51,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:51,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1865 transitions. [2022-02-20 21:44:51,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:51,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1865 transitions. [2022-02-20 21:44:51,492 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1865 transitions. [2022-02-20 21:44:52,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1865 edges. 1865 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:53,193 INFO L225 Difference]: With dead ends: 2839 [2022-02-20 21:44:53,193 INFO L226 Difference]: Without dead ends: 2836 [2022-02-20 21:44:53,194 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:53,195 INFO L933 BasicCegarLoop]: 1861 mSDtfsCounter, 1839 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1839 SdHoareTripleChecker+Valid, 1861 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:53,195 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1839 Valid, 1861 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:53,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2836 states. [2022-02-20 21:44:53,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2836 to 2836. [2022-02-20 21:44:53,247 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:53,252 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2836 states. Second operand has 2836 states, 2033 states have (on average 1.3128381701918348) internal successors, (2669), 2081 states have internal predecessors, (2669), 574 states have call successors, (574), 229 states have call predecessors, (574), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:53,256 INFO L74 IsIncluded]: Start isIncluded. First operand 2836 states. Second operand has 2836 states, 2033 states have (on average 1.3128381701918348) internal successors, (2669), 2081 states have internal predecessors, (2669), 574 states have call successors, (574), 229 states have call predecessors, (574), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:53,260 INFO L87 Difference]: Start difference. First operand 2836 states. Second operand has 2836 states, 2033 states have (on average 1.3128381701918348) internal successors, (2669), 2081 states have internal predecessors, (2669), 574 states have call successors, (574), 229 states have call predecessors, (574), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:53,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:53,488 INFO L93 Difference]: Finished difference Result 2836 states and 3815 transitions. [2022-02-20 21:44:53,488 INFO L276 IsEmpty]: Start isEmpty. Operand 2836 states and 3815 transitions. [2022-02-20 21:44:53,495 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:53,495 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:53,500 INFO L74 IsIncluded]: Start isIncluded. First operand has 2836 states, 2033 states have (on average 1.3128381701918348) internal successors, (2669), 2081 states have internal predecessors, (2669), 574 states have call successors, (574), 229 states have call predecessors, (574), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) Second operand 2836 states. [2022-02-20 21:44:53,503 INFO L87 Difference]: Start difference. First operand has 2836 states, 2033 states have (on average 1.3128381701918348) internal successors, (2669), 2081 states have internal predecessors, (2669), 574 states have call successors, (574), 229 states have call predecessors, (574), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) Second operand 2836 states. [2022-02-20 21:44:53,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:53,720 INFO L93 Difference]: Finished difference Result 2836 states and 3815 transitions. [2022-02-20 21:44:53,720 INFO L276 IsEmpty]: Start isEmpty. Operand 2836 states and 3815 transitions. [2022-02-20 21:44:53,727 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:53,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:53,728 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:53,728 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:53,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2836 states, 2033 states have (on average 1.3128381701918348) internal successors, (2669), 2081 states have internal predecessors, (2669), 574 states have call successors, (574), 229 states have call predecessors, (574), 228 states have return successors, (572), 553 states have call predecessors, (572), 572 states have call successors, (572) [2022-02-20 21:44:54,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2836 states to 2836 states and 3815 transitions. [2022-02-20 21:44:54,100 INFO L78 Accepts]: Start accepts. Automaton has 2836 states and 3815 transitions. Word has length 26 [2022-02-20 21:44:54,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:44:54,101 INFO L470 AbstractCegarLoop]: Abstraction has 2836 states and 3815 transitions. [2022-02-20 21:44:54,101 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:54,101 INFO L276 IsEmpty]: Start isEmpty. Operand 2836 states and 3815 transitions. [2022-02-20 21:44:54,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-02-20 21:44:54,103 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:54,103 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:54,103 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 21:44:54,103 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:54,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:54,104 INFO L85 PathProgramCache]: Analyzing trace with hash -672278788, now seen corresponding path program 1 times [2022-02-20 21:44:54,104 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:54,104 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071035596] [2022-02-20 21:44:54,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:54,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:54,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:54,256 INFO L290 TraceCheckUtils]: 0: Hoare triple {55284#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(70, 2);call #Ultimate.allocInit(125, 3);call #Ultimate.allocInit(124, 4);call #Ultimate.allocInit(27, 5);call #Ultimate.allocInit(25, 6);call #Ultimate.allocInit(15, 7);call #Ultimate.allocInit(4, 8);call write~init~int(73, 8, 0, 1);call write~init~int(68, 8, 1, 1);call write~init~int(65, 8, 2, 1);call write~init~int(0, 8, 3, 1);call #Ultimate.allocInit(6, 9);call write~init~int(73, 9, 0, 1);call write~init~int(68, 9, 1, 1);call write~init~int(65, 9, 2, 1);call write~init~int(45, 9, 3, 1);call write~init~int(50, 9, 4, 1);call write~init~int(0, 9, 5, 1);call #Ultimate.allocInit(5, 10);call write~init~int(73, 10, 0, 1);call write~init~int(65, 10, 1, 1);call write~init~int(69, 10, 2, 1);call write~init~int(83, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(6, 11);call write~init~int(83, 11, 0, 1);call write~init~int(77, 11, 1, 1);call write~init~int(65, 11, 2, 1);call write~init~int(82, 11, 3, 1);call write~init~int(84, 11, 4, 1);call write~init~int(0, 11, 5, 1);call #Ultimate.allocInit(10, 12);call #Ultimate.allocInit(10, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(16, 19);call #Ultimate.allocInit(17, 20);call #Ultimate.allocInit(19, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(16, 23);call #Ultimate.allocInit(304, 24);call #Ultimate.allocInit(21, 25);call #Ultimate.allocInit(33, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(37, 29);call #Ultimate.allocInit(63, 30);call #Ultimate.allocInit(63, 31);call #Ultimate.allocInit(40, 32);call #Ultimate.allocInit(32, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(17, 35);call #Ultimate.allocInit(11, 36);call #Ultimate.allocInit(25, 37);call #Ultimate.allocInit(64, 38);call #Ultimate.allocInit(6, 39);call write~init~int(105, 39, 0, 1);call write~init~int(100, 39, 1, 1);call write~init~int(97, 39, 2, 1);call write~init~int(37, 39, 3, 1);call write~init~int(100, 39, 4, 1);call write~init~int(0, 39, 5, 1);call #Ultimate.allocInit(9, 40);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(9, 42);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(61, 44);call #Ultimate.allocInit(40, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(46, 47);call #Ultimate.allocInit(9, 48);call #Ultimate.allocInit(65, 49);call #Ultimate.allocInit(79, 50);call #Ultimate.allocInit(79, 51);call #Ultimate.allocInit(9, 52);call #Ultimate.allocInit(61, 53);call #Ultimate.allocInit(6, 54);call write~init~int(105, 54, 0, 1);call write~init~int(100, 54, 1, 1);call write~init~int(97, 54, 2, 1);call write~init~int(37, 54, 3, 1);call write~init~int(100, 54, 4, 1);call write~init~int(0, 54, 5, 1);call #Ultimate.allocInit(46, 55);call #Ultimate.allocInit(32, 56);call #Ultimate.allocInit(28, 57);call #Ultimate.allocInit(71, 58);call #Ultimate.allocInit(40, 59);call #Ultimate.allocInit(52, 60);call #Ultimate.allocInit(79, 61);call #Ultimate.allocInit(79, 62);call #Ultimate.allocInit(101, 63);call #Ultimate.allocInit(59, 64);call #Ultimate.allocInit(54, 65);call #Ultimate.allocInit(66, 66);call #Ultimate.allocInit(50, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(28, 69);call #Ultimate.allocInit(28, 70);call #Ultimate.allocInit(28, 71);call #Ultimate.allocInit(40, 72);call #Ultimate.allocInit(7, 73);call write~init~int(32, 73, 0, 1);call write~init~int(40, 73, 1, 1);call write~init~int(37, 73, 2, 1);call write~init~int(115, 73, 3, 1);call write~init~int(41, 73, 4, 1);call write~init~int(10, 73, 5, 1);call write~init~int(0, 73, 6, 1);call #Ultimate.allocInit(117, 74);call #Ultimate.allocInit(134, 75);call #Ultimate.allocInit(43, 76);call #Ultimate.allocInit(39, 77);call #Ultimate.allocInit(40, 78);call #Ultimate.allocInit(16, 79);~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~#smart4_access~0.base, ~#smart4_access~0.offset := 80, 0;call #Ultimate.allocInit(40, 80);call write~init~$Pointer$(#funAddr~smart4_submit_command.base, #funAddr~smart4_submit_command.offset, ~#smart4_access~0.base, ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_mask.base, #funAddr~smart4_intr_mask.offset, ~#smart4_access~0.base, 8 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_fifo_full.base, #funAddr~smart4_fifo_full.offset, ~#smart4_access~0.base, 16 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_pending.base, #funAddr~smart4_intr_pending.offset, ~#smart4_access~0.base, 24 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_completed.base, #funAddr~smart4_completed.offset, ~#smart4_access~0.base, 32 + ~#smart4_access~0.offset, 8);~#smart2_access~0.base, ~#smart2_access~0.offset := 81, 0;call #Ultimate.allocInit(40, 81);call write~init~$Pointer$(#funAddr~smart2_submit_command.base, #funAddr~smart2_submit_command.offset, ~#smart2_access~0.base, ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_mask.base, #funAddr~smart2_intr_mask.offset, ~#smart2_access~0.base, 8 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_fifo_full.base, #funAddr~smart2_fifo_full.offset, ~#smart2_access~0.base, 16 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_pending.base, #funAddr~smart2_intr_pending.offset, ~#smart2_access~0.base, 24 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_completed.base, #funAddr~smart2_completed.offset, ~#smart2_access~0.base, 32 + ~#smart2_access~0.offset, 8);~#smart2e_access~0.base, ~#smart2e_access~0.offset := 82, 0;call #Ultimate.allocInit(40, 82);call write~init~$Pointer$(#funAddr~smart2e_submit_command.base, #funAddr~smart2e_submit_command.offset, ~#smart2e_access~0.base, ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_mask.base, #funAddr~smart2e_intr_mask.offset, ~#smart2e_access~0.base, 8 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_fifo_full.base, #funAddr~smart2e_fifo_full.offset, ~#smart2e_access~0.base, 16 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_pending.base, #funAddr~smart2e_intr_pending.offset, ~#smart2e_access~0.base, 24 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_completed.base, #funAddr~smart2e_completed.offset, ~#smart2e_access~0.base, 32 + ~#smart2e_access~0.offset, 8);~#smart1_access~0.base, ~#smart1_access~0.offset := 83, 0;call #Ultimate.allocInit(40, 83);call write~init~$Pointer$(#funAddr~smart1_submit_command.base, #funAddr~smart1_submit_command.offset, ~#smart1_access~0.base, ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_mask.base, #funAddr~smart1_intr_mask.offset, ~#smart1_access~0.base, 8 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_fifo_full.base, #funAddr~smart1_fifo_full.offset, ~#smart1_access~0.base, 16 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_pending.base, #funAddr~smart1_intr_pending.offset, ~#smart1_access~0.base, 24 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_completed.base, #funAddr~smart1_completed.offset, ~#smart1_access~0.base, 32 + ~#smart1_access~0.offset, 8);~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset := 84, 0;call #Ultimate.allocInit(156, 84);call write~init~int(1, ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 4 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(3735899821, ~#cpqarray_mutex~0.base, 8 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(4294967295, ~#cpqarray_mutex~0.base, 12 + ~#cpqarray_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#cpqarray_mutex~0.base, 16 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 24 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 32 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 40 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(6, 0, ~#cpqarray_mutex~0.base, 48 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 56 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 60 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 80 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 88 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 96 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 104 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 112 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 120 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 128 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(7, 0, ~#cpqarray_mutex~0.base, 136 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 144 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 148 + ~#cpqarray_mutex~0.offset, 8);~nr_ctlr~0 := 0;~#hba~0.base, ~#hba~0.offset := 85, 0;call #Ultimate.allocInit(64, 85);call write~init~$Pointer$(0, 0, ~#hba~0.base, ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 8 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 16 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 24 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 32 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 40 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 48 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 56 + ~#hba~0.offset, 8);~#eisa~0.base, ~#eisa~0.offset := 86, 0;call #Ultimate.allocInit(32, 86);call write~init~int(0, ~#eisa~0.base, ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 4 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 8 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 12 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 16 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 20 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 24 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 28 + ~#eisa~0.offset, 4);~#products~0.base, ~#products~0.offset := 87, 0;call #Ultimate.allocInit(300, 87);call write~init~int(4198670, ~#products~0.base, ~#products~0.offset, 4);call write~init~$Pointer$(8, 0, ~#products~0.base, 4 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 12 + ~#products~0.offset, 8);call write~init~int(20975886, ~#products~0.base, 20 + ~#products~0.offset, 4);call write~init~$Pointer$(9, 0, ~#products~0.base, 24 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 32 + ~#products~0.offset, 8);call write~init~int(272634126, ~#products~0.base, 40 + ~#products~0.offset, 4);call write~init~$Pointer$(10, 0, ~#products~0.base, 44 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 52 + ~#products~0.offset, 8);call write~init~int(541069582, ~#products~0.base, 60 + ~#products~0.offset, 4);call write~init~$Pointer$(11, 0, ~#products~0.base, 64 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 72 + ~#products~0.offset, 8);call write~init~int(809505038, ~#products~0.base, 80 + ~#products~0.offset, 4);call write~init~$Pointer$(12, 0, ~#products~0.base, 84 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2e_access~0.base, ~#smart2e_access~0.offset, ~#products~0.base, 92 + ~#products~0.offset, 8);call write~init~int(1076891153, ~#products~0.base, 100 + ~#products~0.offset, 4);call write~init~$Pointer$(13, 0, ~#products~0.base, 104 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 112 + ~#products~0.offset, 8);call write~init~int(1076956689, ~#products~0.base, 120 + ~#products~0.offset, 4);call write~init~$Pointer$(14, 0, ~#products~0.base, 124 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 132 + ~#products~0.offset, 8);call write~init~int(1077022225, ~#products~0.base, 140 + ~#products~0.offset, 4);call write~init~$Pointer$(15, 0, ~#products~0.base, 144 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 152 + ~#products~0.offset, 8);call write~init~int(1077087761, ~#products~0.base, 160 + ~#products~0.offset, 4);call write~init~$Pointer$(16, 0, ~#products~0.base, 164 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 172 + ~#products~0.offset, 8);call write~init~int(1077153297, ~#products~0.base, 180 + ~#products~0.offset, 4);call write~init~$Pointer$(17, 0, ~#products~0.base, 184 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 192 + ~#products~0.offset, 8);call write~init~int(1077939729, ~#products~0.base, 200 + ~#products~0.offset, 4);call write~init~$Pointer$(18, 0, ~#products~0.base, 204 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 212 + ~#products~0.offset, 8);call write~init~int(1078464017, ~#products~0.base, 220 + ~#products~0.offset, 4);call write~init~$Pointer$(19, 0, ~#products~0.base, 224 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 232 + ~#products~0.offset, 8);call write~init~int(1078988305, ~#products~0.base, 240 + ~#products~0.offset, 4);call write~init~$Pointer$(20, 0, ~#products~0.base, 244 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 252 + ~#products~0.offset, 8);call write~init~int(1079053841, ~#products~0.base, 260 + ~#products~0.offset, 4);call write~init~$Pointer$(21, 0, ~#products~0.base, 264 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 272 + ~#products~0.offset, 8);call write~init~int(1079512593, ~#products~0.base, 280 + ~#products~0.offset, 4);call write~init~$Pointer$(22, 0, ~#products~0.base, 284 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 292 + ~#products~0.offset, 8);~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset := 88, 0;call #Ultimate.allocInit(352, 88);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 4 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 8 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16472, ~#cpqarray_pci_device_id~0.base, 12 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 16 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 20 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 24 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 32 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 36 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 40 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16465, ~#cpqarray_pci_device_id~0.base, 44 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 48 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 52 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 56 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 64 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 68 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 72 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16464, ~#cpqarray_pci_device_id~0.base, 76 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 80 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 84 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 88 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 96 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 100 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 104 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16456, ~#cpqarray_pci_device_id~0.base, 108 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 112 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 116 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 120 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 128 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 132 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 136 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16448, ~#cpqarray_pci_device_id~0.base, 140 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 144 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 148 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 152 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 160 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 164 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 168 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16436, ~#cpqarray_pci_device_id~0.base, 172 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 176 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 180 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 184 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 192 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 196 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 200 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16435, ~#cpqarray_pci_device_id~0.base, 204 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 208 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 212 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 216 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 224 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 228 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 232 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16434, ~#cpqarray_pci_device_id~0.base, 236 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 240 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 244 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 248 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 256 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 260 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 264 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16433, ~#cpqarray_pci_device_id~0.base, 268 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 272 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 276 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 280 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 288 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 292 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 296 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16432, ~#cpqarray_pci_device_id~0.base, 300 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 304 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 308 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 312 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 320 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 324 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 328 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 332 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 336 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 340 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 344 + ~#cpqarray_pci_device_id~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#ida_gendisk~0.base, ~#ida_gendisk~0.offset := 89, 0;call #Ultimate.allocInit(1024, 89);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base);~#ida_fops~0.base, ~#ida_fops~0.offset := 90, 0;call #Ultimate.allocInit(96, 90);call write~init~$Pointer$(#funAddr~ida_unlocked_open.base, #funAddr~ida_unlocked_open.offset, ~#ida_fops~0.base, ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_release.base, #funAddr~ida_release.offset, ~#ida_fops~0.base, 8 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_ioctl.base, #funAddr~ida_ioctl.offset, ~#ida_fops~0.base, 16 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 24 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 32 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 40 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 48 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 56 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_revalidate.base, #funAddr~ida_revalidate.offset, ~#ida_fops~0.base, 64 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_getgeo.base, #funAddr~ida_getgeo.offset, ~#ida_fops~0.base, 72 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 80 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_fops~0.base, 88 + ~#ida_fops~0.offset, 8);~proc_array~0.base, ~proc_array~0.offset := 0, 0;~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset := 91, 0;call #Ultimate.allocInit(216, 91);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_lseek.base, #funAddr~seq_lseek.offset, ~#ida_proc_fops~0.base, 8 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_read.base, #funAddr~seq_read.offset, ~#ida_proc_fops~0.base, 16 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 24 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 32 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 40 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 48 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 56 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 64 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 72 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 80 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_proc_open.base, #funAddr~ida_proc_open.offset, ~#ida_proc_fops~0.base, 88 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 96 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~single_release.base, #funAddr~single_release.offset, ~#ida_proc_fops~0.base, 104 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 112 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 120 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 128 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 136 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 144 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 152 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 160 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 168 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 176 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 184 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 192 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 200 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 208 + ~#ida_proc_fops~0.offset, 8);~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset := 92, 0;call #Ultimate.allocInit(301, 92);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 8 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(40, 0, ~#cpqarray_pci_driver~0.base, 16 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, ~#cpqarray_pci_driver~0.base, 24 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_init_one.base, #funAddr~cpqarray_init_one.offset, ~#cpqarray_pci_driver~0.base, 32 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_remove_one_pci.base, #funAddr~cpqarray_remove_one_pci.offset, ~#cpqarray_pci_driver~0.base, 40 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 48 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 56 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 64 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 72 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 80 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 88 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 96 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 104 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 112 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 120 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 128 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 136 + ~#cpqarray_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 137 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 145 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 153 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 161 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 169 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 177 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 185 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 193 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 201 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 209 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 217 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 221 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 225 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 229 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 237 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 245 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 253 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 261 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 269 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 273 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 285 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 293 + ~#cpqarray_pci_driver~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg32~0.base, ~ldvarg32~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg23~0 := 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg1~0 := 0;~ldvarg37~0.base, ~ldvarg37~0.offset := 0, 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg29~0.base, ~ldvarg29~0.offset := 0, 0;~ldvarg24~0.base, ~ldvarg24~0.offset := 0, 0;~ldvarg35~0.base, ~ldvarg35~0.offset := 0, 0;~ida_fops_group0~0.base, ~ida_fops_group0~0.offset := 0, 0;~ida_proc_fops_group1~0.base, ~ida_proc_fops_group1~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg38~0.base, ~ldvarg38~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0.base, ~ldvarg33~0.offset := 0, 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg14~0 := 0;~ldvarg4~0.base, ~ldvarg4~0.offset := 0, 0;~ldvarg34~0 := 0;~ldvarg28~0.base, ~ldvarg28~0.offset := 0, 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldvarg39~0.base, ~ldvarg39~0.offset := 0, 0;~ldvarg31~0.base, ~ldvarg31~0.offset := 0, 0;~ldvarg20~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~ldvarg36~0.base, ~ldvarg36~0.offset := 0, 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~cpqarray_pci_driver_group0~0.base, ~cpqarray_pci_driver_group0~0.offset := 0, 0;~ida_proc_fops_group2~0.base, ~ida_proc_fops_group2~0.offset := 0, 0;~ldvarg27~0 := 0;~ldvarg26~0.base, ~ldvarg26~0.offset := 0, 0;~ldvarg30~0.base, ~ldvarg30~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg21~0 := 0;~ida_fops_group1~0.base, ~ida_fops_group1~0.offset := 0, 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg17~0.base, ~ldvarg17~0.offset := 0, 0;~ldvarg22~0.base, ~ldvarg22~0.offset := 0, 0;~ldvarg19~0.base, ~ldvarg19~0.offset := 0, 0;~ldv_retval_3~0 := 0;~ldv_mutex_cpqarray_mutex~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {55284#true} is VALID [2022-02-20 21:44:54,257 INFO L290 TraceCheckUtils]: 1: Hoare triple {55284#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet964#1, main_#t~switch965#1, main_#t~nondet966#1, main_#t~switch967#1, main_#t~ret968#1, main_#t~ret969#1, main_#t~ret970#1, main_#t~nondet971#1, main_#t~switch972#1, main_#t~ret973#1, main_#t~ret974#1, main_#t~ret975#1, main_#t~ret976#1, main_#t~ret977#1, main_#t~ret978#1, main_#t~ret979#1, main_#t~ret980#1, main_#t~nondet981#1, main_#t~switch982#1, main_#t~ret983#1, main_#t~ret984#1, main_#t~ret985#1, main_#t~nondet986#1, main_#t~switch987#1, main_#t~ret988#1, main_#t~ret989#1, main_#t~ret990#1, main_#t~ret991#1, main_#t~nondet992#1, main_#t~switch993#1, main_#t~ret994#1, main_#t~nondet995#1, main_#t~switch996#1, main_#t~ret997#1, main_#t~ret998#1, main_#t~ret999#1, main_#t~nondet1000#1, main_#t~switch1001#1, main_#t~ret1002#1, main_#t~nondet1003#1, main_#t~switch1004#1, main_#t~ret1005#1, main_#t~ret1006#1, main_#t~ret1007#1, main_~tmp~66#1, main_~tmp___0~26#1, main_~tmp___1~17#1, main_~tmp___2~10#1, main_~tmp___3~6#1, main_~tmp___4~3#1, main_~tmp___5~2#1, main_~tmp___6~2#1, main_~tmp___7~2#1;havoc main_~tmp~66#1;havoc main_~tmp___0~26#1;havoc main_~tmp___1~17#1;havoc main_~tmp___2~10#1;havoc main_~tmp___3~6#1;havoc main_~tmp___4~3#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;havoc main_~tmp___7~2#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cpqarray_mutex~0 := 1;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,258 INFO L290 TraceCheckUtils]: 2: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,258 INFO L290 TraceCheckUtils]: 3: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,258 INFO L290 TraceCheckUtils]: 4: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,259 INFO L290 TraceCheckUtils]: 5: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 2 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,259 INFO L290 TraceCheckUtils]: 6: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 3 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,260 INFO L290 TraceCheckUtils]: 7: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 4 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,260 INFO L290 TraceCheckUtils]: 8: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 5 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,260 INFO L290 TraceCheckUtils]: 9: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 6 == main_~tmp~66#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,261 INFO L290 TraceCheckUtils]: 10: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume main_#t~switch965#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,261 INFO L290 TraceCheckUtils]: 11: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1000#1 && main_#t~nondet1000#1 <= 2147483647;main_~tmp___6~2#1 := main_#t~nondet1000#1;havoc main_#t~nondet1000#1;main_#t~switch1001#1 := 0 == main_~tmp___6~2#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,261 INFO L290 TraceCheckUtils]: 12: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch1001#1;main_#t~switch1001#1 := main_#t~switch1001#1 || 1 == main_~tmp___6~2#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,262 INFO L290 TraceCheckUtils]: 13: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume main_#t~switch1001#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,263 INFO L290 TraceCheckUtils]: 14: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cpqarray_init } true;havoc cpqarray_init_#res#1;havoc cpqarray_init_#t~nondet520#1, cpqarray_init_#t~ret521#1, cpqarray_init_#t~ret522#1, cpqarray_init_#t~mem523#1.base, cpqarray_init_#t~mem523#1.offset, cpqarray_init_~num_cntlrs_reg~0#1, cpqarray_init_~i~3#1, cpqarray_init_~rc~0#1;havoc cpqarray_init_~num_cntlrs_reg~0#1;havoc cpqarray_init_~i~3#1;havoc cpqarray_init_~rc~0#1;cpqarray_init_~num_cntlrs_reg~0#1 := 0;cpqarray_init_~rc~0#1 := 0;havoc cpqarray_init_#t~nondet520#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 42, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1030#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1030#1 && __pci_register_driver_#t~nondet1030#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1030#1;havoc __pci_register_driver_#t~nondet1030#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,263 INFO L290 TraceCheckUtils]: 15: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} cpqarray_init_#t~ret521#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= cpqarray_init_#t~ret521#1 && cpqarray_init_#t~ret521#1 <= 2147483647;cpqarray_init_~rc~0#1 := cpqarray_init_#t~ret521#1;havoc cpqarray_init_#t~ret521#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,265 INFO L290 TraceCheckUtils]: 16: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != cpqarray_init_~rc~0#1;cpqarray_init_#res#1 := cpqarray_init_~rc~0#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,266 INFO L290 TraceCheckUtils]: 17: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} main_#t~ret1002#1 := cpqarray_init_#res#1;assume { :end_inline_cpqarray_init } true;assume -2147483648 <= main_#t~ret1002#1 && main_#t~ret1002#1 <= 2147483647;~ldv_retval_3~0 := main_#t~ret1002#1;havoc main_#t~ret1002#1; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,266 INFO L290 TraceCheckUtils]: 18: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !(0 == ~ldv_retval_3~0); {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,267 INFO L290 TraceCheckUtils]: 19: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != ~ldv_retval_3~0;~ldv_state_variable_0~0 := 2; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,267 INFO L290 TraceCheckUtils]: 20: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume { :begin_inline_ldv_check_final_state } true; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,268 INFO L290 TraceCheckUtils]: 21: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_cpqarray_mutex~0; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,269 INFO L290 TraceCheckUtils]: 22: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,269 INFO L290 TraceCheckUtils]: 23: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_lock~0; {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:44:54,270 INFO L290 TraceCheckUtils]: 24: Hoare triple {55286#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !(1 == ~ldv_mutex_mutex_of_device~0); {55285#false} is VALID [2022-02-20 21:44:54,271 INFO L272 TraceCheckUtils]: 25: Hoare triple {55285#false} call ldv_error(); {55285#false} is VALID [2022-02-20 21:44:54,271 INFO L290 TraceCheckUtils]: 26: Hoare triple {55285#false} assume !false; {55285#false} is VALID [2022-02-20 21:44:54,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:54,271 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:54,272 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071035596] [2022-02-20 21:44:54,272 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071035596] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:54,272 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:54,272 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:54,272 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1550064400] [2022-02-20 21:44:54,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:54,273 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-02-20 21:44:54,274 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:54,274 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:54,307 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:54,308 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:54,308 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:54,308 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:54,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:54,309 INFO L87 Difference]: Start difference. First operand 2836 states and 3815 transitions. Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:57,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:57,492 INFO L93 Difference]: Finished difference Result 2838 states and 3816 transitions. [2022-02-20 21:44:57,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:57,493 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-02-20 21:44:57,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:57,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:57,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1863 transitions. [2022-02-20 21:44:57,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:57,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1863 transitions. [2022-02-20 21:44:57,576 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1863 transitions. [2022-02-20 21:44:58,924 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1863 edges. 1863 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:59,249 INFO L225 Difference]: With dead ends: 2838 [2022-02-20 21:44:59,250 INFO L226 Difference]: Without dead ends: 2809 [2022-02-20 21:44:59,251 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:59,252 INFO L933 BasicCegarLoop]: 1860 mSDtfsCounter, 1836 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1836 SdHoareTripleChecker+Valid, 1860 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:59,252 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1836 Valid, 1860 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:59,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2809 states. [2022-02-20 21:44:59,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2809 to 2809. [2022-02-20 21:44:59,309 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:59,312 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2809 states. Second operand has 2809 states, 2013 states have (on average 1.3109786388474913) internal successors, (2639), 2057 states have internal predecessors, (2639), 567 states have call successors, (567), 229 states have call predecessors, (567), 228 states have return successors, (566), 548 states have call predecessors, (566), 566 states have call successors, (566) [2022-02-20 21:44:59,315 INFO L74 IsIncluded]: Start isIncluded. First operand 2809 states. Second operand has 2809 states, 2013 states have (on average 1.3109786388474913) internal successors, (2639), 2057 states have internal predecessors, (2639), 567 states have call successors, (567), 229 states have call predecessors, (567), 228 states have return successors, (566), 548 states have call predecessors, (566), 566 states have call successors, (566) [2022-02-20 21:44:59,317 INFO L87 Difference]: Start difference. First operand 2809 states. Second operand has 2809 states, 2013 states have (on average 1.3109786388474913) internal successors, (2639), 2057 states have internal predecessors, (2639), 567 states have call successors, (567), 229 states have call predecessors, (567), 228 states have return successors, (566), 548 states have call predecessors, (566), 566 states have call successors, (566) [2022-02-20 21:44:59,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:59,517 INFO L93 Difference]: Finished difference Result 2809 states and 3772 transitions. [2022-02-20 21:44:59,517 INFO L276 IsEmpty]: Start isEmpty. Operand 2809 states and 3772 transitions. [2022-02-20 21:44:59,523 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:59,523 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:59,527 INFO L74 IsIncluded]: Start isIncluded. First operand has 2809 states, 2013 states have (on average 1.3109786388474913) internal successors, (2639), 2057 states have internal predecessors, (2639), 567 states have call successors, (567), 229 states have call predecessors, (567), 228 states have return successors, (566), 548 states have call predecessors, (566), 566 states have call successors, (566) Second operand 2809 states. [2022-02-20 21:44:59,529 INFO L87 Difference]: Start difference. First operand has 2809 states, 2013 states have (on average 1.3109786388474913) internal successors, (2639), 2057 states have internal predecessors, (2639), 567 states have call successors, (567), 229 states have call predecessors, (567), 228 states have return successors, (566), 548 states have call predecessors, (566), 566 states have call successors, (566) Second operand 2809 states. [2022-02-20 21:44:59,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:59,731 INFO L93 Difference]: Finished difference Result 2809 states and 3772 transitions. [2022-02-20 21:44:59,731 INFO L276 IsEmpty]: Start isEmpty. Operand 2809 states and 3772 transitions. [2022-02-20 21:44:59,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:59,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:59,737 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:59,737 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:59,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2809 states, 2013 states have (on average 1.3109786388474913) internal successors, (2639), 2057 states have internal predecessors, (2639), 567 states have call successors, (567), 229 states have call predecessors, (567), 228 states have return successors, (566), 548 states have call predecessors, (566), 566 states have call successors, (566) [2022-02-20 21:45:00,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2809 states to 2809 states and 3772 transitions. [2022-02-20 21:45:00,078 INFO L78 Accepts]: Start accepts. Automaton has 2809 states and 3772 transitions. Word has length 27 [2022-02-20 21:45:00,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:45:00,078 INFO L470 AbstractCegarLoop]: Abstraction has 2809 states and 3772 transitions. [2022-02-20 21:45:00,079 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:00,079 INFO L276 IsEmpty]: Start isEmpty. Operand 2809 states and 3772 transitions. [2022-02-20 21:45:00,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-02-20 21:45:00,084 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:45:00,084 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:45:00,084 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 21:45:00,084 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:45:00,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:45:00,085 INFO L85 PathProgramCache]: Analyzing trace with hash -1632944944, now seen corresponding path program 1 times [2022-02-20 21:45:00,085 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:45:00,085 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498312515] [2022-02-20 21:45:00,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:45:00,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:45:00,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:00,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:45:00,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:00,192 INFO L290 TraceCheckUtils]: 0: Hoare triple {68790#(= |old(~ldv_mutex_cpqarray_mutex~0)| ~ldv_mutex_cpqarray_mutex~0)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {68776#true} is VALID [2022-02-20 21:45:00,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {68776#true} assume 1 == ~ldv_mutex_cpqarray_mutex~0; {68776#true} is VALID [2022-02-20 21:45:00,192 INFO L290 TraceCheckUtils]: 2: Hoare triple {68776#true} ~ldv_mutex_cpqarray_mutex~0 := 2; {68776#true} is VALID [2022-02-20 21:45:00,192 INFO L290 TraceCheckUtils]: 3: Hoare triple {68776#true} assume true; {68776#true} is VALID [2022-02-20 21:45:00,192 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {68776#true} {68777#false} #3419#return; {68777#false} is VALID [2022-02-20 21:45:00,192 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 21:45:00,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:00,198 INFO L290 TraceCheckUtils]: 0: Hoare triple {68776#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {68776#true} is VALID [2022-02-20 21:45:00,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {68776#true} assume true; {68776#true} is VALID [2022-02-20 21:45:00,198 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {68776#true} {68777#false} #3421#return; {68777#false} is VALID [2022-02-20 21:45:00,199 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-02-20 21:45:00,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:00,210 INFO L290 TraceCheckUtils]: 0: Hoare triple {68776#true} ~disk.base, ~disk.offset := #in~disk.base, #in~disk.offset;call #t~mem344.base, #t~mem344.offset := read~$Pointer$(~disk.base, 1267 + ~disk.offset, 8);call #t~mem345.base, #t~mem345.offset := read~$Pointer$(#t~mem344.base, 1736 + #t~mem344.offset, 8);#res.base, #res.offset := #t~mem345.base, #t~mem345.offset;havoc #t~mem344.base, #t~mem344.offset;havoc #t~mem345.base, #t~mem345.offset; {68776#true} is VALID [2022-02-20 21:45:00,210 INFO L290 TraceCheckUtils]: 1: Hoare triple {68776#true} assume true; {68776#true} is VALID [2022-02-20 21:45:00,211 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {68776#true} {68777#false} #3423#return; {68777#false} is VALID [2022-02-20 21:45:00,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {68776#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(70, 2);call #Ultimate.allocInit(125, 3);call #Ultimate.allocInit(124, 4);call #Ultimate.allocInit(27, 5);call #Ultimate.allocInit(25, 6);call #Ultimate.allocInit(15, 7);call #Ultimate.allocInit(4, 8);call write~init~int(73, 8, 0, 1);call write~init~int(68, 8, 1, 1);call write~init~int(65, 8, 2, 1);call write~init~int(0, 8, 3, 1);call #Ultimate.allocInit(6, 9);call write~init~int(73, 9, 0, 1);call write~init~int(68, 9, 1, 1);call write~init~int(65, 9, 2, 1);call write~init~int(45, 9, 3, 1);call write~init~int(50, 9, 4, 1);call write~init~int(0, 9, 5, 1);call #Ultimate.allocInit(5, 10);call write~init~int(73, 10, 0, 1);call write~init~int(65, 10, 1, 1);call write~init~int(69, 10, 2, 1);call write~init~int(83, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(6, 11);call write~init~int(83, 11, 0, 1);call write~init~int(77, 11, 1, 1);call write~init~int(65, 11, 2, 1);call write~init~int(82, 11, 3, 1);call write~init~int(84, 11, 4, 1);call write~init~int(0, 11, 5, 1);call #Ultimate.allocInit(10, 12);call #Ultimate.allocInit(10, 13);call #Ultimate.allocInit(10, 14);call #Ultimate.allocInit(17, 15);call #Ultimate.allocInit(19, 16);call #Ultimate.allocInit(16, 17);call #Ultimate.allocInit(17, 18);call #Ultimate.allocInit(16, 19);call #Ultimate.allocInit(17, 20);call #Ultimate.allocInit(19, 21);call #Ultimate.allocInit(16, 22);call #Ultimate.allocInit(16, 23);call #Ultimate.allocInit(304, 24);call #Ultimate.allocInit(21, 25);call #Ultimate.allocInit(33, 26);call #Ultimate.allocInit(30, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(37, 29);call #Ultimate.allocInit(63, 30);call #Ultimate.allocInit(63, 31);call #Ultimate.allocInit(40, 32);call #Ultimate.allocInit(32, 33);call #Ultimate.allocInit(24, 34);call #Ultimate.allocInit(17, 35);call #Ultimate.allocInit(11, 36);call #Ultimate.allocInit(25, 37);call #Ultimate.allocInit(64, 38);call #Ultimate.allocInit(6, 39);call write~init~int(105, 39, 0, 1);call write~init~int(100, 39, 1, 1);call write~init~int(97, 39, 2, 1);call write~init~int(37, 39, 3, 1);call write~init~int(100, 39, 4, 1);call write~init~int(0, 39, 5, 1);call #Ultimate.allocInit(9, 40);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(9, 42);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(61, 44);call #Ultimate.allocInit(40, 45);call #Ultimate.allocInit(35, 46);call #Ultimate.allocInit(46, 47);call #Ultimate.allocInit(9, 48);call #Ultimate.allocInit(65, 49);call #Ultimate.allocInit(79, 50);call #Ultimate.allocInit(79, 51);call #Ultimate.allocInit(9, 52);call #Ultimate.allocInit(61, 53);call #Ultimate.allocInit(6, 54);call write~init~int(105, 54, 0, 1);call write~init~int(100, 54, 1, 1);call write~init~int(97, 54, 2, 1);call write~init~int(37, 54, 3, 1);call write~init~int(100, 54, 4, 1);call write~init~int(0, 54, 5, 1);call #Ultimate.allocInit(46, 55);call #Ultimate.allocInit(32, 56);call #Ultimate.allocInit(28, 57);call #Ultimate.allocInit(71, 58);call #Ultimate.allocInit(40, 59);call #Ultimate.allocInit(52, 60);call #Ultimate.allocInit(79, 61);call #Ultimate.allocInit(79, 62);call #Ultimate.allocInit(101, 63);call #Ultimate.allocInit(59, 64);call #Ultimate.allocInit(54, 65);call #Ultimate.allocInit(66, 66);call #Ultimate.allocInit(50, 67);call #Ultimate.allocInit(28, 68);call #Ultimate.allocInit(28, 69);call #Ultimate.allocInit(28, 70);call #Ultimate.allocInit(28, 71);call #Ultimate.allocInit(40, 72);call #Ultimate.allocInit(7, 73);call write~init~int(32, 73, 0, 1);call write~init~int(40, 73, 1, 1);call write~init~int(37, 73, 2, 1);call write~init~int(115, 73, 3, 1);call write~init~int(41, 73, 4, 1);call write~init~int(10, 73, 5, 1);call write~init~int(0, 73, 6, 1);call #Ultimate.allocInit(117, 74);call #Ultimate.allocInit(134, 75);call #Ultimate.allocInit(43, 76);call #Ultimate.allocInit(39, 77);call #Ultimate.allocInit(40, 78);call #Ultimate.allocInit(16, 79);~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~#smart4_access~0.base, ~#smart4_access~0.offset := 80, 0;call #Ultimate.allocInit(40, 80);call write~init~$Pointer$(#funAddr~smart4_submit_command.base, #funAddr~smart4_submit_command.offset, ~#smart4_access~0.base, ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_mask.base, #funAddr~smart4_intr_mask.offset, ~#smart4_access~0.base, 8 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_fifo_full.base, #funAddr~smart4_fifo_full.offset, ~#smart4_access~0.base, 16 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_intr_pending.base, #funAddr~smart4_intr_pending.offset, ~#smart4_access~0.base, 24 + ~#smart4_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart4_completed.base, #funAddr~smart4_completed.offset, ~#smart4_access~0.base, 32 + ~#smart4_access~0.offset, 8);~#smart2_access~0.base, ~#smart2_access~0.offset := 81, 0;call #Ultimate.allocInit(40, 81);call write~init~$Pointer$(#funAddr~smart2_submit_command.base, #funAddr~smart2_submit_command.offset, ~#smart2_access~0.base, ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_mask.base, #funAddr~smart2_intr_mask.offset, ~#smart2_access~0.base, 8 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_fifo_full.base, #funAddr~smart2_fifo_full.offset, ~#smart2_access~0.base, 16 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_intr_pending.base, #funAddr~smart2_intr_pending.offset, ~#smart2_access~0.base, 24 + ~#smart2_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2_completed.base, #funAddr~smart2_completed.offset, ~#smart2_access~0.base, 32 + ~#smart2_access~0.offset, 8);~#smart2e_access~0.base, ~#smart2e_access~0.offset := 82, 0;call #Ultimate.allocInit(40, 82);call write~init~$Pointer$(#funAddr~smart2e_submit_command.base, #funAddr~smart2e_submit_command.offset, ~#smart2e_access~0.base, ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_mask.base, #funAddr~smart2e_intr_mask.offset, ~#smart2e_access~0.base, 8 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_fifo_full.base, #funAddr~smart2e_fifo_full.offset, ~#smart2e_access~0.base, 16 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_intr_pending.base, #funAddr~smart2e_intr_pending.offset, ~#smart2e_access~0.base, 24 + ~#smart2e_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart2e_completed.base, #funAddr~smart2e_completed.offset, ~#smart2e_access~0.base, 32 + ~#smart2e_access~0.offset, 8);~#smart1_access~0.base, ~#smart1_access~0.offset := 83, 0;call #Ultimate.allocInit(40, 83);call write~init~$Pointer$(#funAddr~smart1_submit_command.base, #funAddr~smart1_submit_command.offset, ~#smart1_access~0.base, ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_mask.base, #funAddr~smart1_intr_mask.offset, ~#smart1_access~0.base, 8 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_fifo_full.base, #funAddr~smart1_fifo_full.offset, ~#smart1_access~0.base, 16 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_intr_pending.base, #funAddr~smart1_intr_pending.offset, ~#smart1_access~0.base, 24 + ~#smart1_access~0.offset, 8);call write~init~$Pointer$(#funAddr~smart1_completed.base, #funAddr~smart1_completed.offset, ~#smart1_access~0.base, 32 + ~#smart1_access~0.offset, 8);~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset := 84, 0;call #Ultimate.allocInit(156, 84);call write~init~int(1, ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 4 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(3735899821, ~#cpqarray_mutex~0.base, 8 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(4294967295, ~#cpqarray_mutex~0.base, 12 + ~#cpqarray_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#cpqarray_mutex~0.base, 16 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 24 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 32 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 40 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(6, 0, ~#cpqarray_mutex~0.base, 48 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 56 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 60 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, 72 + ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 80 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 88 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 96 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset, ~#cpqarray_mutex~0.base, 104 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 112 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 120 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_mutex~0.base, 128 + ~#cpqarray_mutex~0.offset, 8);call write~init~$Pointer$(7, 0, ~#cpqarray_mutex~0.base, 136 + ~#cpqarray_mutex~0.offset, 8);call write~init~int(0, ~#cpqarray_mutex~0.base, 144 + ~#cpqarray_mutex~0.offset, 4);call write~init~int(0, ~#cpqarray_mutex~0.base, 148 + ~#cpqarray_mutex~0.offset, 8);~nr_ctlr~0 := 0;~#hba~0.base, ~#hba~0.offset := 85, 0;call #Ultimate.allocInit(64, 85);call write~init~$Pointer$(0, 0, ~#hba~0.base, ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 8 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 16 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 24 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 32 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 40 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 48 + ~#hba~0.offset, 8);call write~init~$Pointer$(0, 0, ~#hba~0.base, 56 + ~#hba~0.offset, 8);~#eisa~0.base, ~#eisa~0.offset := 86, 0;call #Ultimate.allocInit(32, 86);call write~init~int(0, ~#eisa~0.base, ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 4 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 8 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 12 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 16 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 20 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 24 + ~#eisa~0.offset, 4);call write~init~int(0, ~#eisa~0.base, 28 + ~#eisa~0.offset, 4);~#products~0.base, ~#products~0.offset := 87, 0;call #Ultimate.allocInit(300, 87);call write~init~int(4198670, ~#products~0.base, ~#products~0.offset, 4);call write~init~$Pointer$(8, 0, ~#products~0.base, 4 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 12 + ~#products~0.offset, 8);call write~init~int(20975886, ~#products~0.base, 20 + ~#products~0.offset, 4);call write~init~$Pointer$(9, 0, ~#products~0.base, 24 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 32 + ~#products~0.offset, 8);call write~init~int(272634126, ~#products~0.base, 40 + ~#products~0.offset, 4);call write~init~$Pointer$(10, 0, ~#products~0.base, 44 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 52 + ~#products~0.offset, 8);call write~init~int(541069582, ~#products~0.base, 60 + ~#products~0.offset, 4);call write~init~$Pointer$(11, 0, ~#products~0.base, 64 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart1_access~0.base, ~#smart1_access~0.offset, ~#products~0.base, 72 + ~#products~0.offset, 8);call write~init~int(809505038, ~#products~0.base, 80 + ~#products~0.offset, 4);call write~init~$Pointer$(12, 0, ~#products~0.base, 84 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2e_access~0.base, ~#smart2e_access~0.offset, ~#products~0.base, 92 + ~#products~0.offset, 8);call write~init~int(1076891153, ~#products~0.base, 100 + ~#products~0.offset, 4);call write~init~$Pointer$(13, 0, ~#products~0.base, 104 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 112 + ~#products~0.offset, 8);call write~init~int(1076956689, ~#products~0.base, 120 + ~#products~0.offset, 4);call write~init~$Pointer$(14, 0, ~#products~0.base, 124 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 132 + ~#products~0.offset, 8);call write~init~int(1077022225, ~#products~0.base, 140 + ~#products~0.offset, 4);call write~init~$Pointer$(15, 0, ~#products~0.base, 144 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 152 + ~#products~0.offset, 8);call write~init~int(1077087761, ~#products~0.base, 160 + ~#products~0.offset, 4);call write~init~$Pointer$(16, 0, ~#products~0.base, 164 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 172 + ~#products~0.offset, 8);call write~init~int(1077153297, ~#products~0.base, 180 + ~#products~0.offset, 4);call write~init~$Pointer$(17, 0, ~#products~0.base, 184 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart2_access~0.base, ~#smart2_access~0.offset, ~#products~0.base, 192 + ~#products~0.offset, 8);call write~init~int(1077939729, ~#products~0.base, 200 + ~#products~0.offset, 4);call write~init~$Pointer$(18, 0, ~#products~0.base, 204 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 212 + ~#products~0.offset, 8);call write~init~int(1078464017, ~#products~0.base, 220 + ~#products~0.offset, 4);call write~init~$Pointer$(19, 0, ~#products~0.base, 224 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 232 + ~#products~0.offset, 8);call write~init~int(1078988305, ~#products~0.base, 240 + ~#products~0.offset, 4);call write~init~$Pointer$(20, 0, ~#products~0.base, 244 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 252 + ~#products~0.offset, 8);call write~init~int(1079053841, ~#products~0.base, 260 + ~#products~0.offset, 4);call write~init~$Pointer$(21, 0, ~#products~0.base, 264 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 272 + ~#products~0.offset, 8);call write~init~int(1079512593, ~#products~0.base, 280 + ~#products~0.offset, 4);call write~init~$Pointer$(22, 0, ~#products~0.base, 284 + ~#products~0.offset, 8);call write~init~$Pointer$(~#smart4_access~0.base, ~#smart4_access~0.offset, ~#products~0.base, 292 + ~#products~0.offset, 8);~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset := 88, 0;call #Ultimate.allocInit(352, 88);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 4 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 8 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16472, ~#cpqarray_pci_device_id~0.base, 12 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 16 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 20 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 24 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 32 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 36 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 40 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16465, ~#cpqarray_pci_device_id~0.base, 44 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 48 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 52 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 56 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4113, ~#cpqarray_pci_device_id~0.base, 64 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(70, ~#cpqarray_pci_device_id~0.base, 68 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 72 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16464, ~#cpqarray_pci_device_id~0.base, 76 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 80 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 84 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 88 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 96 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 100 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 104 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16456, ~#cpqarray_pci_device_id~0.base, 108 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 112 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 116 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 120 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(4096, ~#cpqarray_pci_device_id~0.base, 128 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16, ~#cpqarray_pci_device_id~0.base, 132 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 136 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16448, ~#cpqarray_pci_device_id~0.base, 140 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 144 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 148 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 152 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 160 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 164 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 168 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16436, ~#cpqarray_pci_device_id~0.base, 172 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 176 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 180 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 184 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 192 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 196 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 200 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16435, ~#cpqarray_pci_device_id~0.base, 204 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 208 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 212 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 216 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 224 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 228 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 232 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16434, ~#cpqarray_pci_device_id~0.base, 236 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 240 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 244 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 248 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 256 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 260 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 264 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16433, ~#cpqarray_pci_device_id~0.base, 268 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 272 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 276 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 280 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 288 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(44560, ~#cpqarray_pci_device_id~0.base, 292 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(3601, ~#cpqarray_pci_device_id~0.base, 296 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(16432, ~#cpqarray_pci_device_id~0.base, 300 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 304 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 308 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 312 + ~#cpqarray_pci_device_id~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 320 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 324 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 328 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 332 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 336 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 340 + ~#cpqarray_pci_device_id~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_device_id~0.base, 344 + ~#cpqarray_pci_device_id~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;~#ida_gendisk~0.base, ~#ida_gendisk~0.offset := 89, 0;call #Ultimate.allocInit(1024, 89);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#ida_gendisk~0.base);~#ida_fops~0.base, ~#ida_fops~0.offset := 90, 0;call #Ultimate.allocInit(96, 90);call write~init~$Pointer$(#funAddr~ida_unlocked_open.base, #funAddr~ida_unlocked_open.offset, ~#ida_fops~0.base, ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_release.base, #funAddr~ida_release.offset, ~#ida_fops~0.base, 8 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_ioctl.base, #funAddr~ida_ioctl.offset, ~#ida_fops~0.base, 16 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 24 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 32 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 40 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 48 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 56 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_revalidate.base, #funAddr~ida_revalidate.offset, ~#ida_fops~0.base, 64 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_getgeo.base, #funAddr~ida_getgeo.offset, ~#ida_fops~0.base, 72 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_fops~0.base, 80 + ~#ida_fops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_fops~0.base, 88 + ~#ida_fops~0.offset, 8);~proc_array~0.base, ~proc_array~0.offset := 0, 0;~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset := 91, 0;call #Ultimate.allocInit(216, 91);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#ida_proc_fops~0.base, ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_lseek.base, #funAddr~seq_lseek.offset, ~#ida_proc_fops~0.base, 8 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~seq_read.base, #funAddr~seq_read.offset, ~#ida_proc_fops~0.base, 16 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 24 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 32 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 40 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 48 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 56 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 64 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 72 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 80 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~ida_proc_open.base, #funAddr~ida_proc_open.offset, ~#ida_proc_fops~0.base, 88 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 96 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(#funAddr~single_release.base, #funAddr~single_release.offset, ~#ida_proc_fops~0.base, 104 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 112 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 120 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 128 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 136 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 144 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 152 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 160 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 168 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 176 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 184 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 192 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 200 + ~#ida_proc_fops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ida_proc_fops~0.base, 208 + ~#ida_proc_fops~0.offset, 8);~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset := 92, 0;call #Ultimate.allocInit(301, 92);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 8 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(40, 0, ~#cpqarray_pci_driver~0.base, 16 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(~#cpqarray_pci_device_id~0.base, ~#cpqarray_pci_device_id~0.offset, ~#cpqarray_pci_driver~0.base, 24 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_init_one.base, #funAddr~cpqarray_init_one.offset, ~#cpqarray_pci_driver~0.base, 32 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~cpqarray_remove_one_pci.base, #funAddr~cpqarray_remove_one_pci.offset, ~#cpqarray_pci_driver~0.base, 40 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 48 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 56 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 64 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 72 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 80 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 88 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 96 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 104 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 112 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 120 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 128 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 136 + ~#cpqarray_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 137 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 145 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 153 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 161 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 169 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 177 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 185 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 193 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 201 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 209 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 217 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 221 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 225 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 229 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 237 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 245 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 253 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 261 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 269 + ~#cpqarray_pci_driver~0.offset, 4);call write~init~int(0, ~#cpqarray_pci_driver~0.base, 273 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 285 + ~#cpqarray_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#cpqarray_pci_driver~0.base, 293 + ~#cpqarray_pci_driver~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg32~0.base, ~ldvarg32~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg23~0 := 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg1~0 := 0;~ldvarg37~0.base, ~ldvarg37~0.offset := 0, 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg29~0.base, ~ldvarg29~0.offset := 0, 0;~ldvarg24~0.base, ~ldvarg24~0.offset := 0, 0;~ldvarg35~0.base, ~ldvarg35~0.offset := 0, 0;~ida_fops_group0~0.base, ~ida_fops_group0~0.offset := 0, 0;~ida_proc_fops_group1~0.base, ~ida_proc_fops_group1~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg38~0.base, ~ldvarg38~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0.base, ~ldvarg33~0.offset := 0, 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg14~0 := 0;~ldvarg4~0.base, ~ldvarg4~0.offset := 0, 0;~ldvarg34~0 := 0;~ldvarg28~0.base, ~ldvarg28~0.offset := 0, 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldvarg39~0.base, ~ldvarg39~0.offset := 0, 0;~ldvarg31~0.base, ~ldvarg31~0.offset := 0, 0;~ldvarg20~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~ldvarg36~0.base, ~ldvarg36~0.offset := 0, 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~cpqarray_pci_driver_group0~0.base, ~cpqarray_pci_driver_group0~0.offset := 0, 0;~ida_proc_fops_group2~0.base, ~ida_proc_fops_group2~0.offset := 0, 0;~ldvarg27~0 := 0;~ldvarg26~0.base, ~ldvarg26~0.offset := 0, 0;~ldvarg30~0.base, ~ldvarg30~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg21~0 := 0;~ida_fops_group1~0.base, ~ida_fops_group1~0.offset := 0, 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg17~0.base, ~ldvarg17~0.offset := 0, 0;~ldvarg22~0.base, ~ldvarg22~0.offset := 0, 0;~ldvarg19~0.base, ~ldvarg19~0.offset := 0, 0;~ldv_retval_3~0 := 0;~ldv_mutex_cpqarray_mutex~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {68776#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet964#1, main_#t~switch965#1, main_#t~nondet966#1, main_#t~switch967#1, main_#t~ret968#1, main_#t~ret969#1, main_#t~ret970#1, main_#t~nondet971#1, main_#t~switch972#1, main_#t~ret973#1, main_#t~ret974#1, main_#t~ret975#1, main_#t~ret976#1, main_#t~ret977#1, main_#t~ret978#1, main_#t~ret979#1, main_#t~ret980#1, main_#t~nondet981#1, main_#t~switch982#1, main_#t~ret983#1, main_#t~ret984#1, main_#t~ret985#1, main_#t~nondet986#1, main_#t~switch987#1, main_#t~ret988#1, main_#t~ret989#1, main_#t~ret990#1, main_#t~ret991#1, main_#t~nondet992#1, main_#t~switch993#1, main_#t~ret994#1, main_#t~nondet995#1, main_#t~switch996#1, main_#t~ret997#1, main_#t~ret998#1, main_#t~ret999#1, main_#t~nondet1000#1, main_#t~switch1001#1, main_#t~ret1002#1, main_#t~nondet1003#1, main_#t~switch1004#1, main_#t~ret1005#1, main_#t~ret1006#1, main_#t~ret1007#1, main_~tmp~66#1, main_~tmp___0~26#1, main_~tmp___1~17#1, main_~tmp___2~10#1, main_~tmp___3~6#1, main_~tmp___4~3#1, main_~tmp___5~2#1, main_~tmp___6~2#1, main_~tmp___7~2#1;havoc main_~tmp~66#1;havoc main_~tmp___0~26#1;havoc main_~tmp___1~17#1;havoc main_~tmp___2~10#1;havoc main_~tmp___3~6#1;havoc main_~tmp___4~3#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;havoc main_~tmp___7~2#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cpqarray_mutex~0 := 1;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 2: Hoare triple {68776#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 3: Hoare triple {68776#true} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 4: Hoare triple {68776#true} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 5: Hoare triple {68776#true} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 2 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 6: Hoare triple {68776#true} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 3 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,212 INFO L290 TraceCheckUtils]: 7: Hoare triple {68776#true} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 4 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 8: Hoare triple {68776#true} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 5 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 9: Hoare triple {68776#true} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 6 == main_~tmp~66#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 10: Hoare triple {68776#true} assume main_#t~switch965#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 11: Hoare triple {68776#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet1000#1 && main_#t~nondet1000#1 <= 2147483647;main_~tmp___6~2#1 := main_#t~nondet1000#1;havoc main_#t~nondet1000#1;main_#t~switch1001#1 := 0 == main_~tmp___6~2#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 12: Hoare triple {68776#true} assume !main_#t~switch1001#1;main_#t~switch1001#1 := main_#t~switch1001#1 || 1 == main_~tmp___6~2#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 13: Hoare triple {68776#true} assume main_#t~switch1001#1; {68776#true} is VALID [2022-02-20 21:45:00,213 INFO L290 TraceCheckUtils]: 14: Hoare triple {68776#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_cpqarray_init } true;havoc cpqarray_init_#res#1;havoc cpqarray_init_#t~nondet520#1, cpqarray_init_#t~ret521#1, cpqarray_init_#t~ret522#1, cpqarray_init_#t~mem523#1.base, cpqarray_init_#t~mem523#1.offset, cpqarray_init_~num_cntlrs_reg~0#1, cpqarray_init_~i~3#1, cpqarray_init_~rc~0#1;havoc cpqarray_init_~num_cntlrs_reg~0#1;havoc cpqarray_init_~i~3#1;havoc cpqarray_init_~rc~0#1;cpqarray_init_~num_cntlrs_reg~0#1 := 0;cpqarray_init_~rc~0#1 := 0;havoc cpqarray_init_#t~nondet520#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#cpqarray_pci_driver~0.base, ~#cpqarray_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 42, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet1030#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet1030#1 && __pci_register_driver_#t~nondet1030#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet1030#1;havoc __pci_register_driver_#t~nondet1030#1; {68776#true} is VALID [2022-02-20 21:45:00,214 INFO L290 TraceCheckUtils]: 15: Hoare triple {68776#true} cpqarray_init_#t~ret521#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= cpqarray_init_#t~ret521#1 && cpqarray_init_#t~ret521#1 <= 2147483647;cpqarray_init_~rc~0#1 := cpqarray_init_#t~ret521#1;havoc cpqarray_init_#t~ret521#1; {68776#true} is VALID [2022-02-20 21:45:00,214 INFO L290 TraceCheckUtils]: 16: Hoare triple {68776#true} assume 0 != cpqarray_init_~rc~0#1;cpqarray_init_#res#1 := cpqarray_init_~rc~0#1; {68776#true} is VALID [2022-02-20 21:45:00,214 INFO L290 TraceCheckUtils]: 17: Hoare triple {68776#true} main_#t~ret1002#1 := cpqarray_init_#res#1;assume { :end_inline_cpqarray_init } true;assume -2147483648 <= main_#t~ret1002#1 && main_#t~ret1002#1 <= 2147483647;~ldv_retval_3~0 := main_#t~ret1002#1;havoc main_#t~ret1002#1; {68776#true} is VALID [2022-02-20 21:45:00,214 INFO L290 TraceCheckUtils]: 18: Hoare triple {68776#true} assume 0 == ~ldv_retval_3~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_5~0 := 1;~ldv_state_variable_2~0 := 1;~ldv_state_variable_7~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1;~ldv_state_variable_4~0 := 1;~ldv_state_variable_6~0 := 1; {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,214 INFO L290 TraceCheckUtils]: 19: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume !(0 != ~ldv_retval_3~0); {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,215 INFO L290 TraceCheckUtils]: 20: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume -2147483648 <= main_#t~nondet964#1 && main_#t~nondet964#1 <= 2147483647;main_~tmp~66#1 := main_#t~nondet964#1;havoc main_#t~nondet964#1;main_#t~switch965#1 := 0 == main_~tmp~66#1; {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,215 INFO L290 TraceCheckUtils]: 21: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume !main_#t~switch965#1;main_#t~switch965#1 := main_#t~switch965#1 || 1 == main_~tmp~66#1; {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,215 INFO L290 TraceCheckUtils]: 22: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume main_#t~switch965#1; {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,216 INFO L290 TraceCheckUtils]: 23: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet971#1 && main_#t~nondet971#1 <= 2147483647;main_~tmp___1~17#1 := main_#t~nondet971#1;havoc main_#t~nondet971#1;main_#t~switch972#1 := 0 == main_~tmp___1~17#1; {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,216 INFO L290 TraceCheckUtils]: 24: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume main_#t~switch972#1; {68778#(= ~ldv_state_variable_3~0 1)} is VALID [2022-02-20 21:45:00,216 INFO L290 TraceCheckUtils]: 25: Hoare triple {68778#(= ~ldv_state_variable_3~0 1)} assume 2 == ~ldv_state_variable_3~0;assume { :begin_inline_ida_release } true;ida_release_#in~disk#1.base, ida_release_#in~disk#1.offset, ida_release_#in~mode#1 := ~ida_fops_group0~0.base, ~ida_fops_group0~0.offset, ~ldvarg12~0;havoc ida_release_#res#1;havoc ida_release_#t~ret625#1.base, ida_release_#t~ret625#1.offset, ida_release_#t~mem626#1, ida_release_~disk#1.base, ida_release_~disk#1.offset, ida_release_~mode#1, ida_release_~host~1#1.base, ida_release_~host~1#1.offset;ida_release_~disk#1.base, ida_release_~disk#1.offset := ida_release_#in~disk#1.base, ida_release_#in~disk#1.offset;ida_release_~mode#1 := ida_release_#in~mode#1;havoc ida_release_~host~1#1.base, ida_release_~host~1#1.offset;assume { :begin_inline_ldv_mutex_lock_10 } true;ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset := ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset;havoc ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset;ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset := ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset; {68777#false} is VALID [2022-02-20 21:45:00,217 INFO L272 TraceCheckUtils]: 26: Hoare triple {68777#false} call ldv_mutex_lock_cpqarray_mutex(ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset); {68790#(= |old(~ldv_mutex_cpqarray_mutex~0)| ~ldv_mutex_cpqarray_mutex~0)} is VALID [2022-02-20 21:45:00,217 INFO L290 TraceCheckUtils]: 27: Hoare triple {68790#(= |old(~ldv_mutex_cpqarray_mutex~0)| ~ldv_mutex_cpqarray_mutex~0)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {68776#true} is VALID [2022-02-20 21:45:00,217 INFO L290 TraceCheckUtils]: 28: Hoare triple {68776#true} assume 1 == ~ldv_mutex_cpqarray_mutex~0; {68776#true} is VALID [2022-02-20 21:45:00,217 INFO L290 TraceCheckUtils]: 29: Hoare triple {68776#true} ~ldv_mutex_cpqarray_mutex~0 := 2; {68776#true} is VALID [2022-02-20 21:45:00,217 INFO L290 TraceCheckUtils]: 30: Hoare triple {68776#true} assume true; {68776#true} is VALID [2022-02-20 21:45:00,217 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {68776#true} {68777#false} #3419#return; {68777#false} is VALID [2022-02-20 21:45:00,217 INFO L272 TraceCheckUtils]: 32: Hoare triple {68777#false} call mutex_lock(ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset); {68776#true} is VALID [2022-02-20 21:45:00,217 INFO L290 TraceCheckUtils]: 33: Hoare triple {68776#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {68776#true} is VALID [2022-02-20 21:45:00,218 INFO L290 TraceCheckUtils]: 34: Hoare triple {68776#true} assume true; {68776#true} is VALID [2022-02-20 21:45:00,218 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {68776#true} {68777#false} #3421#return; {68777#false} is VALID [2022-02-20 21:45:00,218 INFO L290 TraceCheckUtils]: 36: Hoare triple {68777#false} assume { :end_inline_ldv_mutex_lock_10 } true; {68777#false} is VALID [2022-02-20 21:45:00,218 INFO L272 TraceCheckUtils]: 37: Hoare triple {68777#false} call ida_release_#t~ret625#1.base, ida_release_#t~ret625#1.offset := get_host(ida_release_~disk#1.base, ida_release_~disk#1.offset); {68776#true} is VALID [2022-02-20 21:45:00,218 INFO L290 TraceCheckUtils]: 38: Hoare triple {68776#true} ~disk.base, ~disk.offset := #in~disk.base, #in~disk.offset;call #t~mem344.base, #t~mem344.offset := read~$Pointer$(~disk.base, 1267 + ~disk.offset, 8);call #t~mem345.base, #t~mem345.offset := read~$Pointer$(#t~mem344.base, 1736 + #t~mem344.offset, 8);#res.base, #res.offset := #t~mem345.base, #t~mem345.offset;havoc #t~mem344.base, #t~mem344.offset;havoc #t~mem345.base, #t~mem345.offset; {68776#true} is VALID [2022-02-20 21:45:00,218 INFO L290 TraceCheckUtils]: 39: Hoare triple {68776#true} assume true; {68776#true} is VALID [2022-02-20 21:45:00,218 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {68776#true} {68777#false} #3423#return; {68777#false} is VALID [2022-02-20 21:45:00,219 INFO L290 TraceCheckUtils]: 41: Hoare triple {68777#false} ida_release_~host~1#1.base, ida_release_~host~1#1.offset := ida_release_#t~ret625#1.base, ida_release_#t~ret625#1.offset;havoc ida_release_#t~ret625#1.base, ida_release_#t~ret625#1.offset;call ida_release_#t~mem626#1 := read~int(ida_release_~host~1#1.base, 100 + ida_release_~host~1#1.offset, 4);call write~int(ida_release_#t~mem626#1 - 1, ida_release_~host~1#1.base, 100 + ida_release_~host~1#1.offset, 4);havoc ida_release_#t~mem626#1;assume { :begin_inline_ldv_mutex_unlock_11 } true;ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset := ~#cpqarray_mutex~0.base, ~#cpqarray_mutex~0.offset;havoc ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset;ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset := ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset; {68777#false} is VALID [2022-02-20 21:45:00,219 INFO L272 TraceCheckUtils]: 42: Hoare triple {68777#false} call ldv_mutex_unlock_cpqarray_mutex(ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset); {68777#false} is VALID [2022-02-20 21:45:00,219 INFO L290 TraceCheckUtils]: 43: Hoare triple {68777#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {68777#false} is VALID [2022-02-20 21:45:00,219 INFO L290 TraceCheckUtils]: 44: Hoare triple {68777#false} assume !(2 == ~ldv_mutex_cpqarray_mutex~0); {68777#false} is VALID [2022-02-20 21:45:00,219 INFO L272 TraceCheckUtils]: 45: Hoare triple {68777#false} call ldv_error(); {68777#false} is VALID [2022-02-20 21:45:00,219 INFO L290 TraceCheckUtils]: 46: Hoare triple {68777#false} assume !false; {68777#false} is VALID [2022-02-20 21:45:00,220 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:45:00,220 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:45:00,221 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498312515] [2022-02-20 21:45:00,221 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1498312515] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:45:00,221 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:45:00,221 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:45:00,221 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622180324] [2022-02-20 21:45:00,221 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:45:00,222 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 1 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 47 [2022-02-20 21:45:00,222 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:45:00,222 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 1 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:45:00,266 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:45:00,266 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:45:00,266 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:45:00,266 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:45:00,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:45:00,267 INFO L87 Difference]: Start difference. First operand 2809 states and 3772 transitions. Second operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 1 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:45:13,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:45:13,205 INFO L93 Difference]: Finished difference Result 7419 states and 9945 transitions. [2022-02-20 21:45:13,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:45:13,205 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 1 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 47 [2022-02-20 21:45:13,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:45:13,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 1 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:45:13,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5436 transitions. [2022-02-20 21:45:13,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 3 states have internal predecessors, (39), 1 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-02-20 21:45:13,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5436 transitions. [2022-02-20 21:45:13,388 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 5436 transitions.