./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f37aa3f5f53d7516c3aab2329ab9f19add00a9b7f37383228b3b0ae48d55a761 --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:44:18,289 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:44:18,291 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:44:18,329 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:44:18,330 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:44:18,333 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:44:18,334 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:44:18,337 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:44:18,338 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:44:18,342 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:44:18,343 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:44:18,344 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:44:18,344 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:44:18,346 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:44:18,347 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:44:18,350 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:44:18,351 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:44:18,352 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:44:18,354 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:44:18,358 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:44:18,359 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:44:18,360 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:44:18,362 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:44:18,362 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:44:18,368 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:44:18,368 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:44:18,369 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:44:18,370 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:44:18,370 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:44:18,371 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:44:18,371 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:44:18,372 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:44:18,374 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:44:18,375 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:44:18,376 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:44:18,376 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:44:18,377 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:44:18,377 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:44:18,377 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:44:18,378 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:44:18,378 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:44:18,379 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:44:18,408 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:44:18,408 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:44:18,409 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:44:18,409 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:44:18,409 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:44:18,410 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:44:18,410 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:44:18,410 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:44:18,411 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:44:18,411 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:44:18,412 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:44:18,412 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:44:18,412 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:44:18,412 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:44:18,412 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:44:18,412 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:44:18,413 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:44:18,413 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:44:18,413 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:44:18,413 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:44:18,413 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:44:18,414 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:44:18,414 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:44:18,414 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:44:18,414 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:44:18,414 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:44:18,415 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:44:18,415 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:44:18,415 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:44:18,415 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:44:18,415 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f37aa3f5f53d7516c3aab2329ab9f19add00a9b7f37383228b3b0ae48d55a761 [2022-02-20 21:44:18,626 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:44:18,650 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:44:18,653 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:44:18,654 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:44:18,655 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:44:18,656 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i [2022-02-20 21:44:18,713 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/424642447/a2265eebde3f4b57935d01d315a3669c/FLAGa3de914ab [2022-02-20 21:44:19,291 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:44:19,292 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i [2022-02-20 21:44:19,331 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/424642447/a2265eebde3f4b57935d01d315a3669c/FLAGa3de914ab [2022-02-20 21:44:19,728 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/424642447/a2265eebde3f4b57935d01d315a3669c [2022-02-20 21:44:19,730 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:44:19,732 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:44:19,734 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:44:19,734 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:44:19,736 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:44:19,737 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:44:19" (1/1) ... [2022-02-20 21:44:19,738 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7754c88d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:19, skipping insertion in model container [2022-02-20 21:44:19,738 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:44:19" (1/1) ... [2022-02-20 21:44:19,743 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:44:19,828 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:44:20,815 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i[148417,148430] [2022-02-20 21:44:20,905 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:44:20,941 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:44:21,169 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i[148417,148430] [2022-02-20 21:44:21,193 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:44:21,239 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:44:21,240 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21 WrapperNode [2022-02-20 21:44:21,241 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:44:21,242 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:44:21,242 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:44:21,242 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:44:21,248 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,310 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,433 INFO L137 Inliner]: procedures = 167, calls = 920, calls flagged for inlining = 60, calls inlined = 52, statements flattened = 1939 [2022-02-20 21:44:21,434 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:44:21,435 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:44:21,435 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:44:21,435 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:44:21,442 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,443 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,466 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,467 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,541 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,563 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,575 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,594 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:44:21,595 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:44:21,595 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:44:21,595 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:44:21,596 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (1/1) ... [2022-02-20 21:44:21,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:44:21,614 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:44:21,644 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:44:21,711 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:44:21,729 INFO L130 BoogieDeclarations]: Found specification of procedure do_pcd_request [2022-02-20 21:44:21,730 INFO L138 BoogieDeclarations]: Found implementation of procedure do_pcd_request [2022-02-20 21:44:21,730 INFO L130 BoogieDeclarations]: Found specification of procedure pi_release [2022-02-20 21:44:21,730 INFO L138 BoogieDeclarations]: Found implementation of procedure pi_release [2022-02-20 21:44:21,730 INFO L130 BoogieDeclarations]: Found specification of procedure write_reg [2022-02-20 21:44:21,730 INFO L138 BoogieDeclarations]: Found implementation of procedure write_reg [2022-02-20 21:44:21,730 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_audio_ioctl [2022-02-20 21:44:21,731 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_audio_ioctl [2022-02-20 21:44:21,731 INFO L130 BoogieDeclarations]: Found specification of procedure pi_disconnect [2022-02-20 21:44:21,731 INFO L138 BoogieDeclarations]: Found implementation of procedure pi_disconnect [2022-02-20 21:44:21,731 INFO L130 BoogieDeclarations]: Found specification of procedure status_reg [2022-02-20 21:44:21,731 INFO L138 BoogieDeclarations]: Found implementation of procedure status_reg [2022-02-20 21:44:21,731 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:44:21,731 INFO L130 BoogieDeclarations]: Found specification of procedure ps_set_intr [2022-02-20 21:44:21,732 INFO L138 BoogieDeclarations]: Found implementation of procedure ps_set_intr [2022-02-20 21:44:21,732 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_packet [2022-02-20 21:44:21,732 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_packet [2022-02-20 21:44:21,732 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:44:21,732 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:44:21,733 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:44:21,733 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_drive_status [2022-02-20 21:44:21,733 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_drive_status [2022-02-20 21:44:21,733 INFO L130 BoogieDeclarations]: Found specification of procedure read_reg [2022-02-20 21:44:21,733 INFO L138 BoogieDeclarations]: Found implementation of procedure read_reg [2022-02-20 21:44:21,733 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-02-20 21:44:21,734 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-02-20 21:44:21,734 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:44:21,734 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:44:21,734 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_blkdev [2022-02-20 21:44:21,734 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_blkdev [2022-02-20 21:44:21,734 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_tray_move [2022-02-20 21:44:21,734 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_tray_move [2022-02-20 21:44:21,735 INFO L130 BoogieDeclarations]: Found specification of procedure do_pcd_read [2022-02-20 21:44:21,735 INFO L138 BoogieDeclarations]: Found implementation of procedure do_pcd_read [2022-02-20 21:44:21,735 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:44:21,735 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2022-02-20 21:44:21,735 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2022-02-20 21:44:21,735 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_check_events [2022-02-20 21:44:21,736 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_check_events [2022-02-20 21:44:21,736 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:44:21,736 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:44:21,736 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_lock_door [2022-02-20 21:44:21,736 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_lock_door [2022-02-20 21:44:21,737 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:44:21,737 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~TO~VOID [2022-02-20 21:44:21,737 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~TO~VOID [2022-02-20 21:44:21,737 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock [2022-02-20 21:44:21,737 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock [2022-02-20 21:44:21,737 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_block_check_events [2022-02-20 21:44:21,738 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_block_check_events [2022-02-20 21:44:21,738 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-02-20 21:44:21,738 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-02-20 21:44:21,738 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_sleep [2022-02-20 21:44:21,738 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_sleep [2022-02-20 21:44:21,739 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_wait [2022-02-20 21:44:21,739 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_wait [2022-02-20 21:44:21,739 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:44:21,740 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_atapi [2022-02-20 21:44:21,741 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_atapi [2022-02-20 21:44:21,741 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_pcd_mutex [2022-02-20 21:44:21,741 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_pcd_mutex [2022-02-20 21:44:21,742 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_get_mcn [2022-02-20 21:44:21,742 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_get_mcn [2022-02-20 21:44:21,742 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 21:44:21,742 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 21:44:21,743 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:44:21,743 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:44:21,743 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_identify [2022-02-20 21:44:21,743 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_identify [2022-02-20 21:44:21,743 INFO L130 BoogieDeclarations]: Found specification of procedure next_request [2022-02-20 21:44:21,743 INFO L138 BoogieDeclarations]: Found implementation of procedure next_request [2022-02-20 21:44:21,743 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:44:21,744 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 21:44:21,744 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 21:44:21,744 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_probe [2022-02-20 21:44:21,745 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_probe [2022-02-20 21:44:21,745 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_command [2022-02-20 21:44:21,745 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_command [2022-02-20 21:44:21,745 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_completion [2022-02-20 21:44:21,745 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_completion [2022-02-20 21:44:21,745 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:44:21,745 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_drive_reset [2022-02-20 21:44:21,746 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_drive_reset [2022-02-20 21:44:21,746 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:44:21,746 INFO L130 BoogieDeclarations]: Found specification of procedure pi_init [2022-02-20 21:44:21,746 INFO L138 BoogieDeclarations]: Found implementation of procedure pi_init [2022-02-20 21:44:21,746 INFO L130 BoogieDeclarations]: Found specification of procedure pi_read_regr [2022-02-20 21:44:21,746 INFO L138 BoogieDeclarations]: Found implementation of procedure pi_read_regr [2022-02-20 21:44:21,747 INFO L130 BoogieDeclarations]: Found specification of procedure pi_connect [2022-02-20 21:44:21,747 INFO L138 BoogieDeclarations]: Found implementation of procedure pi_connect [2022-02-20 21:44:21,747 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_pcd_mutex [2022-02-20 21:44:21,747 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_pcd_mutex [2022-02-20 21:44:21,748 INFO L130 BoogieDeclarations]: Found specification of procedure put_disk [2022-02-20 21:44:21,748 INFO L138 BoogieDeclarations]: Found implementation of procedure put_disk [2022-02-20 21:44:21,748 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-02-20 21:44:21,748 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-02-20 21:44:21,749 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_delayed_work [2022-02-20 21:44:21,749 INFO L138 BoogieDeclarations]: Found implementation of procedure schedule_delayed_work [2022-02-20 21:44:21,749 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_reset [2022-02-20 21:44:21,749 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_reset [2022-02-20 21:44:21,750 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:44:21,750 INFO L130 BoogieDeclarations]: Found specification of procedure pcd_block_ioctl [2022-02-20 21:44:21,750 INFO L138 BoogieDeclarations]: Found implementation of procedure pcd_block_ioctl [2022-02-20 21:44:21,750 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:44:21,751 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:44:21,751 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:44:21,751 INFO L130 BoogieDeclarations]: Found specification of procedure pi_do_claimed [2022-02-20 21:44:21,751 INFO L138 BoogieDeclarations]: Found implementation of procedure pi_do_claimed [2022-02-20 21:44:22,149 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:44:22,153 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:44:27,835 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:44:27,855 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:44:27,856 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2022-02-20 21:44:27,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:44:27 BoogieIcfgContainer [2022-02-20 21:44:27,859 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:44:27,861 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:44:27,861 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:44:27,863 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:44:27,864 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:44:19" (1/3) ... [2022-02-20 21:44:27,865 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7279be1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:44:27, skipping insertion in model container [2022-02-20 21:44:27,867 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:44:21" (2/3) ... [2022-02-20 21:44:27,868 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7279be1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:44:27, skipping insertion in model container [2022-02-20 21:44:27,868 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:44:27" (3/3) ... [2022-02-20 21:44:27,870 INFO L111 eAbstractionObserver]: Analyzing ICFG 32_7a_cilled_linux-3.8-rc1-drivers--block--paride--pcd.ko-main.cil.out.i [2022-02-20 21:44:27,875 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:44:27,875 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:44:27,921 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:44:27,926 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:44:27,926 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:44:27,975 INFO L276 IsEmpty]: Start isEmpty. Operand has 760 states, 557 states have (on average 1.3967684021543985) internal successors, (778), 581 states have internal predecessors, (778), 160 states have call successors, (160), 46 states have call predecessors, (160), 46 states have return successors, (160), 155 states have call predecessors, (160), 160 states have call successors, (160) [2022-02-20 21:44:27,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-02-20 21:44:27,983 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:27,984 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:27,984 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:27,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:27,989 INFO L85 PathProgramCache]: Analyzing trace with hash -2144132064, now seen corresponding path program 1 times [2022-02-20 21:44:27,997 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:27,998 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846179537] [2022-02-20 21:44:27,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:27,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:28,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:28,503 INFO L290 TraceCheckUtils]: 0: Hoare triple {763#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(73, 2);call #Ultimate.allocInit(4, 3);call write~init~int(112, 3, 0, 1);call write~init~int(99, 3, 1, 1);call write~init~int(100, 3, 2, 1);call write~init~int(0, 3, 3, 1);call #Ultimate.allocInit(20, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(36, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(123, 9);call #Ultimate.allocInit(123, 10);call #Ultimate.allocInit(5, 11);call write~init~int(37, 11, 0, 1);call write~init~int(115, 11, 1, 1);call write~init~int(37, 11, 2, 1);call write~init~int(100, 11, 3, 1);call write~init~int(0, 11, 4, 1);call #Ultimate.allocInit(57, 12);call #Ultimate.allocInit(15, 13);call #Ultimate.allocInit(12, 14);call #Ultimate.allocInit(29, 15);call #Ultimate.allocInit(11, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(33, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(11, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(14, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(15, 25);call #Ultimate.allocInit(10, 26);call #Ultimate.allocInit(12, 27);call #Ultimate.allocInit(6, 28);call write~init~int(101, 28, 0, 1);call write~init~int(106, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(99, 28, 3, 1);call write~init~int(116, 28, 4, 1);call write~init~int(0, 28, 5, 1);call #Ultimate.allocInit(11, 29);call #Ultimate.allocInit(28, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(51, 31, 1, 1);call write~init~int(120, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(13, 32);call #Ultimate.allocInit(2, 33);call write~init~int(10, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(16, 34);call #Ultimate.allocInit(12, 35);call #Ultimate.allocInit(9, 36);call #Ultimate.allocInit(6, 37);call write~init~int(83, 37, 0, 1);call write~init~int(108, 37, 1, 1);call write~init~int(97, 37, 2, 1);call write~init~int(118, 37, 3, 1);call write~init~int(101, 37, 4, 1);call write~init~int(0, 37, 5, 1);call #Ultimate.allocInit(7, 38);call write~init~int(77, 38, 0, 1);call write~init~int(97, 38, 1, 1);call write~init~int(115, 38, 2, 1);call write~init~int(116, 38, 3, 1);call write~init~int(101, 38, 4, 1);call write~init~int(114, 38, 5, 1);call write~init~int(0, 38, 6, 1);call #Ultimate.allocInit(24, 39);call #Ultimate.allocInit(6, 40);call write~init~int(83, 40, 0, 1);call write~init~int(108, 40, 1, 1);call write~init~int(97, 40, 2, 1);call write~init~int(118, 40, 3, 1);call write~init~int(101, 40, 4, 1);call write~init~int(0, 40, 5, 1);call #Ultimate.allocInit(7, 41);call write~init~int(77, 41, 0, 1);call write~init~int(97, 41, 1, 1);call write~init~int(115, 41, 2, 1);call write~init~int(116, 41, 3, 1);call write~init~int(101, 41, 4, 1);call write~init~int(114, 41, 5, 1);call write~init~int(0, 41, 6, 1);call #Ultimate.allocInit(12, 42);call #Ultimate.allocInit(24, 43);call #Ultimate.allocInit(38, 44);call #Ultimate.allocInit(5, 45);call write~init~int(49, 45, 0, 1);call write~init~int(46, 45, 1, 1);call write~init~int(48, 45, 2, 1);call write~init~int(55, 45, 3, 1);call write~init~int(0, 45, 4, 1);call #Ultimate.allocInit(27, 46);call #Ultimate.allocInit(11, 47);call #Ultimate.allocInit(11, 48);call #Ultimate.allocInit(16, 49);call #Ultimate.allocInit(15, 50);call #Ultimate.allocInit(8, 51);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~verbose~0 := 0;~major~0 := 46;~name~0.base, ~name~0.offset := 3, 0;~nice~0 := 0;~disable~0 := 0;~#drive0~0.base, ~#drive0~0.offset := 52, 0;call #Ultimate.allocInit(24, 52);call write~init~int(0, ~#drive0~0.base, ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 4 + ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 8 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 12 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 16 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 20 + ~#drive0~0.offset, 4);~#drive1~0.base, ~#drive1~0.offset := 53, 0;call #Ultimate.allocInit(24, 53);call write~init~int(0, ~#drive1~0.base, ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 4 + ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 8 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 12 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 16 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 20 + ~#drive1~0.offset, 4);~#drive2~0.base, ~#drive2~0.offset := 54, 0;call #Ultimate.allocInit(24, 54);call write~init~int(0, ~#drive2~0.base, ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 4 + ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 8 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 12 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 16 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 20 + ~#drive2~0.offset, 4);~#drive3~0.base, ~#drive3~0.offset := 55, 0;call #Ultimate.allocInit(24, 55);call write~init~int(0, ~#drive3~0.base, ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 4 + ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 8 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 12 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 16 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 20 + ~#drive3~0.offset, 4);~#drives~0.base, ~#drives~0.offset := 56, 0;call #Ultimate.allocInit(32, 56);call write~init~$Pointer$(~#drive0~0.base, ~#drive0~0.offset, ~#drives~0.base, ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive1~0.base, ~#drive1~0.offset, ~#drives~0.base, 8 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive2~0.base, ~#drive2~0.offset, ~#drives~0.base, 16 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive3~0.base, ~#drive3~0.offset, ~#drives~0.base, 24 + ~#drives~0.offset, 8);~pcd_drive_count~0 := 0;~#pcd_mutex~0.base, ~#pcd_mutex~0.offset := 57, 0;call #Ultimate.allocInit(156, 57);call write~init~int(1, ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 4 + ~#pcd_mutex~0.offset, 4);call write~init~int(3735899821, ~#pcd_mutex~0.base, 8 + ~#pcd_mutex~0.offset, 4);call write~init~int(4294967295, ~#pcd_mutex~0.base, 12 + ~#pcd_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_mutex~0.base, 16 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 24 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 32 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 40 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pcd_mutex~0.base, 48 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 56 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 60 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 80 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 88 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 96 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 104 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 112 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 120 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 128 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pcd_mutex~0.base, 136 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 144 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 148 + ~#pcd_mutex~0.offset, 8);~#pcd_lock~0.base, ~#pcd_lock~0.offset := 58, 0;call #Ultimate.allocInit(68, 58);call write~init~int(0, ~#pcd_lock~0.base, ~#pcd_lock~0.offset, 4);call write~init~int(3735899821, ~#pcd_lock~0.base, 4 + ~#pcd_lock~0.offset, 4);call write~init~int(4294967295, ~#pcd_lock~0.base, 8 + ~#pcd_lock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_lock~0.base, 12 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 20 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 28 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 36 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(6, 0, ~#pcd_lock~0.base, 44 + ~#pcd_lock~0.offset, 8);call write~init~int(0, ~#pcd_lock~0.base, 52 + ~#pcd_lock~0.offset, 4);call write~init~int(0, ~#pcd_lock~0.base, 56 + ~#pcd_lock~0.offset, 8);~ps_continuation~0.base, ~ps_continuation~0.offset := 0, 0;~ps_ready~0.base, ~ps_ready~0.offset := 0, 0;~ps_timeout~0 := 0;~ps_tq_active~0 := 0;~ps_nice~0 := 0;~#ps_spinlock~0.base, ~#ps_spinlock~0.offset := 59, 0;call #Ultimate.allocInit(68, 59);call write~init~int(0, ~#ps_spinlock~0.base, ~#ps_spinlock~0.offset, 4);call write~init~int(3735899821, ~#ps_spinlock~0.base, 4 + ~#ps_spinlock~0.offset, 4);call write~init~int(4294967295, ~#ps_spinlock~0.base, 8 + ~#ps_spinlock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#ps_spinlock~0.base, 12 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 20 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 28 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 36 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(7, 0, ~#ps_spinlock~0.base, 44 + ~#ps_spinlock~0.offset, 8);call write~init~int(0, ~#ps_spinlock~0.base, 52 + ~#ps_spinlock~0.offset, 4);call write~init~int(0, ~#ps_spinlock~0.base, 56 + ~#ps_spinlock~0.offset, 8);~#ps_tq~0.base, ~#ps_tq~0.offset := 60, 0;call #Ultimate.allocInit(204, 60);call write~init~int(4195344, ~#ps_tq~0.base, ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 16 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~ps_tq_int.base, #funAddr~ps_tq_int.offset, ~#ps_tq~0.base, 24 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, ~#ps_tq~0.offset, ~#ps_tq~0.base, 32 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 40 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 48 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(8, 0, ~#ps_tq~0.base, 56 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 64 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 68 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 76 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 1953723489, ~#ps_tq~0.base, 84 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 92 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, (if (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 else (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~#ps_tq~0.base, 100 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ~#ps_tq~0.base, 108 + ~#ps_tq~0.offset, 8);call write~init~int(~#ps_tq~0.base + ~#ps_tq~0.offset, ~#ps_tq~0.base, 116 + ~#ps_tq~0.offset, 8);call write~init~int(-1, ~#ps_tq~0.base, 124 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 128 + ~#ps_tq~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 132 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 140 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 141 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 142 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 143 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 144 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 145 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 146 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 147 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 148 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 149 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 150 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 151 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 152 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 153 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 154 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 155 + ~#ps_tq~0.offset, 1);call write~init~$Pointer$(9, 0, ~#ps_tq~0.base, 156 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 164 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 172 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(10, 0, ~#ps_tq~0.base, 180 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 188 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 192 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 200 + ~#ps_tq~0.offset, 4);~#pcd~0.base, ~#pcd~0.offset := 61, 0;call #Ultimate.allocInit(1296, 61);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base);~#pcd_scratch~0.base, ~#pcd_scratch~0.offset := 62, 0;call #Ultimate.allocInit(64, 62);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_scratch~0.base);~#pcd_buffer~0.base, ~#pcd_buffer~0.offset := 63, 0;call #Ultimate.allocInit(2048, 63);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_buffer~0.base);~pcd_bufblk~0 := -1;~pcd_current~0.base, ~pcd_current~0.offset := 0, 0;~pcd_req~0.base, ~pcd_req~0.offset := 0, 0;~pcd_retries~0 := 0;~pcd_busy~0 := 0;~pcd_sector~0 := 0;~pcd_count~0 := 0;~pcd_buf~0.base, ~pcd_buf~0.offset := 0, 0;~#pcd_bdops~0.base, ~#pcd_bdops~0.offset := 64, 0;call #Ultimate.allocInit(96, 64);call write~init~$Pointer$(#funAddr~pcd_block_open.base, #funAddr~pcd_block_open.offset, ~#pcd_bdops~0.base, ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_release.base, #funAddr~pcd_block_release.offset, ~#pcd_bdops~0.base, 8 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_ioctl.base, #funAddr~pcd_block_ioctl.offset, ~#pcd_bdops~0.base, 16 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 24 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 32 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_check_events.base, #funAddr~pcd_block_check_events.offset, ~#pcd_bdops~0.base, 40 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 48 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 56 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 64 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 72 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 80 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pcd_bdops~0.base, 88 + ~#pcd_bdops~0.offset, 8);~#pcd_dops~0.base, ~#pcd_dops~0.offset := 65, 0;call #Ultimate.allocInit(120, 65);call write~init~$Pointer$(#funAddr~pcd_open.base, #funAddr~pcd_open.offset, ~#pcd_dops~0.base, ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_release.base, #funAddr~pcd_release.offset, ~#pcd_dops~0.base, 8 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_status.base, #funAddr~pcd_drive_status.offset, ~#pcd_dops~0.base, 16 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_check_events.base, #funAddr~pcd_check_events.offset, ~#pcd_dops~0.base, 24 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 32 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_tray_move.base, #funAddr~pcd_tray_move.offset, ~#pcd_dops~0.base, 40 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_lock_door.base, #funAddr~pcd_lock_door.offset, ~#pcd_dops~0.base, 48 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 56 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 64 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 72 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_get_mcn.base, #funAddr~pcd_get_mcn.offset, ~#pcd_dops~0.base, 80 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_reset.base, #funAddr~pcd_drive_reset.offset, ~#pcd_dops~0.base, 88 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_audio_ioctl.base, #funAddr~pcd_audio_ioctl.offset, ~#pcd_dops~0.base, 96 + ~#pcd_dops~0.offset, 8);call write~init~int(29639, ~#pcd_dops~0.base, 104 + ~#pcd_dops~0.offset, 4);call write~init~int(0, ~#pcd_dops~0.base, 108 + ~#pcd_dops~0.offset, 4);call write~init~$Pointer$(#funAddr~pcd_packet.base, #funAddr~pcd_packet.offset, ~#pcd_dops~0.base, 112 + ~#pcd_dops~0.offset, 8);~pcd_queue~0.base, ~pcd_queue~0.offset := 0, 0;~ldvarg11~0.base, ~ldvarg11~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg13~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset := 0, 0;~pcd_bdops_group1~0.base, ~pcd_bdops_group1~0.offset := 0, 0;~ldvarg0~0 := 0;~ldvarg5~0 := 0;~ldvarg16~0 := 0;~ldvarg15~0 := 0;~pcd_dops_group0~0.base, ~pcd_dops_group0~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg14~0 := 0;~ldvarg4~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_pcd_mutex~0 := 0; {763#true} is VALID [2022-02-20 21:44:28,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {763#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet320#1, main_#t~switch321#1, main_#t~nondet322#1, main_#t~switch323#1, main_#t~ret324#1, main_#t~ret325#1, main_#t~ret326#1, main_#t~ret327#1, main_#t~ret328#1, main_#t~ret329#1, main_#t~ret330#1, main_#t~ret331#1, main_#t~ret332#1, main_#t~ret333#1, main_#t~ret334#1, main_#t~ret335#1, main_#t~ret336#1, main_#t~ret337#1, main_#t~ret338#1, main_#t~ret339#1, main_#t~ret340#1, main_#t~nondet341#1, main_#t~switch342#1, main_#t~ret343#1, main_#t~nondet344#1, main_#t~switch345#1, main_#t~nondet346#1, main_#t~switch347#1, main_#t~ret348#1, main_#t~ret349#1, main_#t~ret350#1, main_#t~ret351#1, main_#t~ret352#1, main_#t~ret353#1, main_~tmp~31#1, main_~tmp___0~17#1, main_~tmp___1~8#1, main_~tmp___2~4#1, main_~tmp___3~1#1;havoc main_~tmp~31#1;havoc main_~tmp___0~17#1;havoc main_~tmp___1~8#1;havoc main_~tmp___2~4#1;havoc main_~tmp___3~1#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_pcd_mutex~0 := 1; {763#true} is VALID [2022-02-20 21:44:28,510 INFO L290 TraceCheckUtils]: 2: Hoare triple {763#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {765#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:44:28,511 INFO L290 TraceCheckUtils]: 3: Hoare triple {765#(= ~ldv_state_variable_2~0 0)} assume -2147483648 <= main_#t~nondet320#1 && main_#t~nondet320#1 <= 2147483647;main_~tmp~31#1 := main_#t~nondet320#1;havoc main_#t~nondet320#1;main_#t~switch321#1 := 0 == main_~tmp~31#1; {765#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:44:28,512 INFO L290 TraceCheckUtils]: 4: Hoare triple {765#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 1 == main_~tmp~31#1; {765#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:44:28,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {765#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 2 == main_~tmp~31#1; {765#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:44:28,513 INFO L290 TraceCheckUtils]: 6: Hoare triple {765#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 3 == main_~tmp~31#1; {765#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:44:28,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {765#(= ~ldv_state_variable_2~0 0)} assume main_#t~switch321#1; {765#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:44:28,514 INFO L290 TraceCheckUtils]: 8: Hoare triple {765#(= ~ldv_state_variable_2~0 0)} assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= main_#t~nondet346#1 && main_#t~nondet346#1 <= 2147483647;main_~tmp___3~1#1 := main_#t~nondet346#1;havoc main_#t~nondet346#1;main_#t~switch347#1 := 0 == main_~tmp___3~1#1; {764#false} is VALID [2022-02-20 21:44:28,514 INFO L290 TraceCheckUtils]: 9: Hoare triple {764#false} assume main_#t~switch347#1; {764#false} is VALID [2022-02-20 21:44:28,515 INFO L290 TraceCheckUtils]: 10: Hoare triple {764#false} assume 2 == ~ldv_state_variable_2~0;assume { :begin_inline_pcd_block_release } true;pcd_block_release_#in~disk#1.base, pcd_block_release_#in~disk#1.offset, pcd_block_release_#in~mode#1 := ~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset, ~ldvarg17~0;havoc pcd_block_release_#res#1;havoc pcd_block_release_#t~mem102#1.base, pcd_block_release_#t~mem102#1.offset, pcd_block_release_~disk#1.base, pcd_block_release_~disk#1.offset, pcd_block_release_~mode#1, pcd_block_release_~cd~1#1.base, pcd_block_release_~cd~1#1.offset;pcd_block_release_~disk#1.base, pcd_block_release_~disk#1.offset := pcd_block_release_#in~disk#1.base, pcd_block_release_#in~disk#1.offset;pcd_block_release_~mode#1 := pcd_block_release_#in~mode#1;havoc pcd_block_release_~cd~1#1.base, pcd_block_release_~cd~1#1.offset;call pcd_block_release_#t~mem102#1.base, pcd_block_release_#t~mem102#1.offset := read~$Pointer$(pcd_block_release_~disk#1.base, 1275 + pcd_block_release_~disk#1.offset, 8);pcd_block_release_~cd~1#1.base, pcd_block_release_~cd~1#1.offset := pcd_block_release_#t~mem102#1.base, pcd_block_release_#t~mem102#1.offset;havoc pcd_block_release_#t~mem102#1.base, pcd_block_release_#t~mem102#1.offset;assume { :begin_inline_ldv_mutex_lock_10 } true;ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset := ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset;havoc ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset;ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset := ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset; {764#false} is VALID [2022-02-20 21:44:28,515 INFO L272 TraceCheckUtils]: 11: Hoare triple {764#false} call ldv_mutex_lock_pcd_mutex(ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset); {764#false} is VALID [2022-02-20 21:44:28,515 INFO L290 TraceCheckUtils]: 12: Hoare triple {764#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {764#false} is VALID [2022-02-20 21:44:28,516 INFO L290 TraceCheckUtils]: 13: Hoare triple {764#false} assume !(1 == ~ldv_mutex_pcd_mutex~0); {764#false} is VALID [2022-02-20 21:44:28,516 INFO L272 TraceCheckUtils]: 14: Hoare triple {764#false} call ldv_error(); {764#false} is VALID [2022-02-20 21:44:28,516 INFO L290 TraceCheckUtils]: 15: Hoare triple {764#false} assume !false; {764#false} is VALID [2022-02-20 21:44:28,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:28,517 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:28,518 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846179537] [2022-02-20 21:44:28,518 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1846179537] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:28,518 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:28,519 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:28,521 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018913155] [2022-02-20 21:44:28,522 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:28,526 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-02-20 21:44:28,527 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:28,530 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:28,565 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:28,565 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:28,566 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:28,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:28,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:28,597 INFO L87 Difference]: Start difference. First operand has 760 states, 557 states have (on average 1.3967684021543985) internal successors, (778), 581 states have internal predecessors, (778), 160 states have call successors, (160), 46 states have call predecessors, (160), 46 states have return successors, (160), 155 states have call predecessors, (160), 160 states have call successors, (160) Second operand has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:37,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:37,363 INFO L93 Difference]: Finished difference Result 2171 states and 3237 transitions. [2022-02-20 21:44:37,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:37,364 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-02-20 21:44:37,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:37,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:37,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3237 transitions. [2022-02-20 21:44:37,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:37,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3237 transitions. [2022-02-20 21:44:37,602 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3237 transitions. [2022-02-20 21:44:40,232 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3237 edges. 3237 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:40,461 INFO L225 Difference]: With dead ends: 2171 [2022-02-20 21:44:40,462 INFO L226 Difference]: Without dead ends: 1406 [2022-02-20 21:44:40,472 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:40,475 INFO L933 BasicCegarLoop]: 1200 mSDtfsCounter, 947 mSDsluCounter, 1025 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 947 SdHoareTripleChecker+Valid, 2225 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:40,476 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [947 Valid, 2225 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:40,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1406 states. [2022-02-20 21:44:40,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1406 to 1394. [2022-02-20 21:44:40,606 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:40,624 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1406 states. Second operand has 1394 states, 1021 states have (on average 1.3800195886385895) internal successors, (1409), 1053 states have internal predecessors, (1409), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:40,629 INFO L74 IsIncluded]: Start isIncluded. First operand 1406 states. Second operand has 1394 states, 1021 states have (on average 1.3800195886385895) internal successors, (1409), 1053 states have internal predecessors, (1409), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:40,632 INFO L87 Difference]: Start difference. First operand 1406 states. Second operand has 1394 states, 1021 states have (on average 1.3800195886385895) internal successors, (1409), 1053 states have internal predecessors, (1409), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:40,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:40,755 INFO L93 Difference]: Finished difference Result 1406 states and 1993 transitions. [2022-02-20 21:44:40,755 INFO L276 IsEmpty]: Start isEmpty. Operand 1406 states and 1993 transitions. [2022-02-20 21:44:40,771 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:40,771 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:40,776 INFO L74 IsIncluded]: Start isIncluded. First operand has 1394 states, 1021 states have (on average 1.3800195886385895) internal successors, (1409), 1053 states have internal predecessors, (1409), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) Second operand 1406 states. [2022-02-20 21:44:40,779 INFO L87 Difference]: Start difference. First operand has 1394 states, 1021 states have (on average 1.3800195886385895) internal successors, (1409), 1053 states have internal predecessors, (1409), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) Second operand 1406 states. [2022-02-20 21:44:40,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:40,904 INFO L93 Difference]: Finished difference Result 1406 states and 1993 transitions. [2022-02-20 21:44:40,904 INFO L276 IsEmpty]: Start isEmpty. Operand 1406 states and 1993 transitions. [2022-02-20 21:44:40,910 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:40,910 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:40,910 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:40,911 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:40,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1394 states, 1021 states have (on average 1.3800195886385895) internal successors, (1409), 1053 states have internal predecessors, (1409), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:41,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1394 states to 1394 states and 1979 transitions. [2022-02-20 21:44:41,080 INFO L78 Accepts]: Start accepts. Automaton has 1394 states and 1979 transitions. Word has length 16 [2022-02-20 21:44:41,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:44:41,080 INFO L470 AbstractCegarLoop]: Abstraction has 1394 states and 1979 transitions. [2022-02-20 21:44:41,082 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (2), 1 states have call predecessors, (2), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:41,083 INFO L276 IsEmpty]: Start isEmpty. Operand 1394 states and 1979 transitions. [2022-02-20 21:44:41,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-20 21:44:41,084 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:41,084 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:41,085 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:44:41,085 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:41,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:41,088 INFO L85 PathProgramCache]: Analyzing trace with hash 2095899209, now seen corresponding path program 1 times [2022-02-20 21:44:41,088 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:41,088 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [746119564] [2022-02-20 21:44:41,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:41,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:41,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:41,239 INFO L290 TraceCheckUtils]: 0: Hoare triple {8604#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(73, 2);call #Ultimate.allocInit(4, 3);call write~init~int(112, 3, 0, 1);call write~init~int(99, 3, 1, 1);call write~init~int(100, 3, 2, 1);call write~init~int(0, 3, 3, 1);call #Ultimate.allocInit(20, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(36, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(123, 9);call #Ultimate.allocInit(123, 10);call #Ultimate.allocInit(5, 11);call write~init~int(37, 11, 0, 1);call write~init~int(115, 11, 1, 1);call write~init~int(37, 11, 2, 1);call write~init~int(100, 11, 3, 1);call write~init~int(0, 11, 4, 1);call #Ultimate.allocInit(57, 12);call #Ultimate.allocInit(15, 13);call #Ultimate.allocInit(12, 14);call #Ultimate.allocInit(29, 15);call #Ultimate.allocInit(11, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(33, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(11, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(14, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(15, 25);call #Ultimate.allocInit(10, 26);call #Ultimate.allocInit(12, 27);call #Ultimate.allocInit(6, 28);call write~init~int(101, 28, 0, 1);call write~init~int(106, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(99, 28, 3, 1);call write~init~int(116, 28, 4, 1);call write~init~int(0, 28, 5, 1);call #Ultimate.allocInit(11, 29);call #Ultimate.allocInit(28, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(51, 31, 1, 1);call write~init~int(120, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(13, 32);call #Ultimate.allocInit(2, 33);call write~init~int(10, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(16, 34);call #Ultimate.allocInit(12, 35);call #Ultimate.allocInit(9, 36);call #Ultimate.allocInit(6, 37);call write~init~int(83, 37, 0, 1);call write~init~int(108, 37, 1, 1);call write~init~int(97, 37, 2, 1);call write~init~int(118, 37, 3, 1);call write~init~int(101, 37, 4, 1);call write~init~int(0, 37, 5, 1);call #Ultimate.allocInit(7, 38);call write~init~int(77, 38, 0, 1);call write~init~int(97, 38, 1, 1);call write~init~int(115, 38, 2, 1);call write~init~int(116, 38, 3, 1);call write~init~int(101, 38, 4, 1);call write~init~int(114, 38, 5, 1);call write~init~int(0, 38, 6, 1);call #Ultimate.allocInit(24, 39);call #Ultimate.allocInit(6, 40);call write~init~int(83, 40, 0, 1);call write~init~int(108, 40, 1, 1);call write~init~int(97, 40, 2, 1);call write~init~int(118, 40, 3, 1);call write~init~int(101, 40, 4, 1);call write~init~int(0, 40, 5, 1);call #Ultimate.allocInit(7, 41);call write~init~int(77, 41, 0, 1);call write~init~int(97, 41, 1, 1);call write~init~int(115, 41, 2, 1);call write~init~int(116, 41, 3, 1);call write~init~int(101, 41, 4, 1);call write~init~int(114, 41, 5, 1);call write~init~int(0, 41, 6, 1);call #Ultimate.allocInit(12, 42);call #Ultimate.allocInit(24, 43);call #Ultimate.allocInit(38, 44);call #Ultimate.allocInit(5, 45);call write~init~int(49, 45, 0, 1);call write~init~int(46, 45, 1, 1);call write~init~int(48, 45, 2, 1);call write~init~int(55, 45, 3, 1);call write~init~int(0, 45, 4, 1);call #Ultimate.allocInit(27, 46);call #Ultimate.allocInit(11, 47);call #Ultimate.allocInit(11, 48);call #Ultimate.allocInit(16, 49);call #Ultimate.allocInit(15, 50);call #Ultimate.allocInit(8, 51);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~verbose~0 := 0;~major~0 := 46;~name~0.base, ~name~0.offset := 3, 0;~nice~0 := 0;~disable~0 := 0;~#drive0~0.base, ~#drive0~0.offset := 52, 0;call #Ultimate.allocInit(24, 52);call write~init~int(0, ~#drive0~0.base, ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 4 + ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 8 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 12 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 16 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 20 + ~#drive0~0.offset, 4);~#drive1~0.base, ~#drive1~0.offset := 53, 0;call #Ultimate.allocInit(24, 53);call write~init~int(0, ~#drive1~0.base, ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 4 + ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 8 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 12 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 16 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 20 + ~#drive1~0.offset, 4);~#drive2~0.base, ~#drive2~0.offset := 54, 0;call #Ultimate.allocInit(24, 54);call write~init~int(0, ~#drive2~0.base, ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 4 + ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 8 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 12 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 16 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 20 + ~#drive2~0.offset, 4);~#drive3~0.base, ~#drive3~0.offset := 55, 0;call #Ultimate.allocInit(24, 55);call write~init~int(0, ~#drive3~0.base, ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 4 + ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 8 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 12 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 16 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 20 + ~#drive3~0.offset, 4);~#drives~0.base, ~#drives~0.offset := 56, 0;call #Ultimate.allocInit(32, 56);call write~init~$Pointer$(~#drive0~0.base, ~#drive0~0.offset, ~#drives~0.base, ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive1~0.base, ~#drive1~0.offset, ~#drives~0.base, 8 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive2~0.base, ~#drive2~0.offset, ~#drives~0.base, 16 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive3~0.base, ~#drive3~0.offset, ~#drives~0.base, 24 + ~#drives~0.offset, 8);~pcd_drive_count~0 := 0;~#pcd_mutex~0.base, ~#pcd_mutex~0.offset := 57, 0;call #Ultimate.allocInit(156, 57);call write~init~int(1, ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 4 + ~#pcd_mutex~0.offset, 4);call write~init~int(3735899821, ~#pcd_mutex~0.base, 8 + ~#pcd_mutex~0.offset, 4);call write~init~int(4294967295, ~#pcd_mutex~0.base, 12 + ~#pcd_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_mutex~0.base, 16 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 24 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 32 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 40 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pcd_mutex~0.base, 48 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 56 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 60 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 80 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 88 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 96 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 104 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 112 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 120 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 128 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pcd_mutex~0.base, 136 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 144 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 148 + ~#pcd_mutex~0.offset, 8);~#pcd_lock~0.base, ~#pcd_lock~0.offset := 58, 0;call #Ultimate.allocInit(68, 58);call write~init~int(0, ~#pcd_lock~0.base, ~#pcd_lock~0.offset, 4);call write~init~int(3735899821, ~#pcd_lock~0.base, 4 + ~#pcd_lock~0.offset, 4);call write~init~int(4294967295, ~#pcd_lock~0.base, 8 + ~#pcd_lock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_lock~0.base, 12 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 20 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 28 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 36 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(6, 0, ~#pcd_lock~0.base, 44 + ~#pcd_lock~0.offset, 8);call write~init~int(0, ~#pcd_lock~0.base, 52 + ~#pcd_lock~0.offset, 4);call write~init~int(0, ~#pcd_lock~0.base, 56 + ~#pcd_lock~0.offset, 8);~ps_continuation~0.base, ~ps_continuation~0.offset := 0, 0;~ps_ready~0.base, ~ps_ready~0.offset := 0, 0;~ps_timeout~0 := 0;~ps_tq_active~0 := 0;~ps_nice~0 := 0;~#ps_spinlock~0.base, ~#ps_spinlock~0.offset := 59, 0;call #Ultimate.allocInit(68, 59);call write~init~int(0, ~#ps_spinlock~0.base, ~#ps_spinlock~0.offset, 4);call write~init~int(3735899821, ~#ps_spinlock~0.base, 4 + ~#ps_spinlock~0.offset, 4);call write~init~int(4294967295, ~#ps_spinlock~0.base, 8 + ~#ps_spinlock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#ps_spinlock~0.base, 12 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 20 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 28 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 36 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(7, 0, ~#ps_spinlock~0.base, 44 + ~#ps_spinlock~0.offset, 8);call write~init~int(0, ~#ps_spinlock~0.base, 52 + ~#ps_spinlock~0.offset, 4);call write~init~int(0, ~#ps_spinlock~0.base, 56 + ~#ps_spinlock~0.offset, 8);~#ps_tq~0.base, ~#ps_tq~0.offset := 60, 0;call #Ultimate.allocInit(204, 60);call write~init~int(4195344, ~#ps_tq~0.base, ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 16 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~ps_tq_int.base, #funAddr~ps_tq_int.offset, ~#ps_tq~0.base, 24 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, ~#ps_tq~0.offset, ~#ps_tq~0.base, 32 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 40 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 48 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(8, 0, ~#ps_tq~0.base, 56 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 64 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 68 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 76 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 1953723489, ~#ps_tq~0.base, 84 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 92 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, (if (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 else (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~#ps_tq~0.base, 100 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ~#ps_tq~0.base, 108 + ~#ps_tq~0.offset, 8);call write~init~int(~#ps_tq~0.base + ~#ps_tq~0.offset, ~#ps_tq~0.base, 116 + ~#ps_tq~0.offset, 8);call write~init~int(-1, ~#ps_tq~0.base, 124 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 128 + ~#ps_tq~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 132 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 140 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 141 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 142 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 143 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 144 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 145 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 146 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 147 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 148 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 149 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 150 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 151 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 152 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 153 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 154 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 155 + ~#ps_tq~0.offset, 1);call write~init~$Pointer$(9, 0, ~#ps_tq~0.base, 156 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 164 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 172 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(10, 0, ~#ps_tq~0.base, 180 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 188 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 192 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 200 + ~#ps_tq~0.offset, 4);~#pcd~0.base, ~#pcd~0.offset := 61, 0;call #Ultimate.allocInit(1296, 61);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base);~#pcd_scratch~0.base, ~#pcd_scratch~0.offset := 62, 0;call #Ultimate.allocInit(64, 62);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_scratch~0.base);~#pcd_buffer~0.base, ~#pcd_buffer~0.offset := 63, 0;call #Ultimate.allocInit(2048, 63);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_buffer~0.base);~pcd_bufblk~0 := -1;~pcd_current~0.base, ~pcd_current~0.offset := 0, 0;~pcd_req~0.base, ~pcd_req~0.offset := 0, 0;~pcd_retries~0 := 0;~pcd_busy~0 := 0;~pcd_sector~0 := 0;~pcd_count~0 := 0;~pcd_buf~0.base, ~pcd_buf~0.offset := 0, 0;~#pcd_bdops~0.base, ~#pcd_bdops~0.offset := 64, 0;call #Ultimate.allocInit(96, 64);call write~init~$Pointer$(#funAddr~pcd_block_open.base, #funAddr~pcd_block_open.offset, ~#pcd_bdops~0.base, ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_release.base, #funAddr~pcd_block_release.offset, ~#pcd_bdops~0.base, 8 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_ioctl.base, #funAddr~pcd_block_ioctl.offset, ~#pcd_bdops~0.base, 16 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 24 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 32 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_check_events.base, #funAddr~pcd_block_check_events.offset, ~#pcd_bdops~0.base, 40 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 48 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 56 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 64 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 72 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 80 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pcd_bdops~0.base, 88 + ~#pcd_bdops~0.offset, 8);~#pcd_dops~0.base, ~#pcd_dops~0.offset := 65, 0;call #Ultimate.allocInit(120, 65);call write~init~$Pointer$(#funAddr~pcd_open.base, #funAddr~pcd_open.offset, ~#pcd_dops~0.base, ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_release.base, #funAddr~pcd_release.offset, ~#pcd_dops~0.base, 8 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_status.base, #funAddr~pcd_drive_status.offset, ~#pcd_dops~0.base, 16 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_check_events.base, #funAddr~pcd_check_events.offset, ~#pcd_dops~0.base, 24 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 32 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_tray_move.base, #funAddr~pcd_tray_move.offset, ~#pcd_dops~0.base, 40 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_lock_door.base, #funAddr~pcd_lock_door.offset, ~#pcd_dops~0.base, 48 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 56 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 64 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 72 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_get_mcn.base, #funAddr~pcd_get_mcn.offset, ~#pcd_dops~0.base, 80 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_reset.base, #funAddr~pcd_drive_reset.offset, ~#pcd_dops~0.base, 88 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_audio_ioctl.base, #funAddr~pcd_audio_ioctl.offset, ~#pcd_dops~0.base, 96 + ~#pcd_dops~0.offset, 8);call write~init~int(29639, ~#pcd_dops~0.base, 104 + ~#pcd_dops~0.offset, 4);call write~init~int(0, ~#pcd_dops~0.base, 108 + ~#pcd_dops~0.offset, 4);call write~init~$Pointer$(#funAddr~pcd_packet.base, #funAddr~pcd_packet.offset, ~#pcd_dops~0.base, 112 + ~#pcd_dops~0.offset, 8);~pcd_queue~0.base, ~pcd_queue~0.offset := 0, 0;~ldvarg11~0.base, ~ldvarg11~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg13~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset := 0, 0;~pcd_bdops_group1~0.base, ~pcd_bdops_group1~0.offset := 0, 0;~ldvarg0~0 := 0;~ldvarg5~0 := 0;~ldvarg16~0 := 0;~ldvarg15~0 := 0;~pcd_dops_group0~0.base, ~pcd_dops_group0~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg14~0 := 0;~ldvarg4~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_pcd_mutex~0 := 0; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {8606#(= ~disable~0 0)} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet320#1, main_#t~switch321#1, main_#t~nondet322#1, main_#t~switch323#1, main_#t~ret324#1, main_#t~ret325#1, main_#t~ret326#1, main_#t~ret327#1, main_#t~ret328#1, main_#t~ret329#1, main_#t~ret330#1, main_#t~ret331#1, main_#t~ret332#1, main_#t~ret333#1, main_#t~ret334#1, main_#t~ret335#1, main_#t~ret336#1, main_#t~ret337#1, main_#t~ret338#1, main_#t~ret339#1, main_#t~ret340#1, main_#t~nondet341#1, main_#t~switch342#1, main_#t~ret343#1, main_#t~nondet344#1, main_#t~switch345#1, main_#t~nondet346#1, main_#t~switch347#1, main_#t~ret348#1, main_#t~ret349#1, main_#t~ret350#1, main_#t~ret351#1, main_#t~ret352#1, main_#t~ret353#1, main_~tmp~31#1, main_~tmp___0~17#1, main_~tmp___1~8#1, main_~tmp___2~4#1, main_~tmp___3~1#1;havoc main_~tmp~31#1;havoc main_~tmp___0~17#1;havoc main_~tmp___1~8#1;havoc main_~tmp___2~4#1;havoc main_~tmp___3~1#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_pcd_mutex~0 := 1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,240 INFO L290 TraceCheckUtils]: 2: Hoare triple {8606#(= ~disable~0 0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,241 INFO L290 TraceCheckUtils]: 3: Hoare triple {8606#(= ~disable~0 0)} assume -2147483648 <= main_#t~nondet320#1 && main_#t~nondet320#1 <= 2147483647;main_~tmp~31#1 := main_#t~nondet320#1;havoc main_#t~nondet320#1;main_#t~switch321#1 := 0 == main_~tmp~31#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,242 INFO L290 TraceCheckUtils]: 4: Hoare triple {8606#(= ~disable~0 0)} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 1 == main_~tmp~31#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,244 INFO L290 TraceCheckUtils]: 5: Hoare triple {8606#(= ~disable~0 0)} assume main_#t~switch321#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,244 INFO L290 TraceCheckUtils]: 6: Hoare triple {8606#(= ~disable~0 0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet341#1 && main_#t~nondet341#1 <= 2147483647;main_~tmp___1~8#1 := main_#t~nondet341#1;havoc main_#t~nondet341#1;main_#t~switch342#1 := 0 == main_~tmp___1~8#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,244 INFO L290 TraceCheckUtils]: 7: Hoare triple {8606#(= ~disable~0 0)} assume !main_#t~switch342#1;main_#t~switch342#1 := main_#t~switch342#1 || 1 == main_~tmp___1~8#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,245 INFO L290 TraceCheckUtils]: 8: Hoare triple {8606#(= ~disable~0 0)} assume main_#t~switch342#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,245 INFO L290 TraceCheckUtils]: 9: Hoare triple {8606#(= ~disable~0 0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_pcd_init } true;havoc pcd_init_#res#1;havoc pcd_init_#t~ret306#1, pcd_init_#t~ret307#1, pcd_init_#t~mem308#1.base, pcd_init_#t~mem308#1.offset, pcd_init_#t~ret309#1.base, pcd_init_#t~ret309#1.offset, pcd_init_#t~mem310#1.base, pcd_init_#t~mem310#1.offset, pcd_init_#t~mem311#1, pcd_init_#t~ret312#1, pcd_init_#t~mem313#1.base, pcd_init_#t~mem313#1.offset, pcd_init_#t~mem314#1.base, pcd_init_#t~mem314#1.offset, pcd_init_#t~mem315#1.base, pcd_init_#t~mem315#1.offset, pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset, pcd_init_~unit~3#1, pcd_init_~tmp~30#1, pcd_init_~tmp___0~16#1;havoc pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset;havoc pcd_init_~unit~3#1;havoc pcd_init_~tmp~30#1;havoc pcd_init_~tmp___0~16#1; {8606#(= ~disable~0 0)} is VALID [2022-02-20 21:44:41,246 INFO L290 TraceCheckUtils]: 10: Hoare triple {8606#(= ~disable~0 0)} assume 0 != ~disable~0;pcd_init_#res#1 := -22; {8605#false} is VALID [2022-02-20 21:44:41,246 INFO L290 TraceCheckUtils]: 11: Hoare triple {8605#false} main_#t~ret343#1 := pcd_init_#res#1;assume { :end_inline_pcd_init } true;assume -2147483648 <= main_#t~ret343#1 && main_#t~ret343#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret343#1;havoc main_#t~ret343#1; {8605#false} is VALID [2022-02-20 21:44:41,247 INFO L290 TraceCheckUtils]: 12: Hoare triple {8605#false} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1; {8605#false} is VALID [2022-02-20 21:44:41,247 INFO L290 TraceCheckUtils]: 13: Hoare triple {8605#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {8605#false} is VALID [2022-02-20 21:44:41,248 INFO L290 TraceCheckUtils]: 14: Hoare triple {8605#false} assume { :begin_inline_ldv_check_final_state } true; {8605#false} is VALID [2022-02-20 21:44:41,248 INFO L290 TraceCheckUtils]: 15: Hoare triple {8605#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {8605#false} is VALID [2022-02-20 21:44:41,248 INFO L272 TraceCheckUtils]: 16: Hoare triple {8605#false} call ldv_error(); {8605#false} is VALID [2022-02-20 21:44:41,249 INFO L290 TraceCheckUtils]: 17: Hoare triple {8605#false} assume !false; {8605#false} is VALID [2022-02-20 21:44:41,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:41,252 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:41,252 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [746119564] [2022-02-20 21:44:41,253 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [746119564] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:41,253 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:41,253 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-02-20 21:44:41,253 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1314763323] [2022-02-20 21:44:41,254 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:41,256 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-02-20 21:44:41,256 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:41,261 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:41,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:41,293 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:41,293 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:41,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:41,294 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:41,295 INFO L87 Difference]: Start difference. First operand 1394 states and 1979 transitions. Second operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:45,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:45,199 INFO L93 Difference]: Finished difference Result 2785 states and 3955 transitions. [2022-02-20 21:44:45,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:45,199 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-02-20 21:44:45,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:45,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:45,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2087 transitions. [2022-02-20 21:44:45,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:45,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2087 transitions. [2022-02-20 21:44:45,272 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 2087 transitions. [2022-02-20 21:44:47,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2087 edges. 2087 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:47,133 INFO L225 Difference]: With dead ends: 2785 [2022-02-20 21:44:47,133 INFO L226 Difference]: Without dead ends: 1394 [2022-02-20 21:44:47,138 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:47,140 INFO L933 BasicCegarLoop]: 1043 mSDtfsCounter, 1034 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1034 SdHoareTripleChecker+Valid, 1043 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:47,141 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1034 Valid, 1043 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:47,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1394 states. [2022-02-20 21:44:47,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1394 to 1394. [2022-02-20 21:44:47,219 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:47,222 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1394 states. Second operand has 1394 states, 1021 states have (on average 1.3780607247796277) internal successors, (1407), 1053 states have internal predecessors, (1407), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:47,227 INFO L74 IsIncluded]: Start isIncluded. First operand 1394 states. Second operand has 1394 states, 1021 states have (on average 1.3780607247796277) internal successors, (1407), 1053 states have internal predecessors, (1407), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:47,230 INFO L87 Difference]: Start difference. First operand 1394 states. Second operand has 1394 states, 1021 states have (on average 1.3780607247796277) internal successors, (1407), 1053 states have internal predecessors, (1407), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:47,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:47,343 INFO L93 Difference]: Finished difference Result 1394 states and 1977 transitions. [2022-02-20 21:44:47,344 INFO L276 IsEmpty]: Start isEmpty. Operand 1394 states and 1977 transitions. [2022-02-20 21:44:47,349 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:47,349 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:47,354 INFO L74 IsIncluded]: Start isIncluded. First operand has 1394 states, 1021 states have (on average 1.3780607247796277) internal successors, (1407), 1053 states have internal predecessors, (1407), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) Second operand 1394 states. [2022-02-20 21:44:47,357 INFO L87 Difference]: Start difference. First operand has 1394 states, 1021 states have (on average 1.3780607247796277) internal successors, (1407), 1053 states have internal predecessors, (1407), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) Second operand 1394 states. [2022-02-20 21:44:47,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:47,460 INFO L93 Difference]: Finished difference Result 1394 states and 1977 transitions. [2022-02-20 21:44:47,460 INFO L276 IsEmpty]: Start isEmpty. Operand 1394 states and 1977 transitions. [2022-02-20 21:44:47,467 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:47,467 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:47,467 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:47,467 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:47,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1394 states, 1021 states have (on average 1.3780607247796277) internal successors, (1407), 1053 states have internal predecessors, (1407), 288 states have call successors, (288), 85 states have call predecessors, (288), 84 states have return successors, (282), 271 states have call predecessors, (282), 282 states have call successors, (282) [2022-02-20 21:44:47,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1394 states to 1394 states and 1977 transitions. [2022-02-20 21:44:47,621 INFO L78 Accepts]: Start accepts. Automaton has 1394 states and 1977 transitions. Word has length 18 [2022-02-20 21:44:47,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:44:47,622 INFO L470 AbstractCegarLoop]: Abstraction has 1394 states and 1977 transitions. [2022-02-20 21:44:47,625 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:44:47,625 INFO L276 IsEmpty]: Start isEmpty. Operand 1394 states and 1977 transitions. [2022-02-20 21:44:47,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-02-20 21:44:47,626 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:44:47,626 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:44:47,626 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:44:47,626 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:44:47,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:44:47,627 INFO L85 PathProgramCache]: Analyzing trace with hash 685874875, now seen corresponding path program 1 times [2022-02-20 21:44:47,627 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:44:47,628 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156296127] [2022-02-20 21:44:47,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:44:47,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:44:47,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:47,723 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:44:47,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:44:47,734 INFO L290 TraceCheckUtils]: 0: Hoare triple {17273#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {17273#true} is VALID [2022-02-20 21:44:47,734 INFO L290 TraceCheckUtils]: 1: Hoare triple {17273#true} assume true; {17273#true} is VALID [2022-02-20 21:44:47,735 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17273#true} {17274#false} #2072#return; {17274#false} is VALID [2022-02-20 21:44:47,735 INFO L290 TraceCheckUtils]: 0: Hoare triple {17273#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(73, 2);call #Ultimate.allocInit(4, 3);call write~init~int(112, 3, 0, 1);call write~init~int(99, 3, 1, 1);call write~init~int(100, 3, 2, 1);call write~init~int(0, 3, 3, 1);call #Ultimate.allocInit(20, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(36, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(123, 9);call #Ultimate.allocInit(123, 10);call #Ultimate.allocInit(5, 11);call write~init~int(37, 11, 0, 1);call write~init~int(115, 11, 1, 1);call write~init~int(37, 11, 2, 1);call write~init~int(100, 11, 3, 1);call write~init~int(0, 11, 4, 1);call #Ultimate.allocInit(57, 12);call #Ultimate.allocInit(15, 13);call #Ultimate.allocInit(12, 14);call #Ultimate.allocInit(29, 15);call #Ultimate.allocInit(11, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(33, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(11, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(14, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(15, 25);call #Ultimate.allocInit(10, 26);call #Ultimate.allocInit(12, 27);call #Ultimate.allocInit(6, 28);call write~init~int(101, 28, 0, 1);call write~init~int(106, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(99, 28, 3, 1);call write~init~int(116, 28, 4, 1);call write~init~int(0, 28, 5, 1);call #Ultimate.allocInit(11, 29);call #Ultimate.allocInit(28, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(51, 31, 1, 1);call write~init~int(120, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(13, 32);call #Ultimate.allocInit(2, 33);call write~init~int(10, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(16, 34);call #Ultimate.allocInit(12, 35);call #Ultimate.allocInit(9, 36);call #Ultimate.allocInit(6, 37);call write~init~int(83, 37, 0, 1);call write~init~int(108, 37, 1, 1);call write~init~int(97, 37, 2, 1);call write~init~int(118, 37, 3, 1);call write~init~int(101, 37, 4, 1);call write~init~int(0, 37, 5, 1);call #Ultimate.allocInit(7, 38);call write~init~int(77, 38, 0, 1);call write~init~int(97, 38, 1, 1);call write~init~int(115, 38, 2, 1);call write~init~int(116, 38, 3, 1);call write~init~int(101, 38, 4, 1);call write~init~int(114, 38, 5, 1);call write~init~int(0, 38, 6, 1);call #Ultimate.allocInit(24, 39);call #Ultimate.allocInit(6, 40);call write~init~int(83, 40, 0, 1);call write~init~int(108, 40, 1, 1);call write~init~int(97, 40, 2, 1);call write~init~int(118, 40, 3, 1);call write~init~int(101, 40, 4, 1);call write~init~int(0, 40, 5, 1);call #Ultimate.allocInit(7, 41);call write~init~int(77, 41, 0, 1);call write~init~int(97, 41, 1, 1);call write~init~int(115, 41, 2, 1);call write~init~int(116, 41, 3, 1);call write~init~int(101, 41, 4, 1);call write~init~int(114, 41, 5, 1);call write~init~int(0, 41, 6, 1);call #Ultimate.allocInit(12, 42);call #Ultimate.allocInit(24, 43);call #Ultimate.allocInit(38, 44);call #Ultimate.allocInit(5, 45);call write~init~int(49, 45, 0, 1);call write~init~int(46, 45, 1, 1);call write~init~int(48, 45, 2, 1);call write~init~int(55, 45, 3, 1);call write~init~int(0, 45, 4, 1);call #Ultimate.allocInit(27, 46);call #Ultimate.allocInit(11, 47);call #Ultimate.allocInit(11, 48);call #Ultimate.allocInit(16, 49);call #Ultimate.allocInit(15, 50);call #Ultimate.allocInit(8, 51);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~verbose~0 := 0;~major~0 := 46;~name~0.base, ~name~0.offset := 3, 0;~nice~0 := 0;~disable~0 := 0;~#drive0~0.base, ~#drive0~0.offset := 52, 0;call #Ultimate.allocInit(24, 52);call write~init~int(0, ~#drive0~0.base, ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 4 + ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 8 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 12 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 16 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 20 + ~#drive0~0.offset, 4);~#drive1~0.base, ~#drive1~0.offset := 53, 0;call #Ultimate.allocInit(24, 53);call write~init~int(0, ~#drive1~0.base, ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 4 + ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 8 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 12 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 16 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 20 + ~#drive1~0.offset, 4);~#drive2~0.base, ~#drive2~0.offset := 54, 0;call #Ultimate.allocInit(24, 54);call write~init~int(0, ~#drive2~0.base, ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 4 + ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 8 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 12 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 16 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 20 + ~#drive2~0.offset, 4);~#drive3~0.base, ~#drive3~0.offset := 55, 0;call #Ultimate.allocInit(24, 55);call write~init~int(0, ~#drive3~0.base, ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 4 + ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 8 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 12 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 16 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 20 + ~#drive3~0.offset, 4);~#drives~0.base, ~#drives~0.offset := 56, 0;call #Ultimate.allocInit(32, 56);call write~init~$Pointer$(~#drive0~0.base, ~#drive0~0.offset, ~#drives~0.base, ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive1~0.base, ~#drive1~0.offset, ~#drives~0.base, 8 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive2~0.base, ~#drive2~0.offset, ~#drives~0.base, 16 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive3~0.base, ~#drive3~0.offset, ~#drives~0.base, 24 + ~#drives~0.offset, 8);~pcd_drive_count~0 := 0;~#pcd_mutex~0.base, ~#pcd_mutex~0.offset := 57, 0;call #Ultimate.allocInit(156, 57);call write~init~int(1, ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 4 + ~#pcd_mutex~0.offset, 4);call write~init~int(3735899821, ~#pcd_mutex~0.base, 8 + ~#pcd_mutex~0.offset, 4);call write~init~int(4294967295, ~#pcd_mutex~0.base, 12 + ~#pcd_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_mutex~0.base, 16 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 24 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 32 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 40 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pcd_mutex~0.base, 48 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 56 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 60 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 80 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 88 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 96 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 104 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 112 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 120 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 128 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pcd_mutex~0.base, 136 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 144 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 148 + ~#pcd_mutex~0.offset, 8);~#pcd_lock~0.base, ~#pcd_lock~0.offset := 58, 0;call #Ultimate.allocInit(68, 58);call write~init~int(0, ~#pcd_lock~0.base, ~#pcd_lock~0.offset, 4);call write~init~int(3735899821, ~#pcd_lock~0.base, 4 + ~#pcd_lock~0.offset, 4);call write~init~int(4294967295, ~#pcd_lock~0.base, 8 + ~#pcd_lock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_lock~0.base, 12 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 20 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 28 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 36 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(6, 0, ~#pcd_lock~0.base, 44 + ~#pcd_lock~0.offset, 8);call write~init~int(0, ~#pcd_lock~0.base, 52 + ~#pcd_lock~0.offset, 4);call write~init~int(0, ~#pcd_lock~0.base, 56 + ~#pcd_lock~0.offset, 8);~ps_continuation~0.base, ~ps_continuation~0.offset := 0, 0;~ps_ready~0.base, ~ps_ready~0.offset := 0, 0;~ps_timeout~0 := 0;~ps_tq_active~0 := 0;~ps_nice~0 := 0;~#ps_spinlock~0.base, ~#ps_spinlock~0.offset := 59, 0;call #Ultimate.allocInit(68, 59);call write~init~int(0, ~#ps_spinlock~0.base, ~#ps_spinlock~0.offset, 4);call write~init~int(3735899821, ~#ps_spinlock~0.base, 4 + ~#ps_spinlock~0.offset, 4);call write~init~int(4294967295, ~#ps_spinlock~0.base, 8 + ~#ps_spinlock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#ps_spinlock~0.base, 12 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 20 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 28 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 36 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(7, 0, ~#ps_spinlock~0.base, 44 + ~#ps_spinlock~0.offset, 8);call write~init~int(0, ~#ps_spinlock~0.base, 52 + ~#ps_spinlock~0.offset, 4);call write~init~int(0, ~#ps_spinlock~0.base, 56 + ~#ps_spinlock~0.offset, 8);~#ps_tq~0.base, ~#ps_tq~0.offset := 60, 0;call #Ultimate.allocInit(204, 60);call write~init~int(4195344, ~#ps_tq~0.base, ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 16 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~ps_tq_int.base, #funAddr~ps_tq_int.offset, ~#ps_tq~0.base, 24 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, ~#ps_tq~0.offset, ~#ps_tq~0.base, 32 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 40 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 48 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(8, 0, ~#ps_tq~0.base, 56 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 64 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 68 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 76 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 1953723489, ~#ps_tq~0.base, 84 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 92 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, (if (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 else (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~#ps_tq~0.base, 100 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ~#ps_tq~0.base, 108 + ~#ps_tq~0.offset, 8);call write~init~int(~#ps_tq~0.base + ~#ps_tq~0.offset, ~#ps_tq~0.base, 116 + ~#ps_tq~0.offset, 8);call write~init~int(-1, ~#ps_tq~0.base, 124 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 128 + ~#ps_tq~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 132 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 140 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 141 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 142 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 143 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 144 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 145 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 146 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 147 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 148 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 149 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 150 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 151 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 152 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 153 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 154 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 155 + ~#ps_tq~0.offset, 1);call write~init~$Pointer$(9, 0, ~#ps_tq~0.base, 156 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 164 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 172 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(10, 0, ~#ps_tq~0.base, 180 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 188 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 192 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 200 + ~#ps_tq~0.offset, 4);~#pcd~0.base, ~#pcd~0.offset := 61, 0;call #Ultimate.allocInit(1296, 61);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base);~#pcd_scratch~0.base, ~#pcd_scratch~0.offset := 62, 0;call #Ultimate.allocInit(64, 62);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_scratch~0.base);~#pcd_buffer~0.base, ~#pcd_buffer~0.offset := 63, 0;call #Ultimate.allocInit(2048, 63);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_buffer~0.base);~pcd_bufblk~0 := -1;~pcd_current~0.base, ~pcd_current~0.offset := 0, 0;~pcd_req~0.base, ~pcd_req~0.offset := 0, 0;~pcd_retries~0 := 0;~pcd_busy~0 := 0;~pcd_sector~0 := 0;~pcd_count~0 := 0;~pcd_buf~0.base, ~pcd_buf~0.offset := 0, 0;~#pcd_bdops~0.base, ~#pcd_bdops~0.offset := 64, 0;call #Ultimate.allocInit(96, 64);call write~init~$Pointer$(#funAddr~pcd_block_open.base, #funAddr~pcd_block_open.offset, ~#pcd_bdops~0.base, ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_release.base, #funAddr~pcd_block_release.offset, ~#pcd_bdops~0.base, 8 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_ioctl.base, #funAddr~pcd_block_ioctl.offset, ~#pcd_bdops~0.base, 16 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 24 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 32 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_check_events.base, #funAddr~pcd_block_check_events.offset, ~#pcd_bdops~0.base, 40 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 48 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 56 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 64 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 72 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 80 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pcd_bdops~0.base, 88 + ~#pcd_bdops~0.offset, 8);~#pcd_dops~0.base, ~#pcd_dops~0.offset := 65, 0;call #Ultimate.allocInit(120, 65);call write~init~$Pointer$(#funAddr~pcd_open.base, #funAddr~pcd_open.offset, ~#pcd_dops~0.base, ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_release.base, #funAddr~pcd_release.offset, ~#pcd_dops~0.base, 8 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_status.base, #funAddr~pcd_drive_status.offset, ~#pcd_dops~0.base, 16 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_check_events.base, #funAddr~pcd_check_events.offset, ~#pcd_dops~0.base, 24 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 32 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_tray_move.base, #funAddr~pcd_tray_move.offset, ~#pcd_dops~0.base, 40 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_lock_door.base, #funAddr~pcd_lock_door.offset, ~#pcd_dops~0.base, 48 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 56 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 64 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 72 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_get_mcn.base, #funAddr~pcd_get_mcn.offset, ~#pcd_dops~0.base, 80 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_reset.base, #funAddr~pcd_drive_reset.offset, ~#pcd_dops~0.base, 88 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_audio_ioctl.base, #funAddr~pcd_audio_ioctl.offset, ~#pcd_dops~0.base, 96 + ~#pcd_dops~0.offset, 8);call write~init~int(29639, ~#pcd_dops~0.base, 104 + ~#pcd_dops~0.offset, 4);call write~init~int(0, ~#pcd_dops~0.base, 108 + ~#pcd_dops~0.offset, 4);call write~init~$Pointer$(#funAddr~pcd_packet.base, #funAddr~pcd_packet.offset, ~#pcd_dops~0.base, 112 + ~#pcd_dops~0.offset, 8);~pcd_queue~0.base, ~pcd_queue~0.offset := 0, 0;~ldvarg11~0.base, ~ldvarg11~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg13~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset := 0, 0;~pcd_bdops_group1~0.base, ~pcd_bdops_group1~0.offset := 0, 0;~ldvarg0~0 := 0;~ldvarg5~0 := 0;~ldvarg16~0 := 0;~ldvarg15~0 := 0;~pcd_dops_group0~0.base, ~pcd_dops_group0~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg14~0 := 0;~ldvarg4~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_pcd_mutex~0 := 0; {17273#true} is VALID [2022-02-20 21:44:47,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {17273#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet320#1, main_#t~switch321#1, main_#t~nondet322#1, main_#t~switch323#1, main_#t~ret324#1, main_#t~ret325#1, main_#t~ret326#1, main_#t~ret327#1, main_#t~ret328#1, main_#t~ret329#1, main_#t~ret330#1, main_#t~ret331#1, main_#t~ret332#1, main_#t~ret333#1, main_#t~ret334#1, main_#t~ret335#1, main_#t~ret336#1, main_#t~ret337#1, main_#t~ret338#1, main_#t~ret339#1, main_#t~ret340#1, main_#t~nondet341#1, main_#t~switch342#1, main_#t~ret343#1, main_#t~nondet344#1, main_#t~switch345#1, main_#t~nondet346#1, main_#t~switch347#1, main_#t~ret348#1, main_#t~ret349#1, main_#t~ret350#1, main_#t~ret351#1, main_#t~ret352#1, main_#t~ret353#1, main_~tmp~31#1, main_~tmp___0~17#1, main_~tmp___1~8#1, main_~tmp___2~4#1, main_~tmp___3~1#1;havoc main_~tmp~31#1;havoc main_~tmp___0~17#1;havoc main_~tmp___1~8#1;havoc main_~tmp___2~4#1;havoc main_~tmp___3~1#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_pcd_mutex~0 := 1; {17273#true} is VALID [2022-02-20 21:44:47,736 INFO L290 TraceCheckUtils]: 2: Hoare triple {17273#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {17275#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:44:47,736 INFO L290 TraceCheckUtils]: 3: Hoare triple {17275#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet320#1 && main_#t~nondet320#1 <= 2147483647;main_~tmp~31#1 := main_#t~nondet320#1;havoc main_#t~nondet320#1;main_#t~switch321#1 := 0 == main_~tmp~31#1; {17275#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:44:47,737 INFO L290 TraceCheckUtils]: 4: Hoare triple {17275#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 1 == main_~tmp~31#1; {17275#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:44:47,737 INFO L290 TraceCheckUtils]: 5: Hoare triple {17275#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch321#1; {17275#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:44:47,738 INFO L290 TraceCheckUtils]: 6: Hoare triple {17275#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet341#1 && main_#t~nondet341#1 <= 2147483647;main_~tmp___1~8#1 := main_#t~nondet341#1;havoc main_#t~nondet341#1;main_#t~switch342#1 := 0 == main_~tmp___1~8#1; {17275#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:44:47,738 INFO L290 TraceCheckUtils]: 7: Hoare triple {17275#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch342#1; {17275#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:44:47,739 INFO L290 TraceCheckUtils]: 8: Hoare triple {17275#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_pcd_exit } true;havoc pcd_exit_#t~mem316#1, pcd_exit_#t~mem317#1.base, pcd_exit_#t~mem317#1.offset, pcd_exit_#t~mem318#1.base, pcd_exit_#t~mem318#1.offset, pcd_exit_#t~mem319#1.base, pcd_exit_#t~mem319#1.offset, pcd_exit_~cd~13#1.base, pcd_exit_~cd~13#1.offset, pcd_exit_~unit~4#1;havoc pcd_exit_~cd~13#1.base, pcd_exit_~cd~13#1.offset;havoc pcd_exit_~unit~4#1;pcd_exit_~unit~4#1 := 0;pcd_exit_~cd~13#1.base, pcd_exit_~cd~13#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {17274#false} is VALID [2022-02-20 21:44:47,739 INFO L290 TraceCheckUtils]: 9: Hoare triple {17274#false} assume !(pcd_exit_~unit~4#1 <= 3); {17274#false} is VALID [2022-02-20 21:44:47,739 INFO L290 TraceCheckUtils]: 10: Hoare triple {17274#false} assume { :begin_inline_blk_cleanup_queue } true;blk_cleanup_queue_#in~arg0#1.base, blk_cleanup_queue_#in~arg0#1.offset := ~pcd_queue~0.base, ~pcd_queue~0.offset;havoc blk_cleanup_queue_~arg0#1.base, blk_cleanup_queue_~arg0#1.offset;blk_cleanup_queue_~arg0#1.base, blk_cleanup_queue_~arg0#1.offset := blk_cleanup_queue_#in~arg0#1.base, blk_cleanup_queue_#in~arg0#1.offset; {17274#false} is VALID [2022-02-20 21:44:47,739 INFO L290 TraceCheckUtils]: 11: Hoare triple {17274#false} assume { :end_inline_blk_cleanup_queue } true; {17274#false} is VALID [2022-02-20 21:44:47,742 INFO L272 TraceCheckUtils]: 12: Hoare triple {17274#false} call unregister_blkdev(~major~0, ~name~0.base, ~name~0.offset); {17273#true} is VALID [2022-02-20 21:44:47,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {17273#true} ~arg0 := #in~arg0;~arg1.base, ~arg1.offset := #in~arg1.base, #in~arg1.offset; {17273#true} is VALID [2022-02-20 21:44:47,743 INFO L290 TraceCheckUtils]: 14: Hoare triple {17273#true} assume true; {17273#true} is VALID [2022-02-20 21:44:47,744 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {17273#true} {17274#false} #2072#return; {17274#false} is VALID [2022-02-20 21:44:47,745 INFO L290 TraceCheckUtils]: 16: Hoare triple {17274#false} assume { :end_inline_pcd_exit } true;~ldv_state_variable_0~0 := 2; {17274#false} is VALID [2022-02-20 21:44:47,745 INFO L290 TraceCheckUtils]: 17: Hoare triple {17274#false} assume { :begin_inline_ldv_check_final_state } true; {17274#false} is VALID [2022-02-20 21:44:47,745 INFO L290 TraceCheckUtils]: 18: Hoare triple {17274#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {17274#false} is VALID [2022-02-20 21:44:47,745 INFO L272 TraceCheckUtils]: 19: Hoare triple {17274#false} call ldv_error(); {17274#false} is VALID [2022-02-20 21:44:47,745 INFO L290 TraceCheckUtils]: 20: Hoare triple {17274#false} assume !false; {17274#false} is VALID [2022-02-20 21:44:47,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:44:47,746 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:44:47,746 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156296127] [2022-02-20 21:44:47,746 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156296127] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:44:47,746 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:44:47,747 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:44:47,747 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873832762] [2022-02-20 21:44:47,747 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:44:47,748 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-02-20 21:44:47,748 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:44:47,748 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-20 21:44:47,781 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:47,781 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:44:47,782 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:44:47,782 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:44:47,782 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:47,782 INFO L87 Difference]: Start difference. First operand 1394 states and 1977 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-20 21:44:56,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:56,508 INFO L93 Difference]: Finished difference Result 3867 states and 5478 transitions. [2022-02-20 21:44:56,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:44:56,509 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-02-20 21:44:56,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:44:56,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-20 21:44:56,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2897 transitions. [2022-02-20 21:44:56,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-20 21:44:56,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2897 transitions. [2022-02-20 21:44:56,642 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 2897 transitions. [2022-02-20 21:44:58,916 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2897 edges. 2897 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:44:59,246 INFO L225 Difference]: With dead ends: 3867 [2022-02-20 21:44:59,246 INFO L226 Difference]: Without dead ends: 2476 [2022-02-20 21:44:59,251 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:44:59,252 INFO L933 BasicCegarLoop]: 1257 mSDtfsCounter, 1000 mSDsluCounter, 836 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1000 SdHoareTripleChecker+Valid, 2093 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:44:59,252 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1000 Valid, 2093 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:44:59,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2476 states. [2022-02-20 21:44:59,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2476 to 2450. [2022-02-20 21:44:59,318 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:44:59,324 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2476 states. Second operand has 2450 states, 1767 states have (on average 1.375778155065082) internal successors, (2431), 1824 states have internal predecessors, (2431), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:44:59,330 INFO L74 IsIncluded]: Start isIncluded. First operand 2476 states. Second operand has 2450 states, 1767 states have (on average 1.375778155065082) internal successors, (2431), 1824 states have internal predecessors, (2431), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:44:59,335 INFO L87 Difference]: Start difference. First operand 2476 states. Second operand has 2450 states, 1767 states have (on average 1.375778155065082) internal successors, (2431), 1824 states have internal predecessors, (2431), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:44:59,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:59,565 INFO L93 Difference]: Finished difference Result 2476 states and 3498 transitions. [2022-02-20 21:44:59,565 INFO L276 IsEmpty]: Start isEmpty. Operand 2476 states and 3498 transitions. [2022-02-20 21:44:59,578 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:59,578 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:59,585 INFO L74 IsIncluded]: Start isIncluded. First operand has 2450 states, 1767 states have (on average 1.375778155065082) internal successors, (2431), 1824 states have internal predecessors, (2431), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) Second operand 2476 states. [2022-02-20 21:44:59,589 INFO L87 Difference]: Start difference. First operand has 2450 states, 1767 states have (on average 1.375778155065082) internal successors, (2431), 1824 states have internal predecessors, (2431), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) Second operand 2476 states. [2022-02-20 21:44:59,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:44:59,817 INFO L93 Difference]: Finished difference Result 2476 states and 3498 transitions. [2022-02-20 21:44:59,817 INFO L276 IsEmpty]: Start isEmpty. Operand 2476 states and 3498 transitions. [2022-02-20 21:44:59,829 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:44:59,829 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:44:59,829 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:44:59,829 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:44:59,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2450 states, 1767 states have (on average 1.375778155065082) internal successors, (2431), 1824 states have internal predecessors, (2431), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:45:00,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2450 states to 2450 states and 3471 transitions. [2022-02-20 21:45:00,166 INFO L78 Accepts]: Start accepts. Automaton has 2450 states and 3471 transitions. Word has length 21 [2022-02-20 21:45:00,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:45:00,166 INFO L470 AbstractCegarLoop]: Abstraction has 2450 states and 3471 transitions. [2022-02-20 21:45:00,167 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-20 21:45:00,167 INFO L276 IsEmpty]: Start isEmpty. Operand 2450 states and 3471 transitions. [2022-02-20 21:45:00,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-02-20 21:45:00,168 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:45:00,168 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:45:00,169 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:45:00,169 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:45:00,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:45:00,170 INFO L85 PathProgramCache]: Analyzing trace with hash -797188322, now seen corresponding path program 1 times [2022-02-20 21:45:00,170 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:45:00,170 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592332635] [2022-02-20 21:45:00,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:45:00,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:45:00,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:00,248 INFO L290 TraceCheckUtils]: 0: Hoare triple {31078#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(73, 2);call #Ultimate.allocInit(4, 3);call write~init~int(112, 3, 0, 1);call write~init~int(99, 3, 1, 1);call write~init~int(100, 3, 2, 1);call write~init~int(0, 3, 3, 1);call #Ultimate.allocInit(20, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(36, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(123, 9);call #Ultimate.allocInit(123, 10);call #Ultimate.allocInit(5, 11);call write~init~int(37, 11, 0, 1);call write~init~int(115, 11, 1, 1);call write~init~int(37, 11, 2, 1);call write~init~int(100, 11, 3, 1);call write~init~int(0, 11, 4, 1);call #Ultimate.allocInit(57, 12);call #Ultimate.allocInit(15, 13);call #Ultimate.allocInit(12, 14);call #Ultimate.allocInit(29, 15);call #Ultimate.allocInit(11, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(33, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(11, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(14, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(15, 25);call #Ultimate.allocInit(10, 26);call #Ultimate.allocInit(12, 27);call #Ultimate.allocInit(6, 28);call write~init~int(101, 28, 0, 1);call write~init~int(106, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(99, 28, 3, 1);call write~init~int(116, 28, 4, 1);call write~init~int(0, 28, 5, 1);call #Ultimate.allocInit(11, 29);call #Ultimate.allocInit(28, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(51, 31, 1, 1);call write~init~int(120, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(13, 32);call #Ultimate.allocInit(2, 33);call write~init~int(10, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(16, 34);call #Ultimate.allocInit(12, 35);call #Ultimate.allocInit(9, 36);call #Ultimate.allocInit(6, 37);call write~init~int(83, 37, 0, 1);call write~init~int(108, 37, 1, 1);call write~init~int(97, 37, 2, 1);call write~init~int(118, 37, 3, 1);call write~init~int(101, 37, 4, 1);call write~init~int(0, 37, 5, 1);call #Ultimate.allocInit(7, 38);call write~init~int(77, 38, 0, 1);call write~init~int(97, 38, 1, 1);call write~init~int(115, 38, 2, 1);call write~init~int(116, 38, 3, 1);call write~init~int(101, 38, 4, 1);call write~init~int(114, 38, 5, 1);call write~init~int(0, 38, 6, 1);call #Ultimate.allocInit(24, 39);call #Ultimate.allocInit(6, 40);call write~init~int(83, 40, 0, 1);call write~init~int(108, 40, 1, 1);call write~init~int(97, 40, 2, 1);call write~init~int(118, 40, 3, 1);call write~init~int(101, 40, 4, 1);call write~init~int(0, 40, 5, 1);call #Ultimate.allocInit(7, 41);call write~init~int(77, 41, 0, 1);call write~init~int(97, 41, 1, 1);call write~init~int(115, 41, 2, 1);call write~init~int(116, 41, 3, 1);call write~init~int(101, 41, 4, 1);call write~init~int(114, 41, 5, 1);call write~init~int(0, 41, 6, 1);call #Ultimate.allocInit(12, 42);call #Ultimate.allocInit(24, 43);call #Ultimate.allocInit(38, 44);call #Ultimate.allocInit(5, 45);call write~init~int(49, 45, 0, 1);call write~init~int(46, 45, 1, 1);call write~init~int(48, 45, 2, 1);call write~init~int(55, 45, 3, 1);call write~init~int(0, 45, 4, 1);call #Ultimate.allocInit(27, 46);call #Ultimate.allocInit(11, 47);call #Ultimate.allocInit(11, 48);call #Ultimate.allocInit(16, 49);call #Ultimate.allocInit(15, 50);call #Ultimate.allocInit(8, 51);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~verbose~0 := 0;~major~0 := 46;~name~0.base, ~name~0.offset := 3, 0;~nice~0 := 0;~disable~0 := 0;~#drive0~0.base, ~#drive0~0.offset := 52, 0;call #Ultimate.allocInit(24, 52);call write~init~int(0, ~#drive0~0.base, ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 4 + ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 8 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 12 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 16 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 20 + ~#drive0~0.offset, 4);~#drive1~0.base, ~#drive1~0.offset := 53, 0;call #Ultimate.allocInit(24, 53);call write~init~int(0, ~#drive1~0.base, ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 4 + ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 8 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 12 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 16 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 20 + ~#drive1~0.offset, 4);~#drive2~0.base, ~#drive2~0.offset := 54, 0;call #Ultimate.allocInit(24, 54);call write~init~int(0, ~#drive2~0.base, ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 4 + ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 8 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 12 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 16 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 20 + ~#drive2~0.offset, 4);~#drive3~0.base, ~#drive3~0.offset := 55, 0;call #Ultimate.allocInit(24, 55);call write~init~int(0, ~#drive3~0.base, ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 4 + ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 8 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 12 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 16 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 20 + ~#drive3~0.offset, 4);~#drives~0.base, ~#drives~0.offset := 56, 0;call #Ultimate.allocInit(32, 56);call write~init~$Pointer$(~#drive0~0.base, ~#drive0~0.offset, ~#drives~0.base, ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive1~0.base, ~#drive1~0.offset, ~#drives~0.base, 8 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive2~0.base, ~#drive2~0.offset, ~#drives~0.base, 16 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive3~0.base, ~#drive3~0.offset, ~#drives~0.base, 24 + ~#drives~0.offset, 8);~pcd_drive_count~0 := 0;~#pcd_mutex~0.base, ~#pcd_mutex~0.offset := 57, 0;call #Ultimate.allocInit(156, 57);call write~init~int(1, ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 4 + ~#pcd_mutex~0.offset, 4);call write~init~int(3735899821, ~#pcd_mutex~0.base, 8 + ~#pcd_mutex~0.offset, 4);call write~init~int(4294967295, ~#pcd_mutex~0.base, 12 + ~#pcd_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_mutex~0.base, 16 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 24 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 32 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 40 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pcd_mutex~0.base, 48 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 56 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 60 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 80 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 88 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 96 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 104 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 112 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 120 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 128 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pcd_mutex~0.base, 136 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 144 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 148 + ~#pcd_mutex~0.offset, 8);~#pcd_lock~0.base, ~#pcd_lock~0.offset := 58, 0;call #Ultimate.allocInit(68, 58);call write~init~int(0, ~#pcd_lock~0.base, ~#pcd_lock~0.offset, 4);call write~init~int(3735899821, ~#pcd_lock~0.base, 4 + ~#pcd_lock~0.offset, 4);call write~init~int(4294967295, ~#pcd_lock~0.base, 8 + ~#pcd_lock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_lock~0.base, 12 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 20 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 28 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 36 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(6, 0, ~#pcd_lock~0.base, 44 + ~#pcd_lock~0.offset, 8);call write~init~int(0, ~#pcd_lock~0.base, 52 + ~#pcd_lock~0.offset, 4);call write~init~int(0, ~#pcd_lock~0.base, 56 + ~#pcd_lock~0.offset, 8);~ps_continuation~0.base, ~ps_continuation~0.offset := 0, 0;~ps_ready~0.base, ~ps_ready~0.offset := 0, 0;~ps_timeout~0 := 0;~ps_tq_active~0 := 0;~ps_nice~0 := 0;~#ps_spinlock~0.base, ~#ps_spinlock~0.offset := 59, 0;call #Ultimate.allocInit(68, 59);call write~init~int(0, ~#ps_spinlock~0.base, ~#ps_spinlock~0.offset, 4);call write~init~int(3735899821, ~#ps_spinlock~0.base, 4 + ~#ps_spinlock~0.offset, 4);call write~init~int(4294967295, ~#ps_spinlock~0.base, 8 + ~#ps_spinlock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#ps_spinlock~0.base, 12 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 20 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 28 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 36 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(7, 0, ~#ps_spinlock~0.base, 44 + ~#ps_spinlock~0.offset, 8);call write~init~int(0, ~#ps_spinlock~0.base, 52 + ~#ps_spinlock~0.offset, 4);call write~init~int(0, ~#ps_spinlock~0.base, 56 + ~#ps_spinlock~0.offset, 8);~#ps_tq~0.base, ~#ps_tq~0.offset := 60, 0;call #Ultimate.allocInit(204, 60);call write~init~int(4195344, ~#ps_tq~0.base, ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 16 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~ps_tq_int.base, #funAddr~ps_tq_int.offset, ~#ps_tq~0.base, 24 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, ~#ps_tq~0.offset, ~#ps_tq~0.base, 32 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 40 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 48 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(8, 0, ~#ps_tq~0.base, 56 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 64 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 68 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 76 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 1953723489, ~#ps_tq~0.base, 84 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 92 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, (if (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 else (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~#ps_tq~0.base, 100 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ~#ps_tq~0.base, 108 + ~#ps_tq~0.offset, 8);call write~init~int(~#ps_tq~0.base + ~#ps_tq~0.offset, ~#ps_tq~0.base, 116 + ~#ps_tq~0.offset, 8);call write~init~int(-1, ~#ps_tq~0.base, 124 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 128 + ~#ps_tq~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 132 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 140 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 141 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 142 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 143 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 144 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 145 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 146 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 147 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 148 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 149 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 150 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 151 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 152 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 153 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 154 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 155 + ~#ps_tq~0.offset, 1);call write~init~$Pointer$(9, 0, ~#ps_tq~0.base, 156 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 164 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 172 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(10, 0, ~#ps_tq~0.base, 180 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 188 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 192 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 200 + ~#ps_tq~0.offset, 4);~#pcd~0.base, ~#pcd~0.offset := 61, 0;call #Ultimate.allocInit(1296, 61);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base);~#pcd_scratch~0.base, ~#pcd_scratch~0.offset := 62, 0;call #Ultimate.allocInit(64, 62);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_scratch~0.base);~#pcd_buffer~0.base, ~#pcd_buffer~0.offset := 63, 0;call #Ultimate.allocInit(2048, 63);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_buffer~0.base);~pcd_bufblk~0 := -1;~pcd_current~0.base, ~pcd_current~0.offset := 0, 0;~pcd_req~0.base, ~pcd_req~0.offset := 0, 0;~pcd_retries~0 := 0;~pcd_busy~0 := 0;~pcd_sector~0 := 0;~pcd_count~0 := 0;~pcd_buf~0.base, ~pcd_buf~0.offset := 0, 0;~#pcd_bdops~0.base, ~#pcd_bdops~0.offset := 64, 0;call #Ultimate.allocInit(96, 64);call write~init~$Pointer$(#funAddr~pcd_block_open.base, #funAddr~pcd_block_open.offset, ~#pcd_bdops~0.base, ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_release.base, #funAddr~pcd_block_release.offset, ~#pcd_bdops~0.base, 8 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_ioctl.base, #funAddr~pcd_block_ioctl.offset, ~#pcd_bdops~0.base, 16 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 24 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 32 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_check_events.base, #funAddr~pcd_block_check_events.offset, ~#pcd_bdops~0.base, 40 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 48 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 56 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 64 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 72 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 80 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pcd_bdops~0.base, 88 + ~#pcd_bdops~0.offset, 8);~#pcd_dops~0.base, ~#pcd_dops~0.offset := 65, 0;call #Ultimate.allocInit(120, 65);call write~init~$Pointer$(#funAddr~pcd_open.base, #funAddr~pcd_open.offset, ~#pcd_dops~0.base, ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_release.base, #funAddr~pcd_release.offset, ~#pcd_dops~0.base, 8 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_status.base, #funAddr~pcd_drive_status.offset, ~#pcd_dops~0.base, 16 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_check_events.base, #funAddr~pcd_check_events.offset, ~#pcd_dops~0.base, 24 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 32 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_tray_move.base, #funAddr~pcd_tray_move.offset, ~#pcd_dops~0.base, 40 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_lock_door.base, #funAddr~pcd_lock_door.offset, ~#pcd_dops~0.base, 48 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 56 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 64 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 72 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_get_mcn.base, #funAddr~pcd_get_mcn.offset, ~#pcd_dops~0.base, 80 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_reset.base, #funAddr~pcd_drive_reset.offset, ~#pcd_dops~0.base, 88 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_audio_ioctl.base, #funAddr~pcd_audio_ioctl.offset, ~#pcd_dops~0.base, 96 + ~#pcd_dops~0.offset, 8);call write~init~int(29639, ~#pcd_dops~0.base, 104 + ~#pcd_dops~0.offset, 4);call write~init~int(0, ~#pcd_dops~0.base, 108 + ~#pcd_dops~0.offset, 4);call write~init~$Pointer$(#funAddr~pcd_packet.base, #funAddr~pcd_packet.offset, ~#pcd_dops~0.base, 112 + ~#pcd_dops~0.offset, 8);~pcd_queue~0.base, ~pcd_queue~0.offset := 0, 0;~ldvarg11~0.base, ~ldvarg11~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg13~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset := 0, 0;~pcd_bdops_group1~0.base, ~pcd_bdops_group1~0.offset := 0, 0;~ldvarg0~0 := 0;~ldvarg5~0 := 0;~ldvarg16~0 := 0;~ldvarg15~0 := 0;~pcd_dops_group0~0.base, ~pcd_dops_group0~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg14~0 := 0;~ldvarg4~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_pcd_mutex~0 := 0; {31078#true} is VALID [2022-02-20 21:45:00,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {31078#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet320#1, main_#t~switch321#1, main_#t~nondet322#1, main_#t~switch323#1, main_#t~ret324#1, main_#t~ret325#1, main_#t~ret326#1, main_#t~ret327#1, main_#t~ret328#1, main_#t~ret329#1, main_#t~ret330#1, main_#t~ret331#1, main_#t~ret332#1, main_#t~ret333#1, main_#t~ret334#1, main_#t~ret335#1, main_#t~ret336#1, main_#t~ret337#1, main_#t~ret338#1, main_#t~ret339#1, main_#t~ret340#1, main_#t~nondet341#1, main_#t~switch342#1, main_#t~ret343#1, main_#t~nondet344#1, main_#t~switch345#1, main_#t~nondet346#1, main_#t~switch347#1, main_#t~ret348#1, main_#t~ret349#1, main_#t~ret350#1, main_#t~ret351#1, main_#t~ret352#1, main_#t~ret353#1, main_~tmp~31#1, main_~tmp___0~17#1, main_~tmp___1~8#1, main_~tmp___2~4#1, main_~tmp___3~1#1;havoc main_~tmp~31#1;havoc main_~tmp___0~17#1;havoc main_~tmp___1~8#1;havoc main_~tmp___2~4#1;havoc main_~tmp___3~1#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_pcd_mutex~0 := 1; {31078#true} is VALID [2022-02-20 21:45:00,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {31078#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {31078#true} is VALID [2022-02-20 21:45:00,249 INFO L290 TraceCheckUtils]: 3: Hoare triple {31078#true} assume -2147483648 <= main_#t~nondet320#1 && main_#t~nondet320#1 <= 2147483647;main_~tmp~31#1 := main_#t~nondet320#1;havoc main_#t~nondet320#1;main_#t~switch321#1 := 0 == main_~tmp~31#1; {31078#true} is VALID [2022-02-20 21:45:00,249 INFO L290 TraceCheckUtils]: 4: Hoare triple {31078#true} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 1 == main_~tmp~31#1; {31078#true} is VALID [2022-02-20 21:45:00,249 INFO L290 TraceCheckUtils]: 5: Hoare triple {31078#true} assume main_#t~switch321#1; {31078#true} is VALID [2022-02-20 21:45:00,250 INFO L290 TraceCheckUtils]: 6: Hoare triple {31078#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet341#1 && main_#t~nondet341#1 <= 2147483647;main_~tmp___1~8#1 := main_#t~nondet341#1;havoc main_#t~nondet341#1;main_#t~switch342#1 := 0 == main_~tmp___1~8#1; {31078#true} is VALID [2022-02-20 21:45:00,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {31078#true} assume !main_#t~switch342#1;main_#t~switch342#1 := main_#t~switch342#1 || 1 == main_~tmp___1~8#1; {31078#true} is VALID [2022-02-20 21:45:00,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {31078#true} assume main_#t~switch342#1; {31078#true} is VALID [2022-02-20 21:45:00,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {31078#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_pcd_init } true;havoc pcd_init_#res#1;havoc pcd_init_#t~ret306#1, pcd_init_#t~ret307#1, pcd_init_#t~mem308#1.base, pcd_init_#t~mem308#1.offset, pcd_init_#t~ret309#1.base, pcd_init_#t~ret309#1.offset, pcd_init_#t~mem310#1.base, pcd_init_#t~mem310#1.offset, pcd_init_#t~mem311#1, pcd_init_#t~ret312#1, pcd_init_#t~mem313#1.base, pcd_init_#t~mem313#1.offset, pcd_init_#t~mem314#1.base, pcd_init_#t~mem314#1.offset, pcd_init_#t~mem315#1.base, pcd_init_#t~mem315#1.offset, pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset, pcd_init_~unit~3#1, pcd_init_~tmp~30#1, pcd_init_~tmp___0~16#1;havoc pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset;havoc pcd_init_~unit~3#1;havoc pcd_init_~tmp~30#1;havoc pcd_init_~tmp___0~16#1; {31078#true} is VALID [2022-02-20 21:45:00,251 INFO L290 TraceCheckUtils]: 10: Hoare triple {31078#true} assume !(0 != ~disable~0);assume { :begin_inline_pcd_init_units } true;havoc pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset, pcd_init_units_#t~mem110#1.base, pcd_init_units_#t~mem110#1.offset, pcd_init_units_#t~mem111#1, pcd_init_units_#t~mem112#1.base, pcd_init_units_#t~mem112#1.offset, pcd_init_units_#t~mem113#1, pcd_init_units_#t~nondet114#1, pcd_init_units_#t~mem115#1.base, pcd_init_units_#t~mem115#1.offset, pcd_init_units_#t~mem116#1.base, pcd_init_units_#t~mem116#1.offset, pcd_init_units_#t~strcpy~res117#1.base, pcd_init_units_#t~strcpy~res117#1.offset, pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset, pcd_init_units_~unit~0#1, pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset, pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset;havoc pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset;havoc pcd_init_units_~unit~0#1;havoc pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset;havoc pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset;~pcd_drive_count~0 := 0;pcd_init_units_~unit~0#1 := 0;pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {31080#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} is VALID [2022-02-20 21:45:00,254 INFO L290 TraceCheckUtils]: 11: Hoare triple {31080#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} assume !(pcd_init_units_~unit~0#1 <= 3); {31079#false} is VALID [2022-02-20 21:45:00,254 INFO L290 TraceCheckUtils]: 12: Hoare triple {31079#false} assume { :end_inline_pcd_init_units } true;assume { :begin_inline_pcd_detect } true;havoc pcd_detect_#res#1;havoc pcd_detect_#t~nondet239#1, pcd_detect_#t~mem240#1.base, pcd_detect_#t~mem240#1.offset, pcd_detect_#t~mem241#1.base, pcd_detect_#t~mem241#1.offset, pcd_detect_#t~ret242#1, pcd_detect_#t~ret243#1, pcd_detect_#t~mem244#1.base, pcd_detect_#t~mem244#1.offset, pcd_detect_#t~short245#1, pcd_detect_#t~mem246#1.base, pcd_detect_#t~mem246#1.offset, pcd_detect_#t~mem247#1.base, pcd_detect_#t~mem247#1.offset, pcd_detect_#t~mem248#1, pcd_detect_#t~mem249#1.base, pcd_detect_#t~mem249#1.offset, pcd_detect_#t~mem250#1, pcd_detect_#t~mem251#1, pcd_detect_#t~mem252#1, pcd_detect_#t~mem253#1, pcd_detect_#t~mem254#1, pcd_detect_#t~mem255#1.base, pcd_detect_#t~mem255#1.offset, pcd_detect_#t~ret256#1, pcd_detect_#t~mem257#1, pcd_detect_#t~ret258#1, pcd_detect_#t~mem259#1.base, pcd_detect_#t~mem259#1.offset, pcd_detect_#t~short260#1, pcd_detect_#t~mem261#1.base, pcd_detect_#t~mem261#1.offset, pcd_detect_#t~nondet262#1, pcd_detect_#t~mem263#1.base, pcd_detect_#t~mem263#1.offset, pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset, pcd_detect_~k~4#1, pcd_detect_~unit~2#1, pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset, pcd_detect_~tmp~22#1, pcd_detect_~tmp___0~10#1, pcd_detect_~conf~0#1.base, pcd_detect_~conf~0#1.offset, pcd_detect_~tmp___1~5#1, pcd_detect_~tmp___2~3#1;call pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset := #Ultimate.allocOnStack(18);havoc pcd_detect_~k~4#1;havoc pcd_detect_~unit~2#1;havoc pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset;havoc pcd_detect_~tmp~22#1;havoc pcd_detect_~tmp___0~10#1;havoc pcd_detect_~conf~0#1.base, pcd_detect_~conf~0#1.offset;havoc pcd_detect_~tmp___1~5#1;havoc pcd_detect_~tmp___2~3#1;havoc pcd_detect_#t~nondet239#1;pcd_detect_~k~4#1 := 0; {31079#false} is VALID [2022-02-20 21:45:00,255 INFO L290 TraceCheckUtils]: 13: Hoare triple {31079#false} assume !(0 == ~pcd_drive_count~0);pcd_detect_~unit~2#1 := 0;pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {31079#false} is VALID [2022-02-20 21:45:00,255 INFO L290 TraceCheckUtils]: 14: Hoare triple {31079#false} assume !(pcd_detect_~unit~2#1 <= 3); {31079#false} is VALID [2022-02-20 21:45:00,255 INFO L290 TraceCheckUtils]: 15: Hoare triple {31079#false} assume 0 != pcd_detect_~k~4#1;pcd_detect_#res#1 := 0;call ULTIMATE.dealloc(pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset);havoc pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset; {31079#false} is VALID [2022-02-20 21:45:00,255 INFO L290 TraceCheckUtils]: 16: Hoare triple {31079#false} pcd_init_#t~ret306#1 := pcd_detect_#res#1;assume { :end_inline_pcd_detect } true;assume -2147483648 <= pcd_init_#t~ret306#1 && pcd_init_#t~ret306#1 <= 2147483647;pcd_init_~tmp~30#1 := pcd_init_#t~ret306#1;havoc pcd_init_#t~ret306#1; {31079#false} is VALID [2022-02-20 21:45:00,256 INFO L290 TraceCheckUtils]: 17: Hoare triple {31079#false} assume 0 != pcd_init_~tmp~30#1;pcd_init_#res#1 := -19; {31079#false} is VALID [2022-02-20 21:45:00,256 INFO L290 TraceCheckUtils]: 18: Hoare triple {31079#false} main_#t~ret343#1 := pcd_init_#res#1;assume { :end_inline_pcd_init } true;assume -2147483648 <= main_#t~ret343#1 && main_#t~ret343#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret343#1;havoc main_#t~ret343#1; {31079#false} is VALID [2022-02-20 21:45:00,256 INFO L290 TraceCheckUtils]: 19: Hoare triple {31079#false} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1; {31079#false} is VALID [2022-02-20 21:45:00,256 INFO L290 TraceCheckUtils]: 20: Hoare triple {31079#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {31079#false} is VALID [2022-02-20 21:45:00,256 INFO L290 TraceCheckUtils]: 21: Hoare triple {31079#false} assume { :begin_inline_ldv_check_final_state } true; {31079#false} is VALID [2022-02-20 21:45:00,257 INFO L290 TraceCheckUtils]: 22: Hoare triple {31079#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {31079#false} is VALID [2022-02-20 21:45:00,257 INFO L272 TraceCheckUtils]: 23: Hoare triple {31079#false} call ldv_error(); {31079#false} is VALID [2022-02-20 21:45:00,257 INFO L290 TraceCheckUtils]: 24: Hoare triple {31079#false} assume !false; {31079#false} is VALID [2022-02-20 21:45:00,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:45:00,257 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:45:00,258 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592332635] [2022-02-20 21:45:00,258 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [592332635] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:45:00,258 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:45:00,258 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:45:00,258 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550053748] [2022-02-20 21:45:00,258 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:45:00,259 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-02-20 21:45:00,259 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:45:00,259 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:00,299 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:45:00,299 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:45:00,300 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:45:00,301 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:45:00,301 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:45:00,301 INFO L87 Difference]: Start difference. First operand 2450 states and 3471 transitions. Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:08,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:45:08,679 INFO L93 Difference]: Finished difference Result 4915 states and 6965 transitions. [2022-02-20 21:45:08,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:45:08,679 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-02-20 21:45:08,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:45:08,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:08,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2098 transitions. [2022-02-20 21:45:08,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:08,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2098 transitions. [2022-02-20 21:45:08,745 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 2098 transitions. [2022-02-20 21:45:10,295 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2098 edges. 2098 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:45:10,655 INFO L225 Difference]: With dead ends: 4915 [2022-02-20 21:45:10,655 INFO L226 Difference]: Without dead ends: 2468 [2022-02-20 21:45:10,662 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:45:10,663 INFO L933 BasicCegarLoop]: 1040 mSDtfsCounter, 11 mSDsluCounter, 1038 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 2078 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-20 21:45:10,663 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 2078 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-02-20 21:45:10,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2468 states. [2022-02-20 21:45:10,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2468 to 2452. [2022-02-20 21:45:10,736 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:45:10,741 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2468 states. Second operand has 2452 states, 1769 states have (on average 1.3753533069530808) internal successors, (2433), 1826 states have internal predecessors, (2433), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:45:10,745 INFO L74 IsIncluded]: Start isIncluded. First operand 2468 states. Second operand has 2452 states, 1769 states have (on average 1.3753533069530808) internal successors, (2433), 1826 states have internal predecessors, (2433), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:45:10,750 INFO L87 Difference]: Start difference. First operand 2468 states. Second operand has 2452 states, 1769 states have (on average 1.3753533069530808) internal successors, (2433), 1826 states have internal predecessors, (2433), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:45:10,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:45:10,970 INFO L93 Difference]: Finished difference Result 2468 states and 3495 transitions. [2022-02-20 21:45:10,970 INFO L276 IsEmpty]: Start isEmpty. Operand 2468 states and 3495 transitions. [2022-02-20 21:45:10,979 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:45:10,979 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:45:10,985 INFO L74 IsIncluded]: Start isIncluded. First operand has 2452 states, 1769 states have (on average 1.3753533069530808) internal successors, (2433), 1826 states have internal predecessors, (2433), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) Second operand 2468 states. [2022-02-20 21:45:10,988 INFO L87 Difference]: Start difference. First operand has 2452 states, 1769 states have (on average 1.3753533069530808) internal successors, (2433), 1826 states have internal predecessors, (2433), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) Second operand 2468 states. [2022-02-20 21:45:11,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:45:11,296 INFO L93 Difference]: Finished difference Result 2468 states and 3495 transitions. [2022-02-20 21:45:11,296 INFO L276 IsEmpty]: Start isEmpty. Operand 2468 states and 3495 transitions. [2022-02-20 21:45:11,304 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:45:11,305 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:45:11,305 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:45:11,305 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:45:11,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2452 states, 1769 states have (on average 1.3753533069530808) internal successors, (2433), 1826 states have internal predecessors, (2433), 523 states have call successors, (523), 160 states have call predecessors, (523), 159 states have return successors, (517), 497 states have call predecessors, (517), 517 states have call successors, (517) [2022-02-20 21:45:11,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2452 states to 2452 states and 3473 transitions. [2022-02-20 21:45:11,659 INFO L78 Accepts]: Start accepts. Automaton has 2452 states and 3473 transitions. Word has length 25 [2022-02-20 21:45:11,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:45:11,659 INFO L470 AbstractCegarLoop]: Abstraction has 2452 states and 3473 transitions. [2022-02-20 21:45:11,660 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:11,660 INFO L276 IsEmpty]: Start isEmpty. Operand 2452 states and 3473 transitions. [2022-02-20 21:45:11,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-02-20 21:45:11,661 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:45:11,661 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:45:11,661 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 21:45:11,662 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:45:11,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:45:11,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1143234473, now seen corresponding path program 1 times [2022-02-20 21:45:11,663 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:45:11,663 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274126620] [2022-02-20 21:45:11,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:45:11,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:45:11,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:11,746 INFO L290 TraceCheckUtils]: 0: Hoare triple {46317#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(73, 2);call #Ultimate.allocInit(4, 3);call write~init~int(112, 3, 0, 1);call write~init~int(99, 3, 1, 1);call write~init~int(100, 3, 2, 1);call write~init~int(0, 3, 3, 1);call #Ultimate.allocInit(20, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(36, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(123, 9);call #Ultimate.allocInit(123, 10);call #Ultimate.allocInit(5, 11);call write~init~int(37, 11, 0, 1);call write~init~int(115, 11, 1, 1);call write~init~int(37, 11, 2, 1);call write~init~int(100, 11, 3, 1);call write~init~int(0, 11, 4, 1);call #Ultimate.allocInit(57, 12);call #Ultimate.allocInit(15, 13);call #Ultimate.allocInit(12, 14);call #Ultimate.allocInit(29, 15);call #Ultimate.allocInit(11, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(33, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(11, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(14, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(15, 25);call #Ultimate.allocInit(10, 26);call #Ultimate.allocInit(12, 27);call #Ultimate.allocInit(6, 28);call write~init~int(101, 28, 0, 1);call write~init~int(106, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(99, 28, 3, 1);call write~init~int(116, 28, 4, 1);call write~init~int(0, 28, 5, 1);call #Ultimate.allocInit(11, 29);call #Ultimate.allocInit(28, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(51, 31, 1, 1);call write~init~int(120, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(13, 32);call #Ultimate.allocInit(2, 33);call write~init~int(10, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(16, 34);call #Ultimate.allocInit(12, 35);call #Ultimate.allocInit(9, 36);call #Ultimate.allocInit(6, 37);call write~init~int(83, 37, 0, 1);call write~init~int(108, 37, 1, 1);call write~init~int(97, 37, 2, 1);call write~init~int(118, 37, 3, 1);call write~init~int(101, 37, 4, 1);call write~init~int(0, 37, 5, 1);call #Ultimate.allocInit(7, 38);call write~init~int(77, 38, 0, 1);call write~init~int(97, 38, 1, 1);call write~init~int(115, 38, 2, 1);call write~init~int(116, 38, 3, 1);call write~init~int(101, 38, 4, 1);call write~init~int(114, 38, 5, 1);call write~init~int(0, 38, 6, 1);call #Ultimate.allocInit(24, 39);call #Ultimate.allocInit(6, 40);call write~init~int(83, 40, 0, 1);call write~init~int(108, 40, 1, 1);call write~init~int(97, 40, 2, 1);call write~init~int(118, 40, 3, 1);call write~init~int(101, 40, 4, 1);call write~init~int(0, 40, 5, 1);call #Ultimate.allocInit(7, 41);call write~init~int(77, 41, 0, 1);call write~init~int(97, 41, 1, 1);call write~init~int(115, 41, 2, 1);call write~init~int(116, 41, 3, 1);call write~init~int(101, 41, 4, 1);call write~init~int(114, 41, 5, 1);call write~init~int(0, 41, 6, 1);call #Ultimate.allocInit(12, 42);call #Ultimate.allocInit(24, 43);call #Ultimate.allocInit(38, 44);call #Ultimate.allocInit(5, 45);call write~init~int(49, 45, 0, 1);call write~init~int(46, 45, 1, 1);call write~init~int(48, 45, 2, 1);call write~init~int(55, 45, 3, 1);call write~init~int(0, 45, 4, 1);call #Ultimate.allocInit(27, 46);call #Ultimate.allocInit(11, 47);call #Ultimate.allocInit(11, 48);call #Ultimate.allocInit(16, 49);call #Ultimate.allocInit(15, 50);call #Ultimate.allocInit(8, 51);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~verbose~0 := 0;~major~0 := 46;~name~0.base, ~name~0.offset := 3, 0;~nice~0 := 0;~disable~0 := 0;~#drive0~0.base, ~#drive0~0.offset := 52, 0;call #Ultimate.allocInit(24, 52);call write~init~int(0, ~#drive0~0.base, ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 4 + ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 8 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 12 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 16 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 20 + ~#drive0~0.offset, 4);~#drive1~0.base, ~#drive1~0.offset := 53, 0;call #Ultimate.allocInit(24, 53);call write~init~int(0, ~#drive1~0.base, ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 4 + ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 8 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 12 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 16 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 20 + ~#drive1~0.offset, 4);~#drive2~0.base, ~#drive2~0.offset := 54, 0;call #Ultimate.allocInit(24, 54);call write~init~int(0, ~#drive2~0.base, ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 4 + ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 8 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 12 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 16 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 20 + ~#drive2~0.offset, 4);~#drive3~0.base, ~#drive3~0.offset := 55, 0;call #Ultimate.allocInit(24, 55);call write~init~int(0, ~#drive3~0.base, ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 4 + ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 8 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 12 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 16 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 20 + ~#drive3~0.offset, 4);~#drives~0.base, ~#drives~0.offset := 56, 0;call #Ultimate.allocInit(32, 56);call write~init~$Pointer$(~#drive0~0.base, ~#drive0~0.offset, ~#drives~0.base, ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive1~0.base, ~#drive1~0.offset, ~#drives~0.base, 8 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive2~0.base, ~#drive2~0.offset, ~#drives~0.base, 16 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive3~0.base, ~#drive3~0.offset, ~#drives~0.base, 24 + ~#drives~0.offset, 8);~pcd_drive_count~0 := 0;~#pcd_mutex~0.base, ~#pcd_mutex~0.offset := 57, 0;call #Ultimate.allocInit(156, 57);call write~init~int(1, ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 4 + ~#pcd_mutex~0.offset, 4);call write~init~int(3735899821, ~#pcd_mutex~0.base, 8 + ~#pcd_mutex~0.offset, 4);call write~init~int(4294967295, ~#pcd_mutex~0.base, 12 + ~#pcd_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_mutex~0.base, 16 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 24 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 32 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 40 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pcd_mutex~0.base, 48 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 56 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 60 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 80 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 88 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 96 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 104 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 112 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 120 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 128 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pcd_mutex~0.base, 136 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 144 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 148 + ~#pcd_mutex~0.offset, 8);~#pcd_lock~0.base, ~#pcd_lock~0.offset := 58, 0;call #Ultimate.allocInit(68, 58);call write~init~int(0, ~#pcd_lock~0.base, ~#pcd_lock~0.offset, 4);call write~init~int(3735899821, ~#pcd_lock~0.base, 4 + ~#pcd_lock~0.offset, 4);call write~init~int(4294967295, ~#pcd_lock~0.base, 8 + ~#pcd_lock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_lock~0.base, 12 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 20 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 28 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 36 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(6, 0, ~#pcd_lock~0.base, 44 + ~#pcd_lock~0.offset, 8);call write~init~int(0, ~#pcd_lock~0.base, 52 + ~#pcd_lock~0.offset, 4);call write~init~int(0, ~#pcd_lock~0.base, 56 + ~#pcd_lock~0.offset, 8);~ps_continuation~0.base, ~ps_continuation~0.offset := 0, 0;~ps_ready~0.base, ~ps_ready~0.offset := 0, 0;~ps_timeout~0 := 0;~ps_tq_active~0 := 0;~ps_nice~0 := 0;~#ps_spinlock~0.base, ~#ps_spinlock~0.offset := 59, 0;call #Ultimate.allocInit(68, 59);call write~init~int(0, ~#ps_spinlock~0.base, ~#ps_spinlock~0.offset, 4);call write~init~int(3735899821, ~#ps_spinlock~0.base, 4 + ~#ps_spinlock~0.offset, 4);call write~init~int(4294967295, ~#ps_spinlock~0.base, 8 + ~#ps_spinlock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#ps_spinlock~0.base, 12 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 20 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 28 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 36 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(7, 0, ~#ps_spinlock~0.base, 44 + ~#ps_spinlock~0.offset, 8);call write~init~int(0, ~#ps_spinlock~0.base, 52 + ~#ps_spinlock~0.offset, 4);call write~init~int(0, ~#ps_spinlock~0.base, 56 + ~#ps_spinlock~0.offset, 8);~#ps_tq~0.base, ~#ps_tq~0.offset := 60, 0;call #Ultimate.allocInit(204, 60);call write~init~int(4195344, ~#ps_tq~0.base, ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 16 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~ps_tq_int.base, #funAddr~ps_tq_int.offset, ~#ps_tq~0.base, 24 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, ~#ps_tq~0.offset, ~#ps_tq~0.base, 32 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 40 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 48 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(8, 0, ~#ps_tq~0.base, 56 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 64 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 68 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 76 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 1953723489, ~#ps_tq~0.base, 84 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 92 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, (if (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 else (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~#ps_tq~0.base, 100 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ~#ps_tq~0.base, 108 + ~#ps_tq~0.offset, 8);call write~init~int(~#ps_tq~0.base + ~#ps_tq~0.offset, ~#ps_tq~0.base, 116 + ~#ps_tq~0.offset, 8);call write~init~int(-1, ~#ps_tq~0.base, 124 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 128 + ~#ps_tq~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 132 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 140 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 141 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 142 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 143 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 144 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 145 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 146 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 147 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 148 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 149 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 150 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 151 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 152 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 153 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 154 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 155 + ~#ps_tq~0.offset, 1);call write~init~$Pointer$(9, 0, ~#ps_tq~0.base, 156 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 164 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 172 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(10, 0, ~#ps_tq~0.base, 180 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 188 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 192 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 200 + ~#ps_tq~0.offset, 4);~#pcd~0.base, ~#pcd~0.offset := 61, 0;call #Ultimate.allocInit(1296, 61);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base);~#pcd_scratch~0.base, ~#pcd_scratch~0.offset := 62, 0;call #Ultimate.allocInit(64, 62);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_scratch~0.base);~#pcd_buffer~0.base, ~#pcd_buffer~0.offset := 63, 0;call #Ultimate.allocInit(2048, 63);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_buffer~0.base);~pcd_bufblk~0 := -1;~pcd_current~0.base, ~pcd_current~0.offset := 0, 0;~pcd_req~0.base, ~pcd_req~0.offset := 0, 0;~pcd_retries~0 := 0;~pcd_busy~0 := 0;~pcd_sector~0 := 0;~pcd_count~0 := 0;~pcd_buf~0.base, ~pcd_buf~0.offset := 0, 0;~#pcd_bdops~0.base, ~#pcd_bdops~0.offset := 64, 0;call #Ultimate.allocInit(96, 64);call write~init~$Pointer$(#funAddr~pcd_block_open.base, #funAddr~pcd_block_open.offset, ~#pcd_bdops~0.base, ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_release.base, #funAddr~pcd_block_release.offset, ~#pcd_bdops~0.base, 8 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_ioctl.base, #funAddr~pcd_block_ioctl.offset, ~#pcd_bdops~0.base, 16 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 24 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 32 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_check_events.base, #funAddr~pcd_block_check_events.offset, ~#pcd_bdops~0.base, 40 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 48 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 56 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 64 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 72 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 80 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pcd_bdops~0.base, 88 + ~#pcd_bdops~0.offset, 8);~#pcd_dops~0.base, ~#pcd_dops~0.offset := 65, 0;call #Ultimate.allocInit(120, 65);call write~init~$Pointer$(#funAddr~pcd_open.base, #funAddr~pcd_open.offset, ~#pcd_dops~0.base, ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_release.base, #funAddr~pcd_release.offset, ~#pcd_dops~0.base, 8 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_status.base, #funAddr~pcd_drive_status.offset, ~#pcd_dops~0.base, 16 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_check_events.base, #funAddr~pcd_check_events.offset, ~#pcd_dops~0.base, 24 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 32 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_tray_move.base, #funAddr~pcd_tray_move.offset, ~#pcd_dops~0.base, 40 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_lock_door.base, #funAddr~pcd_lock_door.offset, ~#pcd_dops~0.base, 48 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 56 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 64 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 72 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_get_mcn.base, #funAddr~pcd_get_mcn.offset, ~#pcd_dops~0.base, 80 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_reset.base, #funAddr~pcd_drive_reset.offset, ~#pcd_dops~0.base, 88 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_audio_ioctl.base, #funAddr~pcd_audio_ioctl.offset, ~#pcd_dops~0.base, 96 + ~#pcd_dops~0.offset, 8);call write~init~int(29639, ~#pcd_dops~0.base, 104 + ~#pcd_dops~0.offset, 4);call write~init~int(0, ~#pcd_dops~0.base, 108 + ~#pcd_dops~0.offset, 4);call write~init~$Pointer$(#funAddr~pcd_packet.base, #funAddr~pcd_packet.offset, ~#pcd_dops~0.base, 112 + ~#pcd_dops~0.offset, 8);~pcd_queue~0.base, ~pcd_queue~0.offset := 0, 0;~ldvarg11~0.base, ~ldvarg11~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg13~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset := 0, 0;~pcd_bdops_group1~0.base, ~pcd_bdops_group1~0.offset := 0, 0;~ldvarg0~0 := 0;~ldvarg5~0 := 0;~ldvarg16~0 := 0;~ldvarg15~0 := 0;~pcd_dops_group0~0.base, ~pcd_dops_group0~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg14~0 := 0;~ldvarg4~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_pcd_mutex~0 := 0; {46317#true} is VALID [2022-02-20 21:45:11,746 INFO L290 TraceCheckUtils]: 1: Hoare triple {46317#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet320#1, main_#t~switch321#1, main_#t~nondet322#1, main_#t~switch323#1, main_#t~ret324#1, main_#t~ret325#1, main_#t~ret326#1, main_#t~ret327#1, main_#t~ret328#1, main_#t~ret329#1, main_#t~ret330#1, main_#t~ret331#1, main_#t~ret332#1, main_#t~ret333#1, main_#t~ret334#1, main_#t~ret335#1, main_#t~ret336#1, main_#t~ret337#1, main_#t~ret338#1, main_#t~ret339#1, main_#t~ret340#1, main_#t~nondet341#1, main_#t~switch342#1, main_#t~ret343#1, main_#t~nondet344#1, main_#t~switch345#1, main_#t~nondet346#1, main_#t~switch347#1, main_#t~ret348#1, main_#t~ret349#1, main_#t~ret350#1, main_#t~ret351#1, main_#t~ret352#1, main_#t~ret353#1, main_~tmp~31#1, main_~tmp___0~17#1, main_~tmp___1~8#1, main_~tmp___2~4#1, main_~tmp___3~1#1;havoc main_~tmp~31#1;havoc main_~tmp___0~17#1;havoc main_~tmp___1~8#1;havoc main_~tmp___2~4#1;havoc main_~tmp___3~1#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_pcd_mutex~0 := 1; {46317#true} is VALID [2022-02-20 21:45:11,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {46317#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {46317#true} is VALID [2022-02-20 21:45:11,747 INFO L290 TraceCheckUtils]: 3: Hoare triple {46317#true} assume -2147483648 <= main_#t~nondet320#1 && main_#t~nondet320#1 <= 2147483647;main_~tmp~31#1 := main_#t~nondet320#1;havoc main_#t~nondet320#1;main_#t~switch321#1 := 0 == main_~tmp~31#1; {46317#true} is VALID [2022-02-20 21:45:11,747 INFO L290 TraceCheckUtils]: 4: Hoare triple {46317#true} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 1 == main_~tmp~31#1; {46317#true} is VALID [2022-02-20 21:45:11,747 INFO L290 TraceCheckUtils]: 5: Hoare triple {46317#true} assume main_#t~switch321#1; {46317#true} is VALID [2022-02-20 21:45:11,747 INFO L290 TraceCheckUtils]: 6: Hoare triple {46317#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet341#1 && main_#t~nondet341#1 <= 2147483647;main_~tmp___1~8#1 := main_#t~nondet341#1;havoc main_#t~nondet341#1;main_#t~switch342#1 := 0 == main_~tmp___1~8#1; {46317#true} is VALID [2022-02-20 21:45:11,748 INFO L290 TraceCheckUtils]: 7: Hoare triple {46317#true} assume !main_#t~switch342#1;main_#t~switch342#1 := main_#t~switch342#1 || 1 == main_~tmp___1~8#1; {46317#true} is VALID [2022-02-20 21:45:11,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {46317#true} assume main_#t~switch342#1; {46317#true} is VALID [2022-02-20 21:45:11,748 INFO L290 TraceCheckUtils]: 9: Hoare triple {46317#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_pcd_init } true;havoc pcd_init_#res#1;havoc pcd_init_#t~ret306#1, pcd_init_#t~ret307#1, pcd_init_#t~mem308#1.base, pcd_init_#t~mem308#1.offset, pcd_init_#t~ret309#1.base, pcd_init_#t~ret309#1.offset, pcd_init_#t~mem310#1.base, pcd_init_#t~mem310#1.offset, pcd_init_#t~mem311#1, pcd_init_#t~ret312#1, pcd_init_#t~mem313#1.base, pcd_init_#t~mem313#1.offset, pcd_init_#t~mem314#1.base, pcd_init_#t~mem314#1.offset, pcd_init_#t~mem315#1.base, pcd_init_#t~mem315#1.offset, pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset, pcd_init_~unit~3#1, pcd_init_~tmp~30#1, pcd_init_~tmp___0~16#1;havoc pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset;havoc pcd_init_~unit~3#1;havoc pcd_init_~tmp~30#1;havoc pcd_init_~tmp___0~16#1; {46317#true} is VALID [2022-02-20 21:45:11,748 INFO L290 TraceCheckUtils]: 10: Hoare triple {46317#true} assume !(0 != ~disable~0);assume { :begin_inline_pcd_init_units } true;havoc pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset, pcd_init_units_#t~mem110#1.base, pcd_init_units_#t~mem110#1.offset, pcd_init_units_#t~mem111#1, pcd_init_units_#t~mem112#1.base, pcd_init_units_#t~mem112#1.offset, pcd_init_units_#t~mem113#1, pcd_init_units_#t~nondet114#1, pcd_init_units_#t~mem115#1.base, pcd_init_units_#t~mem115#1.offset, pcd_init_units_#t~mem116#1.base, pcd_init_units_#t~mem116#1.offset, pcd_init_units_#t~strcpy~res117#1.base, pcd_init_units_#t~strcpy~res117#1.offset, pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset, pcd_init_units_~unit~0#1, pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset, pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset;havoc pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset;havoc pcd_init_units_~unit~0#1;havoc pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset;havoc pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset;~pcd_drive_count~0 := 0;pcd_init_units_~unit~0#1 := 0;pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} is VALID [2022-02-20 21:45:11,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} assume pcd_init_units_~unit~0#1 <= 3; {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} is VALID [2022-02-20 21:45:11,749 INFO L290 TraceCheckUtils]: 12: Hoare triple {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} call pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset := #Ultimate.allocOnHeap(1335);pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset := pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset;havoc pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset;pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset := pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset; {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} is VALID [2022-02-20 21:45:11,750 INFO L290 TraceCheckUtils]: 13: Hoare triple {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} assume 0 == (pcd_init_units_~disk~0#1.base + pcd_init_units_~disk~0#1.offset) % 18446744073709551616; {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} is VALID [2022-02-20 21:45:11,750 INFO L290 TraceCheckUtils]: 14: Hoare triple {46319#(= |ULTIMATE.start_pcd_init_units_~unit~0#1| 0)} pcd_init_units_~unit~0#1 := 1 + pcd_init_units_~unit~0#1;pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset := pcd_init_units_~cd~4#1.base, 324 + pcd_init_units_~cd~4#1.offset; {46320#(<= |ULTIMATE.start_pcd_init_units_~unit~0#1| 1)} is VALID [2022-02-20 21:45:11,751 INFO L290 TraceCheckUtils]: 15: Hoare triple {46320#(<= |ULTIMATE.start_pcd_init_units_~unit~0#1| 1)} assume !(pcd_init_units_~unit~0#1 <= 3); {46318#false} is VALID [2022-02-20 21:45:11,751 INFO L290 TraceCheckUtils]: 16: Hoare triple {46318#false} assume { :end_inline_pcd_init_units } true;assume { :begin_inline_pcd_detect } true;havoc pcd_detect_#res#1;havoc pcd_detect_#t~nondet239#1, pcd_detect_#t~mem240#1.base, pcd_detect_#t~mem240#1.offset, pcd_detect_#t~mem241#1.base, pcd_detect_#t~mem241#1.offset, pcd_detect_#t~ret242#1, pcd_detect_#t~ret243#1, pcd_detect_#t~mem244#1.base, pcd_detect_#t~mem244#1.offset, pcd_detect_#t~short245#1, pcd_detect_#t~mem246#1.base, pcd_detect_#t~mem246#1.offset, pcd_detect_#t~mem247#1.base, pcd_detect_#t~mem247#1.offset, pcd_detect_#t~mem248#1, pcd_detect_#t~mem249#1.base, pcd_detect_#t~mem249#1.offset, pcd_detect_#t~mem250#1, pcd_detect_#t~mem251#1, pcd_detect_#t~mem252#1, pcd_detect_#t~mem253#1, pcd_detect_#t~mem254#1, pcd_detect_#t~mem255#1.base, pcd_detect_#t~mem255#1.offset, pcd_detect_#t~ret256#1, pcd_detect_#t~mem257#1, pcd_detect_#t~ret258#1, pcd_detect_#t~mem259#1.base, pcd_detect_#t~mem259#1.offset, pcd_detect_#t~short260#1, pcd_detect_#t~mem261#1.base, pcd_detect_#t~mem261#1.offset, pcd_detect_#t~nondet262#1, pcd_detect_#t~mem263#1.base, pcd_detect_#t~mem263#1.offset, pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset, pcd_detect_~k~4#1, pcd_detect_~unit~2#1, pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset, pcd_detect_~tmp~22#1, pcd_detect_~tmp___0~10#1, pcd_detect_~conf~0#1.base, pcd_detect_~conf~0#1.offset, pcd_detect_~tmp___1~5#1, pcd_detect_~tmp___2~3#1;call pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset := #Ultimate.allocOnStack(18);havoc pcd_detect_~k~4#1;havoc pcd_detect_~unit~2#1;havoc pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset;havoc pcd_detect_~tmp~22#1;havoc pcd_detect_~tmp___0~10#1;havoc pcd_detect_~conf~0#1.base, pcd_detect_~conf~0#1.offset;havoc pcd_detect_~tmp___1~5#1;havoc pcd_detect_~tmp___2~3#1;havoc pcd_detect_#t~nondet239#1;pcd_detect_~k~4#1 := 0; {46318#false} is VALID [2022-02-20 21:45:11,751 INFO L290 TraceCheckUtils]: 17: Hoare triple {46318#false} assume !(0 == ~pcd_drive_count~0);pcd_detect_~unit~2#1 := 0;pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {46318#false} is VALID [2022-02-20 21:45:11,751 INFO L290 TraceCheckUtils]: 18: Hoare triple {46318#false} assume !(pcd_detect_~unit~2#1 <= 3); {46318#false} is VALID [2022-02-20 21:45:11,752 INFO L290 TraceCheckUtils]: 19: Hoare triple {46318#false} assume 0 != pcd_detect_~k~4#1;pcd_detect_#res#1 := 0;call ULTIMATE.dealloc(pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset);havoc pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset; {46318#false} is VALID [2022-02-20 21:45:11,752 INFO L290 TraceCheckUtils]: 20: Hoare triple {46318#false} pcd_init_#t~ret306#1 := pcd_detect_#res#1;assume { :end_inline_pcd_detect } true;assume -2147483648 <= pcd_init_#t~ret306#1 && pcd_init_#t~ret306#1 <= 2147483647;pcd_init_~tmp~30#1 := pcd_init_#t~ret306#1;havoc pcd_init_#t~ret306#1; {46318#false} is VALID [2022-02-20 21:45:11,752 INFO L290 TraceCheckUtils]: 21: Hoare triple {46318#false} assume 0 != pcd_init_~tmp~30#1;pcd_init_#res#1 := -19; {46318#false} is VALID [2022-02-20 21:45:11,752 INFO L290 TraceCheckUtils]: 22: Hoare triple {46318#false} main_#t~ret343#1 := pcd_init_#res#1;assume { :end_inline_pcd_init } true;assume -2147483648 <= main_#t~ret343#1 && main_#t~ret343#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret343#1;havoc main_#t~ret343#1; {46318#false} is VALID [2022-02-20 21:45:11,752 INFO L290 TraceCheckUtils]: 23: Hoare triple {46318#false} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1; {46318#false} is VALID [2022-02-20 21:45:11,753 INFO L290 TraceCheckUtils]: 24: Hoare triple {46318#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {46318#false} is VALID [2022-02-20 21:45:11,753 INFO L290 TraceCheckUtils]: 25: Hoare triple {46318#false} assume { :begin_inline_ldv_check_final_state } true; {46318#false} is VALID [2022-02-20 21:45:11,753 INFO L290 TraceCheckUtils]: 26: Hoare triple {46318#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {46318#false} is VALID [2022-02-20 21:45:11,753 INFO L272 TraceCheckUtils]: 27: Hoare triple {46318#false} call ldv_error(); {46318#false} is VALID [2022-02-20 21:45:11,753 INFO L290 TraceCheckUtils]: 28: Hoare triple {46318#false} assume !false; {46318#false} is VALID [2022-02-20 21:45:11,754 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:45:11,754 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:45:11,754 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274126620] [2022-02-20 21:45:11,754 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274126620] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-20 21:45:11,754 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [331900089] [2022-02-20 21:45:11,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:45:11,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-20 21:45:11,755 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:45:11,759 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-20 21:45:11,788 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-20 21:45:12,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:12,134 INFO L263 TraceCheckSpWp]: Trace formula consists of 1126 conjuncts, 2 conjunts are in the unsatisfiable core [2022-02-20 21:45:12,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:45:12,173 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-20 21:45:12,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {46317#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(73, 2);call #Ultimate.allocInit(4, 3);call write~init~int(112, 3, 0, 1);call write~init~int(99, 3, 1, 1);call write~init~int(100, 3, 2, 1);call write~init~int(0, 3, 3, 1);call #Ultimate.allocInit(20, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(36, 7);call #Ultimate.allocInit(13, 8);call #Ultimate.allocInit(123, 9);call #Ultimate.allocInit(123, 10);call #Ultimate.allocInit(5, 11);call write~init~int(37, 11, 0, 1);call write~init~int(115, 11, 1, 1);call write~init~int(37, 11, 2, 1);call write~init~int(100, 11, 3, 1);call write~init~int(0, 11, 4, 1);call #Ultimate.allocInit(57, 12);call #Ultimate.allocInit(15, 13);call #Ultimate.allocInit(12, 14);call #Ultimate.allocInit(29, 15);call #Ultimate.allocInit(11, 16);call #Ultimate.allocInit(23, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(33, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(11, 21);call #Ultimate.allocInit(14, 22);call #Ultimate.allocInit(14, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(15, 25);call #Ultimate.allocInit(10, 26);call #Ultimate.allocInit(12, 27);call #Ultimate.allocInit(6, 28);call write~init~int(101, 28, 0, 1);call write~init~int(106, 28, 1, 1);call write~init~int(101, 28, 2, 1);call write~init~int(99, 28, 3, 1);call write~init~int(116, 28, 4, 1);call write~init~int(0, 28, 5, 1);call #Ultimate.allocInit(11, 29);call #Ultimate.allocInit(28, 30);call #Ultimate.allocInit(4, 31);call write~init~int(37, 31, 0, 1);call write~init~int(51, 31, 1, 1);call write~init~int(120, 31, 2, 1);call write~init~int(0, 31, 3, 1);call #Ultimate.allocInit(13, 32);call #Ultimate.allocInit(2, 33);call write~init~int(10, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(16, 34);call #Ultimate.allocInit(12, 35);call #Ultimate.allocInit(9, 36);call #Ultimate.allocInit(6, 37);call write~init~int(83, 37, 0, 1);call write~init~int(108, 37, 1, 1);call write~init~int(97, 37, 2, 1);call write~init~int(118, 37, 3, 1);call write~init~int(101, 37, 4, 1);call write~init~int(0, 37, 5, 1);call #Ultimate.allocInit(7, 38);call write~init~int(77, 38, 0, 1);call write~init~int(97, 38, 1, 1);call write~init~int(115, 38, 2, 1);call write~init~int(116, 38, 3, 1);call write~init~int(101, 38, 4, 1);call write~init~int(114, 38, 5, 1);call write~init~int(0, 38, 6, 1);call #Ultimate.allocInit(24, 39);call #Ultimate.allocInit(6, 40);call write~init~int(83, 40, 0, 1);call write~init~int(108, 40, 1, 1);call write~init~int(97, 40, 2, 1);call write~init~int(118, 40, 3, 1);call write~init~int(101, 40, 4, 1);call write~init~int(0, 40, 5, 1);call #Ultimate.allocInit(7, 41);call write~init~int(77, 41, 0, 1);call write~init~int(97, 41, 1, 1);call write~init~int(115, 41, 2, 1);call write~init~int(116, 41, 3, 1);call write~init~int(101, 41, 4, 1);call write~init~int(114, 41, 5, 1);call write~init~int(0, 41, 6, 1);call #Ultimate.allocInit(12, 42);call #Ultimate.allocInit(24, 43);call #Ultimate.allocInit(38, 44);call #Ultimate.allocInit(5, 45);call write~init~int(49, 45, 0, 1);call write~init~int(46, 45, 1, 1);call write~init~int(48, 45, 2, 1);call write~init~int(55, 45, 3, 1);call write~init~int(0, 45, 4, 1);call #Ultimate.allocInit(27, 46);call #Ultimate.allocInit(11, 47);call #Ultimate.allocInit(11, 48);call #Ultimate.allocInit(16, 49);call #Ultimate.allocInit(15, 50);call #Ultimate.allocInit(8, 51);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~verbose~0 := 0;~major~0 := 46;~name~0.base, ~name~0.offset := 3, 0;~nice~0 := 0;~disable~0 := 0;~#drive0~0.base, ~#drive0~0.offset := 52, 0;call #Ultimate.allocInit(24, 52);call write~init~int(0, ~#drive0~0.base, ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 4 + ~#drive0~0.offset, 4);call write~init~int(0, ~#drive0~0.base, 8 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 12 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 16 + ~#drive0~0.offset, 4);call write~init~int(-1, ~#drive0~0.base, 20 + ~#drive0~0.offset, 4);~#drive1~0.base, ~#drive1~0.offset := 53, 0;call #Ultimate.allocInit(24, 53);call write~init~int(0, ~#drive1~0.base, ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 4 + ~#drive1~0.offset, 4);call write~init~int(0, ~#drive1~0.base, 8 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 12 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 16 + ~#drive1~0.offset, 4);call write~init~int(-1, ~#drive1~0.base, 20 + ~#drive1~0.offset, 4);~#drive2~0.base, ~#drive2~0.offset := 54, 0;call #Ultimate.allocInit(24, 54);call write~init~int(0, ~#drive2~0.base, ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 4 + ~#drive2~0.offset, 4);call write~init~int(0, ~#drive2~0.base, 8 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 12 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 16 + ~#drive2~0.offset, 4);call write~init~int(-1, ~#drive2~0.base, 20 + ~#drive2~0.offset, 4);~#drive3~0.base, ~#drive3~0.offset := 55, 0;call #Ultimate.allocInit(24, 55);call write~init~int(0, ~#drive3~0.base, ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 4 + ~#drive3~0.offset, 4);call write~init~int(0, ~#drive3~0.base, 8 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 12 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 16 + ~#drive3~0.offset, 4);call write~init~int(-1, ~#drive3~0.base, 20 + ~#drive3~0.offset, 4);~#drives~0.base, ~#drives~0.offset := 56, 0;call #Ultimate.allocInit(32, 56);call write~init~$Pointer$(~#drive0~0.base, ~#drive0~0.offset, ~#drives~0.base, ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive1~0.base, ~#drive1~0.offset, ~#drives~0.base, 8 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive2~0.base, ~#drive2~0.offset, ~#drives~0.base, 16 + ~#drives~0.offset, 8);call write~init~$Pointer$(~#drive3~0.base, ~#drive3~0.offset, ~#drives~0.base, 24 + ~#drives~0.offset, 8);~pcd_drive_count~0 := 0;~#pcd_mutex~0.base, ~#pcd_mutex~0.offset := 57, 0;call #Ultimate.allocInit(156, 57);call write~init~int(1, ~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 4 + ~#pcd_mutex~0.offset, 4);call write~init~int(3735899821, ~#pcd_mutex~0.base, 8 + ~#pcd_mutex~0.offset, 4);call write~init~int(4294967295, ~#pcd_mutex~0.base, 12 + ~#pcd_mutex~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_mutex~0.base, 16 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 24 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 32 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 40 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pcd_mutex~0.base, 48 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 56 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 60 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, 72 + ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 80 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 88 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 96 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(~#pcd_mutex~0.base, ~#pcd_mutex~0.offset, ~#pcd_mutex~0.base, 104 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 112 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 120 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_mutex~0.base, 128 + ~#pcd_mutex~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pcd_mutex~0.base, 136 + ~#pcd_mutex~0.offset, 8);call write~init~int(0, ~#pcd_mutex~0.base, 144 + ~#pcd_mutex~0.offset, 4);call write~init~int(0, ~#pcd_mutex~0.base, 148 + ~#pcd_mutex~0.offset, 8);~#pcd_lock~0.base, ~#pcd_lock~0.offset := 58, 0;call #Ultimate.allocInit(68, 58);call write~init~int(0, ~#pcd_lock~0.base, ~#pcd_lock~0.offset, 4);call write~init~int(3735899821, ~#pcd_lock~0.base, 4 + ~#pcd_lock~0.offset, 4);call write~init~int(4294967295, ~#pcd_lock~0.base, 8 + ~#pcd_lock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#pcd_lock~0.base, 12 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 20 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 28 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_lock~0.base, 36 + ~#pcd_lock~0.offset, 8);call write~init~$Pointer$(6, 0, ~#pcd_lock~0.base, 44 + ~#pcd_lock~0.offset, 8);call write~init~int(0, ~#pcd_lock~0.base, 52 + ~#pcd_lock~0.offset, 4);call write~init~int(0, ~#pcd_lock~0.base, 56 + ~#pcd_lock~0.offset, 8);~ps_continuation~0.base, ~ps_continuation~0.offset := 0, 0;~ps_ready~0.base, ~ps_ready~0.offset := 0, 0;~ps_timeout~0 := 0;~ps_tq_active~0 := 0;~ps_nice~0 := 0;~#ps_spinlock~0.base, ~#ps_spinlock~0.offset := 59, 0;call #Ultimate.allocInit(68, 59);call write~init~int(0, ~#ps_spinlock~0.base, ~#ps_spinlock~0.offset, 4);call write~init~int(3735899821, ~#ps_spinlock~0.base, 4 + ~#ps_spinlock~0.offset, 4);call write~init~int(4294967295, ~#ps_spinlock~0.base, 8 + ~#ps_spinlock~0.offset, 4);call write~init~$Pointer$(0, -1, ~#ps_spinlock~0.base, 12 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 20 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 28 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_spinlock~0.base, 36 + ~#ps_spinlock~0.offset, 8);call write~init~$Pointer$(7, 0, ~#ps_spinlock~0.base, 44 + ~#ps_spinlock~0.offset, 8);call write~init~int(0, ~#ps_spinlock~0.base, 52 + ~#ps_spinlock~0.offset, 4);call write~init~int(0, ~#ps_spinlock~0.base, 56 + ~#ps_spinlock~0.offset, 8);~#ps_tq~0.base, ~#ps_tq~0.offset := 60, 0;call #Ultimate.allocInit(204, 60);call write~init~int(4195344, ~#ps_tq~0.base, ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, 8 + ~#ps_tq~0.offset, ~#ps_tq~0.base, 16 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~ps_tq_int.base, #funAddr~ps_tq_int.offset, ~#ps_tq~0.base, 24 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(~#ps_tq~0.base, ~#ps_tq~0.offset, ~#ps_tq~0.base, 32 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 40 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 48 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(8, 0, ~#ps_tq~0.base, 56 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 64 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 68 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 76 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 1953723489, ~#ps_tq~0.base, 84 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 92 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, (if (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 else (2 + (~#boot_tvec_bases~0.base + ~#boot_tvec_bases~0.offset)) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), ~#ps_tq~0.base, 100 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(#funAddr~delayed_work_timer_fn.base, #funAddr~delayed_work_timer_fn.offset, ~#ps_tq~0.base, 108 + ~#ps_tq~0.offset, 8);call write~init~int(~#ps_tq~0.base + ~#ps_tq~0.offset, ~#ps_tq~0.base, 116 + ~#ps_tq~0.offset, 8);call write~init~int(-1, ~#ps_tq~0.base, 124 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 128 + ~#ps_tq~0.offset, 4);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 132 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 140 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 141 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 142 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 143 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 144 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 145 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 146 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 147 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 148 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 149 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 150 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 151 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 152 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 153 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 154 + ~#ps_tq~0.offset, 1);call write~init~int(0, ~#ps_tq~0.base, 155 + ~#ps_tq~0.offset, 1);call write~init~$Pointer$(9, 0, ~#ps_tq~0.base, 156 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 164 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(0, 0, ~#ps_tq~0.base, 172 + ~#ps_tq~0.offset, 8);call write~init~$Pointer$(10, 0, ~#ps_tq~0.base, 180 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 188 + ~#ps_tq~0.offset, 4);call write~init~int(0, ~#ps_tq~0.base, 192 + ~#ps_tq~0.offset, 8);call write~init~int(0, ~#ps_tq~0.base, 200 + ~#ps_tq~0.offset, 4);~#pcd~0.base, ~#pcd~0.offset := 61, 0;call #Ultimate.allocInit(1296, 61);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd~0.base);#memory_$Pointer$.base, #memory_$Pointer$.offset := ~initToZeroAtPointerBaseAddress~$Pointer$.base(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base), ~initToZeroAtPointerBaseAddress~$Pointer$.offset(#memory_$Pointer$.base, #memory_$Pointer$.offset, ~#pcd~0.base);~#pcd_scratch~0.base, ~#pcd_scratch~0.offset := 62, 0;call #Ultimate.allocInit(64, 62);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_scratch~0.base);~#pcd_buffer~0.base, ~#pcd_buffer~0.offset := 63, 0;call #Ultimate.allocInit(2048, 63);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pcd_buffer~0.base);~pcd_bufblk~0 := -1;~pcd_current~0.base, ~pcd_current~0.offset := 0, 0;~pcd_req~0.base, ~pcd_req~0.offset := 0, 0;~pcd_retries~0 := 0;~pcd_busy~0 := 0;~pcd_sector~0 := 0;~pcd_count~0 := 0;~pcd_buf~0.base, ~pcd_buf~0.offset := 0, 0;~#pcd_bdops~0.base, ~#pcd_bdops~0.offset := 64, 0;call #Ultimate.allocInit(96, 64);call write~init~$Pointer$(#funAddr~pcd_block_open.base, #funAddr~pcd_block_open.offset, ~#pcd_bdops~0.base, ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_release.base, #funAddr~pcd_block_release.offset, ~#pcd_bdops~0.base, 8 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_ioctl.base, #funAddr~pcd_block_ioctl.offset, ~#pcd_bdops~0.base, 16 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 24 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 32 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_block_check_events.base, #funAddr~pcd_block_check_events.offset, ~#pcd_bdops~0.base, 40 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 48 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 56 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 64 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 72 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_bdops~0.base, 80 + ~#pcd_bdops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pcd_bdops~0.base, 88 + ~#pcd_bdops~0.offset, 8);~#pcd_dops~0.base, ~#pcd_dops~0.offset := 65, 0;call #Ultimate.allocInit(120, 65);call write~init~$Pointer$(#funAddr~pcd_open.base, #funAddr~pcd_open.offset, ~#pcd_dops~0.base, ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_release.base, #funAddr~pcd_release.offset, ~#pcd_dops~0.base, 8 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_status.base, #funAddr~pcd_drive_status.offset, ~#pcd_dops~0.base, 16 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_check_events.base, #funAddr~pcd_check_events.offset, ~#pcd_dops~0.base, 24 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 32 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_tray_move.base, #funAddr~pcd_tray_move.offset, ~#pcd_dops~0.base, 40 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_lock_door.base, #funAddr~pcd_lock_door.offset, ~#pcd_dops~0.base, 48 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 56 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 64 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pcd_dops~0.base, 72 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_get_mcn.base, #funAddr~pcd_get_mcn.offset, ~#pcd_dops~0.base, 80 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_drive_reset.base, #funAddr~pcd_drive_reset.offset, ~#pcd_dops~0.base, 88 + ~#pcd_dops~0.offset, 8);call write~init~$Pointer$(#funAddr~pcd_audio_ioctl.base, #funAddr~pcd_audio_ioctl.offset, ~#pcd_dops~0.base, 96 + ~#pcd_dops~0.offset, 8);call write~init~int(29639, ~#pcd_dops~0.base, 104 + ~#pcd_dops~0.offset, 4);call write~init~int(0, ~#pcd_dops~0.base, 108 + ~#pcd_dops~0.offset, 4);call write~init~$Pointer$(#funAddr~pcd_packet.base, #funAddr~pcd_packet.offset, ~#pcd_dops~0.base, 112 + ~#pcd_dops~0.offset, 8);~pcd_queue~0.base, ~pcd_queue~0.offset := 0, 0;~ldvarg11~0.base, ~ldvarg11~0.offset := 0, 0;~ldvarg7~0 := 0;~ldvarg3~0.base, ~ldvarg3~0.offset := 0, 0;~ldvarg12~0 := 0;~ldv_retval_2~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg13~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0 := 0;~ldvarg9~0 := 0;~pcd_bdops_group0~0.base, ~pcd_bdops_group0~0.offset := 0, 0;~pcd_bdops_group1~0.base, ~pcd_bdops_group1~0.offset := 0, 0;~ldvarg0~0 := 0;~ldvarg5~0 := 0;~ldvarg16~0 := 0;~ldvarg15~0 := 0;~pcd_dops_group0~0.base, ~pcd_dops_group0~0.offset := 0, 0;~ldvarg6~0.base, ~ldvarg6~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg14~0 := 0;~ldvarg4~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_pcd_mutex~0 := 0; {46317#true} is VALID [2022-02-20 21:45:12,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {46317#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet320#1, main_#t~switch321#1, main_#t~nondet322#1, main_#t~switch323#1, main_#t~ret324#1, main_#t~ret325#1, main_#t~ret326#1, main_#t~ret327#1, main_#t~ret328#1, main_#t~ret329#1, main_#t~ret330#1, main_#t~ret331#1, main_#t~ret332#1, main_#t~ret333#1, main_#t~ret334#1, main_#t~ret335#1, main_#t~ret336#1, main_#t~ret337#1, main_#t~ret338#1, main_#t~ret339#1, main_#t~ret340#1, main_#t~nondet341#1, main_#t~switch342#1, main_#t~ret343#1, main_#t~nondet344#1, main_#t~switch345#1, main_#t~nondet346#1, main_#t~switch347#1, main_#t~ret348#1, main_#t~ret349#1, main_#t~ret350#1, main_#t~ret351#1, main_#t~ret352#1, main_#t~ret353#1, main_~tmp~31#1, main_~tmp___0~17#1, main_~tmp___1~8#1, main_~tmp___2~4#1, main_~tmp___3~1#1;havoc main_~tmp~31#1;havoc main_~tmp___0~17#1;havoc main_~tmp___1~8#1;havoc main_~tmp___2~4#1;havoc main_~tmp___3~1#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_pcd_mutex~0 := 1; {46317#true} is VALID [2022-02-20 21:45:12,255 INFO L290 TraceCheckUtils]: 2: Hoare triple {46317#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {46317#true} is VALID [2022-02-20 21:45:12,255 INFO L290 TraceCheckUtils]: 3: Hoare triple {46317#true} assume -2147483648 <= main_#t~nondet320#1 && main_#t~nondet320#1 <= 2147483647;main_~tmp~31#1 := main_#t~nondet320#1;havoc main_#t~nondet320#1;main_#t~switch321#1 := 0 == main_~tmp~31#1; {46317#true} is VALID [2022-02-20 21:45:12,255 INFO L290 TraceCheckUtils]: 4: Hoare triple {46317#true} assume !main_#t~switch321#1;main_#t~switch321#1 := main_#t~switch321#1 || 1 == main_~tmp~31#1; {46317#true} is VALID [2022-02-20 21:45:12,255 INFO L290 TraceCheckUtils]: 5: Hoare triple {46317#true} assume main_#t~switch321#1; {46317#true} is VALID [2022-02-20 21:45:12,255 INFO L290 TraceCheckUtils]: 6: Hoare triple {46317#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet341#1 && main_#t~nondet341#1 <= 2147483647;main_~tmp___1~8#1 := main_#t~nondet341#1;havoc main_#t~nondet341#1;main_#t~switch342#1 := 0 == main_~tmp___1~8#1; {46317#true} is VALID [2022-02-20 21:45:12,255 INFO L290 TraceCheckUtils]: 7: Hoare triple {46317#true} assume !main_#t~switch342#1;main_#t~switch342#1 := main_#t~switch342#1 || 1 == main_~tmp___1~8#1; {46317#true} is VALID [2022-02-20 21:45:12,256 INFO L290 TraceCheckUtils]: 8: Hoare triple {46317#true} assume main_#t~switch342#1; {46317#true} is VALID [2022-02-20 21:45:12,256 INFO L290 TraceCheckUtils]: 9: Hoare triple {46317#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_pcd_init } true;havoc pcd_init_#res#1;havoc pcd_init_#t~ret306#1, pcd_init_#t~ret307#1, pcd_init_#t~mem308#1.base, pcd_init_#t~mem308#1.offset, pcd_init_#t~ret309#1.base, pcd_init_#t~ret309#1.offset, pcd_init_#t~mem310#1.base, pcd_init_#t~mem310#1.offset, pcd_init_#t~mem311#1, pcd_init_#t~ret312#1, pcd_init_#t~mem313#1.base, pcd_init_#t~mem313#1.offset, pcd_init_#t~mem314#1.base, pcd_init_#t~mem314#1.offset, pcd_init_#t~mem315#1.base, pcd_init_#t~mem315#1.offset, pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset, pcd_init_~unit~3#1, pcd_init_~tmp~30#1, pcd_init_~tmp___0~16#1;havoc pcd_init_~cd~12#1.base, pcd_init_~cd~12#1.offset;havoc pcd_init_~unit~3#1;havoc pcd_init_~tmp~30#1;havoc pcd_init_~tmp___0~16#1; {46317#true} is VALID [2022-02-20 21:45:12,256 INFO L290 TraceCheckUtils]: 10: Hoare triple {46317#true} assume !(0 != ~disable~0);assume { :begin_inline_pcd_init_units } true;havoc pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset, pcd_init_units_#t~mem110#1.base, pcd_init_units_#t~mem110#1.offset, pcd_init_units_#t~mem111#1, pcd_init_units_#t~mem112#1.base, pcd_init_units_#t~mem112#1.offset, pcd_init_units_#t~mem113#1, pcd_init_units_#t~nondet114#1, pcd_init_units_#t~mem115#1.base, pcd_init_units_#t~mem115#1.offset, pcd_init_units_#t~mem116#1.base, pcd_init_units_#t~mem116#1.offset, pcd_init_units_#t~strcpy~res117#1.base, pcd_init_units_#t~strcpy~res117#1.offset, pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset, pcd_init_units_~unit~0#1, pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset, pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset;havoc pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset;havoc pcd_init_units_~unit~0#1;havoc pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset;havoc pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset;~pcd_drive_count~0 := 0;pcd_init_units_~unit~0#1 := 0;pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {46317#true} is VALID [2022-02-20 21:45:12,256 INFO L290 TraceCheckUtils]: 11: Hoare triple {46317#true} assume pcd_init_units_~unit~0#1 <= 3; {46317#true} is VALID [2022-02-20 21:45:12,256 INFO L290 TraceCheckUtils]: 12: Hoare triple {46317#true} call pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset := #Ultimate.allocOnHeap(1335);pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset := pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset;havoc pcd_init_units_#t~malloc109#1.base, pcd_init_units_#t~malloc109#1.offset;pcd_init_units_~disk~0#1.base, pcd_init_units_~disk~0#1.offset := pcd_init_units_~tmp~5#1.base, pcd_init_units_~tmp~5#1.offset; {46317#true} is VALID [2022-02-20 21:45:12,257 INFO L290 TraceCheckUtils]: 13: Hoare triple {46317#true} assume 0 == (pcd_init_units_~disk~0#1.base + pcd_init_units_~disk~0#1.offset) % 18446744073709551616; {46317#true} is VALID [2022-02-20 21:45:12,271 INFO L290 TraceCheckUtils]: 14: Hoare triple {46317#true} pcd_init_units_~unit~0#1 := 1 + pcd_init_units_~unit~0#1;pcd_init_units_~cd~4#1.base, pcd_init_units_~cd~4#1.offset := pcd_init_units_~cd~4#1.base, 324 + pcd_init_units_~cd~4#1.offset; {46317#true} is VALID [2022-02-20 21:45:12,271 INFO L290 TraceCheckUtils]: 15: Hoare triple {46317#true} assume !(pcd_init_units_~unit~0#1 <= 3); {46317#true} is VALID [2022-02-20 21:45:12,272 INFO L290 TraceCheckUtils]: 16: Hoare triple {46317#true} assume { :end_inline_pcd_init_units } true;assume { :begin_inline_pcd_detect } true;havoc pcd_detect_#res#1;havoc pcd_detect_#t~nondet239#1, pcd_detect_#t~mem240#1.base, pcd_detect_#t~mem240#1.offset, pcd_detect_#t~mem241#1.base, pcd_detect_#t~mem241#1.offset, pcd_detect_#t~ret242#1, pcd_detect_#t~ret243#1, pcd_detect_#t~mem244#1.base, pcd_detect_#t~mem244#1.offset, pcd_detect_#t~short245#1, pcd_detect_#t~mem246#1.base, pcd_detect_#t~mem246#1.offset, pcd_detect_#t~mem247#1.base, pcd_detect_#t~mem247#1.offset, pcd_detect_#t~mem248#1, pcd_detect_#t~mem249#1.base, pcd_detect_#t~mem249#1.offset, pcd_detect_#t~mem250#1, pcd_detect_#t~mem251#1, pcd_detect_#t~mem252#1, pcd_detect_#t~mem253#1, pcd_detect_#t~mem254#1, pcd_detect_#t~mem255#1.base, pcd_detect_#t~mem255#1.offset, pcd_detect_#t~ret256#1, pcd_detect_#t~mem257#1, pcd_detect_#t~ret258#1, pcd_detect_#t~mem259#1.base, pcd_detect_#t~mem259#1.offset, pcd_detect_#t~short260#1, pcd_detect_#t~mem261#1.base, pcd_detect_#t~mem261#1.offset, pcd_detect_#t~nondet262#1, pcd_detect_#t~mem263#1.base, pcd_detect_#t~mem263#1.offset, pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset, pcd_detect_~k~4#1, pcd_detect_~unit~2#1, pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset, pcd_detect_~tmp~22#1, pcd_detect_~tmp___0~10#1, pcd_detect_~conf~0#1.base, pcd_detect_~conf~0#1.offset, pcd_detect_~tmp___1~5#1, pcd_detect_~tmp___2~3#1;call pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset := #Ultimate.allocOnStack(18);havoc pcd_detect_~k~4#1;havoc pcd_detect_~unit~2#1;havoc pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset;havoc pcd_detect_~tmp~22#1;havoc pcd_detect_~tmp___0~10#1;havoc pcd_detect_~conf~0#1.base, pcd_detect_~conf~0#1.offset;havoc pcd_detect_~tmp___1~5#1;havoc pcd_detect_~tmp___2~3#1;havoc pcd_detect_#t~nondet239#1;pcd_detect_~k~4#1 := 0; {46317#true} is VALID [2022-02-20 21:45:12,272 INFO L290 TraceCheckUtils]: 17: Hoare triple {46317#true} assume !(0 == ~pcd_drive_count~0);pcd_detect_~unit~2#1 := 0;pcd_detect_~cd~9#1.base, pcd_detect_~cd~9#1.offset := ~#pcd~0.base, ~#pcd~0.offset; {46375#(<= |ULTIMATE.start_pcd_detect_~unit~2#1| 0)} is VALID [2022-02-20 21:45:12,273 INFO L290 TraceCheckUtils]: 18: Hoare triple {46375#(<= |ULTIMATE.start_pcd_detect_~unit~2#1| 0)} assume !(pcd_detect_~unit~2#1 <= 3); {46318#false} is VALID [2022-02-20 21:45:12,273 INFO L290 TraceCheckUtils]: 19: Hoare triple {46318#false} assume 0 != pcd_detect_~k~4#1;pcd_detect_#res#1 := 0;call ULTIMATE.dealloc(pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset);havoc pcd_detect_~#id~0#1.base, pcd_detect_~#id~0#1.offset; {46318#false} is VALID [2022-02-20 21:45:12,273 INFO L290 TraceCheckUtils]: 20: Hoare triple {46318#false} pcd_init_#t~ret306#1 := pcd_detect_#res#1;assume { :end_inline_pcd_detect } true;assume -2147483648 <= pcd_init_#t~ret306#1 && pcd_init_#t~ret306#1 <= 2147483647;pcd_init_~tmp~30#1 := pcd_init_#t~ret306#1;havoc pcd_init_#t~ret306#1; {46318#false} is VALID [2022-02-20 21:45:12,274 INFO L290 TraceCheckUtils]: 21: Hoare triple {46318#false} assume 0 != pcd_init_~tmp~30#1;pcd_init_#res#1 := -19; {46318#false} is VALID [2022-02-20 21:45:12,274 INFO L290 TraceCheckUtils]: 22: Hoare triple {46318#false} main_#t~ret343#1 := pcd_init_#res#1;assume { :end_inline_pcd_init } true;assume -2147483648 <= main_#t~ret343#1 && main_#t~ret343#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret343#1;havoc main_#t~ret343#1; {46318#false} is VALID [2022-02-20 21:45:12,274 INFO L290 TraceCheckUtils]: 23: Hoare triple {46318#false} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1; {46318#false} is VALID [2022-02-20 21:45:12,274 INFO L290 TraceCheckUtils]: 24: Hoare triple {46318#false} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {46318#false} is VALID [2022-02-20 21:45:12,274 INFO L290 TraceCheckUtils]: 25: Hoare triple {46318#false} assume { :begin_inline_ldv_check_final_state } true; {46318#false} is VALID [2022-02-20 21:45:12,275 INFO L290 TraceCheckUtils]: 26: Hoare triple {46318#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {46318#false} is VALID [2022-02-20 21:45:12,275 INFO L272 TraceCheckUtils]: 27: Hoare triple {46318#false} call ldv_error(); {46318#false} is VALID [2022-02-20 21:45:12,275 INFO L290 TraceCheckUtils]: 28: Hoare triple {46318#false} assume !false; {46318#false} is VALID [2022-02-20 21:45:12,275 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-20 21:45:12,275 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-02-20 21:45:12,276 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [331900089] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:45:12,276 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-02-20 21:45:12,276 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 5 [2022-02-20 21:45:12,276 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630572333] [2022-02-20 21:45:12,276 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:45:12,277 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-02-20 21:45:12,277 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:45:12,277 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:45:12,316 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:45:12,316 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:45:12,317 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:45:12,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:45:12,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:45:12,318 INFO L87 Difference]: Start difference. First operand 2452 states and 3473 transitions. Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)