./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash bf300fda993e6da191f561c0f8e677f22a7de271b61b51439ca8ec3e0ecdedef --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:47:18,596 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:47:18,598 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:47:18,623 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:47:18,623 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:47:18,624 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:47:18,625 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:47:18,627 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:47:18,628 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:47:18,629 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:47:18,630 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:47:18,631 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:47:18,632 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:47:18,632 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:47:18,633 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:47:18,634 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:47:18,635 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:47:18,636 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:47:18,637 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:47:18,639 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:47:18,640 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:47:18,641 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:47:18,642 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:47:18,643 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:47:18,645 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:47:18,646 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:47:18,646 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:47:18,647 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:47:18,647 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:47:18,648 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:47:18,648 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:47:18,649 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:47:18,650 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:47:18,650 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:47:18,651 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:47:18,652 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:47:18,652 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:47:18,653 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:47:18,653 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:47:18,654 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:47:18,654 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:47:18,655 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:47:18,674 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:47:18,674 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:47:18,674 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:47:18,675 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:47:18,675 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:47:18,676 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:47:18,676 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:47:18,677 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:47:18,677 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:47:18,677 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:47:18,677 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:47:18,678 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:47:18,678 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:47:18,678 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:47:18,678 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:47:18,679 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:47:18,679 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:47:18,679 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:47:18,679 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:47:18,679 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:47:18,680 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:47:18,680 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:47:18,680 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:47:18,680 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:47:18,681 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:47:18,681 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:47:18,681 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:47:18,681 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:47:18,682 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:47:18,682 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:47:18,682 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bf300fda993e6da191f561c0f8e677f22a7de271b61b51439ca8ec3e0ecdedef [2022-02-20 21:47:18,948 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:47:18,970 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:47:18,972 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:47:18,974 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:47:18,974 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:47:18,975 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i [2022-02-20 21:47:19,034 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4d7f26682/835d5157d9af40b9b28b668784bcce82/FLAG37c10c125 [2022-02-20 21:47:19,679 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:47:19,681 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i [2022-02-20 21:47:19,712 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4d7f26682/835d5157d9af40b9b28b668784bcce82/FLAG37c10c125 [2022-02-20 21:47:20,027 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4d7f26682/835d5157d9af40b9b28b668784bcce82 [2022-02-20 21:47:20,029 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:47:20,030 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:47:20,031 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:47:20,032 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:47:20,040 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:47:20,041 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:47:20" (1/1) ... [2022-02-20 21:47:20,042 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3cb6323 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:20, skipping insertion in model container [2022-02-20 21:47:20,042 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:47:20" (1/1) ... [2022-02-20 21:47:20,049 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:47:20,123 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:47:20,856 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i[120339,120352] [2022-02-20 21:47:20,907 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:47:20,921 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:47:21,123 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i[120339,120352] [2022-02-20 21:47:21,135 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:47:21,171 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:47:21,171 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21 WrapperNode [2022-02-20 21:47:21,172 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:47:21,173 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:47:21,174 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:47:21,174 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:47:21,180 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,232 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,346 INFO L137 Inliner]: procedures = 152, calls = 622, calls flagged for inlining = 41, calls inlined = 41, statements flattened = 1750 [2022-02-20 21:47:21,347 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:47:21,348 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:47:21,348 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:47:21,348 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:47:21,355 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,355 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,387 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,388 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,458 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,477 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,491 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,511 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:47:21,513 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:47:21,513 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:47:21,513 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:47:21,514 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (1/1) ... [2022-02-20 21:47:21,520 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:47:21,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:47:21,544 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:47:21,564 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:47:21,584 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2022-02-20 21:47:21,584 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2022-02-20 21:47:21,584 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_alloc_resource [2022-02-20 21:47:21,585 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_bus_alloc_resource [2022-02-20 21:47:21,585 INFO L130 BoogieDeclarations]: Found specification of procedure add_interval [2022-02-20 21:47:21,585 INFO L138 BoogieDeclarations]: Found implementation of procedure add_interval [2022-02-20 21:47:21,585 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:47:21,585 INFO L130 BoogieDeclarations]: Found specification of procedure sub_interval [2022-02-20 21:47:21,585 INFO L138 BoogieDeclarations]: Found implementation of procedure sub_interval [2022-02-20 21:47:21,585 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:47:21,586 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:47:21,586 INFO L130 BoogieDeclarations]: Found specification of procedure nonstatic_find_mem_region [2022-02-20 21:47:21,586 INFO L138 BoogieDeclarations]: Found implementation of procedure nonstatic_find_mem_region [2022-02-20 21:47:21,587 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-02-20 21:47:21,587 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-02-20 21:47:21,587 INFO L130 BoogieDeclarations]: Found specification of procedure free_region [2022-02-20 21:47:21,587 INFO L138 BoogieDeclarations]: Found implementation of procedure free_region [2022-02-20 21:47:21,587 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:47:21,587 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2022-02-20 21:47:21,588 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2022-02-20 21:47:21,588 INFO L130 BoogieDeclarations]: Found specification of procedure __nonstatic_adjust_io_region [2022-02-20 21:47:21,588 INFO L138 BoogieDeclarations]: Found implementation of procedure __nonstatic_adjust_io_region [2022-02-20 21:47:21,588 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~$Pointer$~TO~int [2022-02-20 21:47:21,588 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~$Pointer$~TO~int [2022-02-20 21:47:21,588 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:47:21,588 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:47:21,589 INFO L130 BoogieDeclarations]: Found specification of procedure nonstatic_release_resource_db [2022-02-20 21:47:21,589 INFO L138 BoogieDeclarations]: Found implementation of procedure nonstatic_release_resource_db [2022-02-20 21:47:21,589 INFO L130 BoogieDeclarations]: Found specification of procedure do_mem_probe [2022-02-20 21:47:21,589 INFO L138 BoogieDeclarations]: Found implementation of procedure do_mem_probe [2022-02-20 21:47:21,589 INFO L130 BoogieDeclarations]: Found specification of procedure pcmcia_make_resource [2022-02-20 21:47:21,589 INFO L138 BoogieDeclarations]: Found implementation of procedure pcmcia_make_resource [2022-02-20 21:47:21,590 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:47:21,590 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:47:21,590 INFO L130 BoogieDeclarations]: Found specification of procedure nonstatic_init [2022-02-20 21:47:21,590 INFO L138 BoogieDeclarations]: Found implementation of procedure nonstatic_init [2022-02-20 21:47:21,590 INFO L130 BoogieDeclarations]: Found specification of procedure nonstatic_find_io [2022-02-20 21:47:21,590 INFO L138 BoogieDeclarations]: Found implementation of procedure nonstatic_find_io [2022-02-20 21:47:21,591 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:47:21,591 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock [2022-02-20 21:47:21,591 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock [2022-02-20 21:47:21,591 INFO L130 BoogieDeclarations]: Found specification of procedure pccard_sysfs_add_rsrc [2022-02-20 21:47:21,591 INFO L138 BoogieDeclarations]: Found implementation of procedure pccard_sysfs_add_rsrc [2022-02-20 21:47:21,592 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:47:21,592 INFO L130 BoogieDeclarations]: Found specification of procedure static_init [2022-02-20 21:47:21,592 INFO L138 BoogieDeclarations]: Found implementation of procedure static_init [2022-02-20 21:47:21,592 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:47:21,592 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:47:21,593 INFO L130 BoogieDeclarations]: Found specification of procedure do_validate_mem [2022-02-20 21:47:21,593 INFO L138 BoogieDeclarations]: Found implementation of procedure do_validate_mem [2022-02-20 21:47:21,593 INFO L130 BoogieDeclarations]: Found specification of procedure allocate_resource [2022-02-20 21:47:21,593 INFO L138 BoogieDeclarations]: Found implementation of procedure allocate_resource [2022-02-20 21:47:21,593 INFO L130 BoogieDeclarations]: Found specification of procedure pcmcia_nonstatic_validate_mem [2022-02-20 21:47:21,593 INFO L138 BoogieDeclarations]: Found implementation of procedure pcmcia_nonstatic_validate_mem [2022-02-20 21:47:21,594 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:47:21,594 INFO L130 BoogieDeclarations]: Found specification of procedure static_find_io [2022-02-20 21:47:21,594 INFO L138 BoogieDeclarations]: Found implementation of procedure static_find_io [2022-02-20 21:47:21,595 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2022-02-20 21:47:21,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2022-02-20 21:47:21,595 INFO L130 BoogieDeclarations]: Found specification of procedure show_mem_db [2022-02-20 21:47:21,596 INFO L138 BoogieDeclarations]: Found implementation of procedure show_mem_db [2022-02-20 21:47:21,596 INFO L130 BoogieDeclarations]: Found specification of procedure adjust_io [2022-02-20 21:47:21,596 INFO L138 BoogieDeclarations]: Found implementation of procedure adjust_io [2022-02-20 21:47:21,596 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:47:21,597 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-02-20 21:47:21,597 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-02-20 21:47:21,597 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:47:21,597 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2022-02-20 21:47:21,597 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2022-02-20 21:47:21,597 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2022-02-20 21:47:21,597 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2022-02-20 21:47:21,598 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2022-02-20 21:47:21,598 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~int [2022-02-20 21:47:21,598 INFO L130 BoogieDeclarations]: Found specification of procedure dev_name [2022-02-20 21:47:21,598 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_name [2022-02-20 21:47:21,599 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:47:21,599 INFO L130 BoogieDeclarations]: Found specification of procedure resource_size [2022-02-20 21:47:21,599 INFO L138 BoogieDeclarations]: Found implementation of procedure resource_size [2022-02-20 21:47:21,599 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_pccard_static_ops_release_6 [2022-02-20 21:47:21,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_pccard_static_ops_release_6 [2022-02-20 21:47:21,599 INFO L130 BoogieDeclarations]: Found specification of procedure adjust_memory [2022-02-20 21:47:21,600 INFO L138 BoogieDeclarations]: Found implementation of procedure adjust_memory [2022-02-20 21:47:21,600 INFO L130 BoogieDeclarations]: Found specification of procedure adjust_resource [2022-02-20 21:47:21,600 INFO L138 BoogieDeclarations]: Found implementation of procedure adjust_resource [2022-02-20 21:47:21,600 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_pccard_static_ops_release_7 [2022-02-20 21:47:21,600 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_pccard_static_ops_release_7 [2022-02-20 21:47:21,600 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:47:21,600 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:47:21,601 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_ops_mutex_of_pcmcia_socket [2022-02-20 21:47:21,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_ops_mutex_of_pcmcia_socket [2022-02-20 21:47:21,601 INFO L130 BoogieDeclarations]: Found specification of procedure claim_region [2022-02-20 21:47:21,601 INFO L138 BoogieDeclarations]: Found implementation of procedure claim_region [2022-02-20 21:47:21,602 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_ops_mutex_of_pcmcia_socket [2022-02-20 21:47:21,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_ops_mutex_of_pcmcia_socket [2022-02-20 21:47:21,602 INFO L130 BoogieDeclarations]: Found specification of procedure show_io_db [2022-02-20 21:47:21,602 INFO L138 BoogieDeclarations]: Found implementation of procedure show_io_db [2022-02-20 21:47:22,075 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:47:22,077 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:47:23,771 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:47:23,786 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:47:23,791 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:47:23,794 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:47:23 BoogieIcfgContainer [2022-02-20 21:47:23,795 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:47:23,797 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:47:23,797 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:47:23,801 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:47:23,801 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:47:20" (1/3) ... [2022-02-20 21:47:23,801 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4827872 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:47:23, skipping insertion in model container [2022-02-20 21:47:23,802 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:21" (2/3) ... [2022-02-20 21:47:23,802 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4827872 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:47:23, skipping insertion in model container [2022-02-20 21:47:23,802 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:47:23" (3/3) ... [2022-02-20 21:47:23,808 INFO L111 eAbstractionObserver]: Analyzing ICFG 32_7a_cilled_linux-3.8-rc1-drivers--pcmcia--pcmcia_rsrc.ko-main.cil.out.i [2022-02-20 21:47:23,817 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:47:23,817 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:47:23,861 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:47:23,867 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:47:23,867 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:47:23,900 INFO L276 IsEmpty]: Start isEmpty. Operand has 718 states, 551 states have (on average 1.455535390199637) internal successors, (802), 560 states have internal predecessors, (802), 123 states have call successors, (123), 42 states have call predecessors, (123), 42 states have return successors, (123), 123 states have call predecessors, (123), 123 states have call successors, (123) [2022-02-20 21:47:23,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-02-20 21:47:23,908 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:23,909 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:23,909 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:23,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:23,913 INFO L85 PathProgramCache]: Analyzing trace with hash 194067530, now seen corresponding path program 1 times [2022-02-20 21:47:23,921 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:23,921 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266661872] [2022-02-20 21:47:23,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:23,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:24,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:24,274 INFO L290 TraceCheckUtils]: 0: Hoare triple {721#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {721#true} is VALID [2022-02-20 21:47:24,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {721#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {721#true} is VALID [2022-02-20 21:47:24,275 INFO L290 TraceCheckUtils]: 2: Hoare triple {721#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,276 INFO L290 TraceCheckUtils]: 3: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,276 INFO L290 TraceCheckUtils]: 4: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,277 INFO L290 TraceCheckUtils]: 5: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 2 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,277 INFO L290 TraceCheckUtils]: 6: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 3 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,278 INFO L290 TraceCheckUtils]: 7: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 4 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,278 INFO L290 TraceCheckUtils]: 8: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 5 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,279 INFO L290 TraceCheckUtils]: 9: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 6 == main_~tmp~28#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,279 INFO L290 TraceCheckUtils]: 10: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch388#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,280 INFO L290 TraceCheckUtils]: 11: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet406#1 && main_#t~nondet406#1 <= 2147483647;main_~tmp___4~2#1 := main_#t~nondet406#1;havoc main_#t~nondet406#1;main_#t~switch407#1 := 0 == main_~tmp___4~2#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,280 INFO L290 TraceCheckUtils]: 12: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch407#1; {723#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:24,281 INFO L290 TraceCheckUtils]: 13: Hoare triple {723#(= ~ldv_state_variable_0~0 1)} assume 2 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_nonstatic_sysfs_exit } true;assume { :begin_inline_class_interface_unregister } true;class_interface_unregister_#in~arg0#1.base, class_interface_unregister_#in~arg0#1.offset := ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset;havoc class_interface_unregister_~arg0#1.base, class_interface_unregister_~arg0#1.offset;class_interface_unregister_~arg0#1.base, class_interface_unregister_~arg0#1.offset := class_interface_unregister_#in~arg0#1.base, class_interface_unregister_#in~arg0#1.offset; {722#false} is VALID [2022-02-20 21:47:24,281 INFO L290 TraceCheckUtils]: 14: Hoare triple {722#false} assume { :end_inline_class_interface_unregister } true; {722#false} is VALID [2022-02-20 21:47:24,281 INFO L290 TraceCheckUtils]: 15: Hoare triple {722#false} assume { :end_inline_nonstatic_sysfs_exit } true;~ldv_state_variable_0~0 := 3; {722#false} is VALID [2022-02-20 21:47:24,282 INFO L290 TraceCheckUtils]: 16: Hoare triple {722#false} assume { :begin_inline_ldv_check_final_state } true; {722#false} is VALID [2022-02-20 21:47:24,282 INFO L290 TraceCheckUtils]: 17: Hoare triple {722#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {722#false} is VALID [2022-02-20 21:47:24,282 INFO L272 TraceCheckUtils]: 18: Hoare triple {722#false} call ldv_error(); {722#false} is VALID [2022-02-20 21:47:24,282 INFO L290 TraceCheckUtils]: 19: Hoare triple {722#false} assume !false; {722#false} is VALID [2022-02-20 21:47:24,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:24,287 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:24,288 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266661872] [2022-02-20 21:47:24,288 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266661872] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:24,289 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:24,289 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:24,290 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488077780] [2022-02-20 21:47:24,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:24,296 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-02-20 21:47:24,297 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:24,300 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:24,325 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:24,326 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:24,326 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:24,351 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:24,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:24,359 INFO L87 Difference]: Start difference. First operand has 718 states, 551 states have (on average 1.455535390199637) internal successors, (802), 560 states have internal predecessors, (802), 123 states have call successors, (123), 42 states have call predecessors, (123), 42 states have return successors, (123), 123 states have call predecessors, (123), 123 states have call successors, (123) Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:26,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:26,697 INFO L93 Difference]: Finished difference Result 2125 states and 3240 transitions. [2022-02-20 21:47:26,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:26,698 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-02-20 21:47:26,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:26,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:26,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3240 transitions. [2022-02-20 21:47:26,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:26,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3240 transitions. [2022-02-20 21:47:26,887 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 3240 transitions. [2022-02-20 21:47:29,542 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3240 edges. 3240 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:29,790 INFO L225 Difference]: With dead ends: 2125 [2022-02-20 21:47:29,790 INFO L226 Difference]: Without dead ends: 1406 [2022-02-20 21:47:29,801 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:29,805 INFO L933 BasicCegarLoop]: 1145 mSDtfsCounter, 994 mSDsluCounter, 1015 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 994 SdHoareTripleChecker+Valid, 2160 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:29,806 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [994 Valid, 2160 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:29,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1406 states. [2022-02-20 21:47:29,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1406 to 1402. [2022-02-20 21:47:29,920 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:29,933 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1406 states. Second operand has 1402 states, 1079 states have (on average 1.4355885078776645) internal successors, (1549), 1088 states have internal predecessors, (1549), 240 states have call successors, (240), 83 states have call predecessors, (240), 82 states have return successors, (234), 234 states have call predecessors, (234), 234 states have call successors, (234) [2022-02-20 21:47:29,937 INFO L74 IsIncluded]: Start isIncluded. First operand 1406 states. Second operand has 1402 states, 1079 states have (on average 1.4355885078776645) internal successors, (1549), 1088 states have internal predecessors, (1549), 240 states have call successors, (240), 83 states have call predecessors, (240), 82 states have return successors, (234), 234 states have call predecessors, (234), 234 states have call successors, (234) [2022-02-20 21:47:29,940 INFO L87 Difference]: Start difference. First operand 1406 states. Second operand has 1402 states, 1079 states have (on average 1.4355885078776645) internal successors, (1549), 1088 states have internal predecessors, (1549), 240 states have call successors, (240), 83 states have call predecessors, (240), 82 states have return successors, (234), 234 states have call predecessors, (234), 234 states have call successors, (234) [2022-02-20 21:47:30,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:30,072 INFO L93 Difference]: Finished difference Result 1406 states and 2026 transitions. [2022-02-20 21:47:30,073 INFO L276 IsEmpty]: Start isEmpty. Operand 1406 states and 2026 transitions. [2022-02-20 21:47:30,091 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:30,092 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:30,097 INFO L74 IsIncluded]: Start isIncluded. First operand has 1402 states, 1079 states have (on average 1.4355885078776645) internal successors, (1549), 1088 states have internal predecessors, (1549), 240 states have call successors, (240), 83 states have call predecessors, (240), 82 states have return successors, (234), 234 states have call predecessors, (234), 234 states have call successors, (234) Second operand 1406 states. [2022-02-20 21:47:30,105 INFO L87 Difference]: Start difference. First operand has 1402 states, 1079 states have (on average 1.4355885078776645) internal successors, (1549), 1088 states have internal predecessors, (1549), 240 states have call successors, (240), 83 states have call predecessors, (240), 82 states have return successors, (234), 234 states have call predecessors, (234), 234 states have call successors, (234) Second operand 1406 states. [2022-02-20 21:47:30,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:30,208 INFO L93 Difference]: Finished difference Result 1406 states and 2026 transitions. [2022-02-20 21:47:30,208 INFO L276 IsEmpty]: Start isEmpty. Operand 1406 states and 2026 transitions. [2022-02-20 21:47:30,213 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:30,213 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:30,213 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:30,214 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:30,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1402 states, 1079 states have (on average 1.4355885078776645) internal successors, (1549), 1088 states have internal predecessors, (1549), 240 states have call successors, (240), 83 states have call predecessors, (240), 82 states have return successors, (234), 234 states have call predecessors, (234), 234 states have call successors, (234) [2022-02-20 21:47:30,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1402 states to 1402 states and 2023 transitions. [2022-02-20 21:47:30,347 INFO L78 Accepts]: Start accepts. Automaton has 1402 states and 2023 transitions. Word has length 20 [2022-02-20 21:47:30,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:30,348 INFO L470 AbstractCegarLoop]: Abstraction has 1402 states and 2023 transitions. [2022-02-20 21:47:30,348 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:30,350 INFO L276 IsEmpty]: Start isEmpty. Operand 1402 states and 2023 transitions. [2022-02-20 21:47:30,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-02-20 21:47:30,352 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:30,352 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:30,352 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:47:30,353 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:30,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:30,357 INFO L85 PathProgramCache]: Analyzing trace with hash -1463287874, now seen corresponding path program 1 times [2022-02-20 21:47:30,357 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:30,357 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871967639] [2022-02-20 21:47:30,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:30,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:30,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:30,481 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:47:30,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:30,491 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:47:30,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:30,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;assume -2147483648 <= #t~nondet4#1 && #t~nondet4#1 <= 2147483647; {8370#true} is VALID [2022-02-20 21:47:30,498 INFO L290 TraceCheckUtils]: 1: Hoare triple {8370#true} assume !(0 != #t~nondet4#1);havoc #t~nondet4#1;#res#1.base, #res#1.offset := 0, 0; {8370#true} is VALID [2022-02-20 21:47:30,498 INFO L290 TraceCheckUtils]: 2: Hoare triple {8370#true} assume true; {8370#true} is VALID [2022-02-20 21:47:30,499 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8370#true} {8370#true} #1898#return; {8370#true} is VALID [2022-02-20 21:47:30,499 INFO L290 TraceCheckUtils]: 0: Hoare triple {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {8370#true} is VALID [2022-02-20 21:47:30,500 INFO L272 TraceCheckUtils]: 1: Hoare triple {8370#true} call #t~ret441.base, #t~ret441.offset := ldv_malloc(0); {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:30,500 INFO L290 TraceCheckUtils]: 2: Hoare triple {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;assume -2147483648 <= #t~nondet4#1 && #t~nondet4#1 <= 2147483647; {8370#true} is VALID [2022-02-20 21:47:30,500 INFO L290 TraceCheckUtils]: 3: Hoare triple {8370#true} assume !(0 != #t~nondet4#1);havoc #t~nondet4#1;#res#1.base, #res#1.offset := 0, 0; {8370#true} is VALID [2022-02-20 21:47:30,500 INFO L290 TraceCheckUtils]: 4: Hoare triple {8370#true} assume true; {8370#true} is VALID [2022-02-20 21:47:30,501 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {8370#true} {8370#true} #1898#return; {8370#true} is VALID [2022-02-20 21:47:30,501 INFO L290 TraceCheckUtils]: 6: Hoare triple {8370#true} #res.base, #res.offset := #t~ret441.base, #t~ret441.offset;havoc #t~ret441.base, #t~ret441.offset; {8370#true} is VALID [2022-02-20 21:47:30,501 INFO L290 TraceCheckUtils]: 7: Hoare triple {8370#true} assume true; {8370#true} is VALID [2022-02-20 21:47:30,501 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {8370#true} {8371#false} #2134#return; {8371#false} is VALID [2022-02-20 21:47:30,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {8370#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {8370#true} is VALID [2022-02-20 21:47:30,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {8370#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {8370#true} is VALID [2022-02-20 21:47:30,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {8370#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {8372#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:30,503 INFO L290 TraceCheckUtils]: 3: Hoare triple {8372#(= ~ldv_state_variable_3~0 0)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {8372#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:30,503 INFO L290 TraceCheckUtils]: 4: Hoare triple {8372#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {8372#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:30,504 INFO L290 TraceCheckUtils]: 5: Hoare triple {8372#(= ~ldv_state_variable_3~0 0)} assume main_#t~switch388#1; {8372#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:30,504 INFO L290 TraceCheckUtils]: 6: Hoare triple {8372#(= ~ldv_state_variable_3~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet389#1 && main_#t~nondet389#1 <= 2147483647;main_~tmp___0~13#1 := main_#t~nondet389#1;havoc main_#t~nondet389#1;main_#t~switch390#1 := 0 == main_~tmp___0~13#1; {8371#false} is VALID [2022-02-20 21:47:30,505 INFO L290 TraceCheckUtils]: 7: Hoare triple {8371#false} assume !main_#t~switch390#1;main_#t~switch390#1 := main_#t~switch390#1 || 1 == main_~tmp___0~13#1; {8371#false} is VALID [2022-02-20 21:47:30,505 INFO L290 TraceCheckUtils]: 8: Hoare triple {8371#false} assume main_#t~switch390#1; {8371#false} is VALID [2022-02-20 21:47:30,505 INFO L290 TraceCheckUtils]: 9: Hoare triple {8371#false} assume 1 == ~ldv_state_variable_3~0; {8371#false} is VALID [2022-02-20 21:47:30,505 INFO L272 TraceCheckUtils]: 10: Hoare triple {8371#false} call main_#t~ret392#1 := show_io_db(~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset, ~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset, ~ldvarg5~0.base, ~ldvarg5~0.offset); {8371#false} is VALID [2022-02-20 21:47:30,506 INFO L290 TraceCheckUtils]: 11: Hoare triple {8371#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~attr#1.base, ~attr#1.offset := #in~attr#1.base, #in~attr#1.offset;~buf#1.base, ~buf#1.offset := #in~buf#1.base, #in~buf#1.offset;havoc ~s~0#1.base, ~s~0#1.offset;havoc ~tmp~21#1.base, ~tmp~21#1.offset;havoc ~data~7#1.base, ~data~7#1.offset;havoc ~p~3#1.base, ~p~3#1.offset;havoc ~ret~11#1;havoc ~tmp___0~8#1; {8371#false} is VALID [2022-02-20 21:47:30,506 INFO L272 TraceCheckUtils]: 12: Hoare triple {8371#false} call #t~ret341#1.base, #t~ret341#1.offset := dev_get_drvdata(~dev#1.base, ~dev#1.offset); {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:30,506 INFO L290 TraceCheckUtils]: 13: Hoare triple {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {8370#true} is VALID [2022-02-20 21:47:30,507 INFO L272 TraceCheckUtils]: 14: Hoare triple {8370#true} call #t~ret441.base, #t~ret441.offset := ldv_malloc(0); {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:30,507 INFO L290 TraceCheckUtils]: 15: Hoare triple {8382#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;assume -2147483648 <= #t~nondet4#1 && #t~nondet4#1 <= 2147483647; {8370#true} is VALID [2022-02-20 21:47:30,507 INFO L290 TraceCheckUtils]: 16: Hoare triple {8370#true} assume !(0 != #t~nondet4#1);havoc #t~nondet4#1;#res#1.base, #res#1.offset := 0, 0; {8370#true} is VALID [2022-02-20 21:47:30,508 INFO L290 TraceCheckUtils]: 17: Hoare triple {8370#true} assume true; {8370#true} is VALID [2022-02-20 21:47:30,508 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {8370#true} {8370#true} #1898#return; {8370#true} is VALID [2022-02-20 21:47:30,508 INFO L290 TraceCheckUtils]: 19: Hoare triple {8370#true} #res.base, #res.offset := #t~ret441.base, #t~ret441.offset;havoc #t~ret441.base, #t~ret441.offset; {8370#true} is VALID [2022-02-20 21:47:30,508 INFO L290 TraceCheckUtils]: 20: Hoare triple {8370#true} assume true; {8370#true} is VALID [2022-02-20 21:47:30,509 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {8370#true} {8371#false} #2134#return; {8371#false} is VALID [2022-02-20 21:47:30,509 INFO L290 TraceCheckUtils]: 22: Hoare triple {8371#false} ~tmp~21#1.base, ~tmp~21#1.offset := #t~ret341#1.base, #t~ret341#1.offset;havoc #t~ret341#1.base, #t~ret341#1.offset;~s~0#1.base, ~s~0#1.offset := ~tmp~21#1.base, ~tmp~21#1.offset;~ret~11#1 := 0;assume { :begin_inline_ldv_mutex_lock_24 } true;ldv_mutex_lock_24_#in~ldv_func_arg1#1.base, ldv_mutex_lock_24_#in~ldv_func_arg1#1.offset := ~s~0#1.base, 668 + ~s~0#1.offset;havoc ldv_mutex_lock_24_~ldv_func_arg1#1.base, ldv_mutex_lock_24_~ldv_func_arg1#1.offset;ldv_mutex_lock_24_~ldv_func_arg1#1.base, ldv_mutex_lock_24_~ldv_func_arg1#1.offset := ldv_mutex_lock_24_#in~ldv_func_arg1#1.base, ldv_mutex_lock_24_#in~ldv_func_arg1#1.offset; {8371#false} is VALID [2022-02-20 21:47:30,509 INFO L272 TraceCheckUtils]: 23: Hoare triple {8371#false} call ldv_mutex_lock_ops_mutex_of_pcmcia_socket(ldv_mutex_lock_24_~ldv_func_arg1#1.base, ldv_mutex_lock_24_~ldv_func_arg1#1.offset); {8371#false} is VALID [2022-02-20 21:47:30,509 INFO L290 TraceCheckUtils]: 24: Hoare triple {8371#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {8371#false} is VALID [2022-02-20 21:47:30,509 INFO L290 TraceCheckUtils]: 25: Hoare triple {8371#false} assume !(1 == ~ldv_mutex_ops_mutex_of_pcmcia_socket~0); {8371#false} is VALID [2022-02-20 21:47:30,509 INFO L272 TraceCheckUtils]: 26: Hoare triple {8371#false} call ldv_error(); {8371#false} is VALID [2022-02-20 21:47:30,510 INFO L290 TraceCheckUtils]: 27: Hoare triple {8371#false} assume !false; {8371#false} is VALID [2022-02-20 21:47:30,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:30,510 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:30,510 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871967639] [2022-02-20 21:47:30,510 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871967639] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:30,511 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:30,511 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:47:30,511 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1878212556] [2022-02-20 21:47:30,511 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:30,512 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 28 [2022-02-20 21:47:30,512 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:30,512 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:30,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:30,540 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:47:30,540 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:30,540 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:47:30,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:47:30,541 INFO L87 Difference]: Start difference. First operand 1402 states and 2023 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:36,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:36,524 INFO L93 Difference]: Finished difference Result 4876 states and 7143 transitions. [2022-02-20 21:47:36,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:47:36,525 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 28 [2022-02-20 21:47:36,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:36,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:36,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3612 transitions. [2022-02-20 21:47:36,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:36,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3612 transitions. [2022-02-20 21:47:36,641 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 3612 transitions. [2022-02-20 21:47:39,542 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3612 edges. 3612 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:40,209 INFO L225 Difference]: With dead ends: 4876 [2022-02-20 21:47:40,209 INFO L226 Difference]: Without dead ends: 3477 [2022-02-20 21:47:40,213 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:47:40,215 INFO L933 BasicCegarLoop]: 1198 mSDtfsCounter, 1780 mSDsluCounter, 1509 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 413 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1859 SdHoareTripleChecker+Valid, 2707 SdHoareTripleChecker+Invalid, 962 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 413 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:40,215 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1859 Valid, 2707 Invalid, 962 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [413 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-02-20 21:47:40,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3477 states. [2022-02-20 21:47:40,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3477 to 2734. [2022-02-20 21:47:40,327 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:40,335 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3477 states. Second operand has 2734 states, 2109 states have (on average 1.433854907539118) internal successors, (3024), 2122 states have internal predecessors, (3024), 460 states have call successors, (460), 165 states have call predecessors, (460), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:40,342 INFO L74 IsIncluded]: Start isIncluded. First operand 3477 states. Second operand has 2734 states, 2109 states have (on average 1.433854907539118) internal successors, (3024), 2122 states have internal predecessors, (3024), 460 states have call successors, (460), 165 states have call predecessors, (460), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:40,348 INFO L87 Difference]: Start difference. First operand 3477 states. Second operand has 2734 states, 2109 states have (on average 1.433854907539118) internal successors, (3024), 2122 states have internal predecessors, (3024), 460 states have call successors, (460), 165 states have call predecessors, (460), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:40,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:40,846 INFO L93 Difference]: Finished difference Result 3477 states and 5121 transitions. [2022-02-20 21:47:40,846 INFO L276 IsEmpty]: Start isEmpty. Operand 3477 states and 5121 transitions. [2022-02-20 21:47:40,861 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:40,862 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:40,870 INFO L74 IsIncluded]: Start isIncluded. First operand has 2734 states, 2109 states have (on average 1.433854907539118) internal successors, (3024), 2122 states have internal predecessors, (3024), 460 states have call successors, (460), 165 states have call predecessors, (460), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) Second operand 3477 states. [2022-02-20 21:47:40,877 INFO L87 Difference]: Start difference. First operand has 2734 states, 2109 states have (on average 1.433854907539118) internal successors, (3024), 2122 states have internal predecessors, (3024), 460 states have call successors, (460), 165 states have call predecessors, (460), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) Second operand 3477 states. [2022-02-20 21:47:41,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:41,390 INFO L93 Difference]: Finished difference Result 3477 states and 5121 transitions. [2022-02-20 21:47:41,390 INFO L276 IsEmpty]: Start isEmpty. Operand 3477 states and 5121 transitions. [2022-02-20 21:47:41,405 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:41,405 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:41,405 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:41,405 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:41,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2734 states, 2109 states have (on average 1.433854907539118) internal successors, (3024), 2122 states have internal predecessors, (3024), 460 states have call successors, (460), 165 states have call predecessors, (460), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:41,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2734 states to 2734 states and 3938 transitions. [2022-02-20 21:47:41,811 INFO L78 Accepts]: Start accepts. Automaton has 2734 states and 3938 transitions. Word has length 28 [2022-02-20 21:47:41,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:41,811 INFO L470 AbstractCegarLoop]: Abstraction has 2734 states and 3938 transitions. [2022-02-20 21:47:41,812 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:41,812 INFO L276 IsEmpty]: Start isEmpty. Operand 2734 states and 3938 transitions. [2022-02-20 21:47:41,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-02-20 21:47:41,813 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:41,814 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:41,814 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:47:41,814 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:41,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:41,815 INFO L85 PathProgramCache]: Analyzing trace with hash -900728339, now seen corresponding path program 1 times [2022-02-20 21:47:41,815 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:41,815 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1252293833] [2022-02-20 21:47:41,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:41,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:41,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:41,878 INFO L290 TraceCheckUtils]: 0: Hoare triple {25760#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {25760#true} is VALID [2022-02-20 21:47:41,879 INFO L290 TraceCheckUtils]: 1: Hoare triple {25760#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,879 INFO L290 TraceCheckUtils]: 2: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,880 INFO L290 TraceCheckUtils]: 3: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,880 INFO L290 TraceCheckUtils]: 4: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,881 INFO L290 TraceCheckUtils]: 5: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 2 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,881 INFO L290 TraceCheckUtils]: 6: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 3 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,881 INFO L290 TraceCheckUtils]: 7: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 4 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,882 INFO L290 TraceCheckUtils]: 8: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 5 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,882 INFO L290 TraceCheckUtils]: 9: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 6 == main_~tmp~28#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,883 INFO L290 TraceCheckUtils]: 10: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume main_#t~switch388#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,883 INFO L290 TraceCheckUtils]: 11: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet406#1 && main_#t~nondet406#1 <= 2147483647;main_~tmp___4~2#1 := main_#t~nondet406#1;havoc main_#t~nondet406#1;main_#t~switch407#1 := 0 == main_~tmp___4~2#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,884 INFO L290 TraceCheckUtils]: 12: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch407#1;main_#t~switch407#1 := main_#t~switch407#1 || 1 == main_~tmp___4~2#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume main_#t~switch407#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,886 INFO L290 TraceCheckUtils]: 14: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_nonstatic_sysfs_init } true;havoc nonstatic_sysfs_init_#res#1;havoc nonstatic_sysfs_init_#t~ret386#1, nonstatic_sysfs_init_~tmp~27#1;havoc nonstatic_sysfs_init_~tmp~27#1;assume { :begin_inline_class_interface_register } true;class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset := ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset;havoc class_interface_register_#res#1;havoc class_interface_register_#t~nondet440#1, class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset;class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset := class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset;assume -2147483648 <= class_interface_register_#t~nondet440#1 && class_interface_register_#t~nondet440#1 <= 2147483647;class_interface_register_#res#1 := class_interface_register_#t~nondet440#1;havoc class_interface_register_#t~nondet440#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,887 INFO L290 TraceCheckUtils]: 15: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} nonstatic_sysfs_init_#t~ret386#1 := class_interface_register_#res#1;assume { :end_inline_class_interface_register } true;assume -2147483648 <= nonstatic_sysfs_init_#t~ret386#1 && nonstatic_sysfs_init_#t~ret386#1 <= 2147483647;nonstatic_sysfs_init_~tmp~27#1 := nonstatic_sysfs_init_#t~ret386#1;havoc nonstatic_sysfs_init_#t~ret386#1;nonstatic_sysfs_init_#res#1 := nonstatic_sysfs_init_~tmp~27#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,887 INFO L290 TraceCheckUtils]: 16: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} main_#t~ret408#1 := nonstatic_sysfs_init_#res#1;assume { :end_inline_nonstatic_sysfs_init } true;assume -2147483648 <= main_#t~ret408#1 && main_#t~ret408#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret408#1;havoc main_#t~ret408#1; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,888 INFO L290 TraceCheckUtils]: 17: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != ~ldv_retval_2~0;~ldv_state_variable_0~0 := 3; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,888 INFO L290 TraceCheckUtils]: 18: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume { :begin_inline_ldv_check_final_state } true; {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:41,889 INFO L290 TraceCheckUtils]: 19: Hoare triple {25762#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {25761#false} is VALID [2022-02-20 21:47:41,889 INFO L272 TraceCheckUtils]: 20: Hoare triple {25761#false} call ldv_error(); {25761#false} is VALID [2022-02-20 21:47:41,889 INFO L290 TraceCheckUtils]: 21: Hoare triple {25761#false} assume !false; {25761#false} is VALID [2022-02-20 21:47:41,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:41,890 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:41,890 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1252293833] [2022-02-20 21:47:41,890 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1252293833] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:41,890 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:41,891 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:41,891 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962528689] [2022-02-20 21:47:41,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:41,891 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-02-20 21:47:41,892 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:41,892 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:41,912 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:41,912 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:41,912 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:41,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:41,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:41,913 INFO L87 Difference]: Start difference. First operand 2734 states and 3938 transitions. Second operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:43,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:43,390 INFO L93 Difference]: Finished difference Result 2736 states and 3939 transitions. [2022-02-20 21:47:43,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:43,391 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-02-20 21:47:43,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:43,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:43,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1027 transitions. [2022-02-20 21:47:43,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:43,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1027 transitions. [2022-02-20 21:47:43,423 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1027 transitions. [2022-02-20 21:47:44,233 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1027 edges. 1027 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:44,580 INFO L225 Difference]: With dead ends: 2736 [2022-02-20 21:47:44,580 INFO L226 Difference]: Without dead ends: 2733 [2022-02-20 21:47:44,581 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:44,582 INFO L933 BasicCegarLoop]: 1023 mSDtfsCounter, 1005 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1005 SdHoareTripleChecker+Valid, 1023 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:44,583 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1005 Valid, 1023 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:44,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2733 states. [2022-02-20 21:47:44,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2733 to 2733. [2022-02-20 21:47:44,648 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:44,653 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2733 states. Second operand has 2733 states, 2109 states have (on average 1.4333807491702228) internal successors, (3023), 2121 states have internal predecessors, (3023), 459 states have call successors, (459), 165 states have call predecessors, (459), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:44,658 INFO L74 IsIncluded]: Start isIncluded. First operand 2733 states. Second operand has 2733 states, 2109 states have (on average 1.4333807491702228) internal successors, (3023), 2121 states have internal predecessors, (3023), 459 states have call successors, (459), 165 states have call predecessors, (459), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:44,662 INFO L87 Difference]: Start difference. First operand 2733 states. Second operand has 2733 states, 2109 states have (on average 1.4333807491702228) internal successors, (3023), 2121 states have internal predecessors, (3023), 459 states have call successors, (459), 165 states have call predecessors, (459), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:44,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:44,915 INFO L93 Difference]: Finished difference Result 2733 states and 3936 transitions. [2022-02-20 21:47:44,916 INFO L276 IsEmpty]: Start isEmpty. Operand 2733 states and 3936 transitions. [2022-02-20 21:47:44,923 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:44,924 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:44,930 INFO L74 IsIncluded]: Start isIncluded. First operand has 2733 states, 2109 states have (on average 1.4333807491702228) internal successors, (3023), 2121 states have internal predecessors, (3023), 459 states have call successors, (459), 165 states have call predecessors, (459), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) Second operand 2733 states. [2022-02-20 21:47:44,934 INFO L87 Difference]: Start difference. First operand has 2733 states, 2109 states have (on average 1.4333807491702228) internal successors, (3023), 2121 states have internal predecessors, (3023), 459 states have call successors, (459), 165 states have call predecessors, (459), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) Second operand 2733 states. [2022-02-20 21:47:45,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:45,236 INFO L93 Difference]: Finished difference Result 2733 states and 3936 transitions. [2022-02-20 21:47:45,236 INFO L276 IsEmpty]: Start isEmpty. Operand 2733 states and 3936 transitions. [2022-02-20 21:47:45,243 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:45,243 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:45,243 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:45,243 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:45,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2733 states, 2109 states have (on average 1.4333807491702228) internal successors, (3023), 2121 states have internal predecessors, (3023), 459 states have call successors, (459), 165 states have call predecessors, (459), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:45,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2733 states to 2733 states and 3936 transitions. [2022-02-20 21:47:45,721 INFO L78 Accepts]: Start accepts. Automaton has 2733 states and 3936 transitions. Word has length 22 [2022-02-20 21:47:45,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:45,722 INFO L470 AbstractCegarLoop]: Abstraction has 2733 states and 3936 transitions. [2022-02-20 21:47:45,722 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:45,722 INFO L276 IsEmpty]: Start isEmpty. Operand 2733 states and 3936 transitions. [2022-02-20 21:47:45,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-02-20 21:47:45,723 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:45,723 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:45,723 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:47:45,724 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:45,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:45,724 INFO L85 PathProgramCache]: Analyzing trace with hash 2141850950, now seen corresponding path program 1 times [2022-02-20 21:47:45,724 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:45,724 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215144249] [2022-02-20 21:47:45,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:45,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:45,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:45,794 INFO L290 TraceCheckUtils]: 0: Hoare triple {38706#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {38706#true} is VALID [2022-02-20 21:47:45,795 INFO L290 TraceCheckUtils]: 1: Hoare triple {38706#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,796 INFO L290 TraceCheckUtils]: 2: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,796 INFO L290 TraceCheckUtils]: 3: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,797 INFO L290 TraceCheckUtils]: 4: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,797 INFO L290 TraceCheckUtils]: 5: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 2 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,798 INFO L290 TraceCheckUtils]: 6: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 3 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 4 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,798 INFO L290 TraceCheckUtils]: 8: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 5 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,799 INFO L290 TraceCheckUtils]: 9: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 6 == main_~tmp~28#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,799 INFO L290 TraceCheckUtils]: 10: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume main_#t~switch388#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet406#1 && main_#t~nondet406#1 <= 2147483647;main_~tmp___4~2#1 := main_#t~nondet406#1;havoc main_#t~nondet406#1;main_#t~switch407#1 := 0 == main_~tmp___4~2#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,800 INFO L290 TraceCheckUtils]: 12: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch407#1;main_#t~switch407#1 := main_#t~switch407#1 || 1 == main_~tmp___4~2#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,800 INFO L290 TraceCheckUtils]: 13: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume main_#t~switch407#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,801 INFO L290 TraceCheckUtils]: 14: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_nonstatic_sysfs_init } true;havoc nonstatic_sysfs_init_#res#1;havoc nonstatic_sysfs_init_#t~ret386#1, nonstatic_sysfs_init_~tmp~27#1;havoc nonstatic_sysfs_init_~tmp~27#1;assume { :begin_inline_class_interface_register } true;class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset := ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset;havoc class_interface_register_#res#1;havoc class_interface_register_#t~nondet440#1, class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset;class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset := class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset;assume -2147483648 <= class_interface_register_#t~nondet440#1 && class_interface_register_#t~nondet440#1 <= 2147483647;class_interface_register_#res#1 := class_interface_register_#t~nondet440#1;havoc class_interface_register_#t~nondet440#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,801 INFO L290 TraceCheckUtils]: 15: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} nonstatic_sysfs_init_#t~ret386#1 := class_interface_register_#res#1;assume { :end_inline_class_interface_register } true;assume -2147483648 <= nonstatic_sysfs_init_#t~ret386#1 && nonstatic_sysfs_init_#t~ret386#1 <= 2147483647;nonstatic_sysfs_init_~tmp~27#1 := nonstatic_sysfs_init_#t~ret386#1;havoc nonstatic_sysfs_init_#t~ret386#1;nonstatic_sysfs_init_#res#1 := nonstatic_sysfs_init_~tmp~27#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,802 INFO L290 TraceCheckUtils]: 16: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} main_#t~ret408#1 := nonstatic_sysfs_init_#res#1;assume { :end_inline_nonstatic_sysfs_init } true;assume -2147483648 <= main_#t~ret408#1 && main_#t~ret408#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret408#1;havoc main_#t~ret408#1; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,802 INFO L290 TraceCheckUtils]: 17: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_retval_2~0;~ldv_state_variable_0~0 := 3; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,803 INFO L290 TraceCheckUtils]: 18: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume { :begin_inline_ldv_check_final_state } true; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,803 INFO L290 TraceCheckUtils]: 19: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {38708#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:45,806 INFO L290 TraceCheckUtils]: 20: Hoare triple {38708#(= ~ldv_mutex_lock~0 1)} assume !(1 == ~ldv_mutex_lock~0); {38707#false} is VALID [2022-02-20 21:47:45,806 INFO L272 TraceCheckUtils]: 21: Hoare triple {38707#false} call ldv_error(); {38707#false} is VALID [2022-02-20 21:47:45,807 INFO L290 TraceCheckUtils]: 22: Hoare triple {38707#false} assume !false; {38707#false} is VALID [2022-02-20 21:47:45,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:45,808 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:45,808 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215144249] [2022-02-20 21:47:45,808 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1215144249] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:45,808 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:45,808 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:45,808 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793545237] [2022-02-20 21:47:45,809 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:45,809 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-02-20 21:47:45,809 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:45,810 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:45,831 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:45,831 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:45,831 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:45,832 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:45,832 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:45,832 INFO L87 Difference]: Start difference. First operand 2733 states and 3936 transitions. Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:47,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:47,238 INFO L93 Difference]: Finished difference Result 2735 states and 3937 transitions. [2022-02-20 21:47:47,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:47,238 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-02-20 21:47:47,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:47,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:47,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1025 transitions. [2022-02-20 21:47:47,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:47,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1025 transitions. [2022-02-20 21:47:47,257 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1025 transitions. [2022-02-20 21:47:48,001 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1025 edges. 1025 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:48,309 INFO L225 Difference]: With dead ends: 2735 [2022-02-20 21:47:48,309 INFO L226 Difference]: Without dead ends: 2732 [2022-02-20 21:47:48,310 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:48,311 INFO L933 BasicCegarLoop]: 1021 mSDtfsCounter, 1002 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1002 SdHoareTripleChecker+Valid, 1021 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:48,311 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1002 Valid, 1021 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:48,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2732 states. [2022-02-20 21:47:48,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2732 to 2732. [2022-02-20 21:47:48,385 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:48,390 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2732 states. Second operand has 2732 states, 2109 states have (on average 1.4329065908013277) internal successors, (3022), 2120 states have internal predecessors, (3022), 458 states have call successors, (458), 165 states have call predecessors, (458), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:48,394 INFO L74 IsIncluded]: Start isIncluded. First operand 2732 states. Second operand has 2732 states, 2109 states have (on average 1.4329065908013277) internal successors, (3022), 2120 states have internal predecessors, (3022), 458 states have call successors, (458), 165 states have call predecessors, (458), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:48,398 INFO L87 Difference]: Start difference. First operand 2732 states. Second operand has 2732 states, 2109 states have (on average 1.4329065908013277) internal successors, (3022), 2120 states have internal predecessors, (3022), 458 states have call successors, (458), 165 states have call predecessors, (458), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:48,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:48,648 INFO L93 Difference]: Finished difference Result 2732 states and 3934 transitions. [2022-02-20 21:47:48,648 INFO L276 IsEmpty]: Start isEmpty. Operand 2732 states and 3934 transitions. [2022-02-20 21:47:48,653 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:48,653 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:48,658 INFO L74 IsIncluded]: Start isIncluded. First operand has 2732 states, 2109 states have (on average 1.4329065908013277) internal successors, (3022), 2120 states have internal predecessors, (3022), 458 states have call successors, (458), 165 states have call predecessors, (458), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) Second operand 2732 states. [2022-02-20 21:47:48,661 INFO L87 Difference]: Start difference. First operand has 2732 states, 2109 states have (on average 1.4329065908013277) internal successors, (3022), 2120 states have internal predecessors, (3022), 458 states have call successors, (458), 165 states have call predecessors, (458), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) Second operand 2732 states. [2022-02-20 21:47:48,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:48,970 INFO L93 Difference]: Finished difference Result 2732 states and 3934 transitions. [2022-02-20 21:47:48,971 INFO L276 IsEmpty]: Start isEmpty. Operand 2732 states and 3934 transitions. [2022-02-20 21:47:48,977 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:48,978 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:48,978 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:48,978 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:48,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2732 states, 2109 states have (on average 1.4329065908013277) internal successors, (3022), 2120 states have internal predecessors, (3022), 458 states have call successors, (458), 165 states have call predecessors, (458), 164 states have return successors, (454), 454 states have call predecessors, (454), 454 states have call successors, (454) [2022-02-20 21:47:49,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2732 states to 2732 states and 3934 transitions. [2022-02-20 21:47:49,409 INFO L78 Accepts]: Start accepts. Automaton has 2732 states and 3934 transitions. Word has length 23 [2022-02-20 21:47:49,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:49,411 INFO L470 AbstractCegarLoop]: Abstraction has 2732 states and 3934 transitions. [2022-02-20 21:47:49,411 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:49,411 INFO L276 IsEmpty]: Start isEmpty. Operand 2732 states and 3934 transitions. [2022-02-20 21:47:49,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-02-20 21:47:49,412 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:49,413 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:49,413 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 21:47:49,413 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:49,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:49,415 INFO L85 PathProgramCache]: Analyzing trace with hash -666251475, now seen corresponding path program 1 times [2022-02-20 21:47:49,415 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:49,415 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [994522393] [2022-02-20 21:47:49,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:49,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:49,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:49,481 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:47:49,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:49,492 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:47:49,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:49,499 INFO L290 TraceCheckUtils]: 0: Hoare triple {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;assume -2147483648 <= #t~nondet4#1 && #t~nondet4#1 <= 2147483647; {51646#true} is VALID [2022-02-20 21:47:49,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {51646#true} assume !(0 != #t~nondet4#1);havoc #t~nondet4#1;#res#1.base, #res#1.offset := 0, 0; {51646#true} is VALID [2022-02-20 21:47:49,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {51646#true} assume true; {51646#true} is VALID [2022-02-20 21:47:49,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51646#true} {51646#true} #1898#return; {51646#true} is VALID [2022-02-20 21:47:49,501 INFO L290 TraceCheckUtils]: 0: Hoare triple {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {51646#true} is VALID [2022-02-20 21:47:49,503 INFO L272 TraceCheckUtils]: 1: Hoare triple {51646#true} call #t~ret441.base, #t~ret441.offset := ldv_malloc(0); {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:49,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;assume -2147483648 <= #t~nondet4#1 && #t~nondet4#1 <= 2147483647; {51646#true} is VALID [2022-02-20 21:47:49,510 INFO L290 TraceCheckUtils]: 3: Hoare triple {51646#true} assume !(0 != #t~nondet4#1);havoc #t~nondet4#1;#res#1.base, #res#1.offset := 0, 0; {51646#true} is VALID [2022-02-20 21:47:49,511 INFO L290 TraceCheckUtils]: 4: Hoare triple {51646#true} assume true; {51646#true} is VALID [2022-02-20 21:47:49,512 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {51646#true} {51646#true} #1898#return; {51646#true} is VALID [2022-02-20 21:47:49,513 INFO L290 TraceCheckUtils]: 6: Hoare triple {51646#true} #res.base, #res.offset := #t~ret441.base, #t~ret441.offset;havoc #t~ret441.base, #t~ret441.offset; {51646#true} is VALID [2022-02-20 21:47:49,513 INFO L290 TraceCheckUtils]: 7: Hoare triple {51646#true} assume true; {51646#true} is VALID [2022-02-20 21:47:49,513 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {51646#true} {51647#false} #1928#return; {51647#false} is VALID [2022-02-20 21:47:49,514 INFO L290 TraceCheckUtils]: 0: Hoare triple {51646#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {51646#true} is VALID [2022-02-20 21:47:49,515 INFO L290 TraceCheckUtils]: 1: Hoare triple {51646#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {51646#true} is VALID [2022-02-20 21:47:49,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {51646#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {51648#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:47:49,516 INFO L290 TraceCheckUtils]: 3: Hoare triple {51648#(= ~ldv_state_variable_2~0 0)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {51648#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:47:49,516 INFO L290 TraceCheckUtils]: 4: Hoare triple {51648#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {51648#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:47:49,517 INFO L290 TraceCheckUtils]: 5: Hoare triple {51648#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 2 == main_~tmp~28#1; {51648#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:47:49,517 INFO L290 TraceCheckUtils]: 6: Hoare triple {51648#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 3 == main_~tmp~28#1; {51648#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:47:49,517 INFO L290 TraceCheckUtils]: 7: Hoare triple {51648#(= ~ldv_state_variable_2~0 0)} assume main_#t~switch388#1; {51648#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 21:47:49,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {51648#(= ~ldv_state_variable_2~0 0)} assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= main_#t~nondet393#1 && main_#t~nondet393#1 <= 2147483647;main_~tmp___1~5#1 := main_#t~nondet393#1;havoc main_#t~nondet393#1;main_#t~switch394#1 := 0 == main_~tmp___1~5#1; {51647#false} is VALID [2022-02-20 21:47:49,518 INFO L290 TraceCheckUtils]: 9: Hoare triple {51647#false} assume !main_#t~switch394#1;main_#t~switch394#1 := main_#t~switch394#1 || 1 == main_~tmp___1~5#1; {51647#false} is VALID [2022-02-20 21:47:49,518 INFO L290 TraceCheckUtils]: 10: Hoare triple {51647#false} assume main_#t~switch394#1; {51647#false} is VALID [2022-02-20 21:47:49,518 INFO L290 TraceCheckUtils]: 11: Hoare triple {51647#false} assume 1 == ~ldv_state_variable_2~0; {51647#false} is VALID [2022-02-20 21:47:49,518 INFO L272 TraceCheckUtils]: 12: Hoare triple {51647#false} call main_#t~ret396#1 := show_mem_db(~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset, ~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset, ~ldvarg13~0.base, ~ldvarg13~0.offset); {51647#false} is VALID [2022-02-20 21:47:49,519 INFO L290 TraceCheckUtils]: 13: Hoare triple {51647#false} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~attr#1.base, ~attr#1.offset := #in~attr#1.base, #in~attr#1.offset;~buf#1.base, ~buf#1.offset := #in~buf#1.base, #in~buf#1.offset;havoc ~s~2#1.base, ~s~2#1.offset;havoc ~tmp~23#1.base, ~tmp~23#1.offset;havoc ~data~8#1.base, ~data~8#1.offset;havoc ~p~4#1.base, ~p~4#1.offset;havoc ~ret~13#1;havoc ~tmp___0~10#1;havoc ~tmp___1~3#1; {51647#false} is VALID [2022-02-20 21:47:49,519 INFO L272 TraceCheckUtils]: 14: Hoare triple {51647#false} call #t~ret358#1.base, #t~ret358#1.offset := dev_get_drvdata(~dev#1.base, ~dev#1.offset); {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:49,519 INFO L290 TraceCheckUtils]: 15: Hoare triple {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {51646#true} is VALID [2022-02-20 21:47:49,519 INFO L272 TraceCheckUtils]: 16: Hoare triple {51646#true} call #t~ret441.base, #t~ret441.offset := ldv_malloc(0); {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:49,520 INFO L290 TraceCheckUtils]: 17: Hoare triple {51658#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;assume -2147483648 <= #t~nondet4#1 && #t~nondet4#1 <= 2147483647; {51646#true} is VALID [2022-02-20 21:47:49,520 INFO L290 TraceCheckUtils]: 18: Hoare triple {51646#true} assume !(0 != #t~nondet4#1);havoc #t~nondet4#1;#res#1.base, #res#1.offset := 0, 0; {51646#true} is VALID [2022-02-20 21:47:49,520 INFO L290 TraceCheckUtils]: 19: Hoare triple {51646#true} assume true; {51646#true} is VALID [2022-02-20 21:47:49,520 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {51646#true} {51646#true} #1898#return; {51646#true} is VALID [2022-02-20 21:47:49,520 INFO L290 TraceCheckUtils]: 21: Hoare triple {51646#true} #res.base, #res.offset := #t~ret441.base, #t~ret441.offset;havoc #t~ret441.base, #t~ret441.offset; {51646#true} is VALID [2022-02-20 21:47:49,520 INFO L290 TraceCheckUtils]: 22: Hoare triple {51646#true} assume true; {51646#true} is VALID [2022-02-20 21:47:49,521 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {51646#true} {51647#false} #1928#return; {51647#false} is VALID [2022-02-20 21:47:49,521 INFO L290 TraceCheckUtils]: 24: Hoare triple {51647#false} ~tmp~23#1.base, ~tmp~23#1.offset := #t~ret358#1.base, #t~ret358#1.offset;havoc #t~ret358#1.base, #t~ret358#1.offset;~s~2#1.base, ~s~2#1.offset := ~tmp~23#1.base, ~tmp~23#1.offset;~ret~13#1 := 0;assume { :begin_inline_ldv_mutex_lock_28 } true;ldv_mutex_lock_28_#in~ldv_func_arg1#1.base, ldv_mutex_lock_28_#in~ldv_func_arg1#1.offset := ~s~2#1.base, 668 + ~s~2#1.offset;havoc ldv_mutex_lock_28_~ldv_func_arg1#1.base, ldv_mutex_lock_28_~ldv_func_arg1#1.offset;ldv_mutex_lock_28_~ldv_func_arg1#1.base, ldv_mutex_lock_28_~ldv_func_arg1#1.offset := ldv_mutex_lock_28_#in~ldv_func_arg1#1.base, ldv_mutex_lock_28_#in~ldv_func_arg1#1.offset; {51647#false} is VALID [2022-02-20 21:47:49,521 INFO L272 TraceCheckUtils]: 25: Hoare triple {51647#false} call ldv_mutex_lock_ops_mutex_of_pcmcia_socket(ldv_mutex_lock_28_~ldv_func_arg1#1.base, ldv_mutex_lock_28_~ldv_func_arg1#1.offset); {51647#false} is VALID [2022-02-20 21:47:49,521 INFO L290 TraceCheckUtils]: 26: Hoare triple {51647#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {51647#false} is VALID [2022-02-20 21:47:49,521 INFO L290 TraceCheckUtils]: 27: Hoare triple {51647#false} assume !(1 == ~ldv_mutex_ops_mutex_of_pcmcia_socket~0); {51647#false} is VALID [2022-02-20 21:47:49,522 INFO L272 TraceCheckUtils]: 28: Hoare triple {51647#false} call ldv_error(); {51647#false} is VALID [2022-02-20 21:47:49,522 INFO L290 TraceCheckUtils]: 29: Hoare triple {51647#false} assume !false; {51647#false} is VALID [2022-02-20 21:47:49,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:49,522 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:49,522 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [994522393] [2022-02-20 21:47:49,522 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [994522393] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:49,523 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:49,523 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-02-20 21:47:49,523 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569251498] [2022-02-20 21:47:49,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:49,524 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 30 [2022-02-20 21:47:49,525 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:49,526 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:49,551 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:49,551 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-02-20 21:47:49,551 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:49,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-02-20 21:47:49,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-02-20 21:47:49,552 INFO L87 Difference]: Start difference. First operand 2732 states and 3934 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:57,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:57,403 INFO L93 Difference]: Finished difference Result 9542 states and 13944 transitions. [2022-02-20 21:47:57,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-02-20 21:47:57,403 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 30 [2022-02-20 21:47:57,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:57,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:57,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3600 transitions. [2022-02-20 21:47:57,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:47:57,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 3600 transitions. [2022-02-20 21:47:57,471 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 3600 transitions. [2022-02-20 21:48:00,087 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 3600 edges. 3600 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:48:02,161 INFO L225 Difference]: With dead ends: 9542 [2022-02-20 21:48:02,162 INFO L226 Difference]: Without dead ends: 6813 [2022-02-20 21:48:02,169 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:48:02,170 INFO L933 BasicCegarLoop]: 1293 mSDtfsCounter, 1730 mSDsluCounter, 1560 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 396 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1813 SdHoareTripleChecker+Valid, 2853 SdHoareTripleChecker+Invalid, 945 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 396 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:48:02,170 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1813 Valid, 2853 Invalid, 945 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [396 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-02-20 21:48:02,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6813 states. [2022-02-20 21:48:02,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6813 to 5344. [2022-02-20 21:48:02,354 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:48:02,364 INFO L82 GeneralOperation]: Start isEquivalent. First operand 6813 states. Second operand has 5344 states, 4131 states have (on average 1.431130476882111) internal successors, (5912), 4150 states have internal predecessors, (5912), 884 states have call successors, (884), 329 states have call predecessors, (884), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:02,373 INFO L74 IsIncluded]: Start isIncluded. First operand 6813 states. Second operand has 5344 states, 4131 states have (on average 1.431130476882111) internal successors, (5912), 4150 states have internal predecessors, (5912), 884 states have call successors, (884), 329 states have call predecessors, (884), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:02,382 INFO L87 Difference]: Start difference. First operand 6813 states. Second operand has 5344 states, 4131 states have (on average 1.431130476882111) internal successors, (5912), 4150 states have internal predecessors, (5912), 884 states have call successors, (884), 329 states have call predecessors, (884), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:03,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:48:03,814 INFO L93 Difference]: Finished difference Result 6813 states and 10009 transitions. [2022-02-20 21:48:03,814 INFO L276 IsEmpty]: Start isEmpty. Operand 6813 states and 10009 transitions. [2022-02-20 21:48:03,829 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:48:03,829 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:48:03,838 INFO L74 IsIncluded]: Start isIncluded. First operand has 5344 states, 4131 states have (on average 1.431130476882111) internal successors, (5912), 4150 states have internal predecessors, (5912), 884 states have call successors, (884), 329 states have call predecessors, (884), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) Second operand 6813 states. [2022-02-20 21:48:03,845 INFO L87 Difference]: Start difference. First operand has 5344 states, 4131 states have (on average 1.431130476882111) internal successors, (5912), 4150 states have internal predecessors, (5912), 884 states have call successors, (884), 329 states have call predecessors, (884), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) Second operand 6813 states. [2022-02-20 21:48:05,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:48:05,486 INFO L93 Difference]: Finished difference Result 6813 states and 10009 transitions. [2022-02-20 21:48:05,486 INFO L276 IsEmpty]: Start isEmpty. Operand 6813 states and 10009 transitions. [2022-02-20 21:48:05,498 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:48:05,499 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:48:05,499 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:48:05,499 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:48:05,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5344 states, 4131 states have (on average 1.431130476882111) internal successors, (5912), 4150 states have internal predecessors, (5912), 884 states have call successors, (884), 329 states have call predecessors, (884), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:06,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5344 states to 5344 states and 7676 transitions. [2022-02-20 21:48:06,720 INFO L78 Accepts]: Start accepts. Automaton has 5344 states and 7676 transitions. Word has length 30 [2022-02-20 21:48:06,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:48:06,721 INFO L470 AbstractCegarLoop]: Abstraction has 5344 states and 7676 transitions. [2022-02-20 21:48:06,721 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-02-20 21:48:06,721 INFO L276 IsEmpty]: Start isEmpty. Operand 5344 states and 7676 transitions. [2022-02-20 21:48:06,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-02-20 21:48:06,722 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:48:06,722 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:48:06,722 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 21:48:06,722 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:48:06,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:48:06,723 INFO L85 PathProgramCache]: Analyzing trace with hash 1972533264, now seen corresponding path program 1 times [2022-02-20 21:48:06,723 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:48:06,723 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175193024] [2022-02-20 21:48:06,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:48:06,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:48:06,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:48:06,808 INFO L290 TraceCheckUtils]: 0: Hoare triple {85638#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {85638#true} is VALID [2022-02-20 21:48:06,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {85638#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,810 INFO L290 TraceCheckUtils]: 2: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,810 INFO L290 TraceCheckUtils]: 3: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,811 INFO L290 TraceCheckUtils]: 4: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,811 INFO L290 TraceCheckUtils]: 5: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 2 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,812 INFO L290 TraceCheckUtils]: 6: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 3 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,812 INFO L290 TraceCheckUtils]: 7: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 4 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 5 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,813 INFO L290 TraceCheckUtils]: 9: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 6 == main_~tmp~28#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,814 INFO L290 TraceCheckUtils]: 10: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume main_#t~switch388#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,814 INFO L290 TraceCheckUtils]: 11: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet406#1 && main_#t~nondet406#1 <= 2147483647;main_~tmp___4~2#1 := main_#t~nondet406#1;havoc main_#t~nondet406#1;main_#t~switch407#1 := 0 == main_~tmp___4~2#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,815 INFO L290 TraceCheckUtils]: 12: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch407#1;main_#t~switch407#1 := main_#t~switch407#1 || 1 == main_~tmp___4~2#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,815 INFO L290 TraceCheckUtils]: 13: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume main_#t~switch407#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,816 INFO L290 TraceCheckUtils]: 14: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_nonstatic_sysfs_init } true;havoc nonstatic_sysfs_init_#res#1;havoc nonstatic_sysfs_init_#t~ret386#1, nonstatic_sysfs_init_~tmp~27#1;havoc nonstatic_sysfs_init_~tmp~27#1;assume { :begin_inline_class_interface_register } true;class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset := ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset;havoc class_interface_register_#res#1;havoc class_interface_register_#t~nondet440#1, class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset;class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset := class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset;assume -2147483648 <= class_interface_register_#t~nondet440#1 && class_interface_register_#t~nondet440#1 <= 2147483647;class_interface_register_#res#1 := class_interface_register_#t~nondet440#1;havoc class_interface_register_#t~nondet440#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,816 INFO L290 TraceCheckUtils]: 15: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} nonstatic_sysfs_init_#t~ret386#1 := class_interface_register_#res#1;assume { :end_inline_class_interface_register } true;assume -2147483648 <= nonstatic_sysfs_init_#t~ret386#1 && nonstatic_sysfs_init_#t~ret386#1 <= 2147483647;nonstatic_sysfs_init_~tmp~27#1 := nonstatic_sysfs_init_#t~ret386#1;havoc nonstatic_sysfs_init_#t~ret386#1;nonstatic_sysfs_init_#res#1 := nonstatic_sysfs_init_~tmp~27#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,816 INFO L290 TraceCheckUtils]: 16: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} main_#t~ret408#1 := nonstatic_sysfs_init_#res#1;assume { :end_inline_nonstatic_sysfs_init } true;assume -2147483648 <= main_#t~ret408#1 && main_#t~ret408#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret408#1;havoc main_#t~ret408#1; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,817 INFO L290 TraceCheckUtils]: 17: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != ~ldv_retval_2~0;~ldv_state_variable_0~0 := 3; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,817 INFO L290 TraceCheckUtils]: 18: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume { :begin_inline_ldv_check_final_state } true; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,818 INFO L290 TraceCheckUtils]: 19: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_lock~0; {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:48:06,818 INFO L290 TraceCheckUtils]: 21: Hoare triple {85640#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !(1 == ~ldv_mutex_mutex_of_device~0); {85639#false} is VALID [2022-02-20 21:48:06,819 INFO L272 TraceCheckUtils]: 22: Hoare triple {85639#false} call ldv_error(); {85639#false} is VALID [2022-02-20 21:48:06,819 INFO L290 TraceCheckUtils]: 23: Hoare triple {85639#false} assume !false; {85639#false} is VALID [2022-02-20 21:48:06,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:48:06,819 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:48:06,820 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [175193024] [2022-02-20 21:48:06,820 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [175193024] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:48:06,820 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:48:06,820 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:48:06,820 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381908118] [2022-02-20 21:48:06,820 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:48:06,821 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-02-20 21:48:06,821 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:48:06,821 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:48:06,843 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:48:06,843 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:48:06,844 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:48:06,844 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:48:06,845 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:48:06,845 INFO L87 Difference]: Start difference. First operand 5344 states and 7676 transitions. Second operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:48:09,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:48:09,006 INFO L93 Difference]: Finished difference Result 5346 states and 7677 transitions. [2022-02-20 21:48:09,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:48:09,007 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-02-20 21:48:09,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:48:09,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:48:09,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1023 transitions. [2022-02-20 21:48:09,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:48:09,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1023 transitions. [2022-02-20 21:48:09,023 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 1023 transitions. [2022-02-20 21:48:09,753 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1023 edges. 1023 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:48:10,942 INFO L225 Difference]: With dead ends: 5346 [2022-02-20 21:48:10,942 INFO L226 Difference]: Without dead ends: 5343 [2022-02-20 21:48:10,943 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:48:10,944 INFO L933 BasicCegarLoop]: 1019 mSDtfsCounter, 999 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 999 SdHoareTripleChecker+Valid, 1019 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:48:10,944 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [999 Valid, 1019 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:48:10,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5343 states. [2022-02-20 21:48:11,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5343 to 5343. [2022-02-20 21:48:11,106 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:48:11,114 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5343 states. Second operand has 5343 states, 4131 states have (on average 1.430888404744614) internal successors, (5911), 4149 states have internal predecessors, (5911), 883 states have call successors, (883), 329 states have call predecessors, (883), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:11,121 INFO L74 IsIncluded]: Start isIncluded. First operand 5343 states. Second operand has 5343 states, 4131 states have (on average 1.430888404744614) internal successors, (5911), 4149 states have internal predecessors, (5911), 883 states have call successors, (883), 329 states have call predecessors, (883), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:11,128 INFO L87 Difference]: Start difference. First operand 5343 states. Second operand has 5343 states, 4131 states have (on average 1.430888404744614) internal successors, (5911), 4149 states have internal predecessors, (5911), 883 states have call successors, (883), 329 states have call predecessors, (883), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:11,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:48:11,911 INFO L93 Difference]: Finished difference Result 5343 states and 7674 transitions. [2022-02-20 21:48:11,911 INFO L276 IsEmpty]: Start isEmpty. Operand 5343 states and 7674 transitions. [2022-02-20 21:48:11,918 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:48:11,918 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:48:11,925 INFO L74 IsIncluded]: Start isIncluded. First operand has 5343 states, 4131 states have (on average 1.430888404744614) internal successors, (5911), 4149 states have internal predecessors, (5911), 883 states have call successors, (883), 329 states have call predecessors, (883), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) Second operand 5343 states. [2022-02-20 21:48:11,930 INFO L87 Difference]: Start difference. First operand has 5343 states, 4131 states have (on average 1.430888404744614) internal successors, (5911), 4149 states have internal predecessors, (5911), 883 states have call successors, (883), 329 states have call predecessors, (883), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) Second operand 5343 states. [2022-02-20 21:48:12,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:48:12,751 INFO L93 Difference]: Finished difference Result 5343 states and 7674 transitions. [2022-02-20 21:48:12,751 INFO L276 IsEmpty]: Start isEmpty. Operand 5343 states and 7674 transitions. [2022-02-20 21:48:12,758 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:48:12,758 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:48:12,758 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:48:12,758 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:48:12,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5343 states, 4131 states have (on average 1.430888404744614) internal successors, (5911), 4149 states have internal predecessors, (5911), 883 states have call successors, (883), 329 states have call predecessors, (883), 328 states have return successors, (880), 880 states have call predecessors, (880), 880 states have call successors, (880) [2022-02-20 21:48:13,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5343 states to 5343 states and 7674 transitions. [2022-02-20 21:48:13,911 INFO L78 Accepts]: Start accepts. Automaton has 5343 states and 7674 transitions. Word has length 24 [2022-02-20 21:48:13,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:48:13,912 INFO L470 AbstractCegarLoop]: Abstraction has 5343 states and 7674 transitions. [2022-02-20 21:48:13,912 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:48:13,912 INFO L276 IsEmpty]: Start isEmpty. Operand 5343 states and 7674 transitions. [2022-02-20 21:48:13,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-02-20 21:48:13,913 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:48:13,913 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:48:13,913 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-02-20 21:48:13,913 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:48:13,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:48:13,914 INFO L85 PathProgramCache]: Analyzing trace with hash 1018657161, now seen corresponding path program 1 times [2022-02-20 21:48:13,914 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:48:13,914 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730741127] [2022-02-20 21:48:13,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:48:13,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:48:13,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:48:13,967 INFO L290 TraceCheckUtils]: 0: Hoare triple {110924#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(74, 2);call #Ultimate.allocInit(36, 3);call #Ultimate.allocInit(36, 4);call #Ultimate.allocInit(12, 5);call #Ultimate.allocInit(9, 6);call #Ultimate.allocInit(221, 7);call #Ultimate.allocInit(44, 8);call #Ultimate.allocInit(44, 9);call #Ultimate.allocInit(16, 10);call #Ultimate.allocInit(16, 11);call #Ultimate.allocInit(12, 12);call #Ultimate.allocInit(16, 13);call #Ultimate.allocInit(221, 14);call #Ultimate.allocInit(49, 15);call #Ultimate.allocInit(49, 16);call #Ultimate.allocInit(2, 17);call write~init~int(14, 17, 0, 1);call write~init~int(0, 17, 1, 1);call #Ultimate.allocInit(34, 18);call #Ultimate.allocInit(11, 19);call #Ultimate.allocInit(15, 20);call #Ultimate.allocInit(2, 21);call write~init~int(10, 21, 0, 1);call write~init~int(0, 21, 1, 1);call #Ultimate.allocInit(9, 22);call #Ultimate.allocInit(2, 23);call write~init~int(14, 23, 0, 1);call write~init~int(0, 23, 1, 1);call #Ultimate.allocInit(39, 24);call #Ultimate.allocInit(2, 25);call write~init~int(14, 25, 0, 1);call write~init~int(0, 25, 1, 1);call #Ultimate.allocInit(39, 26);call #Ultimate.allocInit(19, 27);call #Ultimate.allocInit(23, 28);call #Ultimate.allocInit(19, 29);call #Ultimate.allocInit(19, 30);call #Ultimate.allocInit(24, 31);~pccard_static_ops~0.validate_mem.base, ~pccard_static_ops~0.validate_mem.offset := 0, 0;~pccard_static_ops~0.find_io.base, ~pccard_static_ops~0.find_io.offset := #funAddr~static_find_io.base, #funAddr~static_find_io.offset;~pccard_static_ops~0.find_mem.base, ~pccard_static_ops~0.find_mem.offset := 0, 0;~pccard_static_ops~0.init.base, ~pccard_static_ops~0.init.offset := #funAddr~static_init.base, #funAddr~static_init.offset;~pccard_static_ops~0.exit.base, ~pccard_static_ops~0.exit.offset := 0, 0;~ldvarg11~0 := 0;~ldvarg3~0 := 0;~ldvarg12~0 := 0;~ldvarg8~0.base, ~ldvarg8~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldvarg10~0.base, ~ldvarg10~0.offset := 0, 0;~ldvarg9~0 := 0;~pccard_static_ops_group0~0.base, ~pccard_static_ops_group0~0.offset := 0, 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~ldvarg4~0 := 0;~ldvarg2~0.base, ~ldvarg2~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_4~0 := 0;~ldv_state_variable_6~0 := 0;~ldv_state_variable_0~0 := 0;~ldv_state_variable_5~0 := 0;~probe_mem~0 := 1;~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset := 32, 0;call #Ultimate.allocInit(40, 32);call write~init~$Pointer$(#funAddr~pcmcia_nonstatic_validate_mem.base, #funAddr~pcmcia_nonstatic_validate_mem.offset, ~#pccard_nonstatic_ops~0.base, ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_io.base, #funAddr~nonstatic_find_io.offset, ~#pccard_nonstatic_ops~0.base, 8 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_find_mem_region.base, #funAddr~nonstatic_find_mem_region.offset, ~#pccard_nonstatic_ops~0.base, 16 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_init.base, #funAddr~nonstatic_init.offset, ~#pccard_nonstatic_ops~0.base, 24 + ~#pccard_nonstatic_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~nonstatic_release_resource_db.base, #funAddr~nonstatic_release_resource_db.offset, ~#pccard_nonstatic_ops~0.base, 32 + ~#pccard_nonstatic_ops~0.offset, 8);~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset := 33, 0;call #Ultimate.allocInit(43, 33);call write~init~$Pointer$(28, 0, ~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_io~0.base, 8 + ~#dev_attr_available_resources_io~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 10 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_io~0.base, 11 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 19 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 20 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 21 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 22 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 23 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 24 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 25 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_io~0.base, 26 + ~#dev_attr_available_resources_io~0.offset, 1);call write~init~$Pointer$(#funAddr~show_io_db.base, #funAddr~show_io_db.offset, ~#dev_attr_available_resources_io~0.base, 27 + ~#dev_attr_available_resources_io~0.offset, 8);call write~init~$Pointer$(#funAddr~store_io_db.base, #funAddr~store_io_db.offset, ~#dev_attr_available_resources_io~0.base, 35 + ~#dev_attr_available_resources_io~0.offset, 8);~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset := 34, 0;call #Ultimate.allocInit(43, 34);call write~init~$Pointer$(31, 0, ~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(384, ~#dev_attr_available_resources_mem~0.base, 8 + ~#dev_attr_available_resources_mem~0.offset, 2);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 10 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(0, 0, ~#dev_attr_available_resources_mem~0.base, 11 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 19 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 20 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 21 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 22 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 23 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 24 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 25 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~int(0, ~#dev_attr_available_resources_mem~0.base, 26 + ~#dev_attr_available_resources_mem~0.offset, 1);call write~init~$Pointer$(#funAddr~show_mem_db.base, #funAddr~show_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 27 + ~#dev_attr_available_resources_mem~0.offset, 8);call write~init~$Pointer$(#funAddr~store_mem_db.base, #funAddr~store_mem_db.offset, ~#dev_attr_available_resources_mem~0.base, 35 + ~#dev_attr_available_resources_mem~0.offset, 8);~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset := 35, 0;call #Ultimate.allocInit(24, 35);call write~init~$Pointer$(~#dev_attr_available_resources_io~0.base, ~#dev_attr_available_resources_io~0.offset, ~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#dev_attr_available_resources_mem~0.base, ~#dev_attr_available_resources_mem~0.offset, ~#pccard_rsrc_attributes~0.base, 8 + ~#pccard_rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_attributes~0.base, 16 + ~#pccard_rsrc_attributes~0.offset, 8);~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset := 36, 0;call #Ultimate.allocInit(24, 36);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(0, 0, ~#rsrc_attributes~0.base, 8 + ~#rsrc_attributes~0.offset, 8);call write~init~$Pointer$(~#pccard_rsrc_attributes~0.base, ~#pccard_rsrc_attributes~0.offset, ~#rsrc_attributes~0.base, 16 + ~#rsrc_attributes~0.offset, 8);~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset := 37, 0;call #Ultimate.allocInit(40, 37);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pccard_rsrc_interface~0.base, 8 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(~#pcmcia_socket_class~0.base, ~#pcmcia_socket_class~0.offset, ~#pccard_rsrc_interface~0.base, 16 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_add_rsrc.base, #funAddr~pccard_sysfs_add_rsrc.offset, ~#pccard_rsrc_interface~0.base, 24 + ~#pccard_rsrc_interface~0.offset, 8);call write~init~$Pointer$(#funAddr~pccard_sysfs_remove_rsrc.base, #funAddr~pccard_sysfs_remove_rsrc.offset, ~#pccard_rsrc_interface~0.base, 32 + ~#pccard_rsrc_interface~0.offset, 8);~ldvarg18~0.base, ~ldvarg18~0.offset := 0, 0;~ldvarg32~0 := 0;~ldvarg7~0.base, ~ldvarg7~0.offset := 0, 0;~ldvarg23~0 := 0;~ldv_retval_2~0 := 0;~ldvarg29~0 := 0;~ldvarg24~0 := 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg33~0 := 0;~ldvarg6~0 := 0;~ldvarg16~0.base, ~ldvarg16~0.offset := 0, 0;~ldvarg14~0 := 0;~dev_attr_available_resources_io_group1~0.base, ~dev_attr_available_resources_io_group1~0.offset := 0, 0;~ldvarg28~0 := 0;~ldvarg20~0 := 0;~ldvarg31~0 := 0;~dev_attr_available_resources_mem_group0~0.base, ~dev_attr_available_resources_mem_group0~0.offset := 0, 0;~ldvarg13~0.base, ~ldvarg13~0.offset := 0, 0;~pccard_rsrc_interface_group1~0.base, ~pccard_rsrc_interface_group1~0.offset := 0, 0;~dev_attr_available_resources_mem_group1~0.base, ~dev_attr_available_resources_mem_group1~0.offset := 0, 0;~ldvarg26~0 := 0;~ldvarg27~0.base, ~ldvarg27~0.offset := 0, 0;~dev_attr_available_resources_io_group0~0.base, ~dev_attr_available_resources_io_group0~0.offset := 0, 0;~ldvarg15~0.base, ~ldvarg15~0.offset := 0, 0;~ldvarg30~0 := 0;~ldvarg21~0 := 0;~pccard_nonstatic_ops_group0~0.base, ~pccard_nonstatic_ops_group0~0.offset := 0, 0;~ldvarg17~0 := 0;~ldvarg25~0.base, ~ldvarg25~0.offset := 0, 0;~ldvarg22~0 := 0;~pccard_rsrc_interface_group0~0.base, ~pccard_rsrc_interface_group0~0.offset := 0, 0;~ldvarg19~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mutex_of_device~0 := 0;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 0; {110924#true} is VALID [2022-02-20 21:48:13,968 INFO L290 TraceCheckUtils]: 1: Hoare triple {110924#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet387#1, main_#t~switch388#1, main_#t~nondet389#1, main_#t~switch390#1, main_#t~ret391#1, main_#t~ret392#1, main_#t~nondet393#1, main_#t~switch394#1, main_#t~ret395#1, main_#t~ret396#1, main_#t~nondet397#1, main_#t~switch398#1, main_#t~ret399#1, main_#t~nondet400#1, main_#t~switch401#1, main_#t~ret402#1, main_#t~ret403#1, main_#t~ret404#1.base, main_#t~ret404#1.offset, main_#t~ret405#1, main_#t~nondet406#1, main_#t~switch407#1, main_#t~ret408#1, main_#t~nondet409#1, main_#t~switch410#1, main_#t~ret411#1, main_#t~ret412#1, main_#t~ret413#1.base, main_#t~ret413#1.offset, main_#t~ret414#1, main_~tmp~28#1, main_~tmp___0~13#1, main_~tmp___1~5#1, main_~tmp___2~3#1, main_~tmp___3~2#1, main_~tmp___4~2#1, main_~tmp___5~0#1;havoc main_~tmp~28#1;havoc main_~tmp___0~13#1;havoc main_~tmp___1~5#1;havoc main_~tmp___2~3#1;havoc main_~tmp___3~2#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mutex_of_device~0 := 1;~ldv_mutex_ops_mutex_of_pcmcia_socket~0 := 1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,968 INFO L290 TraceCheckUtils]: 2: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_6~0 := 0;~ldv_state_variable_3~0 := 0;~ldv_state_variable_7~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_4~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_5~0 := 0; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,968 INFO L290 TraceCheckUtils]: 3: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume -2147483648 <= main_#t~nondet387#1 && main_#t~nondet387#1 <= 2147483647;main_~tmp~28#1 := main_#t~nondet387#1;havoc main_#t~nondet387#1;main_#t~switch388#1 := 0 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,969 INFO L290 TraceCheckUtils]: 4: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 1 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,969 INFO L290 TraceCheckUtils]: 5: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 2 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,969 INFO L290 TraceCheckUtils]: 6: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 3 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,970 INFO L290 TraceCheckUtils]: 7: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 4 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,970 INFO L290 TraceCheckUtils]: 8: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 5 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,971 INFO L290 TraceCheckUtils]: 9: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch388#1;main_#t~switch388#1 := main_#t~switch388#1 || 6 == main_~tmp~28#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,971 INFO L290 TraceCheckUtils]: 10: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume main_#t~switch388#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,971 INFO L290 TraceCheckUtils]: 11: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet406#1 && main_#t~nondet406#1 <= 2147483647;main_~tmp___4~2#1 := main_#t~nondet406#1;havoc main_#t~nondet406#1;main_#t~switch407#1 := 0 == main_~tmp___4~2#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,972 INFO L290 TraceCheckUtils]: 12: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !main_#t~switch407#1;main_#t~switch407#1 := main_#t~switch407#1 || 1 == main_~tmp___4~2#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,972 INFO L290 TraceCheckUtils]: 13: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume main_#t~switch407#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,972 INFO L290 TraceCheckUtils]: 14: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_nonstatic_sysfs_init } true;havoc nonstatic_sysfs_init_#res#1;havoc nonstatic_sysfs_init_#t~ret386#1, nonstatic_sysfs_init_~tmp~27#1;havoc nonstatic_sysfs_init_~tmp~27#1;assume { :begin_inline_class_interface_register } true;class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset := ~#pccard_rsrc_interface~0.base, ~#pccard_rsrc_interface~0.offset;havoc class_interface_register_#res#1;havoc class_interface_register_#t~nondet440#1, class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset;class_interface_register_~arg0#1.base, class_interface_register_~arg0#1.offset := class_interface_register_#in~arg0#1.base, class_interface_register_#in~arg0#1.offset;assume -2147483648 <= class_interface_register_#t~nondet440#1 && class_interface_register_#t~nondet440#1 <= 2147483647;class_interface_register_#res#1 := class_interface_register_#t~nondet440#1;havoc class_interface_register_#t~nondet440#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,973 INFO L290 TraceCheckUtils]: 15: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} nonstatic_sysfs_init_#t~ret386#1 := class_interface_register_#res#1;assume { :end_inline_class_interface_register } true;assume -2147483648 <= nonstatic_sysfs_init_#t~ret386#1 && nonstatic_sysfs_init_#t~ret386#1 <= 2147483647;nonstatic_sysfs_init_~tmp~27#1 := nonstatic_sysfs_init_#t~ret386#1;havoc nonstatic_sysfs_init_#t~ret386#1;nonstatic_sysfs_init_#res#1 := nonstatic_sysfs_init_~tmp~27#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,973 INFO L290 TraceCheckUtils]: 16: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} main_#t~ret408#1 := nonstatic_sysfs_init_#res#1;assume { :end_inline_nonstatic_sysfs_init } true;assume -2147483648 <= main_#t~ret408#1 && main_#t~ret408#1 <= 2147483647;~ldv_retval_2~0 := main_#t~ret408#1;havoc main_#t~ret408#1; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,974 INFO L290 TraceCheckUtils]: 17: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume 0 != ~ldv_retval_2~0;~ldv_state_variable_0~0 := 3; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,974 INFO L290 TraceCheckUtils]: 18: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume { :begin_inline_ldv_check_final_state } true; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,974 INFO L290 TraceCheckUtils]: 19: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,975 INFO L290 TraceCheckUtils]: 20: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume 1 == ~ldv_mutex_lock~0; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,975 INFO L290 TraceCheckUtils]: 21: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume 1 == ~ldv_mutex_mutex_of_device~0; {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} is VALID [2022-02-20 21:48:13,975 INFO L290 TraceCheckUtils]: 22: Hoare triple {110926#(= ~ldv_mutex_ops_mutex_of_pcmcia_socket~0 1)} assume !(1 == ~ldv_mutex_ops_mutex_of_pcmcia_socket~0); {110925#false} is VALID [2022-02-20 21:48:13,976 INFO L272 TraceCheckUtils]: 23: Hoare triple {110925#false} call ldv_error(); {110925#false} is VALID [2022-02-20 21:48:13,976 INFO L290 TraceCheckUtils]: 24: Hoare triple {110925#false} assume !false; {110925#false} is VALID [2022-02-20 21:48:13,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:48:13,976 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:48:13,976 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730741127] [2022-02-20 21:48:13,976 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730741127] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:48:13,977 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:48:13,977 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:48:13,977 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133564783] [2022-02-20 21:48:13,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:48:13,978 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-02-20 21:48:13,978 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:48:13,978 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:48:14,004 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:48:14,004 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:48:14,004 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:48:14,005 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:48:14,005 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:48:14,005 INFO L87 Difference]: Start difference. First operand 5343 states and 7674 transitions. Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)