./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash b7b42d40a01333bd7cf600d1931e5c326b61c631d3a1040aaad3e0a3658ee3cf --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:47:26,288 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:47:26,290 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:47:26,328 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:47:26,328 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:47:26,331 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:47:26,333 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:47:26,339 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:47:26,344 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:47:26,348 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:47:26,349 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:47:26,350 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:47:26,350 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:47:26,353 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:47:26,354 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:47:26,357 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:47:26,358 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:47:26,359 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:47:26,361 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:47:26,366 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:47:26,367 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:47:26,368 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:47:26,370 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:47:26,370 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:47:26,376 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:47:26,377 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:47:26,377 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:47:26,379 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:47:26,379 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:47:26,380 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:47:26,381 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:47:26,382 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:47:26,383 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:47:26,384 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:47:26,385 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:47:26,385 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:47:26,386 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:47:26,386 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:47:26,387 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:47:26,387 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:47:26,388 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:47:26,389 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:47:26,424 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:47:26,424 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:47:26,425 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:47:26,425 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:47:26,426 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:47:26,426 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:47:26,427 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:47:26,427 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:47:26,427 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:47:26,428 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:47:26,429 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:47:26,429 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:47:26,429 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:47:26,429 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:47:26,429 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:47:26,430 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:47:26,430 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:47:26,430 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:47:26,430 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:47:26,431 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:47:26,431 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:47:26,431 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:47:26,431 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:47:26,432 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:47:26,432 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:47:26,432 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:47:26,432 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:47:26,433 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:47:26,434 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:47:26,434 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:47:26,434 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b7b42d40a01333bd7cf600d1931e5c326b61c631d3a1040aaad3e0a3658ee3cf [2022-02-20 21:47:26,661 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:47:26,687 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:47:26,690 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:47:26,691 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:47:26,692 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:47:26,693 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i [2022-02-20 21:47:26,759 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c350b949a/7e5d3b1c29ab4fd3b27af62e27a57387/FLAGeb1d5a682 [2022-02-20 21:47:27,252 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:47:27,253 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i [2022-02-20 21:47:27,285 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c350b949a/7e5d3b1c29ab4fd3b27af62e27a57387/FLAGeb1d5a682 [2022-02-20 21:47:27,530 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c350b949a/7e5d3b1c29ab4fd3b27af62e27a57387 [2022-02-20 21:47:27,532 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:47:27,533 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:47:27,537 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:47:27,537 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:47:27,540 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:47:27,541 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:47:27" (1/1) ... [2022-02-20 21:47:27,543 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2be6f68b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:27, skipping insertion in model container [2022-02-20 21:47:27,543 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:47:27" (1/1) ... [2022-02-20 21:47:27,549 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:47:27,623 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:47:28,090 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i[73128,73141] [2022-02-20 21:47:28,190 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:47:28,223 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:47:28,385 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-consumption/32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i[73128,73141] [2022-02-20 21:47:28,419 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:47:28,470 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:47:28,470 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28 WrapperNode [2022-02-20 21:47:28,471 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:47:28,473 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:47:28,474 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:47:28,474 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:47:28,480 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,515 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,614 INFO L137 Inliner]: procedures = 99, calls = 345, calls flagged for inlining = 40, calls inlined = 32, statements flattened = 740 [2022-02-20 21:47:28,616 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:47:28,617 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:47:28,617 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:47:28,617 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:47:28,625 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,625 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,646 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,647 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,690 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,707 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,711 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,722 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:47:28,723 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:47:28,723 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:47:28,723 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:47:28,729 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (1/1) ... [2022-02-20 21:47:28,736 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:47:28,745 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:47:28,760 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:47:28,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:47:28,809 INFO L130 BoogieDeclarations]: Found specification of procedure regulator_list_voltage_linear [2022-02-20 21:47:28,810 INFO L138 BoogieDeclarations]: Found implementation of procedure regulator_list_voltage_linear [2022-02-20 21:47:28,810 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:47:28,810 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:47:28,810 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:47:28,810 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_unlock [2022-02-20 21:47:28,811 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_unlock [2022-02-20 21:47:28,811 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:47:28,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:47:28,811 INFO L130 BoogieDeclarations]: Found specification of procedure regulator_unregister [2022-02-20 21:47:28,812 INFO L138 BoogieDeclarations]: Found implementation of procedure regulator_unregister [2022-02-20 21:47:28,815 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:47:28,815 INFO L130 BoogieDeclarations]: Found specification of procedure mutex_lock [2022-02-20 21:47:28,815 INFO L138 BoogieDeclarations]: Found implementation of procedure mutex_lock [2022-02-20 21:47:28,815 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:47:28,815 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:47:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:47:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:47:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure rdev_get_drvdata [2022-02-20 21:47:28,816 INFO L138 BoogieDeclarations]: Found implementation of procedure rdev_get_drvdata [2022-02-20 21:47:28,816 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:47:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_lock_mtx_of_isl_pmic [2022-02-20 21:47:28,817 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_lock_mtx_of_isl_pmic [2022-02-20 21:47:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:47:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:47:28,817 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mutex_unlock_mtx_of_isl_pmic [2022-02-20 21:47:28,817 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mutex_unlock_mtx_of_isl_pmic [2022-02-20 21:47:28,818 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:47:28,818 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:47:28,818 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-02-20 21:47:28,818 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-02-20 21:47:29,063 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:47:29,067 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:47:29,888 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:47:29,900 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:47:29,901 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:47:29,903 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:47:29 BoogieIcfgContainer [2022-02-20 21:47:29,903 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:47:29,904 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:47:29,904 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:47:29,907 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:47:29,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:47:27" (1/3) ... [2022-02-20 21:47:29,909 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54eebd41 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:47:29, skipping insertion in model container [2022-02-20 21:47:29,909 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:47:28" (2/3) ... [2022-02-20 21:47:29,909 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54eebd41 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:47:29, skipping insertion in model container [2022-02-20 21:47:29,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:47:29" (3/3) ... [2022-02-20 21:47:29,913 INFO L111 eAbstractionObserver]: Analyzing ICFG 32_7a_cilled_linux-3.8-rc1-drivers--regulator--isl6271a-regulator.ko-main.cil.out.i [2022-02-20 21:47:29,920 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:47:29,921 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:47:29,977 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:47:29,988 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:47:29,988 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:47:30,014 INFO L276 IsEmpty]: Start isEmpty. Operand has 174 states, 136 states have (on average 1.3823529411764706) internal successors, (188), 143 states have internal predecessors, (188), 26 states have call successors, (26), 10 states have call predecessors, (26), 10 states have return successors, (26), 26 states have call predecessors, (26), 26 states have call successors, (26) [2022-02-20 21:47:30,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-02-20 21:47:30,023 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:30,024 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:30,024 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:30,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:30,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1503862345, now seen corresponding path program 1 times [2022-02-20 21:47:30,043 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:30,043 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639464001] [2022-02-20 21:47:30,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:30,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:30,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:30,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {177#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {177#true} is VALID [2022-02-20 21:47:30,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {177#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {177#true} is VALID [2022-02-20 21:47:30,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {177#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {179#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:30,440 INFO L290 TraceCheckUtils]: 3: Hoare triple {179#(= ~ldv_state_variable_0~0 1)} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {179#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:30,441 INFO L290 TraceCheckUtils]: 4: Hoare triple {179#(= ~ldv_state_variable_0~0 1)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {179#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:30,441 INFO L290 TraceCheckUtils]: 5: Hoare triple {179#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch65#1; {179#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:30,442 INFO L290 TraceCheckUtils]: 6: Hoare triple {179#(= ~ldv_state_variable_0~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {179#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:30,442 INFO L290 TraceCheckUtils]: 7: Hoare triple {179#(= ~ldv_state_variable_0~0 1)} assume main_#t~switch71#1; {179#(= ~ldv_state_variable_0~0 1)} is VALID [2022-02-20 21:47:30,443 INFO L290 TraceCheckUtils]: 8: Hoare triple {179#(= ~ldv_state_variable_0~0 1)} assume 3 == ~ldv_state_variable_0~0 && 0 == ~ref_cnt~0;assume { :begin_inline_isl6271a_cleanup } true;assume { :begin_inline_i2c_del_driver } true;i2c_del_driver_#in~arg0#1.base, i2c_del_driver_#in~arg0#1.offset := ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_del_driver_~arg0#1.base, i2c_del_driver_~arg0#1.offset;i2c_del_driver_~arg0#1.base, i2c_del_driver_~arg0#1.offset := i2c_del_driver_#in~arg0#1.base, i2c_del_driver_#in~arg0#1.offset; {178#false} is VALID [2022-02-20 21:47:30,443 INFO L290 TraceCheckUtils]: 9: Hoare triple {178#false} assume { :end_inline_i2c_del_driver } true; {178#false} is VALID [2022-02-20 21:47:30,443 INFO L290 TraceCheckUtils]: 10: Hoare triple {178#false} assume { :end_inline_isl6271a_cleanup } true;~ldv_state_variable_0~0 := 2; {178#false} is VALID [2022-02-20 21:47:30,444 INFO L290 TraceCheckUtils]: 11: Hoare triple {178#false} assume { :begin_inline_ldv_check_final_state } true; {178#false} is VALID [2022-02-20 21:47:30,444 INFO L290 TraceCheckUtils]: 12: Hoare triple {178#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {178#false} is VALID [2022-02-20 21:47:30,444 INFO L272 TraceCheckUtils]: 13: Hoare triple {178#false} call ldv_error(); {178#false} is VALID [2022-02-20 21:47:30,444 INFO L290 TraceCheckUtils]: 14: Hoare triple {178#false} assume !false; {178#false} is VALID [2022-02-20 21:47:30,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:30,446 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:30,446 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639464001] [2022-02-20 21:47:30,447 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [639464001] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:30,447 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:30,447 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:30,448 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956953884] [2022-02-20 21:47:30,449 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:30,453 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-02-20 21:47:30,455 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:30,458 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:30,487 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:30,488 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:30,488 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:30,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:30,512 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:30,520 INFO L87 Difference]: Start difference. First operand has 174 states, 136 states have (on average 1.3823529411764706) internal successors, (188), 143 states have internal predecessors, (188), 26 states have call successors, (26), 10 states have call predecessors, (26), 10 states have return successors, (26), 26 states have call predecessors, (26), 26 states have call successors, (26) Second operand has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:31,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:31,310 INFO L93 Difference]: Finished difference Result 494 states and 706 transitions. [2022-02-20 21:47:31,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:31,310 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-02-20 21:47:31,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:31,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:31,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 706 transitions. [2022-02-20 21:47:31,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:31,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 706 transitions. [2022-02-20 21:47:31,364 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 706 transitions. [2022-02-20 21:47:31,993 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 706 edges. 706 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:32,017 INFO L225 Difference]: With dead ends: 494 [2022-02-20 21:47:32,018 INFO L226 Difference]: Without dead ends: 319 [2022-02-20 21:47:32,022 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:32,025 INFO L933 BasicCegarLoop]: 251 mSDtfsCounter, 200 mSDsluCounter, 217 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 468 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:32,026 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [200 Valid, 468 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:32,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2022-02-20 21:47:32,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 315. [2022-02-20 21:47:32,096 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:32,103 INFO L82 GeneralOperation]: Start isEquivalent. First operand 319 states. Second operand has 315 states, 250 states have (on average 1.364) internal successors, (341), 255 states have internal predecessors, (341), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,105 INFO L74 IsIncluded]: Start isIncluded. First operand 319 states. Second operand has 315 states, 250 states have (on average 1.364) internal successors, (341), 255 states have internal predecessors, (341), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,107 INFO L87 Difference]: Start difference. First operand 319 states. Second operand has 315 states, 250 states have (on average 1.364) internal successors, (341), 255 states have internal predecessors, (341), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:32,129 INFO L93 Difference]: Finished difference Result 319 states and 430 transitions. [2022-02-20 21:47:32,131 INFO L276 IsEmpty]: Start isEmpty. Operand 319 states and 430 transitions. [2022-02-20 21:47:32,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:32,141 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:32,142 INFO L74 IsIncluded]: Start isIncluded. First operand has 315 states, 250 states have (on average 1.364) internal successors, (341), 255 states have internal predecessors, (341), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 319 states. [2022-02-20 21:47:32,146 INFO L87 Difference]: Start difference. First operand has 315 states, 250 states have (on average 1.364) internal successors, (341), 255 states have internal predecessors, (341), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 319 states. [2022-02-20 21:47:32,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:32,163 INFO L93 Difference]: Finished difference Result 319 states and 430 transitions. [2022-02-20 21:47:32,163 INFO L276 IsEmpty]: Start isEmpty. Operand 319 states and 430 transitions. [2022-02-20 21:47:32,166 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:32,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:32,172 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:32,172 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:32,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 315 states, 250 states have (on average 1.364) internal successors, (341), 255 states have internal predecessors, (341), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 427 transitions. [2022-02-20 21:47:32,202 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 427 transitions. Word has length 15 [2022-02-20 21:47:32,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:32,203 INFO L470 AbstractCegarLoop]: Abstraction has 315 states and 427 transitions. [2022-02-20 21:47:32,204 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.666666666666667) internal successors, (14), 3 states have internal predecessors, (14), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:32,205 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 427 transitions. [2022-02-20 21:47:32,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-20 21:47:32,207 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:32,207 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:32,207 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:47:32,208 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:32,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:32,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1848496968, now seen corresponding path program 1 times [2022-02-20 21:47:32,211 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:32,212 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356107168] [2022-02-20 21:47:32,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:32,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:32,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:32,306 INFO L290 TraceCheckUtils]: 0: Hoare triple {1979#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {1979#true} is VALID [2022-02-20 21:47:32,307 INFO L290 TraceCheckUtils]: 1: Hoare triple {1979#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {1979#true} is VALID [2022-02-20 21:47:32,307 INFO L290 TraceCheckUtils]: 2: Hoare triple {1979#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {1979#true} is VALID [2022-02-20 21:47:32,307 INFO L290 TraceCheckUtils]: 3: Hoare triple {1979#true} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {1979#true} is VALID [2022-02-20 21:47:32,308 INFO L290 TraceCheckUtils]: 4: Hoare triple {1979#true} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {1979#true} is VALID [2022-02-20 21:47:32,308 INFO L290 TraceCheckUtils]: 5: Hoare triple {1979#true} assume main_#t~switch65#1; {1979#true} is VALID [2022-02-20 21:47:32,308 INFO L290 TraceCheckUtils]: 6: Hoare triple {1979#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {1979#true} is VALID [2022-02-20 21:47:32,309 INFO L290 TraceCheckUtils]: 7: Hoare triple {1979#true} assume !main_#t~switch71#1;main_#t~switch71#1 := main_#t~switch71#1 || 1 == main_~tmp___1~1#1; {1979#true} is VALID [2022-02-20 21:47:32,309 INFO L290 TraceCheckUtils]: 8: Hoare triple {1979#true} assume main_#t~switch71#1; {1979#true} is VALID [2022-02-20 21:47:32,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {1979#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_isl6271a_init } true;havoc isl6271a_init_#res#1;havoc isl6271a_init_#t~ret63#1, isl6271a_init_~tmp~8#1;havoc isl6271a_init_~tmp~8#1;assume { :begin_inline_i2c_register_driver } true;i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset, i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset := ~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_register_driver_#res#1;havoc i2c_register_driver_#t~nondet112#1, i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset, i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset;i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset := i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset;i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset := i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset;assume -2147483648 <= i2c_register_driver_#t~nondet112#1 && i2c_register_driver_#t~nondet112#1 <= 2147483647;i2c_register_driver_#res#1 := i2c_register_driver_#t~nondet112#1;havoc i2c_register_driver_#t~nondet112#1; {1979#true} is VALID [2022-02-20 21:47:32,309 INFO L290 TraceCheckUtils]: 10: Hoare triple {1979#true} isl6271a_init_#t~ret63#1 := i2c_register_driver_#res#1;assume { :end_inline_i2c_register_driver } true;assume -2147483648 <= isl6271a_init_#t~ret63#1 && isl6271a_init_#t~ret63#1 <= 2147483647;isl6271a_init_~tmp~8#1 := isl6271a_init_#t~ret63#1;havoc isl6271a_init_#t~ret63#1;isl6271a_init_#res#1 := isl6271a_init_~tmp~8#1; {1979#true} is VALID [2022-02-20 21:47:32,310 INFO L290 TraceCheckUtils]: 11: Hoare triple {1979#true} main_#t~ret72#1 := isl6271a_init_#res#1;assume { :end_inline_isl6271a_init } true;assume -2147483648 <= main_#t~ret72#1 && main_#t~ret72#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret72#1;havoc main_#t~ret72#1; {1979#true} is VALID [2022-02-20 21:47:32,310 INFO L290 TraceCheckUtils]: 12: Hoare triple {1979#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1; {1981#(= ~ldv_retval_1~0 0)} is VALID [2022-02-20 21:47:32,311 INFO L290 TraceCheckUtils]: 13: Hoare triple {1981#(= ~ldv_retval_1~0 0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {1980#false} is VALID [2022-02-20 21:47:32,311 INFO L290 TraceCheckUtils]: 14: Hoare triple {1980#false} assume { :begin_inline_ldv_check_final_state } true; {1980#false} is VALID [2022-02-20 21:47:32,311 INFO L290 TraceCheckUtils]: 15: Hoare triple {1980#false} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {1980#false} is VALID [2022-02-20 21:47:32,312 INFO L272 TraceCheckUtils]: 16: Hoare triple {1980#false} call ldv_error(); {1980#false} is VALID [2022-02-20 21:47:32,312 INFO L290 TraceCheckUtils]: 17: Hoare triple {1980#false} assume !false; {1980#false} is VALID [2022-02-20 21:47:32,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:32,313 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:32,313 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356107168] [2022-02-20 21:47:32,313 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356107168] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:32,313 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:32,313 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:32,314 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175103803] [2022-02-20 21:47:32,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:32,315 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-02-20 21:47:32,316 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:32,316 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:32,344 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:32,344 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:32,345 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:32,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:32,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:32,346 INFO L87 Difference]: Start difference. First operand 315 states and 427 transitions. Second operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:32,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:32,673 INFO L93 Difference]: Finished difference Result 337 states and 453 transitions. [2022-02-20 21:47:32,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:32,674 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-02-20 21:47:32,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:32,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:32,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 255 transitions. [2022-02-20 21:47:32,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:32,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 255 transitions. [2022-02-20 21:47:32,682 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 255 transitions. [2022-02-20 21:47:32,888 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 255 edges. 255 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:32,904 INFO L225 Difference]: With dead ends: 337 [2022-02-20 21:47:32,905 INFO L226 Difference]: Without dead ends: 326 [2022-02-20 21:47:32,905 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:32,906 INFO L933 BasicCegarLoop]: 239 mSDtfsCounter, 222 mSDsluCounter, 13 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 252 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:32,907 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [222 Valid, 252 Invalid, 6 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:32,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2022-02-20 21:47:32,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 315. [2022-02-20 21:47:32,923 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:32,924 INFO L82 GeneralOperation]: Start isEquivalent. First operand 326 states. Second operand has 315 states, 250 states have (on average 1.36) internal successors, (340), 255 states have internal predecessors, (340), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,925 INFO L74 IsIncluded]: Start isIncluded. First operand 326 states. Second operand has 315 states, 250 states have (on average 1.36) internal successors, (340), 255 states have internal predecessors, (340), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,926 INFO L87 Difference]: Start difference. First operand 326 states. Second operand has 315 states, 250 states have (on average 1.36) internal successors, (340), 255 states have internal predecessors, (340), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:32,939 INFO L93 Difference]: Finished difference Result 326 states and 439 transitions. [2022-02-20 21:47:32,939 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 439 transitions. [2022-02-20 21:47:32,940 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:32,940 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:32,942 INFO L74 IsIncluded]: Start isIncluded. First operand has 315 states, 250 states have (on average 1.36) internal successors, (340), 255 states have internal predecessors, (340), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 326 states. [2022-02-20 21:47:32,943 INFO L87 Difference]: Start difference. First operand has 315 states, 250 states have (on average 1.36) internal successors, (340), 255 states have internal predecessors, (340), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 326 states. [2022-02-20 21:47:32,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:32,955 INFO L93 Difference]: Finished difference Result 326 states and 439 transitions. [2022-02-20 21:47:32,955 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 439 transitions. [2022-02-20 21:47:32,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:32,957 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:32,957 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:32,957 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:32,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 315 states, 250 states have (on average 1.36) internal successors, (340), 255 states have internal predecessors, (340), 46 states have call successors, (46), 19 states have call predecessors, (46), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:32,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 426 transitions. [2022-02-20 21:47:32,972 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 426 transitions. Word has length 18 [2022-02-20 21:47:32,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:32,972 INFO L470 AbstractCegarLoop]: Abstraction has 315 states and 426 transitions. [2022-02-20 21:47:32,972 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:32,973 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 426 transitions. [2022-02-20 21:47:32,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-20 21:47:32,973 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:32,974 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:32,974 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-20 21:47:32,974 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:32,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:32,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1905755270, now seen corresponding path program 1 times [2022-02-20 21:47:32,975 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:32,975 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322066475] [2022-02-20 21:47:32,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:32,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:33,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:33,066 INFO L290 TraceCheckUtils]: 0: Hoare triple {3570#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {3570#true} is VALID [2022-02-20 21:47:33,067 INFO L290 TraceCheckUtils]: 1: Hoare triple {3570#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,067 INFO L290 TraceCheckUtils]: 2: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,068 INFO L290 TraceCheckUtils]: 3: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,068 INFO L290 TraceCheckUtils]: 4: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,070 INFO L290 TraceCheckUtils]: 5: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume main_#t~switch65#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,073 INFO L290 TraceCheckUtils]: 7: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !main_#t~switch71#1;main_#t~switch71#1 := main_#t~switch71#1 || 1 == main_~tmp___1~1#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,074 INFO L290 TraceCheckUtils]: 8: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume main_#t~switch71#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,074 INFO L290 TraceCheckUtils]: 9: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_isl6271a_init } true;havoc isl6271a_init_#res#1;havoc isl6271a_init_#t~ret63#1, isl6271a_init_~tmp~8#1;havoc isl6271a_init_~tmp~8#1;assume { :begin_inline_i2c_register_driver } true;i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset, i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset := ~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_register_driver_#res#1;havoc i2c_register_driver_#t~nondet112#1, i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset, i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset;i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset := i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset;i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset := i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset;assume -2147483648 <= i2c_register_driver_#t~nondet112#1 && i2c_register_driver_#t~nondet112#1 <= 2147483647;i2c_register_driver_#res#1 := i2c_register_driver_#t~nondet112#1;havoc i2c_register_driver_#t~nondet112#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,075 INFO L290 TraceCheckUtils]: 10: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} isl6271a_init_#t~ret63#1 := i2c_register_driver_#res#1;assume { :end_inline_i2c_register_driver } true;assume -2147483648 <= isl6271a_init_#t~ret63#1 && isl6271a_init_#t~ret63#1 <= 2147483647;isl6271a_init_~tmp~8#1 := isl6271a_init_#t~ret63#1;havoc isl6271a_init_#t~ret63#1;isl6271a_init_#res#1 := isl6271a_init_~tmp~8#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,075 INFO L290 TraceCheckUtils]: 11: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} main_#t~ret72#1 := isl6271a_init_#res#1;assume { :end_inline_isl6271a_init } true;assume -2147483648 <= main_#t~ret72#1 && main_#t~ret72#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret72#1;havoc main_#t~ret72#1; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,076 INFO L290 TraceCheckUtils]: 12: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !(0 == ~ldv_retval_1~0); {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,076 INFO L290 TraceCheckUtils]: 13: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,077 INFO L290 TraceCheckUtils]: 14: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume { :begin_inline_ldv_check_final_state } true; {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} is VALID [2022-02-20 21:47:33,078 INFO L290 TraceCheckUtils]: 15: Hoare triple {3572#(= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)} assume !(1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0); {3571#false} is VALID [2022-02-20 21:47:33,079 INFO L272 TraceCheckUtils]: 16: Hoare triple {3571#false} call ldv_error(); {3571#false} is VALID [2022-02-20 21:47:33,081 INFO L290 TraceCheckUtils]: 17: Hoare triple {3571#false} assume !false; {3571#false} is VALID [2022-02-20 21:47:33,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:33,082 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:33,083 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322066475] [2022-02-20 21:47:33,084 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322066475] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:33,084 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:33,084 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:33,084 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591009654] [2022-02-20 21:47:33,084 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:33,085 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-02-20 21:47:33,085 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:33,085 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:33,106 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:33,107 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:33,107 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:33,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:33,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:33,107 INFO L87 Difference]: Start difference. First operand 315 states and 426 transitions. Second operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:33,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:33,411 INFO L93 Difference]: Finished difference Result 317 states and 427 transitions. [2022-02-20 21:47:33,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:33,411 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-02-20 21:47:33,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:33,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:33,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 228 transitions. [2022-02-20 21:47:33,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:33,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 228 transitions. [2022-02-20 21:47:33,418 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 228 transitions. [2022-02-20 21:47:33,621 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 228 edges. 228 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:33,632 INFO L225 Difference]: With dead ends: 317 [2022-02-20 21:47:33,632 INFO L226 Difference]: Without dead ends: 314 [2022-02-20 21:47:33,636 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:33,639 INFO L933 BasicCegarLoop]: 224 mSDtfsCounter, 210 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 224 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:33,640 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [210 Valid, 224 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:33,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2022-02-20 21:47:33,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 314. [2022-02-20 21:47:33,664 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:33,666 INFO L82 GeneralOperation]: Start isEquivalent. First operand 314 states. Second operand has 314 states, 250 states have (on average 1.356) internal successors, (339), 254 states have internal predecessors, (339), 45 states have call successors, (45), 19 states have call predecessors, (45), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:33,666 INFO L74 IsIncluded]: Start isIncluded. First operand 314 states. Second operand has 314 states, 250 states have (on average 1.356) internal successors, (339), 254 states have internal predecessors, (339), 45 states have call successors, (45), 19 states have call predecessors, (45), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:33,668 INFO L87 Difference]: Start difference. First operand 314 states. Second operand has 314 states, 250 states have (on average 1.356) internal successors, (339), 254 states have internal predecessors, (339), 45 states have call successors, (45), 19 states have call predecessors, (45), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:33,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:33,698 INFO L93 Difference]: Finished difference Result 314 states and 424 transitions. [2022-02-20 21:47:33,698 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 424 transitions. [2022-02-20 21:47:33,699 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:33,699 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:33,700 INFO L74 IsIncluded]: Start isIncluded. First operand has 314 states, 250 states have (on average 1.356) internal successors, (339), 254 states have internal predecessors, (339), 45 states have call successors, (45), 19 states have call predecessors, (45), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 314 states. [2022-02-20 21:47:33,701 INFO L87 Difference]: Start difference. First operand has 314 states, 250 states have (on average 1.356) internal successors, (339), 254 states have internal predecessors, (339), 45 states have call successors, (45), 19 states have call predecessors, (45), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 314 states. [2022-02-20 21:47:33,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:33,728 INFO L93 Difference]: Finished difference Result 314 states and 424 transitions. [2022-02-20 21:47:33,729 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 424 transitions. [2022-02-20 21:47:33,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:33,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:33,731 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:33,731 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:33,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 314 states, 250 states have (on average 1.356) internal successors, (339), 254 states have internal predecessors, (339), 45 states have call successors, (45), 19 states have call predecessors, (45), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:33,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 424 transitions. [2022-02-20 21:47:33,745 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 424 transitions. Word has length 18 [2022-02-20 21:47:33,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:33,745 INFO L470 AbstractCegarLoop]: Abstraction has 314 states and 424 transitions. [2022-02-20 21:47:33,746 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:33,746 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 424 transitions. [2022-02-20 21:47:33,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-20 21:47:33,747 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:33,747 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:33,747 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-02-20 21:47:33,747 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:33,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:33,748 INFO L85 PathProgramCache]: Analyzing trace with hash -1051243621, now seen corresponding path program 1 times [2022-02-20 21:47:33,748 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:33,748 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793432631] [2022-02-20 21:47:33,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:33,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:33,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:33,808 INFO L290 TraceCheckUtils]: 0: Hoare triple {5104#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {5104#true} is VALID [2022-02-20 21:47:33,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {5104#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,810 INFO L290 TraceCheckUtils]: 2: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,810 INFO L290 TraceCheckUtils]: 3: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,810 INFO L290 TraceCheckUtils]: 4: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,811 INFO L290 TraceCheckUtils]: 5: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume main_#t~switch65#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,811 INFO L290 TraceCheckUtils]: 6: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,812 INFO L290 TraceCheckUtils]: 7: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume !main_#t~switch71#1;main_#t~switch71#1 := main_#t~switch71#1 || 1 == main_~tmp___1~1#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume main_#t~switch71#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,814 INFO L290 TraceCheckUtils]: 9: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_isl6271a_init } true;havoc isl6271a_init_#res#1;havoc isl6271a_init_#t~ret63#1, isl6271a_init_~tmp~8#1;havoc isl6271a_init_~tmp~8#1;assume { :begin_inline_i2c_register_driver } true;i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset, i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset := ~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_register_driver_#res#1;havoc i2c_register_driver_#t~nondet112#1, i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset, i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset;i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset := i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset;i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset := i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset;assume -2147483648 <= i2c_register_driver_#t~nondet112#1 && i2c_register_driver_#t~nondet112#1 <= 2147483647;i2c_register_driver_#res#1 := i2c_register_driver_#t~nondet112#1;havoc i2c_register_driver_#t~nondet112#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,815 INFO L290 TraceCheckUtils]: 10: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} isl6271a_init_#t~ret63#1 := i2c_register_driver_#res#1;assume { :end_inline_i2c_register_driver } true;assume -2147483648 <= isl6271a_init_#t~ret63#1 && isl6271a_init_#t~ret63#1 <= 2147483647;isl6271a_init_~tmp~8#1 := isl6271a_init_#t~ret63#1;havoc isl6271a_init_#t~ret63#1;isl6271a_init_#res#1 := isl6271a_init_~tmp~8#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,815 INFO L290 TraceCheckUtils]: 11: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} main_#t~ret72#1 := isl6271a_init_#res#1;assume { :end_inline_isl6271a_init } true;assume -2147483648 <= main_#t~ret72#1 && main_#t~ret72#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret72#1;havoc main_#t~ret72#1; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,815 INFO L290 TraceCheckUtils]: 12: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume !(0 == ~ldv_retval_1~0); {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,816 INFO L290 TraceCheckUtils]: 13: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,816 INFO L290 TraceCheckUtils]: 14: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume { :begin_inline_ldv_check_final_state } true; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,817 INFO L290 TraceCheckUtils]: 15: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {5106#(= ~ldv_mutex_lock~0 1)} is VALID [2022-02-20 21:47:33,817 INFO L290 TraceCheckUtils]: 16: Hoare triple {5106#(= ~ldv_mutex_lock~0 1)} assume !(1 == ~ldv_mutex_lock~0); {5105#false} is VALID [2022-02-20 21:47:33,817 INFO L272 TraceCheckUtils]: 17: Hoare triple {5105#false} call ldv_error(); {5105#false} is VALID [2022-02-20 21:47:33,818 INFO L290 TraceCheckUtils]: 18: Hoare triple {5105#false} assume !false; {5105#false} is VALID [2022-02-20 21:47:33,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:33,818 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:33,818 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793432631] [2022-02-20 21:47:33,818 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1793432631] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:33,819 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:33,819 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:33,819 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755807281] [2022-02-20 21:47:33,819 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:33,819 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-02-20 21:47:33,820 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:33,820 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:33,847 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:33,848 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:33,848 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:33,849 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:33,849 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:33,849 INFO L87 Difference]: Start difference. First operand 314 states and 424 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:34,190 INFO L93 Difference]: Finished difference Result 316 states and 425 transitions. [2022-02-20 21:47:34,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:34,191 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-02-20 21:47:34,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:34,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 226 transitions. [2022-02-20 21:47:34,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 226 transitions. [2022-02-20 21:47:34,198 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 226 transitions. [2022-02-20 21:47:34,402 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 226 edges. 226 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:34,410 INFO L225 Difference]: With dead ends: 316 [2022-02-20 21:47:34,411 INFO L226 Difference]: Without dead ends: 313 [2022-02-20 21:47:34,411 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:34,412 INFO L933 BasicCegarLoop]: 222 mSDtfsCounter, 207 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 222 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:34,412 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [207 Valid, 222 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:34,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2022-02-20 21:47:34,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 313. [2022-02-20 21:47:34,425 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:34,426 INFO L82 GeneralOperation]: Start isEquivalent. First operand 313 states. Second operand has 313 states, 250 states have (on average 1.352) internal successors, (338), 253 states have internal predecessors, (338), 44 states have call successors, (44), 19 states have call predecessors, (44), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:34,427 INFO L74 IsIncluded]: Start isIncluded. First operand 313 states. Second operand has 313 states, 250 states have (on average 1.352) internal successors, (338), 253 states have internal predecessors, (338), 44 states have call successors, (44), 19 states have call predecessors, (44), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:34,428 INFO L87 Difference]: Start difference. First operand 313 states. Second operand has 313 states, 250 states have (on average 1.352) internal successors, (338), 253 states have internal predecessors, (338), 44 states have call successors, (44), 19 states have call predecessors, (44), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:34,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:34,438 INFO L93 Difference]: Finished difference Result 313 states and 422 transitions. [2022-02-20 21:47:34,438 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 422 transitions. [2022-02-20 21:47:34,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:34,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:34,440 INFO L74 IsIncluded]: Start isIncluded. First operand has 313 states, 250 states have (on average 1.352) internal successors, (338), 253 states have internal predecessors, (338), 44 states have call successors, (44), 19 states have call predecessors, (44), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 313 states. [2022-02-20 21:47:34,441 INFO L87 Difference]: Start difference. First operand has 313 states, 250 states have (on average 1.352) internal successors, (338), 253 states have internal predecessors, (338), 44 states have call successors, (44), 19 states have call predecessors, (44), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 313 states. [2022-02-20 21:47:34,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:34,450 INFO L93 Difference]: Finished difference Result 313 states and 422 transitions. [2022-02-20 21:47:34,450 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 422 transitions. [2022-02-20 21:47:34,451 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:34,451 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:34,451 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:34,451 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:34,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 313 states, 250 states have (on average 1.352) internal successors, (338), 253 states have internal predecessors, (338), 44 states have call successors, (44), 19 states have call predecessors, (44), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:34,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 422 transitions. [2022-02-20 21:47:34,463 INFO L78 Accepts]: Start accepts. Automaton has 313 states and 422 transitions. Word has length 19 [2022-02-20 21:47:34,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:34,463 INFO L470 AbstractCegarLoop]: Abstraction has 313 states and 422 transitions. [2022-02-20 21:47:34,463 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,463 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 422 transitions. [2022-02-20 21:47:34,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-02-20 21:47:34,464 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:34,464 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:34,464 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-02-20 21:47:34,465 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:34,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:34,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1771076137, now seen corresponding path program 1 times [2022-02-20 21:47:34,466 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:34,466 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162136173] [2022-02-20 21:47:34,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:34,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:34,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:34,545 INFO L290 TraceCheckUtils]: 0: Hoare triple {6632#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {6632#true} is VALID [2022-02-20 21:47:34,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {6632#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,546 INFO L290 TraceCheckUtils]: 2: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,547 INFO L290 TraceCheckUtils]: 3: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,547 INFO L290 TraceCheckUtils]: 4: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume main_#t~switch65#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume !main_#t~switch71#1;main_#t~switch71#1 := main_#t~switch71#1 || 1 == main_~tmp___1~1#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,549 INFO L290 TraceCheckUtils]: 8: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume main_#t~switch71#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,549 INFO L290 TraceCheckUtils]: 9: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_isl6271a_init } true;havoc isl6271a_init_#res#1;havoc isl6271a_init_#t~ret63#1, isl6271a_init_~tmp~8#1;havoc isl6271a_init_~tmp~8#1;assume { :begin_inline_i2c_register_driver } true;i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset, i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset := ~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_register_driver_#res#1;havoc i2c_register_driver_#t~nondet112#1, i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset, i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset;i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset := i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset;i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset := i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset;assume -2147483648 <= i2c_register_driver_#t~nondet112#1 && i2c_register_driver_#t~nondet112#1 <= 2147483647;i2c_register_driver_#res#1 := i2c_register_driver_#t~nondet112#1;havoc i2c_register_driver_#t~nondet112#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,550 INFO L290 TraceCheckUtils]: 10: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} isl6271a_init_#t~ret63#1 := i2c_register_driver_#res#1;assume { :end_inline_i2c_register_driver } true;assume -2147483648 <= isl6271a_init_#t~ret63#1 && isl6271a_init_#t~ret63#1 <= 2147483647;isl6271a_init_~tmp~8#1 := isl6271a_init_#t~ret63#1;havoc isl6271a_init_#t~ret63#1;isl6271a_init_#res#1 := isl6271a_init_~tmp~8#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,550 INFO L290 TraceCheckUtils]: 11: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} main_#t~ret72#1 := isl6271a_init_#res#1;assume { :end_inline_isl6271a_init } true;assume -2147483648 <= main_#t~ret72#1 && main_#t~ret72#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret72#1;havoc main_#t~ret72#1; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,550 INFO L290 TraceCheckUtils]: 12: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume !(0 == ~ldv_retval_1~0); {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,551 INFO L290 TraceCheckUtils]: 13: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,551 INFO L290 TraceCheckUtils]: 14: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume { :begin_inline_ldv_check_final_state } true; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,552 INFO L290 TraceCheckUtils]: 15: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,552 INFO L290 TraceCheckUtils]: 16: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume 1 == ~ldv_mutex_lock~0; {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} is VALID [2022-02-20 21:47:34,552 INFO L290 TraceCheckUtils]: 17: Hoare triple {6634#(= ~ldv_mutex_mtx_of_isl_pmic~0 1)} assume !(1 == ~ldv_mutex_mtx_of_isl_pmic~0); {6633#false} is VALID [2022-02-20 21:47:34,552 INFO L272 TraceCheckUtils]: 18: Hoare triple {6633#false} call ldv_error(); {6633#false} is VALID [2022-02-20 21:47:34,553 INFO L290 TraceCheckUtils]: 19: Hoare triple {6633#false} assume !false; {6633#false} is VALID [2022-02-20 21:47:34,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:34,553 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:34,553 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162136173] [2022-02-20 21:47:34,553 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1162136173] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:34,553 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:34,554 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:34,554 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [982937203] [2022-02-20 21:47:34,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:34,554 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-02-20 21:47:34,555 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:34,555 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,585 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:34,585 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:34,585 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:34,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:34,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:34,586 INFO L87 Difference]: Start difference. First operand 313 states and 422 transitions. Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:34,924 INFO L93 Difference]: Finished difference Result 317 states and 424 transitions. [2022-02-20 21:47:34,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:34,925 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-02-20 21:47:34,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:34,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 225 transitions. [2022-02-20 21:47:34,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:34,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 225 transitions. [2022-02-20 21:47:34,931 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 225 transitions. [2022-02-20 21:47:35,134 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 225 edges. 225 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:35,142 INFO L225 Difference]: With dead ends: 317 [2022-02-20 21:47:35,142 INFO L226 Difference]: Without dead ends: 313 [2022-02-20 21:47:35,143 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:35,143 INFO L933 BasicCegarLoop]: 217 mSDtfsCounter, 175 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 241 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:35,144 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [175 Valid, 241 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:35,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2022-02-20 21:47:35,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 311. [2022-02-20 21:47:35,155 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:35,156 INFO L82 GeneralOperation]: Start isEquivalent. First operand 313 states. Second operand has 311 states, 250 states have (on average 1.34) internal successors, (335), 251 states have internal predecessors, (335), 42 states have call successors, (42), 19 states have call predecessors, (42), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,157 INFO L74 IsIncluded]: Start isIncluded. First operand 313 states. Second operand has 311 states, 250 states have (on average 1.34) internal successors, (335), 251 states have internal predecessors, (335), 42 states have call successors, (42), 19 states have call predecessors, (42), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,158 INFO L87 Difference]: Start difference. First operand 313 states. Second operand has 311 states, 250 states have (on average 1.34) internal successors, (335), 251 states have internal predecessors, (335), 42 states have call successors, (42), 19 states have call predecessors, (42), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:35,166 INFO L93 Difference]: Finished difference Result 313 states and 418 transitions. [2022-02-20 21:47:35,166 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 418 transitions. [2022-02-20 21:47:35,167 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:35,167 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:35,168 INFO L74 IsIncluded]: Start isIncluded. First operand has 311 states, 250 states have (on average 1.34) internal successors, (335), 251 states have internal predecessors, (335), 42 states have call successors, (42), 19 states have call predecessors, (42), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 313 states. [2022-02-20 21:47:35,169 INFO L87 Difference]: Start difference. First operand has 311 states, 250 states have (on average 1.34) internal successors, (335), 251 states have internal predecessors, (335), 42 states have call successors, (42), 19 states have call predecessors, (42), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 313 states. [2022-02-20 21:47:35,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:35,178 INFO L93 Difference]: Finished difference Result 313 states and 418 transitions. [2022-02-20 21:47:35,178 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 418 transitions. [2022-02-20 21:47:35,179 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:35,179 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:35,179 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:35,180 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:35,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 311 states, 250 states have (on average 1.34) internal successors, (335), 251 states have internal predecessors, (335), 42 states have call successors, (42), 19 states have call predecessors, (42), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 417 transitions. [2022-02-20 21:47:35,190 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 417 transitions. Word has length 20 [2022-02-20 21:47:35,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:35,191 INFO L470 AbstractCegarLoop]: Abstraction has 311 states and 417 transitions. [2022-02-20 21:47:35,191 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:35,191 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 417 transitions. [2022-02-20 21:47:35,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-02-20 21:47:35,192 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:35,192 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:35,192 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-02-20 21:47:35,192 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:35,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:35,193 INFO L85 PathProgramCache]: Analyzing trace with hash -931319714, now seen corresponding path program 1 times [2022-02-20 21:47:35,193 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:35,193 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563069990] [2022-02-20 21:47:35,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:35,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:35,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:35,247 INFO L290 TraceCheckUtils]: 0: Hoare triple {8157#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {8157#true} is VALID [2022-02-20 21:47:35,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {8157#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,249 INFO L290 TraceCheckUtils]: 3: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,250 INFO L290 TraceCheckUtils]: 4: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,250 INFO L290 TraceCheckUtils]: 5: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume main_#t~switch65#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,251 INFO L290 TraceCheckUtils]: 6: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,252 INFO L290 TraceCheckUtils]: 7: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !main_#t~switch71#1;main_#t~switch71#1 := main_#t~switch71#1 || 1 == main_~tmp___1~1#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,252 INFO L290 TraceCheckUtils]: 8: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume main_#t~switch71#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,253 INFO L290 TraceCheckUtils]: 9: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_isl6271a_init } true;havoc isl6271a_init_#res#1;havoc isl6271a_init_#t~ret63#1, isl6271a_init_~tmp~8#1;havoc isl6271a_init_~tmp~8#1;assume { :begin_inline_i2c_register_driver } true;i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset, i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset := ~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_register_driver_#res#1;havoc i2c_register_driver_#t~nondet112#1, i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset, i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset;i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset := i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset;i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset := i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset;assume -2147483648 <= i2c_register_driver_#t~nondet112#1 && i2c_register_driver_#t~nondet112#1 <= 2147483647;i2c_register_driver_#res#1 := i2c_register_driver_#t~nondet112#1;havoc i2c_register_driver_#t~nondet112#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,253 INFO L290 TraceCheckUtils]: 10: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} isl6271a_init_#t~ret63#1 := i2c_register_driver_#res#1;assume { :end_inline_i2c_register_driver } true;assume -2147483648 <= isl6271a_init_#t~ret63#1 && isl6271a_init_#t~ret63#1 <= 2147483647;isl6271a_init_~tmp~8#1 := isl6271a_init_#t~ret63#1;havoc isl6271a_init_#t~ret63#1;isl6271a_init_#res#1 := isl6271a_init_~tmp~8#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,254 INFO L290 TraceCheckUtils]: 11: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} main_#t~ret72#1 := isl6271a_init_#res#1;assume { :end_inline_isl6271a_init } true;assume -2147483648 <= main_#t~ret72#1 && main_#t~ret72#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret72#1;havoc main_#t~ret72#1; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,254 INFO L290 TraceCheckUtils]: 12: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !(0 == ~ldv_retval_1~0); {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,255 INFO L290 TraceCheckUtils]: 13: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 0 != ~ldv_retval_1~0;~ldv_state_variable_0~0 := 2; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,255 INFO L290 TraceCheckUtils]: 14: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume { :begin_inline_ldv_check_final_state } true; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,255 INFO L290 TraceCheckUtils]: 15: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_cred_guard_mutex_of_signal_struct~0; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,256 INFO L290 TraceCheckUtils]: 16: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_lock~0; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,258 INFO L290 TraceCheckUtils]: 17: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume 1 == ~ldv_mutex_mtx_of_isl_pmic~0; {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} is VALID [2022-02-20 21:47:35,258 INFO L290 TraceCheckUtils]: 18: Hoare triple {8159#(= 1 ~ldv_mutex_mutex_of_device~0)} assume !(1 == ~ldv_mutex_mutex_of_device~0); {8158#false} is VALID [2022-02-20 21:47:35,259 INFO L272 TraceCheckUtils]: 19: Hoare triple {8158#false} call ldv_error(); {8158#false} is VALID [2022-02-20 21:47:35,259 INFO L290 TraceCheckUtils]: 20: Hoare triple {8158#false} assume !false; {8158#false} is VALID [2022-02-20 21:47:35,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:35,259 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:35,259 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563069990] [2022-02-20 21:47:35,260 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [563069990] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:35,260 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:35,260 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-20 21:47:35,260 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115402318] [2022-02-20 21:47:35,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:35,261 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-02-20 21:47:35,261 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:35,261 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:35,285 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:35,286 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-20 21:47:35,286 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:35,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-20 21:47:35,286 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:35,287 INFO L87 Difference]: Start difference. First operand 311 states and 417 transitions. Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:35,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:35,596 INFO L93 Difference]: Finished difference Result 313 states and 418 transitions. [2022-02-20 21:47:35,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-20 21:47:35,597 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-02-20 21:47:35,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:35,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:35,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 220 transitions. [2022-02-20 21:47:35,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:35,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 220 transitions. [2022-02-20 21:47:35,603 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 220 transitions. [2022-02-20 21:47:35,801 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 220 edges. 220 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:35,809 INFO L225 Difference]: With dead ends: 313 [2022-02-20 21:47:35,809 INFO L226 Difference]: Without dead ends: 303 [2022-02-20 21:47:35,810 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-20 21:47:35,810 INFO L933 BasicCegarLoop]: 217 mSDtfsCounter, 199 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 217 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:35,811 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [199 Valid, 217 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-20 21:47:35,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303 states. [2022-02-20 21:47:35,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303 to 303. [2022-02-20 21:47:35,823 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:35,824 INFO L82 GeneralOperation]: Start isEquivalent. First operand 303 states. Second operand has 303 states, 243 states have (on average 1.3415637860082306) internal successors, (326), 243 states have internal predecessors, (326), 41 states have call successors, (41), 19 states have call predecessors, (41), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,824 INFO L74 IsIncluded]: Start isIncluded. First operand 303 states. Second operand has 303 states, 243 states have (on average 1.3415637860082306) internal successors, (326), 243 states have internal predecessors, (326), 41 states have call successors, (41), 19 states have call predecessors, (41), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,825 INFO L87 Difference]: Start difference. First operand 303 states. Second operand has 303 states, 243 states have (on average 1.3415637860082306) internal successors, (326), 243 states have internal predecessors, (326), 41 states have call successors, (41), 19 states have call predecessors, (41), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:35,833 INFO L93 Difference]: Finished difference Result 303 states and 407 transitions. [2022-02-20 21:47:35,834 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 407 transitions. [2022-02-20 21:47:35,834 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:35,834 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:35,835 INFO L74 IsIncluded]: Start isIncluded. First operand has 303 states, 243 states have (on average 1.3415637860082306) internal successors, (326), 243 states have internal predecessors, (326), 41 states have call successors, (41), 19 states have call predecessors, (41), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 303 states. [2022-02-20 21:47:35,836 INFO L87 Difference]: Start difference. First operand has 303 states, 243 states have (on average 1.3415637860082306) internal successors, (326), 243 states have internal predecessors, (326), 41 states have call successors, (41), 19 states have call predecessors, (41), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) Second operand 303 states. [2022-02-20 21:47:35,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:35,845 INFO L93 Difference]: Finished difference Result 303 states and 407 transitions. [2022-02-20 21:47:35,845 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 407 transitions. [2022-02-20 21:47:35,846 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:35,846 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:35,846 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:35,847 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:35,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 303 states, 243 states have (on average 1.3415637860082306) internal successors, (326), 243 states have internal predecessors, (326), 41 states have call successors, (41), 19 states have call predecessors, (41), 18 states have return successors, (40), 40 states have call predecessors, (40), 40 states have call successors, (40) [2022-02-20 21:47:35,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 407 transitions. [2022-02-20 21:47:35,857 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 407 transitions. Word has length 21 [2022-02-20 21:47:35,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:35,858 INFO L470 AbstractCegarLoop]: Abstraction has 303 states and 407 transitions. [2022-02-20 21:47:35,858 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:35,858 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 407 transitions. [2022-02-20 21:47:35,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-02-20 21:47:35,859 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:35,859 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:35,860 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-02-20 21:47:35,860 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:35,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:35,860 INFO L85 PathProgramCache]: Analyzing trace with hash 40904397, now seen corresponding path program 1 times [2022-02-20 21:47:35,861 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:35,861 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309106914] [2022-02-20 21:47:35,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:35,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:35,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:35,920 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:47:35,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:35,929 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:47:35,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:35,935 INFO L290 TraceCheckUtils]: 0: Hoare triple {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1; {9643#true} is VALID [2022-02-20 21:47:35,935 INFO L290 TraceCheckUtils]: 1: Hoare triple {9643#true} assume 0 != #t~nondet106#1 % 256;havoc #t~nondet106#1;#res#1.base, #res#1.offset := 0, 0; {9643#true} is VALID [2022-02-20 21:47:35,935 INFO L290 TraceCheckUtils]: 2: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,936 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9643#true} {9643#true} #494#return; {9643#true} is VALID [2022-02-20 21:47:35,936 INFO L290 TraceCheckUtils]: 0: Hoare triple {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {9643#true} is VALID [2022-02-20 21:47:35,937 INFO L272 TraceCheckUtils]: 1: Hoare triple {9643#true} call #t~ret116.base, #t~ret116.offset := ldv_malloc(0); {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:35,938 INFO L290 TraceCheckUtils]: 2: Hoare triple {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1; {9643#true} is VALID [2022-02-20 21:47:35,938 INFO L290 TraceCheckUtils]: 3: Hoare triple {9643#true} assume 0 != #t~nondet106#1 % 256;havoc #t~nondet106#1;#res#1.base, #res#1.offset := 0, 0; {9643#true} is VALID [2022-02-20 21:47:35,938 INFO L290 TraceCheckUtils]: 4: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,938 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {9643#true} {9643#true} #494#return; {9643#true} is VALID [2022-02-20 21:47:35,938 INFO L290 TraceCheckUtils]: 6: Hoare triple {9643#true} #res.base, #res.offset := #t~ret116.base, #t~ret116.offset;havoc #t~ret116.base, #t~ret116.offset; {9643#true} is VALID [2022-02-20 21:47:35,939 INFO L290 TraceCheckUtils]: 7: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,939 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {9643#true} {9644#false} #464#return; {9644#false} is VALID [2022-02-20 21:47:35,943 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-02-20 21:47:35,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:35,949 INFO L290 TraceCheckUtils]: 0: Hoare triple {9668#(= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {9643#true} is VALID [2022-02-20 21:47:35,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {9643#true} assume 1 == ~ldv_mutex_mtx_of_isl_pmic~0; {9643#true} is VALID [2022-02-20 21:47:35,950 INFO L290 TraceCheckUtils]: 2: Hoare triple {9643#true} ~ldv_mutex_mtx_of_isl_pmic~0 := 2; {9643#true} is VALID [2022-02-20 21:47:35,950 INFO L290 TraceCheckUtils]: 3: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,951 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {9643#true} {9644#false} #466#return; {9644#false} is VALID [2022-02-20 21:47:35,951 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-02-20 21:47:35,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:35,956 INFO L290 TraceCheckUtils]: 0: Hoare triple {9643#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {9643#true} is VALID [2022-02-20 21:47:35,957 INFO L290 TraceCheckUtils]: 1: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,957 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9643#true} {9644#false} #468#return; {9644#false} is VALID [2022-02-20 21:47:35,957 INFO L290 TraceCheckUtils]: 0: Hoare triple {9643#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {9643#true} is VALID [2022-02-20 21:47:35,957 INFO L290 TraceCheckUtils]: 1: Hoare triple {9643#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {9643#true} is VALID [2022-02-20 21:47:35,958 INFO L290 TraceCheckUtils]: 2: Hoare triple {9643#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {9645#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:35,958 INFO L290 TraceCheckUtils]: 3: Hoare triple {9645#(= ~ldv_state_variable_3~0 0)} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {9645#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:35,959 INFO L290 TraceCheckUtils]: 4: Hoare triple {9645#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {9645#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:35,959 INFO L290 TraceCheckUtils]: 5: Hoare triple {9645#(= ~ldv_state_variable_3~0 0)} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 2 == main_~tmp~9#1; {9645#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:35,960 INFO L290 TraceCheckUtils]: 6: Hoare triple {9645#(= ~ldv_state_variable_3~0 0)} assume main_#t~switch65#1; {9645#(= ~ldv_state_variable_3~0 0)} is VALID [2022-02-20 21:47:35,960 INFO L290 TraceCheckUtils]: 7: Hoare triple {9645#(= ~ldv_state_variable_3~0 0)} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet73#1 && main_#t~nondet73#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet73#1;havoc main_#t~nondet73#1;main_#t~switch74#1 := 0 == main_~tmp___2~1#1; {9644#false} is VALID [2022-02-20 21:47:35,960 INFO L290 TraceCheckUtils]: 8: Hoare triple {9644#false} assume !main_#t~switch74#1;main_#t~switch74#1 := main_#t~switch74#1 || 1 == main_~tmp___2~1#1; {9644#false} is VALID [2022-02-20 21:47:35,960 INFO L290 TraceCheckUtils]: 9: Hoare triple {9644#false} assume !main_#t~switch74#1;main_#t~switch74#1 := main_#t~switch74#1 || 2 == main_~tmp___2~1#1; {9644#false} is VALID [2022-02-20 21:47:35,961 INFO L290 TraceCheckUtils]: 10: Hoare triple {9644#false} assume main_#t~switch74#1; {9644#false} is VALID [2022-02-20 21:47:35,961 INFO L290 TraceCheckUtils]: 11: Hoare triple {9644#false} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_isl6271a_set_voltage_sel } true;isl6271a_set_voltage_sel_#in~dev#1.base, isl6271a_set_voltage_sel_#in~dev#1.offset, isl6271a_set_voltage_sel_#in~selector#1 := ~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset, ~ldvarg1~0;havoc isl6271a_set_voltage_sel_#res#1;havoc isl6271a_set_voltage_sel_#t~ret45#1.base, isl6271a_set_voltage_sel_#t~ret45#1.offset, isl6271a_set_voltage_sel_#t~mem46#1.base, isl6271a_set_voltage_sel_#t~mem46#1.offset, isl6271a_set_voltage_sel_#t~ret47#1, isl6271a_set_voltage_sel_#t~nondet48#1, isl6271a_set_voltage_sel_#t~mem49#1.base, isl6271a_set_voltage_sel_#t~mem49#1.offset, isl6271a_set_voltage_sel_~dev#1.base, isl6271a_set_voltage_sel_~dev#1.offset, isl6271a_set_voltage_sel_~selector#1, isl6271a_set_voltage_sel_~pmic~1#1.base, isl6271a_set_voltage_sel_~pmic~1#1.offset, isl6271a_set_voltage_sel_~tmp~5#1.base, isl6271a_set_voltage_sel_~tmp~5#1.offset, isl6271a_set_voltage_sel_~err~0#1;isl6271a_set_voltage_sel_~dev#1.base, isl6271a_set_voltage_sel_~dev#1.offset := isl6271a_set_voltage_sel_#in~dev#1.base, isl6271a_set_voltage_sel_#in~dev#1.offset;isl6271a_set_voltage_sel_~selector#1 := isl6271a_set_voltage_sel_#in~selector#1;havoc isl6271a_set_voltage_sel_~pmic~1#1.base, isl6271a_set_voltage_sel_~pmic~1#1.offset;havoc isl6271a_set_voltage_sel_~tmp~5#1.base, isl6271a_set_voltage_sel_~tmp~5#1.offset;havoc isl6271a_set_voltage_sel_~err~0#1; {9644#false} is VALID [2022-02-20 21:47:35,961 INFO L272 TraceCheckUtils]: 12: Hoare triple {9644#false} call isl6271a_set_voltage_sel_#t~ret45#1.base, isl6271a_set_voltage_sel_#t~ret45#1.offset := rdev_get_drvdata(isl6271a_set_voltage_sel_~dev#1.base, isl6271a_set_voltage_sel_~dev#1.offset); {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:35,961 INFO L290 TraceCheckUtils]: 13: Hoare triple {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {9643#true} is VALID [2022-02-20 21:47:35,962 INFO L272 TraceCheckUtils]: 14: Hoare triple {9643#true} call #t~ret116.base, #t~ret116.offset := ldv_malloc(0); {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:35,962 INFO L290 TraceCheckUtils]: 15: Hoare triple {9663#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1; {9643#true} is VALID [2022-02-20 21:47:35,962 INFO L290 TraceCheckUtils]: 16: Hoare triple {9643#true} assume 0 != #t~nondet106#1 % 256;havoc #t~nondet106#1;#res#1.base, #res#1.offset := 0, 0; {9643#true} is VALID [2022-02-20 21:47:35,963 INFO L290 TraceCheckUtils]: 17: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,963 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {9643#true} {9643#true} #494#return; {9643#true} is VALID [2022-02-20 21:47:35,963 INFO L290 TraceCheckUtils]: 19: Hoare triple {9643#true} #res.base, #res.offset := #t~ret116.base, #t~ret116.offset;havoc #t~ret116.base, #t~ret116.offset; {9643#true} is VALID [2022-02-20 21:47:35,963 INFO L290 TraceCheckUtils]: 20: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,963 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {9643#true} {9644#false} #464#return; {9644#false} is VALID [2022-02-20 21:47:35,964 INFO L290 TraceCheckUtils]: 22: Hoare triple {9644#false} isl6271a_set_voltage_sel_~tmp~5#1.base, isl6271a_set_voltage_sel_~tmp~5#1.offset := isl6271a_set_voltage_sel_#t~ret45#1.base, isl6271a_set_voltage_sel_#t~ret45#1.offset;havoc isl6271a_set_voltage_sel_#t~ret45#1.base, isl6271a_set_voltage_sel_#t~ret45#1.offset;isl6271a_set_voltage_sel_~pmic~1#1.base, isl6271a_set_voltage_sel_~pmic~1#1.offset := isl6271a_set_voltage_sel_~tmp~5#1.base, isl6271a_set_voltage_sel_~tmp~5#1.offset;assume { :begin_inline_ldv_mutex_lock_10 } true;ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset := isl6271a_set_voltage_sel_~pmic~1#1.base, 32 + isl6271a_set_voltage_sel_~pmic~1#1.offset;havoc ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset;ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset := ldv_mutex_lock_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_10_#in~ldv_func_arg1#1.offset; {9644#false} is VALID [2022-02-20 21:47:35,964 INFO L272 TraceCheckUtils]: 23: Hoare triple {9644#false} call ldv_mutex_lock_mtx_of_isl_pmic(ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset); {9668#(= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|)} is VALID [2022-02-20 21:47:35,964 INFO L290 TraceCheckUtils]: 24: Hoare triple {9668#(= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {9643#true} is VALID [2022-02-20 21:47:35,964 INFO L290 TraceCheckUtils]: 25: Hoare triple {9643#true} assume 1 == ~ldv_mutex_mtx_of_isl_pmic~0; {9643#true} is VALID [2022-02-20 21:47:35,964 INFO L290 TraceCheckUtils]: 26: Hoare triple {9643#true} ~ldv_mutex_mtx_of_isl_pmic~0 := 2; {9643#true} is VALID [2022-02-20 21:47:35,965 INFO L290 TraceCheckUtils]: 27: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,965 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9643#true} {9644#false} #466#return; {9644#false} is VALID [2022-02-20 21:47:35,965 INFO L272 TraceCheckUtils]: 29: Hoare triple {9644#false} call mutex_lock(ldv_mutex_lock_10_~ldv_func_arg1#1.base, ldv_mutex_lock_10_~ldv_func_arg1#1.offset); {9643#true} is VALID [2022-02-20 21:47:35,965 INFO L290 TraceCheckUtils]: 30: Hoare triple {9643#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {9643#true} is VALID [2022-02-20 21:47:35,965 INFO L290 TraceCheckUtils]: 31: Hoare triple {9643#true} assume true; {9643#true} is VALID [2022-02-20 21:47:35,965 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {9643#true} {9644#false} #468#return; {9644#false} is VALID [2022-02-20 21:47:35,966 INFO L290 TraceCheckUtils]: 33: Hoare triple {9644#false} assume { :end_inline_ldv_mutex_lock_10 } true;call isl6271a_set_voltage_sel_#t~mem46#1.base, isl6271a_set_voltage_sel_#t~mem46#1.offset := read~$Pointer$(isl6271a_set_voltage_sel_~pmic~1#1.base, isl6271a_set_voltage_sel_~pmic~1#1.offset, 8);assume { :begin_inline_i2c_smbus_write_byte } true;i2c_smbus_write_byte_#in~arg0#1.base, i2c_smbus_write_byte_#in~arg0#1.offset, i2c_smbus_write_byte_#in~arg1#1 := isl6271a_set_voltage_sel_#t~mem46#1.base, isl6271a_set_voltage_sel_#t~mem46#1.offset, isl6271a_set_voltage_sel_~selector#1 % 256;havoc i2c_smbus_write_byte_#res#1;havoc i2c_smbus_write_byte_#t~nondet114#1, i2c_smbus_write_byte_~arg0#1.base, i2c_smbus_write_byte_~arg0#1.offset, i2c_smbus_write_byte_~arg1#1;i2c_smbus_write_byte_~arg0#1.base, i2c_smbus_write_byte_~arg0#1.offset := i2c_smbus_write_byte_#in~arg0#1.base, i2c_smbus_write_byte_#in~arg0#1.offset;i2c_smbus_write_byte_~arg1#1 := i2c_smbus_write_byte_#in~arg1#1;assume -2147483648 <= i2c_smbus_write_byte_#t~nondet114#1 && i2c_smbus_write_byte_#t~nondet114#1 <= 2147483647;i2c_smbus_write_byte_#res#1 := i2c_smbus_write_byte_#t~nondet114#1;havoc i2c_smbus_write_byte_#t~nondet114#1; {9644#false} is VALID [2022-02-20 21:47:35,966 INFO L290 TraceCheckUtils]: 34: Hoare triple {9644#false} isl6271a_set_voltage_sel_#t~ret47#1 := i2c_smbus_write_byte_#res#1;assume { :end_inline_i2c_smbus_write_byte } true;assume -2147483648 <= isl6271a_set_voltage_sel_#t~ret47#1 && isl6271a_set_voltage_sel_#t~ret47#1 <= 2147483647;isl6271a_set_voltage_sel_~err~0#1 := isl6271a_set_voltage_sel_#t~ret47#1;havoc isl6271a_set_voltage_sel_#t~mem46#1.base, isl6271a_set_voltage_sel_#t~mem46#1.offset;havoc isl6271a_set_voltage_sel_#t~ret47#1; {9644#false} is VALID [2022-02-20 21:47:35,966 INFO L290 TraceCheckUtils]: 35: Hoare triple {9644#false} assume isl6271a_set_voltage_sel_~err~0#1 < 0;havoc isl6271a_set_voltage_sel_#t~nondet48#1;call isl6271a_set_voltage_sel_#t~mem49#1.base, isl6271a_set_voltage_sel_#t~mem49#1.offset := read~$Pointer$(isl6271a_set_voltage_sel_~pmic~1#1.base, isl6271a_set_voltage_sel_~pmic~1#1.offset, 8);havoc isl6271a_set_voltage_sel_#t~mem49#1.base, isl6271a_set_voltage_sel_#t~mem49#1.offset; {9644#false} is VALID [2022-02-20 21:47:35,966 INFO L290 TraceCheckUtils]: 36: Hoare triple {9644#false} assume { :begin_inline_ldv_mutex_unlock_11 } true;ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset := isl6271a_set_voltage_sel_~pmic~1#1.base, 32 + isl6271a_set_voltage_sel_~pmic~1#1.offset;havoc ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset;ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset := ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset; {9644#false} is VALID [2022-02-20 21:47:35,967 INFO L272 TraceCheckUtils]: 37: Hoare triple {9644#false} call ldv_mutex_unlock_mtx_of_isl_pmic(ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset); {9644#false} is VALID [2022-02-20 21:47:35,967 INFO L290 TraceCheckUtils]: 38: Hoare triple {9644#false} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {9644#false} is VALID [2022-02-20 21:47:35,967 INFO L290 TraceCheckUtils]: 39: Hoare triple {9644#false} assume !(2 == ~ldv_mutex_mtx_of_isl_pmic~0); {9644#false} is VALID [2022-02-20 21:47:35,967 INFO L272 TraceCheckUtils]: 40: Hoare triple {9644#false} call ldv_error(); {9644#false} is VALID [2022-02-20 21:47:35,967 INFO L290 TraceCheckUtils]: 41: Hoare triple {9644#false} assume !false; {9644#false} is VALID [2022-02-20 21:47:35,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-20 21:47:35,968 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:35,968 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309106914] [2022-02-20 21:47:35,968 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [309106914] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:35,968 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:35,968 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:47:35,969 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763669221] [2022-02-20 21:47:35,969 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:35,969 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 42 [2022-02-20 21:47:35,970 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:35,970 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:36,017 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:36,018 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:47:36,018 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:36,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:47:36,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:47:36,019 INFO L87 Difference]: Start difference. First operand 303 states and 407 transitions. Second operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:37,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:37,343 INFO L93 Difference]: Finished difference Result 797 states and 1084 transitions. [2022-02-20 21:47:37,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-02-20 21:47:37,344 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 42 [2022-02-20 21:47:37,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:37,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:37,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 555 transitions. [2022-02-20 21:47:37,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:37,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 555 transitions. [2022-02-20 21:47:37,355 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 555 transitions. [2022-02-20 21:47:37,798 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 555 edges. 555 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:37,817 INFO L225 Difference]: With dead ends: 797 [2022-02-20 21:47:37,817 INFO L226 Difference]: Without dead ends: 497 [2022-02-20 21:47:37,818 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:47:37,819 INFO L933 BasicCegarLoop]: 212 mSDtfsCounter, 193 mSDsluCounter, 407 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 68 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 619 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 68 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:37,819 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [204 Valid, 619 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [68 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-02-20 21:47:37,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2022-02-20 21:47:37,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 483. [2022-02-20 21:47:37,838 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:37,839 INFO L82 GeneralOperation]: Start isEquivalent. First operand 497 states. Second operand has 483 states, 399 states have (on average 1.3508771929824561) internal successors, (539), 399 states have internal predecessors, (539), 57 states have call successors, (57), 27 states have call predecessors, (57), 26 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) [2022-02-20 21:47:37,840 INFO L74 IsIncluded]: Start isIncluded. First operand 497 states. Second operand has 483 states, 399 states have (on average 1.3508771929824561) internal successors, (539), 399 states have internal predecessors, (539), 57 states have call successors, (57), 27 states have call predecessors, (57), 26 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) [2022-02-20 21:47:37,841 INFO L87 Difference]: Start difference. First operand 497 states. Second operand has 483 states, 399 states have (on average 1.3508771929824561) internal successors, (539), 399 states have internal predecessors, (539), 57 states have call successors, (57), 27 states have call predecessors, (57), 26 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) [2022-02-20 21:47:37,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:37,858 INFO L93 Difference]: Finished difference Result 497 states and 678 transitions. [2022-02-20 21:47:37,858 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 678 transitions. [2022-02-20 21:47:37,859 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:37,860 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:37,861 INFO L74 IsIncluded]: Start isIncluded. First operand has 483 states, 399 states have (on average 1.3508771929824561) internal successors, (539), 399 states have internal predecessors, (539), 57 states have call successors, (57), 27 states have call predecessors, (57), 26 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) Second operand 497 states. [2022-02-20 21:47:37,862 INFO L87 Difference]: Start difference. First operand has 483 states, 399 states have (on average 1.3508771929824561) internal successors, (539), 399 states have internal predecessors, (539), 57 states have call successors, (57), 27 states have call predecessors, (57), 26 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) Second operand 497 states. [2022-02-20 21:47:37,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:37,879 INFO L93 Difference]: Finished difference Result 497 states and 678 transitions. [2022-02-20 21:47:37,879 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 678 transitions. [2022-02-20 21:47:37,881 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:37,881 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:37,881 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:37,881 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:37,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 483 states, 399 states have (on average 1.3508771929824561) internal successors, (539), 399 states have internal predecessors, (539), 57 states have call successors, (57), 27 states have call predecessors, (57), 26 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56) [2022-02-20 21:47:37,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 483 states to 483 states and 652 transitions. [2022-02-20 21:47:37,903 INFO L78 Accepts]: Start accepts. Automaton has 483 states and 652 transitions. Word has length 42 [2022-02-20 21:47:37,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:37,903 INFO L470 AbstractCegarLoop]: Abstraction has 483 states and 652 transitions. [2022-02-20 21:47:37,903 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.4) internal successors, (32), 3 states have internal predecessors, (32), 2 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:37,904 INFO L276 IsEmpty]: Start isEmpty. Operand 483 states and 652 transitions. [2022-02-20 21:47:37,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-02-20 21:47:37,906 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:47:37,906 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:37,906 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-02-20 21:47:37,906 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:47:37,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:47:37,907 INFO L85 PathProgramCache]: Analyzing trace with hash 1862651461, now seen corresponding path program 1 times [2022-02-20 21:47:37,907 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:47:37,907 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820296777] [2022-02-20 21:47:37,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:47:37,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:47:37,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:37,980 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-02-20 21:47:37,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:37,986 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:47:37,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:37,991 INFO L290 TraceCheckUtils]: 0: Hoare triple {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1; {12478#true} is VALID [2022-02-20 21:47:37,991 INFO L290 TraceCheckUtils]: 1: Hoare triple {12478#true} assume 0 != #t~nondet106#1 % 256;havoc #t~nondet106#1;#res#1.base, #res#1.offset := 0, 0; {12478#true} is VALID [2022-02-20 21:47:37,991 INFO L290 TraceCheckUtils]: 2: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:37,991 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12478#true} {12478#true} #494#return; {12478#true} is VALID [2022-02-20 21:47:37,992 INFO L290 TraceCheckUtils]: 0: Hoare triple {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {12478#true} is VALID [2022-02-20 21:47:37,992 INFO L272 TraceCheckUtils]: 1: Hoare triple {12478#true} call #t~ret116.base, #t~ret116.offset := ldv_malloc(0); {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:37,993 INFO L290 TraceCheckUtils]: 2: Hoare triple {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1; {12478#true} is VALID [2022-02-20 21:47:37,993 INFO L290 TraceCheckUtils]: 3: Hoare triple {12478#true} assume 0 != #t~nondet106#1 % 256;havoc #t~nondet106#1;#res#1.base, #res#1.offset := 0, 0; {12478#true} is VALID [2022-02-20 21:47:37,993 INFO L290 TraceCheckUtils]: 4: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:37,993 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {12478#true} {12478#true} #494#return; {12478#true} is VALID [2022-02-20 21:47:37,993 INFO L290 TraceCheckUtils]: 6: Hoare triple {12478#true} #res.base, #res.offset := #t~ret116.base, #t~ret116.offset;havoc #t~ret116.base, #t~ret116.offset; {12478#true} is VALID [2022-02-20 21:47:37,993 INFO L290 TraceCheckUtils]: 7: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:37,994 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {12478#true} {12478#true} #474#return; {12478#true} is VALID [2022-02-20 21:47:37,998 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-02-20 21:47:38,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:38,008 INFO L290 TraceCheckUtils]: 0: Hoare triple {12503#(= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {12478#true} is VALID [2022-02-20 21:47:38,009 INFO L290 TraceCheckUtils]: 1: Hoare triple {12478#true} assume 1 == ~ldv_mutex_mtx_of_isl_pmic~0; {12478#true} is VALID [2022-02-20 21:47:38,009 INFO L290 TraceCheckUtils]: 2: Hoare triple {12478#true} ~ldv_mutex_mtx_of_isl_pmic~0 := 2; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,010 INFO L290 TraceCheckUtils]: 3: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} assume true; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,010 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} {12478#true} #476#return; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,011 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 41 [2022-02-20 21:47:38,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:47:38,016 INFO L290 TraceCheckUtils]: 0: Hoare triple {12478#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {12478#true} is VALID [2022-02-20 21:47:38,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:38,017 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12478#true} {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} #478#return; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,017 INFO L290 TraceCheckUtils]: 0: Hoare triple {12478#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(84, 2);call #Ultimate.allocInit(23, 3);call #Ultimate.allocInit(23, 4);call #Ultimate.allocInit(10, 5);call #Ultimate.allocInit(5, 6);call write~init~int(76, 6, 0, 1);call write~init~int(68, 6, 1, 1);call write~init~int(79, 6, 2, 1);call write~init~int(49, 6, 3, 1);call write~init~int(0, 6, 4, 1);call #Ultimate.allocInit(5, 7);call write~init~int(76, 7, 0, 1);call write~init~int(68, 7, 1, 1);call write~init~int(79, 7, 2, 1);call write~init~int(50, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(11, 8);call #Ultimate.allocInit(23, 9);call #Ultimate.allocInit(9, 10);~ldv_state_variable_3~0 := 0;~ldv_state_variable_1~0 := 0;~ldv_state_variable_2~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 0;~#isl_core_ops~0.base, ~#isl_core_ops~0.offset := 11, 0;call #Ultimate.allocInit(192, 11);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 8 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~regulator_map_voltage_linear.base, #funAddr~regulator_map_voltage_linear.offset, ~#isl_core_ops~0.base, 16 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_set_voltage_sel.base, #funAddr~isl6271a_set_voltage_sel.offset, ~#isl_core_ops~0.base, 24 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 32 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_get_voltage_sel.base, #funAddr~isl6271a_get_voltage_sel.offset, ~#isl_core_ops~0.base, 40 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 48 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 56 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 64 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 72 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 80 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 88 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 96 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 104 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 112 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 120 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 128 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 136 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 144 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 152 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 160 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 168 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 176 + ~#isl_core_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_core_ops~0.base, 184 + ~#isl_core_ops~0.offset, 8);~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset := 12, 0;call #Ultimate.allocInit(192, 12);call write~init~$Pointer$(#funAddr~regulator_list_voltage_linear.base, #funAddr~regulator_list_voltage_linear.offset, ~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 8 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 16 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 24 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 32 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 40 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 48 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 56 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 64 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 72 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 80 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 88 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 96 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 104 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 112 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 120 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 128 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 136 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 144 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 152 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 160 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 168 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 176 + ~#isl_fixed_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_fixed_ops~0.base, 184 + ~#isl_fixed_ops~0.offset, 8);~#isl_rd~0.base, ~#isl_rd~0.offset := 13, 0;call #Ultimate.allocInit(303, 13);call write~init~$Pointer$(5, 0, ~#isl_rd~0.base, ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 8 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 16 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 20 + ~#isl_rd~0.offset, 1);call write~init~int(16, ~#isl_rd~0.base, 21 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_core_ops~0.base, ~#isl_core_ops~0.offset, ~#isl_rd~0.base, 25 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 33 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 37 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 41 + ~#isl_rd~0.offset, 8);call write~init~int(850000, ~#isl_rd~0.base, 49 + ~#isl_rd~0.offset, 4);call write~init~int(50000, ~#isl_rd~0.base, 53 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 57 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 61 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 65 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 73 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 77 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 81 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 85 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 89 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 93 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 97 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(6, 0, ~#isl_rd~0.base, 101 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 109 + ~#isl_rd~0.offset, 8);call write~init~int(1, ~#isl_rd~0.base, 117 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 121 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 122 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 126 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 134 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 138 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 142 + ~#isl_rd~0.offset, 8);call write~init~int(1100000, ~#isl_rd~0.base, 150 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 154 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 158 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 162 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 166 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 174 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 178 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 182 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 186 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 190 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 194 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 198 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(7, 0, ~#isl_rd~0.base, 202 + ~#isl_rd~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 210 + ~#isl_rd~0.offset, 8);call write~init~int(2, ~#isl_rd~0.base, 218 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 222 + ~#isl_rd~0.offset, 1);call write~init~int(1, ~#isl_rd~0.base, 223 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#isl_fixed_ops~0.base, ~#isl_fixed_ops~0.offset, ~#isl_rd~0.base, 227 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 235 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 239 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl_rd~0.base, 243 + ~#isl_rd~0.offset, 8);call write~init~int(1300000, ~#isl_rd~0.base, 251 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 255 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 259 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 263 + ~#isl_rd~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl_rd~0.base, 267 + ~#isl_rd~0.offset, 8);call write~init~int(0, ~#isl_rd~0.base, 275 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 279 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 283 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 287 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 291 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 295 + ~#isl_rd~0.offset, 4);call write~init~int(0, ~#isl_rd~0.base, 299 + ~#isl_rd~0.offset, 4);~#isl6271a_id~0.base, ~#isl6271a_id~0.offset := 14, 0;call #Ultimate.allocInit(56, 14);call write~init~int(105, ~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, 1);call write~init~int(115, ~#isl6271a_id~0.base, 1 + ~#isl6271a_id~0.offset, 1);call write~init~int(108, ~#isl6271a_id~0.base, 2 + ~#isl6271a_id~0.offset, 1);call write~init~int(54, ~#isl6271a_id~0.base, 3 + ~#isl6271a_id~0.offset, 1);call write~init~int(50, ~#isl6271a_id~0.base, 4 + ~#isl6271a_id~0.offset, 1);call write~init~int(55, ~#isl6271a_id~0.base, 5 + ~#isl6271a_id~0.offset, 1);call write~init~int(49, ~#isl6271a_id~0.base, 6 + ~#isl6271a_id~0.offset, 1);call write~init~int(97, ~#isl6271a_id~0.base, 7 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 8 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 9 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 10 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 11 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 12 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 13 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 14 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 15 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 16 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 17 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 18 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 19 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 20 + ~#isl6271a_id~0.offset, 8);call write~init~int(0, ~#isl6271a_id~0.base, 28 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 29 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 30 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 31 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 32 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 33 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 34 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 35 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 36 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 37 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 38 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 39 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 40 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 41 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 42 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 43 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 44 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 45 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 46 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 47 + ~#isl6271a_id~0.offset, 1);call write~init~int(0, ~#isl6271a_id~0.base, 48 + ~#isl6271a_id~0.offset, 8);~__mod_i2c_device_table~0.name := ~const~array~~LB~int~RB~int();~__mod_i2c_device_table~0.driver_data := 0;~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset := 15, 0;call #Ultimate.allocInit(229, 15);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 4 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 12 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_probe.base, #funAddr~isl6271a_probe.offset, ~#isl6271a_i2c_driver~0.base, 20 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~isl6271a_remove.base, #funAddr~isl6271a_remove.offset, ~#isl6271a_i2c_driver~0.base, 28 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 36 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 44 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 52 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 60 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 68 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(10, 0, ~#isl6271a_i2c_driver~0.base, 76 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 84 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, 92 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 100 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~int(0, ~#isl6271a_i2c_driver~0.base, 108 + ~#isl6271a_i2c_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 109 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 117 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 125 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 133 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 141 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 149 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 157 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 165 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 173 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 181 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(~#isl6271a_id~0.base, ~#isl6271a_id~0.offset, ~#isl6271a_i2c_driver~0.base, 189 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 197 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 205 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 213 + ~#isl6271a_i2c_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#isl6271a_i2c_driver~0.base, 221 + ~#isl6271a_i2c_driver~0.offset, 8);~ldvarg3~0 := 0;~ldvarg0~0.base, ~ldvarg0~0.offset := 0, 0;~isl6271a_i2c_driver_group0~0.base, ~isl6271a_i2c_driver_group0~0.offset := 0, 0;~ldvarg5~0.base, ~ldvarg5~0.offset := 0, 0;~ldvarg6~0 := 0;~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset := 0, 0;~ldvarg1~0 := 0;~ldv_retval_0~0 := 0;~ldvarg4~0 := 0;~ldv_retval_1~0 := 0;~ldvarg2~0 := 0;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 0;~ldv_mutex_lock~0 := 0;~ldv_mutex_mtx_of_isl_pmic~0 := 0;~ldv_mutex_mutex_of_device~0 := 0; {12478#true} is VALID [2022-02-20 21:47:38,017 INFO L290 TraceCheckUtils]: 1: Hoare triple {12478#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet64#1, main_#t~switch65#1, main_#t~nondet66#1, main_#t~switch67#1, main_#t~ret68#1, main_#t~ret69#1, main_#t~nondet70#1, main_#t~switch71#1, main_#t~ret72#1, main_#t~nondet73#1, main_#t~switch74#1, main_#t~ret75#1, main_#t~ret76#1, main_#t~ret77#1, main_#t~ret78#1, main_#t~nondet79#1, main_#t~switch80#1, main_#t~ret81#1, main_~tmp~9#1, main_~tmp___0~1#1, main_~tmp___1~1#1, main_~tmp___2~1#1, main_~tmp___3~0#1;havoc main_~tmp~9#1;havoc main_~tmp___0~1#1;havoc main_~tmp___1~1#1;havoc main_~tmp___2~1#1;havoc main_~tmp___3~0#1;assume { :begin_inline_ldv_initialize } true;~ldv_mutex_cred_guard_mutex_of_signal_struct~0 := 1;~ldv_mutex_lock~0 := 1;~ldv_mutex_mtx_of_isl_pmic~0 := 1;~ldv_mutex_mutex_of_device~0 := 1; {12478#true} is VALID [2022-02-20 21:47:38,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {12478#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {12478#true} is VALID [2022-02-20 21:47:38,018 INFO L290 TraceCheckUtils]: 3: Hoare triple {12478#true} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {12478#true} is VALID [2022-02-20 21:47:38,018 INFO L290 TraceCheckUtils]: 4: Hoare triple {12478#true} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {12478#true} is VALID [2022-02-20 21:47:38,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {12478#true} assume main_#t~switch65#1; {12478#true} is VALID [2022-02-20 21:47:38,018 INFO L290 TraceCheckUtils]: 6: Hoare triple {12478#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet70#1 && main_#t~nondet70#1 <= 2147483647;main_~tmp___1~1#1 := main_#t~nondet70#1;havoc main_#t~nondet70#1;main_#t~switch71#1 := 0 == main_~tmp___1~1#1; {12478#true} is VALID [2022-02-20 21:47:38,019 INFO L290 TraceCheckUtils]: 7: Hoare triple {12478#true} assume !main_#t~switch71#1;main_#t~switch71#1 := main_#t~switch71#1 || 1 == main_~tmp___1~1#1; {12478#true} is VALID [2022-02-20 21:47:38,019 INFO L290 TraceCheckUtils]: 8: Hoare triple {12478#true} assume main_#t~switch71#1; {12478#true} is VALID [2022-02-20 21:47:38,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {12478#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_isl6271a_init } true;havoc isl6271a_init_#res#1;havoc isl6271a_init_#t~ret63#1, isl6271a_init_~tmp~8#1;havoc isl6271a_init_~tmp~8#1;assume { :begin_inline_i2c_register_driver } true;i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset, i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset := ~#__this_module~0.base, ~#__this_module~0.offset, ~#isl6271a_i2c_driver~0.base, ~#isl6271a_i2c_driver~0.offset;havoc i2c_register_driver_#res#1;havoc i2c_register_driver_#t~nondet112#1, i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset, i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset;i2c_register_driver_~arg0#1.base, i2c_register_driver_~arg0#1.offset := i2c_register_driver_#in~arg0#1.base, i2c_register_driver_#in~arg0#1.offset;i2c_register_driver_~arg1#1.base, i2c_register_driver_~arg1#1.offset := i2c_register_driver_#in~arg1#1.base, i2c_register_driver_#in~arg1#1.offset;assume -2147483648 <= i2c_register_driver_#t~nondet112#1 && i2c_register_driver_#t~nondet112#1 <= 2147483647;i2c_register_driver_#res#1 := i2c_register_driver_#t~nondet112#1;havoc i2c_register_driver_#t~nondet112#1; {12478#true} is VALID [2022-02-20 21:47:38,019 INFO L290 TraceCheckUtils]: 10: Hoare triple {12478#true} isl6271a_init_#t~ret63#1 := i2c_register_driver_#res#1;assume { :end_inline_i2c_register_driver } true;assume -2147483648 <= isl6271a_init_#t~ret63#1 && isl6271a_init_#t~ret63#1 <= 2147483647;isl6271a_init_~tmp~8#1 := isl6271a_init_#t~ret63#1;havoc isl6271a_init_#t~ret63#1;isl6271a_init_#res#1 := isl6271a_init_~tmp~8#1; {12478#true} is VALID [2022-02-20 21:47:38,019 INFO L290 TraceCheckUtils]: 11: Hoare triple {12478#true} main_#t~ret72#1 := isl6271a_init_#res#1;assume { :end_inline_isl6271a_init } true;assume -2147483648 <= main_#t~ret72#1 && main_#t~ret72#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret72#1;havoc main_#t~ret72#1; {12478#true} is VALID [2022-02-20 21:47:38,020 INFO L290 TraceCheckUtils]: 12: Hoare triple {12478#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;~ldv_state_variable_3~0 := 1;~ldv_state_variable_1~0 := 1; {12478#true} is VALID [2022-02-20 21:47:38,020 INFO L290 TraceCheckUtils]: 13: Hoare triple {12478#true} assume !(0 != ~ldv_retval_1~0); {12478#true} is VALID [2022-02-20 21:47:38,020 INFO L290 TraceCheckUtils]: 14: Hoare triple {12478#true} assume -2147483648 <= main_#t~nondet64#1 && main_#t~nondet64#1 <= 2147483647;main_~tmp~9#1 := main_#t~nondet64#1;havoc main_#t~nondet64#1;main_#t~switch65#1 := 0 == main_~tmp~9#1; {12478#true} is VALID [2022-02-20 21:47:38,020 INFO L290 TraceCheckUtils]: 15: Hoare triple {12478#true} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 1 == main_~tmp~9#1; {12478#true} is VALID [2022-02-20 21:47:38,020 INFO L290 TraceCheckUtils]: 16: Hoare triple {12478#true} assume !main_#t~switch65#1;main_#t~switch65#1 := main_#t~switch65#1 || 2 == main_~tmp~9#1; {12478#true} is VALID [2022-02-20 21:47:38,020 INFO L290 TraceCheckUtils]: 17: Hoare triple {12478#true} assume main_#t~switch65#1; {12478#true} is VALID [2022-02-20 21:47:38,021 INFO L290 TraceCheckUtils]: 18: Hoare triple {12478#true} assume 0 != ~ldv_state_variable_3~0;assume -2147483648 <= main_#t~nondet73#1 && main_#t~nondet73#1 <= 2147483647;main_~tmp___2~1#1 := main_#t~nondet73#1;havoc main_#t~nondet73#1;main_#t~switch74#1 := 0 == main_~tmp___2~1#1; {12478#true} is VALID [2022-02-20 21:47:38,021 INFO L290 TraceCheckUtils]: 19: Hoare triple {12478#true} assume !main_#t~switch74#1;main_#t~switch74#1 := main_#t~switch74#1 || 1 == main_~tmp___2~1#1; {12478#true} is VALID [2022-02-20 21:47:38,021 INFO L290 TraceCheckUtils]: 20: Hoare triple {12478#true} assume !main_#t~switch74#1;main_#t~switch74#1 := main_#t~switch74#1 || 2 == main_~tmp___2~1#1; {12478#true} is VALID [2022-02-20 21:47:38,021 INFO L290 TraceCheckUtils]: 21: Hoare triple {12478#true} assume !main_#t~switch74#1;main_#t~switch74#1 := main_#t~switch74#1 || 3 == main_~tmp___2~1#1; {12478#true} is VALID [2022-02-20 21:47:38,021 INFO L290 TraceCheckUtils]: 22: Hoare triple {12478#true} assume main_#t~switch74#1; {12478#true} is VALID [2022-02-20 21:47:38,022 INFO L290 TraceCheckUtils]: 23: Hoare triple {12478#true} assume 1 == ~ldv_state_variable_3~0;assume { :begin_inline_isl6271a_get_voltage_sel } true;isl6271a_get_voltage_sel_#in~dev#1.base, isl6271a_get_voltage_sel_#in~dev#1.offset := ~isl_core_ops_group0~0.base, ~isl_core_ops_group0~0.offset;havoc isl6271a_get_voltage_sel_#res#1;havoc isl6271a_get_voltage_sel_#t~ret40#1.base, isl6271a_get_voltage_sel_#t~ret40#1.offset, isl6271a_get_voltage_sel_#t~mem41#1.base, isl6271a_get_voltage_sel_#t~mem41#1.offset, isl6271a_get_voltage_sel_#t~ret42#1, isl6271a_get_voltage_sel_#t~nondet43#1, isl6271a_get_voltage_sel_#t~mem44#1.base, isl6271a_get_voltage_sel_#t~mem44#1.offset, isl6271a_get_voltage_sel_~dev#1.base, isl6271a_get_voltage_sel_~dev#1.offset, isl6271a_get_voltage_sel_~pmic~0#1.base, isl6271a_get_voltage_sel_~pmic~0#1.offset, isl6271a_get_voltage_sel_~tmp~4#1.base, isl6271a_get_voltage_sel_~tmp~4#1.offset, isl6271a_get_voltage_sel_~idx~0#1;isl6271a_get_voltage_sel_~dev#1.base, isl6271a_get_voltage_sel_~dev#1.offset := isl6271a_get_voltage_sel_#in~dev#1.base, isl6271a_get_voltage_sel_#in~dev#1.offset;havoc isl6271a_get_voltage_sel_~pmic~0#1.base, isl6271a_get_voltage_sel_~pmic~0#1.offset;havoc isl6271a_get_voltage_sel_~tmp~4#1.base, isl6271a_get_voltage_sel_~tmp~4#1.offset;havoc isl6271a_get_voltage_sel_~idx~0#1; {12478#true} is VALID [2022-02-20 21:47:38,023 INFO L272 TraceCheckUtils]: 24: Hoare triple {12478#true} call isl6271a_get_voltage_sel_#t~ret40#1.base, isl6271a_get_voltage_sel_#t~ret40#1.offset := rdev_get_drvdata(isl6271a_get_voltage_sel_~dev#1.base, isl6271a_get_voltage_sel_~dev#1.offset); {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:38,023 INFO L290 TraceCheckUtils]: 25: Hoare triple {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {12478#true} is VALID [2022-02-20 21:47:38,023 INFO L272 TraceCheckUtils]: 26: Hoare triple {12478#true} call #t~ret116.base, #t~ret116.offset := ldv_malloc(0); {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:47:38,023 INFO L290 TraceCheckUtils]: 27: Hoare triple {12498#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1; {12478#true} is VALID [2022-02-20 21:47:38,024 INFO L290 TraceCheckUtils]: 28: Hoare triple {12478#true} assume 0 != #t~nondet106#1 % 256;havoc #t~nondet106#1;#res#1.base, #res#1.offset := 0, 0; {12478#true} is VALID [2022-02-20 21:47:38,024 INFO L290 TraceCheckUtils]: 29: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:38,024 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {12478#true} {12478#true} #494#return; {12478#true} is VALID [2022-02-20 21:47:38,024 INFO L290 TraceCheckUtils]: 31: Hoare triple {12478#true} #res.base, #res.offset := #t~ret116.base, #t~ret116.offset;havoc #t~ret116.base, #t~ret116.offset; {12478#true} is VALID [2022-02-20 21:47:38,024 INFO L290 TraceCheckUtils]: 32: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:38,024 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {12478#true} {12478#true} #474#return; {12478#true} is VALID [2022-02-20 21:47:38,025 INFO L290 TraceCheckUtils]: 34: Hoare triple {12478#true} isl6271a_get_voltage_sel_~tmp~4#1.base, isl6271a_get_voltage_sel_~tmp~4#1.offset := isl6271a_get_voltage_sel_#t~ret40#1.base, isl6271a_get_voltage_sel_#t~ret40#1.offset;havoc isl6271a_get_voltage_sel_#t~ret40#1.base, isl6271a_get_voltage_sel_#t~ret40#1.offset;isl6271a_get_voltage_sel_~pmic~0#1.base, isl6271a_get_voltage_sel_~pmic~0#1.offset := isl6271a_get_voltage_sel_~tmp~4#1.base, isl6271a_get_voltage_sel_~tmp~4#1.offset;assume { :begin_inline_ldv_mutex_lock_8 } true;ldv_mutex_lock_8_#in~ldv_func_arg1#1.base, ldv_mutex_lock_8_#in~ldv_func_arg1#1.offset := isl6271a_get_voltage_sel_~pmic~0#1.base, 32 + isl6271a_get_voltage_sel_~pmic~0#1.offset;havoc ldv_mutex_lock_8_~ldv_func_arg1#1.base, ldv_mutex_lock_8_~ldv_func_arg1#1.offset;ldv_mutex_lock_8_~ldv_func_arg1#1.base, ldv_mutex_lock_8_~ldv_func_arg1#1.offset := ldv_mutex_lock_8_#in~ldv_func_arg1#1.base, ldv_mutex_lock_8_#in~ldv_func_arg1#1.offset; {12478#true} is VALID [2022-02-20 21:47:38,025 INFO L272 TraceCheckUtils]: 35: Hoare triple {12478#true} call ldv_mutex_lock_mtx_of_isl_pmic(ldv_mutex_lock_8_~ldv_func_arg1#1.base, ldv_mutex_lock_8_~ldv_func_arg1#1.offset); {12503#(= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|)} is VALID [2022-02-20 21:47:38,026 INFO L290 TraceCheckUtils]: 36: Hoare triple {12503#(= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {12478#true} is VALID [2022-02-20 21:47:38,026 INFO L290 TraceCheckUtils]: 37: Hoare triple {12478#true} assume 1 == ~ldv_mutex_mtx_of_isl_pmic~0; {12478#true} is VALID [2022-02-20 21:47:38,026 INFO L290 TraceCheckUtils]: 38: Hoare triple {12478#true} ~ldv_mutex_mtx_of_isl_pmic~0 := 2; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,027 INFO L290 TraceCheckUtils]: 39: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} assume true; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,027 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} {12478#true} #476#return; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,028 INFO L272 TraceCheckUtils]: 41: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} call mutex_lock(ldv_mutex_lock_8_~ldv_func_arg1#1.base, ldv_mutex_lock_8_~ldv_func_arg1#1.offset); {12478#true} is VALID [2022-02-20 21:47:38,028 INFO L290 TraceCheckUtils]: 42: Hoare triple {12478#true} ~arg0.base, ~arg0.offset := #in~arg0.base, #in~arg0.offset; {12478#true} is VALID [2022-02-20 21:47:38,028 INFO L290 TraceCheckUtils]: 43: Hoare triple {12478#true} assume true; {12478#true} is VALID [2022-02-20 21:47:38,028 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12478#true} {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} #478#return; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,029 INFO L290 TraceCheckUtils]: 45: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} assume { :end_inline_ldv_mutex_lock_8 } true;call isl6271a_get_voltage_sel_#t~mem41#1.base, isl6271a_get_voltage_sel_#t~mem41#1.offset := read~$Pointer$(isl6271a_get_voltage_sel_~pmic~0#1.base, isl6271a_get_voltage_sel_~pmic~0#1.offset, 8);assume { :begin_inline_i2c_smbus_read_byte } true;i2c_smbus_read_byte_#in~arg0#1.base, i2c_smbus_read_byte_#in~arg0#1.offset := isl6271a_get_voltage_sel_#t~mem41#1.base, isl6271a_get_voltage_sel_#t~mem41#1.offset;havoc i2c_smbus_read_byte_#res#1;havoc i2c_smbus_read_byte_#t~nondet113#1, i2c_smbus_read_byte_~arg0#1.base, i2c_smbus_read_byte_~arg0#1.offset;i2c_smbus_read_byte_~arg0#1.base, i2c_smbus_read_byte_~arg0#1.offset := i2c_smbus_read_byte_#in~arg0#1.base, i2c_smbus_read_byte_#in~arg0#1.offset;assume -2147483648 <= i2c_smbus_read_byte_#t~nondet113#1 && i2c_smbus_read_byte_#t~nondet113#1 <= 2147483647;i2c_smbus_read_byte_#res#1 := i2c_smbus_read_byte_#t~nondet113#1;havoc i2c_smbus_read_byte_#t~nondet113#1; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,030 INFO L290 TraceCheckUtils]: 46: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} isl6271a_get_voltage_sel_#t~ret42#1 := i2c_smbus_read_byte_#res#1;assume { :end_inline_i2c_smbus_read_byte } true;assume -2147483648 <= isl6271a_get_voltage_sel_#t~ret42#1 && isl6271a_get_voltage_sel_#t~ret42#1 <= 2147483647;isl6271a_get_voltage_sel_~idx~0#1 := isl6271a_get_voltage_sel_#t~ret42#1;havoc isl6271a_get_voltage_sel_#t~mem41#1.base, isl6271a_get_voltage_sel_#t~mem41#1.offset;havoc isl6271a_get_voltage_sel_#t~ret42#1; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,031 INFO L290 TraceCheckUtils]: 47: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} assume isl6271a_get_voltage_sel_~idx~0#1 < 0;havoc isl6271a_get_voltage_sel_#t~nondet43#1;call isl6271a_get_voltage_sel_#t~mem44#1.base, isl6271a_get_voltage_sel_#t~mem44#1.offset := read~$Pointer$(isl6271a_get_voltage_sel_~pmic~0#1.base, isl6271a_get_voltage_sel_~pmic~0#1.offset, 8);havoc isl6271a_get_voltage_sel_#t~mem44#1.base, isl6271a_get_voltage_sel_#t~mem44#1.offset; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,031 INFO L290 TraceCheckUtils]: 48: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} assume { :begin_inline_ldv_mutex_unlock_9 } true;ldv_mutex_unlock_9_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_9_#in~ldv_func_arg1#1.offset := isl6271a_get_voltage_sel_~pmic~0#1.base, 32 + isl6271a_get_voltage_sel_~pmic~0#1.offset;havoc ldv_mutex_unlock_9_~ldv_func_arg1#1.base, ldv_mutex_unlock_9_~ldv_func_arg1#1.offset;ldv_mutex_unlock_9_~ldv_func_arg1#1.base, ldv_mutex_unlock_9_~ldv_func_arg1#1.offset := ldv_mutex_unlock_9_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_9_#in~ldv_func_arg1#1.offset; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,032 INFO L272 TraceCheckUtils]: 49: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} call ldv_mutex_unlock_mtx_of_isl_pmic(ldv_mutex_unlock_9_~ldv_func_arg1#1.base, ldv_mutex_unlock_9_~ldv_func_arg1#1.offset); {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,032 INFO L290 TraceCheckUtils]: 50: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} ~lock.base, ~lock.offset := #in~lock.base, #in~lock.offset; {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} is VALID [2022-02-20 21:47:38,033 INFO L290 TraceCheckUtils]: 51: Hoare triple {12494#(= ~ldv_mutex_mtx_of_isl_pmic~0 2)} assume !(2 == ~ldv_mutex_mtx_of_isl_pmic~0); {12479#false} is VALID [2022-02-20 21:47:38,033 INFO L272 TraceCheckUtils]: 52: Hoare triple {12479#false} call ldv_error(); {12479#false} is VALID [2022-02-20 21:47:38,033 INFO L290 TraceCheckUtils]: 53: Hoare triple {12479#false} assume !false; {12479#false} is VALID [2022-02-20 21:47:38,033 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-02-20 21:47:38,034 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:47:38,034 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820296777] [2022-02-20 21:47:38,034 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1820296777] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:47:38,034 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:47:38,034 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-02-20 21:47:38,034 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58550969] [2022-02-20 21:47:38,035 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:47:38,035 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 54 [2022-02-20 21:47:38,035 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:47:38,036 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:38,083 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:38,083 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-02-20 21:47:38,084 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:47:38,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-02-20 21:47:38,084 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-02-20 21:47:38,085 INFO L87 Difference]: Start difference. First operand 483 states and 652 transitions. Second operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:39,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:39,015 INFO L93 Difference]: Finished difference Result 497 states and 678 transitions. [2022-02-20 21:47:39,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-02-20 21:47:39,015 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 54 [2022-02-20 21:47:39,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:47:39,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:39,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 218 transitions. [2022-02-20 21:47:39,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:39,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 218 transitions. [2022-02-20 21:47:39,020 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 218 transitions. [2022-02-20 21:47:39,193 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 218 edges. 218 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:47:39,194 INFO L225 Difference]: With dead ends: 497 [2022-02-20 21:47:39,194 INFO L226 Difference]: Without dead ends: 0 [2022-02-20 21:47:39,195 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2022-02-20 21:47:39,195 INFO L933 BasicCegarLoop]: 199 mSDtfsCounter, 64 mSDsluCounter, 405 mSDsCounter, 0 mSdLazyCounter, 107 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 604 SdHoareTripleChecker+Invalid, 149 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 107 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-20 21:47:39,195 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 604 Invalid, 149 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 107 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-02-20 21:47:39,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-02-20 21:47:39,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-02-20 21:47:39,196 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:47:39,196 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:39,197 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:39,197 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:39,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:39,197 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-02-20 21:47:39,197 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-02-20 21:47:39,197 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:39,197 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:39,198 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-02-20 21:47:39,198 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-02-20 21:47:39,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:47:39,198 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-02-20 21:47:39,198 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-02-20 21:47:39,198 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:39,199 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:47:39,199 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:47:39,199 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:47:39,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-02-20 21:47:39,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-02-20 21:47:39,199 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 54 [2022-02-20 21:47:39,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:47:39,200 INFO L470 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-02-20 21:47:39,200 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.4) internal successors, (42), 3 states have internal predecessors, (42), 3 states have call successors, (6), 5 states have call predecessors, (6), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2022-02-20 21:47:39,200 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-02-20 21:47:39,200 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:47:39,202 INFO L764 garLoopResultBuilder]: Registering result SAFE for location ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-02-20 21:47:39,203 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-02-20 21:47:39,204 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2022-02-20 21:47:40,599 INFO L858 garLoopResultBuilder]: For program point L2945(lines 2945 2948) no Hoare annotation was computed. [2022-02-20 21:47:40,600 INFO L858 garLoopResultBuilder]: For program point ldv_mutex_lock_mtx_of_isl_pmicEXIT(lines 2942 2952) no Hoare annotation was computed. [2022-02-20 21:47:40,600 INFO L858 garLoopResultBuilder]: For program point L2947-1(lines 2945 2948) no Hoare annotation was computed. [2022-02-20 21:47:40,600 INFO L854 garLoopResultBuilder]: At program point ldv_mutex_lock_mtx_of_isl_pmicENTRY(lines 2942 2952) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (= ~ldv_mutex_mtx_of_isl_pmic~0 1) (not (= 1 |old(~ldv_mutex_mtx_of_isl_pmic~0)|))) [2022-02-20 21:47:40,600 INFO L854 garLoopResultBuilder]: At program point L2947(line 2947) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (not (= 1 |old(~ldv_mutex_mtx_of_isl_pmic~0)|))) [2022-02-20 21:47:40,600 INFO L858 garLoopResultBuilder]: For program point ldv_mutex_lock_mtx_of_isl_pmicFINAL(lines 2942 2952) no Hoare annotation was computed. [2022-02-20 21:47:40,600 INFO L854 garLoopResultBuilder]: At program point ldv_mutex_unlock_mtx_of_isl_pmicENTRY(lines 3000 3010) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (= ~ldv_mutex_mtx_of_isl_pmic~0 |old(~ldv_mutex_mtx_of_isl_pmic~0)|) (not (= 2 |old(~ldv_mutex_mtx_of_isl_pmic~0)|))) [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point L3005-1(lines 3003 3006) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L854 garLoopResultBuilder]: At program point L3005(line 3005) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (not (= 2 |old(~ldv_mutex_mtx_of_isl_pmic~0)|))) [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point ldv_mutex_unlock_mtx_of_isl_pmicEXIT(lines 3000 3010) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point L3003(lines 3003 3006) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point ldv_mutex_unlock_mtx_of_isl_pmicFINAL(lines 3000 3010) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point regulator_list_voltage_linearFINAL(lines 3204 3206) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point regulator_list_voltage_linearEXIT(lines 3204 3206) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L861 garLoopResultBuilder]: At program point regulator_list_voltage_linearENTRY(lines 3204 3206) the Hoare annotation is: true [2022-02-20 21:47:40,601 INFO L861 garLoopResultBuilder]: At program point mutex_unlockENTRY(lines 3197 3199) the Hoare annotation is: true [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point mutex_unlockEXIT(lines 3197 3199) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L858 garLoopResultBuilder]: For program point mutex_unlockFINAL(lines 3197 3199) no Hoare annotation was computed. [2022-02-20 21:47:40,601 INFO L854 garLoopResultBuilder]: At program point ldv_mallocENTRY(lines 3158 3164) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (not (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) (and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))) [2022-02-20 21:47:40,602 INFO L861 garLoopResultBuilder]: At program point L3162(line 3162) the Hoare annotation is: true [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point L3160(line 3160) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point L3162-1(line 3162) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point L3156(line 3156) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point L3155(lines 3155 3157) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point ldv_mallocEXIT(lines 3158 3164) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point ldv_mallocFINAL(lines 3158 3164) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point ldv_errorFINAL(lines 2684 2689) no Hoare annotation was computed. [2022-02-20 21:47:40,602 INFO L861 garLoopResultBuilder]: At program point ldv_errorENTRY(lines 2684 2689) the Hoare annotation is: true [2022-02-20 21:47:40,602 INFO L858 garLoopResultBuilder]: For program point ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION(line 2687) no Hoare annotation was computed. [2022-02-20 21:47:40,603 INFO L858 garLoopResultBuilder]: For program point ldv_errorEXIT(lines 2684 2689) no Hoare annotation was computed. [2022-02-20 21:47:40,603 INFO L861 garLoopResultBuilder]: At program point regulator_unregisterENTRY(lines 3214 3216) the Hoare annotation is: true [2022-02-20 21:47:40,603 INFO L858 garLoopResultBuilder]: For program point regulator_unregisterFINAL(lines 3214 3216) no Hoare annotation was computed. [2022-02-20 21:47:40,603 INFO L858 garLoopResultBuilder]: For program point regulator_unregisterEXIT(lines 3214 3216) no Hoare annotation was computed. [2022-02-20 21:47:40,603 INFO L861 garLoopResultBuilder]: At program point mutex_lockENTRY(lines 3190 3192) the Hoare annotation is: true [2022-02-20 21:47:40,603 INFO L858 garLoopResultBuilder]: For program point mutex_lockFINAL(lines 3190 3192) no Hoare annotation was computed. [2022-02-20 21:47:40,603 INFO L858 garLoopResultBuilder]: For program point mutex_lockEXIT(lines 3190 3192) no Hoare annotation was computed. [2022-02-20 21:47:40,603 INFO L858 garLoopResultBuilder]: For program point L2529(lines 2529 2533) no Hoare annotation was computed. [2022-02-20 21:47:40,604 INFO L854 garLoopResultBuilder]: At program point L2397(lines 2378 2399) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,604 INFO L854 garLoopResultBuilder]: At program point L2678(line 2678) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,604 INFO L854 garLoopResultBuilder]: At program point L2678-1(line 2678) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,604 INFO L858 garLoopResultBuilder]: For program point L2480(line 2480) no Hoare annotation was computed. [2022-02-20 21:47:40,604 INFO L854 garLoopResultBuilder]: At program point L2249(lines 2245 2251) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,604 INFO L854 garLoopResultBuilder]: At program point L2662(line 2662) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,604 INFO L854 garLoopResultBuilder]: At program point L2662-1(line 2662) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,605 INFO L854 garLoopResultBuilder]: At program point L2530(line 2530) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,605 INFO L858 garLoopResultBuilder]: For program point L2563(line 2563) no Hoare annotation was computed. [2022-02-20 21:47:40,605 INFO L858 garLoopResultBuilder]: For program point L2464(lines 2464 2468) no Hoare annotation was computed. [2022-02-20 21:47:40,605 INFO L858 garLoopResultBuilder]: For program point L2530-1(line 2530) no Hoare annotation was computed. [2022-02-20 21:47:40,605 INFO L858 garLoopResultBuilder]: For program point ULTIMATE.startENTRY(line -1) no Hoare annotation was computed. [2022-02-20 21:47:40,605 INFO L854 garLoopResultBuilder]: At program point L2266(lines 2252 2268) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,605 INFO L854 garLoopResultBuilder]: At program point L2233(lines 2229 2235) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,605 INFO L854 garLoopResultBuilder]: At program point L2679(lines 2675 2682) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,606 INFO L854 garLoopResultBuilder]: At program point L2283(lines 2269 2285) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,606 INFO L854 garLoopResultBuilder]: At program point L2663(lines 2659 2666) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,606 INFO L858 garLoopResultBuilder]: For program point L2564(lines 2564 2579) no Hoare annotation was computed. [2022-02-20 21:47:40,606 INFO L854 garLoopResultBuilder]: At program point L2366(line 2366) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,606 INFO L858 garLoopResultBuilder]: For program point L2366-1(line 2366) no Hoare annotation was computed. [2022-02-20 21:47:40,606 INFO L858 garLoopResultBuilder]: For program point L3126(lines 3126 3129) no Hoare annotation was computed. [2022-02-20 21:47:40,606 INFO L858 garLoopResultBuilder]: For program point L2581(line 2581) no Hoare annotation was computed. [2022-02-20 21:47:40,607 INFO L854 garLoopResultBuilder]: At program point L3176(lines 3175 3177) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,607 INFO L854 garLoopResultBuilder]: At program point L3209(lines 3208 3210) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,607 INFO L858 garLoopResultBuilder]: For program point L2499(line 2499) no Hoare annotation was computed. [2022-02-20 21:47:40,607 INFO L854 garLoopResultBuilder]: At program point L2367(lines 2310 2376) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,607 INFO L854 garLoopResultBuilder]: At program point L2169(lines 2166 2171) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,607 INFO L858 garLoopResultBuilder]: For program point L2549(line 2549) no Hoare annotation was computed. [2022-02-20 21:47:40,608 INFO L858 garLoopResultBuilder]: For program point L2566(lines 2566 2576) no Hoare annotation was computed. [2022-02-20 21:47:40,608 INFO L858 garLoopResultBuilder]: For program point L2500(lines 2500 2515) no Hoare annotation was computed. [2022-02-20 21:47:40,608 INFO L854 garLoopResultBuilder]: At program point L3128(line 3128) the Hoare annotation is: false [2022-02-20 21:47:40,608 INFO L858 garLoopResultBuilder]: For program point L2550(lines 2550 2554) no Hoare annotation was computed. [2022-02-20 21:47:40,608 INFO L858 garLoopResultBuilder]: For program point L3128-1(lines 3125 3143) no Hoare annotation was computed. [2022-02-20 21:47:40,608 INFO L858 garLoopResultBuilder]: For program point L2517(line 2517) no Hoare annotation was computed. [2022-02-20 21:47:40,608 INFO L854 garLoopResultBuilder]: At program point L2418(lines 2414 2420) the Hoare annotation is: (and (= ~ldv_state_variable_0~0 1) (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,609 INFO L858 garLoopResultBuilder]: For program point L2567(line 2567) no Hoare annotation was computed. [2022-02-20 21:47:40,609 INFO L858 garLoopResultBuilder]: For program point L2369(lines 2369 2373) no Hoare annotation was computed. [2022-02-20 21:47:40,609 INFO L854 garLoopResultBuilder]: At program point L2584(lines 2447 2589) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,609 INFO L854 garLoopResultBuilder]: At program point L3212(line 3212) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,609 INFO L854 garLoopResultBuilder]: At program point L3146(lines 3145 3147) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,609 INFO L854 garLoopResultBuilder]: At program point L3212-2(lines 3211 3213) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,609 INFO L858 garLoopResultBuilder]: For program point L3212-1(line 3212) no Hoare annotation was computed. [2022-02-20 21:47:40,610 INFO L858 garLoopResultBuilder]: For program point L2568(lines 2568 2572) no Hoare annotation was computed. [2022-02-20 21:47:40,610 INFO L858 garLoopResultBuilder]: For program point L2502(lines 2502 2508) no Hoare annotation was computed. [2022-02-20 21:47:40,610 INFO L858 garLoopResultBuilder]: For program point L2535(line 2535) no Hoare annotation was computed. [2022-02-20 21:47:40,610 INFO L858 garLoopResultBuilder]: For program point L2502-2(lines 2500 2514) no Hoare annotation was computed. [2022-02-20 21:47:40,610 INFO L854 garLoopResultBuilder]: At program point L2370(lines 2310 2376) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,610 INFO L858 garLoopResultBuilder]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2022-02-20 21:47:40,611 INFO L858 garLoopResultBuilder]: For program point L2337(lines 2337 2341) no Hoare annotation was computed. [2022-02-20 21:47:40,611 INFO L858 garLoopResultBuilder]: For program point L2337-2(lines 2337 2341) no Hoare annotation was computed. [2022-02-20 21:47:40,611 INFO L854 garLoopResultBuilder]: At program point L2354(lines 2310 2376) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,611 INFO L858 garLoopResultBuilder]: For program point L2321(lines 2321 2324) no Hoare annotation was computed. [2022-02-20 21:47:40,611 INFO L854 garLoopResultBuilder]: At program point L3180(lines 3179 3181) the Hoare annotation is: (and (= ~ldv_state_variable_0~0 1) (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,611 INFO L858 garLoopResultBuilder]: For program point L2536(lines 2536 2540) no Hoare annotation was computed. [2022-02-20 21:47:40,611 INFO L858 garLoopResultBuilder]: For program point L2569-1(line 2569) no Hoare annotation was computed. [2022-02-20 21:47:40,612 INFO L854 garLoopResultBuilder]: At program point L2569(line 2569) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,612 INFO L858 garLoopResultBuilder]: For program point L2487(line 2487) no Hoare annotation was computed. [2022-02-20 21:47:40,612 INFO L854 garLoopResultBuilder]: At program point L2388(line 2388) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,612 INFO L858 garLoopResultBuilder]: For program point L2388-1(line 2388) no Hoare annotation was computed. [2022-02-20 21:47:40,612 INFO L854 garLoopResultBuilder]: At program point L2372(lines 2310 2376) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,612 INFO L854 garLoopResultBuilder]: At program point L3132(line 3132) the Hoare annotation is: false [2022-02-20 21:47:40,613 INFO L858 garLoopResultBuilder]: For program point L3132-1(lines 3125 3143) no Hoare annotation was computed. [2022-02-20 21:47:40,613 INFO L858 garLoopResultBuilder]: For program point L2488(lines 2488 2522) no Hoare annotation was computed. [2022-02-20 21:47:40,613 INFO L854 garLoopResultBuilder]: At program point L2356(lines 2310 2376) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,613 INFO L858 garLoopResultBuilder]: For program point L2257-1(line 2257) no Hoare annotation was computed. [2022-02-20 21:47:40,613 INFO L854 garLoopResultBuilder]: At program point L2257(line 2257) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,613 INFO L854 garLoopResultBuilder]: At program point L2670(line 2670) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,613 INFO L854 garLoopResultBuilder]: At program point L2670-1(line 2670) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,614 INFO L858 garLoopResultBuilder]: For program point L2472(line 2472) no Hoare annotation was computed. [2022-02-20 21:47:40,614 INFO L854 garLoopResultBuilder]: At program point L2274(line 2274) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,614 INFO L858 garLoopResultBuilder]: For program point L2274-1(line 2274) no Hoare annotation was computed. [2022-02-20 21:47:40,614 INFO L854 garLoopResultBuilder]: At program point L3166(line 3166) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,614 INFO L854 garLoopResultBuilder]: At program point L2654(line 2654) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,614 INFO L854 garLoopResultBuilder]: At program point L3166-2(lines 3165 3167) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,615 INFO L861 garLoopResultBuilder]: At program point L2588(lines 2441 2590) the Hoare annotation is: true [2022-02-20 21:47:40,615 INFO L858 garLoopResultBuilder]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2022-02-20 21:47:40,615 INFO L858 garLoopResultBuilder]: For program point L3166-1(line 3166) no Hoare annotation was computed. [2022-02-20 21:47:40,615 INFO L854 garLoopResultBuilder]: At program point L2654-1(line 2654) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,615 INFO L858 garLoopResultBuilder]: For program point L2456(lines 2456 2583) no Hoare annotation was computed. [2022-02-20 21:47:40,615 INFO L854 garLoopResultBuilder]: At program point L2390(lines 2382 2398) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,615 INFO L854 garLoopResultBuilder]: At program point L2671(lines 2667 2674) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,616 INFO L858 garLoopResultBuilder]: For program point L2473(lines 2473 2478) no Hoare annotation was computed. [2022-02-20 21:47:40,616 INFO L854 garLoopResultBuilder]: At program point L2242(lines 2238 2244) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,616 INFO L854 garLoopResultBuilder]: At program point L2655(lines 2651 2658) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,616 INFO L858 garLoopResultBuilder]: For program point L2556(line 2556) no Hoare annotation was computed. [2022-02-20 21:47:40,616 INFO L858 garLoopResultBuilder]: For program point L2490(lines 2490 2519) no Hoare annotation was computed. [2022-02-20 21:47:40,616 INFO L858 garLoopResultBuilder]: For program point L2457(line 2457) no Hoare annotation was computed. [2022-02-20 21:47:40,616 INFO L854 garLoopResultBuilder]: At program point L2358(lines 2310 2376) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,617 INFO L854 garLoopResultBuilder]: At program point L2226(lines 2222 2228) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,617 INFO L854 garLoopResultBuilder]: At program point L3184(lines 3183 3185) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,617 INFO L854 garLoopResultBuilder]: At program point L2375(lines 2299 2377) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,617 INFO L858 garLoopResultBuilder]: For program point L2524(line 2524) no Hoare annotation was computed. [2022-02-20 21:47:40,617 INFO L858 garLoopResultBuilder]: For program point L2458(lines 2458 2485) no Hoare annotation was computed. [2022-02-20 21:47:40,617 INFO L858 garLoopResultBuilder]: For program point L2491(line 2491) no Hoare annotation was computed. [2022-02-20 21:47:40,617 INFO L854 garLoopResultBuilder]: At program point L2392(lines 2382 2398) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,618 INFO L854 garLoopResultBuilder]: At program point L2425(lines 2421 2427) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,618 INFO L858 garLoopResultBuilder]: For program point L2574(line 2574) no Hoare annotation was computed. [2022-02-20 21:47:40,618 INFO L854 garLoopResultBuilder]: At program point L3136(line 3136) the Hoare annotation is: false [2022-02-20 21:47:40,618 INFO L858 garLoopResultBuilder]: For program point L3136-1(lines 3125 3143) no Hoare annotation was computed. [2022-02-20 21:47:40,618 INFO L858 garLoopResultBuilder]: For program point L2492(lines 2492 2497) no Hoare annotation was computed. [2022-02-20 21:47:40,618 INFO L858 garLoopResultBuilder]: For program point L2525(lines 2525 2561) no Hoare annotation was computed. [2022-02-20 21:47:40,618 INFO L858 garLoopResultBuilder]: For program point L2327(lines 2327 2330) no Hoare annotation was computed. [2022-02-20 21:47:40,619 INFO L858 garLoopResultBuilder]: For program point L2261(lines 2261 2264) no Hoare annotation was computed. [2022-02-20 21:47:40,619 INFO L858 garLoopResultBuilder]: For program point L2261-2(lines 2261 2264) no Hoare annotation was computed. [2022-02-20 21:47:40,619 INFO L854 garLoopResultBuilder]: At program point L3120(lines 3113 3122) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_state_variable_3~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,619 INFO L858 garLoopResultBuilder]: For program point L2542(line 2542) no Hoare annotation was computed. [2022-02-20 21:47:40,619 INFO L858 garLoopResultBuilder]: For program point L2278(lines 2278 2281) no Hoare annotation was computed. [2022-02-20 21:47:40,619 INFO L858 garLoopResultBuilder]: For program point L2278-2(lines 2278 2281) no Hoare annotation was computed. [2022-02-20 21:47:40,619 INFO L854 garLoopResultBuilder]: At program point L3170(lines 3169 3171) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,620 INFO L858 garLoopResultBuilder]: For program point L-1(line -1) no Hoare annotation was computed. [2022-02-20 21:47:40,620 INFO L858 garLoopResultBuilder]: For program point L-1-1(line -1) no Hoare annotation was computed. [2022-02-20 21:47:40,620 INFO L858 garLoopResultBuilder]: For program point L2460(lines 2460 2482) no Hoare annotation was computed. [2022-02-20 21:47:40,620 INFO L854 garLoopResultBuilder]: At program point L2394(lines 2382 2398) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,620 INFO L858 garLoopResultBuilder]: For program point L2543(lines 2543 2547) no Hoare annotation was computed. [2022-02-20 21:47:40,620 INFO L858 garLoopResultBuilder]: For program point L2345-1(line 2345) no Hoare annotation was computed. [2022-02-20 21:47:40,620 INFO L854 garLoopResultBuilder]: At program point L2345(line 2345) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,621 INFO L858 garLoopResultBuilder]: For program point L2527(lines 2527 2558) no Hoare annotation was computed. [2022-02-20 21:47:40,621 INFO L858 garLoopResultBuilder]: For program point L2461(line 2461) no Hoare annotation was computed. [2022-02-20 21:47:40,621 INFO L854 garLoopResultBuilder]: At program point L3188(lines 3187 3189) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_mtx_of_isl_pmic~0 2) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) [2022-02-20 21:47:40,621 INFO L854 garLoopResultBuilder]: At program point L2511(lines 2447 2589) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,621 INFO L858 garLoopResultBuilder]: For program point L2346(lines 2346 2352) no Hoare annotation was computed. [2022-02-20 21:47:40,621 INFO L858 garLoopResultBuilder]: For program point L2528(line 2528) no Hoare annotation was computed. [2022-02-20 21:47:40,621 INFO L858 garLoopResultBuilder]: For program point L2462(lines 2462 2470) no Hoare annotation was computed. [2022-02-20 21:47:40,622 INFO L858 garLoopResultBuilder]: For program point L3173-1(line 3173) no Hoare annotation was computed. [2022-02-20 21:47:40,622 INFO L854 garLoopResultBuilder]: At program point L3140(line 3140) the Hoare annotation is: false [2022-02-20 21:47:40,622 INFO L854 garLoopResultBuilder]: At program point L3173(line 3173) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,622 INFO L854 garLoopResultBuilder]: At program point L3173-2(lines 3172 3174) the Hoare annotation is: (and (= 1 ~ldv_mutex_mutex_of_device~0) (= ~ldv_retval_1~0 0) (= ~ldv_mutex_lock~0 1) (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1) (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) [2022-02-20 21:47:40,622 INFO L861 garLoopResultBuilder]: At program point L3140-1(lines 3123 3144) the Hoare annotation is: true [2022-02-20 21:47:40,622 INFO L858 garLoopResultBuilder]: For program point L3201-1(line 3201) no Hoare annotation was computed. [2022-02-20 21:47:40,623 INFO L858 garLoopResultBuilder]: For program point rdev_get_drvdataEXIT(lines 3200 3202) no Hoare annotation was computed. [2022-02-20 21:47:40,623 INFO L854 garLoopResultBuilder]: At program point L3201(line 3201) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (not (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) (and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))) [2022-02-20 21:47:40,623 INFO L858 garLoopResultBuilder]: For program point rdev_get_drvdataFINAL(lines 3200 3202) no Hoare annotation was computed. [2022-02-20 21:47:40,623 INFO L854 garLoopResultBuilder]: At program point rdev_get_drvdataENTRY(lines 3200 3202) the Hoare annotation is: (or (not (= ~ldv_mutex_lock~0 1)) (not (= ~ldv_retval_1~0 0)) (not (= 1 ~ldv_mutex_mutex_of_device~0)) (not (= ~ldv_mutex_cred_guard_mutex_of_signal_struct~0 1)) (not (= ~ldv_mutex_mtx_of_isl_pmic~0 1)) (and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))) [2022-02-20 21:47:40,623 INFO L861 garLoopResultBuilder]: At program point IS_ERRENTRY(lines 2172 2178) the Hoare annotation is: true [2022-02-20 21:47:40,623 INFO L858 garLoopResultBuilder]: For program point IS_ERRFINAL(lines 2172 2178) no Hoare annotation was computed. [2022-02-20 21:47:40,624 INFO L861 garLoopResultBuilder]: At program point L2694(lines 2691 2696) the Hoare annotation is: true [2022-02-20 21:47:40,624 INFO L858 garLoopResultBuilder]: For program point IS_ERREXIT(lines 2172 2178) no Hoare annotation was computed. [2022-02-20 21:47:40,627 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:47:40,628 INFO L180 ceAbstractionStarter]: Computing trace abstraction results [2022-02-20 21:47:40,631 WARN L170 areAnnotationChecker]: mutex_unlockFINAL has no Hoare annotation [2022-02-20 21:47:40,631 WARN L170 areAnnotationChecker]: L2945 has no Hoare annotation [2022-02-20 21:47:40,631 WARN L170 areAnnotationChecker]: L3160 has no Hoare annotation [2022-02-20 21:47:40,631 WARN L170 areAnnotationChecker]: ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION has no Hoare annotation [2022-02-20 21:47:40,631 WARN L170 areAnnotationChecker]: ldv_errorFINAL has no Hoare annotation [2022-02-20 21:47:40,632 WARN L170 areAnnotationChecker]: regulator_unregisterFINAL has no Hoare annotation [2022-02-20 21:47:40,632 WARN L170 areAnnotationChecker]: mutex_lockFINAL has no Hoare annotation [2022-02-20 21:47:40,632 WARN L170 areAnnotationChecker]: ULTIMATE.startENTRY has no Hoare annotation [2022-02-20 21:47:40,632 WARN L170 areAnnotationChecker]: L3003 has no Hoare annotation [2022-02-20 21:47:40,633 WARN L170 areAnnotationChecker]: regulator_list_voltage_linearFINAL has no Hoare annotation [2022-02-20 21:47:40,633 WARN L170 areAnnotationChecker]: mutex_unlockFINAL has no Hoare annotation [2022-02-20 21:47:40,633 WARN L170 areAnnotationChecker]: L2945 has no Hoare annotation [2022-02-20 21:47:40,633 WARN L170 areAnnotationChecker]: L2945 has no Hoare annotation [2022-02-20 21:47:40,633 WARN L170 areAnnotationChecker]: L3160 has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: L3160 has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: ldv_errorFINAL has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: regulator_unregisterFINAL has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: mutex_lockFINAL has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: L-1 has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: L3003 has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: L3003 has no Hoare annotation [2022-02-20 21:47:40,634 WARN L170 areAnnotationChecker]: L3201-1 has no Hoare annotation [2022-02-20 21:47:40,635 WARN L170 areAnnotationChecker]: regulator_list_voltage_linearFINAL has no Hoare annotation [2022-02-20 21:47:40,635 WARN L170 areAnnotationChecker]: IS_ERRFINAL has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: mutex_unlockEXIT has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: mutex_unlockEXIT has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: L2947-1 has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: L2947-1 has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: ldv_mallocFINAL has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: L3162-1 has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 21:47:40,636 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: ldv_errorEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: regulator_unregisterEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: regulator_unregisterEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: mutex_lockEXIT has no Hoare annotation [2022-02-20 21:47:40,637 WARN L170 areAnnotationChecker]: mutex_lockEXIT has no Hoare annotation [2022-02-20 21:47:40,638 WARN L170 areAnnotationChecker]: L3005-1 has no Hoare annotation [2022-02-20 21:47:40,638 WARN L170 areAnnotationChecker]: L3005-1 has no Hoare annotation [2022-02-20 21:47:40,638 WARN L170 areAnnotationChecker]: L3201-1 has no Hoare annotation [2022-02-20 21:47:40,638 WARN L170 areAnnotationChecker]: regulator_list_voltage_linearEXIT has no Hoare annotation [2022-02-20 21:47:40,638 WARN L170 areAnnotationChecker]: regulator_list_voltage_linearEXIT has no Hoare annotation [2022-02-20 21:47:40,639 WARN L170 areAnnotationChecker]: IS_ERRFINAL has no Hoare annotation [2022-02-20 21:47:40,639 WARN L170 areAnnotationChecker]: ldv_mutex_lock_mtx_of_isl_pmicFINAL has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: ldv_mallocEXIT has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: ldv_mallocEXIT has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: ldv_mallocEXIT has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: ldv_mallocEXIT has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: L3162-1 has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: L3128-1 has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: L3128-1 has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: L3132-1 has no Hoare annotation [2022-02-20 21:47:40,640 WARN L170 areAnnotationChecker]: L3132-1 has no Hoare annotation [2022-02-20 21:47:40,641 WARN L170 areAnnotationChecker]: L3136-1 has no Hoare annotation [2022-02-20 21:47:40,641 WARN L170 areAnnotationChecker]: L3136-1 has no Hoare annotation [2022-02-20 21:47:40,641 WARN L170 areAnnotationChecker]: L2366-1 has no Hoare annotation [2022-02-20 21:47:40,641 WARN L170 areAnnotationChecker]: L2388-1 has no Hoare annotation [2022-02-20 21:47:40,642 WARN L170 areAnnotationChecker]: L2457 has no Hoare annotation [2022-02-20 21:47:40,642 WARN L170 areAnnotationChecker]: ldv_mutex_unlock_mtx_of_isl_pmicFINAL has no Hoare annotation [2022-02-20 21:47:40,642 WARN L170 areAnnotationChecker]: rdev_get_drvdataFINAL has no Hoare annotation [2022-02-20 21:47:40,643 WARN L170 areAnnotationChecker]: L2530-1 has no Hoare annotation [2022-02-20 21:47:40,643 WARN L170 areAnnotationChecker]: L2569-1 has no Hoare annotation [2022-02-20 21:47:40,643 WARN L170 areAnnotationChecker]: IS_ERREXIT has no Hoare annotation [2022-02-20 21:47:40,643 WARN L170 areAnnotationChecker]: IS_ERREXIT has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: ldv_mutex_lock_mtx_of_isl_pmicEXIT has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: ldv_mutex_lock_mtx_of_isl_pmicEXIT has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: L3173-1 has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: L3212-1 has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: L3166-1 has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: L3156 has no Hoare annotation [2022-02-20 21:47:40,644 WARN L170 areAnnotationChecker]: L3156 has no Hoare annotation [2022-02-20 21:47:40,645 WARN L170 areAnnotationChecker]: L3132-1 has no Hoare annotation [2022-02-20 21:47:40,645 WARN L170 areAnnotationChecker]: L3136-1 has no Hoare annotation [2022-02-20 21:47:40,645 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2022-02-20 21:47:40,645 WARN L170 areAnnotationChecker]: L2369 has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: L2278 has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: L2261 has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: L2457 has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: L2457 has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: ldv_mutex_unlock_mtx_of_isl_pmicEXIT has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: ldv_mutex_unlock_mtx_of_isl_pmicEXIT has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: rdev_get_drvdataEXIT has no Hoare annotation [2022-02-20 21:47:40,646 WARN L170 areAnnotationChecker]: rdev_get_drvdataEXIT has no Hoare annotation [2022-02-20 21:47:40,647 WARN L170 areAnnotationChecker]: L2345-1 has no Hoare annotation [2022-02-20 21:47:40,647 WARN L170 areAnnotationChecker]: L2327 has no Hoare annotation [2022-02-20 21:47:40,648 WARN L170 areAnnotationChecker]: L3155 has no Hoare annotation [2022-02-20 21:47:40,648 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2022-02-20 21:47:40,648 WARN L170 areAnnotationChecker]: L2369 has no Hoare annotation [2022-02-20 21:47:40,648 WARN L170 areAnnotationChecker]: L2369 has no Hoare annotation [2022-02-20 21:47:40,649 WARN L170 areAnnotationChecker]: L2278 has no Hoare annotation [2022-02-20 21:47:40,649 WARN L170 areAnnotationChecker]: L2278 has no Hoare annotation [2022-02-20 21:47:40,649 WARN L170 areAnnotationChecker]: L2261 has no Hoare annotation [2022-02-20 21:47:40,649 WARN L170 areAnnotationChecker]: L2261 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2458 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2458 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2487 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2487 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2274-1 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2257-1 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2346 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2346 has no Hoare annotation [2022-02-20 21:47:40,650 WARN L170 areAnnotationChecker]: L2327 has no Hoare annotation [2022-02-20 21:47:40,651 WARN L170 areAnnotationChecker]: L2327 has no Hoare annotation [2022-02-20 21:47:40,651 WARN L170 areAnnotationChecker]: L2345-1 has no Hoare annotation [2022-02-20 21:47:40,652 WARN L170 areAnnotationChecker]: L2388-1 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2278-2 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2261-2 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2461 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2461 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2488 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2488 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2524 has no Hoare annotation [2022-02-20 21:47:40,653 WARN L170 areAnnotationChecker]: L2524 has no Hoare annotation [2022-02-20 21:47:40,656 WARN L170 areAnnotationChecker]: L2464 has no Hoare annotation [2022-02-20 21:47:40,657 WARN L170 areAnnotationChecker]: L2366-1 has no Hoare annotation [2022-02-20 21:47:40,658 WARN L170 areAnnotationChecker]: L2462 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2462 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2472 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2472 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2491 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2491 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2525 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2525 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2563 has no Hoare annotation [2022-02-20 21:47:40,659 WARN L170 areAnnotationChecker]: L2563 has no Hoare annotation [2022-02-20 21:47:40,660 WARN L170 areAnnotationChecker]: L2337 has no Hoare annotation [2022-02-20 21:47:40,660 WARN L170 areAnnotationChecker]: L2464 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2464 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L-1-1 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2473 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2473 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2480 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2480 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2492 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2492 has no Hoare annotation [2022-02-20 21:47:40,661 WARN L170 areAnnotationChecker]: L2499 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2499 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2528 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2528 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2564 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2564 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2581 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2581 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2337 has no Hoare annotation [2022-02-20 21:47:40,662 WARN L170 areAnnotationChecker]: L2337 has no Hoare annotation [2022-02-20 21:47:40,664 WARN L170 areAnnotationChecker]: L3166-1 has no Hoare annotation [2022-02-20 21:47:40,665 WARN L170 areAnnotationChecker]: L2460 has no Hoare annotation [2022-02-20 21:47:40,665 WARN L170 areAnnotationChecker]: L2500 has no Hoare annotation [2022-02-20 21:47:40,665 WARN L170 areAnnotationChecker]: L2500 has no Hoare annotation [2022-02-20 21:47:40,665 WARN L170 areAnnotationChecker]: L2517 has no Hoare annotation [2022-02-20 21:47:40,665 WARN L170 areAnnotationChecker]: L2517 has no Hoare annotation [2022-02-20 21:47:40,665 WARN L170 areAnnotationChecker]: L2529 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2529 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2535 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2535 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2567 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2567 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2456 has no Hoare annotation [2022-02-20 21:47:40,666 WARN L170 areAnnotationChecker]: L2337-2 has no Hoare annotation [2022-02-20 21:47:40,667 WARN L170 areAnnotationChecker]: L2321 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2490 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2530-1 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2536 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2536 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2542 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2542 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2568 has no Hoare annotation [2022-02-20 21:47:40,668 WARN L170 areAnnotationChecker]: L2568 has no Hoare annotation [2022-02-20 21:47:40,669 WARN L170 areAnnotationChecker]: L2574 has no Hoare annotation [2022-02-20 21:47:40,669 WARN L170 areAnnotationChecker]: L2574 has no Hoare annotation [2022-02-20 21:47:40,669 WARN L170 areAnnotationChecker]: L3212-1 has no Hoare annotation [2022-02-20 21:47:40,670 WARN L170 areAnnotationChecker]: L2321 has no Hoare annotation [2022-02-20 21:47:40,670 WARN L170 areAnnotationChecker]: L2321 has no Hoare annotation [2022-02-20 21:47:40,670 WARN L170 areAnnotationChecker]: L3126 has no Hoare annotation [2022-02-20 21:47:40,670 WARN L170 areAnnotationChecker]: L2502 has no Hoare annotation [2022-02-20 21:47:40,670 WARN L170 areAnnotationChecker]: L2543 has no Hoare annotation [2022-02-20 21:47:40,671 WARN L170 areAnnotationChecker]: L2543 has no Hoare annotation [2022-02-20 21:47:40,671 WARN L170 areAnnotationChecker]: L2549 has no Hoare annotation [2022-02-20 21:47:40,671 WARN L170 areAnnotationChecker]: L2549 has no Hoare annotation [2022-02-20 21:47:40,671 WARN L170 areAnnotationChecker]: L2569-1 has no Hoare annotation [2022-02-20 21:47:40,671 WARN L170 areAnnotationChecker]: L2566 has no Hoare annotation [2022-02-20 21:47:40,671 WARN L170 areAnnotationChecker]: L3173-1 has no Hoare annotation [2022-02-20 21:47:40,672 WARN L170 areAnnotationChecker]: L3126 has no Hoare annotation [2022-02-20 21:47:40,672 WARN L170 areAnnotationChecker]: L3126 has no Hoare annotation [2022-02-20 21:47:40,672 WARN L170 areAnnotationChecker]: L2502 has no Hoare annotation [2022-02-20 21:47:40,672 WARN L170 areAnnotationChecker]: L2502 has no Hoare annotation [2022-02-20 21:47:40,672 WARN L170 areAnnotationChecker]: L2274-1 has no Hoare annotation [2022-02-20 21:47:40,673 WARN L170 areAnnotationChecker]: L2550 has no Hoare annotation [2022-02-20 21:47:40,673 WARN L170 areAnnotationChecker]: L2550 has no Hoare annotation [2022-02-20 21:47:40,674 WARN L170 areAnnotationChecker]: L2556 has no Hoare annotation [2022-02-20 21:47:40,674 WARN L170 areAnnotationChecker]: L2556 has no Hoare annotation [2022-02-20 21:47:40,674 WARN L170 areAnnotationChecker]: L3128-1 has no Hoare annotation [2022-02-20 21:47:40,674 WARN L170 areAnnotationChecker]: L2502-2 has no Hoare annotation [2022-02-20 21:47:40,674 WARN L170 areAnnotationChecker]: L2502-2 has no Hoare annotation [2022-02-20 21:47:40,674 WARN L170 areAnnotationChecker]: L2257-1 has no Hoare annotation [2022-02-20 21:47:40,675 WARN L170 areAnnotationChecker]: L2527 has no Hoare annotation [2022-02-20 21:47:40,675 INFO L163 areAnnotationChecker]: CFG has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [2022-02-20 21:47:40,696 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.02 09:47:40 BoogieIcfgContainer [2022-02-20 21:47:40,696 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-02-20 21:47:40,697 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-02-20 21:47:40,697 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-02-20 21:47:40,697 INFO L275 PluginConnector]: Witness Printer initialized [2022-02-20 21:47:40,697 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:47:29" (3/4) ... [2022-02-20 21:47:40,700 INFO L137 WitnessPrinter]: Generating witness for correct program [2022-02-20 21:47:40,704 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure mutex_unlock [2022-02-20 21:47:40,704 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_mutex_lock_mtx_of_isl_pmic [2022-02-20 21:47:40,704 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_malloc [2022-02-20 21:47:40,705 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_error [2022-02-20 21:47:40,705 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure regulator_unregister [2022-02-20 21:47:40,705 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure mutex_lock [2022-02-20 21:47:40,705 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure ldv_mutex_unlock_mtx_of_isl_pmic [2022-02-20 21:47:40,705 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure rdev_get_drvdata [2022-02-20 21:47:40,705 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure regulator_list_voltage_linear [2022-02-20 21:47:40,706 INFO L354 RCFGBacktranslator]: Ignoring RootEdge to procedure IS_ERR [2022-02-20 21:47:40,720 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 82 nodes and edges [2022-02-20 21:47:40,724 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 23 nodes and edges [2022-02-20 21:47:40,725 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 4 nodes and edges [2022-02-20 21:47:40,726 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 2 nodes and edges [2022-02-20 21:47:40,727 INFO L910 BoogieBacktranslator]: Reduced CFG by removing 1 nodes and edges [2022-02-20 21:47:40,840 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2022-02-20 21:47:40,840 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-02-20 21:47:40,842 INFO L158 Benchmark]: Toolchain (without parser) took 13308.27ms. Allocated memory was 81.8MB in the beginning and 218.1MB in the end (delta: 136.3MB). Free memory was 42.5MB in the beginning and 100.1MB in the end (delta: -57.6MB). Peak memory consumption was 78.2MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,842 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 81.8MB. Free memory is still 62.7MB. There was no memory consumed. Max. memory is 16.1GB. [2022-02-20 21:47:40,842 INFO L158 Benchmark]: CACSL2BoogieTranslator took 934.97ms. Allocated memory was 81.8MB in the beginning and 98.6MB in the end (delta: 16.8MB). Free memory was 42.3MB in the beginning and 47.9MB in the end (delta: -5.5MB). Peak memory consumption was 15.1MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,842 INFO L158 Benchmark]: Boogie Procedure Inliner took 143.04ms. Allocated memory is still 98.6MB. Free memory was 47.9MB in the beginning and 63.9MB in the end (delta: -16.0MB). Peak memory consumption was 13.6MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,843 INFO L158 Benchmark]: Boogie Preprocessor took 105.50ms. Allocated memory is still 98.6MB. Free memory was 63.9MB in the beginning and 56.4MB in the end (delta: 7.5MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,843 INFO L158 Benchmark]: RCFGBuilder took 1180.18ms. Allocated memory was 98.6MB in the beginning and 140.5MB in the end (delta: 41.9MB). Free memory was 56.4MB in the beginning and 97.3MB in the end (delta: -40.9MB). Peak memory consumption was 39.3MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,843 INFO L158 Benchmark]: TraceAbstraction took 10791.85ms. Allocated memory was 140.5MB in the beginning and 218.1MB in the end (delta: 77.6MB). Free memory was 97.3MB in the beginning and 113.8MB in the end (delta: -16.5MB). Peak memory consumption was 123.5MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,844 INFO L158 Benchmark]: Witness Printer took 143.89ms. Allocated memory is still 218.1MB. Free memory was 113.8MB in the beginning and 100.1MB in the end (delta: 13.6MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-02-20 21:47:40,846 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 81.8MB. Free memory is still 62.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 934.97ms. Allocated memory was 81.8MB in the beginning and 98.6MB in the end (delta: 16.8MB). Free memory was 42.3MB in the beginning and 47.9MB in the end (delta: -5.5MB). Peak memory consumption was 15.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 143.04ms. Allocated memory is still 98.6MB. Free memory was 47.9MB in the beginning and 63.9MB in the end (delta: -16.0MB). Peak memory consumption was 13.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 105.50ms. Allocated memory is still 98.6MB. Free memory was 63.9MB in the beginning and 56.4MB in the end (delta: 7.5MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * RCFGBuilder took 1180.18ms. Allocated memory was 98.6MB in the beginning and 140.5MB in the end (delta: 41.9MB). Free memory was 56.4MB in the beginning and 97.3MB in the end (delta: -40.9MB). Peak memory consumption was 39.3MB. Max. memory is 16.1GB. * TraceAbstraction took 10791.85ms. Allocated memory was 140.5MB in the beginning and 218.1MB in the end (delta: 77.6MB). Free memory was 97.3MB in the beginning and 113.8MB in the end (delta: -16.5MB). Peak memory consumption was 123.5MB. Max. memory is 16.1GB. * Witness Printer took 143.89ms. Allocated memory is still 218.1MB. Free memory was 113.8MB in the beginning and 100.1MB in the end (delta: 13.6MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 2687]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 174 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 10.7s, OverallIterations: 8, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 7.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 1.4s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1483 SdHoareTripleChecker+Valid, 0.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1470 mSDsluCounter, 2847 SdHoareTripleChecker+Invalid, 0.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1066 mSDsCounter, 117 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 285 IncrementalHoareTripleChecker+Invalid, 402 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 117 mSolverCounterUnsat, 1781 mSDtfsCounter, 285 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 53 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=483occurred in iteration=7, InterpolantAutomatonStates: 34, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 8 MinimizatonAttempts, 31 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 76 LocationsWithAnnotation, 264 PreInvPairs, 429 NumberOfFragments, 1074 HoareAnnotationTreeSize, 264 FomulaSimplifications, 0 FormulaSimplificationTreeSizeReduction, 0.1s HoareSimplificationTime, 76 FomulaSimplificationsInter, 3742 FormulaSimplificationTreeSizeReductionInter, 1.2s HoareSimplificationTimeInter, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 207 NumberOfCodeBlocks, 207 NumberOfCodeBlocksAsserted, 8 NumberOfCheckSat, 199 ConstructedInterpolants, 0 QuantifiedInterpolants, 395 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 8 InterpolantComputations, 8 PerfectInterpolantSequences, 3/3 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 2310]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2310]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2447]: Loop Invariant Derived loop invariant: ((1 == ldv_mutex_mutex_of_device && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2414]: Loop Invariant Derived loop invariant: ((((ldv_state_variable_0 == 1 && 1 == ldv_mutex_mutex_of_device) && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2382]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3211]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3145]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2691]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 2382]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2238]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2245]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2310]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2421]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2659]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2310]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3113]: Loop Invariant Derived loop invariant: ((((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_state_variable_3 == 0) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3175]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2299]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2441]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3172]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2310]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2651]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_mtx_of_isl_pmic == 2) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1 - InvariantResult [Line: 2222]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2252]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2166]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3123]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 3165]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3169]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2229]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3179]: Loop Invariant Derived loop invariant: ((((ldv_state_variable_0 == 1 && 1 == ldv_mutex_mutex_of_device) && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2382]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2269]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3187]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_mtx_of_isl_pmic == 2) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1 - InvariantResult [Line: 2447]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2310]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 3208]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2378]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 - InvariantResult [Line: 2667]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_mtx_of_isl_pmic == 2) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1 - InvariantResult [Line: 3183]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_mtx_of_isl_pmic == 2) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1 - InvariantResult [Line: 2675]: Loop Invariant Derived loop invariant: (((1 == ldv_mutex_mutex_of_device && ldv_retval_1 == 0) && ldv_mutex_lock == 1) && ldv_mutex_cred_guard_mutex_of_signal_struct == 1) && ldv_mutex_mtx_of_isl_pmic == 1 RESULT: Ultimate proved your program to be correct! [2022-02-20 21:47:40,896 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE