./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash bf59f873abe32ddc2d99221f4f189da946012506d30fecc03d275d110896ac6d --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 21:57:54,869 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 21:57:54,872 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 21:57:54,915 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 21:57:54,915 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 21:57:54,918 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 21:57:54,919 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 21:57:54,922 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 21:57:54,923 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 21:57:54,927 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 21:57:54,928 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 21:57:54,929 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 21:57:54,930 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 21:57:54,932 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 21:57:54,933 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 21:57:54,935 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 21:57:54,936 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 21:57:54,937 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 21:57:54,939 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 21:57:54,944 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 21:57:54,945 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 21:57:54,946 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 21:57:54,948 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 21:57:54,949 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 21:57:54,955 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 21:57:54,956 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 21:57:54,956 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 21:57:54,957 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 21:57:54,958 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 21:57:54,958 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 21:57:54,959 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 21:57:54,960 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 21:57:54,961 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 21:57:54,962 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 21:57:54,963 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 21:57:54,963 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 21:57:54,964 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 21:57:54,964 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 21:57:54,964 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 21:57:54,965 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 21:57:54,965 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 21:57:54,966 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 21:57:54,997 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 21:57:54,998 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 21:57:54,998 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 21:57:54,998 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 21:57:54,999 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 21:57:54,999 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 21:57:55,000 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 21:57:55,000 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 21:57:55,000 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 21:57:55,000 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 21:57:55,001 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 21:57:55,001 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 21:57:55,002 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 21:57:55,002 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 21:57:55,002 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 21:57:55,002 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 21:57:55,002 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 21:57:55,003 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 21:57:55,003 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 21:57:55,003 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 21:57:55,003 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 21:57:55,003 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:57:55,003 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 21:57:55,004 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 21:57:55,004 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 21:57:55,004 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 21:57:55,004 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 21:57:55,006 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 21:57:55,006 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 21:57:55,006 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 21:57:55,006 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bf59f873abe32ddc2d99221f4f189da946012506d30fecc03d275d110896ac6d [2022-02-20 21:57:55,273 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 21:57:55,301 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 21:57:55,304 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 21:57:55,305 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 21:57:55,306 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 21:57:55,307 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i [2022-02-20 21:57:55,369 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6c3015290/3b756ed96fdc4231abeba7767d21abfa/FLAG55a4cad91 [2022-02-20 21:57:56,076 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 21:57:56,077 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i [2022-02-20 21:57:56,116 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6c3015290/3b756ed96fdc4231abeba7767d21abfa/FLAG55a4cad91 [2022-02-20 21:57:56,178 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6c3015290/3b756ed96fdc4231abeba7767d21abfa [2022-02-20 21:57:56,180 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 21:57:56,181 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 21:57:56,182 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 21:57:56,182 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 21:57:56,185 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 21:57:56,186 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:57:56" (1/1) ... [2022-02-20 21:57:56,187 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@48a531a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:56, skipping insertion in model container [2022-02-20 21:57:56,188 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 09:57:56" (1/1) ... [2022-02-20 21:57:56,194 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 21:57:56,266 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 21:57:56,724 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name show at C: (*show)(struct kobject___0 * , struct attribute___0 * , char * ) [4786] [2022-02-20 21:57:56,726 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name store at C: (*store)(struct kobject___0 * , struct attribute___0 * , char const * , size_t ) [4787-4788] [2022-02-20 21:57:56,857 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i[144467,144480] [2022-02-20 21:57:57,465 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:57:57,490 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 21:57:57,606 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name show at C: (*show)(struct kobject___0 * , struct attribute___0 * , char * ) [4786] [2022-02-20 21:57:57,607 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name store at C: (*store)(struct kobject___0 * , struct attribute___0 * , char const * , size_t ) [4787-4788] [2022-02-20 21:57:57,613 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i[144467,144480] [2022-02-20 21:57:57,867 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 21:57:57,947 INFO L208 MainTranslator]: Completed translation [2022-02-20 21:57:57,948 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57 WrapperNode [2022-02-20 21:57:57,948 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 21:57:57,949 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 21:57:57,950 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 21:57:57,950 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 21:57:57,956 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,015 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,354 INFO L137 Inliner]: procedures = 151, calls = 808, calls flagged for inlining = 86, calls inlined = 71, statements flattened = 2174 [2022-02-20 21:57:58,355 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 21:57:58,356 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 21:57:58,356 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 21:57:58,356 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 21:57:58,364 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,364 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,417 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,418 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,622 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,641 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,693 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,783 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 21:57:58,784 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 21:57:58,785 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 21:57:58,785 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 21:57:58,786 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (1/1) ... [2022-02-20 21:57:58,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 21:57:58,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 21:57:58,817 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 21:57:58,824 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 21:57:58,856 INFO L130 BoogieDeclarations]: Found specification of procedure pdc_prep_lba48 [2022-02-20 21:57:58,856 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc_prep_lba48 [2022-02-20 21:57:58,856 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 21:57:58,857 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2022-02-20 21:57:58,857 INFO L138 BoogieDeclarations]: Found implementation of procedure msleep [2022-02-20 21:57:58,857 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 21:57:58,857 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 21:57:58,857 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 21:57:58,857 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 21:57:58,858 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 21:57:58,858 INFO L130 BoogieDeclarations]: Found specification of procedure pdc_reset_port [2022-02-20 21:57:58,858 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc_reset_port [2022-02-20 21:57:58,858 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 21:57:58,858 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 21:57:58,858 INFO L130 BoogieDeclarations]: Found specification of procedure pdc20621_i2c_read [2022-02-20 21:57:58,858 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc20621_i2c_read [2022-02-20 21:57:58,859 INFO L130 BoogieDeclarations]: Found specification of procedure pdc_pkt_footer [2022-02-20 21:57:58,859 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc_pkt_footer [2022-02-20 21:57:58,859 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 21:57:58,859 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 21:57:58,859 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 21:57:58,859 INFO L130 BoogieDeclarations]: Found specification of procedure ata_port_pbar_desc [2022-02-20 21:57:58,859 INFO L138 BoogieDeclarations]: Found implementation of procedure ata_port_pbar_desc [2022-02-20 21:57:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 21:57:58,860 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 21:57:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2022-02-20 21:57:58,860 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2022-02-20 21:57:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 21:57:58,860 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 21:57:58,860 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 21:57:58,861 INFO L130 BoogieDeclarations]: Found specification of procedure pdc20621_dump_hdma [2022-02-20 21:57:58,861 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc20621_dump_hdma [2022-02-20 21:57:58,861 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 21:57:58,861 INFO L130 BoogieDeclarations]: Found specification of procedure __pdc20621_push_hdma [2022-02-20 21:57:58,862 INFO L138 BoogieDeclarations]: Found implementation of procedure __pdc20621_push_hdma [2022-02-20 21:57:58,862 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2022-02-20 21:57:58,862 INFO L138 BoogieDeclarations]: Found implementation of procedure __const_udelay [2022-02-20 21:57:58,862 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 21:57:58,862 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 21:57:58,862 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 21:57:58,862 INFO L130 BoogieDeclarations]: Found specification of procedure ioread8 [2022-02-20 21:57:58,863 INFO L138 BoogieDeclarations]: Found implementation of procedure ioread8 [2022-02-20 21:57:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 21:57:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure pdc_prep_lba28 [2022-02-20 21:57:58,863 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc_prep_lba28 [2022-02-20 21:57:58,863 INFO L130 BoogieDeclarations]: Found specification of procedure devm_kzalloc [2022-02-20 21:57:58,864 INFO L138 BoogieDeclarations]: Found implementation of procedure devm_kzalloc [2022-02-20 21:57:58,864 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 21:57:58,864 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-02-20 21:57:58,864 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-02-20 21:57:58,864 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-02-20 21:57:58,864 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-02-20 21:57:58,865 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-02-20 21:57:58,865 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-02-20 21:57:58,866 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 21:57:58,866 INFO L130 BoogieDeclarations]: Found specification of procedure pdc20621_push_hdma [2022-02-20 21:57:58,867 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc20621_push_hdma [2022-02-20 21:57:58,867 INFO L130 BoogieDeclarations]: Found specification of procedure pdc20621_ata_pkt [2022-02-20 21:57:58,867 INFO L138 BoogieDeclarations]: Found implementation of procedure pdc20621_ata_pkt [2022-02-20 21:57:58,867 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 21:57:58,867 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 21:57:58,867 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 21:57:58,867 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 21:57:58,868 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 21:57:59,363 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 21:57:59,364 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 21:58:04,030 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 21:58:08,932 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 21:58:08,957 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 21:58:08,958 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 21:58:08,960 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:58:08 BoogieIcfgContainer [2022-02-20 21:58:08,961 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 21:58:08,963 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 21:58:08,963 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 21:58:08,966 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 21:58:08,966 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 09:57:56" (1/3) ... [2022-02-20 21:58:08,967 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@19c0663 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:58:08, skipping insertion in model container [2022-02-20 21:58:08,967 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 09:57:57" (2/3) ... [2022-02-20 21:58:08,968 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@19c0663 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 09:58:08, skipping insertion in model container [2022-02-20 21:58:08,968 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 09:58:08" (3/3) ... [2022-02-20 21:58:08,969 INFO L111 eAbstractionObserver]: Analyzing ICFG 43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--ata--sata_sx4.ko-entry_point.cil.out.i [2022-02-20 21:58:08,974 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 21:58:08,974 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 21:58:09,035 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 21:58:09,040 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 21:58:09,041 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 21:58:09,076 INFO L276 IsEmpty]: Start isEmpty. Operand has 668 states, 510 states have (on average 1.503921568627451) internal successors, (767), 523 states have internal predecessors, (767), 133 states have call successors, (133), 24 states have call predecessors, (133), 23 states have return successors, (128), 128 states have call predecessors, (128), 128 states have call successors, (128) [2022-02-20 21:58:09,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2022-02-20 21:58:09,103 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:58:09,106 INFO L514 BasicCegarLoop]: trace histogram [12, 12, 9, 9, 8, 8, 8, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:58:09,107 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:58:09,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:58:09,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1347520051, now seen corresponding path program 1 times [2022-02-20 21:58:09,118 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:58:09,119 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095803523] [2022-02-20 21:58:09,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:58:09,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:58:09,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,765 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:58:09,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,790 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,791 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,791 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1911#return; {671#true} is VALID [2022-02-20 21:58:09,792 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:58:09,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,814 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,815 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,815 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1913#return; {671#true} is VALID [2022-02-20 21:58:09,815 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:58:09,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,829 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,830 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,831 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,832 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1915#return; {671#true} is VALID [2022-02-20 21:58:09,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:58:09,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,853 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,853 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,854 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,855 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1917#return; {671#true} is VALID [2022-02-20 21:58:09,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:58:09,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,867 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1919#return; {671#true} is VALID [2022-02-20 21:58:09,874 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 21:58:09,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,885 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,885 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,886 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,886 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1921#return; {671#true} is VALID [2022-02-20 21:58:09,886 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-02-20 21:58:09,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,902 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,903 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,903 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1923#return; {671#true} is VALID [2022-02-20 21:58:09,903 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-02-20 21:58:09,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,917 INFO L290 TraceCheckUtils]: 0: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:09,918 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,918 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,918 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1925#return; {671#true} is VALID [2022-02-20 21:58:09,925 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-02-20 21:58:09,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,938 INFO L290 TraceCheckUtils]: 0: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:09,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,939 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,939 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {672#false} #1927#return; {672#false} is VALID [2022-02-20 21:58:09,940 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 67 [2022-02-20 21:58:09,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,956 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:58:09,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,969 INFO L290 TraceCheckUtils]: 0: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:09,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,970 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,970 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {671#true} #1885#return; {671#true} is VALID [2022-02-20 21:58:09,970 INFO L290 TraceCheckUtils]: 0: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~size#1 := #in~size#1;~gfp#1 := #in~gfp#1;havoc ~tmp~4#1.base, ~tmp~4#1.offset;assume { :begin_inline_devm_kmalloc } true;devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset, devm_kmalloc_#in~arg1#1, devm_kmalloc_#in~arg2#1 := ~dev#1.base, ~dev#1.offset, ~size#1, ~bitwiseOr(~gfp#1, 32768);havoc devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset, devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset, devm_kmalloc_~arg1#1, devm_kmalloc_~arg2#1;devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset := devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset;devm_kmalloc_~arg1#1 := devm_kmalloc_#in~arg1#1;devm_kmalloc_~arg2#1 := devm_kmalloc_#in~arg2#1; {671#true} is VALID [2022-02-20 21:58:09,971 INFO L272 TraceCheckUtils]: 1: Hoare triple {671#true} call devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset := ldv_malloc(0); {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:09,972 INFO L290 TraceCheckUtils]: 2: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:09,972 INFO L290 TraceCheckUtils]: 3: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,972 INFO L290 TraceCheckUtils]: 4: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,972 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {671#true} {671#true} #1885#return; {671#true} is VALID [2022-02-20 21:58:09,972 INFO L290 TraceCheckUtils]: 6: Hoare triple {671#true} devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset := devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset; {671#true} is VALID [2022-02-20 21:58:09,973 INFO L290 TraceCheckUtils]: 7: Hoare triple {671#true} #t~ret26#1.base, #t~ret26#1.offset := devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;assume { :end_inline_devm_kmalloc } true;~tmp~4#1.base, ~tmp~4#1.offset := #t~ret26#1.base, #t~ret26#1.offset;havoc #t~ret26#1.base, #t~ret26#1.offset;#res#1.base, #res#1.offset := ~tmp~4#1.base, ~tmp~4#1.offset; {671#true} is VALID [2022-02-20 21:58:09,973 INFO L290 TraceCheckUtils]: 8: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,973 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {671#true} {672#false} #1929#return; {672#false} is VALID [2022-02-20 21:58:09,974 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2022-02-20 21:58:09,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,985 INFO L290 TraceCheckUtils]: 0: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:09,986 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:09,986 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {671#true} {672#false} #1931#return; {672#false} is VALID [2022-02-20 21:58:09,986 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 101 [2022-02-20 21:58:09,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:09,995 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:09,995 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:09,995 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1939#return; {672#false} is VALID [2022-02-20 21:58:09,996 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 105 [2022-02-20 21:58:09,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,005 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,005 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1941#return; {672#false} is VALID [2022-02-20 21:58:10,006 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 110 [2022-02-20 21:58:10,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,015 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1943#return; {672#false} is VALID [2022-02-20 21:58:10,015 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2022-02-20 21:58:10,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,025 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,025 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,025 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1945#return; {672#false} is VALID [2022-02-20 21:58:10,025 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2022-02-20 21:58:10,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,034 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~arg0 := #in~arg0; {671#true} is VALID [2022-02-20 21:58:10,034 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,035 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1947#return; {672#false} is VALID [2022-02-20 21:58:10,035 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2022-02-20 21:58:10,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,043 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,044 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1949#return; {672#false} is VALID [2022-02-20 21:58:10,044 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 129 [2022-02-20 21:58:10,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,052 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,053 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1951#return; {672#false} is VALID [2022-02-20 21:58:10,053 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2022-02-20 21:58:10,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,062 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,063 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1953#return; {672#false} is VALID [2022-02-20 21:58:10,074 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2022-02-20 21:58:10,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 21:58:10,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,102 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,103 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,103 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,103 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:58:10,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,111 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,112 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,112 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:58:10,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,120 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,121 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,121 INFO L290 TraceCheckUtils]: 0: Hoare triple {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {671#true} is VALID [2022-02-20 21:58:10,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,122 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,122 INFO L272 TraceCheckUtils]: 3: Hoare triple {671#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,122 INFO L290 TraceCheckUtils]: 4: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,122 INFO L290 TraceCheckUtils]: 5: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,123 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,123 INFO L272 TraceCheckUtils]: 7: Hoare triple {671#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,123 INFO L290 TraceCheckUtils]: 8: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,123 INFO L290 TraceCheckUtils]: 9: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,123 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,124 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#true} havoc #t~ret320; {671#true} is VALID [2022-02-20 21:58:10,124 INFO L272 TraceCheckUtils]: 12: Hoare triple {671#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,124 INFO L290 TraceCheckUtils]: 13: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,124 INFO L290 TraceCheckUtils]: 14: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,124 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,125 INFO L290 TraceCheckUtils]: 16: Hoare triple {671#true} ~count~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,125 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#true} assume !(~count~0 % 4294967296 <= 1000); {671#true} is VALID [2022-02-20 21:58:10,125 INFO L290 TraceCheckUtils]: 18: Hoare triple {671#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {671#true} is VALID [2022-02-20 21:58:10,125 INFO L290 TraceCheckUtils]: 19: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,126 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {671#true} {672#false} #1955#return; {672#false} is VALID [2022-02-20 21:58:10,126 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 182 [2022-02-20 21:58:10,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,134 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,135 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,135 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1961#return; {672#false} is VALID [2022-02-20 21:58:10,135 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2022-02-20 21:58:10,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,151 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,152 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,152 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1963#return; {672#false} is VALID [2022-02-20 21:58:10,152 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 192 [2022-02-20 21:58:10,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,161 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1965#return; {672#false} is VALID [2022-02-20 21:58:10,161 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 196 [2022-02-20 21:58:10,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,170 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,170 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1967#return; {672#false} is VALID [2022-02-20 21:58:10,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 201 [2022-02-20 21:58:10,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,188 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 21:58:10,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,195 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,196 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,196 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:58:10,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,203 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,203 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,204 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,204 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:58:10,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,210 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,211 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,211 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {671#true} is VALID [2022-02-20 21:58:10,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,212 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,212 INFO L272 TraceCheckUtils]: 3: Hoare triple {671#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,212 INFO L290 TraceCheckUtils]: 4: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,212 INFO L290 TraceCheckUtils]: 5: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,213 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,213 INFO L272 TraceCheckUtils]: 7: Hoare triple {671#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,213 INFO L290 TraceCheckUtils]: 8: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,213 INFO L290 TraceCheckUtils]: 9: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,213 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,213 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#true} havoc #t~ret320; {671#true} is VALID [2022-02-20 21:58:10,214 INFO L272 TraceCheckUtils]: 12: Hoare triple {671#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,214 INFO L290 TraceCheckUtils]: 13: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,214 INFO L290 TraceCheckUtils]: 14: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,214 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,214 INFO L290 TraceCheckUtils]: 16: Hoare triple {671#true} ~count~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,215 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#true} assume !(~count~0 % 4294967296 <= 1000); {671#true} is VALID [2022-02-20 21:58:10,215 INFO L290 TraceCheckUtils]: 18: Hoare triple {671#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {671#true} is VALID [2022-02-20 21:58:10,215 INFO L290 TraceCheckUtils]: 19: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,215 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {671#true} {672#false} #1969#return; {672#false} is VALID [2022-02-20 21:58:10,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 227 [2022-02-20 21:58:10,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,223 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,224 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,224 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {672#false} #1975#return; {672#false} is VALID [2022-02-20 21:58:10,224 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 236 [2022-02-20 21:58:10,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,242 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 21:58:10,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,249 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,250 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,250 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,250 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:58:10,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,258 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,258 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,258 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,258 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:58:10,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:10,265 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,266 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,266 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,266 INFO L290 TraceCheckUtils]: 0: Hoare triple {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {671#true} is VALID [2022-02-20 21:58:10,266 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,267 INFO L290 TraceCheckUtils]: 2: Hoare triple {671#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,267 INFO L272 TraceCheckUtils]: 3: Hoare triple {671#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,267 INFO L290 TraceCheckUtils]: 4: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,267 INFO L290 TraceCheckUtils]: 5: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,267 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,268 INFO L272 TraceCheckUtils]: 7: Hoare triple {671#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,268 INFO L290 TraceCheckUtils]: 8: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,268 INFO L290 TraceCheckUtils]: 9: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,268 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,268 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#true} havoc #t~ret320; {671#true} is VALID [2022-02-20 21:58:10,269 INFO L272 TraceCheckUtils]: 12: Hoare triple {671#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,269 INFO L290 TraceCheckUtils]: 13: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,269 INFO L290 TraceCheckUtils]: 14: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,269 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,269 INFO L290 TraceCheckUtils]: 16: Hoare triple {671#true} ~count~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,270 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#true} assume !(~count~0 % 4294967296 <= 1000); {671#true} is VALID [2022-02-20 21:58:10,270 INFO L290 TraceCheckUtils]: 18: Hoare triple {671#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {671#true} is VALID [2022-02-20 21:58:10,270 INFO L290 TraceCheckUtils]: 19: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,270 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {671#true} {672#false} #1981#return; {672#false} is VALID [2022-02-20 21:58:10,272 INFO L290 TraceCheckUtils]: 0: Hoare triple {671#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(94, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(9, 4);call #Ultimate.allocInit(9, 5);call #Ultimate.allocInit(214, 6);call #Ultimate.allocInit(214, 7);call #Ultimate.allocInit(214, 8);call #Ultimate.allocInit(25, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(55, 11);call #Ultimate.allocInit(5, 12);call write~init~int(48, 12, 0, 1);call write~init~int(46, 12, 1, 1);call write~init~int(49, 12, 2, 1);call write~init~int(50, 12, 3, 1);call write~init~int(0, 12, 4, 1);call #Ultimate.allocInit(9, 13);call #Ultimate.allocInit(5, 14);call write~init~int(109, 14, 0, 1);call write~init~int(109, 14, 1, 1);call write~init~int(105, 14, 2, 1);call write~init~int(111, 14, 3, 1);call write~init~int(0, 14, 4, 1);call #Ultimate.allocInit(5, 15);call write~init~int(100, 15, 0, 1);call write~init~int(105, 15, 1, 1);call write~init~int(109, 15, 2, 1);call write~init~int(109, 15, 3, 1);call write~init~int(0, 15, 4, 1);call #Ultimate.allocInit(5, 16);call write~init~int(112, 16, 0, 1);call write~init~int(111, 16, 1, 1);call write~init~int(114, 16, 2, 1);call write~init~int(116, 16, 3, 1);call write~init~int(0, 16, 4, 1);call #Ultimate.allocInit(9, 17);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~pdc_20621_ops_group0~0.base, ~pdc_20621_ops_group0~0.offset := 0, 0;~pdc_sata_sht_group0~0.base, ~pdc_sata_sht_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~pdc_20621_ops_group2~0.base, ~pdc_20621_ops_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~pdc_20621_ops_group1~0.base, ~pdc_20621_ops_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~pdc_sata_pci_driver_group0~0.base, ~pdc_sata_pci_driver_group0~0.offset := 0, 0;~#pdc_sata_sht~0.base, ~#pdc_sata_sht~0.offset := 18, 0;call #Ultimate.allocInit(337, 18);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pdc_sata_sht~0.base, ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(3, 0, ~#pdc_sata_sht~0.base, 8 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 16 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 24 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 32 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_ioctl.base, #funAddr~ata_scsi_ioctl.offset, ~#pdc_sata_sht~0.base, 40 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 48 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_queuecmd.base, #funAddr~ata_scsi_queuecmd.offset, ~#pdc_sata_sht~0.base, 56 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 64 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 72 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 80 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 88 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 96 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 104 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 112 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_slave_config.base, #funAddr~ata_scsi_slave_config.offset, ~#pdc_sata_sht~0.base, 120 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_slave_destroy.base, #funAddr~ata_scsi_slave_destroy.offset, ~#pdc_sata_sht~0.base, 128 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 136 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 144 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 152 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 160 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 168 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 176 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_std_bios_param.base, #funAddr~ata_std_bios_param.offset, ~#pdc_sata_sht~0.base, 184 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_unlock_native_capacity.base, #funAddr~ata_scsi_unlock_native_capacity.offset, ~#pdc_sata_sht~0.base, 192 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 200 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 208 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 216 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 224 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pdc_sata_sht~0.base, 232 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 240 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(1, ~#pdc_sata_sht~0.base, 248 + ~#pdc_sata_sht~0.offset, 4);call write~init~int(-1, ~#pdc_sata_sht~0.base, 252 + ~#pdc_sata_sht~0.offset, 4);call write~init~int(128, ~#pdc_sata_sht~0.base, 256 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(0, ~#pdc_sata_sht~0.base, 258 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(0, ~#pdc_sata_sht~0.base, 260 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(65535, ~#pdc_sata_sht~0.base, 262 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(1, ~#pdc_sata_sht~0.base, 270 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(0, ~#pdc_sata_sht~0.base, 272 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 273 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 274 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(1, ~#pdc_sata_sht~0.base, 275 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(1, ~#pdc_sata_sht~0.base, 276 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 277 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 278 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 279 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 280 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 281 + ~#pdc_sata_sht~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 285 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(~#ata_common_sdev_attrs~0.base, ~#ata_common_sdev_attrs~0.offset, ~#pdc_sata_sht~0.base, 293 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 301 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 309 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(0, ~#pdc_sata_sht~0.base, 317 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(0, ~#pdc_sata_sht~0.base, 325 + ~#pdc_sata_sht~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 329 + ~#pdc_sata_sht~0.offset, 8);~#pdc_20621_ops~0.base, ~#pdc_20621_ops~0.offset := 19, 0;call #Ultimate.allocInit(488, 19);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_check_atapi_dma.base, #funAddr~pdc_check_atapi_dma.offset, ~#pdc_20621_ops~0.base, 8 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc20621_qc_prep.base, #funAddr~pdc20621_qc_prep.offset, ~#pdc_20621_ops~0.base, 16 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc20621_qc_issue.base, #funAddr~pdc20621_qc_issue.offset, ~#pdc_20621_ops~0.base, 24 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 32 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 40 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 48 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 56 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 64 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 72 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 80 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 88 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_freeze.base, #funAddr~pdc_freeze.offset, ~#pdc_20621_ops~0.base, 96 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_thaw.base, #funAddr~pdc_thaw.offset, ~#pdc_20621_ops~0.base, 104 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 112 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_softreset.base, #funAddr~pdc_softreset.offset, ~#pdc_20621_ops~0.base, 120 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 128 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 136 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 144 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 152 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 160 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 168 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_error_handler.base, #funAddr~pdc_error_handler.offset, ~#pdc_20621_ops~0.base, 176 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, -2, ~#pdc_20621_ops~0.base, 184 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_post_internal_cmd.base, #funAddr~pdc_post_internal_cmd.offset, ~#pdc_20621_ops~0.base, 192 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 200 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 208 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 216 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 224 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 232 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 240 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 248 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 256 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 264 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_port_start.base, #funAddr~pdc_port_start.offset, ~#pdc_20621_ops~0.base, 272 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 280 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 288 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 296 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 304 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 312 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 320 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_tf_load_mmio.base, #funAddr~pdc_tf_load_mmio.offset, ~#pdc_20621_ops~0.base, 328 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 336 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_exec_command_mmio.base, #funAddr~pdc_exec_command_mmio.offset, ~#pdc_20621_ops~0.base, 344 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 352 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 360 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 368 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc20621_irq_clear.base, #funAddr~pdc20621_irq_clear.offset, ~#pdc_20621_ops~0.base, 376 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 384 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 392 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 400 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 408 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 416 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 424 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 432 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 440 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 448 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 456 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 464 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 472 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(~#ata_sff_port_ops~0.base, ~#ata_sff_port_ops~0.offset, ~#pdc_20621_ops~0.base, 480 + ~#pdc_20621_ops~0.offset, 8);~#pdc_port_info~0.base, ~#pdc_port_info~0.offset := 20, 0;call #Ultimate.allocInit(56, 20);call write~init~int(578, ~#pdc_port_info~0.base, ~#pdc_port_info~0.offset, 8);call write~init~int(0, ~#pdc_port_info~0.base, 8 + ~#pdc_port_info~0.offset, 8);call write~init~int(31, ~#pdc_port_info~0.base, 16 + ~#pdc_port_info~0.offset, 8);call write~init~int(7, ~#pdc_port_info~0.base, 24 + ~#pdc_port_info~0.offset, 8);call write~init~int(127, ~#pdc_port_info~0.base, 32 + ~#pdc_port_info~0.offset, 8);call write~init~$Pointer$(~#pdc_20621_ops~0.base, ~#pdc_20621_ops~0.offset, ~#pdc_port_info~0.base, 40 + ~#pdc_port_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_port_info~0.base, 48 + ~#pdc_port_info~0.offset, 8);~#pdc_sata_pci_tbl~0.base, ~#pdc_sata_pci_tbl~0.offset := 21, 0;call #Ultimate.allocInit(64, 21);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pdc_sata_pci_tbl~0.base);call write~unchecked~int(4186, ~#pdc_sata_pci_tbl~0.base, ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(26146, ~#pdc_sata_pci_tbl~0.base, 4 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(4294967295, ~#pdc_sata_pci_tbl~0.base, 8 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(4294967295, ~#pdc_sata_pci_tbl~0.base, 12 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(0, ~#pdc_sata_pci_tbl~0.base, 16 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(0, ~#pdc_sata_pci_tbl~0.base, 20 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(0, ~#pdc_sata_pci_tbl~0.base, 24 + ~#pdc_sata_pci_tbl~0.offset, 8);~#pdc_sata_pci_driver~0.base, ~#pdc_sata_pci_driver~0.offset := 22, 0;call #Ultimate.allocInit(301, 22);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 8 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pdc_sata_pci_driver~0.base, 16 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(~#pdc_sata_pci_tbl~0.base, ~#pdc_sata_pci_tbl~0.offset, ~#pdc_sata_pci_driver~0.base, 24 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_sata_init_one.base, #funAddr~pdc_sata_init_one.offset, ~#pdc_sata_pci_driver~0.base, 32 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_pci_remove_one.base, #funAddr~ata_pci_remove_one.offset, ~#pdc_sata_pci_driver~0.base, 40 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 48 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 56 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 64 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 72 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 80 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 88 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 96 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 104 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 112 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 120 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 128 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 136 + ~#pdc_sata_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 137 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 145 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 153 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 161 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 169 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 177 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 185 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 193 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 201 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 209 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 217 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 221 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 225 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 229 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 237 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 245 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 253 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 261 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 269 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 273 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 285 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 293 + ~#pdc_sata_pci_driver~0.offset, 8);~__mod_pci__pdc_sata_pci_tbl_device_table~0.vendor := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.device := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.subvendor := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.subdevice := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.class := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.class_mask := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.driver_data := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_spin~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,273 INFO L290 TraceCheckUtils]: 1: Hoare triple {671#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret434#1.base, main_#t~ret434#1.offset, main_#t~ret435#1.base, main_#t~ret435#1.offset, main_#t~ret436#1.base, main_#t~ret436#1.offset, main_#t~ret437#1.base, main_#t~ret437#1.offset, main_#t~ret438#1.base, main_#t~ret438#1.offset, main_#t~ret439#1.base, main_#t~ret439#1.offset, main_#t~nondet440#1, main_#t~ret441#1.base, main_#t~ret441#1.offset, main_#t~ret442#1.base, main_#t~ret442#1.offset, main_#t~nondet443#1, main_#t~memset~res444#1.base, main_#t~memset~res444#1.offset, main_#t~nondet445#1, main_#t~switch446#1, main_#t~nondet447#1, main_#t~switch448#1, main_#t~ret449#1, main_#t~nondet450#1, main_#t~switch451#1, main_#t~ret452#1, main_#t~nondet453#1, main_#t~switch454#1, main_#t~mem455#1, main_#t~ret456#1, main_#t~ret457#1, main_#t~ret458#1, main_#t~ret459#1, main_#t~nondet460#1, main_#t~switch461#1, main_#t~ret462#1, main_#t~ret463#1, main_#t~ret464#1, main_#t~ret465#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~36#1.base, main_~tmp~36#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset, main_~ldvarg2~0#1, main_~tmp___5~3#1, main_~#ldvarg6~0#1.base, main_~#ldvarg6~0#1.offset, main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset, main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset, main_~ldvarg10~0#1.base, main_~ldvarg10~0#1.offset, main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset, main_~ldvarg9~0#1, main_~tmp___8~3#1, main_~tmp___9~1#1, main_~tmp___10~1#1, main_~tmp___11~1#1, main_~tmp___12~1#1, main_~tmp___13~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~36#1.base, main_~tmp~36#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset;havoc main_~ldvarg2~0#1;havoc main_~tmp___5~3#1;call main_~#ldvarg6~0#1.base, main_~#ldvarg6~0#1.offset := #Ultimate.allocOnStack(8);havoc main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset;havoc main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset;havoc main_~ldvarg10~0#1.base, main_~ldvarg10~0#1.offset;havoc main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset;havoc main_~ldvarg9~0#1;havoc main_~tmp___8~3#1;havoc main_~tmp___9~1#1;havoc main_~tmp___10~1#1;havoc main_~tmp___11~1#1;havoc main_~tmp___12~1#1;havoc main_~tmp___13~1#1; {671#true} is VALID [2022-02-20 21:58:10,275 INFO L272 TraceCheckUtils]: 2: Hoare triple {671#true} call main_#t~ret434#1.base, main_#t~ret434#1.offset := ldv_zalloc(32); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,275 INFO L290 TraceCheckUtils]: 3: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,276 INFO L290 TraceCheckUtils]: 4: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,276 INFO L290 TraceCheckUtils]: 5: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,276 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {671#true} {671#true} #1911#return; {671#true} is VALID [2022-02-20 21:58:10,276 INFO L290 TraceCheckUtils]: 7: Hoare triple {671#true} main_~tmp~36#1.base, main_~tmp~36#1.offset := main_#t~ret434#1.base, main_#t~ret434#1.offset;havoc main_#t~ret434#1.base, main_#t~ret434#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~36#1.base, main_~tmp~36#1.offset; {671#true} is VALID [2022-02-20 21:58:10,277 INFO L272 TraceCheckUtils]: 8: Hoare triple {671#true} call main_#t~ret435#1.base, main_#t~ret435#1.offset := ldv_zalloc(1); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,277 INFO L290 TraceCheckUtils]: 9: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,278 INFO L290 TraceCheckUtils]: 10: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,278 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,278 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {671#true} {671#true} #1913#return; {671#true} is VALID [2022-02-20 21:58:10,278 INFO L290 TraceCheckUtils]: 13: Hoare triple {671#true} main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset := main_#t~ret435#1.base, main_#t~ret435#1.offset;havoc main_#t~ret435#1.base, main_#t~ret435#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset; {671#true} is VALID [2022-02-20 21:58:10,279 INFO L272 TraceCheckUtils]: 14: Hoare triple {671#true} call main_#t~ret436#1.base, main_#t~ret436#1.offset := ldv_zalloc(496); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,279 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,279 INFO L290 TraceCheckUtils]: 16: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,280 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,280 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {671#true} {671#true} #1915#return; {671#true} is VALID [2022-02-20 21:58:10,280 INFO L290 TraceCheckUtils]: 19: Hoare triple {671#true} main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset := main_#t~ret436#1.base, main_#t~ret436#1.offset;havoc main_#t~ret436#1.base, main_#t~ret436#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset; {671#true} is VALID [2022-02-20 21:58:10,281 INFO L272 TraceCheckUtils]: 20: Hoare triple {671#true} call main_#t~ret437#1.base, main_#t~ret437#1.offset := ldv_zalloc(456); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,281 INFO L290 TraceCheckUtils]: 21: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,281 INFO L290 TraceCheckUtils]: 22: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,281 INFO L290 TraceCheckUtils]: 23: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,282 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {671#true} {671#true} #1917#return; {671#true} is VALID [2022-02-20 21:58:10,282 INFO L290 TraceCheckUtils]: 25: Hoare triple {671#true} main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset := main_#t~ret437#1.base, main_#t~ret437#1.offset;havoc main_#t~ret437#1.base, main_#t~ret437#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset; {671#true} is VALID [2022-02-20 21:58:10,283 INFO L272 TraceCheckUtils]: 26: Hoare triple {671#true} call main_#t~ret438#1.base, main_#t~ret438#1.offset := ldv_zalloc(3584); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,283 INFO L290 TraceCheckUtils]: 27: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,283 INFO L290 TraceCheckUtils]: 28: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,283 INFO L290 TraceCheckUtils]: 29: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,283 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {671#true} {671#true} #1919#return; {671#true} is VALID [2022-02-20 21:58:10,284 INFO L290 TraceCheckUtils]: 31: Hoare triple {671#true} main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset := main_#t~ret438#1.base, main_#t~ret438#1.offset;havoc main_#t~ret438#1.base, main_#t~ret438#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset; {671#true} is VALID [2022-02-20 21:58:10,284 INFO L272 TraceCheckUtils]: 32: Hoare triple {671#true} call main_#t~ret439#1.base, main_#t~ret439#1.offset := ldv_zalloc(4); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,285 INFO L290 TraceCheckUtils]: 33: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,285 INFO L290 TraceCheckUtils]: 34: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,285 INFO L290 TraceCheckUtils]: 35: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,285 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {671#true} {671#true} #1921#return; {671#true} is VALID [2022-02-20 21:58:10,285 INFO L290 TraceCheckUtils]: 37: Hoare triple {671#true} main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset := main_#t~ret439#1.base, main_#t~ret439#1.offset;havoc main_#t~ret439#1.base, main_#t~ret439#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset;assume -2147483648 <= main_#t~nondet440#1 && main_#t~nondet440#1 <= 2147483647;main_~tmp___5~3#1 := main_#t~nondet440#1;havoc main_#t~nondet440#1;main_~ldvarg2~0#1 := main_~tmp___5~3#1; {671#true} is VALID [2022-02-20 21:58:10,286 INFO L272 TraceCheckUtils]: 38: Hoare triple {671#true} call main_#t~ret441#1.base, main_#t~ret441#1.offset := ldv_zalloc(7056); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,286 INFO L290 TraceCheckUtils]: 39: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,287 INFO L290 TraceCheckUtils]: 40: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,287 INFO L290 TraceCheckUtils]: 41: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,287 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {671#true} {671#true} #1923#return; {671#true} is VALID [2022-02-20 21:58:10,287 INFO L290 TraceCheckUtils]: 43: Hoare triple {671#true} main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset := main_#t~ret441#1.base, main_#t~ret441#1.offset;havoc main_#t~ret441#1.base, main_#t~ret441#1.offset;main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset := main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset; {671#true} is VALID [2022-02-20 21:58:10,288 INFO L272 TraceCheckUtils]: 44: Hoare triple {671#true} call main_#t~ret442#1.base, main_#t~ret442#1.offset := ldv_zalloc(4); {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,288 INFO L290 TraceCheckUtils]: 45: Hoare triple {826#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {671#true} is VALID [2022-02-20 21:58:10,289 INFO L290 TraceCheckUtils]: 46: Hoare triple {671#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,289 INFO L290 TraceCheckUtils]: 47: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,289 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {671#true} {671#true} #1925#return; {671#true} is VALID [2022-02-20 21:58:10,289 INFO L290 TraceCheckUtils]: 49: Hoare triple {671#true} main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset := main_#t~ret442#1.base, main_#t~ret442#1.offset;havoc main_#t~ret442#1.base, main_#t~ret442#1.offset;main_~ldvarg10~0#1.base, main_~ldvarg10~0#1.offset := main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset;main_~tmp___8~3#1 := main_#t~nondet443#1;havoc main_#t~nondet443#1;main_~ldvarg9~0#1 := main_~tmp___8~3#1;assume { :begin_inline_ldv_initialize } true; {671#true} is VALID [2022-02-20 21:58:10,289 INFO L290 TraceCheckUtils]: 50: Hoare triple {671#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_#Ultimate.C_memset } true;#Ultimate.C_memset_#ptr#1.base, #Ultimate.C_memset_#ptr#1.offset, #Ultimate.C_memset_#value#1, #Ultimate.C_memset_#amount#1 := main_~#ldvarg6~0#1.base, main_~#ldvarg6~0#1.offset, 0, 8;havoc #Ultimate.C_memset_#res#1.base, #Ultimate.C_memset_#res#1.offset;havoc #Ultimate.C_memset_#t~loopctr491#1;#Ultimate.C_memset_#t~loopctr491#1 := 0; {671#true} is VALID [2022-02-20 21:58:10,290 INFO L290 TraceCheckUtils]: 51: Hoare triple {671#true} assume !(#Ultimate.C_memset_#t~loopctr491#1 % 18446744073709551616 < #Ultimate.C_memset_#amount#1 % 18446744073709551616); {671#true} is VALID [2022-02-20 21:58:10,290 INFO L290 TraceCheckUtils]: 52: Hoare triple {671#true} assume #Ultimate.C_memset_#res#1.base == #Ultimate.C_memset_#ptr#1.base && #Ultimate.C_memset_#res#1.offset == #Ultimate.C_memset_#ptr#1.offset;main_#t~memset~res444#1.base, main_#t~memset~res444#1.offset := #Ultimate.C_memset_#res#1.base, #Ultimate.C_memset_#res#1.offset;assume { :end_inline_#Ultimate.C_memset } true;havoc main_#t~memset~res444#1.base, main_#t~memset~res444#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {705#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 21:58:10,291 INFO L290 TraceCheckUtils]: 53: Hoare triple {705#(= ~ldv_state_variable_1~0 0)} assume -2147483648 <= main_#t~nondet445#1 && main_#t~nondet445#1 <= 2147483647;main_~tmp___9~1#1 := main_#t~nondet445#1;havoc main_#t~nondet445#1;main_#t~switch446#1 := 0 == main_~tmp___9~1#1; {705#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 21:58:10,291 INFO L290 TraceCheckUtils]: 54: Hoare triple {705#(= ~ldv_state_variable_1~0 0)} assume main_#t~switch446#1; {705#(= ~ldv_state_variable_1~0 0)} is VALID [2022-02-20 21:58:10,292 INFO L290 TraceCheckUtils]: 55: Hoare triple {705#(= ~ldv_state_variable_1~0 0)} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet447#1 && main_#t~nondet447#1 <= 2147483647;main_~tmp___10~1#1 := main_#t~nondet447#1;havoc main_#t~nondet447#1;main_#t~switch448#1 := 0 == main_~tmp___10~1#1; {672#false} is VALID [2022-02-20 21:58:10,292 INFO L290 TraceCheckUtils]: 56: Hoare triple {672#false} assume main_#t~switch448#1; {672#false} is VALID [2022-02-20 21:58:10,292 INFO L290 TraceCheckUtils]: 57: Hoare triple {672#false} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_pdc_sata_init_one } true;pdc_sata_init_one_#in~pdev#1.base, pdc_sata_init_one_#in~pdev#1.offset, pdc_sata_init_one_#in~ent#1.base, pdc_sata_init_one_#in~ent#1.offset := ~pdc_sata_pci_driver_group0~0.base, ~pdc_sata_pci_driver_group0~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc pdc_sata_init_one_#res#1;havoc pdc_sata_init_one_#t~mem414#1, pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset, pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset, pdc_sata_init_one_#t~ret417#1, pdc_sata_init_one_#t~ret418#1, pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset, pdc_sata_init_one_#t~mem420#1.base, pdc_sata_init_one_#t~mem420#1.offset, pdc_sata_init_one_#t~mem421#1.base, pdc_sata_init_one_#t~mem421#1.offset, pdc_sata_init_one_#t~mem422#1.base, pdc_sata_init_one_#t~mem422#1.offset, pdc_sata_init_one_#t~ret423#1, pdc_sata_init_one_#t~ret424#1, pdc_sata_init_one_#t~ret425#1, pdc_sata_init_one_#t~mem426#1, pdc_sata_init_one_#t~ret427#1, pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, pdc_sata_init_one_~ent#1.base, pdc_sata_init_one_~ent#1.offset, pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset, pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset, pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset, pdc_sata_init_one_~i~7#1, pdc_sata_init_one_~rc~0#1, pdc_sata_init_one_~__print_once~0#1, pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset, pdc_sata_init_one_~ap~8#1.base, pdc_sata_init_one_~ap~8#1.offset, pdc_sata_init_one_~base~0#1.base, pdc_sata_init_one_~base~0#1.offset, pdc_sata_init_one_~offset~0#1, pdc_sata_init_one_~tmp___0~15#1, pdc_sata_init_one_~tmp___1~7#1;pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset := pdc_sata_init_one_#in~pdev#1.base, pdc_sata_init_one_#in~pdev#1.offset;pdc_sata_init_one_~ent#1.base, pdc_sata_init_one_~ent#1.offset := pdc_sata_init_one_#in~ent#1.base, pdc_sata_init_one_#in~ent#1.offset;call pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset := #Ultimate.allocOnStack(16);havoc pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset;havoc pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset;havoc pdc_sata_init_one_~i~7#1;havoc pdc_sata_init_one_~rc~0#1;havoc pdc_sata_init_one_~__print_once~0#1;havoc pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset;havoc pdc_sata_init_one_~ap~8#1.base, pdc_sata_init_one_~ap~8#1.offset;havoc pdc_sata_init_one_~base~0#1.base, pdc_sata_init_one_~base~0#1.offset;havoc pdc_sata_init_one_~offset~0#1;havoc pdc_sata_init_one_~tmp___0~15#1;havoc pdc_sata_init_one_~tmp___1~7#1;call pdc_sata_init_one_#t~mem414#1 := read~int(pdc_sata_init_one_~ent#1.base, 24 + pdc_sata_init_one_~ent#1.offset, 8);call write~$Pointer$(~#pdc_port_info~0.base, ~#pdc_port_info~0.offset + 56 * (if pdc_sata_init_one_#t~mem414#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then pdc_sata_init_one_#t~mem414#1 % 18446744073709551616 % 18446744073709551616 else pdc_sata_init_one_#t~mem414#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset, 8);havoc pdc_sata_init_one_#t~mem414#1;call write~$Pointer$(0, 0, pdc_sata_init_one_~#ppi~0#1.base, 8 + pdc_sata_init_one_~#ppi~0#1.offset, 8); {672#false} is VALID [2022-02-20 21:58:10,293 INFO L290 TraceCheckUtils]: 58: Hoare triple {672#false} assume !(0 == pdc_sata_init_one_~__print_once~0#1 % 256); {672#false} is VALID [2022-02-20 21:58:10,293 INFO L290 TraceCheckUtils]: 59: Hoare triple {672#false} assume { :begin_inline_ata_host_alloc_pinfo } true;ata_host_alloc_pinfo_#in~arg0#1.base, ata_host_alloc_pinfo_#in~arg0#1.offset, ata_host_alloc_pinfo_#in~arg1#1.base, ata_host_alloc_pinfo_#in~arg1#1.offset, ata_host_alloc_pinfo_#in~arg2#1 := pdc_sata_init_one_~pdev#1.base, 147 + pdc_sata_init_one_~pdev#1.offset, pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset, 4;havoc ata_host_alloc_pinfo_#res#1.base, ata_host_alloc_pinfo_#res#1.offset;havoc ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset, ata_host_alloc_pinfo_~arg0#1.base, ata_host_alloc_pinfo_~arg0#1.offset, ata_host_alloc_pinfo_~arg1#1.base, ata_host_alloc_pinfo_~arg1#1.offset, ata_host_alloc_pinfo_~arg2#1;ata_host_alloc_pinfo_~arg0#1.base, ata_host_alloc_pinfo_~arg0#1.offset := ata_host_alloc_pinfo_#in~arg0#1.base, ata_host_alloc_pinfo_#in~arg0#1.offset;ata_host_alloc_pinfo_~arg1#1.base, ata_host_alloc_pinfo_~arg1#1.offset := ata_host_alloc_pinfo_#in~arg1#1.base, ata_host_alloc_pinfo_#in~arg1#1.offset;ata_host_alloc_pinfo_~arg2#1 := ata_host_alloc_pinfo_#in~arg2#1; {672#false} is VALID [2022-02-20 21:58:10,293 INFO L272 TraceCheckUtils]: 60: Hoare triple {672#false} call ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset := ldv_malloc(284); {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,293 INFO L290 TraceCheckUtils]: 61: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:10,293 INFO L290 TraceCheckUtils]: 62: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,294 INFO L290 TraceCheckUtils]: 63: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,294 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {671#true} {672#false} #1927#return; {672#false} is VALID [2022-02-20 21:58:10,294 INFO L290 TraceCheckUtils]: 65: Hoare triple {672#false} ata_host_alloc_pinfo_#res#1.base, ata_host_alloc_pinfo_#res#1.offset := ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset;havoc ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset; {672#false} is VALID [2022-02-20 21:58:10,294 INFO L290 TraceCheckUtils]: 66: Hoare triple {672#false} pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset := ata_host_alloc_pinfo_#res#1.base, ata_host_alloc_pinfo_#res#1.offset;assume { :end_inline_ata_host_alloc_pinfo } true;pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset := pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset;havoc pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset; {672#false} is VALID [2022-02-20 21:58:10,294 INFO L272 TraceCheckUtils]: 67: Hoare triple {672#false} call pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset := devm_kzalloc(pdc_sata_init_one_~pdev#1.base, 147 + pdc_sata_init_one_~pdev#1.offset, 784, 208); {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,295 INFO L290 TraceCheckUtils]: 68: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~size#1 := #in~size#1;~gfp#1 := #in~gfp#1;havoc ~tmp~4#1.base, ~tmp~4#1.offset;assume { :begin_inline_devm_kmalloc } true;devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset, devm_kmalloc_#in~arg1#1, devm_kmalloc_#in~arg2#1 := ~dev#1.base, ~dev#1.offset, ~size#1, ~bitwiseOr(~gfp#1, 32768);havoc devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset, devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset, devm_kmalloc_~arg1#1, devm_kmalloc_~arg2#1;devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset := devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset;devm_kmalloc_~arg1#1 := devm_kmalloc_#in~arg1#1;devm_kmalloc_~arg2#1 := devm_kmalloc_#in~arg2#1; {671#true} is VALID [2022-02-20 21:58:10,296 INFO L272 TraceCheckUtils]: 69: Hoare triple {671#true} call devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset := ldv_malloc(0); {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,296 INFO L290 TraceCheckUtils]: 70: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:10,296 INFO L290 TraceCheckUtils]: 71: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,296 INFO L290 TraceCheckUtils]: 72: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,297 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {671#true} {671#true} #1885#return; {671#true} is VALID [2022-02-20 21:58:10,297 INFO L290 TraceCheckUtils]: 74: Hoare triple {671#true} devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset := devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset; {671#true} is VALID [2022-02-20 21:58:10,297 INFO L290 TraceCheckUtils]: 75: Hoare triple {671#true} #t~ret26#1.base, #t~ret26#1.offset := devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;assume { :end_inline_devm_kmalloc } true;~tmp~4#1.base, ~tmp~4#1.offset := #t~ret26#1.base, #t~ret26#1.offset;havoc #t~ret26#1.base, #t~ret26#1.offset;#res#1.base, #res#1.offset := ~tmp~4#1.base, ~tmp~4#1.offset; {671#true} is VALID [2022-02-20 21:58:10,297 INFO L290 TraceCheckUtils]: 76: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,297 INFO L284 TraceCheckUtils]: 77: Hoare quadruple {671#true} {672#false} #1929#return; {672#false} is VALID [2022-02-20 21:58:10,297 INFO L290 TraceCheckUtils]: 78: Hoare triple {672#false} pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset := pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset;havoc pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset;pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset := pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset; {672#false} is VALID [2022-02-20 21:58:10,298 INFO L290 TraceCheckUtils]: 79: Hoare triple {672#false} assume !(0 == (pdc_sata_init_one_~host~3#1.base + pdc_sata_init_one_~host~3#1.offset) % 18446744073709551616 || 0 == (pdc_sata_init_one_~hpriv~0#1.base + pdc_sata_init_one_~hpriv~0#1.offset) % 18446744073709551616);call write~$Pointer$(pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset, pdc_sata_init_one_~host~3#1.base, 88 + pdc_sata_init_one_~host~3#1.offset, 8);assume { :begin_inline_pcim_enable_device } true;pcim_enable_device_#in~arg0#1.base, pcim_enable_device_#in~arg0#1.offset := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset;havoc pcim_enable_device_#res#1;havoc pcim_enable_device_#t~nondet484#1, pcim_enable_device_~arg0#1.base, pcim_enable_device_~arg0#1.offset;pcim_enable_device_~arg0#1.base, pcim_enable_device_~arg0#1.offset := pcim_enable_device_#in~arg0#1.base, pcim_enable_device_#in~arg0#1.offset;assume -2147483648 <= pcim_enable_device_#t~nondet484#1 && pcim_enable_device_#t~nondet484#1 <= 2147483647;pcim_enable_device_#res#1 := pcim_enable_device_#t~nondet484#1;havoc pcim_enable_device_#t~nondet484#1; {672#false} is VALID [2022-02-20 21:58:10,298 INFO L290 TraceCheckUtils]: 80: Hoare triple {672#false} pdc_sata_init_one_#t~ret417#1 := pcim_enable_device_#res#1;assume { :end_inline_pcim_enable_device } true;assume -2147483648 <= pdc_sata_init_one_#t~ret417#1 && pdc_sata_init_one_#t~ret417#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret417#1;havoc pdc_sata_init_one_#t~ret417#1; {672#false} is VALID [2022-02-20 21:58:10,298 INFO L290 TraceCheckUtils]: 81: Hoare triple {672#false} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pcim_iomap_regions } true;pcim_iomap_regions_#in~arg0#1.base, pcim_iomap_regions_#in~arg0#1.offset, pcim_iomap_regions_#in~arg1#1, pcim_iomap_regions_#in~arg2#1.base, pcim_iomap_regions_#in~arg2#1.offset := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, 24, 13, 0;havoc pcim_iomap_regions_#res#1;havoc pcim_iomap_regions_#t~nondet485#1, pcim_iomap_regions_~arg0#1.base, pcim_iomap_regions_~arg0#1.offset, pcim_iomap_regions_~arg1#1, pcim_iomap_regions_~arg2#1.base, pcim_iomap_regions_~arg2#1.offset;pcim_iomap_regions_~arg0#1.base, pcim_iomap_regions_~arg0#1.offset := pcim_iomap_regions_#in~arg0#1.base, pcim_iomap_regions_#in~arg0#1.offset;pcim_iomap_regions_~arg1#1 := pcim_iomap_regions_#in~arg1#1;pcim_iomap_regions_~arg2#1.base, pcim_iomap_regions_~arg2#1.offset := pcim_iomap_regions_#in~arg2#1.base, pcim_iomap_regions_#in~arg2#1.offset;assume -2147483648 <= pcim_iomap_regions_#t~nondet485#1 && pcim_iomap_regions_#t~nondet485#1 <= 2147483647;pcim_iomap_regions_#res#1 := pcim_iomap_regions_#t~nondet485#1;havoc pcim_iomap_regions_#t~nondet485#1; {672#false} is VALID [2022-02-20 21:58:10,298 INFO L290 TraceCheckUtils]: 82: Hoare triple {672#false} pdc_sata_init_one_#t~ret418#1 := pcim_iomap_regions_#res#1;assume { :end_inline_pcim_iomap_regions } true;assume -2147483648 <= pdc_sata_init_one_#t~ret418#1 && pdc_sata_init_one_#t~ret418#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret418#1;havoc pdc_sata_init_one_#t~ret418#1; {672#false} is VALID [2022-02-20 21:58:10,299 INFO L290 TraceCheckUtils]: 83: Hoare triple {672#false} assume !(-16 == pdc_sata_init_one_~rc~0#1); {672#false} is VALID [2022-02-20 21:58:10,299 INFO L290 TraceCheckUtils]: 84: Hoare triple {672#false} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pcim_iomap_table } true;pcim_iomap_table_#in~arg0#1.base, pcim_iomap_table_#in~arg0#1.offset := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset;havoc pcim_iomap_table_#res#1.base, pcim_iomap_table_#res#1.offset;havoc pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset, pcim_iomap_table_~arg0#1.base, pcim_iomap_table_~arg0#1.offset;pcim_iomap_table_~arg0#1.base, pcim_iomap_table_~arg0#1.offset := pcim_iomap_table_#in~arg0#1.base, pcim_iomap_table_#in~arg0#1.offset; {672#false} is VALID [2022-02-20 21:58:10,299 INFO L272 TraceCheckUtils]: 85: Hoare triple {672#false} call pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset := ldv_malloc(8); {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:10,299 INFO L290 TraceCheckUtils]: 86: Hoare triple {827#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {671#true} is VALID [2022-02-20 21:58:10,299 INFO L290 TraceCheckUtils]: 87: Hoare triple {671#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {671#true} is VALID [2022-02-20 21:58:10,300 INFO L290 TraceCheckUtils]: 88: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,300 INFO L284 TraceCheckUtils]: 89: Hoare quadruple {671#true} {672#false} #1931#return; {672#false} is VALID [2022-02-20 21:58:10,300 INFO L290 TraceCheckUtils]: 90: Hoare triple {672#false} pcim_iomap_table_#res#1.base, pcim_iomap_table_#res#1.offset := pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset;havoc pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset; {672#false} is VALID [2022-02-20 21:58:10,300 INFO L290 TraceCheckUtils]: 91: Hoare triple {672#false} pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset := pcim_iomap_table_#res#1.base, pcim_iomap_table_#res#1.offset;assume { :end_inline_pcim_iomap_table } true;call write~$Pointer$(pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset, pdc_sata_init_one_~host~3#1.base, 76 + pdc_sata_init_one_~host~3#1.offset, 8);havoc pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset;pdc_sata_init_one_~i~7#1 := 0; {672#false} is VALID [2022-02-20 21:58:10,300 INFO L290 TraceCheckUtils]: 92: Hoare triple {672#false} assume !(pdc_sata_init_one_~i~7#1 <= 3);assume { :begin_inline_pci_set_dma_mask } true;pci_set_dma_mask_#in~dev#1.base, pci_set_dma_mask_#in~dev#1.offset, pci_set_dma_mask_#in~mask#1 := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, 4294967295;havoc pci_set_dma_mask_#res#1;havoc pci_set_dma_mask_#t~ret44#1, pci_set_dma_mask_~dev#1.base, pci_set_dma_mask_~dev#1.offset, pci_set_dma_mask_~mask#1, pci_set_dma_mask_~tmp~6#1;pci_set_dma_mask_~dev#1.base, pci_set_dma_mask_~dev#1.offset := pci_set_dma_mask_#in~dev#1.base, pci_set_dma_mask_#in~dev#1.offset;pci_set_dma_mask_~mask#1 := pci_set_dma_mask_#in~mask#1;havoc pci_set_dma_mask_~tmp~6#1;assume { :begin_inline_dma_set_mask } true;dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset, dma_set_mask_#in~arg1#1 := pci_set_dma_mask_~dev#1.base, 147 + pci_set_dma_mask_~dev#1.offset, pci_set_dma_mask_~mask#1;havoc dma_set_mask_#res#1;havoc dma_set_mask_#t~nondet478#1, dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset, dma_set_mask_~arg1#1;dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset := dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset;dma_set_mask_~arg1#1 := dma_set_mask_#in~arg1#1;assume -2147483648 <= dma_set_mask_#t~nondet478#1 && dma_set_mask_#t~nondet478#1 <= 2147483647;dma_set_mask_#res#1 := dma_set_mask_#t~nondet478#1;havoc dma_set_mask_#t~nondet478#1; {672#false} is VALID [2022-02-20 21:58:10,301 INFO L290 TraceCheckUtils]: 93: Hoare triple {672#false} pci_set_dma_mask_#t~ret44#1 := dma_set_mask_#res#1;assume { :end_inline_dma_set_mask } true;assume -2147483648 <= pci_set_dma_mask_#t~ret44#1 && pci_set_dma_mask_#t~ret44#1 <= 2147483647;pci_set_dma_mask_~tmp~6#1 := pci_set_dma_mask_#t~ret44#1;havoc pci_set_dma_mask_#t~ret44#1;pci_set_dma_mask_#res#1 := pci_set_dma_mask_~tmp~6#1; {672#false} is VALID [2022-02-20 21:58:10,301 INFO L290 TraceCheckUtils]: 94: Hoare triple {672#false} pdc_sata_init_one_#t~ret423#1 := pci_set_dma_mask_#res#1;assume { :end_inline_pci_set_dma_mask } true;assume -2147483648 <= pdc_sata_init_one_#t~ret423#1 && pdc_sata_init_one_#t~ret423#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret423#1;havoc pdc_sata_init_one_#t~ret423#1; {672#false} is VALID [2022-02-20 21:58:10,301 INFO L290 TraceCheckUtils]: 95: Hoare triple {672#false} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pci_set_consistent_dma_mask } true;pci_set_consistent_dma_mask_#in~dev#1.base, pci_set_consistent_dma_mask_#in~dev#1.offset, pci_set_consistent_dma_mask_#in~mask#1 := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, 4294967295;havoc pci_set_consistent_dma_mask_#res#1;havoc pci_set_consistent_dma_mask_#t~ret45#1, pci_set_consistent_dma_mask_~dev#1.base, pci_set_consistent_dma_mask_~dev#1.offset, pci_set_consistent_dma_mask_~mask#1, pci_set_consistent_dma_mask_~tmp~7#1;pci_set_consistent_dma_mask_~dev#1.base, pci_set_consistent_dma_mask_~dev#1.offset := pci_set_consistent_dma_mask_#in~dev#1.base, pci_set_consistent_dma_mask_#in~dev#1.offset;pci_set_consistent_dma_mask_~mask#1 := pci_set_consistent_dma_mask_#in~mask#1;havoc pci_set_consistent_dma_mask_~tmp~7#1;assume { :begin_inline_dma_set_coherent_mask } true;dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset, dma_set_coherent_mask_#in~mask#1 := pci_set_consistent_dma_mask_~dev#1.base, 147 + pci_set_consistent_dma_mask_~dev#1.offset, pci_set_consistent_dma_mask_~mask#1;havoc dma_set_coherent_mask_#res#1;havoc dma_set_coherent_mask_#t~ret39#1, dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1, dma_set_coherent_mask_~tmp~5#1;dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset := dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset;dma_set_coherent_mask_~mask#1 := dma_set_coherent_mask_#in~mask#1;havoc dma_set_coherent_mask_~tmp~5#1;assume { :begin_inline_dma_supported } true;dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset, dma_supported_#in~arg1#1 := dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1;havoc dma_supported_#res#1;havoc dma_supported_#t~nondet479#1, dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset, dma_supported_~arg1#1;dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset := dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset;dma_supported_~arg1#1 := dma_supported_#in~arg1#1;assume -2147483648 <= dma_supported_#t~nondet479#1 && dma_supported_#t~nondet479#1 <= 2147483647;dma_supported_#res#1 := dma_supported_#t~nondet479#1;havoc dma_supported_#t~nondet479#1; {672#false} is VALID [2022-02-20 21:58:10,301 INFO L290 TraceCheckUtils]: 96: Hoare triple {672#false} dma_set_coherent_mask_#t~ret39#1 := dma_supported_#res#1;assume { :end_inline_dma_supported } true;assume -2147483648 <= dma_set_coherent_mask_#t~ret39#1 && dma_set_coherent_mask_#t~ret39#1 <= 2147483647;dma_set_coherent_mask_~tmp~5#1 := dma_set_coherent_mask_#t~ret39#1;havoc dma_set_coherent_mask_#t~ret39#1; {672#false} is VALID [2022-02-20 21:58:10,301 INFO L290 TraceCheckUtils]: 97: Hoare triple {672#false} assume 0 == dma_set_coherent_mask_~tmp~5#1;dma_set_coherent_mask_#res#1 := -5; {672#false} is VALID [2022-02-20 21:58:10,302 INFO L290 TraceCheckUtils]: 98: Hoare triple {672#false} pci_set_consistent_dma_mask_#t~ret45#1 := dma_set_coherent_mask_#res#1;assume { :end_inline_dma_set_coherent_mask } true;assume -2147483648 <= pci_set_consistent_dma_mask_#t~ret45#1 && pci_set_consistent_dma_mask_#t~ret45#1 <= 2147483647;pci_set_consistent_dma_mask_~tmp~7#1 := pci_set_consistent_dma_mask_#t~ret45#1;havoc pci_set_consistent_dma_mask_#t~ret45#1;pci_set_consistent_dma_mask_#res#1 := pci_set_consistent_dma_mask_~tmp~7#1; {672#false} is VALID [2022-02-20 21:58:10,302 INFO L290 TraceCheckUtils]: 99: Hoare triple {672#false} pdc_sata_init_one_#t~ret424#1 := pci_set_consistent_dma_mask_#res#1;assume { :end_inline_pci_set_consistent_dma_mask } true;assume -2147483648 <= pdc_sata_init_one_#t~ret424#1 && pdc_sata_init_one_#t~ret424#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret424#1;havoc pdc_sata_init_one_#t~ret424#1; {672#false} is VALID [2022-02-20 21:58:10,302 INFO L290 TraceCheckUtils]: 100: Hoare triple {672#false} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pdc20621_dimm_init } true;pdc20621_dimm_init_#in~host#1.base, pdc20621_dimm_init_#in~host#1.offset := pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset;havoc pdc20621_dimm_init_#res#1;havoc pdc20621_dimm_init_#t~mem388#1.base, pdc20621_dimm_init_#t~mem388#1.offset, pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset, pdc20621_dimm_init_#t~ret390#1, pdc20621_dimm_init_#t~ret391#1, pdc20621_dimm_init_#t~ret392#1, pdc20621_dimm_init_#t~nondet393#1, pdc20621_dimm_init_#t~ret394#1, pdc20621_dimm_init_#t~ret395#1, pdc20621_dimm_init_#t~nondet396#1, pdc20621_dimm_init_#t~ret397#1, pdc20621_dimm_init_#t~ret398#1, pdc20621_dimm_init_#t~nondet399#1, pdc20621_dimm_init_#t~ret400#1, pdc20621_dimm_init_#t~mem401#1, pdc20621_dimm_init_#t~ret402#1.base, pdc20621_dimm_init_#t~ret402#1.offset, pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset, pdc20621_dimm_init_~speed~0#1, pdc20621_dimm_init_~size~1#1, pdc20621_dimm_init_~length~0#1, pdc20621_dimm_init_~addr~2#1, pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset, pdc20621_dimm_init_~pci_status~0#1, pdc20621_dimm_init_~time_period~0#1, pdc20621_dimm_init_~tcount~0#1, pdc20621_dimm_init_~ticks~0#1, pdc20621_dimm_init_~clock~0#1, pdc20621_dimm_init_~fparam~0#1, pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset, pdc20621_dimm_init_~tmp~29#1, pdc20621_dimm_init_~buf~1#1.base, pdc20621_dimm_init_~buf~1#1.offset;pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset := pdc20621_dimm_init_#in~host#1.base, pdc20621_dimm_init_#in~host#1.offset;havoc pdc20621_dimm_init_~speed~0#1;havoc pdc20621_dimm_init_~size~1#1;havoc pdc20621_dimm_init_~length~0#1;havoc pdc20621_dimm_init_~addr~2#1;call pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset := #Ultimate.allocOnStack(4);havoc pdc20621_dimm_init_~pci_status~0#1;havoc pdc20621_dimm_init_~time_period~0#1;havoc pdc20621_dimm_init_~tcount~0#1;havoc pdc20621_dimm_init_~ticks~0#1;havoc pdc20621_dimm_init_~clock~0#1;havoc pdc20621_dimm_init_~fparam~0#1;havoc pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset;havoc pdc20621_dimm_init_~tmp~29#1;havoc pdc20621_dimm_init_~buf~1#1.base, pdc20621_dimm_init_~buf~1#1.offset;pdc20621_dimm_init_~time_period~0#1 := 0;pdc20621_dimm_init_~tcount~0#1 := 0;pdc20621_dimm_init_~ticks~0#1 := 0;pdc20621_dimm_init_~clock~0#1 := 0;pdc20621_dimm_init_~fparam~0#1 := 0;call pdc20621_dimm_init_#t~mem388#1.base, pdc20621_dimm_init_#t~mem388#1.offset := read~$Pointer$(pdc20621_dimm_init_~host#1.base, 76 + pdc20621_dimm_init_~host#1.offset, 8);call pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset := read~$Pointer$(pdc20621_dimm_init_#t~mem388#1.base, 24 + pdc20621_dimm_init_#t~mem388#1.offset, 8);pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset := pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset;havoc pdc20621_dimm_init_#t~mem388#1.base, pdc20621_dimm_init_#t~mem388#1.offset;havoc pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset;pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset := pdc20621_dimm_init_~mmio~11#1.base, 786432 + pdc20621_dimm_init_~mmio~11#1.offset; {672#false} is VALID [2022-02-20 21:58:10,302 INFO L272 TraceCheckUtils]: 101: Hoare triple {672#false} call writel(4294967295, pdc20621_dimm_init_~mmio~11#1.base, 64 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,302 INFO L290 TraceCheckUtils]: 102: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,303 INFO L290 TraceCheckUtils]: 103: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,303 INFO L284 TraceCheckUtils]: 104: Hoare quadruple {671#true} {672#false} #1939#return; {672#false} is VALID [2022-02-20 21:58:10,303 INFO L272 TraceCheckUtils]: 105: Hoare triple {672#false} call pdc20621_dimm_init_#t~ret390#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 64 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,303 INFO L290 TraceCheckUtils]: 106: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,303 INFO L290 TraceCheckUtils]: 107: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,303 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {671#true} {672#false} #1941#return; {672#false} is VALID [2022-02-20 21:58:10,304 INFO L290 TraceCheckUtils]: 109: Hoare triple {672#false} pdc20621_dimm_init_~time_period~0#1 := pdc20621_dimm_init_#t~ret390#1;havoc pdc20621_dimm_init_#t~ret390#1; {672#false} is VALID [2022-02-20 21:58:10,304 INFO L272 TraceCheckUtils]: 110: Hoare triple {672#false} call writel(416, pdc20621_dimm_init_~mmio~11#1.base, 60 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,304 INFO L290 TraceCheckUtils]: 111: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,304 INFO L290 TraceCheckUtils]: 112: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,304 INFO L284 TraceCheckUtils]: 113: Hoare quadruple {671#true} {672#false} #1943#return; {672#false} is VALID [2022-02-20 21:58:10,304 INFO L272 TraceCheckUtils]: 114: Hoare triple {672#false} call pdc20621_dimm_init_#t~ret391#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 60 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,305 INFO L290 TraceCheckUtils]: 115: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,305 INFO L290 TraceCheckUtils]: 116: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,305 INFO L284 TraceCheckUtils]: 117: Hoare quadruple {671#true} {672#false} #1945#return; {672#false} is VALID [2022-02-20 21:58:10,305 INFO L290 TraceCheckUtils]: 118: Hoare triple {672#false} havoc pdc20621_dimm_init_#t~ret391#1; {672#false} is VALID [2022-02-20 21:58:10,305 INFO L272 TraceCheckUtils]: 119: Hoare triple {672#false} call msleep(3000); {671#true} is VALID [2022-02-20 21:58:10,305 INFO L290 TraceCheckUtils]: 120: Hoare triple {671#true} ~arg0 := #in~arg0; {671#true} is VALID [2022-02-20 21:58:10,306 INFO L290 TraceCheckUtils]: 121: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,306 INFO L284 TraceCheckUtils]: 122: Hoare quadruple {671#true} {672#false} #1947#return; {672#false} is VALID [2022-02-20 21:58:10,306 INFO L272 TraceCheckUtils]: 123: Hoare triple {672#false} call pdc20621_dimm_init_#t~ret392#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 68 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,306 INFO L290 TraceCheckUtils]: 124: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,306 INFO L290 TraceCheckUtils]: 125: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,306 INFO L284 TraceCheckUtils]: 126: Hoare quadruple {671#true} {672#false} #1949#return; {672#false} is VALID [2022-02-20 21:58:10,307 INFO L290 TraceCheckUtils]: 127: Hoare triple {672#false} pdc20621_dimm_init_~tcount~0#1 := pdc20621_dimm_init_#t~ret392#1;havoc pdc20621_dimm_init_#t~ret392#1; {672#false} is VALID [2022-02-20 21:58:10,307 INFO L290 TraceCheckUtils]: 128: Hoare triple {672#false} assume !(pdc20621_dimm_init_~tcount~0#1 % 4294967296 > 3994967294);pdc20621_dimm_init_~pci_status~0#1 := 2320701476; {672#false} is VALID [2022-02-20 21:58:10,307 INFO L272 TraceCheckUtils]: 129: Hoare triple {672#false} call writel(pdc20621_dimm_init_~pci_status~0#1, pdc20621_dimm_init_~mmio~11#1.base, 8 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,307 INFO L290 TraceCheckUtils]: 130: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,307 INFO L290 TraceCheckUtils]: 131: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,308 INFO L284 TraceCheckUtils]: 132: Hoare quadruple {671#true} {672#false} #1951#return; {672#false} is VALID [2022-02-20 21:58:10,308 INFO L272 TraceCheckUtils]: 133: Hoare triple {672#false} call pdc20621_dimm_init_#t~ret394#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 8 + pdc20621_dimm_init_~mmio~11#1.offset); {671#true} is VALID [2022-02-20 21:58:10,308 INFO L290 TraceCheckUtils]: 134: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,308 INFO L290 TraceCheckUtils]: 135: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,308 INFO L284 TraceCheckUtils]: 136: Hoare quadruple {671#true} {672#false} #1953#return; {672#false} is VALID [2022-02-20 21:58:10,308 INFO L290 TraceCheckUtils]: 137: Hoare triple {672#false} havoc pdc20621_dimm_init_#t~ret394#1;assume { :begin_inline_pdc20621_detect_dimm } true;pdc20621_detect_dimm_#in~host#1.base, pdc20621_detect_dimm_#in~host#1.offset := pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset;havoc pdc20621_detect_dimm_#res#1;havoc pdc20621_detect_dimm_#t~ret323#1, pdc20621_detect_dimm_#t~mem324#1, pdc20621_detect_dimm_#t~ret325#1, pdc20621_detect_dimm_#t~mem326#1, pdc20621_detect_dimm_~host#1.base, pdc20621_detect_dimm_~host#1.offset, pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset, pdc20621_detect_dimm_~tmp~28#1, pdc20621_detect_dimm_~tmp___0~13#1;pdc20621_detect_dimm_~host#1.base, pdc20621_detect_dimm_~host#1.offset := pdc20621_detect_dimm_#in~host#1.base, pdc20621_detect_dimm_#in~host#1.offset;call pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset := #Ultimate.allocOnStack(4);havoc pdc20621_detect_dimm_~tmp~28#1;havoc pdc20621_detect_dimm_~tmp___0~13#1;call write~int(0, pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,309 INFO L272 TraceCheckUtils]: 138: Hoare triple {672#false} call pdc20621_detect_dimm_#t~ret323#1 := pdc20621_i2c_read(pdc20621_detect_dimm_~host#1.base, pdc20621_detect_dimm_~host#1.offset, 80, 126, pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset); {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} is VALID [2022-02-20 21:58:10,309 INFO L290 TraceCheckUtils]: 139: Hoare triple {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {671#true} is VALID [2022-02-20 21:58:10,309 INFO L290 TraceCheckUtils]: 140: Hoare triple {671#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,309 INFO L290 TraceCheckUtils]: 141: Hoare triple {671#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,309 INFO L272 TraceCheckUtils]: 142: Hoare triple {671#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,309 INFO L290 TraceCheckUtils]: 143: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,310 INFO L290 TraceCheckUtils]: 144: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,310 INFO L284 TraceCheckUtils]: 145: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,310 INFO L272 TraceCheckUtils]: 146: Hoare triple {671#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,310 INFO L290 TraceCheckUtils]: 147: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,310 INFO L290 TraceCheckUtils]: 148: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,310 INFO L284 TraceCheckUtils]: 149: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,311 INFO L290 TraceCheckUtils]: 150: Hoare triple {671#true} havoc #t~ret320; {671#true} is VALID [2022-02-20 21:58:10,311 INFO L272 TraceCheckUtils]: 151: Hoare triple {671#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,311 INFO L290 TraceCheckUtils]: 152: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,311 INFO L290 TraceCheckUtils]: 153: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,311 INFO L284 TraceCheckUtils]: 154: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,312 INFO L290 TraceCheckUtils]: 155: Hoare triple {671#true} ~count~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,312 INFO L290 TraceCheckUtils]: 156: Hoare triple {671#true} assume !(~count~0 % 4294967296 <= 1000); {671#true} is VALID [2022-02-20 21:58:10,312 INFO L290 TraceCheckUtils]: 157: Hoare triple {671#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {671#true} is VALID [2022-02-20 21:58:10,312 INFO L290 TraceCheckUtils]: 158: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,312 INFO L284 TraceCheckUtils]: 159: Hoare quadruple {671#true} {672#false} #1955#return; {672#false} is VALID [2022-02-20 21:58:10,312 INFO L290 TraceCheckUtils]: 160: Hoare triple {672#false} pdc20621_detect_dimm_~tmp~28#1 := pdc20621_detect_dimm_#t~ret323#1;havoc pdc20621_detect_dimm_#t~ret323#1; {672#false} is VALID [2022-02-20 21:58:10,313 INFO L290 TraceCheckUtils]: 161: Hoare triple {672#false} assume !(0 != pdc20621_detect_dimm_~tmp~28#1 % 4294967296);pdc20621_detect_dimm_#res#1 := 0;call ULTIMATE.dealloc(pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset);havoc pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset; {672#false} is VALID [2022-02-20 21:58:10,313 INFO L290 TraceCheckUtils]: 162: Hoare triple {672#false} pdc20621_dimm_init_#t~ret395#1 := pdc20621_detect_dimm_#res#1;assume { :end_inline_pdc20621_detect_dimm } true;assume -2147483648 <= pdc20621_dimm_init_#t~ret395#1 && pdc20621_dimm_init_#t~ret395#1 <= 2147483647;pdc20621_dimm_init_~speed~0#1 := pdc20621_dimm_init_#t~ret395#1;havoc pdc20621_dimm_init_#t~ret395#1; {672#false} is VALID [2022-02-20 21:58:10,313 INFO L290 TraceCheckUtils]: 163: Hoare triple {672#false} assume !(0 == pdc20621_dimm_init_~speed~0#1);assume { :begin_inline_pdc20621_prog_dimm0 } true;pdc20621_prog_dimm0_#in~host#1.base, pdc20621_prog_dimm0_#in~host#1.offset := pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset;havoc pdc20621_prog_dimm0_#res#1;havoc pdc20621_prog_dimm0_#t~mem327#1.base, pdc20621_prog_dimm0_#t~mem327#1.offset, pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset, pdc20621_prog_dimm0_#t~mem329#1, pdc20621_prog_dimm0_#t~mem330#1, pdc20621_prog_dimm0_#t~ret331#1, pdc20621_prog_dimm0_#t~mem336#1, pdc20621_prog_dimm0_#t~mem337#1, pdc20621_prog_dimm0_#t~ite338#1, pdc20621_prog_dimm0_#t~mem339#1, pdc20621_prog_dimm0_#t~mem344#1, pdc20621_prog_dimm0_#t~mem345#1, pdc20621_prog_dimm0_#t~mem346#1, pdc20621_prog_dimm0_#t~mem353#1, pdc20621_prog_dimm0_#t~mem354#1, pdc20621_prog_dimm0_#t~ite357#1, pdc20621_prog_dimm0_#t~mem355#1, pdc20621_prog_dimm0_#t~mem356#1, pdc20621_prog_dimm0_#t~mem361#1, pdc20621_prog_dimm0_#t~mem362#1, pdc20621_prog_dimm0_#t~mem364#1, pdc20621_prog_dimm0_#t~nondet365#1, pdc20621_prog_dimm0_#t~mem366#1, pdc20621_prog_dimm0_#t~nondet367#1, pdc20621_prog_dimm0_#t~mem368#1, pdc20621_prog_dimm0_#t~nondet369#1, pdc20621_prog_dimm0_#t~mem370#1, pdc20621_prog_dimm0_#t~mem371#1, pdc20621_prog_dimm0_#t~mem372#1, pdc20621_prog_dimm0_#t~mem373#1, pdc20621_prog_dimm0_#t~ret376#1, pdc20621_prog_dimm0_#t~nondet340#1, pdc20621_prog_dimm0_#t~nondet347#1, pdc20621_prog_dimm0_#t~nondet358#1, pdc20621_prog_dimm0_#t~nondet363#1, pdc20621_prog_dimm0_#t~nondet374#1, pdc20621_prog_dimm0_#t~nondet375#1, pdc20621_prog_dimm0_~host#1.base, pdc20621_prog_dimm0_~host#1.offset, pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset, pdc20621_prog_dimm0_~data~1#1, pdc20621_prog_dimm0_~size~0#1, pdc20621_prog_dimm0_~i~5#1, pdc20621_prog_dimm0_~bdimmsize~0#1, pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset;pdc20621_prog_dimm0_~host#1.base, pdc20621_prog_dimm0_~host#1.offset := pdc20621_prog_dimm0_#in~host#1.base, pdc20621_prog_dimm0_#in~host#1.offset;call pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset := #Ultimate.allocOnStack(200);havoc pdc20621_prog_dimm0_~data~1#1;havoc pdc20621_prog_dimm0_~size~0#1;havoc pdc20621_prog_dimm0_~i~5#1;havoc pdc20621_prog_dimm0_~bdimmsize~0#1;havoc pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset;call pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset := #Ultimate.allocOnStack(96);pdc20621_prog_dimm0_~data~1#1 := 0;call pdc20621_prog_dimm0_#t~mem327#1.base, pdc20621_prog_dimm0_#t~mem327#1.offset := read~$Pointer$(pdc20621_prog_dimm0_~host#1.base, 76 + pdc20621_prog_dimm0_~host#1.offset, 8);call pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset := read~$Pointer$(pdc20621_prog_dimm0_#t~mem327#1.base, 24 + pdc20621_prog_dimm0_#t~mem327#1.offset, 8);pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset := pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset;havoc pdc20621_prog_dimm0_#t~mem327#1.base, pdc20621_prog_dimm0_#t~mem327#1.offset;havoc pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset;call write~int(11, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(11, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 4 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(12, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 8 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(12, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 12 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(4, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 16 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(4, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 20 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(21, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 24 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(21, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 28 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(3, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 32 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(3, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 36 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(17, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 40 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(17, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 44 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(5, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 48 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(5, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 52 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(27, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 56 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(27, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 60 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(28, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 64 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(28, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 68 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(29, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 72 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(29, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 76 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(30, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 80 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(30, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 84 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(18, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 88 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(18, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 92 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset := pdc20621_prog_dimm0_~mmio~9#1.base, 786432 + pdc20621_prog_dimm0_~mmio~9#1.offset;pdc20621_prog_dimm0_~i~5#1 := 0; {672#false} is VALID [2022-02-20 21:58:10,313 INFO L290 TraceCheckUtils]: 164: Hoare triple {672#false} assume !(pdc20621_prog_dimm0_~i~5#1 % 4294967296 <= 11);call pdc20621_prog_dimm0_#t~mem336#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 16 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem337#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 84 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,313 INFO L290 TraceCheckUtils]: 165: Hoare triple {672#false} assume 0 != pdc20621_prog_dimm0_#t~mem337#1 % 4294967296;pdc20621_prog_dimm0_#t~ite338#1 := 8; {672#false} is VALID [2022-02-20 21:58:10,314 INFO L290 TraceCheckUtils]: 166: Hoare triple {672#false} call pdc20621_prog_dimm0_#t~mem339#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 12 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,314 INFO L290 TraceCheckUtils]: 167: Hoare triple {672#false} assume (1 == (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) then (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) else (if 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) else (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))) || ((1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 1 else ~bitwiseOr((if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))), 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))))) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) then (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) else (if 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) else (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))) || ((1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 1 else ~bitwiseOr((if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))), 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))))) || 1 == (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) then (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) else (if 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) else (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))) || ((1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 1 else ~bitwiseOr((if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))), 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)))))) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,315 INFO L290 TraceCheckUtils]: 168: Hoare triple {672#false} havoc pdc20621_prog_dimm0_#t~mem336#1;havoc pdc20621_prog_dimm0_#t~mem337#1;havoc pdc20621_prog_dimm0_#t~ite338#1;havoc pdc20621_prog_dimm0_#t~mem339#1;call pdc20621_prog_dimm0_#t~mem344#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 68 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem345#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 20 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem346#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 108 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,316 INFO L290 TraceCheckUtils]: 169: Hoare triple {672#false} assume (1 == (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) then (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) else (if 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) else (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))) || ((1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 1 else ~bitwiseOr((if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))), 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))))) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) then (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) else (if 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) else (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))) || ((1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 1 else ~bitwiseOr((if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))), 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))))) || 1 == (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) then (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) else (if 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) else (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))) || ((1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 1 else ~bitwiseOr((if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))), 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)))))) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,318 INFO L290 TraceCheckUtils]: 170: Hoare triple {672#false} havoc pdc20621_prog_dimm0_#t~mem344#1;havoc pdc20621_prog_dimm0_#t~mem345#1;havoc pdc20621_prog_dimm0_#t~mem346#1;call pdc20621_prog_dimm0_#t~mem353#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 116 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem354#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 112 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,318 INFO L290 TraceCheckUtils]: 171: Hoare triple {672#false} assume pdc20621_prog_dimm0_#t~mem353#1 % 4294967296 > pdc20621_prog_dimm0_#t~mem354#1 % 4294967296;call pdc20621_prog_dimm0_#t~mem355#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 116 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);pdc20621_prog_dimm0_#t~ite357#1 := pdc20621_prog_dimm0_#t~mem355#1; {672#false} is VALID [2022-02-20 21:58:10,318 INFO L290 TraceCheckUtils]: 172: Hoare triple {672#false} assume (1 == 1024 * ((if (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10) - 1) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == 1024 * ((if (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10) - 1) || 1 == 1024 * ((if (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10) - 1)) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,318 INFO L290 TraceCheckUtils]: 173: Hoare triple {672#false} havoc pdc20621_prog_dimm0_#t~mem353#1;havoc pdc20621_prog_dimm0_#t~mem354#1;havoc pdc20621_prog_dimm0_#t~ite357#1;havoc pdc20621_prog_dimm0_#t~mem355#1;havoc pdc20621_prog_dimm0_#t~mem356#1;call pdc20621_prog_dimm0_#t~mem361#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 120 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem362#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 116 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,318 INFO L290 TraceCheckUtils]: 174: Hoare triple {672#false} assume (1 == 4096 * ((if (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 < 0 && 0 != (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 % 10 then 1 + (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10 else (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10) - 2) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == 4096 * ((if (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 < 0 && 0 != (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 % 10 then 1 + (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10 else (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10) - 2) || 1 == 4096 * ((if (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 < 0 && 0 != (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 % 10 then 1 + (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10 else (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10) - 2)) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,319 INFO L290 TraceCheckUtils]: 175: Hoare triple {672#false} havoc pdc20621_prog_dimm0_#t~mem361#1;havoc pdc20621_prog_dimm0_#t~mem362#1;call pdc20621_prog_dimm0_#t~mem364#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 72 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,319 INFO L290 TraceCheckUtils]: 176: Hoare triple {672#false} assume 0 != (if 0 == pdc20621_prog_dimm0_#t~mem364#1 then 0 else (if 1 == pdc20621_prog_dimm0_#t~mem364#1 then 0 else ~bitwiseAnd(pdc20621_prog_dimm0_#t~mem364#1, 8))) % 4294967296;havoc pdc20621_prog_dimm0_#t~mem364#1; {672#false} is VALID [2022-02-20 21:58:10,319 INFO L290 TraceCheckUtils]: 177: Hoare triple {672#false} assume false;pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,319 INFO L290 TraceCheckUtils]: 178: Hoare triple {672#false} call pdc20621_prog_dimm0_#t~mem370#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 16 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem371#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 20 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem372#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 12 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem373#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 68 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);pdc20621_prog_dimm0_~bdimmsize~0#1 := 3 + (pdc20621_prog_dimm0_#t~mem370#1 % 256 + (if pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 / 2) % 256 + pdc20621_prog_dimm0_#t~mem372#1 % 256 + (if pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 / 2) % 256);havoc pdc20621_prog_dimm0_#t~mem370#1;havoc pdc20621_prog_dimm0_#t~mem371#1;havoc pdc20621_prog_dimm0_#t~mem372#1;havoc pdc20621_prog_dimm0_#t~mem373#1;pdc20621_prog_dimm0_~size~0#1 := ~shiftLeft(1, pdc20621_prog_dimm0_~bdimmsize~0#1 % 256) / 1048576; {672#false} is VALID [2022-02-20 21:58:10,319 INFO L290 TraceCheckUtils]: 179: Hoare triple {672#false} assume (1 == 65536 * (-1 + (if pdc20621_prog_dimm0_~size~0#1 < 0 && 0 != pdc20621_prog_dimm0_~size~0#1 % 16 then 1 + pdc20621_prog_dimm0_~size~0#1 / 16 else pdc20621_prog_dimm0_~size~0#1 / 16)) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == 65536 * (-1 + (if pdc20621_prog_dimm0_~size~0#1 < 0 && 0 != pdc20621_prog_dimm0_~size~0#1 % 16 then 1 + pdc20621_prog_dimm0_~size~0#1 / 16 else pdc20621_prog_dimm0_~size~0#1 / 16)) || 1 == 65536 * (-1 + (if pdc20621_prog_dimm0_~size~0#1 < 0 && 0 != pdc20621_prog_dimm0_~size~0#1 % 16 then 1 + pdc20621_prog_dimm0_~size~0#1 / 16 else pdc20621_prog_dimm0_~size~0#1 / 16))) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,320 INFO L290 TraceCheckUtils]: 180: Hoare triple {672#false} pdc20621_prog_dimm0_~data~1#1 := pdc20621_prog_dimm0_~data~1#1; {672#false} is VALID [2022-02-20 21:58:10,320 INFO L290 TraceCheckUtils]: 181: Hoare triple {672#false} assume false;pdc20621_prog_dimm0_~data~1#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,320 INFO L272 TraceCheckUtils]: 182: Hoare triple {672#false} call writel(pdc20621_prog_dimm0_~data~1#1, pdc20621_prog_dimm0_~mmio~9#1.base, 128 + pdc20621_prog_dimm0_~mmio~9#1.offset); {671#true} is VALID [2022-02-20 21:58:10,320 INFO L290 TraceCheckUtils]: 183: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,320 INFO L290 TraceCheckUtils]: 184: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,321 INFO L284 TraceCheckUtils]: 185: Hoare quadruple {671#true} {672#false} #1961#return; {672#false} is VALID [2022-02-20 21:58:10,321 INFO L272 TraceCheckUtils]: 186: Hoare triple {672#false} call pdc20621_prog_dimm0_#t~ret376#1 := readl(pdc20621_prog_dimm0_~mmio~9#1.base, 128 + pdc20621_prog_dimm0_~mmio~9#1.offset); {671#true} is VALID [2022-02-20 21:58:10,321 INFO L290 TraceCheckUtils]: 187: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,321 INFO L290 TraceCheckUtils]: 188: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,321 INFO L284 TraceCheckUtils]: 189: Hoare quadruple {671#true} {672#false} #1963#return; {672#false} is VALID [2022-02-20 21:58:10,321 INFO L290 TraceCheckUtils]: 190: Hoare triple {672#false} havoc pdc20621_prog_dimm0_#t~ret376#1;pdc20621_prog_dimm0_#res#1 := pdc20621_prog_dimm0_~size~0#1;call ULTIMATE.dealloc(pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset);havoc pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset;call ULTIMATE.dealloc(pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset);havoc pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset; {672#false} is VALID [2022-02-20 21:58:10,322 INFO L290 TraceCheckUtils]: 191: Hoare triple {672#false} pdc20621_dimm_init_#t~ret397#1 := pdc20621_prog_dimm0_#res#1;assume { :end_inline_pdc20621_prog_dimm0 } true;assume -2147483648 <= pdc20621_dimm_init_#t~ret397#1 && pdc20621_dimm_init_#t~ret397#1 <= 2147483647;pdc20621_dimm_init_~size~1#1 := pdc20621_dimm_init_#t~ret397#1;havoc pdc20621_dimm_init_#t~ret397#1;assume { :begin_inline_pdc20621_prog_dimm_global } true;pdc20621_prog_dimm_global_#in~host#1.base, pdc20621_prog_dimm_global_#in~host#1.offset := pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset;havoc pdc20621_prog_dimm_global_#res#1;havoc pdc20621_prog_dimm_global_#t~mem377#1.base, pdc20621_prog_dimm_global_#t~mem377#1.offset, pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset, pdc20621_prog_dimm_global_#t~ret379#1, pdc20621_prog_dimm_global_#t~ret380#1, pdc20621_prog_dimm_global_#t~mem381#1, pdc20621_prog_dimm_global_#t~ret383#1, pdc20621_prog_dimm_global_#t~nondet384#1, pdc20621_prog_dimm_global_#t~nondet382#1, pdc20621_prog_dimm_global_#t~ret387#1, pdc20621_prog_dimm_global_#t~nondet385#1, pdc20621_prog_dimm_global_#t~nondet386#1, pdc20621_prog_dimm_global_~host#1.base, pdc20621_prog_dimm_global_~host#1.offset, pdc20621_prog_dimm_global_~data~2#1, pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset, pdc20621_prog_dimm_global_~error~0#1, pdc20621_prog_dimm_global_~i~6#1, pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset;pdc20621_prog_dimm_global_~host#1.base, pdc20621_prog_dimm_global_~host#1.offset := pdc20621_prog_dimm_global_#in~host#1.base, pdc20621_prog_dimm_global_#in~host#1.offset;havoc pdc20621_prog_dimm_global_~data~2#1;call pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset := #Ultimate.allocOnStack(4);havoc pdc20621_prog_dimm_global_~error~0#1;havoc pdc20621_prog_dimm_global_~i~6#1;havoc pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset;call pdc20621_prog_dimm_global_#t~mem377#1.base, pdc20621_prog_dimm_global_#t~mem377#1.offset := read~$Pointer$(pdc20621_prog_dimm_global_~host#1.base, 76 + pdc20621_prog_dimm_global_~host#1.offset, 8);call pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset := read~$Pointer$(pdc20621_prog_dimm_global_#t~mem377#1.base, 24 + pdc20621_prog_dimm_global_#t~mem377#1.offset, 8);pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset := pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset;havoc pdc20621_prog_dimm_global_#t~mem377#1.base, pdc20621_prog_dimm_global_#t~mem377#1.offset;havoc pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset;pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset := pdc20621_prog_dimm_global_~mmio~10#1.base, 786432 + pdc20621_prog_dimm_global_~mmio~10#1.offset;pdc20621_prog_dimm_global_~data~2#1 := 35805681; {672#false} is VALID [2022-02-20 21:58:10,322 INFO L272 TraceCheckUtils]: 192: Hoare triple {672#false} call writel(pdc20621_prog_dimm_global_~data~2#1, pdc20621_prog_dimm_global_~mmio~10#1.base, 136 + pdc20621_prog_dimm_global_~mmio~10#1.offset); {671#true} is VALID [2022-02-20 21:58:10,322 INFO L290 TraceCheckUtils]: 193: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,322 INFO L290 TraceCheckUtils]: 194: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,322 INFO L284 TraceCheckUtils]: 195: Hoare quadruple {671#true} {672#false} #1965#return; {672#false} is VALID [2022-02-20 21:58:10,323 INFO L272 TraceCheckUtils]: 196: Hoare triple {672#false} call pdc20621_prog_dimm_global_#t~ret379#1 := readl(pdc20621_prog_dimm_global_~mmio~10#1.base, 136 + pdc20621_prog_dimm_global_~mmio~10#1.offset); {671#true} is VALID [2022-02-20 21:58:10,323 INFO L290 TraceCheckUtils]: 197: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,323 INFO L290 TraceCheckUtils]: 198: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,323 INFO L284 TraceCheckUtils]: 199: Hoare quadruple {671#true} {672#false} #1967#return; {672#false} is VALID [2022-02-20 21:58:10,323 INFO L290 TraceCheckUtils]: 200: Hoare triple {672#false} havoc pdc20621_prog_dimm_global_#t~ret379#1; {672#false} is VALID [2022-02-20 21:58:10,323 INFO L272 TraceCheckUtils]: 201: Hoare triple {672#false} call pdc20621_prog_dimm_global_#t~ret380#1 := pdc20621_i2c_read(pdc20621_prog_dimm_global_~host#1.base, pdc20621_prog_dimm_global_~host#1.offset, 80, 11, pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset); {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} is VALID [2022-02-20 21:58:10,324 INFO L290 TraceCheckUtils]: 202: Hoare triple {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {671#true} is VALID [2022-02-20 21:58:10,324 INFO L290 TraceCheckUtils]: 203: Hoare triple {671#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,324 INFO L290 TraceCheckUtils]: 204: Hoare triple {671#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,324 INFO L272 TraceCheckUtils]: 205: Hoare triple {671#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,324 INFO L290 TraceCheckUtils]: 206: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,324 INFO L290 TraceCheckUtils]: 207: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,325 INFO L284 TraceCheckUtils]: 208: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,325 INFO L272 TraceCheckUtils]: 209: Hoare triple {671#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,325 INFO L290 TraceCheckUtils]: 210: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,325 INFO L290 TraceCheckUtils]: 211: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,325 INFO L284 TraceCheckUtils]: 212: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,325 INFO L290 TraceCheckUtils]: 213: Hoare triple {671#true} havoc #t~ret320; {671#true} is VALID [2022-02-20 21:58:10,326 INFO L272 TraceCheckUtils]: 214: Hoare triple {671#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,326 INFO L290 TraceCheckUtils]: 215: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,326 INFO L290 TraceCheckUtils]: 216: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,326 INFO L284 TraceCheckUtils]: 217: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,326 INFO L290 TraceCheckUtils]: 218: Hoare triple {671#true} ~count~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,326 INFO L290 TraceCheckUtils]: 219: Hoare triple {671#true} assume !(~count~0 % 4294967296 <= 1000); {671#true} is VALID [2022-02-20 21:58:10,327 INFO L290 TraceCheckUtils]: 220: Hoare triple {671#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {671#true} is VALID [2022-02-20 21:58:10,327 INFO L290 TraceCheckUtils]: 221: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,327 INFO L284 TraceCheckUtils]: 222: Hoare quadruple {671#true} {672#false} #1969#return; {672#false} is VALID [2022-02-20 21:58:10,327 INFO L290 TraceCheckUtils]: 223: Hoare triple {672#false} havoc pdc20621_prog_dimm_global_#t~ret380#1;call pdc20621_prog_dimm_global_#t~mem381#1 := read~int(pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,327 INFO L290 TraceCheckUtils]: 224: Hoare triple {672#false} assume !(2 == pdc20621_prog_dimm_global_#t~mem381#1 % 4294967296);havoc pdc20621_prog_dimm_global_#t~mem381#1; {672#false} is VALID [2022-02-20 21:58:10,328 INFO L290 TraceCheckUtils]: 225: Hoare triple {672#false} assume 0 == pdc20621_prog_dimm_global_~data~2#1;pdc20621_prog_dimm_global_~data~2#1 := 0; {672#false} is VALID [2022-02-20 21:58:10,328 INFO L290 TraceCheckUtils]: 226: Hoare triple {672#false} assume false;pdc20621_prog_dimm_global_~data~2#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,328 INFO L272 TraceCheckUtils]: 227: Hoare triple {672#false} call writel(pdc20621_prog_dimm_global_~data~2#1, pdc20621_prog_dimm_global_~mmio~10#1.base, 136 + pdc20621_prog_dimm_global_~mmio~10#1.offset); {671#true} is VALID [2022-02-20 21:58:10,328 INFO L290 TraceCheckUtils]: 228: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,328 INFO L290 TraceCheckUtils]: 229: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,328 INFO L284 TraceCheckUtils]: 230: Hoare quadruple {671#true} {672#false} #1975#return; {672#false} is VALID [2022-02-20 21:58:10,329 INFO L290 TraceCheckUtils]: 231: Hoare triple {672#false} pdc20621_prog_dimm_global_~error~0#1 := 1;pdc20621_prog_dimm_global_~i~6#1 := 1; {672#false} is VALID [2022-02-20 21:58:10,329 INFO L290 TraceCheckUtils]: 232: Hoare triple {672#false} assume !(pdc20621_prog_dimm_global_~i~6#1 <= 10); {672#false} is VALID [2022-02-20 21:58:10,329 INFO L290 TraceCheckUtils]: 233: Hoare triple {672#false} pdc20621_prog_dimm_global_#res#1 := pdc20621_prog_dimm_global_~error~0#1;call ULTIMATE.dealloc(pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset);havoc pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset; {672#false} is VALID [2022-02-20 21:58:10,329 INFO L290 TraceCheckUtils]: 234: Hoare triple {672#false} pdc20621_dimm_init_#t~ret398#1 := pdc20621_prog_dimm_global_#res#1;assume { :end_inline_pdc20621_prog_dimm_global } true;pdc20621_dimm_init_~tmp~29#1 := pdc20621_dimm_init_#t~ret398#1;havoc pdc20621_dimm_init_#t~ret398#1; {672#false} is VALID [2022-02-20 21:58:10,329 INFO L290 TraceCheckUtils]: 235: Hoare triple {672#false} assume !(0 != pdc20621_dimm_init_~tmp~29#1 % 4294967296); {672#false} is VALID [2022-02-20 21:58:10,329 INFO L272 TraceCheckUtils]: 236: Hoare triple {672#false} call pdc20621_dimm_init_#t~ret400#1 := pdc20621_i2c_read(pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset, 80, 11, pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset); {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} is VALID [2022-02-20 21:58:10,330 INFO L290 TraceCheckUtils]: 237: Hoare triple {832#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {671#true} is VALID [2022-02-20 21:58:10,330 INFO L290 TraceCheckUtils]: 238: Hoare triple {671#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,330 INFO L290 TraceCheckUtils]: 239: Hoare triple {671#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {671#true} is VALID [2022-02-20 21:58:10,330 INFO L272 TraceCheckUtils]: 240: Hoare triple {671#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,330 INFO L290 TraceCheckUtils]: 241: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,330 INFO L290 TraceCheckUtils]: 242: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,331 INFO L284 TraceCheckUtils]: 243: Hoare quadruple {671#true} {671#true} #1875#return; {671#true} is VALID [2022-02-20 21:58:10,331 INFO L272 TraceCheckUtils]: 244: Hoare triple {671#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,331 INFO L290 TraceCheckUtils]: 245: Hoare triple {671#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {671#true} is VALID [2022-02-20 21:58:10,331 INFO L290 TraceCheckUtils]: 246: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,331 INFO L284 TraceCheckUtils]: 247: Hoare quadruple {671#true} {671#true} #1877#return; {671#true} is VALID [2022-02-20 21:58:10,331 INFO L290 TraceCheckUtils]: 248: Hoare triple {671#true} havoc #t~ret320; {671#true} is VALID [2022-02-20 21:58:10,332 INFO L272 TraceCheckUtils]: 249: Hoare triple {671#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {671#true} is VALID [2022-02-20 21:58:10,332 INFO L290 TraceCheckUtils]: 250: Hoare triple {671#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {671#true} is VALID [2022-02-20 21:58:10,332 INFO L290 TraceCheckUtils]: 251: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,332 INFO L284 TraceCheckUtils]: 252: Hoare quadruple {671#true} {671#true} #1879#return; {671#true} is VALID [2022-02-20 21:58:10,332 INFO L290 TraceCheckUtils]: 253: Hoare triple {671#true} ~count~0 := 0; {671#true} is VALID [2022-02-20 21:58:10,332 INFO L290 TraceCheckUtils]: 254: Hoare triple {671#true} assume !(~count~0 % 4294967296 <= 1000); {671#true} is VALID [2022-02-20 21:58:10,333 INFO L290 TraceCheckUtils]: 255: Hoare triple {671#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {671#true} is VALID [2022-02-20 21:58:10,333 INFO L290 TraceCheckUtils]: 256: Hoare triple {671#true} assume true; {671#true} is VALID [2022-02-20 21:58:10,333 INFO L284 TraceCheckUtils]: 257: Hoare quadruple {671#true} {672#false} #1981#return; {672#false} is VALID [2022-02-20 21:58:10,333 INFO L290 TraceCheckUtils]: 258: Hoare triple {672#false} havoc pdc20621_dimm_init_#t~ret400#1;call pdc20621_dimm_init_#t~mem401#1 := read~int(pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset, 4); {672#false} is VALID [2022-02-20 21:58:10,333 INFO L290 TraceCheckUtils]: 259: Hoare triple {672#false} assume 2 == pdc20621_dimm_init_#t~mem401#1 % 4294967296;havoc pdc20621_dimm_init_#t~mem401#1;pdc20621_dimm_init_~addr~2#1 := 0;pdc20621_dimm_init_~length~0#1 := 1048576 * pdc20621_dimm_init_~size~1#1;assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 131072, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {672#false} is VALID [2022-02-20 21:58:10,333 INFO L290 TraceCheckUtils]: 260: Hoare triple {672#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {672#false} is VALID [2022-02-20 21:58:10,334 INFO L272 TraceCheckUtils]: 261: Hoare triple {672#false} call ldv_error(); {672#false} is VALID [2022-02-20 21:58:10,334 INFO L290 TraceCheckUtils]: 262: Hoare triple {672#false} assume !false; {672#false} is VALID [2022-02-20 21:58:10,335 INFO L134 CoverageAnalysis]: Checked inductivity of 466 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 466 trivial. 0 not checked. [2022-02-20 21:58:10,336 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:58:10,336 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095803523] [2022-02-20 21:58:10,336 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1095803523] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:58:10,337 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:58:10,337 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 21:58:10,338 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247960096] [2022-02-20 21:58:10,339 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:58:10,345 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) Word has length 263 [2022-02-20 21:58:10,347 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:58:10,352 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) [2022-02-20 21:58:10,552 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:58:10,552 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 21:58:10,552 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:58:10,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 21:58:10,570 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-02-20 21:58:10,576 INFO L87 Difference]: Start difference. First operand has 668 states, 510 states have (on average 1.503921568627451) internal successors, (767), 523 states have internal predecessors, (767), 133 states have call successors, (133), 24 states have call predecessors, (133), 23 states have return successors, (128), 128 states have call predecessors, (128), 128 states have call successors, (128) Second operand has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) [2022-02-20 21:58:14,576 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:16,606 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:25,951 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:27,970 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:31,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:58:31,756 INFO L93 Difference]: Finished difference Result 1755 states and 2749 transitions. [2022-02-20 21:58:31,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-02-20 21:58:31,757 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) Word has length 263 [2022-02-20 21:58:31,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:58:31,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) [2022-02-20 21:58:31,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 2749 transitions. [2022-02-20 21:58:31,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) [2022-02-20 21:58:31,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 2749 transitions. [2022-02-20 21:58:31,976 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 2749 transitions. [2022-02-20 21:58:34,259 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2749 edges. 2749 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:58:34,451 INFO L225 Difference]: With dead ends: 1755 [2022-02-20 21:58:34,451 INFO L226 Difference]: Without dead ends: 1063 [2022-02-20 21:58:34,458 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 76 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2022-02-20 21:58:34,460 INFO L933 BasicCegarLoop]: 994 mSDtfsCounter, 1075 mSDsluCounter, 1719 mSDsCounter, 0 mSdLazyCounter, 878 mSolverCounterSat, 743 mSolverCounterUnsat, 4 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 10.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1143 SdHoareTripleChecker+Valid, 2713 SdHoareTripleChecker+Invalid, 1625 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 743 IncrementalHoareTripleChecker+Valid, 878 IncrementalHoareTripleChecker+Invalid, 4 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 10.7s IncrementalHoareTripleChecker+Time [2022-02-20 21:58:34,461 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1143 Valid, 2713 Invalid, 1625 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [743 Valid, 878 Invalid, 4 Unknown, 0 Unchecked, 10.7s Time] [2022-02-20 21:58:34,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1063 states. [2022-02-20 21:58:34,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1063 to 1010. [2022-02-20 21:58:34,555 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-02-20 21:58:34,563 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1063 states. Second operand has 1010 states, 781 states have (on average 1.380281690140845) internal successors, (1078), 794 states have internal predecessors, (1078), 189 states have call successors, (189), 40 states have call predecessors, (189), 39 states have return successors, (188), 187 states have call predecessors, (188), 188 states have call successors, (188) [2022-02-20 21:58:34,567 INFO L74 IsIncluded]: Start isIncluded. First operand 1063 states. Second operand has 1010 states, 781 states have (on average 1.380281690140845) internal successors, (1078), 794 states have internal predecessors, (1078), 189 states have call successors, (189), 40 states have call predecessors, (189), 39 states have return successors, (188), 187 states have call predecessors, (188), 188 states have call successors, (188) [2022-02-20 21:58:34,571 INFO L87 Difference]: Start difference. First operand 1063 states. Second operand has 1010 states, 781 states have (on average 1.380281690140845) internal successors, (1078), 794 states have internal predecessors, (1078), 189 states have call successors, (189), 40 states have call predecessors, (189), 39 states have return successors, (188), 187 states have call predecessors, (188), 188 states have call successors, (188) [2022-02-20 21:58:34,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:58:34,657 INFO L93 Difference]: Finished difference Result 1063 states and 1561 transitions. [2022-02-20 21:58:34,657 INFO L276 IsEmpty]: Start isEmpty. Operand 1063 states and 1561 transitions. [2022-02-20 21:58:34,668 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:58:34,668 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:58:34,673 INFO L74 IsIncluded]: Start isIncluded. First operand has 1010 states, 781 states have (on average 1.380281690140845) internal successors, (1078), 794 states have internal predecessors, (1078), 189 states have call successors, (189), 40 states have call predecessors, (189), 39 states have return successors, (188), 187 states have call predecessors, (188), 188 states have call successors, (188) Second operand 1063 states. [2022-02-20 21:58:34,677 INFO L87 Difference]: Start difference. First operand has 1010 states, 781 states have (on average 1.380281690140845) internal successors, (1078), 794 states have internal predecessors, (1078), 189 states have call successors, (189), 40 states have call predecessors, (189), 39 states have return successors, (188), 187 states have call predecessors, (188), 188 states have call successors, (188) Second operand 1063 states. [2022-02-20 21:58:34,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:58:34,768 INFO L93 Difference]: Finished difference Result 1063 states and 1561 transitions. [2022-02-20 21:58:34,769 INFO L276 IsEmpty]: Start isEmpty. Operand 1063 states and 1561 transitions. [2022-02-20 21:58:34,775 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-02-20 21:58:34,775 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-02-20 21:58:34,775 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-02-20 21:58:34,775 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-02-20 21:58:34,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 781 states have (on average 1.380281690140845) internal successors, (1078), 794 states have internal predecessors, (1078), 189 states have call successors, (189), 40 states have call predecessors, (189), 39 states have return successors, (188), 187 states have call predecessors, (188), 188 states have call successors, (188) [2022-02-20 21:58:34,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1455 transitions. [2022-02-20 21:58:34,896 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1455 transitions. Word has length 263 [2022-02-20 21:58:34,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-20 21:58:34,898 INFO L470 AbstractCegarLoop]: Abstraction has 1010 states and 1455 transitions. [2022-02-20 21:58:34,899 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 17.833333333333332) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (32), 5 states have call predecessors, (32), 1 states have return successors, (31), 2 states have call predecessors, (31), 2 states have call successors, (31) [2022-02-20 21:58:34,899 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1455 transitions. [2022-02-20 21:58:34,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2022-02-20 21:58:34,907 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 21:58:34,908 INFO L514 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 12, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 21:58:34,908 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-20 21:58:34,908 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 21:58:34,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 21:58:34,910 INFO L85 PathProgramCache]: Analyzing trace with hash -334118393, now seen corresponding path program 1 times [2022-02-20 21:58:34,910 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 21:58:34,910 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449933282] [2022-02-20 21:58:34,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 21:58:34,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 21:58:35,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,197 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 21:58:35,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,210 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,210 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,211 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,211 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1911#return; {6755#true} is VALID [2022-02-20 21:58:35,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 21:58:35,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,221 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1913#return; {6755#true} is VALID [2022-02-20 21:58:35,222 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-02-20 21:58:35,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,231 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1915#return; {6755#true} is VALID [2022-02-20 21:58:35,232 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-02-20 21:58:35,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,240 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,240 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,240 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1917#return; {6755#true} is VALID [2022-02-20 21:58:35,241 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-02-20 21:58:35,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,249 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1919#return; {6755#true} is VALID [2022-02-20 21:58:35,250 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 21:58:35,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,258 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,258 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,258 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,258 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1921#return; {6755#true} is VALID [2022-02-20 21:58:35,259 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-02-20 21:58:35,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,270 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,270 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1923#return; {6755#true} is VALID [2022-02-20 21:58:35,270 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-02-20 21:58:35,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,280 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,280 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1925#return; {6755#true} is VALID [2022-02-20 21:58:35,280 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2022-02-20 21:58:35,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,292 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,292 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,292 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #2035#return; {6755#true} is VALID [2022-02-20 21:58:35,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2022-02-20 21:58:35,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,301 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,302 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #2037#return; {6755#true} is VALID [2022-02-20 21:58:35,302 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2022-02-20 21:58:35,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,313 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #2039#return; {6755#true} is VALID [2022-02-20 21:58:35,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-02-20 21:58:35,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #2041#return; {6755#true} is VALID [2022-02-20 21:58:35,322 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2022-02-20 21:58:35,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,333 INFO L290 TraceCheckUtils]: 0: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #2043#return; {6755#true} is VALID [2022-02-20 21:58:35,340 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 104 [2022-02-20 21:58:35,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,354 INFO L290 TraceCheckUtils]: 0: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,355 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,355 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,355 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1927#return; {6755#true} is VALID [2022-02-20 21:58:35,355 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 111 [2022-02-20 21:58:35,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,364 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 21:58:35,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,372 INFO L290 TraceCheckUtils]: 0: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,372 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,378 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1885#return; {6755#true} is VALID [2022-02-20 21:58:35,381 INFO L290 TraceCheckUtils]: 0: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~size#1 := #in~size#1;~gfp#1 := #in~gfp#1;havoc ~tmp~4#1.base, ~tmp~4#1.offset;assume { :begin_inline_devm_kmalloc } true;devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset, devm_kmalloc_#in~arg1#1, devm_kmalloc_#in~arg2#1 := ~dev#1.base, ~dev#1.offset, ~size#1, ~bitwiseOr(~gfp#1, 32768);havoc devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset, devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset, devm_kmalloc_~arg1#1, devm_kmalloc_~arg2#1;devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset := devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset;devm_kmalloc_~arg1#1 := devm_kmalloc_#in~arg1#1;devm_kmalloc_~arg2#1 := devm_kmalloc_#in~arg2#1; {6755#true} is VALID [2022-02-20 21:58:35,383 INFO L272 TraceCheckUtils]: 1: Hoare triple {6755#true} call devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset := ldv_malloc(0); {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,383 INFO L290 TraceCheckUtils]: 2: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,384 INFO L290 TraceCheckUtils]: 3: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,384 INFO L290 TraceCheckUtils]: 4: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,385 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {6755#true} {6755#true} #1885#return; {6755#true} is VALID [2022-02-20 21:58:35,385 INFO L290 TraceCheckUtils]: 6: Hoare triple {6755#true} devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset := devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,385 INFO L290 TraceCheckUtils]: 7: Hoare triple {6755#true} #t~ret26#1.base, #t~ret26#1.offset := devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;assume { :end_inline_devm_kmalloc } true;~tmp~4#1.base, ~tmp~4#1.offset := #t~ret26#1.base, #t~ret26#1.offset;havoc #t~ret26#1.base, #t~ret26#1.offset;#res#1.base, #res#1.offset := ~tmp~4#1.base, ~tmp~4#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,385 INFO L290 TraceCheckUtils]: 8: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,386 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6755#true} {6755#true} #1929#return; {6755#true} is VALID [2022-02-20 21:58:35,386 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 129 [2022-02-20 21:58:35,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,401 INFO L290 TraceCheckUtils]: 0: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,401 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,401 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,402 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6755#true} {6755#true} #1931#return; {6755#true} is VALID [2022-02-20 21:58:35,402 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 145 [2022-02-20 21:58:35,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,410 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1939#return; {6756#false} is VALID [2022-02-20 21:58:35,410 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 149 [2022-02-20 21:58:35,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,424 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,424 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,425 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1941#return; {6756#false} is VALID [2022-02-20 21:58:35,425 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 154 [2022-02-20 21:58:35,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,434 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,434 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,435 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1943#return; {6756#false} is VALID [2022-02-20 21:58:35,435 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 158 [2022-02-20 21:58:35,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,446 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,446 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,447 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1945#return; {6756#false} is VALID [2022-02-20 21:58:35,447 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 163 [2022-02-20 21:58:35,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,454 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~arg0 := #in~arg0; {6755#true} is VALID [2022-02-20 21:58:35,454 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,454 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1947#return; {6756#false} is VALID [2022-02-20 21:58:35,455 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 167 [2022-02-20 21:58:35,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,462 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1949#return; {6756#false} is VALID [2022-02-20 21:58:35,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 173 [2022-02-20 21:58:35,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,469 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,470 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1951#return; {6756#false} is VALID [2022-02-20 21:58:35,470 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 177 [2022-02-20 21:58:35,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,478 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,478 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1953#return; {6756#false} is VALID [2022-02-20 21:58:35,489 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 182 [2022-02-20 21:58:35,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,506 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 21:58:35,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,513 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,514 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:58:35,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,520 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,520 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,520 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:58:35,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,527 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,527 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,528 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {6755#true} is VALID [2022-02-20 21:58:35,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,528 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,528 INFO L272 TraceCheckUtils]: 3: Hoare triple {6755#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,528 INFO L290 TraceCheckUtils]: 4: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,529 INFO L290 TraceCheckUtils]: 5: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,529 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,529 INFO L272 TraceCheckUtils]: 7: Hoare triple {6755#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,529 INFO L290 TraceCheckUtils]: 9: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,531 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,532 INFO L290 TraceCheckUtils]: 11: Hoare triple {6755#true} havoc #t~ret320; {6755#true} is VALID [2022-02-20 21:58:35,532 INFO L272 TraceCheckUtils]: 12: Hoare triple {6755#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,532 INFO L290 TraceCheckUtils]: 13: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,532 INFO L290 TraceCheckUtils]: 14: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,532 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,533 INFO L290 TraceCheckUtils]: 16: Hoare triple {6755#true} ~count~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,533 INFO L290 TraceCheckUtils]: 17: Hoare triple {6755#true} assume !(~count~0 % 4294967296 <= 1000); {6755#true} is VALID [2022-02-20 21:58:35,533 INFO L290 TraceCheckUtils]: 18: Hoare triple {6755#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {6755#true} is VALID [2022-02-20 21:58:35,533 INFO L290 TraceCheckUtils]: 19: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,533 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {6755#true} {6756#false} #1955#return; {6756#false} is VALID [2022-02-20 21:58:35,533 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 230 [2022-02-20 21:58:35,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,541 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1961#return; {6756#false} is VALID [2022-02-20 21:58:35,541 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 234 [2022-02-20 21:58:35,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,548 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,548 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,548 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1963#return; {6756#false} is VALID [2022-02-20 21:58:35,548 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240 [2022-02-20 21:58:35,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,555 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,555 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1965#return; {6756#false} is VALID [2022-02-20 21:58:35,555 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244 [2022-02-20 21:58:35,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,566 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,566 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1967#return; {6756#false} is VALID [2022-02-20 21:58:35,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2022-02-20 21:58:35,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,583 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 21:58:35,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,607 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,608 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,608 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:58:35,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,615 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:58:35,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,623 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,623 INFO L290 TraceCheckUtils]: 0: Hoare triple {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L272 TraceCheckUtils]: 3: Hoare triple {6755#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L290 TraceCheckUtils]: 4: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,624 INFO L272 TraceCheckUtils]: 7: Hoare triple {6755#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L290 TraceCheckUtils]: 11: Hoare triple {6755#true} havoc #t~ret320; {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L272 TraceCheckUtils]: 12: Hoare triple {6755#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L290 TraceCheckUtils]: 13: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,625 INFO L290 TraceCheckUtils]: 14: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,626 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,626 INFO L290 TraceCheckUtils]: 16: Hoare triple {6755#true} ~count~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,626 INFO L290 TraceCheckUtils]: 17: Hoare triple {6755#true} assume !(~count~0 % 4294967296 <= 1000); {6755#true} is VALID [2022-02-20 21:58:35,626 INFO L290 TraceCheckUtils]: 18: Hoare triple {6755#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {6755#true} is VALID [2022-02-20 21:58:35,626 INFO L290 TraceCheckUtils]: 19: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,626 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {6755#true} {6756#false} #1969#return; {6756#false} is VALID [2022-02-20 21:58:35,627 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 278 [2022-02-20 21:58:35,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,636 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,637 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,637 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6756#false} #1975#return; {6756#false} is VALID [2022-02-20 21:58:35,637 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287 [2022-02-20 21:58:35,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,659 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 21:58:35,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,667 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,668 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,668 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 21:58:35,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,674 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,674 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,674 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,675 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-02-20 21:58:35,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 21:58:35,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,682 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,682 INFO L290 TraceCheckUtils]: 0: Hoare triple {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {6755#true} is VALID [2022-02-20 21:58:35,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,682 INFO L290 TraceCheckUtils]: 2: Hoare triple {6755#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,683 INFO L272 TraceCheckUtils]: 3: Hoare triple {6755#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,683 INFO L290 TraceCheckUtils]: 4: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,683 INFO L290 TraceCheckUtils]: 5: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L272 TraceCheckUtils]: 7: Hoare triple {6755#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L290 TraceCheckUtils]: 8: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L290 TraceCheckUtils]: 9: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L290 TraceCheckUtils]: 11: Hoare triple {6755#true} havoc #t~ret320; {6755#true} is VALID [2022-02-20 21:58:35,684 INFO L272 TraceCheckUtils]: 12: Hoare triple {6755#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L290 TraceCheckUtils]: 13: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L290 TraceCheckUtils]: 14: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L290 TraceCheckUtils]: 16: Hoare triple {6755#true} ~count~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L290 TraceCheckUtils]: 17: Hoare triple {6755#true} assume !(~count~0 % 4294967296 <= 1000); {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L290 TraceCheckUtils]: 18: Hoare triple {6755#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {6755#true} is VALID [2022-02-20 21:58:35,685 INFO L290 TraceCheckUtils]: 19: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,686 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {6755#true} {6756#false} #1981#return; {6756#false} is VALID [2022-02-20 21:58:35,686 INFO L290 TraceCheckUtils]: 0: Hoare triple {6755#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(94, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(9, 4);call #Ultimate.allocInit(9, 5);call #Ultimate.allocInit(214, 6);call #Ultimate.allocInit(214, 7);call #Ultimate.allocInit(214, 8);call #Ultimate.allocInit(25, 9);call #Ultimate.allocInit(25, 10);call #Ultimate.allocInit(55, 11);call #Ultimate.allocInit(5, 12);call write~init~int(48, 12, 0, 1);call write~init~int(46, 12, 1, 1);call write~init~int(49, 12, 2, 1);call write~init~int(50, 12, 3, 1);call write~init~int(0, 12, 4, 1);call #Ultimate.allocInit(9, 13);call #Ultimate.allocInit(5, 14);call write~init~int(109, 14, 0, 1);call write~init~int(109, 14, 1, 1);call write~init~int(105, 14, 2, 1);call write~init~int(111, 14, 3, 1);call write~init~int(0, 14, 4, 1);call #Ultimate.allocInit(5, 15);call write~init~int(100, 15, 0, 1);call write~init~int(105, 15, 1, 1);call write~init~int(109, 15, 2, 1);call write~init~int(109, 15, 3, 1);call write~init~int(0, 15, 4, 1);call #Ultimate.allocInit(5, 16);call write~init~int(112, 16, 0, 1);call write~init~int(111, 16, 1, 1);call write~init~int(114, 16, 2, 1);call write~init~int(116, 16, 3, 1);call write~init~int(0, 16, 4, 1);call #Ultimate.allocInit(9, 17);~ldv_state_variable_3~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_state_variable_2~0 := 0;~pdc_20621_ops_group0~0.base, ~pdc_20621_ops_group0~0.offset := 0, 0;~pdc_sata_sht_group0~0.base, ~pdc_sata_sht_group0~0.offset := 0, 0;~ref_cnt~0 := 0;~pdc_20621_ops_group2~0.base, ~pdc_20621_ops_group2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~pdc_20621_ops_group1~0.base, ~pdc_20621_ops_group1~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~pdc_sata_pci_driver_group0~0.base, ~pdc_sata_pci_driver_group0~0.offset := 0, 0;~#pdc_sata_sht~0.base, ~#pdc_sata_sht~0.offset := 18, 0;call #Ultimate.allocInit(337, 18);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pdc_sata_sht~0.base, ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(3, 0, ~#pdc_sata_sht~0.base, 8 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 16 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 24 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 32 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_ioctl.base, #funAddr~ata_scsi_ioctl.offset, ~#pdc_sata_sht~0.base, 40 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 48 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_queuecmd.base, #funAddr~ata_scsi_queuecmd.offset, ~#pdc_sata_sht~0.base, 56 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 64 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 72 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 80 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 88 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 96 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 104 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 112 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_slave_config.base, #funAddr~ata_scsi_slave_config.offset, ~#pdc_sata_sht~0.base, 120 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_slave_destroy.base, #funAddr~ata_scsi_slave_destroy.offset, ~#pdc_sata_sht~0.base, 128 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 136 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 144 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 152 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 160 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 168 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 176 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_std_bios_param.base, #funAddr~ata_std_bios_param.offset, ~#pdc_sata_sht~0.base, 184 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_scsi_unlock_native_capacity.base, #funAddr~ata_scsi_unlock_native_capacity.offset, ~#pdc_sata_sht~0.base, 192 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 200 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 208 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 216 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 224 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(4, 0, ~#pdc_sata_sht~0.base, 232 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 240 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(1, ~#pdc_sata_sht~0.base, 248 + ~#pdc_sata_sht~0.offset, 4);call write~init~int(-1, ~#pdc_sata_sht~0.base, 252 + ~#pdc_sata_sht~0.offset, 4);call write~init~int(128, ~#pdc_sata_sht~0.base, 256 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(0, ~#pdc_sata_sht~0.base, 258 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(0, ~#pdc_sata_sht~0.base, 260 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(65535, ~#pdc_sata_sht~0.base, 262 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(1, ~#pdc_sata_sht~0.base, 270 + ~#pdc_sata_sht~0.offset, 2);call write~init~int(0, ~#pdc_sata_sht~0.base, 272 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 273 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 274 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(1, ~#pdc_sata_sht~0.base, 275 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(1, ~#pdc_sata_sht~0.base, 276 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 277 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 278 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 279 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 280 + ~#pdc_sata_sht~0.offset, 1);call write~init~int(0, ~#pdc_sata_sht~0.base, 281 + ~#pdc_sata_sht~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 285 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(~#ata_common_sdev_attrs~0.base, ~#ata_common_sdev_attrs~0.offset, ~#pdc_sata_sht~0.base, 293 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 301 + ~#pdc_sata_sht~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 309 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(0, ~#pdc_sata_sht~0.base, 317 + ~#pdc_sata_sht~0.offset, 8);call write~init~int(0, ~#pdc_sata_sht~0.base, 325 + ~#pdc_sata_sht~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pdc_sata_sht~0.base, 329 + ~#pdc_sata_sht~0.offset, 8);~#pdc_20621_ops~0.base, ~#pdc_20621_ops~0.offset := 19, 0;call #Ultimate.allocInit(488, 19);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_check_atapi_dma.base, #funAddr~pdc_check_atapi_dma.offset, ~#pdc_20621_ops~0.base, 8 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc20621_qc_prep.base, #funAddr~pdc20621_qc_prep.offset, ~#pdc_20621_ops~0.base, 16 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc20621_qc_issue.base, #funAddr~pdc20621_qc_issue.offset, ~#pdc_20621_ops~0.base, 24 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 32 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 40 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 48 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 56 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 64 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 72 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 80 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 88 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_freeze.base, #funAddr~pdc_freeze.offset, ~#pdc_20621_ops~0.base, 96 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_thaw.base, #funAddr~pdc_thaw.offset, ~#pdc_20621_ops~0.base, 104 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 112 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_softreset.base, #funAddr~pdc_softreset.offset, ~#pdc_20621_ops~0.base, 120 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 128 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 136 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 144 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 152 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 160 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 168 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_error_handler.base, #funAddr~pdc_error_handler.offset, ~#pdc_20621_ops~0.base, 176 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, -2, ~#pdc_20621_ops~0.base, 184 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_post_internal_cmd.base, #funAddr~pdc_post_internal_cmd.offset, ~#pdc_20621_ops~0.base, 192 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 200 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 208 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 216 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 224 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 232 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 240 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 248 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 256 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 264 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_port_start.base, #funAddr~pdc_port_start.offset, ~#pdc_20621_ops~0.base, 272 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 280 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 288 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 296 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 304 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 312 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 320 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_tf_load_mmio.base, #funAddr~pdc_tf_load_mmio.offset, ~#pdc_20621_ops~0.base, 328 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 336 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_exec_command_mmio.base, #funAddr~pdc_exec_command_mmio.offset, ~#pdc_20621_ops~0.base, 344 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 352 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 360 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 368 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc20621_irq_clear.base, #funAddr~pdc20621_irq_clear.offset, ~#pdc_20621_ops~0.base, 376 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 384 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 392 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 400 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 408 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 416 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 424 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 432 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 440 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 448 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 456 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 464 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_20621_ops~0.base, 472 + ~#pdc_20621_ops~0.offset, 8);call write~init~$Pointer$(~#ata_sff_port_ops~0.base, ~#ata_sff_port_ops~0.offset, ~#pdc_20621_ops~0.base, 480 + ~#pdc_20621_ops~0.offset, 8);~#pdc_port_info~0.base, ~#pdc_port_info~0.offset := 20, 0;call #Ultimate.allocInit(56, 20);call write~init~int(578, ~#pdc_port_info~0.base, ~#pdc_port_info~0.offset, 8);call write~init~int(0, ~#pdc_port_info~0.base, 8 + ~#pdc_port_info~0.offset, 8);call write~init~int(31, ~#pdc_port_info~0.base, 16 + ~#pdc_port_info~0.offset, 8);call write~init~int(7, ~#pdc_port_info~0.base, 24 + ~#pdc_port_info~0.offset, 8);call write~init~int(127, ~#pdc_port_info~0.base, 32 + ~#pdc_port_info~0.offset, 8);call write~init~$Pointer$(~#pdc_20621_ops~0.base, ~#pdc_20621_ops~0.offset, ~#pdc_port_info~0.base, 40 + ~#pdc_port_info~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_port_info~0.base, 48 + ~#pdc_port_info~0.offset, 8);~#pdc_sata_pci_tbl~0.base, ~#pdc_sata_pci_tbl~0.offset := 21, 0;call #Ultimate.allocInit(64, 21);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#pdc_sata_pci_tbl~0.base);call write~unchecked~int(4186, ~#pdc_sata_pci_tbl~0.base, ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(26146, ~#pdc_sata_pci_tbl~0.base, 4 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(4294967295, ~#pdc_sata_pci_tbl~0.base, 8 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(4294967295, ~#pdc_sata_pci_tbl~0.base, 12 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(0, ~#pdc_sata_pci_tbl~0.base, 16 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(0, ~#pdc_sata_pci_tbl~0.base, 20 + ~#pdc_sata_pci_tbl~0.offset, 4);call write~unchecked~int(0, ~#pdc_sata_pci_tbl~0.base, 24 + ~#pdc_sata_pci_tbl~0.offset, 8);~#pdc_sata_pci_driver~0.base, ~#pdc_sata_pci_driver~0.offset := 22, 0;call #Ultimate.allocInit(301, 22);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 8 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(5, 0, ~#pdc_sata_pci_driver~0.base, 16 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(~#pdc_sata_pci_tbl~0.base, ~#pdc_sata_pci_tbl~0.offset, ~#pdc_sata_pci_driver~0.base, 24 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~pdc_sata_init_one.base, #funAddr~pdc_sata_init_one.offset, ~#pdc_sata_pci_driver~0.base, 32 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~ata_pci_remove_one.base, #funAddr~ata_pci_remove_one.offset, ~#pdc_sata_pci_driver~0.base, 40 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 48 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 56 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 64 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 72 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 80 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 88 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 96 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 104 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 112 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 120 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 128 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 136 + ~#pdc_sata_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 137 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 145 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 153 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 161 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 169 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 177 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 185 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 193 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 201 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 209 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 217 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 221 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 225 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 229 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 237 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 245 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 253 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 261 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 269 + ~#pdc_sata_pci_driver~0.offset, 4);call write~init~int(0, ~#pdc_sata_pci_driver~0.base, 273 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 285 + ~#pdc_sata_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pdc_sata_pci_driver~0.base, 293 + ~#pdc_sata_pci_driver~0.offset, 8);~__mod_pci__pdc_sata_pci_tbl_device_table~0.vendor := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.device := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.subvendor := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.subdevice := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.class := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.class_mask := 0;~__mod_pci__pdc_sata_pci_tbl_device_table~0.driver_data := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_spin~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {6755#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret434#1.base, main_#t~ret434#1.offset, main_#t~ret435#1.base, main_#t~ret435#1.offset, main_#t~ret436#1.base, main_#t~ret436#1.offset, main_#t~ret437#1.base, main_#t~ret437#1.offset, main_#t~ret438#1.base, main_#t~ret438#1.offset, main_#t~ret439#1.base, main_#t~ret439#1.offset, main_#t~nondet440#1, main_#t~ret441#1.base, main_#t~ret441#1.offset, main_#t~ret442#1.base, main_#t~ret442#1.offset, main_#t~nondet443#1, main_#t~memset~res444#1.base, main_#t~memset~res444#1.offset, main_#t~nondet445#1, main_#t~switch446#1, main_#t~nondet447#1, main_#t~switch448#1, main_#t~ret449#1, main_#t~nondet450#1, main_#t~switch451#1, main_#t~ret452#1, main_#t~nondet453#1, main_#t~switch454#1, main_#t~mem455#1, main_#t~ret456#1, main_#t~ret457#1, main_#t~ret458#1, main_#t~ret459#1, main_#t~nondet460#1, main_#t~switch461#1, main_#t~ret462#1, main_#t~ret463#1, main_#t~ret464#1, main_#t~ret465#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp~36#1.base, main_~tmp~36#1.offset, main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset, main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset, main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset, main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset, main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset, main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset, main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset, main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset, main_~ldvarg2~0#1, main_~tmp___5~3#1, main_~#ldvarg6~0#1.base, main_~#ldvarg6~0#1.offset, main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset, main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset, main_~ldvarg10~0#1.base, main_~ldvarg10~0#1.offset, main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset, main_~ldvarg9~0#1, main_~tmp___8~3#1, main_~tmp___9~1#1, main_~tmp___10~1#1, main_~tmp___11~1#1, main_~tmp___12~1#1, main_~tmp___13~1#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp~36#1.base, main_~tmp~36#1.offset;havoc main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset;havoc main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset;havoc main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset;havoc main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset;havoc main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset;havoc main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset;havoc main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset;havoc main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset;havoc main_~ldvarg2~0#1;havoc main_~tmp___5~3#1;call main_~#ldvarg6~0#1.base, main_~#ldvarg6~0#1.offset := #Ultimate.allocOnStack(8);havoc main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset;havoc main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset;havoc main_~ldvarg10~0#1.base, main_~ldvarg10~0#1.offset;havoc main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset;havoc main_~ldvarg9~0#1;havoc main_~tmp___8~3#1;havoc main_~tmp___9~1#1;havoc main_~tmp___10~1#1;havoc main_~tmp___11~1#1;havoc main_~tmp___12~1#1;havoc main_~tmp___13~1#1; {6755#true} is VALID [2022-02-20 21:58:35,690 INFO L272 TraceCheckUtils]: 2: Hoare triple {6755#true} call main_#t~ret434#1.base, main_#t~ret434#1.offset := ldv_zalloc(32); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,690 INFO L290 TraceCheckUtils]: 3: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,690 INFO L290 TraceCheckUtils]: 4: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,690 INFO L290 TraceCheckUtils]: 5: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,690 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {6755#true} {6755#true} #1911#return; {6755#true} is VALID [2022-02-20 21:58:35,690 INFO L290 TraceCheckUtils]: 7: Hoare triple {6755#true} main_~tmp~36#1.base, main_~tmp~36#1.offset := main_#t~ret434#1.base, main_#t~ret434#1.offset;havoc main_#t~ret434#1.base, main_#t~ret434#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp~36#1.base, main_~tmp~36#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,691 INFO L272 TraceCheckUtils]: 8: Hoare triple {6755#true} call main_#t~ret435#1.base, main_#t~ret435#1.offset := ldv_zalloc(1); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,691 INFO L290 TraceCheckUtils]: 9: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,691 INFO L290 TraceCheckUtils]: 10: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,692 INFO L290 TraceCheckUtils]: 11: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,692 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {6755#true} {6755#true} #1913#return; {6755#true} is VALID [2022-02-20 21:58:35,692 INFO L290 TraceCheckUtils]: 13: Hoare triple {6755#true} main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset := main_#t~ret435#1.base, main_#t~ret435#1.offset;havoc main_#t~ret435#1.base, main_#t~ret435#1.offset;main_~ldvarg1~0#1.base, main_~ldvarg1~0#1.offset := main_~tmp___0~17#1.base, main_~tmp___0~17#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,692 INFO L272 TraceCheckUtils]: 14: Hoare triple {6755#true} call main_#t~ret436#1.base, main_#t~ret436#1.offset := ldv_zalloc(496); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,693 INFO L290 TraceCheckUtils]: 15: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,693 INFO L290 TraceCheckUtils]: 16: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,693 INFO L290 TraceCheckUtils]: 17: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,693 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {6755#true} {6755#true} #1915#return; {6755#true} is VALID [2022-02-20 21:58:35,693 INFO L290 TraceCheckUtils]: 19: Hoare triple {6755#true} main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset := main_#t~ret436#1.base, main_#t~ret436#1.offset;havoc main_#t~ret436#1.base, main_#t~ret436#1.offset;main_~ldvarg7~0#1.base, main_~ldvarg7~0#1.offset := main_~tmp___1~9#1.base, main_~tmp___1~9#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,694 INFO L272 TraceCheckUtils]: 20: Hoare triple {6755#true} call main_#t~ret437#1.base, main_#t~ret437#1.offset := ldv_zalloc(456); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,694 INFO L290 TraceCheckUtils]: 21: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,694 INFO L290 TraceCheckUtils]: 22: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,694 INFO L290 TraceCheckUtils]: 23: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,694 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6755#true} {6755#true} #1917#return; {6755#true} is VALID [2022-02-20 21:58:35,694 INFO L290 TraceCheckUtils]: 25: Hoare triple {6755#true} main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset := main_#t~ret437#1.base, main_#t~ret437#1.offset;havoc main_#t~ret437#1.base, main_#t~ret437#1.offset;main_~ldvarg4~0#1.base, main_~ldvarg4~0#1.offset := main_~tmp___2~5#1.base, main_~tmp___2~5#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,695 INFO L272 TraceCheckUtils]: 26: Hoare triple {6755#true} call main_#t~ret438#1.base, main_#t~ret438#1.offset := ldv_zalloc(3584); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,695 INFO L290 TraceCheckUtils]: 27: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,695 INFO L290 TraceCheckUtils]: 28: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,695 INFO L290 TraceCheckUtils]: 29: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,696 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {6755#true} {6755#true} #1919#return; {6755#true} is VALID [2022-02-20 21:58:35,696 INFO L290 TraceCheckUtils]: 31: Hoare triple {6755#true} main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset := main_#t~ret438#1.base, main_#t~ret438#1.offset;havoc main_#t~ret438#1.base, main_#t~ret438#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___3~4#1.base, main_~tmp___3~4#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,696 INFO L272 TraceCheckUtils]: 32: Hoare triple {6755#true} call main_#t~ret439#1.base, main_#t~ret439#1.offset := ldv_zalloc(4); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,696 INFO L290 TraceCheckUtils]: 33: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,697 INFO L290 TraceCheckUtils]: 34: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,697 INFO L290 TraceCheckUtils]: 35: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,697 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {6755#true} {6755#true} #1921#return; {6755#true} is VALID [2022-02-20 21:58:35,697 INFO L290 TraceCheckUtils]: 37: Hoare triple {6755#true} main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset := main_#t~ret439#1.base, main_#t~ret439#1.offset;havoc main_#t~ret439#1.base, main_#t~ret439#1.offset;main_~ldvarg5~0#1.base, main_~ldvarg5~0#1.offset := main_~tmp___4~3#1.base, main_~tmp___4~3#1.offset;assume -2147483648 <= main_#t~nondet440#1 && main_#t~nondet440#1 <= 2147483647;main_~tmp___5~3#1 := main_#t~nondet440#1;havoc main_#t~nondet440#1;main_~ldvarg2~0#1 := main_~tmp___5~3#1; {6755#true} is VALID [2022-02-20 21:58:35,698 INFO L272 TraceCheckUtils]: 38: Hoare triple {6755#true} call main_#t~ret441#1.base, main_#t~ret441#1.offset := ldv_zalloc(7056); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,698 INFO L290 TraceCheckUtils]: 39: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,698 INFO L290 TraceCheckUtils]: 40: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,698 INFO L290 TraceCheckUtils]: 41: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,698 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6755#true} {6755#true} #1923#return; {6755#true} is VALID [2022-02-20 21:58:35,698 INFO L290 TraceCheckUtils]: 43: Hoare triple {6755#true} main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset := main_#t~ret441#1.base, main_#t~ret441#1.offset;havoc main_#t~ret441#1.base, main_#t~ret441#1.offset;main_~ldvarg8~0#1.base, main_~ldvarg8~0#1.offset := main_~tmp___6~3#1.base, main_~tmp___6~3#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,699 INFO L272 TraceCheckUtils]: 44: Hoare triple {6755#true} call main_#t~ret442#1.base, main_#t~ret442#1.offset := ldv_zalloc(4); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,699 INFO L290 TraceCheckUtils]: 45: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,699 INFO L290 TraceCheckUtils]: 46: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,699 INFO L290 TraceCheckUtils]: 47: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6755#true} {6755#true} #1925#return; {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L290 TraceCheckUtils]: 49: Hoare triple {6755#true} main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset := main_#t~ret442#1.base, main_#t~ret442#1.offset;havoc main_#t~ret442#1.base, main_#t~ret442#1.offset;main_~ldvarg10~0#1.base, main_~ldvarg10~0#1.offset := main_~tmp___7~3#1.base, main_~tmp___7~3#1.offset;main_~tmp___8~3#1 := main_#t~nondet443#1;havoc main_#t~nondet443#1;main_~ldvarg9~0#1 := main_~tmp___8~3#1;assume { :begin_inline_ldv_initialize } true; {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L290 TraceCheckUtils]: 50: Hoare triple {6755#true} assume { :end_inline_ldv_initialize } true;assume { :begin_inline_#Ultimate.C_memset } true;#Ultimate.C_memset_#ptr#1.base, #Ultimate.C_memset_#ptr#1.offset, #Ultimate.C_memset_#value#1, #Ultimate.C_memset_#amount#1 := main_~#ldvarg6~0#1.base, main_~#ldvarg6~0#1.offset, 0, 8;havoc #Ultimate.C_memset_#res#1.base, #Ultimate.C_memset_#res#1.offset;havoc #Ultimate.C_memset_#t~loopctr491#1;#Ultimate.C_memset_#t~loopctr491#1 := 0; {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L290 TraceCheckUtils]: 51: Hoare triple {6755#true} assume !(#Ultimate.C_memset_#t~loopctr491#1 % 18446744073709551616 < #Ultimate.C_memset_#amount#1 % 18446744073709551616); {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L290 TraceCheckUtils]: 52: Hoare triple {6755#true} assume #Ultimate.C_memset_#res#1.base == #Ultimate.C_memset_#ptr#1.base && #Ultimate.C_memset_#res#1.offset == #Ultimate.C_memset_#ptr#1.offset;main_#t~memset~res444#1.base, main_#t~memset~res444#1.offset := #Ultimate.C_memset_#res#1.base, #Ultimate.C_memset_#res#1.offset;assume { :end_inline_#Ultimate.C_memset } true;havoc main_#t~memset~res444#1.base, main_#t~memset~res444#1.offset;~ldv_state_variable_1~0 := 0;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L290 TraceCheckUtils]: 53: Hoare triple {6755#true} assume -2147483648 <= main_#t~nondet445#1 && main_#t~nondet445#1 <= 2147483647;main_~tmp___9~1#1 := main_#t~nondet445#1;havoc main_#t~nondet445#1;main_#t~switch446#1 := 0 == main_~tmp___9~1#1; {6755#true} is VALID [2022-02-20 21:58:35,700 INFO L290 TraceCheckUtils]: 54: Hoare triple {6755#true} assume !main_#t~switch446#1;main_#t~switch446#1 := main_#t~switch446#1 || 1 == main_~tmp___9~1#1; {6755#true} is VALID [2022-02-20 21:58:35,701 INFO L290 TraceCheckUtils]: 55: Hoare triple {6755#true} assume main_#t~switch446#1; {6755#true} is VALID [2022-02-20 21:58:35,701 INFO L290 TraceCheckUtils]: 56: Hoare triple {6755#true} assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet450#1 && main_#t~nondet450#1 <= 2147483647;main_~tmp___11~1#1 := main_#t~nondet450#1;havoc main_#t~nondet450#1;main_#t~switch451#1 := 0 == main_~tmp___11~1#1; {6755#true} is VALID [2022-02-20 21:58:35,701 INFO L290 TraceCheckUtils]: 57: Hoare triple {6755#true} assume !main_#t~switch451#1;main_#t~switch451#1 := main_#t~switch451#1 || 1 == main_~tmp___11~1#1; {6755#true} is VALID [2022-02-20 21:58:35,701 INFO L290 TraceCheckUtils]: 58: Hoare triple {6755#true} assume main_#t~switch451#1; {6755#true} is VALID [2022-02-20 21:58:35,701 INFO L290 TraceCheckUtils]: 59: Hoare triple {6755#true} assume 1 == ~ldv_state_variable_0~0;assume { :begin_inline_pdc_sata_pci_driver_init } true;havoc pdc_sata_pci_driver_init_#res#1;havoc pdc_sata_pci_driver_init_#t~ret428#1, pdc_sata_pci_driver_init_~tmp~32#1;havoc pdc_sata_pci_driver_init_~tmp~32#1;assume { :begin_inline___pci_register_driver } true;__pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset, __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset, __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset := ~#pdc_sata_pci_driver~0.base, ~#pdc_sata_pci_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, 17, 0;havoc __pci_register_driver_#res#1;havoc __pci_register_driver_#t~nondet468#1, __pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset, __pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset, __pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset;__pci_register_driver_~arg0#1.base, __pci_register_driver_~arg0#1.offset := __pci_register_driver_#in~arg0#1.base, __pci_register_driver_#in~arg0#1.offset;__pci_register_driver_~arg1#1.base, __pci_register_driver_~arg1#1.offset := __pci_register_driver_#in~arg1#1.base, __pci_register_driver_#in~arg1#1.offset;__pci_register_driver_~arg2#1.base, __pci_register_driver_~arg2#1.offset := __pci_register_driver_#in~arg2#1.base, __pci_register_driver_#in~arg2#1.offset;assume -2147483648 <= __pci_register_driver_#t~nondet468#1 && __pci_register_driver_#t~nondet468#1 <= 2147483647;__pci_register_driver_#res#1 := __pci_register_driver_#t~nondet468#1;havoc __pci_register_driver_#t~nondet468#1; {6755#true} is VALID [2022-02-20 21:58:35,701 INFO L290 TraceCheckUtils]: 60: Hoare triple {6755#true} pdc_sata_pci_driver_init_#t~ret428#1 := __pci_register_driver_#res#1;assume { :end_inline___pci_register_driver } true;assume -2147483648 <= pdc_sata_pci_driver_init_#t~ret428#1 && pdc_sata_pci_driver_init_#t~ret428#1 <= 2147483647;pdc_sata_pci_driver_init_~tmp~32#1 := pdc_sata_pci_driver_init_#t~ret428#1;havoc pdc_sata_pci_driver_init_#t~ret428#1;pdc_sata_pci_driver_init_#res#1 := pdc_sata_pci_driver_init_~tmp~32#1; {6755#true} is VALID [2022-02-20 21:58:35,714 INFO L290 TraceCheckUtils]: 61: Hoare triple {6755#true} main_#t~ret452#1 := pdc_sata_pci_driver_init_#res#1;assume { :end_inline_pdc_sata_pci_driver_init } true;assume -2147483648 <= main_#t~ret452#1 && main_#t~ret452#1 <= 2147483647;~ldv_retval_1~0 := main_#t~ret452#1;havoc main_#t~ret452#1; {6755#true} is VALID [2022-02-20 21:58:35,715 INFO L290 TraceCheckUtils]: 62: Hoare triple {6755#true} assume 0 == ~ldv_retval_1~0;~ldv_state_variable_0~0 := 3;~ldv_state_variable_2~0 := 1;assume { :begin_inline_ldv_initialize_ata_port_operations_2 } true;havoc ldv_initialize_ata_port_operations_2_#t~ret429#1.base, ldv_initialize_ata_port_operations_2_#t~ret429#1.offset, ldv_initialize_ata_port_operations_2_#t~ret430#1.base, ldv_initialize_ata_port_operations_2_#t~ret430#1.offset, ldv_initialize_ata_port_operations_2_#t~ret431#1.base, ldv_initialize_ata_port_operations_2_#t~ret431#1.offset, ldv_initialize_ata_port_operations_2_~tmp~33#1.base, ldv_initialize_ata_port_operations_2_~tmp~33#1.offset, ldv_initialize_ata_port_operations_2_~tmp___0~16#1.base, ldv_initialize_ata_port_operations_2_~tmp___0~16#1.offset, ldv_initialize_ata_port_operations_2_~tmp___1~8#1.base, ldv_initialize_ata_port_operations_2_~tmp___1~8#1.offset;havoc ldv_initialize_ata_port_operations_2_~tmp~33#1.base, ldv_initialize_ata_port_operations_2_~tmp~33#1.offset;havoc ldv_initialize_ata_port_operations_2_~tmp___0~16#1.base, ldv_initialize_ata_port_operations_2_~tmp___0~16#1.offset;havoc ldv_initialize_ata_port_operations_2_~tmp___1~8#1.base, ldv_initialize_ata_port_operations_2_~tmp___1~8#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,717 INFO L272 TraceCheckUtils]: 63: Hoare triple {6755#true} call ldv_initialize_ata_port_operations_2_#t~ret429#1.base, ldv_initialize_ata_port_operations_2_#t~ret429#1.offset := ldv_zalloc(18112); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,717 INFO L290 TraceCheckUtils]: 64: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,717 INFO L290 TraceCheckUtils]: 65: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,717 INFO L290 TraceCheckUtils]: 66: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,717 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {6755#true} {6755#true} #2035#return; {6755#true} is VALID [2022-02-20 21:58:35,717 INFO L290 TraceCheckUtils]: 68: Hoare triple {6755#true} ldv_initialize_ata_port_operations_2_~tmp~33#1.base, ldv_initialize_ata_port_operations_2_~tmp~33#1.offset := ldv_initialize_ata_port_operations_2_#t~ret429#1.base, ldv_initialize_ata_port_operations_2_#t~ret429#1.offset;havoc ldv_initialize_ata_port_operations_2_#t~ret429#1.base, ldv_initialize_ata_port_operations_2_#t~ret429#1.offset;~pdc_20621_ops_group0~0.base, ~pdc_20621_ops_group0~0.offset := ldv_initialize_ata_port_operations_2_~tmp~33#1.base, ldv_initialize_ata_port_operations_2_~tmp~33#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,718 INFO L272 TraceCheckUtils]: 69: Hoare triple {6755#true} call ldv_initialize_ata_port_operations_2_#t~ret430#1.base, ldv_initialize_ata_port_operations_2_#t~ret430#1.offset := ldv_zalloc(240); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,718 INFO L290 TraceCheckUtils]: 70: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,718 INFO L290 TraceCheckUtils]: 71: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,719 INFO L290 TraceCheckUtils]: 72: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,719 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {6755#true} {6755#true} #2037#return; {6755#true} is VALID [2022-02-20 21:58:35,719 INFO L290 TraceCheckUtils]: 74: Hoare triple {6755#true} ldv_initialize_ata_port_operations_2_~tmp___0~16#1.base, ldv_initialize_ata_port_operations_2_~tmp___0~16#1.offset := ldv_initialize_ata_port_operations_2_#t~ret430#1.base, ldv_initialize_ata_port_operations_2_#t~ret430#1.offset;havoc ldv_initialize_ata_port_operations_2_#t~ret430#1.base, ldv_initialize_ata_port_operations_2_#t~ret430#1.offset;~pdc_20621_ops_group1~0.base, ~pdc_20621_ops_group1~0.offset := ldv_initialize_ata_port_operations_2_~tmp___0~16#1.base, ldv_initialize_ata_port_operations_2_~tmp___0~16#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,720 INFO L272 TraceCheckUtils]: 75: Hoare triple {6755#true} call ldv_initialize_ata_port_operations_2_#t~ret431#1.base, ldv_initialize_ata_port_operations_2_#t~ret431#1.offset := ldv_zalloc(32); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,720 INFO L290 TraceCheckUtils]: 76: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,721 INFO L290 TraceCheckUtils]: 77: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,721 INFO L290 TraceCheckUtils]: 78: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,721 INFO L284 TraceCheckUtils]: 79: Hoare quadruple {6755#true} {6755#true} #2039#return; {6755#true} is VALID [2022-02-20 21:58:35,721 INFO L290 TraceCheckUtils]: 80: Hoare triple {6755#true} ldv_initialize_ata_port_operations_2_~tmp___1~8#1.base, ldv_initialize_ata_port_operations_2_~tmp___1~8#1.offset := ldv_initialize_ata_port_operations_2_#t~ret431#1.base, ldv_initialize_ata_port_operations_2_#t~ret431#1.offset;havoc ldv_initialize_ata_port_operations_2_#t~ret431#1.base, ldv_initialize_ata_port_operations_2_#t~ret431#1.offset;~pdc_20621_ops_group2~0.base, ~pdc_20621_ops_group2~0.offset := ldv_initialize_ata_port_operations_2_~tmp___1~8#1.base, ldv_initialize_ata_port_operations_2_~tmp___1~8#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,721 INFO L290 TraceCheckUtils]: 81: Hoare triple {6755#true} assume { :end_inline_ldv_initialize_ata_port_operations_2 } true;~ldv_state_variable_3~0 := 1;assume { :begin_inline_ldv_initialize_scsi_host_template_3 } true;havoc ldv_initialize_scsi_host_template_3_#t~ret432#1.base, ldv_initialize_scsi_host_template_3_#t~ret432#1.offset, ldv_initialize_scsi_host_template_3_~tmp~34#1.base, ldv_initialize_scsi_host_template_3_~tmp~34#1.offset;havoc ldv_initialize_scsi_host_template_3_~tmp~34#1.base, ldv_initialize_scsi_host_template_3_~tmp~34#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,722 INFO L272 TraceCheckUtils]: 82: Hoare triple {6755#true} call ldv_initialize_scsi_host_template_3_#t~ret432#1.base, ldv_initialize_scsi_host_template_3_#t~ret432#1.offset := ldv_zalloc(3488); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,722 INFO L290 TraceCheckUtils]: 83: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,722 INFO L290 TraceCheckUtils]: 84: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,722 INFO L290 TraceCheckUtils]: 85: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,722 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {6755#true} {6755#true} #2041#return; {6755#true} is VALID [2022-02-20 21:58:35,723 INFO L290 TraceCheckUtils]: 87: Hoare triple {6755#true} ldv_initialize_scsi_host_template_3_~tmp~34#1.base, ldv_initialize_scsi_host_template_3_~tmp~34#1.offset := ldv_initialize_scsi_host_template_3_#t~ret432#1.base, ldv_initialize_scsi_host_template_3_#t~ret432#1.offset;havoc ldv_initialize_scsi_host_template_3_#t~ret432#1.base, ldv_initialize_scsi_host_template_3_#t~ret432#1.offset;~pdc_sata_sht_group0~0.base, ~pdc_sata_sht_group0~0.offset := ldv_initialize_scsi_host_template_3_~tmp~34#1.base, ldv_initialize_scsi_host_template_3_~tmp~34#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,723 INFO L290 TraceCheckUtils]: 88: Hoare triple {6755#true} assume { :end_inline_ldv_initialize_scsi_host_template_3 } true;~ldv_state_variable_1~0 := 1;assume { :begin_inline_ldv_initialize_pci_driver_1 } true;havoc ldv_initialize_pci_driver_1_#t~ret433#1.base, ldv_initialize_pci_driver_1_#t~ret433#1.offset, ldv_initialize_pci_driver_1_~tmp~35#1.base, ldv_initialize_pci_driver_1_~tmp~35#1.offset;havoc ldv_initialize_pci_driver_1_~tmp~35#1.base, ldv_initialize_pci_driver_1_~tmp~35#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,723 INFO L272 TraceCheckUtils]: 89: Hoare triple {6755#true} call ldv_initialize_pci_driver_1_#t~ret433#1.base, ldv_initialize_pci_driver_1_#t~ret433#1.offset := ldv_zalloc(2976); {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,724 INFO L290 TraceCheckUtils]: 90: Hoare triple {6930#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~1#1.base, ~tmp~1#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet19#1 && #t~nondet19#1 <= 2147483647;~tmp___0~1#1 := #t~nondet19#1;havoc #t~nondet19#1; {6755#true} is VALID [2022-02-20 21:58:35,724 INFO L290 TraceCheckUtils]: 91: Hoare triple {6755#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,724 INFO L290 TraceCheckUtils]: 92: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,724 INFO L284 TraceCheckUtils]: 93: Hoare quadruple {6755#true} {6755#true} #2043#return; {6755#true} is VALID [2022-02-20 21:58:35,724 INFO L290 TraceCheckUtils]: 94: Hoare triple {6755#true} ldv_initialize_pci_driver_1_~tmp~35#1.base, ldv_initialize_pci_driver_1_~tmp~35#1.offset := ldv_initialize_pci_driver_1_#t~ret433#1.base, ldv_initialize_pci_driver_1_#t~ret433#1.offset;havoc ldv_initialize_pci_driver_1_#t~ret433#1.base, ldv_initialize_pci_driver_1_#t~ret433#1.offset;~pdc_sata_pci_driver_group0~0.base, ~pdc_sata_pci_driver_group0~0.offset := ldv_initialize_pci_driver_1_~tmp~35#1.base, ldv_initialize_pci_driver_1_~tmp~35#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,724 INFO L290 TraceCheckUtils]: 95: Hoare triple {6755#true} assume { :end_inline_ldv_initialize_pci_driver_1 } true; {6755#true} is VALID [2022-02-20 21:58:35,724 INFO L290 TraceCheckUtils]: 96: Hoare triple {6755#true} assume !(0 != ~ldv_retval_1~0); {6755#true} is VALID [2022-02-20 21:58:35,725 INFO L290 TraceCheckUtils]: 97: Hoare triple {6755#true} assume -2147483648 <= main_#t~nondet445#1 && main_#t~nondet445#1 <= 2147483647;main_~tmp___9~1#1 := main_#t~nondet445#1;havoc main_#t~nondet445#1;main_#t~switch446#1 := 0 == main_~tmp___9~1#1; {6755#true} is VALID [2022-02-20 21:58:35,725 INFO L290 TraceCheckUtils]: 98: Hoare triple {6755#true} assume main_#t~switch446#1; {6755#true} is VALID [2022-02-20 21:58:35,725 INFO L290 TraceCheckUtils]: 99: Hoare triple {6755#true} assume 0 != ~ldv_state_variable_1~0;assume -2147483648 <= main_#t~nondet447#1 && main_#t~nondet447#1 <= 2147483647;main_~tmp___10~1#1 := main_#t~nondet447#1;havoc main_#t~nondet447#1;main_#t~switch448#1 := 0 == main_~tmp___10~1#1; {6755#true} is VALID [2022-02-20 21:58:35,725 INFO L290 TraceCheckUtils]: 100: Hoare triple {6755#true} assume main_#t~switch448#1; {6755#true} is VALID [2022-02-20 21:58:35,725 INFO L290 TraceCheckUtils]: 101: Hoare triple {6755#true} assume 1 == ~ldv_state_variable_1~0;assume { :begin_inline_pdc_sata_init_one } true;pdc_sata_init_one_#in~pdev#1.base, pdc_sata_init_one_#in~pdev#1.offset, pdc_sata_init_one_#in~ent#1.base, pdc_sata_init_one_#in~ent#1.offset := ~pdc_sata_pci_driver_group0~0.base, ~pdc_sata_pci_driver_group0~0.offset, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc pdc_sata_init_one_#res#1;havoc pdc_sata_init_one_#t~mem414#1, pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset, pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset, pdc_sata_init_one_#t~ret417#1, pdc_sata_init_one_#t~ret418#1, pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset, pdc_sata_init_one_#t~mem420#1.base, pdc_sata_init_one_#t~mem420#1.offset, pdc_sata_init_one_#t~mem421#1.base, pdc_sata_init_one_#t~mem421#1.offset, pdc_sata_init_one_#t~mem422#1.base, pdc_sata_init_one_#t~mem422#1.offset, pdc_sata_init_one_#t~ret423#1, pdc_sata_init_one_#t~ret424#1, pdc_sata_init_one_#t~ret425#1, pdc_sata_init_one_#t~mem426#1, pdc_sata_init_one_#t~ret427#1, pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, pdc_sata_init_one_~ent#1.base, pdc_sata_init_one_~ent#1.offset, pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset, pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset, pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset, pdc_sata_init_one_~i~7#1, pdc_sata_init_one_~rc~0#1, pdc_sata_init_one_~__print_once~0#1, pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset, pdc_sata_init_one_~ap~8#1.base, pdc_sata_init_one_~ap~8#1.offset, pdc_sata_init_one_~base~0#1.base, pdc_sata_init_one_~base~0#1.offset, pdc_sata_init_one_~offset~0#1, pdc_sata_init_one_~tmp___0~15#1, pdc_sata_init_one_~tmp___1~7#1;pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset := pdc_sata_init_one_#in~pdev#1.base, pdc_sata_init_one_#in~pdev#1.offset;pdc_sata_init_one_~ent#1.base, pdc_sata_init_one_~ent#1.offset := pdc_sata_init_one_#in~ent#1.base, pdc_sata_init_one_#in~ent#1.offset;call pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset := #Ultimate.allocOnStack(16);havoc pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset;havoc pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset;havoc pdc_sata_init_one_~i~7#1;havoc pdc_sata_init_one_~rc~0#1;havoc pdc_sata_init_one_~__print_once~0#1;havoc pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset;havoc pdc_sata_init_one_~ap~8#1.base, pdc_sata_init_one_~ap~8#1.offset;havoc pdc_sata_init_one_~base~0#1.base, pdc_sata_init_one_~base~0#1.offset;havoc pdc_sata_init_one_~offset~0#1;havoc pdc_sata_init_one_~tmp___0~15#1;havoc pdc_sata_init_one_~tmp___1~7#1;call pdc_sata_init_one_#t~mem414#1 := read~int(pdc_sata_init_one_~ent#1.base, 24 + pdc_sata_init_one_~ent#1.offset, 8);call write~$Pointer$(~#pdc_port_info~0.base, ~#pdc_port_info~0.offset + 56 * (if pdc_sata_init_one_#t~mem414#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then pdc_sata_init_one_#t~mem414#1 % 18446744073709551616 % 18446744073709551616 else pdc_sata_init_one_#t~mem414#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset, 8);havoc pdc_sata_init_one_#t~mem414#1;call write~$Pointer$(0, 0, pdc_sata_init_one_~#ppi~0#1.base, 8 + pdc_sata_init_one_~#ppi~0#1.offset, 8); {6755#true} is VALID [2022-02-20 21:58:35,725 INFO L290 TraceCheckUtils]: 102: Hoare triple {6755#true} assume !(0 == pdc_sata_init_one_~__print_once~0#1 % 256); {6755#true} is VALID [2022-02-20 21:58:35,726 INFO L290 TraceCheckUtils]: 103: Hoare triple {6755#true} assume { :begin_inline_ata_host_alloc_pinfo } true;ata_host_alloc_pinfo_#in~arg0#1.base, ata_host_alloc_pinfo_#in~arg0#1.offset, ata_host_alloc_pinfo_#in~arg1#1.base, ata_host_alloc_pinfo_#in~arg1#1.offset, ata_host_alloc_pinfo_#in~arg2#1 := pdc_sata_init_one_~pdev#1.base, 147 + pdc_sata_init_one_~pdev#1.offset, pdc_sata_init_one_~#ppi~0#1.base, pdc_sata_init_one_~#ppi~0#1.offset, 4;havoc ata_host_alloc_pinfo_#res#1.base, ata_host_alloc_pinfo_#res#1.offset;havoc ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset, ata_host_alloc_pinfo_~arg0#1.base, ata_host_alloc_pinfo_~arg0#1.offset, ata_host_alloc_pinfo_~arg1#1.base, ata_host_alloc_pinfo_~arg1#1.offset, ata_host_alloc_pinfo_~arg2#1;ata_host_alloc_pinfo_~arg0#1.base, ata_host_alloc_pinfo_~arg0#1.offset := ata_host_alloc_pinfo_#in~arg0#1.base, ata_host_alloc_pinfo_#in~arg0#1.offset;ata_host_alloc_pinfo_~arg1#1.base, ata_host_alloc_pinfo_~arg1#1.offset := ata_host_alloc_pinfo_#in~arg1#1.base, ata_host_alloc_pinfo_#in~arg1#1.offset;ata_host_alloc_pinfo_~arg2#1 := ata_host_alloc_pinfo_#in~arg2#1; {6755#true} is VALID [2022-02-20 21:58:35,726 INFO L272 TraceCheckUtils]: 104: Hoare triple {6755#true} call ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset := ldv_malloc(284); {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,726 INFO L290 TraceCheckUtils]: 105: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,726 INFO L290 TraceCheckUtils]: 106: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,727 INFO L290 TraceCheckUtils]: 107: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,727 INFO L284 TraceCheckUtils]: 108: Hoare quadruple {6755#true} {6755#true} #1927#return; {6755#true} is VALID [2022-02-20 21:58:35,727 INFO L290 TraceCheckUtils]: 109: Hoare triple {6755#true} ata_host_alloc_pinfo_#res#1.base, ata_host_alloc_pinfo_#res#1.offset := ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset;havoc ata_host_alloc_pinfo_#t~ret470#1.base, ata_host_alloc_pinfo_#t~ret470#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,727 INFO L290 TraceCheckUtils]: 110: Hoare triple {6755#true} pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset := ata_host_alloc_pinfo_#res#1.base, ata_host_alloc_pinfo_#res#1.offset;assume { :end_inline_ata_host_alloc_pinfo } true;pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset := pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset;havoc pdc_sata_init_one_#t~ret415#1.base, pdc_sata_init_one_#t~ret415#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,728 INFO L272 TraceCheckUtils]: 111: Hoare triple {6755#true} call pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset := devm_kzalloc(pdc_sata_init_one_~pdev#1.base, 147 + pdc_sata_init_one_~pdev#1.offset, 784, 208); {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,728 INFO L290 TraceCheckUtils]: 112: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~size#1 := #in~size#1;~gfp#1 := #in~gfp#1;havoc ~tmp~4#1.base, ~tmp~4#1.offset;assume { :begin_inline_devm_kmalloc } true;devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset, devm_kmalloc_#in~arg1#1, devm_kmalloc_#in~arg2#1 := ~dev#1.base, ~dev#1.offset, ~size#1, ~bitwiseOr(~gfp#1, 32768);havoc devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset, devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset, devm_kmalloc_~arg1#1, devm_kmalloc_~arg2#1;devm_kmalloc_~arg0#1.base, devm_kmalloc_~arg0#1.offset := devm_kmalloc_#in~arg0#1.base, devm_kmalloc_#in~arg0#1.offset;devm_kmalloc_~arg1#1 := devm_kmalloc_#in~arg1#1;devm_kmalloc_~arg2#1 := devm_kmalloc_#in~arg2#1; {6755#true} is VALID [2022-02-20 21:58:35,729 INFO L272 TraceCheckUtils]: 113: Hoare triple {6755#true} call devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset := ldv_malloc(0); {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,729 INFO L290 TraceCheckUtils]: 114: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,729 INFO L290 TraceCheckUtils]: 115: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,729 INFO L290 TraceCheckUtils]: 116: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,729 INFO L284 TraceCheckUtils]: 117: Hoare quadruple {6755#true} {6755#true} #1885#return; {6755#true} is VALID [2022-02-20 21:58:35,729 INFO L290 TraceCheckUtils]: 118: Hoare triple {6755#true} devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset := devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset;havoc devm_kmalloc_#t~ret477#1.base, devm_kmalloc_#t~ret477#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,729 INFO L290 TraceCheckUtils]: 119: Hoare triple {6755#true} #t~ret26#1.base, #t~ret26#1.offset := devm_kmalloc_#res#1.base, devm_kmalloc_#res#1.offset;assume { :end_inline_devm_kmalloc } true;~tmp~4#1.base, ~tmp~4#1.offset := #t~ret26#1.base, #t~ret26#1.offset;havoc #t~ret26#1.base, #t~ret26#1.offset;#res#1.base, #res#1.offset := ~tmp~4#1.base, ~tmp~4#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L290 TraceCheckUtils]: 120: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L284 TraceCheckUtils]: 121: Hoare quadruple {6755#true} {6755#true} #1929#return; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L290 TraceCheckUtils]: 122: Hoare triple {6755#true} pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset := pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset;havoc pdc_sata_init_one_#t~ret416#1.base, pdc_sata_init_one_#t~ret416#1.offset;pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset := pdc_sata_init_one_~tmp~31#1.base, pdc_sata_init_one_~tmp~31#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L290 TraceCheckUtils]: 123: Hoare triple {6755#true} assume !(0 == (pdc_sata_init_one_~host~3#1.base + pdc_sata_init_one_~host~3#1.offset) % 18446744073709551616 || 0 == (pdc_sata_init_one_~hpriv~0#1.base + pdc_sata_init_one_~hpriv~0#1.offset) % 18446744073709551616);call write~$Pointer$(pdc_sata_init_one_~hpriv~0#1.base, pdc_sata_init_one_~hpriv~0#1.offset, pdc_sata_init_one_~host~3#1.base, 88 + pdc_sata_init_one_~host~3#1.offset, 8);assume { :begin_inline_pcim_enable_device } true;pcim_enable_device_#in~arg0#1.base, pcim_enable_device_#in~arg0#1.offset := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset;havoc pcim_enable_device_#res#1;havoc pcim_enable_device_#t~nondet484#1, pcim_enable_device_~arg0#1.base, pcim_enable_device_~arg0#1.offset;pcim_enable_device_~arg0#1.base, pcim_enable_device_~arg0#1.offset := pcim_enable_device_#in~arg0#1.base, pcim_enable_device_#in~arg0#1.offset;assume -2147483648 <= pcim_enable_device_#t~nondet484#1 && pcim_enable_device_#t~nondet484#1 <= 2147483647;pcim_enable_device_#res#1 := pcim_enable_device_#t~nondet484#1;havoc pcim_enable_device_#t~nondet484#1; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L290 TraceCheckUtils]: 124: Hoare triple {6755#true} pdc_sata_init_one_#t~ret417#1 := pcim_enable_device_#res#1;assume { :end_inline_pcim_enable_device } true;assume -2147483648 <= pdc_sata_init_one_#t~ret417#1 && pdc_sata_init_one_#t~ret417#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret417#1;havoc pdc_sata_init_one_#t~ret417#1; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L290 TraceCheckUtils]: 125: Hoare triple {6755#true} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pcim_iomap_regions } true;pcim_iomap_regions_#in~arg0#1.base, pcim_iomap_regions_#in~arg0#1.offset, pcim_iomap_regions_#in~arg1#1, pcim_iomap_regions_#in~arg2#1.base, pcim_iomap_regions_#in~arg2#1.offset := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, 24, 13, 0;havoc pcim_iomap_regions_#res#1;havoc pcim_iomap_regions_#t~nondet485#1, pcim_iomap_regions_~arg0#1.base, pcim_iomap_regions_~arg0#1.offset, pcim_iomap_regions_~arg1#1, pcim_iomap_regions_~arg2#1.base, pcim_iomap_regions_~arg2#1.offset;pcim_iomap_regions_~arg0#1.base, pcim_iomap_regions_~arg0#1.offset := pcim_iomap_regions_#in~arg0#1.base, pcim_iomap_regions_#in~arg0#1.offset;pcim_iomap_regions_~arg1#1 := pcim_iomap_regions_#in~arg1#1;pcim_iomap_regions_~arg2#1.base, pcim_iomap_regions_~arg2#1.offset := pcim_iomap_regions_#in~arg2#1.base, pcim_iomap_regions_#in~arg2#1.offset;assume -2147483648 <= pcim_iomap_regions_#t~nondet485#1 && pcim_iomap_regions_#t~nondet485#1 <= 2147483647;pcim_iomap_regions_#res#1 := pcim_iomap_regions_#t~nondet485#1;havoc pcim_iomap_regions_#t~nondet485#1; {6755#true} is VALID [2022-02-20 21:58:35,730 INFO L290 TraceCheckUtils]: 126: Hoare triple {6755#true} pdc_sata_init_one_#t~ret418#1 := pcim_iomap_regions_#res#1;assume { :end_inline_pcim_iomap_regions } true;assume -2147483648 <= pdc_sata_init_one_#t~ret418#1 && pdc_sata_init_one_#t~ret418#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret418#1;havoc pdc_sata_init_one_#t~ret418#1; {6755#true} is VALID [2022-02-20 21:58:35,731 INFO L290 TraceCheckUtils]: 127: Hoare triple {6755#true} assume !(-16 == pdc_sata_init_one_~rc~0#1); {6755#true} is VALID [2022-02-20 21:58:35,731 INFO L290 TraceCheckUtils]: 128: Hoare triple {6755#true} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pcim_iomap_table } true;pcim_iomap_table_#in~arg0#1.base, pcim_iomap_table_#in~arg0#1.offset := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset;havoc pcim_iomap_table_#res#1.base, pcim_iomap_table_#res#1.offset;havoc pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset, pcim_iomap_table_~arg0#1.base, pcim_iomap_table_~arg0#1.offset;pcim_iomap_table_~arg0#1.base, pcim_iomap_table_~arg0#1.offset := pcim_iomap_table_#in~arg0#1.base, pcim_iomap_table_#in~arg0#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,731 INFO L272 TraceCheckUtils]: 129: Hoare triple {6755#true} call pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset := ldv_malloc(8); {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 21:58:35,732 INFO L290 TraceCheckUtils]: 130: Hoare triple {6931#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~0.base, ~tmp~0.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet17 && #t~nondet17 <= 2147483647;~tmp___0~0 := #t~nondet17;havoc #t~nondet17; {6755#true} is VALID [2022-02-20 21:58:35,732 INFO L290 TraceCheckUtils]: 131: Hoare triple {6755#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {6755#true} is VALID [2022-02-20 21:58:35,732 INFO L290 TraceCheckUtils]: 132: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,732 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {6755#true} {6755#true} #1931#return; {6755#true} is VALID [2022-02-20 21:58:35,732 INFO L290 TraceCheckUtils]: 134: Hoare triple {6755#true} pcim_iomap_table_#res#1.base, pcim_iomap_table_#res#1.offset := pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset;havoc pcim_iomap_table_#t~ret486#1.base, pcim_iomap_table_#t~ret486#1.offset; {6755#true} is VALID [2022-02-20 21:58:35,733 INFO L290 TraceCheckUtils]: 135: Hoare triple {6755#true} pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset := pcim_iomap_table_#res#1.base, pcim_iomap_table_#res#1.offset;assume { :end_inline_pcim_iomap_table } true;call write~$Pointer$(pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset, pdc_sata_init_one_~host~3#1.base, 76 + pdc_sata_init_one_~host~3#1.offset, 8);havoc pdc_sata_init_one_#t~ret419#1.base, pdc_sata_init_one_#t~ret419#1.offset;pdc_sata_init_one_~i~7#1 := 0; {6827#(= |ULTIMATE.start_pdc_sata_init_one_~i~7#1| 0)} is VALID [2022-02-20 21:58:35,733 INFO L290 TraceCheckUtils]: 136: Hoare triple {6827#(= |ULTIMATE.start_pdc_sata_init_one_~i~7#1| 0)} assume !(pdc_sata_init_one_~i~7#1 <= 3);assume { :begin_inline_pci_set_dma_mask } true;pci_set_dma_mask_#in~dev#1.base, pci_set_dma_mask_#in~dev#1.offset, pci_set_dma_mask_#in~mask#1 := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, 4294967295;havoc pci_set_dma_mask_#res#1;havoc pci_set_dma_mask_#t~ret44#1, pci_set_dma_mask_~dev#1.base, pci_set_dma_mask_~dev#1.offset, pci_set_dma_mask_~mask#1, pci_set_dma_mask_~tmp~6#1;pci_set_dma_mask_~dev#1.base, pci_set_dma_mask_~dev#1.offset := pci_set_dma_mask_#in~dev#1.base, pci_set_dma_mask_#in~dev#1.offset;pci_set_dma_mask_~mask#1 := pci_set_dma_mask_#in~mask#1;havoc pci_set_dma_mask_~tmp~6#1;assume { :begin_inline_dma_set_mask } true;dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset, dma_set_mask_#in~arg1#1 := pci_set_dma_mask_~dev#1.base, 147 + pci_set_dma_mask_~dev#1.offset, pci_set_dma_mask_~mask#1;havoc dma_set_mask_#res#1;havoc dma_set_mask_#t~nondet478#1, dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset, dma_set_mask_~arg1#1;dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset := dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset;dma_set_mask_~arg1#1 := dma_set_mask_#in~arg1#1;assume -2147483648 <= dma_set_mask_#t~nondet478#1 && dma_set_mask_#t~nondet478#1 <= 2147483647;dma_set_mask_#res#1 := dma_set_mask_#t~nondet478#1;havoc dma_set_mask_#t~nondet478#1; {6756#false} is VALID [2022-02-20 21:58:35,734 INFO L290 TraceCheckUtils]: 137: Hoare triple {6756#false} pci_set_dma_mask_#t~ret44#1 := dma_set_mask_#res#1;assume { :end_inline_dma_set_mask } true;assume -2147483648 <= pci_set_dma_mask_#t~ret44#1 && pci_set_dma_mask_#t~ret44#1 <= 2147483647;pci_set_dma_mask_~tmp~6#1 := pci_set_dma_mask_#t~ret44#1;havoc pci_set_dma_mask_#t~ret44#1;pci_set_dma_mask_#res#1 := pci_set_dma_mask_~tmp~6#1; {6756#false} is VALID [2022-02-20 21:58:35,734 INFO L290 TraceCheckUtils]: 138: Hoare triple {6756#false} pdc_sata_init_one_#t~ret423#1 := pci_set_dma_mask_#res#1;assume { :end_inline_pci_set_dma_mask } true;assume -2147483648 <= pdc_sata_init_one_#t~ret423#1 && pdc_sata_init_one_#t~ret423#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret423#1;havoc pdc_sata_init_one_#t~ret423#1; {6756#false} is VALID [2022-02-20 21:58:35,734 INFO L290 TraceCheckUtils]: 139: Hoare triple {6756#false} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pci_set_consistent_dma_mask } true;pci_set_consistent_dma_mask_#in~dev#1.base, pci_set_consistent_dma_mask_#in~dev#1.offset, pci_set_consistent_dma_mask_#in~mask#1 := pdc_sata_init_one_~pdev#1.base, pdc_sata_init_one_~pdev#1.offset, 4294967295;havoc pci_set_consistent_dma_mask_#res#1;havoc pci_set_consistent_dma_mask_#t~ret45#1, pci_set_consistent_dma_mask_~dev#1.base, pci_set_consistent_dma_mask_~dev#1.offset, pci_set_consistent_dma_mask_~mask#1, pci_set_consistent_dma_mask_~tmp~7#1;pci_set_consistent_dma_mask_~dev#1.base, pci_set_consistent_dma_mask_~dev#1.offset := pci_set_consistent_dma_mask_#in~dev#1.base, pci_set_consistent_dma_mask_#in~dev#1.offset;pci_set_consistent_dma_mask_~mask#1 := pci_set_consistent_dma_mask_#in~mask#1;havoc pci_set_consistent_dma_mask_~tmp~7#1;assume { :begin_inline_dma_set_coherent_mask } true;dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset, dma_set_coherent_mask_#in~mask#1 := pci_set_consistent_dma_mask_~dev#1.base, 147 + pci_set_consistent_dma_mask_~dev#1.offset, pci_set_consistent_dma_mask_~mask#1;havoc dma_set_coherent_mask_#res#1;havoc dma_set_coherent_mask_#t~ret39#1, dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1, dma_set_coherent_mask_~tmp~5#1;dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset := dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset;dma_set_coherent_mask_~mask#1 := dma_set_coherent_mask_#in~mask#1;havoc dma_set_coherent_mask_~tmp~5#1;assume { :begin_inline_dma_supported } true;dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset, dma_supported_#in~arg1#1 := dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1;havoc dma_supported_#res#1;havoc dma_supported_#t~nondet479#1, dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset, dma_supported_~arg1#1;dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset := dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset;dma_supported_~arg1#1 := dma_supported_#in~arg1#1;assume -2147483648 <= dma_supported_#t~nondet479#1 && dma_supported_#t~nondet479#1 <= 2147483647;dma_supported_#res#1 := dma_supported_#t~nondet479#1;havoc dma_supported_#t~nondet479#1; {6756#false} is VALID [2022-02-20 21:58:35,741 INFO L290 TraceCheckUtils]: 140: Hoare triple {6756#false} dma_set_coherent_mask_#t~ret39#1 := dma_supported_#res#1;assume { :end_inline_dma_supported } true;assume -2147483648 <= dma_set_coherent_mask_#t~ret39#1 && dma_set_coherent_mask_#t~ret39#1 <= 2147483647;dma_set_coherent_mask_~tmp~5#1 := dma_set_coherent_mask_#t~ret39#1;havoc dma_set_coherent_mask_#t~ret39#1; {6756#false} is VALID [2022-02-20 21:58:35,742 INFO L290 TraceCheckUtils]: 141: Hoare triple {6756#false} assume 0 == dma_set_coherent_mask_~tmp~5#1;dma_set_coherent_mask_#res#1 := -5; {6756#false} is VALID [2022-02-20 21:58:35,742 INFO L290 TraceCheckUtils]: 142: Hoare triple {6756#false} pci_set_consistent_dma_mask_#t~ret45#1 := dma_set_coherent_mask_#res#1;assume { :end_inline_dma_set_coherent_mask } true;assume -2147483648 <= pci_set_consistent_dma_mask_#t~ret45#1 && pci_set_consistent_dma_mask_#t~ret45#1 <= 2147483647;pci_set_consistent_dma_mask_~tmp~7#1 := pci_set_consistent_dma_mask_#t~ret45#1;havoc pci_set_consistent_dma_mask_#t~ret45#1;pci_set_consistent_dma_mask_#res#1 := pci_set_consistent_dma_mask_~tmp~7#1; {6756#false} is VALID [2022-02-20 21:58:35,742 INFO L290 TraceCheckUtils]: 143: Hoare triple {6756#false} pdc_sata_init_one_#t~ret424#1 := pci_set_consistent_dma_mask_#res#1;assume { :end_inline_pci_set_consistent_dma_mask } true;assume -2147483648 <= pdc_sata_init_one_#t~ret424#1 && pdc_sata_init_one_#t~ret424#1 <= 2147483647;pdc_sata_init_one_~rc~0#1 := pdc_sata_init_one_#t~ret424#1;havoc pdc_sata_init_one_#t~ret424#1; {6756#false} is VALID [2022-02-20 21:58:35,742 INFO L290 TraceCheckUtils]: 144: Hoare triple {6756#false} assume !(0 != pdc_sata_init_one_~rc~0#1);assume { :begin_inline_pdc20621_dimm_init } true;pdc20621_dimm_init_#in~host#1.base, pdc20621_dimm_init_#in~host#1.offset := pdc_sata_init_one_~host~3#1.base, pdc_sata_init_one_~host~3#1.offset;havoc pdc20621_dimm_init_#res#1;havoc pdc20621_dimm_init_#t~mem388#1.base, pdc20621_dimm_init_#t~mem388#1.offset, pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset, pdc20621_dimm_init_#t~ret390#1, pdc20621_dimm_init_#t~ret391#1, pdc20621_dimm_init_#t~ret392#1, pdc20621_dimm_init_#t~nondet393#1, pdc20621_dimm_init_#t~ret394#1, pdc20621_dimm_init_#t~ret395#1, pdc20621_dimm_init_#t~nondet396#1, pdc20621_dimm_init_#t~ret397#1, pdc20621_dimm_init_#t~ret398#1, pdc20621_dimm_init_#t~nondet399#1, pdc20621_dimm_init_#t~ret400#1, pdc20621_dimm_init_#t~mem401#1, pdc20621_dimm_init_#t~ret402#1.base, pdc20621_dimm_init_#t~ret402#1.offset, pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset, pdc20621_dimm_init_~speed~0#1, pdc20621_dimm_init_~size~1#1, pdc20621_dimm_init_~length~0#1, pdc20621_dimm_init_~addr~2#1, pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset, pdc20621_dimm_init_~pci_status~0#1, pdc20621_dimm_init_~time_period~0#1, pdc20621_dimm_init_~tcount~0#1, pdc20621_dimm_init_~ticks~0#1, pdc20621_dimm_init_~clock~0#1, pdc20621_dimm_init_~fparam~0#1, pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset, pdc20621_dimm_init_~tmp~29#1, pdc20621_dimm_init_~buf~1#1.base, pdc20621_dimm_init_~buf~1#1.offset;pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset := pdc20621_dimm_init_#in~host#1.base, pdc20621_dimm_init_#in~host#1.offset;havoc pdc20621_dimm_init_~speed~0#1;havoc pdc20621_dimm_init_~size~1#1;havoc pdc20621_dimm_init_~length~0#1;havoc pdc20621_dimm_init_~addr~2#1;call pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset := #Ultimate.allocOnStack(4);havoc pdc20621_dimm_init_~pci_status~0#1;havoc pdc20621_dimm_init_~time_period~0#1;havoc pdc20621_dimm_init_~tcount~0#1;havoc pdc20621_dimm_init_~ticks~0#1;havoc pdc20621_dimm_init_~clock~0#1;havoc pdc20621_dimm_init_~fparam~0#1;havoc pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset;havoc pdc20621_dimm_init_~tmp~29#1;havoc pdc20621_dimm_init_~buf~1#1.base, pdc20621_dimm_init_~buf~1#1.offset;pdc20621_dimm_init_~time_period~0#1 := 0;pdc20621_dimm_init_~tcount~0#1 := 0;pdc20621_dimm_init_~ticks~0#1 := 0;pdc20621_dimm_init_~clock~0#1 := 0;pdc20621_dimm_init_~fparam~0#1 := 0;call pdc20621_dimm_init_#t~mem388#1.base, pdc20621_dimm_init_#t~mem388#1.offset := read~$Pointer$(pdc20621_dimm_init_~host#1.base, 76 + pdc20621_dimm_init_~host#1.offset, 8);call pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset := read~$Pointer$(pdc20621_dimm_init_#t~mem388#1.base, 24 + pdc20621_dimm_init_#t~mem388#1.offset, 8);pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset := pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset;havoc pdc20621_dimm_init_#t~mem388#1.base, pdc20621_dimm_init_#t~mem388#1.offset;havoc pdc20621_dimm_init_#t~mem389#1.base, pdc20621_dimm_init_#t~mem389#1.offset;pdc20621_dimm_init_~mmio~11#1.base, pdc20621_dimm_init_~mmio~11#1.offset := pdc20621_dimm_init_~mmio~11#1.base, 786432 + pdc20621_dimm_init_~mmio~11#1.offset; {6756#false} is VALID [2022-02-20 21:58:35,742 INFO L272 TraceCheckUtils]: 145: Hoare triple {6756#false} call writel(4294967295, pdc20621_dimm_init_~mmio~11#1.base, 64 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,742 INFO L290 TraceCheckUtils]: 146: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,743 INFO L290 TraceCheckUtils]: 147: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,743 INFO L284 TraceCheckUtils]: 148: Hoare quadruple {6755#true} {6756#false} #1939#return; {6756#false} is VALID [2022-02-20 21:58:35,743 INFO L272 TraceCheckUtils]: 149: Hoare triple {6756#false} call pdc20621_dimm_init_#t~ret390#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 64 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,743 INFO L290 TraceCheckUtils]: 150: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,743 INFO L290 TraceCheckUtils]: 151: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,743 INFO L284 TraceCheckUtils]: 152: Hoare quadruple {6755#true} {6756#false} #1941#return; {6756#false} is VALID [2022-02-20 21:58:35,743 INFO L290 TraceCheckUtils]: 153: Hoare triple {6756#false} pdc20621_dimm_init_~time_period~0#1 := pdc20621_dimm_init_#t~ret390#1;havoc pdc20621_dimm_init_#t~ret390#1; {6756#false} is VALID [2022-02-20 21:58:35,744 INFO L272 TraceCheckUtils]: 154: Hoare triple {6756#false} call writel(416, pdc20621_dimm_init_~mmio~11#1.base, 60 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,744 INFO L290 TraceCheckUtils]: 155: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,744 INFO L290 TraceCheckUtils]: 156: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,744 INFO L284 TraceCheckUtils]: 157: Hoare quadruple {6755#true} {6756#false} #1943#return; {6756#false} is VALID [2022-02-20 21:58:35,744 INFO L272 TraceCheckUtils]: 158: Hoare triple {6756#false} call pdc20621_dimm_init_#t~ret391#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 60 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,744 INFO L290 TraceCheckUtils]: 159: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,744 INFO L290 TraceCheckUtils]: 160: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,745 INFO L284 TraceCheckUtils]: 161: Hoare quadruple {6755#true} {6756#false} #1945#return; {6756#false} is VALID [2022-02-20 21:58:35,745 INFO L290 TraceCheckUtils]: 162: Hoare triple {6756#false} havoc pdc20621_dimm_init_#t~ret391#1; {6756#false} is VALID [2022-02-20 21:58:35,745 INFO L272 TraceCheckUtils]: 163: Hoare triple {6756#false} call msleep(3000); {6755#true} is VALID [2022-02-20 21:58:35,745 INFO L290 TraceCheckUtils]: 164: Hoare triple {6755#true} ~arg0 := #in~arg0; {6755#true} is VALID [2022-02-20 21:58:35,745 INFO L290 TraceCheckUtils]: 165: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,745 INFO L284 TraceCheckUtils]: 166: Hoare quadruple {6755#true} {6756#false} #1947#return; {6756#false} is VALID [2022-02-20 21:58:35,745 INFO L272 TraceCheckUtils]: 167: Hoare triple {6756#false} call pdc20621_dimm_init_#t~ret392#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 68 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,746 INFO L290 TraceCheckUtils]: 168: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,746 INFO L290 TraceCheckUtils]: 169: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,746 INFO L284 TraceCheckUtils]: 170: Hoare quadruple {6755#true} {6756#false} #1949#return; {6756#false} is VALID [2022-02-20 21:58:35,746 INFO L290 TraceCheckUtils]: 171: Hoare triple {6756#false} pdc20621_dimm_init_~tcount~0#1 := pdc20621_dimm_init_#t~ret392#1;havoc pdc20621_dimm_init_#t~ret392#1; {6756#false} is VALID [2022-02-20 21:58:35,746 INFO L290 TraceCheckUtils]: 172: Hoare triple {6756#false} assume !(pdc20621_dimm_init_~tcount~0#1 % 4294967296 > 3994967294);pdc20621_dimm_init_~pci_status~0#1 := 2320701476; {6756#false} is VALID [2022-02-20 21:58:35,746 INFO L272 TraceCheckUtils]: 173: Hoare triple {6756#false} call writel(pdc20621_dimm_init_~pci_status~0#1, pdc20621_dimm_init_~mmio~11#1.base, 8 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,746 INFO L290 TraceCheckUtils]: 174: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,747 INFO L290 TraceCheckUtils]: 175: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,747 INFO L284 TraceCheckUtils]: 176: Hoare quadruple {6755#true} {6756#false} #1951#return; {6756#false} is VALID [2022-02-20 21:58:35,747 INFO L272 TraceCheckUtils]: 177: Hoare triple {6756#false} call pdc20621_dimm_init_#t~ret394#1 := readl(pdc20621_dimm_init_~mmio~11#1.base, 8 + pdc20621_dimm_init_~mmio~11#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,747 INFO L290 TraceCheckUtils]: 178: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,747 INFO L290 TraceCheckUtils]: 179: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,747 INFO L284 TraceCheckUtils]: 180: Hoare quadruple {6755#true} {6756#false} #1953#return; {6756#false} is VALID [2022-02-20 21:58:35,747 INFO L290 TraceCheckUtils]: 181: Hoare triple {6756#false} havoc pdc20621_dimm_init_#t~ret394#1;assume { :begin_inline_pdc20621_detect_dimm } true;pdc20621_detect_dimm_#in~host#1.base, pdc20621_detect_dimm_#in~host#1.offset := pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset;havoc pdc20621_detect_dimm_#res#1;havoc pdc20621_detect_dimm_#t~ret323#1, pdc20621_detect_dimm_#t~mem324#1, pdc20621_detect_dimm_#t~ret325#1, pdc20621_detect_dimm_#t~mem326#1, pdc20621_detect_dimm_~host#1.base, pdc20621_detect_dimm_~host#1.offset, pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset, pdc20621_detect_dimm_~tmp~28#1, pdc20621_detect_dimm_~tmp___0~13#1;pdc20621_detect_dimm_~host#1.base, pdc20621_detect_dimm_~host#1.offset := pdc20621_detect_dimm_#in~host#1.base, pdc20621_detect_dimm_#in~host#1.offset;call pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset := #Ultimate.allocOnStack(4);havoc pdc20621_detect_dimm_~tmp~28#1;havoc pdc20621_detect_dimm_~tmp___0~13#1;call write~int(0, pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,748 INFO L272 TraceCheckUtils]: 182: Hoare triple {6756#false} call pdc20621_detect_dimm_#t~ret323#1 := pdc20621_i2c_read(pdc20621_detect_dimm_~host#1.base, pdc20621_detect_dimm_~host#1.offset, 80, 126, pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset); {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} is VALID [2022-02-20 21:58:35,748 INFO L290 TraceCheckUtils]: 183: Hoare triple {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {6755#true} is VALID [2022-02-20 21:58:35,748 INFO L290 TraceCheckUtils]: 184: Hoare triple {6755#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,748 INFO L290 TraceCheckUtils]: 185: Hoare triple {6755#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,748 INFO L272 TraceCheckUtils]: 186: Hoare triple {6755#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,748 INFO L290 TraceCheckUtils]: 187: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L290 TraceCheckUtils]: 188: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L284 TraceCheckUtils]: 189: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L272 TraceCheckUtils]: 190: Hoare triple {6755#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L290 TraceCheckUtils]: 191: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L290 TraceCheckUtils]: 192: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L284 TraceCheckUtils]: 193: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,749 INFO L290 TraceCheckUtils]: 194: Hoare triple {6755#true} havoc #t~ret320; {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L272 TraceCheckUtils]: 195: Hoare triple {6755#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L290 TraceCheckUtils]: 196: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L290 TraceCheckUtils]: 197: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L284 TraceCheckUtils]: 198: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L290 TraceCheckUtils]: 199: Hoare triple {6755#true} ~count~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L290 TraceCheckUtils]: 200: Hoare triple {6755#true} assume !(~count~0 % 4294967296 <= 1000); {6755#true} is VALID [2022-02-20 21:58:35,750 INFO L290 TraceCheckUtils]: 201: Hoare triple {6755#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {6755#true} is VALID [2022-02-20 21:58:35,751 INFO L290 TraceCheckUtils]: 202: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,751 INFO L284 TraceCheckUtils]: 203: Hoare quadruple {6755#true} {6756#false} #1955#return; {6756#false} is VALID [2022-02-20 21:58:35,751 INFO L290 TraceCheckUtils]: 204: Hoare triple {6756#false} pdc20621_detect_dimm_~tmp~28#1 := pdc20621_detect_dimm_#t~ret323#1;havoc pdc20621_detect_dimm_#t~ret323#1; {6756#false} is VALID [2022-02-20 21:58:35,751 INFO L290 TraceCheckUtils]: 205: Hoare triple {6756#false} assume !(0 != pdc20621_detect_dimm_~tmp~28#1 % 4294967296);pdc20621_detect_dimm_#res#1 := 0;call ULTIMATE.dealloc(pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset);havoc pdc20621_detect_dimm_~#data~0#1.base, pdc20621_detect_dimm_~#data~0#1.offset; {6756#false} is VALID [2022-02-20 21:58:35,751 INFO L290 TraceCheckUtils]: 206: Hoare triple {6756#false} pdc20621_dimm_init_#t~ret395#1 := pdc20621_detect_dimm_#res#1;assume { :end_inline_pdc20621_detect_dimm } true;assume -2147483648 <= pdc20621_dimm_init_#t~ret395#1 && pdc20621_dimm_init_#t~ret395#1 <= 2147483647;pdc20621_dimm_init_~speed~0#1 := pdc20621_dimm_init_#t~ret395#1;havoc pdc20621_dimm_init_#t~ret395#1; {6756#false} is VALID [2022-02-20 21:58:35,751 INFO L290 TraceCheckUtils]: 207: Hoare triple {6756#false} assume !(0 == pdc20621_dimm_init_~speed~0#1);assume { :begin_inline_pdc20621_prog_dimm0 } true;pdc20621_prog_dimm0_#in~host#1.base, pdc20621_prog_dimm0_#in~host#1.offset := pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset;havoc pdc20621_prog_dimm0_#res#1;havoc pdc20621_prog_dimm0_#t~mem327#1.base, pdc20621_prog_dimm0_#t~mem327#1.offset, pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset, pdc20621_prog_dimm0_#t~mem329#1, pdc20621_prog_dimm0_#t~mem330#1, pdc20621_prog_dimm0_#t~ret331#1, pdc20621_prog_dimm0_#t~mem336#1, pdc20621_prog_dimm0_#t~mem337#1, pdc20621_prog_dimm0_#t~ite338#1, pdc20621_prog_dimm0_#t~mem339#1, pdc20621_prog_dimm0_#t~mem344#1, pdc20621_prog_dimm0_#t~mem345#1, pdc20621_prog_dimm0_#t~mem346#1, pdc20621_prog_dimm0_#t~mem353#1, pdc20621_prog_dimm0_#t~mem354#1, pdc20621_prog_dimm0_#t~ite357#1, pdc20621_prog_dimm0_#t~mem355#1, pdc20621_prog_dimm0_#t~mem356#1, pdc20621_prog_dimm0_#t~mem361#1, pdc20621_prog_dimm0_#t~mem362#1, pdc20621_prog_dimm0_#t~mem364#1, pdc20621_prog_dimm0_#t~nondet365#1, pdc20621_prog_dimm0_#t~mem366#1, pdc20621_prog_dimm0_#t~nondet367#1, pdc20621_prog_dimm0_#t~mem368#1, pdc20621_prog_dimm0_#t~nondet369#1, pdc20621_prog_dimm0_#t~mem370#1, pdc20621_prog_dimm0_#t~mem371#1, pdc20621_prog_dimm0_#t~mem372#1, pdc20621_prog_dimm0_#t~mem373#1, pdc20621_prog_dimm0_#t~ret376#1, pdc20621_prog_dimm0_#t~nondet340#1, pdc20621_prog_dimm0_#t~nondet347#1, pdc20621_prog_dimm0_#t~nondet358#1, pdc20621_prog_dimm0_#t~nondet363#1, pdc20621_prog_dimm0_#t~nondet374#1, pdc20621_prog_dimm0_#t~nondet375#1, pdc20621_prog_dimm0_~host#1.base, pdc20621_prog_dimm0_~host#1.offset, pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset, pdc20621_prog_dimm0_~data~1#1, pdc20621_prog_dimm0_~size~0#1, pdc20621_prog_dimm0_~i~5#1, pdc20621_prog_dimm0_~bdimmsize~0#1, pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset;pdc20621_prog_dimm0_~host#1.base, pdc20621_prog_dimm0_~host#1.offset := pdc20621_prog_dimm0_#in~host#1.base, pdc20621_prog_dimm0_#in~host#1.offset;call pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset := #Ultimate.allocOnStack(200);havoc pdc20621_prog_dimm0_~data~1#1;havoc pdc20621_prog_dimm0_~size~0#1;havoc pdc20621_prog_dimm0_~i~5#1;havoc pdc20621_prog_dimm0_~bdimmsize~0#1;havoc pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset;call pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset := #Ultimate.allocOnStack(96);pdc20621_prog_dimm0_~data~1#1 := 0;call pdc20621_prog_dimm0_#t~mem327#1.base, pdc20621_prog_dimm0_#t~mem327#1.offset := read~$Pointer$(pdc20621_prog_dimm0_~host#1.base, 76 + pdc20621_prog_dimm0_~host#1.offset, 8);call pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset := read~$Pointer$(pdc20621_prog_dimm0_#t~mem327#1.base, 24 + pdc20621_prog_dimm0_#t~mem327#1.offset, 8);pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset := pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset;havoc pdc20621_prog_dimm0_#t~mem327#1.base, pdc20621_prog_dimm0_#t~mem327#1.offset;havoc pdc20621_prog_dimm0_#t~mem328#1.base, pdc20621_prog_dimm0_#t~mem328#1.offset;call write~int(11, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(11, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 4 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(12, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 8 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(12, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 12 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(4, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 16 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(4, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 20 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(21, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 24 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(21, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 28 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(3, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 32 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(3, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 36 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(17, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 40 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(17, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 44 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(5, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 48 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(5, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 52 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(27, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 56 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(27, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 60 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(28, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 64 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(28, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 68 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(29, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 72 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(29, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 76 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(30, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 80 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(30, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 84 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(18, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 88 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);call write~int(18, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, 92 + pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset, 4);pdc20621_prog_dimm0_~mmio~9#1.base, pdc20621_prog_dimm0_~mmio~9#1.offset := pdc20621_prog_dimm0_~mmio~9#1.base, 786432 + pdc20621_prog_dimm0_~mmio~9#1.offset;pdc20621_prog_dimm0_~i~5#1 := 0; {6756#false} is VALID [2022-02-20 21:58:35,752 INFO L290 TraceCheckUtils]: 208: Hoare triple {6756#false} assume !(pdc20621_prog_dimm0_~i~5#1 % 4294967296 <= 11);call pdc20621_prog_dimm0_#t~mem336#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 16 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem337#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 84 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,752 INFO L290 TraceCheckUtils]: 209: Hoare triple {6756#false} assume 0 != pdc20621_prog_dimm0_#t~mem337#1 % 4294967296;pdc20621_prog_dimm0_#t~ite338#1 := 8; {6756#false} is VALID [2022-02-20 21:58:35,752 INFO L290 TraceCheckUtils]: 210: Hoare triple {6756#false} call pdc20621_prog_dimm0_#t~mem339#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 12 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,752 INFO L290 TraceCheckUtils]: 211: Hoare triple {6756#false} assume (1 == (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) then (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) else (if 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) else (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))) || ((1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 1 else ~bitwiseOr((if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))), 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))))) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) then (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) else (if 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) else (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))) || ((1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 1 else ~bitwiseOr((if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))), 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))))) || 1 == (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) then (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) else (if 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) else (if (1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) && (1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11) || 0 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11))) || ((1 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))) || 0 == (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1))))) && 1 == 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)) then 1 else ~bitwiseOr((if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 0 == pdc20621_prog_dimm0_#t~ite338#1 then pdc20621_prog_dimm0_#t~mem336#1 - 8 else (if 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1) then pdc20621_prog_dimm0_#t~ite338#1 else (if (1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 && (1 == pdc20621_prog_dimm0_#t~ite338#1 || 0 == pdc20621_prog_dimm0_#t~ite338#1)) || ((1 == pdc20621_prog_dimm0_#t~mem336#1 - 8 || 0 == pdc20621_prog_dimm0_#t~mem336#1 - 8) && 1 == pdc20621_prog_dimm0_#t~ite338#1) then 1 else ~bitwiseOr(pdc20621_prog_dimm0_#t~mem336#1 - 8, pdc20621_prog_dimm0_#t~ite338#1)))), 16 * (pdc20621_prog_dimm0_#t~mem339#1 - 11)))))) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {6756#false} is VALID [2022-02-20 21:58:35,752 INFO L290 TraceCheckUtils]: 212: Hoare triple {6756#false} havoc pdc20621_prog_dimm0_#t~mem336#1;havoc pdc20621_prog_dimm0_#t~mem337#1;havoc pdc20621_prog_dimm0_#t~ite338#1;havoc pdc20621_prog_dimm0_#t~mem339#1;call pdc20621_prog_dimm0_#t~mem344#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 68 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem345#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 20 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem346#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 108 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,752 INFO L290 TraceCheckUtils]: 213: Hoare triple {6756#false} assume (1 == (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) then (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) else (if 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) else (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))) || ((1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 1 else ~bitwiseOr((if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))), 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))))) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) then (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) else (if 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) else (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))) || ((1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 1 else ~bitwiseOr((if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))), 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))))) || 1 == (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) then (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) else (if 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) else (if (1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) && (1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1) || 0 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1))) || ((1 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))) || 0 == (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)))))) && 1 == 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)) then 1 else ~bitwiseOr((if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) then 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) else (if 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) else (if (1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) && (1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2) || 0 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))) || ((1 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4) || 0 == 64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4)) && 1 == 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2)) then 1 else ~bitwiseOr(64 * (if pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 % 4 then 1 + pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4 else pdc20621_prog_dimm0_#t~mem344#1 % 4294967296 / 4), 128 * (if pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem345#1 % 4294967296 / 2))))), 256 * ((if (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~mem346#1) % 4294967296 / 10) - 1)))))) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {6756#false} is VALID [2022-02-20 21:58:35,754 INFO L290 TraceCheckUtils]: 214: Hoare triple {6756#false} havoc pdc20621_prog_dimm0_#t~mem344#1;havoc pdc20621_prog_dimm0_#t~mem345#1;havoc pdc20621_prog_dimm0_#t~mem346#1;call pdc20621_prog_dimm0_#t~mem353#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 116 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem354#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 112 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,754 INFO L290 TraceCheckUtils]: 215: Hoare triple {6756#false} assume pdc20621_prog_dimm0_#t~mem353#1 % 4294967296 > pdc20621_prog_dimm0_#t~mem354#1 % 4294967296;call pdc20621_prog_dimm0_#t~mem355#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 116 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);pdc20621_prog_dimm0_#t~ite357#1 := pdc20621_prog_dimm0_#t~mem355#1; {6756#false} is VALID [2022-02-20 21:58:35,754 INFO L290 TraceCheckUtils]: 216: Hoare triple {6756#false} assume (1 == 1024 * ((if (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10) - 1) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == 1024 * ((if (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10) - 1) || 1 == 1024 * ((if (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 < 0 && 0 != (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 % 10 then 1 + (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10 else (9 + pdc20621_prog_dimm0_#t~ite357#1) % 4294967296 / 10) - 1)) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 217: Hoare triple {6756#false} havoc pdc20621_prog_dimm0_#t~mem353#1;havoc pdc20621_prog_dimm0_#t~mem354#1;havoc pdc20621_prog_dimm0_#t~ite357#1;havoc pdc20621_prog_dimm0_#t~mem355#1;havoc pdc20621_prog_dimm0_#t~mem356#1;call pdc20621_prog_dimm0_#t~mem361#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 120 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem362#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 116 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 218: Hoare triple {6756#false} assume (1 == 4096 * ((if (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 < 0 && 0 != (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 % 10 then 1 + (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10 else (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10) - 2) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == 4096 * ((if (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 < 0 && 0 != (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 % 10 then 1 + (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10 else (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10) - 2) || 1 == 4096 * ((if (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 < 0 && 0 != (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 % 10 then 1 + (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10 else (9 + (pdc20621_prog_dimm0_#t~mem361#1 - pdc20621_prog_dimm0_#t~mem362#1)) % 4294967296 / 10) - 2)) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 219: Hoare triple {6756#false} havoc pdc20621_prog_dimm0_#t~mem361#1;havoc pdc20621_prog_dimm0_#t~mem362#1;call pdc20621_prog_dimm0_#t~mem364#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 72 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 220: Hoare triple {6756#false} assume !(0 != (if 0 == pdc20621_prog_dimm0_#t~mem364#1 then 0 else (if 1 == pdc20621_prog_dimm0_#t~mem364#1 then 0 else ~bitwiseAnd(pdc20621_prog_dimm0_#t~mem364#1, 8))) % 4294967296);havoc pdc20621_prog_dimm0_#t~mem364#1;call pdc20621_prog_dimm0_#t~mem366#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 72 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 221: Hoare triple {6756#false} assume !(0 != (if 0 == pdc20621_prog_dimm0_#t~mem366#1 then 0 else (if 1 == pdc20621_prog_dimm0_#t~mem366#1 then 0 else ~bitwiseAnd(pdc20621_prog_dimm0_#t~mem366#1, 4))) % 4294967296);havoc pdc20621_prog_dimm0_#t~mem366#1;call pdc20621_prog_dimm0_#t~mem368#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 72 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 222: Hoare triple {6756#false} assume !(0 != (if pdc20621_prog_dimm0_#t~mem368#1 % 4294967296 % 4294967296 <= 2147483647 then pdc20621_prog_dimm0_#t~mem368#1 % 4294967296 % 4294967296 else pdc20621_prog_dimm0_#t~mem368#1 % 4294967296 % 4294967296 - 4294967296));havoc pdc20621_prog_dimm0_#t~mem368#1;pdc20621_prog_dimm0_~data~1#1 := pdc20621_prog_dimm0_~data~1#1; {6756#false} is VALID [2022-02-20 21:58:35,755 INFO L290 TraceCheckUtils]: 223: Hoare triple {6756#false} call pdc20621_prog_dimm0_#t~mem370#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 16 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem371#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 20 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem372#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 12 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);call pdc20621_prog_dimm0_#t~mem373#1 := read~int(pdc20621_prog_dimm0_~#spd0~0#1.base, 68 + pdc20621_prog_dimm0_~#spd0~0#1.offset, 4);pdc20621_prog_dimm0_~bdimmsize~0#1 := 3 + (pdc20621_prog_dimm0_#t~mem370#1 % 256 + (if pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem371#1 % 4294967296 / 2) % 256 + pdc20621_prog_dimm0_#t~mem372#1 % 256 + (if pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 < 0 && 0 != pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 % 2 then 1 + pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 / 2 else pdc20621_prog_dimm0_#t~mem373#1 % 4294967296 / 2) % 256);havoc pdc20621_prog_dimm0_#t~mem370#1;havoc pdc20621_prog_dimm0_#t~mem371#1;havoc pdc20621_prog_dimm0_#t~mem372#1;havoc pdc20621_prog_dimm0_#t~mem373#1;pdc20621_prog_dimm0_~size~0#1 := ~shiftLeft(1, pdc20621_prog_dimm0_~bdimmsize~0#1 % 256) / 1048576; {6756#false} is VALID [2022-02-20 21:58:35,756 INFO L290 TraceCheckUtils]: 224: Hoare triple {6756#false} assume (1 == 65536 * (-1 + (if pdc20621_prog_dimm0_~size~0#1 < 0 && 0 != pdc20621_prog_dimm0_~size~0#1 % 16 then 1 + pdc20621_prog_dimm0_~size~0#1 / 16 else pdc20621_prog_dimm0_~size~0#1 / 16)) && (0 == pdc20621_prog_dimm0_~data~1#1 || 1 == pdc20621_prog_dimm0_~data~1#1)) || ((0 == 65536 * (-1 + (if pdc20621_prog_dimm0_~size~0#1 < 0 && 0 != pdc20621_prog_dimm0_~size~0#1 % 16 then 1 + pdc20621_prog_dimm0_~size~0#1 / 16 else pdc20621_prog_dimm0_~size~0#1 / 16)) || 1 == 65536 * (-1 + (if pdc20621_prog_dimm0_~size~0#1 < 0 && 0 != pdc20621_prog_dimm0_~size~0#1 % 16 then 1 + pdc20621_prog_dimm0_~size~0#1 / 16 else pdc20621_prog_dimm0_~size~0#1 / 16))) && 1 == pdc20621_prog_dimm0_~data~1#1);pdc20621_prog_dimm0_~data~1#1 := 1; {6756#false} is VALID [2022-02-20 21:58:35,756 INFO L290 TraceCheckUtils]: 225: Hoare triple {6756#false} pdc20621_prog_dimm0_~data~1#1 := pdc20621_prog_dimm0_~data~1#1; {6756#false} is VALID [2022-02-20 21:58:35,756 INFO L290 TraceCheckUtils]: 226: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,756 INFO L290 TraceCheckUtils]: 227: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,756 INFO L290 TraceCheckUtils]: 228: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,756 INFO L290 TraceCheckUtils]: 229: Hoare triple {6756#false} assume pdc20621_prog_dimm0_~data~1#1 >= 0;abs_6250 := (if pdc20621_prog_dimm0_~data~1#1 < 8 then 8 else pdc20621_prog_dimm0_~data~1#1);assume pdc20621_prog_dimm0_~data~1#1 >= 0;assume pdc20621_prog_dimm0_~data~1#1 >= abs_6250; {6756#false} is VALID [2022-02-20 21:58:35,757 INFO L272 TraceCheckUtils]: 230: Hoare triple {6756#false} call writel(pdc20621_prog_dimm0_~data~1#1, pdc20621_prog_dimm0_~mmio~9#1.base, 128 + pdc20621_prog_dimm0_~mmio~9#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,757 INFO L290 TraceCheckUtils]: 231: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,757 INFO L290 TraceCheckUtils]: 232: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,757 INFO L284 TraceCheckUtils]: 233: Hoare quadruple {6755#true} {6756#false} #1961#return; {6756#false} is VALID [2022-02-20 21:58:35,757 INFO L272 TraceCheckUtils]: 234: Hoare triple {6756#false} call pdc20621_prog_dimm0_#t~ret376#1 := readl(pdc20621_prog_dimm0_~mmio~9#1.base, 128 + pdc20621_prog_dimm0_~mmio~9#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,757 INFO L290 TraceCheckUtils]: 235: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,757 INFO L290 TraceCheckUtils]: 236: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,757 INFO L284 TraceCheckUtils]: 237: Hoare quadruple {6755#true} {6756#false} #1963#return; {6756#false} is VALID [2022-02-20 21:58:35,758 INFO L290 TraceCheckUtils]: 238: Hoare triple {6756#false} havoc pdc20621_prog_dimm0_#t~ret376#1;pdc20621_prog_dimm0_#res#1 := pdc20621_prog_dimm0_~size~0#1;call ULTIMATE.dealloc(pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset);havoc pdc20621_prog_dimm0_~#spd0~0#1.base, pdc20621_prog_dimm0_~#spd0~0#1.offset;call ULTIMATE.dealloc(pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset);havoc pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.base, pdc20621_prog_dimm0_~#pdc_i2c_read_data~0#1.offset; {6756#false} is VALID [2022-02-20 21:58:35,758 INFO L290 TraceCheckUtils]: 239: Hoare triple {6756#false} pdc20621_dimm_init_#t~ret397#1 := pdc20621_prog_dimm0_#res#1;assume { :end_inline_pdc20621_prog_dimm0 } true;assume -2147483648 <= pdc20621_dimm_init_#t~ret397#1 && pdc20621_dimm_init_#t~ret397#1 <= 2147483647;pdc20621_dimm_init_~size~1#1 := pdc20621_dimm_init_#t~ret397#1;havoc pdc20621_dimm_init_#t~ret397#1;assume { :begin_inline_pdc20621_prog_dimm_global } true;pdc20621_prog_dimm_global_#in~host#1.base, pdc20621_prog_dimm_global_#in~host#1.offset := pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset;havoc pdc20621_prog_dimm_global_#res#1;havoc pdc20621_prog_dimm_global_#t~mem377#1.base, pdc20621_prog_dimm_global_#t~mem377#1.offset, pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset, pdc20621_prog_dimm_global_#t~ret379#1, pdc20621_prog_dimm_global_#t~ret380#1, pdc20621_prog_dimm_global_#t~mem381#1, pdc20621_prog_dimm_global_#t~ret383#1, pdc20621_prog_dimm_global_#t~nondet384#1, pdc20621_prog_dimm_global_#t~nondet382#1, pdc20621_prog_dimm_global_#t~ret387#1, pdc20621_prog_dimm_global_#t~nondet385#1, pdc20621_prog_dimm_global_#t~nondet386#1, pdc20621_prog_dimm_global_~host#1.base, pdc20621_prog_dimm_global_~host#1.offset, pdc20621_prog_dimm_global_~data~2#1, pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset, pdc20621_prog_dimm_global_~error~0#1, pdc20621_prog_dimm_global_~i~6#1, pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset;pdc20621_prog_dimm_global_~host#1.base, pdc20621_prog_dimm_global_~host#1.offset := pdc20621_prog_dimm_global_#in~host#1.base, pdc20621_prog_dimm_global_#in~host#1.offset;havoc pdc20621_prog_dimm_global_~data~2#1;call pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset := #Ultimate.allocOnStack(4);havoc pdc20621_prog_dimm_global_~error~0#1;havoc pdc20621_prog_dimm_global_~i~6#1;havoc pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset;call pdc20621_prog_dimm_global_#t~mem377#1.base, pdc20621_prog_dimm_global_#t~mem377#1.offset := read~$Pointer$(pdc20621_prog_dimm_global_~host#1.base, 76 + pdc20621_prog_dimm_global_~host#1.offset, 8);call pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset := read~$Pointer$(pdc20621_prog_dimm_global_#t~mem377#1.base, 24 + pdc20621_prog_dimm_global_#t~mem377#1.offset, 8);pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset := pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset;havoc pdc20621_prog_dimm_global_#t~mem377#1.base, pdc20621_prog_dimm_global_#t~mem377#1.offset;havoc pdc20621_prog_dimm_global_#t~mem378#1.base, pdc20621_prog_dimm_global_#t~mem378#1.offset;pdc20621_prog_dimm_global_~mmio~10#1.base, pdc20621_prog_dimm_global_~mmio~10#1.offset := pdc20621_prog_dimm_global_~mmio~10#1.base, 786432 + pdc20621_prog_dimm_global_~mmio~10#1.offset;pdc20621_prog_dimm_global_~data~2#1 := 35805681; {6756#false} is VALID [2022-02-20 21:58:35,758 INFO L272 TraceCheckUtils]: 240: Hoare triple {6756#false} call writel(pdc20621_prog_dimm_global_~data~2#1, pdc20621_prog_dimm_global_~mmio~10#1.base, 136 + pdc20621_prog_dimm_global_~mmio~10#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,758 INFO L290 TraceCheckUtils]: 241: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,758 INFO L290 TraceCheckUtils]: 242: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,758 INFO L284 TraceCheckUtils]: 243: Hoare quadruple {6755#true} {6756#false} #1965#return; {6756#false} is VALID [2022-02-20 21:58:35,759 INFO L272 TraceCheckUtils]: 244: Hoare triple {6756#false} call pdc20621_prog_dimm_global_#t~ret379#1 := readl(pdc20621_prog_dimm_global_~mmio~10#1.base, 136 + pdc20621_prog_dimm_global_~mmio~10#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,759 INFO L290 TraceCheckUtils]: 245: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,759 INFO L290 TraceCheckUtils]: 246: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,759 INFO L284 TraceCheckUtils]: 247: Hoare quadruple {6755#true} {6756#false} #1967#return; {6756#false} is VALID [2022-02-20 21:58:35,759 INFO L290 TraceCheckUtils]: 248: Hoare triple {6756#false} havoc pdc20621_prog_dimm_global_#t~ret379#1; {6756#false} is VALID [2022-02-20 21:58:35,759 INFO L272 TraceCheckUtils]: 249: Hoare triple {6756#false} call pdc20621_prog_dimm_global_#t~ret380#1 := pdc20621_i2c_read(pdc20621_prog_dimm_global_~host#1.base, pdc20621_prog_dimm_global_~host#1.offset, 80, 11, pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset); {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} is VALID [2022-02-20 21:58:35,759 INFO L290 TraceCheckUtils]: 250: Hoare triple {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L290 TraceCheckUtils]: 251: Hoare triple {6755#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L290 TraceCheckUtils]: 252: Hoare triple {6755#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L272 TraceCheckUtils]: 253: Hoare triple {6755#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L290 TraceCheckUtils]: 254: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L290 TraceCheckUtils]: 255: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L284 TraceCheckUtils]: 256: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,760 INFO L272 TraceCheckUtils]: 257: Hoare triple {6755#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,761 INFO L290 TraceCheckUtils]: 258: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,761 INFO L290 TraceCheckUtils]: 259: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,761 INFO L284 TraceCheckUtils]: 260: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,761 INFO L290 TraceCheckUtils]: 261: Hoare triple {6755#true} havoc #t~ret320; {6755#true} is VALID [2022-02-20 21:58:35,761 INFO L272 TraceCheckUtils]: 262: Hoare triple {6755#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,761 INFO L290 TraceCheckUtils]: 263: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L290 TraceCheckUtils]: 264: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L284 TraceCheckUtils]: 265: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L290 TraceCheckUtils]: 266: Hoare triple {6755#true} ~count~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L290 TraceCheckUtils]: 267: Hoare triple {6755#true} assume !(~count~0 % 4294967296 <= 1000); {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L290 TraceCheckUtils]: 268: Hoare triple {6755#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L290 TraceCheckUtils]: 269: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,762 INFO L284 TraceCheckUtils]: 270: Hoare quadruple {6755#true} {6756#false} #1969#return; {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 271: Hoare triple {6756#false} havoc pdc20621_prog_dimm_global_#t~ret380#1;call pdc20621_prog_dimm_global_#t~mem381#1 := read~int(pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 272: Hoare triple {6756#false} assume !(2 == pdc20621_prog_dimm_global_#t~mem381#1 % 4294967296);havoc pdc20621_prog_dimm_global_#t~mem381#1; {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 273: Hoare triple {6756#false} assume 0 == pdc20621_prog_dimm_global_~data~2#1;pdc20621_prog_dimm_global_~data~2#1 := 0; {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 274: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 275: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 276: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,763 INFO L290 TraceCheckUtils]: 277: Hoare triple {6756#false} assume pdc20621_prog_dimm_global_~data~2#1 >= 0;abs_6278 := (if pdc20621_prog_dimm_global_~data~2#1 < 524288 then 524288 else pdc20621_prog_dimm_global_~data~2#1);assume pdc20621_prog_dimm_global_~data~2#1 >= 0;assume pdc20621_prog_dimm_global_~data~2#1 >= abs_6278; {6756#false} is VALID [2022-02-20 21:58:35,764 INFO L272 TraceCheckUtils]: 278: Hoare triple {6756#false} call writel(pdc20621_prog_dimm_global_~data~2#1, pdc20621_prog_dimm_global_~mmio~10#1.base, 136 + pdc20621_prog_dimm_global_~mmio~10#1.offset); {6755#true} is VALID [2022-02-20 21:58:35,764 INFO L290 TraceCheckUtils]: 279: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,764 INFO L290 TraceCheckUtils]: 280: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,764 INFO L284 TraceCheckUtils]: 281: Hoare quadruple {6755#true} {6756#false} #1975#return; {6756#false} is VALID [2022-02-20 21:58:35,764 INFO L290 TraceCheckUtils]: 282: Hoare triple {6756#false} pdc20621_prog_dimm_global_~error~0#1 := 1;pdc20621_prog_dimm_global_~i~6#1 := 1; {6756#false} is VALID [2022-02-20 21:58:35,764 INFO L290 TraceCheckUtils]: 283: Hoare triple {6756#false} assume !(pdc20621_prog_dimm_global_~i~6#1 <= 10); {6756#false} is VALID [2022-02-20 21:58:35,764 INFO L290 TraceCheckUtils]: 284: Hoare triple {6756#false} pdc20621_prog_dimm_global_#res#1 := pdc20621_prog_dimm_global_~error~0#1;call ULTIMATE.dealloc(pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset);havoc pdc20621_prog_dimm_global_~#spd0~1#1.base, pdc20621_prog_dimm_global_~#spd0~1#1.offset; {6756#false} is VALID [2022-02-20 21:58:35,765 INFO L290 TraceCheckUtils]: 285: Hoare triple {6756#false} pdc20621_dimm_init_#t~ret398#1 := pdc20621_prog_dimm_global_#res#1;assume { :end_inline_pdc20621_prog_dimm_global } true;pdc20621_dimm_init_~tmp~29#1 := pdc20621_dimm_init_#t~ret398#1;havoc pdc20621_dimm_init_#t~ret398#1; {6756#false} is VALID [2022-02-20 21:58:35,765 INFO L290 TraceCheckUtils]: 286: Hoare triple {6756#false} assume !(0 != pdc20621_dimm_init_~tmp~29#1 % 4294967296); {6756#false} is VALID [2022-02-20 21:58:35,765 INFO L272 TraceCheckUtils]: 287: Hoare triple {6756#false} call pdc20621_dimm_init_#t~ret400#1 := pdc20621_i2c_read(pdc20621_dimm_init_~host#1.base, pdc20621_dimm_init_~host#1.offset, 80, 11, pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset); {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} is VALID [2022-02-20 21:58:35,765 INFO L290 TraceCheckUtils]: 288: Hoare triple {6936#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(abs_6128)| abs_6128) (= |old(abs_6129)| abs_6129))} ~host.base, ~host.offset := #in~host.base, #in~host.offset;~device := #in~device;~subaddr := #in~subaddr;~pdata.base, ~pdata.offset := #in~pdata.base, #in~pdata.offset;havoc ~mmio~8.base, ~mmio~8.offset;havoc ~i2creg~0;havoc ~status~3;havoc ~count~0;call #t~mem316.base, #t~mem316.offset := read~$Pointer$(~host.base, 76 + ~host.offset, 8);call #t~mem317.base, #t~mem317.offset := read~$Pointer$(#t~mem316.base, 24 + #t~mem316.offset, 8);~mmio~8.base, ~mmio~8.offset := #t~mem317.base, #t~mem317.offset;havoc #t~mem316.base, #t~mem316.offset;havoc #t~mem317.base, #t~mem317.offset;~i2creg~0 := 0;~count~0 := 0;~mmio~8.base, ~mmio~8.offset := ~mmio~8.base, 786432 + ~mmio~8.offset; {6755#true} is VALID [2022-02-20 21:58:35,765 INFO L290 TraceCheckUtils]: 289: Hoare triple {6755#true} assume (1 == 16777216 * ~device && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 16777216 * ~device || 1 == 16777216 * ~device) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,765 INFO L290 TraceCheckUtils]: 290: Hoare triple {6755#true} assume (1 == 65536 * ~subaddr && (0 == ~i2creg~0 || 1 == ~i2creg~0)) || ((0 == 65536 * ~subaddr || 1 == 65536 * ~subaddr) && 1 == ~i2creg~0);~i2creg~0 := 1; {6755#true} is VALID [2022-02-20 21:58:35,765 INFO L272 TraceCheckUtils]: 291: Hoare triple {6755#true} call writel(~i2creg~0, ~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L290 TraceCheckUtils]: 292: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L290 TraceCheckUtils]: 293: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L284 TraceCheckUtils]: 294: Hoare quadruple {6755#true} {6755#true} #1875#return; {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L272 TraceCheckUtils]: 295: Hoare triple {6755#true} call #t~ret320 := readl(~mmio~8.base, 76 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L290 TraceCheckUtils]: 296: Hoare triple {6755#true} ~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset;havoc ~ret~0;#res := ~ret~0; {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L290 TraceCheckUtils]: 297: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,766 INFO L284 TraceCheckUtils]: 298: Hoare quadruple {6755#true} {6755#true} #1877#return; {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L290 TraceCheckUtils]: 299: Hoare triple {6755#true} havoc #t~ret320; {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L272 TraceCheckUtils]: 300: Hoare triple {6755#true} call writel(224, ~mmio~8.base, 72 + ~mmio~8.offset); {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L290 TraceCheckUtils]: 301: Hoare triple {6755#true} ~val := #in~val;~addr.base, ~addr.offset := #in~addr.base, #in~addr.offset; {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L290 TraceCheckUtils]: 302: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L284 TraceCheckUtils]: 303: Hoare quadruple {6755#true} {6755#true} #1879#return; {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L290 TraceCheckUtils]: 304: Hoare triple {6755#true} ~count~0 := 0; {6755#true} is VALID [2022-02-20 21:58:35,767 INFO L290 TraceCheckUtils]: 305: Hoare triple {6755#true} assume !(~count~0 % 4294967296 <= 1000); {6755#true} is VALID [2022-02-20 21:58:35,768 INFO L290 TraceCheckUtils]: 306: Hoare triple {6755#true} call write~int((if 0 == ~status~3 / 256 then 0 else (if 1 == ~status~3 / 256 then 1 else ~bitwiseAnd(~status~3 / 256, 255))), ~pdata.base, ~pdata.offset, 4);#res := 1; {6755#true} is VALID [2022-02-20 21:58:35,768 INFO L290 TraceCheckUtils]: 307: Hoare triple {6755#true} assume true; {6755#true} is VALID [2022-02-20 21:58:35,768 INFO L284 TraceCheckUtils]: 308: Hoare quadruple {6755#true} {6756#false} #1981#return; {6756#false} is VALID [2022-02-20 21:58:35,768 INFO L290 TraceCheckUtils]: 309: Hoare triple {6756#false} havoc pdc20621_dimm_init_#t~ret400#1;call pdc20621_dimm_init_#t~mem401#1 := read~int(pdc20621_dimm_init_~#spd0~2#1.base, pdc20621_dimm_init_~#spd0~2#1.offset, 4); {6756#false} is VALID [2022-02-20 21:58:35,768 INFO L290 TraceCheckUtils]: 310: Hoare triple {6756#false} assume 2 == pdc20621_dimm_init_#t~mem401#1 % 4294967296;havoc pdc20621_dimm_init_#t~mem401#1;pdc20621_dimm_init_~addr~2#1 := 0;pdc20621_dimm_init_~length~0#1 := 1048576 * pdc20621_dimm_init_~size~1#1;assume { :begin_inline_kzalloc } true;kzalloc_#in~size#1, kzalloc_#in~flags#1 := 131072, 208;havoc kzalloc_#res#1.base, kzalloc_#res#1.offset;havoc kzalloc_~size#1, kzalloc_~flags#1;kzalloc_~size#1 := kzalloc_#in~size#1;kzalloc_~flags#1 := kzalloc_#in~flags#1;assume { :begin_inline_ldv_check_alloc_flags } true;ldv_check_alloc_flags_#in~flags#1 := kzalloc_~flags#1;havoc ldv_check_alloc_flags_~flags#1;ldv_check_alloc_flags_~flags#1 := ldv_check_alloc_flags_#in~flags#1; {6756#false} is VALID [2022-02-20 21:58:35,768 INFO L290 TraceCheckUtils]: 311: Hoare triple {6756#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ldv_check_alloc_flags_~flags#1 then 0 else (if 1 == ldv_check_alloc_flags_~flags#1 then 0 else ~bitwiseAnd(ldv_check_alloc_flags_~flags#1, 16))) % 4294967296); {6756#false} is VALID [2022-02-20 21:58:35,768 INFO L272 TraceCheckUtils]: 312: Hoare triple {6756#false} call ldv_error(); {6756#false} is VALID [2022-02-20 21:58:35,769 INFO L290 TraceCheckUtils]: 313: Hoare triple {6756#false} assume !false; {6756#false} is VALID [2022-02-20 21:58:35,769 INFO L134 CoverageAnalysis]: Checked inductivity of 668 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2022-02-20 21:58:35,770 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 21:58:35,770 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449933282] [2022-02-20 21:58:35,770 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449933282] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 21:58:35,771 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 21:58:35,771 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-20 21:58:35,771 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876259752] [2022-02-20 21:58:35,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 21:58:35,773 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 3 states have internal predecessors, (132), 2 states have call successors, (37), 5 states have call predecessors, (37), 1 states have return successors, (36), 2 states have call predecessors, (36), 2 states have call successors, (36) Word has length 314 [2022-02-20 21:58:35,774 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 21:58:35,774 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 22.0) internal successors, (132), 3 states have internal predecessors, (132), 2 states have call successors, (37), 5 states have call predecessors, (37), 1 states have return successors, (36), 2 states have call predecessors, (36), 2 states have call successors, (36) [2022-02-20 21:58:35,982 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 205 edges. 205 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 21:58:35,983 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-20 21:58:35,983 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 21:58:35,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-20 21:58:35,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-02-20 21:58:35,984 INFO L87 Difference]: Start difference. First operand 1010 states and 1455 transitions. Second operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 3 states have internal predecessors, (132), 2 states have call successors, (37), 5 states have call predecessors, (37), 1 states have return successors, (36), 2 states have call predecessors, (36), 2 states have call successors, (36) [2022-02-20 21:58:40,133 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:42,166 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:50,830 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:54,886 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 21:58:57,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-20 21:58:57,197 INFO L93 Difference]: Finished difference Result 2055 states and 2993 transitions. [2022-02-20 21:58:57,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-02-20 21:58:57,198 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 3 states have internal predecessors, (132), 2 states have call successors, (37), 5 states have call predecessors, (37), 1 states have return successors, (36), 2 states have call predecessors, (36), 2 states have call successors, (36) Word has length 314 [2022-02-20 21:58:57,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-20 21:58:57,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 3 states have internal predecessors, (132), 2 states have call successors, (37), 5 states have call predecessors, (37), 1 states have return successors, (36), 2 states have call predecessors, (36), 2 states have call successors, (36) [2022-02-20 21:58:57,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 1952 transitions. [2022-02-20 21:58:57,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 3 states have internal predecessors, (132), 2 states have call successors, (37), 5 states have call predecessors, (37), 1 states have return successors, (36), 2 states have call predecessors, (36), 2 states have call successors, (36) [2022-02-20 21:58:57,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 1952 transitions. [2022-02-20 21:58:57,260 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 1952 transitions.