./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i --full-output -ea --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 03d7b7b3 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -ea -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash a6081edb60f9c6ed50ae2f2edfb068029f65a703b32e64840408c28b9c1fef5b --- Real Ultimate output --- This is Ultimate 0.2.2-dev-03d7b7b [2022-02-20 22:01:28,280 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-20 22:01:28,291 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-20 22:01:28,329 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-02-20 22:01:28,330 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-02-20 22:01:28,331 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-02-20 22:01:28,332 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-02-20 22:01:28,333 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-02-20 22:01:28,334 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-02-20 22:01:28,335 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-02-20 22:01:28,336 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-02-20 22:01:28,337 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-02-20 22:01:28,338 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-20 22:01:28,342 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-20 22:01:28,343 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-20 22:01:28,344 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-20 22:01:28,345 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-20 22:01:28,346 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-20 22:01:28,347 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-20 22:01:28,348 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-20 22:01:28,349 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-20 22:01:28,353 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-20 22:01:28,354 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-20 22:01:28,355 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-20 22:01:28,357 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-02-20 22:01:28,362 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-02-20 22:01:28,362 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-02-20 22:01:28,363 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-02-20 22:01:28,363 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-02-20 22:01:28,364 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-02-20 22:01:28,364 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-02-20 22:01:28,365 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-02-20 22:01:28,366 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-02-20 22:01:28,367 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-02-20 22:01:28,368 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-02-20 22:01:28,369 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-02-20 22:01:28,370 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-02-20 22:01:28,370 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-02-20 22:01:28,370 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-20 22:01:28,371 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-20 22:01:28,372 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-20 22:01:28,373 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2022-02-20 22:01:28,389 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-20 22:01:28,390 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-20 22:01:28,390 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-02-20 22:01:28,390 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-02-20 22:01:28,391 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-02-20 22:01:28,391 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-02-20 22:01:28,392 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-02-20 22:01:28,392 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-02-20 22:01:28,392 INFO L138 SettingsManager]: * Use SBE=true [2022-02-20 22:01:28,392 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-20 22:01:28,393 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-20 22:01:28,393 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-20 22:01:28,393 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-20 22:01:28,393 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-20 22:01:28,394 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-20 22:01:28,394 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-20 22:01:28,394 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-20 22:01:28,394 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-20 22:01:28,394 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-20 22:01:28,395 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-20 22:01:28,395 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-20 22:01:28,395 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:01:28,395 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-20 22:01:28,395 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-02-20 22:01:28,396 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-02-20 22:01:28,396 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-20 22:01:28,396 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-02-20 22:01:28,397 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-02-20 22:01:28,397 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-02-20 22:01:28,397 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-02-20 22:01:28,397 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a6081edb60f9c6ed50ae2f2edfb068029f65a703b32e64840408c28b9c1fef5b [2022-02-20 22:01:28,636 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-20 22:01:28,661 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-20 22:01:28,663 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-20 22:01:28,664 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-20 22:01:28,667 INFO L275 PluginConnector]: CDTParser initialized [2022-02-20 22:01:28,668 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i [2022-02-20 22:01:28,726 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2ad9f8e84/42005b9b428c4734819450a3a1b7c848/FLAG35a1b921c [2022-02-20 22:01:29,369 INFO L306 CDTParser]: Found 1 translation units. [2022-02-20 22:01:29,370 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i [2022-02-20 22:01:29,414 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2ad9f8e84/42005b9b428c4734819450a3a1b7c848/FLAG35a1b921c [2022-02-20 22:01:29,697 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2ad9f8e84/42005b9b428c4734819450a3a1b7c848 [2022-02-20 22:01:29,699 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-20 22:01:29,701 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-02-20 22:01:29,703 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-20 22:01:29,703 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-20 22:01:29,706 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-20 22:01:29,707 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:01:29" (1/1) ... [2022-02-20 22:01:29,708 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1bba5fdb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:29, skipping insertion in model container [2022-02-20 22:01:29,709 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.02 10:01:29" (1/1) ... [2022-02-20 22:01:29,715 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-20 22:01:29,837 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-20 22:01:30,254 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name show at C: (*show)(struct kobject___0 * , struct attribute___0 * , char * ) [4406] [2022-02-20 22:01:30,255 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name store at C: (*store)(struct kobject___0 * , struct attribute___0 * , char const * , size_t ) [4407-4408] [2022-02-20 22:01:30,514 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i[136345,136358] [2022-02-20 22:01:31,110 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:01:31,139 INFO L203 MainTranslator]: Completed pre-run [2022-02-20 22:01:31,240 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name show at C: (*show)(struct kobject___0 * , struct attribute___0 * , char * ) [4406] [2022-02-20 22:01:31,241 WARN L1246 CHandler]: Detected problem Invalid redeclaration of the name store at C: (*store)(struct kobject___0 * , struct attribute___0 * , char const * , size_t ) [4407-4408] [2022-02-20 22:01:31,260 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.16-rc1/43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i[136345,136358] [2022-02-20 22:01:31,469 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-20 22:01:31,543 INFO L208 MainTranslator]: Completed translation [2022-02-20 22:01:31,543 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31 WrapperNode [2022-02-20 22:01:31,544 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-20 22:01:31,545 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-02-20 22:01:31,545 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-02-20 22:01:31,545 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-02-20 22:01:31,551 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,607 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,818 INFO L137 Inliner]: procedures = 238, calls = 1473, calls flagged for inlining = 139, calls inlined = 137, statements flattened = 4019 [2022-02-20 22:01:31,819 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-02-20 22:01:31,820 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-20 22:01:31,820 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-20 22:01:31,820 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-20 22:01:31,827 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,828 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,853 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,854 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,966 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:31,991 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:32,006 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:32,045 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-20 22:01:32,046 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-20 22:01:32,046 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-20 22:01:32,046 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-20 22:01:32,049 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (1/1) ... [2022-02-20 22:01:32,054 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-20 22:01:32,064 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-20 22:01:32,074 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-20 22:01:32,137 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-20 22:01:32,151 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_dev [2022-02-20 22:01:32,151 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_dev [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_complete_request [2022-02-20 22:01:32,152 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_complete_request [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2022-02-20 22:01:32,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_process_request_ring [2022-02-20 22:01:32,152 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_process_request_ring [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_process_completion_ring [2022-02-20 22:01:32,152 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_process_completion_ring [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_unmap_buffers [2022-02-20 22:01:32,152 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_unmap_buffers [2022-02-20 22:01:32,152 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2022-02-20 22:01:32,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_size_call_parameter [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure scsi_bufflen [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure scsi_bufflen [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_reg_write [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_reg_write [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize_scsi_host_template_3 [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize_scsi_host_template_3 [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure pci_map_single [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_map_single [2022-02-20 22:01:32,153 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_remove [2022-02-20 22:01:32,153 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_remove [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure scsi_device_put [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure scsi_device_put [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_release_resources [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_release_resources [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_release_context [2022-02-20 22:01:32,154 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_release_context [2022-02-20 22:01:32,154 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure INIT_LIST_HEAD [2022-02-20 22:01:32,155 INFO L138 BoogieDeclarations]: Found implementation of procedure INIT_LIST_HEAD [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure pci_get_drvdata [2022-02-20 22:01:32,155 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_get_drvdata [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-02-20 22:01:32,155 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure __pvscsi_shutdown [2022-02-20 22:01:32,155 INFO L138 BoogieDeclarations]: Found implementation of procedure __pvscsi_shutdown [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_write_cmd_desc [2022-02-20 22:01:32,155 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_write_cmd_desc [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2022-02-20 22:01:32,155 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-20 22:01:32,155 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_reg_read [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_reg_read [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure ll_adapter_reset [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure ll_adapter_reset [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_shutdown_intr [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_shutdown_intr [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure free_pages [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure free_pages [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure flush_workqueue [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure flush_workqueue [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_consistent_dma_mask [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_consistent_dma_mask [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-02-20 22:01:32,156 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2022-02-20 22:01:32,156 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-02-20 22:01:32,157 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2022-02-20 22:01:32,157 INFO L138 BoogieDeclarations]: Found implementation of procedure __phys_addr [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2022-02-20 22:01:32,157 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_dma_mask [2022-02-20 22:01:32,157 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_dma_mask [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2022-02-20 22:01:32,157 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-20 22:01:32,157 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-02-20 22:01:32,157 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure scsi_host_get [2022-02-20 22:01:32,158 INFO L138 BoogieDeclarations]: Found implementation of procedure scsi_host_get [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_msg_pending [2022-02-20 22:01:32,158 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_msg_pending [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2022-02-20 22:01:32,158 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_shutdown [2022-02-20 22:01:32,158 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_shutdown [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure scsi_sg_count [2022-02-20 22:01:32,158 INFO L138 BoogieDeclarations]: Found implementation of procedure scsi_sg_count [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-02-20 22:01:32,158 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_unmask_intr [2022-02-20 22:01:32,158 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_unmask_intr [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_map_context [2022-02-20 22:01:32,159 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_map_context [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2022-02-20 22:01:32,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:01:32,159 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure scsi_host_put [2022-02-20 22:01:32,159 INFO L138 BoogieDeclarations]: Found implementation of procedure scsi_host_put [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure scsi_device_lookup [2022-02-20 22:01:32,159 INFO L138 BoogieDeclarations]: Found implementation of procedure scsi_device_lookup [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure list_add [2022-02-20 22:01:32,159 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add [2022-02-20 22:01:32,159 INFO L130 BoogieDeclarations]: Found specification of procedure pvscsi_setup_all_rings [2022-02-20 22:01:32,160 INFO L138 BoogieDeclarations]: Found implementation of procedure pvscsi_setup_all_rings [2022-02-20 22:01:32,160 INFO L130 BoogieDeclarations]: Found specification of procedure shost_priv [2022-02-20 22:01:32,160 INFO L138 BoogieDeclarations]: Found implementation of procedure shost_priv [2022-02-20 22:01:32,160 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-20 22:01:32,160 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-20 22:01:32,160 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-20 22:01:32,702 INFO L234 CfgBuilder]: Building ICFG [2022-02-20 22:01:32,703 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-20 22:01:33,153 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2022-02-20 22:01:45,264 INFO L275 CfgBuilder]: Performing block encoding [2022-02-20 22:01:45,284 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-20 22:01:45,284 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-02-20 22:01:45,286 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:01:45 BoogieIcfgContainer [2022-02-20 22:01:45,287 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-20 22:01:45,288 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-20 22:01:45,288 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-20 22:01:45,291 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-20 22:01:45,291 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.02 10:01:29" (1/3) ... [2022-02-20 22:01:45,291 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@65330211 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:01:45, skipping insertion in model container [2022-02-20 22:01:45,292 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.02 10:01:31" (2/3) ... [2022-02-20 22:01:45,292 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@65330211 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.02 10:01:45, skipping insertion in model container [2022-02-20 22:01:45,292 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.02 10:01:45" (3/3) ... [2022-02-20 22:01:45,293 INFO L111 eAbstractionObserver]: Analyzing ICFG 43_2a_consumption_linux-3.16-rc1.tar.xz-43_2a-drivers--scsi--vmw_pvscsi.ko-entry_point.cil.out.i [2022-02-20 22:01:45,297 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-02-20 22:01:45,297 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-20 22:01:45,345 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-20 22:01:45,350 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-20 22:01:45,350 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-20 22:01:45,394 INFO L276 IsEmpty]: Start isEmpty. Operand has 1074 states, 814 states have (on average 1.3722358722358723) internal successors, (1117), 838 states have internal predecessors, (1117), 205 states have call successors, (205), 54 states have call predecessors, (205), 53 states have return successors, (199), 196 states have call predecessors, (199), 199 states have call successors, (199) [2022-02-20 22:01:45,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2022-02-20 22:01:45,429 INFO L506 BasicCegarLoop]: Found error trace [2022-02-20 22:01:45,430 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-20 22:01:45,431 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-20 22:01:45,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-20 22:01:45,439 INFO L85 PathProgramCache]: Analyzing trace with hash 2107529661, now seen corresponding path program 1 times [2022-02-20 22:01:45,446 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-20 22:01:45,446 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596326585] [2022-02-20 22:01:45,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-20 22:01:45,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-20 22:01:45,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,112 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-02-20 22:01:46,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,141 INFO L290 TraceCheckUtils]: 0: Hoare triple {1230#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet72#1 && #t~nondet72#1 <= 2147483647;~tmp___0~1#1 := #t~nondet72#1;havoc #t~nondet72#1; {1077#true} is VALID [2022-02-20 22:01:46,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,142 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,142 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2745#return; {1077#true} is VALID [2022-02-20 22:01:46,143 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-02-20 22:01:46,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,168 INFO L290 TraceCheckUtils]: 0: Hoare triple {1230#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet72#1 && #t~nondet72#1 <= 2147483647;~tmp___0~1#1 := #t~nondet72#1;havoc #t~nondet72#1; {1077#true} is VALID [2022-02-20 22:01:46,168 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,168 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,169 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2747#return; {1077#true} is VALID [2022-02-20 22:01:46,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-02-20 22:01:46,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,189 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~mask#1 := #in~mask#1;havoc ~tmp~19#1;assume { :begin_inline_dma_set_mask } true;dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset, dma_set_mask_#in~arg1#1 := ~dev#1.base, 147 + ~dev#1.offset, ~mask#1;havoc dma_set_mask_#res#1;havoc dma_set_mask_#t~nondet891#1, dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset, dma_set_mask_~arg1#1;dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset := dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset;dma_set_mask_~arg1#1 := dma_set_mask_#in~arg1#1;assume -2147483648 <= dma_set_mask_#t~nondet891#1 && dma_set_mask_#t~nondet891#1 <= 2147483647;dma_set_mask_#res#1 := dma_set_mask_#t~nondet891#1;havoc dma_set_mask_#t~nondet891#1; {1077#true} is VALID [2022-02-20 22:01:46,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} #t~ret208#1 := dma_set_mask_#res#1;assume { :end_inline_dma_set_mask } true;assume -2147483648 <= #t~ret208#1 && #t~ret208#1 <= 2147483647;~tmp~19#1 := #t~ret208#1;havoc #t~ret208#1;#res#1 := ~tmp~19#1; {1077#true} is VALID [2022-02-20 22:01:46,190 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1078#false} #2881#return; {1078#false} is VALID [2022-02-20 22:01:46,217 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-02-20 22:01:46,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,232 INFO L290 TraceCheckUtils]: 0: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~mask#1 := #in~mask#1;havoc ~tmp~20#1;assume { :begin_inline_dma_set_coherent_mask } true;dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset, dma_set_coherent_mask_#in~mask#1 := ~dev#1.base, 147 + ~dev#1.offset, ~mask#1;havoc dma_set_coherent_mask_#res#1;havoc dma_set_coherent_mask_#t~ret201#1, dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1, dma_set_coherent_mask_~tmp~16#1;dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset := dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset;dma_set_coherent_mask_~mask#1 := dma_set_coherent_mask_#in~mask#1;havoc dma_set_coherent_mask_~tmp~16#1;assume { :begin_inline_dma_supported } true;dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset, dma_supported_#in~arg1#1 := dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1;havoc dma_supported_#res#1;havoc dma_supported_#t~nondet892#1, dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset, dma_supported_~arg1#1;dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset := dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset;dma_supported_~arg1#1 := dma_supported_#in~arg1#1;assume -2147483648 <= dma_supported_#t~nondet892#1 && dma_supported_#t~nondet892#1 <= 2147483647;dma_supported_#res#1 := dma_supported_#t~nondet892#1;havoc dma_supported_#t~nondet892#1; {1077#true} is VALID [2022-02-20 22:01:46,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} dma_set_coherent_mask_#t~ret201#1 := dma_supported_#res#1;assume { :end_inline_dma_supported } true;assume -2147483648 <= dma_set_coherent_mask_#t~ret201#1 && dma_set_coherent_mask_#t~ret201#1 <= 2147483647;dma_set_coherent_mask_~tmp~16#1 := dma_set_coherent_mask_#t~ret201#1;havoc dma_set_coherent_mask_#t~ret201#1; {1077#true} is VALID [2022-02-20 22:01:46,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume 0 == dma_set_coherent_mask_~tmp~16#1;dma_set_coherent_mask_#res#1 := -5; {1077#true} is VALID [2022-02-20 22:01:46,233 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} #t~ret209#1 := dma_set_coherent_mask_#res#1;assume { :end_inline_dma_set_coherent_mask } true;assume -2147483648 <= #t~ret209#1 && #t~ret209#1 <= 2147483647;~tmp~20#1 := #t~ret209#1;havoc #t~ret209#1;#res#1 := ~tmp~20#1; {1077#true} is VALID [2022-02-20 22:01:46,233 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,233 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1077#true} {1078#false} #2883#return; {1078#false} is VALID [2022-02-20 22:01:46,233 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-02-20 22:01:46,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,244 INFO L290 TraceCheckUtils]: 0: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,244 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,244 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,245 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1078#false} #2889#return; {1078#false} is VALID [2022-02-20 22:01:46,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-02-20 22:01:46,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,288 INFO L290 TraceCheckUtils]: 0: Hoare triple {1232#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet70 && #t~nondet70 <= 2147483647;~tmp___0~0 := #t~nondet70;havoc #t~nondet70; {1077#true} is VALID [2022-02-20 22:01:46,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,289 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,289 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1078#false} #2891#return; {1078#false} is VALID [2022-02-20 22:01:46,289 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2022-02-20 22:01:46,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,298 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;call #t~mem244.base, #t~mem244.offset := read~$Pointer$(~adapter.base, 249 + ~adapter.offset, 8);#res.base, #res.offset := #t~mem244.base, 147 + #t~mem244.offset;havoc #t~mem244.base, #t~mem244.offset; {1077#true} is VALID [2022-02-20 22:01:46,298 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,298 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1077#true} {1078#false} #2893#return; {1078#false} is VALID [2022-02-20 22:01:46,332 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-02-20 22:01:46,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,358 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:01:46,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,366 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:01:46,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,372 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,372 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,373 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,373 INFO L272 TraceCheckUtils]: 1: Hoare triple {1077#true} call #t~ret136 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); {1077#true} is VALID [2022-02-20 22:01:46,374 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,374 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,374 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,374 INFO L290 TraceCheckUtils]: 5: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret136 && #t~ret136 <= 9223372036854775807;~tmp~10 := #t~ret136;havoc #t~ret136;#t~short138 := 0 != ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,375 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} assume #t~short138; {1077#true} is VALID [2022-02-20 22:01:46,375 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume #t~short138;havoc #t~mem137.base, #t~mem137.offset;havoc #t~short138;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,375 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,375 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1077#true} {1077#true} #2735#return; {1077#true} is VALID [2022-02-20 22:01:46,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {1233#(and (= |old(abs_4957)| abs_4957) (= |old(abs_4953)| abs_4953) (= |old(abs_4974)| abs_4974))} ~hwdev#1.base, ~hwdev#1.offset := #in~hwdev#1.base, #in~hwdev#1.offset;~size#1 := #in~size#1;~dma_handle#1.base, ~dma_handle#1.offset := #in~dma_handle#1.base, #in~dma_handle#1.offset;havoc ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume 0 != (~hwdev#1.base + ~hwdev#1.offset) % 18446744073709551616;#t~ite202#1.base, #t~ite202#1.offset := ~hwdev#1.base, 147 + ~hwdev#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume { :begin_inline_dma_alloc_attrs } true;dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset, dma_alloc_attrs_#in~size#1, dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset, dma_alloc_attrs_#in~gfp#1, dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset := #t~ite202#1.base, #t~ite202#1.offset, ~size#1, ~dma_handle#1.base, ~dma_handle#1.offset, 32, 0, 0;havoc dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset, dma_alloc_attrs_#t~ret176#1, dma_alloc_attrs_#t~mem177#1.base, dma_alloc_attrs_#t~mem177#1.offset, dma_alloc_attrs_#t~ret178#1, dma_alloc_attrs_#t~mem185#1.base, dma_alloc_attrs_#t~mem185#1.offset, dma_alloc_attrs_#t~ret186#1.base, dma_alloc_attrs_#t~ret186#1.offset, dma_alloc_attrs_#t~mem187#1, dma_alloc_attrs_#t~nondet175#1, dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, dma_alloc_attrs_~gfp#1, dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset, dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset, dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset, dma_alloc_attrs_~tmp___0~4#1, dma_alloc_attrs_~tmp___1~2#1;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset;dma_alloc_attrs_~size#1 := dma_alloc_attrs_#in~size#1;dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset := dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset;dma_alloc_attrs_~gfp#1 := dma_alloc_attrs_#in~gfp#1;dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset := dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset;havoc dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset;havoc dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset;havoc dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset;havoc dma_alloc_attrs_~tmp___0~4#1;havoc dma_alloc_attrs_~tmp___1~2#1; {1077#true} is VALID [2022-02-20 22:01:46,377 INFO L272 TraceCheckUtils]: 3: Hoare triple {1077#true} call dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset := get_dma_ops(dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset); {1077#true} is VALID [2022-02-20 22:01:46,377 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,377 INFO L272 TraceCheckUtils]: 5: Hoare triple {1077#true} call #t~ret136 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); {1077#true} is VALID [2022-02-20 22:01:46,377 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,378 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret136 && #t~ret136 <= 9223372036854775807;~tmp~10 := #t~ret136;havoc #t~ret136;#t~short138 := 0 != ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,378 INFO L290 TraceCheckUtils]: 10: Hoare triple {1077#true} assume #t~short138; {1077#true} is VALID [2022-02-20 22:01:46,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {1077#true} assume #t~short138;havoc #t~mem137.base, #t~mem137.offset;havoc #t~short138;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,379 INFO L290 TraceCheckUtils]: 12: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,379 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1077#true} {1077#true} #2735#return; {1077#true} is VALID [2022-02-20 22:01:46,379 INFO L290 TraceCheckUtils]: 14: Hoare triple {1077#true} dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset := dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset := dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,380 INFO L290 TraceCheckUtils]: 15: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~gfp#1;dma_alloc_attrs_~gfp#1 := 0; {1077#true} is VALID [2022-02-20 22:01:46,380 INFO L290 TraceCheckUtils]: 16: Hoare triple {1077#true} assume 0 == (dma_alloc_attrs_~dev#1.base + dma_alloc_attrs_~dev#1.offset) % 18446744073709551616;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := ~#x86_dma_fallback_dev~0.base, ~#x86_dma_fallback_dev~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,380 INFO L290 TraceCheckUtils]: 17: Hoare triple {1077#true} assume { :begin_inline_is_device_dma_capable } true;is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset;havoc is_device_dma_capable_#res#1;havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset, is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, is_device_dma_capable_#t~mem114#1, is_device_dma_capable_#t~short115#1, is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset;is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset := is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset;call is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != (is_device_dma_capable_#t~mem112#1.base + is_device_dma_capable_#t~mem112#1.offset) % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,380 INFO L290 TraceCheckUtils]: 18: Hoare triple {1077#true} assume is_device_dma_capable_#t~short115#1;call is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);call is_device_dma_capable_#t~mem114#1 := read~int(is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != is_device_dma_capable_#t~mem114#1 % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,381 INFO L290 TraceCheckUtils]: 19: Hoare triple {1077#true} is_device_dma_capable_#res#1 := (if is_device_dma_capable_#t~short115#1 then 1 else 0);havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset;havoc is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset;havoc is_device_dma_capable_#t~mem114#1;havoc is_device_dma_capable_#t~short115#1; {1077#true} is VALID [2022-02-20 22:01:46,381 INFO L290 TraceCheckUtils]: 20: Hoare triple {1077#true} dma_alloc_attrs_#t~ret176#1 := is_device_dma_capable_#res#1;assume { :end_inline_is_device_dma_capable } true;assume -2147483648 <= dma_alloc_attrs_#t~ret176#1 && dma_alloc_attrs_#t~ret176#1 <= 2147483647;dma_alloc_attrs_~tmp___0~4#1 := dma_alloc_attrs_#t~ret176#1;havoc dma_alloc_attrs_#t~ret176#1; {1077#true} is VALID [2022-02-20 22:01:46,381 INFO L290 TraceCheckUtils]: 21: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~tmp___0~4#1;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,381 INFO L290 TraceCheckUtils]: 22: Hoare triple {1077#true} #t~ret203#1.base, #t~ret203#1.offset := dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;assume { :end_inline_dma_alloc_attrs } true;~tmp~17#1.base, ~tmp~17#1.offset := #t~ret203#1.base, #t~ret203#1.offset;havoc #t~ite202#1.base, #t~ite202#1.offset;havoc #t~ret203#1.base, #t~ret203#1.offset;#res#1.base, #res#1.offset := ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,382 INFO L290 TraceCheckUtils]: 23: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,382 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {1077#true} {1078#false} #2895#return; {1078#false} is VALID [2022-02-20 22:01:46,382 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 102 [2022-02-20 22:01:46,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,391 INFO L290 TraceCheckUtils]: 0: Hoare triple {1232#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet70 && #t~nondet70 <= 2147483647;~tmp___0~0 := #t~nondet70;havoc #t~nondet70; {1077#true} is VALID [2022-02-20 22:01:46,391 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,391 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,391 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1078#false} #2905#return; {1078#false} is VALID [2022-02-20 22:01:46,392 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 113 [2022-02-20 22:01:46,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,398 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~shost.base, ~shost.offset := #in~shost.base, #in~shost.offset;#res.base, #res.offset := ~shost.base, 3406 + ~shost.offset; {1077#true} is VALID [2022-02-20 22:01:46,399 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,399 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1077#true} {1078#false} #2909#return; {1078#false} is VALID [2022-02-20 22:01:46,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 118 [2022-02-20 22:01:46,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,407 INFO L290 TraceCheckUtils]: 0: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,407 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,408 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1078#false} #2911#return; {1078#false} is VALID [2022-02-20 22:01:46,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 128 [2022-02-20 22:01:46,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,476 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:01:46,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,482 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,482 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1077#true} {1077#true} #2669#return; {1077#true} is VALID [2022-02-20 22:01:46,482 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2022-02-20 22:01:46,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:01:46,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,497 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,497 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,497 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,497 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;~cmd := #in~cmd;~desc.base, ~desc.offset := #in~desc.base, #in~desc.offset;~len := #in~len;havoc ~ptr~0.base, ~ptr~0.offset;havoc ~i~0;~ptr~0.base, ~ptr~0.offset := ~desc.base, ~desc.offset;~len := (if ~len % 18446744073709551616 < 0 && 0 != ~len % 18446744073709551616 % 4 then 1 + ~len % 18446744073709551616 / 4 else ~len % 18446744073709551616 / 4); {1077#true} is VALID [2022-02-20 22:01:46,498 INFO L272 TraceCheckUtils]: 1: Hoare triple {1077#true} call pvscsi_reg_write(~adapter.base, ~adapter.offset, 0, ~cmd); {1077#true} is VALID [2022-02-20 22:01:46,498 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,499 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,499 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,499 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,499 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} ~i~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,500 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume !(~i~0 % 18446744073709551616 < ~len % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,500 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,500 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1077#true} {1077#true} #2673#return; {1077#true} is VALID [2022-02-20 22:01:46,500 INFO L290 TraceCheckUtils]: 0: Hoare triple {1247#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;call ~#descriptor~0.base, ~#descriptor~0.offset := #Ultimate.allocOnStack(37);havoc ~tmp~27.base, ~tmp~27.offset;havoc ~tmp___0~6;call write~$Pointer$(5, 0, ~#descriptor~0.base, ~#descriptor~0.offset, 8);call write~$Pointer$(6, 0, ~#descriptor~0.base, 8 + ~#descriptor~0.offset, 8);call write~$Pointer$(7, 0, ~#descriptor~0.base, 16 + ~#descriptor~0.offset, 8);call write~$Pointer$(8, 0, ~#descriptor~0.base, 24 + ~#descriptor~0.offset, 8);call write~int(357, ~#descriptor~0.base, 32 + ~#descriptor~0.offset, 4);call write~int(0, ~#descriptor~0.base, 36 + ~#descriptor~0.offset, 1);call #t~mem271 := read~int(~#descriptor~0.base, 36 + ~#descriptor~0.offset, 1); {1077#true} is VALID [2022-02-20 22:01:46,501 INFO L272 TraceCheckUtils]: 1: Hoare triple {1077#true} call #t~ret272 := ldv__builtin_expect(#t~mem271 % 256, 0); {1077#true} is VALID [2022-02-20 22:01:46,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,501 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,501 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1077#true} {1077#true} #2669#return; {1077#true} is VALID [2022-02-20 22:01:46,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret272 && #t~ret272 <= 9223372036854775807;~tmp___0~6 := #t~ret272;havoc #t~mem271;havoc #t~ret272; {1077#true} is VALID [2022-02-20 22:01:46,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} assume !(0 != ~tmp___0~6); {1077#true} is VALID [2022-02-20 22:01:46,502 INFO L272 TraceCheckUtils]: 7: Hoare triple {1077#true} call pvscsi_write_cmd_desc(~adapter.base, ~adapter.offset, 1, 0, 0, 0); {1077#true} is VALID [2022-02-20 22:01:46,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;~cmd := #in~cmd;~desc.base, ~desc.offset := #in~desc.base, #in~desc.offset;~len := #in~len;havoc ~ptr~0.base, ~ptr~0.offset;havoc ~i~0;~ptr~0.base, ~ptr~0.offset := ~desc.base, ~desc.offset;~len := (if ~len % 18446744073709551616 < 0 && 0 != ~len % 18446744073709551616 % 4 then 1 + ~len % 18446744073709551616 / 4 else ~len % 18446744073709551616 / 4); {1077#true} is VALID [2022-02-20 22:01:46,503 INFO L272 TraceCheckUtils]: 9: Hoare triple {1077#true} call pvscsi_reg_write(~adapter.base, ~adapter.offset, 0, ~cmd); {1077#true} is VALID [2022-02-20 22:01:46,503 INFO L290 TraceCheckUtils]: 10: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,503 INFO L290 TraceCheckUtils]: 11: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,503 INFO L290 TraceCheckUtils]: 12: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,504 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,504 INFO L290 TraceCheckUtils]: 14: Hoare triple {1077#true} ~i~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,504 INFO L290 TraceCheckUtils]: 15: Hoare triple {1077#true} assume !(~i~0 % 18446744073709551616 < ~len % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,504 INFO L290 TraceCheckUtils]: 16: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,504 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {1077#true} {1077#true} #2673#return; {1077#true} is VALID [2022-02-20 22:01:46,505 INFO L290 TraceCheckUtils]: 18: Hoare triple {1077#true} call ULTIMATE.dealloc(~#descriptor~0.base, ~#descriptor~0.offset);havoc ~#descriptor~0.base, ~#descriptor~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,505 INFO L290 TraceCheckUtils]: 19: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,505 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1077#true} {1078#false} #2913#return; {1078#false} is VALID [2022-02-20 22:01:46,506 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 153 [2022-02-20 22:01:46,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,525 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-02-20 22:01:46,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,533 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:01:46,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,539 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,539 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,540 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,540 INFO L272 TraceCheckUtils]: 1: Hoare triple {1077#true} call #t~ret136 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); {1077#true} is VALID [2022-02-20 22:01:46,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,541 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,541 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,541 INFO L290 TraceCheckUtils]: 5: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret136 && #t~ret136 <= 9223372036854775807;~tmp~10 := #t~ret136;havoc #t~ret136;#t~short138 := 0 != ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,541 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} assume #t~short138; {1077#true} is VALID [2022-02-20 22:01:46,542 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume #t~short138;havoc #t~mem137.base, #t~mem137.offset;havoc #t~short138;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,542 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,542 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1077#true} {1077#true} #2735#return; {1077#true} is VALID [2022-02-20 22:01:46,542 INFO L290 TraceCheckUtils]: 0: Hoare triple {1233#(and (= |old(abs_4957)| abs_4957) (= |old(abs_4953)| abs_4953) (= |old(abs_4974)| abs_4974))} ~hwdev#1.base, ~hwdev#1.offset := #in~hwdev#1.base, #in~hwdev#1.offset;~size#1 := #in~size#1;~dma_handle#1.base, ~dma_handle#1.offset := #in~dma_handle#1.base, #in~dma_handle#1.offset;havoc ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume 0 != (~hwdev#1.base + ~hwdev#1.offset) % 18446744073709551616;#t~ite202#1.base, #t~ite202#1.offset := ~hwdev#1.base, 147 + ~hwdev#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,543 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume { :begin_inline_dma_alloc_attrs } true;dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset, dma_alloc_attrs_#in~size#1, dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset, dma_alloc_attrs_#in~gfp#1, dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset := #t~ite202#1.base, #t~ite202#1.offset, ~size#1, ~dma_handle#1.base, ~dma_handle#1.offset, 32, 0, 0;havoc dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset, dma_alloc_attrs_#t~ret176#1, dma_alloc_attrs_#t~mem177#1.base, dma_alloc_attrs_#t~mem177#1.offset, dma_alloc_attrs_#t~ret178#1, dma_alloc_attrs_#t~mem185#1.base, dma_alloc_attrs_#t~mem185#1.offset, dma_alloc_attrs_#t~ret186#1.base, dma_alloc_attrs_#t~ret186#1.offset, dma_alloc_attrs_#t~mem187#1, dma_alloc_attrs_#t~nondet175#1, dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, dma_alloc_attrs_~gfp#1, dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset, dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset, dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset, dma_alloc_attrs_~tmp___0~4#1, dma_alloc_attrs_~tmp___1~2#1;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset;dma_alloc_attrs_~size#1 := dma_alloc_attrs_#in~size#1;dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset := dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset;dma_alloc_attrs_~gfp#1 := dma_alloc_attrs_#in~gfp#1;dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset := dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset;havoc dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset;havoc dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset;havoc dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset;havoc dma_alloc_attrs_~tmp___0~4#1;havoc dma_alloc_attrs_~tmp___1~2#1; {1077#true} is VALID [2022-02-20 22:01:46,543 INFO L272 TraceCheckUtils]: 3: Hoare triple {1077#true} call dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset := get_dma_ops(dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset); {1077#true} is VALID [2022-02-20 22:01:46,543 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,544 INFO L272 TraceCheckUtils]: 5: Hoare triple {1077#true} call #t~ret136 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); {1077#true} is VALID [2022-02-20 22:01:46,544 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,544 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,544 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,544 INFO L290 TraceCheckUtils]: 9: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret136 && #t~ret136 <= 9223372036854775807;~tmp~10 := #t~ret136;havoc #t~ret136;#t~short138 := 0 != ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,545 INFO L290 TraceCheckUtils]: 10: Hoare triple {1077#true} assume #t~short138; {1077#true} is VALID [2022-02-20 22:01:46,545 INFO L290 TraceCheckUtils]: 11: Hoare triple {1077#true} assume #t~short138;havoc #t~mem137.base, #t~mem137.offset;havoc #t~short138;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,545 INFO L290 TraceCheckUtils]: 12: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,545 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {1077#true} {1077#true} #2735#return; {1077#true} is VALID [2022-02-20 22:01:46,546 INFO L290 TraceCheckUtils]: 14: Hoare triple {1077#true} dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset := dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset := dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,546 INFO L290 TraceCheckUtils]: 15: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~gfp#1;dma_alloc_attrs_~gfp#1 := 0; {1077#true} is VALID [2022-02-20 22:01:46,546 INFO L290 TraceCheckUtils]: 16: Hoare triple {1077#true} assume 0 == (dma_alloc_attrs_~dev#1.base + dma_alloc_attrs_~dev#1.offset) % 18446744073709551616;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := ~#x86_dma_fallback_dev~0.base, ~#x86_dma_fallback_dev~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,546 INFO L290 TraceCheckUtils]: 17: Hoare triple {1077#true} assume { :begin_inline_is_device_dma_capable } true;is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset;havoc is_device_dma_capable_#res#1;havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset, is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, is_device_dma_capable_#t~mem114#1, is_device_dma_capable_#t~short115#1, is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset;is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset := is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset;call is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != (is_device_dma_capable_#t~mem112#1.base + is_device_dma_capable_#t~mem112#1.offset) % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,546 INFO L290 TraceCheckUtils]: 18: Hoare triple {1077#true} assume is_device_dma_capable_#t~short115#1;call is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);call is_device_dma_capable_#t~mem114#1 := read~int(is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != is_device_dma_capable_#t~mem114#1 % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,547 INFO L290 TraceCheckUtils]: 19: Hoare triple {1077#true} is_device_dma_capable_#res#1 := (if is_device_dma_capable_#t~short115#1 then 1 else 0);havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset;havoc is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset;havoc is_device_dma_capable_#t~mem114#1;havoc is_device_dma_capable_#t~short115#1; {1077#true} is VALID [2022-02-20 22:01:46,547 INFO L290 TraceCheckUtils]: 20: Hoare triple {1077#true} dma_alloc_attrs_#t~ret176#1 := is_device_dma_capable_#res#1;assume { :end_inline_is_device_dma_capable } true;assume -2147483648 <= dma_alloc_attrs_#t~ret176#1 && dma_alloc_attrs_#t~ret176#1 <= 2147483647;dma_alloc_attrs_~tmp___0~4#1 := dma_alloc_attrs_#t~ret176#1;havoc dma_alloc_attrs_#t~ret176#1; {1077#true} is VALID [2022-02-20 22:01:46,547 INFO L290 TraceCheckUtils]: 21: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~tmp___0~4#1;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,548 INFO L290 TraceCheckUtils]: 22: Hoare triple {1077#true} #t~ret203#1.base, #t~ret203#1.offset := dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;assume { :end_inline_dma_alloc_attrs } true;~tmp~17#1.base, ~tmp~17#1.offset := #t~ret203#1.base, #t~ret203#1.offset;havoc #t~ite202#1.base, #t~ite202#1.offset;havoc #t~ret203#1.base, #t~ret203#1.offset;#res#1.base, #res#1.offset := ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,548 INFO L290 TraceCheckUtils]: 23: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,548 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {1077#true} {1078#false} #2921#return; {1078#false} is VALID [2022-02-20 22:01:46,548 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2022-02-20 22:01:46,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,787 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2022-02-20 22:01:46,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,796 INFO L290 TraceCheckUtils]: 0: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,796 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,797 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,797 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2685#return; {1077#true} is VALID [2022-02-20 22:01:46,798 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 11 [2022-02-20 22:01:46,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,808 INFO L290 TraceCheckUtils]: 0: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,808 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,809 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,809 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2687#return; {1077#true} is VALID [2022-02-20 22:01:46,809 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-02-20 22:01:46,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,820 INFO L290 TraceCheckUtils]: 0: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,820 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,822 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,822 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2689#return; {1077#true} is VALID [2022-02-20 22:01:46,822 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-02-20 22:01:46,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-02-20 22:01:46,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-20 22:01:46,846 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,847 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,847 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;~cmd := #in~cmd;~desc.base, ~desc.offset := #in~desc.base, #in~desc.offset;~len := #in~len;havoc ~ptr~0.base, ~ptr~0.offset;havoc ~i~0;~ptr~0.base, ~ptr~0.offset := ~desc.base, ~desc.offset;~len := (if ~len % 18446744073709551616 < 0 && 0 != ~len % 18446744073709551616 % 4 then 1 + ~len % 18446744073709551616 / 4 else ~len % 18446744073709551616 / 4); {1077#true} is VALID [2022-02-20 22:01:46,847 INFO L272 TraceCheckUtils]: 1: Hoare triple {1077#true} call pvscsi_reg_write(~adapter.base, ~adapter.offset, 0, ~cmd); {1077#true} is VALID [2022-02-20 22:01:46,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,848 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,848 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,848 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,848 INFO L290 TraceCheckUtils]: 6: Hoare triple {1077#true} ~i~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume !(~i~0 % 18446744073709551616 < ~len % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,849 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1077#true} {1077#true} #2691#return; {1077#true} is VALID [2022-02-20 22:01:46,850 INFO L290 TraceCheckUtils]: 0: Hoare triple {1247#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;call ~#cmd~3.base, ~#cmd~3.offset := #Ultimate.allocOnStack(528);havoc ~base~0;havoc ~i~2;call ~#cmd_msg~0.base, ~#cmd_msg~0.offset := #Ultimate.allocOnStack(136);call write~int(0, ~#cmd~3.base, ~#cmd~3.offset, 4);call write~int(0, ~#cmd~3.base, 4 + ~#cmd~3.offset, 4);call write~int(0, ~#cmd~3.base, 8 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 16 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 24 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 32 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 40 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 48 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 56 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 64 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 72 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 80 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 88 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 96 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 104 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 112 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 120 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 128 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 136 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 144 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 152 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 160 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 168 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 176 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 184 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 192 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 200 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 208 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 216 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 224 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 232 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 240 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 248 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 256 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 264 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 272 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 280 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 288 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 296 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 304 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 312 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 320 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 328 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 336 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 344 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 352 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 360 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 368 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 376 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 384 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 392 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 400 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 408 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 416 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 424 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 432 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 440 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 448 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 456 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 464 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 472 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 480 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 488 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 496 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 504 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 512 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 520 + ~#cmd~3.offset, 8);call #t~mem341 := read~int(~adapter.base, 241 + ~adapter.offset, 8);call write~int(#t~mem341 / 4096, ~#cmd~3.base, 8 + ~#cmd~3.offset, 8);havoc #t~mem341;call #t~mem342 := read~int(~adapter.base, 177 + ~adapter.offset, 4);call write~int(#t~mem342, ~#cmd~3.base, ~#cmd~3.offset, 4);havoc #t~mem342;call #t~mem343 := read~int(~adapter.base, 201 + ~adapter.offset, 4);call write~int(#t~mem343, ~#cmd~3.base, 4 + ~#cmd~3.offset, 4);havoc #t~mem343;call #t~mem344 := read~int(~adapter.base, 185 + ~adapter.offset, 8);~base~0 := #t~mem344;havoc #t~mem344;~i~2 := 0; {1077#true} is VALID [2022-02-20 22:01:46,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} call #t~mem345 := read~int(~adapter.base, 177 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,850 INFO L290 TraceCheckUtils]: 2: Hoare triple {1077#true} assume !(#t~mem345 % 4294967296 > ~i~2 % 4294967296);havoc #t~mem345;call #t~mem346 := read~int(~adapter.base, 205 + ~adapter.offset, 8);~base~0 := #t~mem346;havoc #t~mem346;~i~2 := 0; {1077#true} is VALID [2022-02-20 22:01:46,851 INFO L290 TraceCheckUtils]: 3: Hoare triple {1077#true} call #t~mem347 := read~int(~adapter.base, 201 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,851 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} assume !(#t~mem347 % 4294967296 > ~i~2 % 4294967296);havoc #t~mem347;call #t~mem348.base, #t~mem348.offset := read~$Pointer$(~adapter.base, 233 + ~adapter.offset, 8); {1077#true} is VALID [2022-02-20 22:01:46,852 INFO L272 TraceCheckUtils]: 5: Hoare triple {1077#true} call #t~memset~res349.base, #t~memset~res349.offset := #Ultimate.C_memset(#t~mem348.base, #t~mem348.offset, 0, 4096); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,852 INFO L290 TraceCheckUtils]: 6: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,853 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,853 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,853 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {1077#true} {1077#true} #2685#return; {1077#true} is VALID [2022-02-20 22:01:46,853 INFO L290 TraceCheckUtils]: 10: Hoare triple {1077#true} havoc #t~mem348.base, #t~mem348.offset;havoc #t~memset~res349.base, #t~memset~res349.offset;call #t~mem350.base, #t~mem350.offset := read~$Pointer$(~adapter.base, 169 + ~adapter.offset, 8);call #t~mem351 := read~int(~adapter.base, 177 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,854 INFO L272 TraceCheckUtils]: 11: Hoare triple {1077#true} call #t~memset~res352.base, #t~memset~res352.offset := #Ultimate.C_memset(#t~mem350.base, #t~mem350.offset, 0, 4096 * (#t~mem351 % 4294967296)); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,855 INFO L290 TraceCheckUtils]: 12: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,855 INFO L290 TraceCheckUtils]: 13: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,855 INFO L290 TraceCheckUtils]: 14: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,855 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1077#true} {1077#true} #2687#return; {1077#true} is VALID [2022-02-20 22:01:46,855 INFO L290 TraceCheckUtils]: 16: Hoare triple {1077#true} havoc #t~mem350.base, #t~mem350.offset;havoc #t~mem351;havoc #t~memset~res352.base, #t~memset~res352.offset;call #t~mem353.base, #t~mem353.offset := read~$Pointer$(~adapter.base, 193 + ~adapter.offset, 8);call #t~mem354 := read~int(~adapter.base, 201 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,857 INFO L272 TraceCheckUtils]: 17: Hoare triple {1077#true} call #t~memset~res355.base, #t~memset~res355.offset := #Ultimate.C_memset(#t~mem353.base, #t~mem353.offset, 0, 4096 * (#t~mem354 % 4294967296)); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,857 INFO L290 TraceCheckUtils]: 18: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,857 INFO L290 TraceCheckUtils]: 19: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,857 INFO L290 TraceCheckUtils]: 20: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,857 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1077#true} {1077#true} #2689#return; {1077#true} is VALID [2022-02-20 22:01:46,858 INFO L290 TraceCheckUtils]: 22: Hoare triple {1077#true} havoc #t~mem353.base, #t~mem353.offset;havoc #t~mem354;havoc #t~memset~res355.base, #t~memset~res355.offset; {1077#true} is VALID [2022-02-20 22:01:46,858 INFO L272 TraceCheckUtils]: 23: Hoare triple {1077#true} call pvscsi_write_cmd_desc(~adapter.base, ~adapter.offset, 3, ~#cmd~3.base, ~#cmd~3.offset, 528); {1077#true} is VALID [2022-02-20 22:01:46,858 INFO L290 TraceCheckUtils]: 24: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;~cmd := #in~cmd;~desc.base, ~desc.offset := #in~desc.base, #in~desc.offset;~len := #in~len;havoc ~ptr~0.base, ~ptr~0.offset;havoc ~i~0;~ptr~0.base, ~ptr~0.offset := ~desc.base, ~desc.offset;~len := (if ~len % 18446744073709551616 < 0 && 0 != ~len % 18446744073709551616 % 4 then 1 + ~len % 18446744073709551616 / 4 else ~len % 18446744073709551616 / 4); {1077#true} is VALID [2022-02-20 22:01:46,858 INFO L272 TraceCheckUtils]: 25: Hoare triple {1077#true} call pvscsi_reg_write(~adapter.base, ~adapter.offset, 0, ~cmd); {1077#true} is VALID [2022-02-20 22:01:46,859 INFO L290 TraceCheckUtils]: 26: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,859 INFO L290 TraceCheckUtils]: 27: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,859 INFO L290 TraceCheckUtils]: 28: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,859 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,860 INFO L290 TraceCheckUtils]: 30: Hoare triple {1077#true} ~i~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,860 INFO L290 TraceCheckUtils]: 31: Hoare triple {1077#true} assume !(~i~0 % 18446744073709551616 < ~len % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,860 INFO L290 TraceCheckUtils]: 32: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,860 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {1077#true} {1077#true} #2691#return; {1077#true} is VALID [2022-02-20 22:01:46,860 INFO L290 TraceCheckUtils]: 34: Hoare triple {1077#true} call #t~mem356 := read~int(~adapter.base, 15 + ~adapter.offset, 1); {1077#true} is VALID [2022-02-20 22:01:46,861 INFO L290 TraceCheckUtils]: 35: Hoare triple {1077#true} assume !(0 != #t~mem356 % 256);havoc #t~mem356; {1077#true} is VALID [2022-02-20 22:01:46,861 INFO L290 TraceCheckUtils]: 36: Hoare triple {1077#true} call ULTIMATE.dealloc(~#cmd~3.base, ~#cmd~3.offset);havoc ~#cmd~3.base, ~#cmd~3.offset;call ULTIMATE.dealloc(~#cmd_msg~0.base, ~#cmd_msg~0.offset);havoc ~#cmd_msg~0.base, ~#cmd_msg~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,861 INFO L290 TraceCheckUtils]: 37: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,861 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {1077#true} {1078#false} #2937#return; {1078#false} is VALID [2022-02-20 22:01:46,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {1077#true} assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(97, 2);call #Ultimate.allocInit(9, 3);call #Ultimate.allocInit(37, 4);call #Ultimate.allocInit(11, 5);call #Ultimate.allocInit(17, 6);call #Ultimate.allocInit(216, 7);call #Ultimate.allocInit(21, 8);call #Ultimate.allocInit(21, 9);call #Ultimate.allocInit(11, 10);call #Ultimate.allocInit(13, 11);call #Ultimate.allocInit(216, 12);call #Ultimate.allocInit(21, 13);call #Ultimate.allocInit(21, 14);call #Ultimate.allocInit(11, 15);call #Ultimate.allocInit(16, 16);call #Ultimate.allocInit(216, 17);call #Ultimate.allocInit(29, 18);call #Ultimate.allocInit(29, 19);call #Ultimate.allocInit(2, 20);call write~init~int(14, 20, 0, 1);call write~init~int(0, 20, 1, 1);call #Ultimate.allocInit(78, 21);call #Ultimate.allocInit(2, 22);call write~init~int(15, 22, 0, 1);call write~init~int(0, 22, 1, 1);call #Ultimate.allocInit(38, 23);call #Ultimate.allocInit(2, 24);call write~init~int(15, 24, 0, 1);call write~init~int(0, 24, 1, 1);call #Ultimate.allocInit(33, 25);call #Ultimate.allocInit(11, 26);call #Ultimate.allocInit(24, 27);call #Ultimate.allocInit(216, 28);call #Ultimate.allocInit(45, 29);call #Ultimate.allocInit(45, 30);call #Ultimate.allocInit(2, 31);call write~init~int(11, 31, 0, 1);call write~init~int(0, 31, 1, 1);call #Ultimate.allocInit(57, 32);call #Ultimate.allocInit(2, 33);call write~init~int(11, 33, 0, 1);call write~init~int(0, 33, 1, 1);call #Ultimate.allocInit(52, 34);call #Ultimate.allocInit(11, 35);call #Ultimate.allocInit(17, 36);call #Ultimate.allocInit(216, 37);call #Ultimate.allocInit(30, 38);call #Ultimate.allocInit(30, 39);call #Ultimate.allocInit(2, 40);call write~init~int(15, 40, 0, 1);call write~init~int(0, 40, 1, 1);call #Ultimate.allocInit(32, 41);call #Ultimate.allocInit(2, 42);call write~init~int(15, 42, 0, 1);call write~init~int(0, 42, 1, 1);call #Ultimate.allocInit(27, 43);call #Ultimate.allocInit(2, 44);call write~init~int(15, 44, 0, 1);call write~init~int(0, 44, 1, 1);call #Ultimate.allocInit(29, 45);call #Ultimate.allocInit(2, 46);call write~init~int(15, 46, 0, 1);call write~init~int(0, 46, 1, 1);call #Ultimate.allocInit(24, 47);call #Ultimate.allocInit(2, 48);call write~init~int(15, 48, 0, 1);call write~init~int(0, 48, 1, 1);call #Ultimate.allocInit(50, 49);call #Ultimate.allocInit(2, 50);call write~init~int(15, 50, 0, 1);call write~init~int(0, 50, 1, 1);call #Ultimate.allocInit(45, 51);call #Ultimate.allocInit(2, 52);call write~init~int(11, 52, 0, 1);call write~init~int(0, 52, 1, 1);call #Ultimate.allocInit(29, 53);call #Ultimate.allocInit(2, 54);call write~init~int(11, 54, 0, 1);call write~init~int(0, 54, 1, 1);call #Ultimate.allocInit(24, 55);call #Ultimate.allocInit(2, 56);call write~init~int(14, 56, 0, 1);call write~init~int(0, 56, 1, 1);call #Ultimate.allocInit(22, 57);call #Ultimate.allocInit(2, 58);call write~init~int(14, 58, 0, 1);call write~init~int(0, 58, 1, 1);call #Ultimate.allocInit(17, 59);call #Ultimate.allocInit(2, 60);call write~init~int(14, 60, 0, 1);call write~init~int(0, 60, 1, 1);call #Ultimate.allocInit(21, 61);call #Ultimate.allocInit(2, 62);call write~init~int(14, 62, 0, 1);call write~init~int(0, 62, 1, 1);call #Ultimate.allocInit(16, 63);call #Ultimate.allocInit(2, 64);call write~init~int(14, 64, 0, 1);call write~init~int(0, 64, 1, 1);call #Ultimate.allocInit(37, 65);call #Ultimate.allocInit(2, 66);call write~init~int(14, 66, 0, 1);call write~init~int(0, 66, 1, 1);call #Ultimate.allocInit(32, 67);call #Ultimate.allocInit(88, 68);call #Ultimate.allocInit(27, 69);call #Ultimate.allocInit(11, 70);call #Ultimate.allocInit(53, 71);call #Ultimate.allocInit(48, 72);call #Ultimate.allocInit(36, 73);call #Ultimate.allocInit(50, 74);call #Ultimate.allocInit(44, 75);call #Ultimate.allocInit(17, 76);call #Ultimate.allocInit(11, 77);call #Ultimate.allocInit(3, 78);call write~init~int(37, 78, 0, 1);call write~init~int(115, 78, 1, 1);call write~init~int(0, 78, 2, 1);call #Ultimate.allocInit(42, 79);call #Ultimate.allocInit(17, 80);call #Ultimate.allocInit(52, 81);call #Ultimate.allocInit(40, 82);call #Ultimate.allocInit(3, 83);call write~init~int(101, 83, 0, 1);call write~init~int(110, 83, 1, 1);call write~init~int(0, 83, 2, 1);call #Ultimate.allocInit(4, 84);call write~init~int(100, 84, 0, 1);call write~init~int(105, 84, 1, 1);call write~init~int(115, 84, 2, 1);call write~init~int(0, 84, 3, 1);call #Ultimate.allocInit(55, 85);call #Ultimate.allocInit(76, 86);call #Ultimate.allocInit(30, 87);call #Ultimate.allocInit(30, 88);call #Ultimate.allocInit(37, 89);call #Ultimate.allocInit(37, 90);call #Ultimate.allocInit(11, 91);call #Ultimate.allocInit(42, 92);call #Ultimate.allocInit(50, 93);call #Ultimate.allocInit(49, 94);call #Ultimate.allocInit(25, 95);call #Ultimate.allocInit(39, 96);call #Ultimate.allocInit(38, 97);call #Ultimate.allocInit(28, 98);call #Ultimate.allocInit(45, 99);call #Ultimate.allocInit(41, 100);call #Ultimate.allocInit(43, 101);call #Ultimate.allocInit(26, 102);call #Ultimate.allocInit(24, 103);call #Ultimate.allocInit(25, 104);call #Ultimate.allocInit(25, 105);call #Ultimate.allocInit(54, 106);call #Ultimate.allocInit(3, 107);call write~init~int(101, 107, 0, 1);call write~init~int(110, 107, 1, 1);call write~init~int(0, 107, 2, 1);call #Ultimate.allocInit(4, 108);call write~init~int(100, 108, 0, 1);call write~init~int(105, 108, 1, 1);call write~init~int(115, 108, 2, 1);call write~init~int(0, 108, 3, 1);call #Ultimate.allocInit(11, 109);call #Ultimate.allocInit(40, 110);call #Ultimate.allocInit(39, 111);call #Ultimate.allocInit(31, 112);call #Ultimate.allocInit(11, 113);call #Ultimate.allocInit(18, 114);call #Ultimate.allocInit(21, 115);call #Ultimate.allocInit(10, 116);call #Ultimate.allocInit(11, 117);~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~ldv_irq_1_0~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~pvscsi_pci_driver_group0~0.base, ~pvscsi_pci_driver_group0~0.offset := 0, 0;~ldv_state_variable_3~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~pvscsi_template_group0~0.base, ~pvscsi_template_group0~0.offset := 0, 0;~pvscsi_template_group1~0.base, ~pvscsi_template_group1~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~pvscsi_ring_pages~0 := 0;~pvscsi_msg_ring_pages~0 := 1;~pvscsi_cmd_per_lun~0 := 254;~pvscsi_disable_msi~0 := 0;~pvscsi_disable_msix~0 := 0;~pvscsi_use_msg~0 := 1;~pvscsi_use_req_threshold~0 := 1;~#pvscsi_pci_tbl~0.base, ~#pvscsi_pci_tbl~0.offset := 118, 0;call #Ultimate.allocInit(64, 118);call write~init~int(5549, ~#pvscsi_pci_tbl~0.base, ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(1984, ~#pvscsi_pci_tbl~0.base, 4 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#pvscsi_pci_tbl~0.base, 8 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#pvscsi_pci_tbl~0.base, 12 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 16 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 20 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 24 + ~#pvscsi_pci_tbl~0.offset, 8);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 32 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 36 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 40 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 44 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 48 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 52 + ~#pvscsi_pci_tbl~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_tbl~0.base, 56 + ~#pvscsi_pci_tbl~0.offset, 8);~__mod_pci__pvscsi_pci_tbl_device_table~0.vendor := 0;~__mod_pci__pvscsi_pci_tbl_device_table~0.device := 0;~__mod_pci__pvscsi_pci_tbl_device_table~0.subvendor := 0;~__mod_pci__pvscsi_pci_tbl_device_table~0.subdevice := 0;~__mod_pci__pvscsi_pci_tbl_device_table~0.class := 0;~__mod_pci__pvscsi_pci_tbl_device_table~0.class_mask := 0;~__mod_pci__pvscsi_pci_tbl_device_table~0.driver_data := 0;~#pvscsi_template~0.base, ~#pvscsi_template~0.offset := 119, 0;call #Ultimate.allocInit(337, 119);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#pvscsi_template~0.base, ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(69, 0, ~#pvscsi_template~0.base, 8 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 16 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 24 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_info.base, #funAddr~pvscsi_info.offset, ~#pvscsi_template~0.base, 32 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 40 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 48 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_queue.base, #funAddr~pvscsi_queue.offset, ~#pvscsi_template~0.base, 56 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 64 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_abort.base, #funAddr~pvscsi_abort.offset, ~#pvscsi_template~0.base, 72 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_device_reset.base, #funAddr~pvscsi_device_reset.offset, ~#pvscsi_template~0.base, 80 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 88 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_bus_reset.base, #funAddr~pvscsi_bus_reset.offset, ~#pvscsi_template~0.base, 96 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_host_reset.base, #funAddr~pvscsi_host_reset.offset, ~#pvscsi_template~0.base, 104 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 112 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 120 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 128 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 136 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 144 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 152 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 160 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_change_queue_depth.base, #funAddr~pvscsi_change_queue_depth.offset, ~#pvscsi_template~0.base, 168 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 176 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 184 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 192 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 200 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 208 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 216 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 224 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(70, 0, ~#pvscsi_template~0.base, 232 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 240 + ~#pvscsi_template~0.offset, 8);call write~init~int(0, ~#pvscsi_template~0.base, 248 + ~#pvscsi_template~0.offset, 4);call write~init~int(-1, ~#pvscsi_template~0.base, 252 + ~#pvscsi_template~0.offset, 4);call write~init~int(128, ~#pvscsi_template~0.base, 256 + ~#pvscsi_template~0.offset, 2);call write~init~int(0, ~#pvscsi_template~0.base, 258 + ~#pvscsi_template~0.offset, 2);call write~init~int(65535, ~#pvscsi_template~0.base, 260 + ~#pvscsi_template~0.offset, 2);call write~init~int(4294967295, ~#pvscsi_template~0.base, 262 + ~#pvscsi_template~0.offset, 8);call write~init~int(0, ~#pvscsi_template~0.base, 270 + ~#pvscsi_template~0.offset, 2);call write~init~int(0, ~#pvscsi_template~0.base, 272 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 273 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 274 + ~#pvscsi_template~0.offset, 1);call write~init~int(1, ~#pvscsi_template~0.base, 275 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 276 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 277 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 278 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 279 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 280 + ~#pvscsi_template~0.offset, 1);call write~init~int(0, ~#pvscsi_template~0.base, 281 + ~#pvscsi_template~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 285 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 293 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 301 + ~#pvscsi_template~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 309 + ~#pvscsi_template~0.offset, 8);call write~init~int(0, ~#pvscsi_template~0.base, 317 + ~#pvscsi_template~0.offset, 8);call write~init~int(0, ~#pvscsi_template~0.base, 325 + ~#pvscsi_template~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pvscsi_template~0.base, 329 + ~#pvscsi_template~0.offset, 8);~#pvscsi_pci_driver~0.base, ~#pvscsi_pci_driver~0.offset := 120, 0;call #Ultimate.allocInit(301, 120);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 8 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(113, 0, ~#pvscsi_pci_driver~0.base, 16 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(~#pvscsi_pci_tbl~0.base, ~#pvscsi_pci_tbl~0.offset, ~#pvscsi_pci_driver~0.base, 24 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_probe.base, #funAddr~pvscsi_probe.offset, ~#pvscsi_pci_driver~0.base, 32 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_remove.base, #funAddr~pvscsi_remove.offset, ~#pvscsi_pci_driver~0.base, 40 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 48 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 56 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 64 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 72 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~pvscsi_shutdown.base, #funAddr~pvscsi_shutdown.offset, ~#pvscsi_pci_driver~0.base, 80 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 88 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 96 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 104 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 112 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 120 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 128 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~int(0, ~#pvscsi_pci_driver~0.base, 136 + ~#pvscsi_pci_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 137 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 145 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 153 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 161 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 169 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 177 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 185 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 193 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 201 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 209 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~int(0, ~#pvscsi_pci_driver~0.base, 217 + ~#pvscsi_pci_driver~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_driver~0.base, 221 + ~#pvscsi_pci_driver~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_driver~0.base, 225 + ~#pvscsi_pci_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 229 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 237 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 245 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 253 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 261 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~int(0, ~#pvscsi_pci_driver~0.base, 269 + ~#pvscsi_pci_driver~0.offset, 4);call write~init~int(0, ~#pvscsi_pci_driver~0.base, 273 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 285 + ~#pvscsi_pci_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#pvscsi_pci_driver~0.base, 293 + ~#pvscsi_pci_driver~0.offset, 8);~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_spin~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {1077#true} assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet853#1, main_#t~ret854#1.base, main_#t~ret854#1.offset, main_#t~nondet855#1, main_#t~ret856#1.base, main_#t~ret856#1.offset, main_#t~nondet857#1, main_#t~switch858#1, main_#t~nondet859#1, main_#t~switch860#1, main_#t~ret861#1, main_#t~nondet862#1, main_#t~switch863#1, main_#t~ret864#1, main_#t~ret865#1, main_#t~ret866#1, main_#t~ret867#1, main_#t~ret868#1, main_#t~ret869#1, main_#t~ret870#1.base, main_#t~ret870#1.offset, main_#t~nondet871#1, main_#t~switch872#1, main_#t~ret873#1, main_~ldvarg1~0#1, main_~tmp~57#1, main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset, main_~tmp___0~22#1.base, main_~tmp___0~22#1.offset, main_~ldvarg2~0#1, main_~tmp___1~8#1, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset, main_~tmp___2~4#1.base, main_~tmp___2~4#1.offset, main_~tmp___3~3#1, main_~tmp___4~2#1, main_~tmp___5~2#1, main_~tmp___6~2#1;havoc main_~ldvarg1~0#1;havoc main_~tmp~57#1;havoc main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset;havoc main_~tmp___0~22#1.base, main_~tmp___0~22#1.offset;havoc main_~ldvarg2~0#1;havoc main_~tmp___1~8#1;havoc main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc main_~tmp___2~4#1.base, main_~tmp___2~4#1.offset;havoc main_~tmp___3~3#1;havoc main_~tmp___4~2#1;havoc main_~tmp___5~2#1;havoc main_~tmp___6~2#1;assume -2147483648 <= main_#t~nondet853#1 && main_#t~nondet853#1 <= 2147483647;main_~tmp~57#1 := main_#t~nondet853#1;havoc main_#t~nondet853#1;main_~ldvarg1~0#1 := main_~tmp~57#1; {1077#true} is VALID [2022-02-20 22:01:46,864 INFO L272 TraceCheckUtils]: 2: Hoare triple {1077#true} call main_#t~ret854#1.base, main_#t~ret854#1.offset := ldv_zalloc(3488); {1230#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:01:46,864 INFO L290 TraceCheckUtils]: 3: Hoare triple {1230#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet72#1 && #t~nondet72#1 <= 2147483647;~tmp___0~1#1 := #t~nondet72#1;havoc #t~nondet72#1; {1077#true} is VALID [2022-02-20 22:01:46,865 INFO L290 TraceCheckUtils]: 4: Hoare triple {1077#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,865 INFO L290 TraceCheckUtils]: 5: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,865 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {1077#true} {1077#true} #2745#return; {1077#true} is VALID [2022-02-20 22:01:46,865 INFO L290 TraceCheckUtils]: 7: Hoare triple {1077#true} main_~tmp___0~22#1.base, main_~tmp___0~22#1.offset := main_#t~ret854#1.base, main_#t~ret854#1.offset;havoc main_#t~ret854#1.base, main_#t~ret854#1.offset;main_~ldvarg0~0#1.base, main_~ldvarg0~0#1.offset := main_~tmp___0~22#1.base, main_~tmp___0~22#1.offset;assume -2147483648 <= main_#t~nondet855#1 && main_#t~nondet855#1 <= 2147483647;main_~tmp___1~8#1 := main_#t~nondet855#1;havoc main_#t~nondet855#1;main_~ldvarg2~0#1 := main_~tmp___1~8#1; {1077#true} is VALID [2022-02-20 22:01:46,866 INFO L272 TraceCheckUtils]: 8: Hoare triple {1077#true} call main_#t~ret856#1.base, main_#t~ret856#1.offset := ldv_zalloc(32); {1230#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:01:46,866 INFO L290 TraceCheckUtils]: 9: Hoare triple {1230#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |old(#valid)| |#valid|))} ~size#1 := #in~size#1;havoc ~p~1#1.base, ~p~1#1.offset;havoc ~tmp~5#1.base, ~tmp~5#1.offset;havoc ~tmp___0~1#1;assume -2147483648 <= #t~nondet72#1 && #t~nondet72#1 <= 2147483647;~tmp___0~1#1 := #t~nondet72#1;havoc #t~nondet72#1; {1077#true} is VALID [2022-02-20 22:01:46,866 INFO L290 TraceCheckUtils]: 10: Hoare triple {1077#true} assume 0 != ~tmp___0~1#1;#res#1.base, #res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,867 INFO L290 TraceCheckUtils]: 11: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,867 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {1077#true} {1077#true} #2747#return; {1077#true} is VALID [2022-02-20 22:01:46,867 INFO L290 TraceCheckUtils]: 13: Hoare triple {1077#true} main_~tmp___2~4#1.base, main_~tmp___2~4#1.offset := main_#t~ret856#1.base, main_#t~ret856#1.offset;havoc main_#t~ret856#1.base, main_#t~ret856#1.offset;main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset := main_~tmp___2~4#1.base, main_~tmp___2~4#1.offset;assume { :begin_inline_ldv_initialize } true; {1077#true} is VALID [2022-02-20 22:01:46,868 INFO L290 TraceCheckUtils]: 14: Hoare triple {1077#true} assume { :end_inline_ldv_initialize } true;~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_3~0 := 0;~ldv_state_variable_2~0 := 0; {1087#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 22:01:46,868 INFO L290 TraceCheckUtils]: 15: Hoare triple {1087#(= ~ldv_state_variable_2~0 0)} assume -2147483648 <= main_#t~nondet857#1 && main_#t~nondet857#1 <= 2147483647;main_~tmp___3~3#1 := main_#t~nondet857#1;havoc main_#t~nondet857#1;main_#t~switch858#1 := 0 == main_~tmp___3~3#1; {1087#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 22:01:46,868 INFO L290 TraceCheckUtils]: 16: Hoare triple {1087#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch858#1;main_#t~switch858#1 := main_#t~switch858#1 || 1 == main_~tmp___3~3#1; {1087#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 22:01:46,869 INFO L290 TraceCheckUtils]: 17: Hoare triple {1087#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch858#1;main_#t~switch858#1 := main_#t~switch858#1 || 2 == main_~tmp___3~3#1; {1087#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 22:01:46,869 INFO L290 TraceCheckUtils]: 18: Hoare triple {1087#(= ~ldv_state_variable_2~0 0)} assume !main_#t~switch858#1;main_#t~switch858#1 := main_#t~switch858#1 || 3 == main_~tmp___3~3#1; {1087#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 22:01:46,870 INFO L290 TraceCheckUtils]: 19: Hoare triple {1087#(= ~ldv_state_variable_2~0 0)} assume main_#t~switch858#1; {1087#(= ~ldv_state_variable_2~0 0)} is VALID [2022-02-20 22:01:46,870 INFO L290 TraceCheckUtils]: 20: Hoare triple {1087#(= ~ldv_state_variable_2~0 0)} assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= main_#t~nondet871#1 && main_#t~nondet871#1 <= 2147483647;main_~tmp___6~2#1 := main_#t~nondet871#1;havoc main_#t~nondet871#1;main_#t~switch872#1 := 0 == main_~tmp___6~2#1; {1078#false} is VALID [2022-02-20 22:01:46,870 INFO L290 TraceCheckUtils]: 21: Hoare triple {1078#false} assume main_#t~switch872#1; {1078#false} is VALID [2022-02-20 22:01:46,871 INFO L290 TraceCheckUtils]: 22: Hoare triple {1078#false} assume 1 == ~ldv_state_variable_2~0;assume { :begin_inline_pvscsi_probe } true;pvscsi_probe_#in~pdev#1.base, pvscsi_probe_#in~pdev#1.offset, pvscsi_probe_#in~id#1.base, pvscsi_probe_#in~id#1.offset := ~pvscsi_pci_driver_group0~0.base, ~pvscsi_pci_driver_group0~0.offset, main_~ldvarg3~0#1.base, main_~ldvarg3~0#1.offset;havoc pvscsi_probe_#res#1;havoc pvscsi_probe_#t~ret762#1, pvscsi_probe_#t~ret763#1, pvscsi_probe_#t~ret764#1, pvscsi_probe_#t~nondet765#1, pvscsi_probe_#t~ret766#1, pvscsi_probe_#t~ret767#1, pvscsi_probe_#t~nondet768#1, pvscsi_probe_#t~nondet769#1, pvscsi_probe_#t~nondet770#1, pvscsi_probe_#t~memset~res771#1.base, pvscsi_probe_#t~memset~res771#1.offset, pvscsi_probe_#t~mem772#1, pvscsi_probe_#t~ret773#1, pvscsi_probe_#t~nondet774#1, pvscsi_probe_#t~mem775#1, pvscsi_probe_#t~mem776#1, pvscsi_probe_#t~mem777#1, pvscsi_probe_#t~mem778#1, pvscsi_probe_#t~short779#1, pvscsi_probe_#t~mem780#1, pvscsi_probe_#t~mem781#1, pvscsi_probe_#t~short782#1, pvscsi_probe_#t~nondet783#1, pvscsi_probe_#t~ret784#1.base, pvscsi_probe_#t~ret784#1.offset, pvscsi_probe_#t~mem785#1.base, pvscsi_probe_#t~mem785#1.offset, pvscsi_probe_#t~nondet786#1, pvscsi_probe_#t~ret787#1, pvscsi_probe_#t~nondet788#1, pvscsi_probe_#t~ite789#1, pvscsi_probe_#t~nondet790#1, pvscsi_probe_#t~ite791#1, pvscsi_probe_#t~mem792#1, pvscsi_probe_#t~ite793#1, pvscsi_probe_#t~ret794#1.base, pvscsi_probe_#t~ret794#1.offset, pvscsi_probe_#t~nondet795#1, pvscsi_probe_#t~ret796#1.base, pvscsi_probe_#t~ret796#1.offset, pvscsi_probe_#t~memset~res797#1.base, pvscsi_probe_#t~memset~res797#1.offset, pvscsi_probe_#t~mem798#1, pvscsi_probe_#t~mem799#1.base, pvscsi_probe_#t~mem799#1.offset, pvscsi_probe_#t~ret800#1.base, pvscsi_probe_#t~ret800#1.offset, pvscsi_probe_#t~ret801#1, pvscsi_probe_#t~ret802#1, pvscsi_probe_#t~nondet803#1, pvscsi_probe_#t~mem804#1, pvscsi_probe_#t~ret805#1.base, pvscsi_probe_#t~ret805#1.offset, pvscsi_probe_#t~mem806#1.base, pvscsi_probe_#t~mem806#1.offset, pvscsi_probe_#t~nondet807#1, pvscsi_probe_#t~mem808#1.base, pvscsi_probe_#t~mem808#1.offset, pvscsi_probe_#t~mem809#1, pvscsi_probe_#t~ret810#1, pvscsi_probe_#t~nondet811#1, pvscsi_probe_#t~ret812#1, pvscsi_probe_#t~nondet813#1, pvscsi_probe_#t~ret814#1, pvscsi_probe_#t~nondet815#1, pvscsi_probe_#t~mem816#1, pvscsi_probe_#t~nondet817#1, pvscsi_probe_#t~mem818#1, pvscsi_probe_#t~nondet819#1, pvscsi_probe_#t~mem820#1, pvscsi_probe_#t~ret821#1, pvscsi_probe_#t~nondet822#1, pvscsi_probe_#t~mem823#1, pvscsi_probe_#t~ite824#1.base, pvscsi_probe_#t~ite824#1.offset, pvscsi_probe_#t~mem825#1, pvscsi_probe_#t~ret826#1, pvscsi_probe_#t~nondet827#1, pvscsi_probe_#t~ret828#1, pvscsi_probe_#t~nondet829#1, pvscsi_probe_#t~nondet830#1, pvscsi_probe_#t~mem831#1, pvscsi_probe_#t~mem832#1, pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, pvscsi_probe_~id#1.base, pvscsi_probe_~id#1.offset, pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset, pvscsi_probe_~#adapter_temp~0#1.base, pvscsi_probe_~#adapter_temp~0#1.offset, pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset, pvscsi_probe_~i~6#1, pvscsi_probe_~flags~6#1, pvscsi_probe_~error~0#1, pvscsi_probe_~max_id~0#1, pvscsi_probe_~tmp~49#1, pvscsi_probe_~tmp___0~18#1, pvscsi_probe_~tmp___1~7#1, pvscsi_probe_~tmp___2~3#1, pvscsi_probe_~tmp___3~2#1, pvscsi_probe_~tmp___4~1#1, pvscsi_probe_~tmp___5~1#1.base, pvscsi_probe_~tmp___5~1#1.offset, pvscsi_probe_~_min1~1#1, pvscsi_probe_~_min2~1#1, pvscsi_probe_~_min1___0~1#1, pvscsi_probe_~_min2___0~1#1, pvscsi_probe_~tmp___6~1#1.base, pvscsi_probe_~tmp___6~1#1.offset, pvscsi_probe_~#__key~2#1.base, pvscsi_probe_~#__key~2#1.offset, pvscsi_probe_~tmp___7~0#1, pvscsi_probe_~tmp___8~0#1.base, pvscsi_probe_~tmp___8~0#1.offset, pvscsi_probe_~ctx~8#1.base, pvscsi_probe_~ctx~8#1.offset, pvscsi_probe_~tmp___9~0#1, pvscsi_probe_~tmp___10~0#1;pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset := pvscsi_probe_#in~pdev#1.base, pvscsi_probe_#in~pdev#1.offset;pvscsi_probe_~id#1.base, pvscsi_probe_~id#1.offset := pvscsi_probe_#in~id#1.base, pvscsi_probe_#in~id#1.offset;havoc pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset;call pvscsi_probe_~#adapter_temp~0#1.base, pvscsi_probe_~#adapter_temp~0#1.offset := #Ultimate.allocOnStack(289);havoc pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset;havoc pvscsi_probe_~i~6#1;havoc pvscsi_probe_~flags~6#1;havoc pvscsi_probe_~error~0#1;havoc pvscsi_probe_~max_id~0#1;havoc pvscsi_probe_~tmp~49#1;havoc pvscsi_probe_~tmp___0~18#1;havoc pvscsi_probe_~tmp___1~7#1;havoc pvscsi_probe_~tmp___2~3#1;havoc pvscsi_probe_~tmp___3~2#1;havoc pvscsi_probe_~tmp___4~1#1;havoc pvscsi_probe_~tmp___5~1#1.base, pvscsi_probe_~tmp___5~1#1.offset;havoc pvscsi_probe_~_min1~1#1;havoc pvscsi_probe_~_min2~1#1;havoc pvscsi_probe_~_min1___0~1#1;havoc pvscsi_probe_~_min2___0~1#1;havoc pvscsi_probe_~tmp___6~1#1.base, pvscsi_probe_~tmp___6~1#1.offset;call pvscsi_probe_~#__key~2#1.base, pvscsi_probe_~#__key~2#1.offset := #Ultimate.allocOnStack(8);havoc pvscsi_probe_~tmp___7~0#1;havoc pvscsi_probe_~tmp___8~0#1.base, pvscsi_probe_~tmp___8~0#1.offset;havoc pvscsi_probe_~ctx~8#1.base, pvscsi_probe_~ctx~8#1.offset;havoc pvscsi_probe_~tmp___9~0#1;havoc pvscsi_probe_~tmp___10~0#1;pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset := 0, 0;pvscsi_probe_~flags~6#1 := 0;pvscsi_probe_~error~0#1 := -19;assume { :begin_inline_pci_enable_device } true;pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset := pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset;havoc pci_enable_device_#res#1;havoc pci_enable_device_#t~nondet896#1, pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset;pci_enable_device_~arg0#1.base, pci_enable_device_~arg0#1.offset := pci_enable_device_#in~arg0#1.base, pci_enable_device_#in~arg0#1.offset;assume -2147483648 <= pci_enable_device_#t~nondet896#1 && pci_enable_device_#t~nondet896#1 <= 2147483647;pci_enable_device_#res#1 := pci_enable_device_#t~nondet896#1;havoc pci_enable_device_#t~nondet896#1; {1078#false} is VALID [2022-02-20 22:01:46,871 INFO L290 TraceCheckUtils]: 23: Hoare triple {1078#false} pvscsi_probe_#t~ret762#1 := pci_enable_device_#res#1;assume { :end_inline_pci_enable_device } true;assume -2147483648 <= pvscsi_probe_#t~ret762#1 && pvscsi_probe_#t~ret762#1 <= 2147483647;pvscsi_probe_~tmp~49#1 := pvscsi_probe_#t~ret762#1;havoc pvscsi_probe_#t~ret762#1; {1078#false} is VALID [2022-02-20 22:01:46,871 INFO L290 TraceCheckUtils]: 24: Hoare triple {1078#false} assume !(0 != pvscsi_probe_~tmp~49#1); {1078#false} is VALID [2022-02-20 22:01:46,872 INFO L272 TraceCheckUtils]: 25: Hoare triple {1078#false} call pvscsi_probe_#t~ret763#1 := pci_set_dma_mask(pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, 18446744073709551615); {1077#true} is VALID [2022-02-20 22:01:46,872 INFO L290 TraceCheckUtils]: 26: Hoare triple {1077#true} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~mask#1 := #in~mask#1;havoc ~tmp~19#1;assume { :begin_inline_dma_set_mask } true;dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset, dma_set_mask_#in~arg1#1 := ~dev#1.base, 147 + ~dev#1.offset, ~mask#1;havoc dma_set_mask_#res#1;havoc dma_set_mask_#t~nondet891#1, dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset, dma_set_mask_~arg1#1;dma_set_mask_~arg0#1.base, dma_set_mask_~arg0#1.offset := dma_set_mask_#in~arg0#1.base, dma_set_mask_#in~arg0#1.offset;dma_set_mask_~arg1#1 := dma_set_mask_#in~arg1#1;assume -2147483648 <= dma_set_mask_#t~nondet891#1 && dma_set_mask_#t~nondet891#1 <= 2147483647;dma_set_mask_#res#1 := dma_set_mask_#t~nondet891#1;havoc dma_set_mask_#t~nondet891#1; {1077#true} is VALID [2022-02-20 22:01:46,872 INFO L290 TraceCheckUtils]: 27: Hoare triple {1077#true} #t~ret208#1 := dma_set_mask_#res#1;assume { :end_inline_dma_set_mask } true;assume -2147483648 <= #t~ret208#1 && #t~ret208#1 <= 2147483647;~tmp~19#1 := #t~ret208#1;havoc #t~ret208#1;#res#1 := ~tmp~19#1; {1077#true} is VALID [2022-02-20 22:01:46,872 INFO L290 TraceCheckUtils]: 28: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,872 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {1077#true} {1078#false} #2881#return; {1078#false} is VALID [2022-02-20 22:01:46,873 INFO L290 TraceCheckUtils]: 30: Hoare triple {1078#false} assume -2147483648 <= pvscsi_probe_#t~ret763#1 && pvscsi_probe_#t~ret763#1 <= 2147483647;pvscsi_probe_~tmp___2~3#1 := pvscsi_probe_#t~ret763#1;havoc pvscsi_probe_#t~ret763#1; {1078#false} is VALID [2022-02-20 22:01:46,873 INFO L290 TraceCheckUtils]: 31: Hoare triple {1078#false} assume 0 == pvscsi_probe_~tmp___2~3#1; {1078#false} is VALID [2022-02-20 22:01:46,873 INFO L272 TraceCheckUtils]: 32: Hoare triple {1078#false} call pvscsi_probe_#t~ret764#1 := pci_set_consistent_dma_mask(pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, 18446744073709551615); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,873 INFO L290 TraceCheckUtils]: 33: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} ~dev#1.base, ~dev#1.offset := #in~dev#1.base, #in~dev#1.offset;~mask#1 := #in~mask#1;havoc ~tmp~20#1;assume { :begin_inline_dma_set_coherent_mask } true;dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset, dma_set_coherent_mask_#in~mask#1 := ~dev#1.base, 147 + ~dev#1.offset, ~mask#1;havoc dma_set_coherent_mask_#res#1;havoc dma_set_coherent_mask_#t~ret201#1, dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1, dma_set_coherent_mask_~tmp~16#1;dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset := dma_set_coherent_mask_#in~dev#1.base, dma_set_coherent_mask_#in~dev#1.offset;dma_set_coherent_mask_~mask#1 := dma_set_coherent_mask_#in~mask#1;havoc dma_set_coherent_mask_~tmp~16#1;assume { :begin_inline_dma_supported } true;dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset, dma_supported_#in~arg1#1 := dma_set_coherent_mask_~dev#1.base, dma_set_coherent_mask_~dev#1.offset, dma_set_coherent_mask_~mask#1;havoc dma_supported_#res#1;havoc dma_supported_#t~nondet892#1, dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset, dma_supported_~arg1#1;dma_supported_~arg0#1.base, dma_supported_~arg0#1.offset := dma_supported_#in~arg0#1.base, dma_supported_#in~arg0#1.offset;dma_supported_~arg1#1 := dma_supported_#in~arg1#1;assume -2147483648 <= dma_supported_#t~nondet892#1 && dma_supported_#t~nondet892#1 <= 2147483647;dma_supported_#res#1 := dma_supported_#t~nondet892#1;havoc dma_supported_#t~nondet892#1; {1077#true} is VALID [2022-02-20 22:01:46,873 INFO L290 TraceCheckUtils]: 34: Hoare triple {1077#true} dma_set_coherent_mask_#t~ret201#1 := dma_supported_#res#1;assume { :end_inline_dma_supported } true;assume -2147483648 <= dma_set_coherent_mask_#t~ret201#1 && dma_set_coherent_mask_#t~ret201#1 <= 2147483647;dma_set_coherent_mask_~tmp~16#1 := dma_set_coherent_mask_#t~ret201#1;havoc dma_set_coherent_mask_#t~ret201#1; {1077#true} is VALID [2022-02-20 22:01:46,874 INFO L290 TraceCheckUtils]: 35: Hoare triple {1077#true} assume 0 == dma_set_coherent_mask_~tmp~16#1;dma_set_coherent_mask_#res#1 := -5; {1077#true} is VALID [2022-02-20 22:01:46,874 INFO L290 TraceCheckUtils]: 36: Hoare triple {1077#true} #t~ret209#1 := dma_set_coherent_mask_#res#1;assume { :end_inline_dma_set_coherent_mask } true;assume -2147483648 <= #t~ret209#1 && #t~ret209#1 <= 2147483647;~tmp~20#1 := #t~ret209#1;havoc #t~ret209#1;#res#1 := ~tmp~20#1; {1077#true} is VALID [2022-02-20 22:01:46,874 INFO L290 TraceCheckUtils]: 37: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,874 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {1077#true} {1078#false} #2883#return; {1078#false} is VALID [2022-02-20 22:01:46,874 INFO L290 TraceCheckUtils]: 39: Hoare triple {1078#false} assume -2147483648 <= pvscsi_probe_#t~ret764#1 && pvscsi_probe_#t~ret764#1 <= 2147483647;pvscsi_probe_~tmp___3~2#1 := pvscsi_probe_#t~ret764#1;havoc pvscsi_probe_#t~ret764#1; {1078#false} is VALID [2022-02-20 22:01:46,875 INFO L290 TraceCheckUtils]: 40: Hoare triple {1078#false} assume 0 == pvscsi_probe_~tmp___3~2#1;havoc pvscsi_probe_#t~nondet765#1; {1078#false} is VALID [2022-02-20 22:01:46,875 INFO L290 TraceCheckUtils]: 41: Hoare triple {1078#false} pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset := pvscsi_probe_~#adapter_temp~0#1.base, pvscsi_probe_~#adapter_temp~0#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,875 INFO L272 TraceCheckUtils]: 42: Hoare triple {1078#false} call pvscsi_probe_#t~memset~res771#1.base, pvscsi_probe_#t~memset~res771#1.offset := #Ultimate.C_memset(pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset, 0, 312); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,875 INFO L290 TraceCheckUtils]: 43: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,875 INFO L290 TraceCheckUtils]: 44: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,876 INFO L290 TraceCheckUtils]: 45: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,876 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {1077#true} {1078#false} #2889#return; {1078#false} is VALID [2022-02-20 22:01:46,876 INFO L290 TraceCheckUtils]: 47: Hoare triple {1078#false} havoc pvscsi_probe_#t~memset~res771#1.base, pvscsi_probe_#t~memset~res771#1.offset;call write~$Pointer$(pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, pvscsi_probe_~adapter~8#1.base, 249 + pvscsi_probe_~adapter~8#1.offset, 8);call pvscsi_probe_#t~mem772#1 := read~int(pvscsi_probe_~pdev#1.base, 72 + pvscsi_probe_~pdev#1.offset, 1);call write~int(pvscsi_probe_#t~mem772#1, pvscsi_probe_~adapter~8#1.base, 12 + pvscsi_probe_~adapter~8#1.offset, 1);havoc pvscsi_probe_#t~mem772#1;assume { :begin_inline_pci_request_regions } true;pci_request_regions_#in~arg0#1.base, pci_request_regions_#in~arg0#1.offset, pci_request_regions_#in~arg1#1.base, pci_request_regions_#in~arg1#1.offset := pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, 91, 0;havoc pci_request_regions_#res#1;havoc pci_request_regions_#t~nondet900#1, pci_request_regions_~arg0#1.base, pci_request_regions_~arg0#1.offset, pci_request_regions_~arg1#1.base, pci_request_regions_~arg1#1.offset;pci_request_regions_~arg0#1.base, pci_request_regions_~arg0#1.offset := pci_request_regions_#in~arg0#1.base, pci_request_regions_#in~arg0#1.offset;pci_request_regions_~arg1#1.base, pci_request_regions_~arg1#1.offset := pci_request_regions_#in~arg1#1.base, pci_request_regions_#in~arg1#1.offset;assume -2147483648 <= pci_request_regions_#t~nondet900#1 && pci_request_regions_#t~nondet900#1 <= 2147483647;pci_request_regions_#res#1 := pci_request_regions_#t~nondet900#1;havoc pci_request_regions_#t~nondet900#1; {1078#false} is VALID [2022-02-20 22:01:46,876 INFO L290 TraceCheckUtils]: 48: Hoare triple {1078#false} pvscsi_probe_#t~ret773#1 := pci_request_regions_#res#1;assume { :end_inline_pci_request_regions } true;assume -2147483648 <= pvscsi_probe_#t~ret773#1 && pvscsi_probe_#t~ret773#1 <= 2147483647;pvscsi_probe_~tmp___4~1#1 := pvscsi_probe_#t~ret773#1;havoc pvscsi_probe_#t~ret773#1; {1078#false} is VALID [2022-02-20 22:01:46,876 INFO L290 TraceCheckUtils]: 49: Hoare triple {1078#false} assume !(0 != pvscsi_probe_~tmp___4~1#1);pvscsi_probe_~i~6#1 := 0; {1078#false} is VALID [2022-02-20 22:01:46,877 INFO L290 TraceCheckUtils]: 50: Hoare triple {1078#false} assume !(pvscsi_probe_~i~6#1 % 4294967296 <= 16); {1078#false} is VALID [2022-02-20 22:01:46,877 INFO L290 TraceCheckUtils]: 51: Hoare triple {1078#false} assume !(17 == pvscsi_probe_~i~6#1 % 4294967296);assume { :begin_inline_pci_iomap } true;pci_iomap_#in~arg0#1.base, pci_iomap_#in~arg0#1.offset, pci_iomap_#in~arg1#1, pci_iomap_#in~arg2#1 := pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, (if pvscsi_probe_~i~6#1 % 4294967296 % 4294967296 <= 2147483647 then pvscsi_probe_~i~6#1 % 4294967296 % 4294967296 else pvscsi_probe_~i~6#1 % 4294967296 % 4294967296 - 4294967296), 32768;havoc pci_iomap_#res#1.base, pci_iomap_#res#1.offset;havoc pci_iomap_#t~ret899#1.base, pci_iomap_#t~ret899#1.offset, pci_iomap_~arg0#1.base, pci_iomap_~arg0#1.offset, pci_iomap_~arg1#1, pci_iomap_~arg2#1;pci_iomap_~arg0#1.base, pci_iomap_~arg0#1.offset := pci_iomap_#in~arg0#1.base, pci_iomap_#in~arg0#1.offset;pci_iomap_~arg1#1 := pci_iomap_#in~arg1#1;pci_iomap_~arg2#1 := pci_iomap_#in~arg2#1; {1078#false} is VALID [2022-02-20 22:01:46,877 INFO L272 TraceCheckUtils]: 52: Hoare triple {1078#false} call pci_iomap_#t~ret899#1.base, pci_iomap_#t~ret899#1.offset := ldv_malloc(pci_iomap_~arg2#1); {1232#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:01:46,877 INFO L290 TraceCheckUtils]: 53: Hoare triple {1232#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet70 && #t~nondet70 <= 2147483647;~tmp___0~0 := #t~nondet70;havoc #t~nondet70; {1077#true} is VALID [2022-02-20 22:01:46,878 INFO L290 TraceCheckUtils]: 54: Hoare triple {1077#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,878 INFO L290 TraceCheckUtils]: 55: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,878 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {1077#true} {1078#false} #2891#return; {1078#false} is VALID [2022-02-20 22:01:46,878 INFO L290 TraceCheckUtils]: 57: Hoare triple {1078#false} pci_iomap_#res#1.base, pci_iomap_#res#1.offset := pci_iomap_#t~ret899#1.base, pci_iomap_#t~ret899#1.offset;havoc pci_iomap_#t~ret899#1.base, pci_iomap_#t~ret899#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,878 INFO L290 TraceCheckUtils]: 58: Hoare triple {1078#false} pvscsi_probe_#t~ret784#1.base, pvscsi_probe_#t~ret784#1.offset := pci_iomap_#res#1.base, pci_iomap_#res#1.offset;assume { :end_inline_pci_iomap } true;pvscsi_probe_~tmp___5~1#1.base, pvscsi_probe_~tmp___5~1#1.offset := pvscsi_probe_#t~ret784#1.base, pvscsi_probe_#t~ret784#1.offset;havoc pvscsi_probe_#t~ret784#1.base, pvscsi_probe_#t~ret784#1.offset;call write~$Pointer$(pvscsi_probe_~tmp___5~1#1.base, pvscsi_probe_~tmp___5~1#1.offset, pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset, 8);call pvscsi_probe_#t~mem785#1.base, pvscsi_probe_#t~mem785#1.offset := read~$Pointer$(pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset, 8); {1078#false} is VALID [2022-02-20 22:01:46,879 INFO L290 TraceCheckUtils]: 59: Hoare triple {1078#false} assume !(0 == (pvscsi_probe_#t~mem785#1.base + pvscsi_probe_#t~mem785#1.offset) % 18446744073709551616);havoc pvscsi_probe_#t~mem785#1.base, pvscsi_probe_#t~mem785#1.offset;assume { :begin_inline_pci_set_master } true;pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset := pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset;havoc pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset;pci_set_master_~arg0#1.base, pci_set_master_~arg0#1.offset := pci_set_master_#in~arg0#1.base, pci_set_master_#in~arg0#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,879 INFO L290 TraceCheckUtils]: 60: Hoare triple {1078#false} assume { :end_inline_pci_set_master } true;assume { :begin_inline_pvscsi_get_max_targets } true;pvscsi_get_max_targets_#in~adapter#1.base, pvscsi_get_max_targets_#in~adapter#1.offset := pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset;havoc pvscsi_get_max_targets_#res#1;havoc pvscsi_get_max_targets_#t~ret745#1.base, pvscsi_get_max_targets_#t~ret745#1.offset, pvscsi_get_max_targets_#t~mem746#1.base, pvscsi_get_max_targets_#t~mem746#1.offset, pvscsi_get_max_targets_#t~ret747#1.base, pvscsi_get_max_targets_#t~ret747#1.offset, pvscsi_get_max_targets_#t~nondet748#1, pvscsi_get_max_targets_#t~mem749#1, pvscsi_get_max_targets_#t~ret750#1, pvscsi_get_max_targets_#t~mem751#1, pvscsi_get_max_targets_#t~memset~res752#1.base, pvscsi_get_max_targets_#t~memset~res752#1.offset, pvscsi_get_max_targets_#t~mem753#1, pvscsi_get_max_targets_#t~mem754#1, pvscsi_get_max_targets_#t~short755#1, pvscsi_get_max_targets_#t~mem756#1, pvscsi_get_max_targets_#t~nondet757#1, pvscsi_get_max_targets_#t~mem758#1, pvscsi_get_max_targets_#t~mem759#1, pvscsi_get_max_targets_#t~mem760#1.base, pvscsi_get_max_targets_#t~mem760#1.offset, pvscsi_get_max_targets_#t~mem761#1, pvscsi_get_max_targets_~adapter#1.base, pvscsi_get_max_targets_~adapter#1.offset, pvscsi_get_max_targets_~#cmd~6#1.base, pvscsi_get_max_targets_~#cmd~6#1.offset, pvscsi_get_max_targets_~header~0#1.base, pvscsi_get_max_targets_~header~0#1.offset, pvscsi_get_max_targets_~dev~0#1.base, pvscsi_get_max_targets_~dev~0#1.offset, pvscsi_get_max_targets_~#configPagePA~0#1.base, pvscsi_get_max_targets_~#configPagePA~0#1.offset, pvscsi_get_max_targets_~config_page~0#1.base, pvscsi_get_max_targets_~config_page~0#1.offset, pvscsi_get_max_targets_~numPhys~0#1, pvscsi_get_max_targets_~tmp~48#1, pvscsi_get_max_targets_~config~0#1.base, pvscsi_get_max_targets_~config~0#1.offset;pvscsi_get_max_targets_~adapter#1.base, pvscsi_get_max_targets_~adapter#1.offset := pvscsi_get_max_targets_#in~adapter#1.base, pvscsi_get_max_targets_#in~adapter#1.offset;call pvscsi_get_max_targets_~#cmd~6#1.base, pvscsi_get_max_targets_~#cmd~6#1.offset := #Ultimate.allocOnStack(24);havoc pvscsi_get_max_targets_~header~0#1.base, pvscsi_get_max_targets_~header~0#1.offset;havoc pvscsi_get_max_targets_~dev~0#1.base, pvscsi_get_max_targets_~dev~0#1.offset;call pvscsi_get_max_targets_~#configPagePA~0#1.base, pvscsi_get_max_targets_~#configPagePA~0#1.offset := #Ultimate.allocOnStack(8);havoc pvscsi_get_max_targets_~config_page~0#1.base, pvscsi_get_max_targets_~config_page~0#1.offset;havoc pvscsi_get_max_targets_~numPhys~0#1;havoc pvscsi_get_max_targets_~tmp~48#1;havoc pvscsi_get_max_targets_~config~0#1.base, pvscsi_get_max_targets_~config~0#1.offset;pvscsi_get_max_targets_~numPhys~0#1 := 16; {1078#false} is VALID [2022-02-20 22:01:46,879 INFO L272 TraceCheckUtils]: 61: Hoare triple {1078#false} call pvscsi_get_max_targets_#t~ret745#1.base, pvscsi_get_max_targets_#t~ret745#1.offset := pvscsi_dev(pvscsi_get_max_targets_~adapter#1.base, pvscsi_get_max_targets_~adapter#1.offset); {1077#true} is VALID [2022-02-20 22:01:46,879 INFO L290 TraceCheckUtils]: 62: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;call #t~mem244.base, #t~mem244.offset := read~$Pointer$(~adapter.base, 249 + ~adapter.offset, 8);#res.base, #res.offset := #t~mem244.base, 147 + #t~mem244.offset;havoc #t~mem244.base, #t~mem244.offset; {1077#true} is VALID [2022-02-20 22:01:46,879 INFO L290 TraceCheckUtils]: 63: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,880 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {1077#true} {1078#false} #2893#return; {1078#false} is VALID [2022-02-20 22:01:46,880 INFO L290 TraceCheckUtils]: 65: Hoare triple {1078#false} pvscsi_get_max_targets_~dev~0#1.base, pvscsi_get_max_targets_~dev~0#1.offset := pvscsi_get_max_targets_#t~ret745#1.base, pvscsi_get_max_targets_#t~ret745#1.offset;havoc pvscsi_get_max_targets_#t~ret745#1.base, pvscsi_get_max_targets_#t~ret745#1.offset;call pvscsi_get_max_targets_#t~mem746#1.base, pvscsi_get_max_targets_#t~mem746#1.offset := read~$Pointer$(pvscsi_get_max_targets_~adapter#1.base, 249 + pvscsi_get_max_targets_~adapter#1.offset, 8); {1078#false} is VALID [2022-02-20 22:01:46,880 INFO L272 TraceCheckUtils]: 66: Hoare triple {1078#false} call pvscsi_get_max_targets_#t~ret747#1.base, pvscsi_get_max_targets_#t~ret747#1.offset := pci_alloc_consistent(pvscsi_get_max_targets_#t~mem746#1.base, pvscsi_get_max_targets_#t~mem746#1.offset, 4096, pvscsi_get_max_targets_~#configPagePA~0#1.base, pvscsi_get_max_targets_~#configPagePA~0#1.offset); {1233#(and (= |old(abs_4957)| abs_4957) (= |old(abs_4953)| abs_4953) (= |old(abs_4974)| abs_4974))} is VALID [2022-02-20 22:01:46,880 INFO L290 TraceCheckUtils]: 67: Hoare triple {1233#(and (= |old(abs_4957)| abs_4957) (= |old(abs_4953)| abs_4953) (= |old(abs_4974)| abs_4974))} ~hwdev#1.base, ~hwdev#1.offset := #in~hwdev#1.base, #in~hwdev#1.offset;~size#1 := #in~size#1;~dma_handle#1.base, ~dma_handle#1.offset := #in~dma_handle#1.base, #in~dma_handle#1.offset;havoc ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,880 INFO L290 TraceCheckUtils]: 68: Hoare triple {1077#true} assume 0 != (~hwdev#1.base + ~hwdev#1.offset) % 18446744073709551616;#t~ite202#1.base, #t~ite202#1.offset := ~hwdev#1.base, 147 + ~hwdev#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,881 INFO L290 TraceCheckUtils]: 69: Hoare triple {1077#true} assume { :begin_inline_dma_alloc_attrs } true;dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset, dma_alloc_attrs_#in~size#1, dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset, dma_alloc_attrs_#in~gfp#1, dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset := #t~ite202#1.base, #t~ite202#1.offset, ~size#1, ~dma_handle#1.base, ~dma_handle#1.offset, 32, 0, 0;havoc dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset, dma_alloc_attrs_#t~ret176#1, dma_alloc_attrs_#t~mem177#1.base, dma_alloc_attrs_#t~mem177#1.offset, dma_alloc_attrs_#t~ret178#1, dma_alloc_attrs_#t~mem185#1.base, dma_alloc_attrs_#t~mem185#1.offset, dma_alloc_attrs_#t~ret186#1.base, dma_alloc_attrs_#t~ret186#1.offset, dma_alloc_attrs_#t~mem187#1, dma_alloc_attrs_#t~nondet175#1, dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, dma_alloc_attrs_~gfp#1, dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset, dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset, dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset, dma_alloc_attrs_~tmp___0~4#1, dma_alloc_attrs_~tmp___1~2#1;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset;dma_alloc_attrs_~size#1 := dma_alloc_attrs_#in~size#1;dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset := dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset;dma_alloc_attrs_~gfp#1 := dma_alloc_attrs_#in~gfp#1;dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset := dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset;havoc dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset;havoc dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset;havoc dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset;havoc dma_alloc_attrs_~tmp___0~4#1;havoc dma_alloc_attrs_~tmp___1~2#1; {1077#true} is VALID [2022-02-20 22:01:46,881 INFO L272 TraceCheckUtils]: 70: Hoare triple {1077#true} call dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset := get_dma_ops(dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset); {1077#true} is VALID [2022-02-20 22:01:46,881 INFO L290 TraceCheckUtils]: 71: Hoare triple {1077#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,881 INFO L272 TraceCheckUtils]: 72: Hoare triple {1077#true} call #t~ret136 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); {1077#true} is VALID [2022-02-20 22:01:46,881 INFO L290 TraceCheckUtils]: 73: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,882 INFO L290 TraceCheckUtils]: 74: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,882 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,882 INFO L290 TraceCheckUtils]: 76: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret136 && #t~ret136 <= 9223372036854775807;~tmp~10 := #t~ret136;havoc #t~ret136;#t~short138 := 0 != ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,882 INFO L290 TraceCheckUtils]: 77: Hoare triple {1077#true} assume #t~short138; {1077#true} is VALID [2022-02-20 22:01:46,882 INFO L290 TraceCheckUtils]: 78: Hoare triple {1077#true} assume #t~short138;havoc #t~mem137.base, #t~mem137.offset;havoc #t~short138;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,883 INFO L290 TraceCheckUtils]: 79: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,883 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {1077#true} {1077#true} #2735#return; {1077#true} is VALID [2022-02-20 22:01:46,883 INFO L290 TraceCheckUtils]: 81: Hoare triple {1077#true} dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset := dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset := dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,883 INFO L290 TraceCheckUtils]: 82: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~gfp#1;dma_alloc_attrs_~gfp#1 := 0; {1077#true} is VALID [2022-02-20 22:01:46,883 INFO L290 TraceCheckUtils]: 83: Hoare triple {1077#true} assume 0 == (dma_alloc_attrs_~dev#1.base + dma_alloc_attrs_~dev#1.offset) % 18446744073709551616;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := ~#x86_dma_fallback_dev~0.base, ~#x86_dma_fallback_dev~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,884 INFO L290 TraceCheckUtils]: 84: Hoare triple {1077#true} assume { :begin_inline_is_device_dma_capable } true;is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset;havoc is_device_dma_capable_#res#1;havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset, is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, is_device_dma_capable_#t~mem114#1, is_device_dma_capable_#t~short115#1, is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset;is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset := is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset;call is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != (is_device_dma_capable_#t~mem112#1.base + is_device_dma_capable_#t~mem112#1.offset) % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,884 INFO L290 TraceCheckUtils]: 85: Hoare triple {1077#true} assume is_device_dma_capable_#t~short115#1;call is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);call is_device_dma_capable_#t~mem114#1 := read~int(is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != is_device_dma_capable_#t~mem114#1 % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,884 INFO L290 TraceCheckUtils]: 86: Hoare triple {1077#true} is_device_dma_capable_#res#1 := (if is_device_dma_capable_#t~short115#1 then 1 else 0);havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset;havoc is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset;havoc is_device_dma_capable_#t~mem114#1;havoc is_device_dma_capable_#t~short115#1; {1077#true} is VALID [2022-02-20 22:01:46,884 INFO L290 TraceCheckUtils]: 87: Hoare triple {1077#true} dma_alloc_attrs_#t~ret176#1 := is_device_dma_capable_#res#1;assume { :end_inline_is_device_dma_capable } true;assume -2147483648 <= dma_alloc_attrs_#t~ret176#1 && dma_alloc_attrs_#t~ret176#1 <= 2147483647;dma_alloc_attrs_~tmp___0~4#1 := dma_alloc_attrs_#t~ret176#1;havoc dma_alloc_attrs_#t~ret176#1; {1077#true} is VALID [2022-02-20 22:01:46,884 INFO L290 TraceCheckUtils]: 88: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~tmp___0~4#1;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,885 INFO L290 TraceCheckUtils]: 89: Hoare triple {1077#true} #t~ret203#1.base, #t~ret203#1.offset := dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;assume { :end_inline_dma_alloc_attrs } true;~tmp~17#1.base, ~tmp~17#1.offset := #t~ret203#1.base, #t~ret203#1.offset;havoc #t~ite202#1.base, #t~ite202#1.offset;havoc #t~ret203#1.base, #t~ret203#1.offset;#res#1.base, #res#1.offset := ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,885 INFO L290 TraceCheckUtils]: 90: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,885 INFO L284 TraceCheckUtils]: 91: Hoare quadruple {1077#true} {1078#false} #2895#return; {1078#false} is VALID [2022-02-20 22:01:46,885 INFO L290 TraceCheckUtils]: 92: Hoare triple {1078#false} pvscsi_get_max_targets_~config_page~0#1.base, pvscsi_get_max_targets_~config_page~0#1.offset := pvscsi_get_max_targets_#t~ret747#1.base, pvscsi_get_max_targets_#t~ret747#1.offset;havoc pvscsi_get_max_targets_#t~mem746#1.base, pvscsi_get_max_targets_#t~mem746#1.offset;havoc pvscsi_get_max_targets_#t~ret747#1.base, pvscsi_get_max_targets_#t~ret747#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,885 INFO L290 TraceCheckUtils]: 93: Hoare triple {1078#false} assume 0 == (pvscsi_get_max_targets_~config_page~0#1.base + pvscsi_get_max_targets_~config_page~0#1.offset) % 18446744073709551616;havoc pvscsi_get_max_targets_#t~nondet748#1; {1078#false} is VALID [2022-02-20 22:01:46,886 INFO L290 TraceCheckUtils]: 94: Hoare triple {1078#false} pvscsi_get_max_targets_#res#1 := pvscsi_get_max_targets_~numPhys~0#1;call ULTIMATE.dealloc(pvscsi_get_max_targets_~#cmd~6#1.base, pvscsi_get_max_targets_~#cmd~6#1.offset);havoc pvscsi_get_max_targets_~#cmd~6#1.base, pvscsi_get_max_targets_~#cmd~6#1.offset;call ULTIMATE.dealloc(pvscsi_get_max_targets_~#configPagePA~0#1.base, pvscsi_get_max_targets_~#configPagePA~0#1.offset);havoc pvscsi_get_max_targets_~#configPagePA~0#1.base, pvscsi_get_max_targets_~#configPagePA~0#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,886 INFO L290 TraceCheckUtils]: 95: Hoare triple {1078#false} pvscsi_probe_#t~ret787#1 := pvscsi_get_max_targets_#res#1;assume { :end_inline_pvscsi_get_max_targets } true;pvscsi_probe_~max_id~0#1 := pvscsi_probe_#t~ret787#1;havoc pvscsi_probe_#t~ret787#1;havoc pvscsi_probe_#t~nondet788#1; {1078#false} is VALID [2022-02-20 22:01:46,886 INFO L290 TraceCheckUtils]: 96: Hoare triple {1078#false} assume !(0 == ~pvscsi_ring_pages~0); {1078#false} is VALID [2022-02-20 22:01:46,886 INFO L290 TraceCheckUtils]: 97: Hoare triple {1078#false} havoc pvscsi_probe_#t~nondet790#1;pvscsi_probe_~_min1~1#1 := 32;pvscsi_probe_~_min2~1#1 := ~pvscsi_ring_pages~0; {1078#false} is VALID [2022-02-20 22:01:46,886 INFO L290 TraceCheckUtils]: 98: Hoare triple {1078#false} assume pvscsi_probe_~_min1~1#1 < pvscsi_probe_~_min2~1#1;pvscsi_probe_#t~ite791#1 := pvscsi_probe_~_min1~1#1; {1078#false} is VALID [2022-02-20 22:01:46,887 INFO L290 TraceCheckUtils]: 99: Hoare triple {1078#false} call write~int((if 32 * pvscsi_probe_#t~ite791#1 % 4294967296 % 4294967296 <= 2147483647 then 32 * pvscsi_probe_#t~ite791#1 % 4294967296 % 4294967296 else 32 * pvscsi_probe_#t~ite791#1 % 4294967296 % 4294967296 - 4294967296), ~#pvscsi_template~0.base, 248 + ~#pvscsi_template~0.offset, 4);havoc pvscsi_probe_#t~ite791#1;call pvscsi_probe_#t~mem792#1 := read~int(~#pvscsi_template~0.base, 248 + ~#pvscsi_template~0.offset, 4);pvscsi_probe_~_min1___0~1#1 := pvscsi_probe_#t~mem792#1;havoc pvscsi_probe_#t~mem792#1;pvscsi_probe_~_min2___0~1#1 := ~pvscsi_cmd_per_lun~0; {1078#false} is VALID [2022-02-20 22:01:46,887 INFO L290 TraceCheckUtils]: 100: Hoare triple {1078#false} assume pvscsi_probe_~_min1___0~1#1 < pvscsi_probe_~_min2___0~1#1;pvscsi_probe_#t~ite793#1 := pvscsi_probe_~_min1___0~1#1; {1078#false} is VALID [2022-02-20 22:01:46,887 INFO L290 TraceCheckUtils]: 101: Hoare triple {1078#false} call write~int((if pvscsi_probe_#t~ite793#1 % 65536 <= 32767 then pvscsi_probe_#t~ite793#1 % 65536 else pvscsi_probe_#t~ite793#1 % 65536 - 65536), ~#pvscsi_template~0.base, 270 + ~#pvscsi_template~0.offset, 2);havoc pvscsi_probe_#t~ite793#1;assume { :begin_inline_ldv_scsi_host_alloc_23 } true;ldv_scsi_host_alloc_23_#in~sht#1.base, ldv_scsi_host_alloc_23_#in~sht#1.offset, ldv_scsi_host_alloc_23_#in~privsize#1 := ~#pvscsi_template~0.base, ~#pvscsi_template~0.offset, 312;havoc ldv_scsi_host_alloc_23_#res#1.base, ldv_scsi_host_alloc_23_#res#1.offset;havoc ldv_scsi_host_alloc_23_#t~ret877#1.base, ldv_scsi_host_alloc_23_#t~ret877#1.offset, ldv_scsi_host_alloc_23_~sht#1.base, ldv_scsi_host_alloc_23_~sht#1.offset, ldv_scsi_host_alloc_23_~privsize#1, ldv_scsi_host_alloc_23_~ldv_func_res~1#1.base, ldv_scsi_host_alloc_23_~ldv_func_res~1#1.offset, ldv_scsi_host_alloc_23_~tmp~60#1.base, ldv_scsi_host_alloc_23_~tmp~60#1.offset;ldv_scsi_host_alloc_23_~sht#1.base, ldv_scsi_host_alloc_23_~sht#1.offset := ldv_scsi_host_alloc_23_#in~sht#1.base, ldv_scsi_host_alloc_23_#in~sht#1.offset;ldv_scsi_host_alloc_23_~privsize#1 := ldv_scsi_host_alloc_23_#in~privsize#1;havoc ldv_scsi_host_alloc_23_~ldv_func_res~1#1.base, ldv_scsi_host_alloc_23_~ldv_func_res~1#1.offset;havoc ldv_scsi_host_alloc_23_~tmp~60#1.base, ldv_scsi_host_alloc_23_~tmp~60#1.offset;assume { :begin_inline_scsi_host_alloc } true;scsi_host_alloc_#in~arg0#1.base, scsi_host_alloc_#in~arg0#1.offset, scsi_host_alloc_#in~arg1#1 := ldv_scsi_host_alloc_23_~sht#1.base, ldv_scsi_host_alloc_23_~sht#1.offset, ldv_scsi_host_alloc_23_~privsize#1;havoc scsi_host_alloc_#res#1.base, scsi_host_alloc_#res#1.offset;havoc scsi_host_alloc_#t~ret908#1.base, scsi_host_alloc_#t~ret908#1.offset, scsi_host_alloc_~arg0#1.base, scsi_host_alloc_~arg0#1.offset, scsi_host_alloc_~arg1#1;scsi_host_alloc_~arg0#1.base, scsi_host_alloc_~arg0#1.offset := scsi_host_alloc_#in~arg0#1.base, scsi_host_alloc_#in~arg0#1.offset;scsi_host_alloc_~arg1#1 := scsi_host_alloc_#in~arg1#1; {1078#false} is VALID [2022-02-20 22:01:46,887 INFO L272 TraceCheckUtils]: 102: Hoare triple {1078#false} call scsi_host_alloc_#t~ret908#1.base, scsi_host_alloc_#t~ret908#1.offset := ldv_malloc(3406); {1232#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:01:46,888 INFO L290 TraceCheckUtils]: 103: Hoare triple {1232#(and (= |old(#length)| |#length|) (= |old(#valid)| |#valid|))} ~size := #in~size;havoc ~p~0.base, ~p~0.offset;havoc ~tmp~4.base, ~tmp~4.offset;havoc ~tmp___0~0;assume -2147483648 <= #t~nondet70 && #t~nondet70 <= 2147483647;~tmp___0~0 := #t~nondet70;havoc #t~nondet70; {1077#true} is VALID [2022-02-20 22:01:46,888 INFO L290 TraceCheckUtils]: 104: Hoare triple {1077#true} assume 0 != ~tmp___0~0;#res.base, #res.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,888 INFO L290 TraceCheckUtils]: 105: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,888 INFO L284 TraceCheckUtils]: 106: Hoare quadruple {1077#true} {1078#false} #2905#return; {1078#false} is VALID [2022-02-20 22:01:46,888 INFO L290 TraceCheckUtils]: 107: Hoare triple {1078#false} scsi_host_alloc_#res#1.base, scsi_host_alloc_#res#1.offset := scsi_host_alloc_#t~ret908#1.base, scsi_host_alloc_#t~ret908#1.offset;havoc scsi_host_alloc_#t~ret908#1.base, scsi_host_alloc_#t~ret908#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,889 INFO L290 TraceCheckUtils]: 108: Hoare triple {1078#false} ldv_scsi_host_alloc_23_#t~ret877#1.base, ldv_scsi_host_alloc_23_#t~ret877#1.offset := scsi_host_alloc_#res#1.base, scsi_host_alloc_#res#1.offset;assume { :end_inline_scsi_host_alloc } true;ldv_scsi_host_alloc_23_~tmp~60#1.base, ldv_scsi_host_alloc_23_~tmp~60#1.offset := ldv_scsi_host_alloc_23_#t~ret877#1.base, ldv_scsi_host_alloc_23_#t~ret877#1.offset;havoc ldv_scsi_host_alloc_23_#t~ret877#1.base, ldv_scsi_host_alloc_23_#t~ret877#1.offset;ldv_scsi_host_alloc_23_~ldv_func_res~1#1.base, ldv_scsi_host_alloc_23_~ldv_func_res~1#1.offset := ldv_scsi_host_alloc_23_~tmp~60#1.base, ldv_scsi_host_alloc_23_~tmp~60#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,889 INFO L290 TraceCheckUtils]: 109: Hoare triple {1078#false} assume !(0 != (ldv_scsi_host_alloc_23_~ldv_func_res~1#1.base + ldv_scsi_host_alloc_23_~ldv_func_res~1#1.offset) % 18446744073709551616); {1078#false} is VALID [2022-02-20 22:01:46,889 INFO L290 TraceCheckUtils]: 110: Hoare triple {1078#false} ldv_scsi_host_alloc_23_#res#1.base, ldv_scsi_host_alloc_23_#res#1.offset := ldv_scsi_host_alloc_23_~ldv_func_res~1#1.base, ldv_scsi_host_alloc_23_~ldv_func_res~1#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,889 INFO L290 TraceCheckUtils]: 111: Hoare triple {1078#false} pvscsi_probe_#t~ret794#1.base, pvscsi_probe_#t~ret794#1.offset := ldv_scsi_host_alloc_23_#res#1.base, ldv_scsi_host_alloc_23_#res#1.offset;assume { :end_inline_ldv_scsi_host_alloc_23 } true;pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset := pvscsi_probe_#t~ret794#1.base, pvscsi_probe_#t~ret794#1.offset;havoc pvscsi_probe_#t~ret794#1.base, pvscsi_probe_#t~ret794#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,890 INFO L290 TraceCheckUtils]: 112: Hoare triple {1078#false} assume !(0 == (pvscsi_probe_~host~5#1.base + pvscsi_probe_~host~5#1.offset) % 18446744073709551616); {1078#false} is VALID [2022-02-20 22:01:46,890 INFO L272 TraceCheckUtils]: 113: Hoare triple {1078#false} call pvscsi_probe_#t~ret796#1.base, pvscsi_probe_#t~ret796#1.offset := shost_priv(pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset); {1077#true} is VALID [2022-02-20 22:01:46,890 INFO L290 TraceCheckUtils]: 114: Hoare triple {1077#true} ~shost.base, ~shost.offset := #in~shost.base, #in~shost.offset;#res.base, #res.offset := ~shost.base, 3406 + ~shost.offset; {1077#true} is VALID [2022-02-20 22:01:46,890 INFO L290 TraceCheckUtils]: 115: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,890 INFO L284 TraceCheckUtils]: 116: Hoare quadruple {1077#true} {1078#false} #2909#return; {1078#false} is VALID [2022-02-20 22:01:46,891 INFO L290 TraceCheckUtils]: 117: Hoare triple {1078#false} pvscsi_probe_~tmp___6~1#1.base, pvscsi_probe_~tmp___6~1#1.offset := pvscsi_probe_#t~ret796#1.base, pvscsi_probe_#t~ret796#1.offset;havoc pvscsi_probe_#t~ret796#1.base, pvscsi_probe_#t~ret796#1.offset;pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset := pvscsi_probe_~tmp___6~1#1.base, pvscsi_probe_~tmp___6~1#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,891 INFO L272 TraceCheckUtils]: 118: Hoare triple {1078#false} call pvscsi_probe_#t~memset~res797#1.base, pvscsi_probe_#t~memset~res797#1.offset := #Ultimate.C_memset(pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset, 0, 312); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,891 INFO L290 TraceCheckUtils]: 119: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,891 INFO L290 TraceCheckUtils]: 120: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,891 INFO L290 TraceCheckUtils]: 121: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,892 INFO L284 TraceCheckUtils]: 122: Hoare quadruple {1077#true} {1078#false} #2911#return; {1078#false} is VALID [2022-02-20 22:01:46,892 INFO L290 TraceCheckUtils]: 123: Hoare triple {1078#false} havoc pvscsi_probe_#t~memset~res797#1.base, pvscsi_probe_#t~memset~res797#1.offset;call write~$Pointer$(pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, pvscsi_probe_~adapter~8#1.base, 249 + pvscsi_probe_~adapter~8#1.offset, 8);call write~$Pointer$(pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset, pvscsi_probe_~adapter~8#1.base, 257 + pvscsi_probe_~adapter~8#1.offset, 8);call pvscsi_probe_#t~mem798#1 := read~int(pvscsi_probe_~#adapter_temp~0#1.base, 12 + pvscsi_probe_~#adapter_temp~0#1.offset, 1);call write~int(pvscsi_probe_#t~mem798#1, pvscsi_probe_~adapter~8#1.base, 12 + pvscsi_probe_~adapter~8#1.offset, 1);havoc pvscsi_probe_#t~mem798#1;call pvscsi_probe_#t~mem799#1.base, pvscsi_probe_#t~mem799#1.offset := read~$Pointer$(pvscsi_probe_~#adapter_temp~0#1.base, pvscsi_probe_~#adapter_temp~0#1.offset, 8);call write~$Pointer$(pvscsi_probe_#t~mem799#1.base, pvscsi_probe_#t~mem799#1.offset, pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset, 8);havoc pvscsi_probe_#t~mem799#1.base, pvscsi_probe_#t~mem799#1.offset;assume { :begin_inline_spinlock_check } true;spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset := pvscsi_probe_~adapter~8#1.base, 17 + pvscsi_probe_~adapter~8#1.offset;havoc spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset := spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;spinlock_check_#res#1.base, spinlock_check_#res#1.offset := spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,892 INFO L290 TraceCheckUtils]: 124: Hoare triple {1078#false} pvscsi_probe_#t~ret800#1.base, pvscsi_probe_#t~ret800#1.offset := spinlock_check_#res#1.base, spinlock_check_#res#1.offset;assume { :end_inline_spinlock_check } true;havoc pvscsi_probe_#t~ret800#1.base, pvscsi_probe_#t~ret800#1.offset;assume { :begin_inline___raw_spin_lock_init } true;__raw_spin_lock_init_#in~arg0#1.base, __raw_spin_lock_init_#in~arg0#1.offset, __raw_spin_lock_init_#in~arg1#1.base, __raw_spin_lock_init_#in~arg1#1.offset, __raw_spin_lock_init_#in~arg2#1.base, __raw_spin_lock_init_#in~arg2#1.offset := pvscsi_probe_~adapter~8#1.base, 17 + pvscsi_probe_~adapter~8#1.offset, 98, 0, pvscsi_probe_~#__key~2#1.base, pvscsi_probe_~#__key~2#1.offset;havoc __raw_spin_lock_init_~arg0#1.base, __raw_spin_lock_init_~arg0#1.offset, __raw_spin_lock_init_~arg1#1.base, __raw_spin_lock_init_~arg1#1.offset, __raw_spin_lock_init_~arg2#1.base, __raw_spin_lock_init_~arg2#1.offset;__raw_spin_lock_init_~arg0#1.base, __raw_spin_lock_init_~arg0#1.offset := __raw_spin_lock_init_#in~arg0#1.base, __raw_spin_lock_init_#in~arg0#1.offset;__raw_spin_lock_init_~arg1#1.base, __raw_spin_lock_init_~arg1#1.offset := __raw_spin_lock_init_#in~arg1#1.base, __raw_spin_lock_init_#in~arg1#1.offset;__raw_spin_lock_init_~arg2#1.base, __raw_spin_lock_init_~arg2#1.offset := __raw_spin_lock_init_#in~arg2#1.base, __raw_spin_lock_init_#in~arg2#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,892 INFO L290 TraceCheckUtils]: 125: Hoare triple {1078#false} assume { :end_inline___raw_spin_lock_init } true;call write~int(0, pvscsi_probe_~host~5#1.base, 548 + pvscsi_probe_~host~5#1.offset, 4);call write~int(1, pvscsi_probe_~host~5#1.base, 544 + pvscsi_probe_~host~5#1.offset, 4);call write~int(16, pvscsi_probe_~host~5#1.base, 556 + pvscsi_probe_~host~5#1.offset, 2);call write~int(pvscsi_probe_~max_id~0#1, pvscsi_probe_~host~5#1.base, 540 + pvscsi_probe_~host~5#1.offset, 4);assume { :begin_inline_pci_set_drvdata } true;pci_set_drvdata_#in~pdev#1.base, pci_set_drvdata_#in~pdev#1.offset, pci_set_drvdata_#in~data#1.base, pci_set_drvdata_#in~data#1.offset := pvscsi_probe_~pdev#1.base, pvscsi_probe_~pdev#1.offset, pvscsi_probe_~host~5#1.base, pvscsi_probe_~host~5#1.offset;havoc pci_set_drvdata_~pdev#1.base, pci_set_drvdata_~pdev#1.offset, pci_set_drvdata_~data#1.base, pci_set_drvdata_~data#1.offset;pci_set_drvdata_~pdev#1.base, pci_set_drvdata_~pdev#1.offset := pci_set_drvdata_#in~pdev#1.base, pci_set_drvdata_#in~pdev#1.offset;pci_set_drvdata_~data#1.base, pci_set_drvdata_~data#1.offset := pci_set_drvdata_#in~data#1.base, pci_set_drvdata_#in~data#1.offset;assume { :begin_inline_dev_set_drvdata } true;dev_set_drvdata_#in~dev#1.base, dev_set_drvdata_#in~dev#1.offset, dev_set_drvdata_#in~data#1.base, dev_set_drvdata_#in~data#1.offset := pci_set_drvdata_~pdev#1.base, 147 + pci_set_drvdata_~pdev#1.offset, pci_set_drvdata_~data#1.base, pci_set_drvdata_~data#1.offset;havoc dev_set_drvdata_~dev#1.base, dev_set_drvdata_~dev#1.offset, dev_set_drvdata_~data#1.base, dev_set_drvdata_~data#1.offset;dev_set_drvdata_~dev#1.base, dev_set_drvdata_~dev#1.offset := dev_set_drvdata_#in~dev#1.base, dev_set_drvdata_#in~dev#1.offset;dev_set_drvdata_~data#1.base, dev_set_drvdata_~data#1.offset := dev_set_drvdata_#in~data#1.base, dev_set_drvdata_#in~data#1.offset;call write~$Pointer$(dev_set_drvdata_~data#1.base, dev_set_drvdata_~data#1.offset, dev_set_drvdata_~dev#1.base, 489 + dev_set_drvdata_~dev#1.offset, 8); {1078#false} is VALID [2022-02-20 22:01:46,893 INFO L290 TraceCheckUtils]: 126: Hoare triple {1078#false} assume { :end_inline_dev_set_drvdata } true; {1078#false} is VALID [2022-02-20 22:01:46,893 INFO L290 TraceCheckUtils]: 127: Hoare triple {1078#false} assume { :end_inline_pci_set_drvdata } true; {1078#false} is VALID [2022-02-20 22:01:46,893 INFO L272 TraceCheckUtils]: 128: Hoare triple {1078#false} call ll_adapter_reset(pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset); {1247#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:01:46,893 INFO L290 TraceCheckUtils]: 129: Hoare triple {1247#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;call ~#descriptor~0.base, ~#descriptor~0.offset := #Ultimate.allocOnStack(37);havoc ~tmp~27.base, ~tmp~27.offset;havoc ~tmp___0~6;call write~$Pointer$(5, 0, ~#descriptor~0.base, ~#descriptor~0.offset, 8);call write~$Pointer$(6, 0, ~#descriptor~0.base, 8 + ~#descriptor~0.offset, 8);call write~$Pointer$(7, 0, ~#descriptor~0.base, 16 + ~#descriptor~0.offset, 8);call write~$Pointer$(8, 0, ~#descriptor~0.base, 24 + ~#descriptor~0.offset, 8);call write~int(357, ~#descriptor~0.base, 32 + ~#descriptor~0.offset, 4);call write~int(0, ~#descriptor~0.base, 36 + ~#descriptor~0.offset, 1);call #t~mem271 := read~int(~#descriptor~0.base, 36 + ~#descriptor~0.offset, 1); {1077#true} is VALID [2022-02-20 22:01:46,893 INFO L272 TraceCheckUtils]: 130: Hoare triple {1077#true} call #t~ret272 := ldv__builtin_expect(#t~mem271 % 256, 0); {1077#true} is VALID [2022-02-20 22:01:46,894 INFO L290 TraceCheckUtils]: 131: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,894 INFO L290 TraceCheckUtils]: 132: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,894 INFO L284 TraceCheckUtils]: 133: Hoare quadruple {1077#true} {1077#true} #2669#return; {1077#true} is VALID [2022-02-20 22:01:46,894 INFO L290 TraceCheckUtils]: 134: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret272 && #t~ret272 <= 9223372036854775807;~tmp___0~6 := #t~ret272;havoc #t~mem271;havoc #t~ret272; {1077#true} is VALID [2022-02-20 22:01:46,894 INFO L290 TraceCheckUtils]: 135: Hoare triple {1077#true} assume !(0 != ~tmp___0~6); {1077#true} is VALID [2022-02-20 22:01:46,895 INFO L272 TraceCheckUtils]: 136: Hoare triple {1077#true} call pvscsi_write_cmd_desc(~adapter.base, ~adapter.offset, 1, 0, 0, 0); {1077#true} is VALID [2022-02-20 22:01:46,895 INFO L290 TraceCheckUtils]: 137: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;~cmd := #in~cmd;~desc.base, ~desc.offset := #in~desc.base, #in~desc.offset;~len := #in~len;havoc ~ptr~0.base, ~ptr~0.offset;havoc ~i~0;~ptr~0.base, ~ptr~0.offset := ~desc.base, ~desc.offset;~len := (if ~len % 18446744073709551616 < 0 && 0 != ~len % 18446744073709551616 % 4 then 1 + ~len % 18446744073709551616 / 4 else ~len % 18446744073709551616 / 4); {1077#true} is VALID [2022-02-20 22:01:46,895 INFO L272 TraceCheckUtils]: 138: Hoare triple {1077#true} call pvscsi_reg_write(~adapter.base, ~adapter.offset, 0, ~cmd); {1077#true} is VALID [2022-02-20 22:01:46,895 INFO L290 TraceCheckUtils]: 139: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,895 INFO L290 TraceCheckUtils]: 140: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,896 INFO L290 TraceCheckUtils]: 141: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,896 INFO L284 TraceCheckUtils]: 142: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,896 INFO L290 TraceCheckUtils]: 143: Hoare triple {1077#true} ~i~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,896 INFO L290 TraceCheckUtils]: 144: Hoare triple {1077#true} assume !(~i~0 % 18446744073709551616 < ~len % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,896 INFO L290 TraceCheckUtils]: 145: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,897 INFO L284 TraceCheckUtils]: 146: Hoare quadruple {1077#true} {1077#true} #2673#return; {1077#true} is VALID [2022-02-20 22:01:46,897 INFO L290 TraceCheckUtils]: 147: Hoare triple {1077#true} call ULTIMATE.dealloc(~#descriptor~0.base, ~#descriptor~0.offset);havoc ~#descriptor~0.base, ~#descriptor~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,897 INFO L290 TraceCheckUtils]: 148: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,897 INFO L284 TraceCheckUtils]: 149: Hoare quadruple {1077#true} {1078#false} #2913#return; {1078#false} is VALID [2022-02-20 22:01:46,897 INFO L290 TraceCheckUtils]: 150: Hoare triple {1078#false} assume { :begin_inline_pvscsi_setup_msg_workqueue } true;pvscsi_setup_msg_workqueue_#in~adapter#1.base, pvscsi_setup_msg_workqueue_#in~adapter#1.offset := pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset;havoc pvscsi_setup_msg_workqueue_#res#1;havoc pvscsi_setup_msg_workqueue_#t~ret678#1, pvscsi_setup_msg_workqueue_#t~nondet679#1, pvscsi_setup_msg_workqueue_#t~mem680#1.base, pvscsi_setup_msg_workqueue_#t~mem680#1.offset, pvscsi_setup_msg_workqueue_#t~mem681#1, pvscsi_setup_msg_workqueue_#t~nondet682#1.base, pvscsi_setup_msg_workqueue_#t~nondet682#1.offset, pvscsi_setup_msg_workqueue_#t~mem683#1.base, pvscsi_setup_msg_workqueue_#t~mem683#1.offset, pvscsi_setup_msg_workqueue_#t~nondet684#1, pvscsi_setup_msg_workqueue_#t~mem685#1, pvscsi_setup_msg_workqueue_~adapter#1.base, pvscsi_setup_msg_workqueue_~adapter#1.offset, pvscsi_setup_msg_workqueue_~#name~0#1.base, pvscsi_setup_msg_workqueue_~#name~0#1.offset, pvscsi_setup_msg_workqueue_~tmp~44#1, pvscsi_setup_msg_workqueue_~#__key~1#1.base, pvscsi_setup_msg_workqueue_~#__key~1#1.offset, pvscsi_setup_msg_workqueue_~__lock_name~0#1.base, pvscsi_setup_msg_workqueue_~__lock_name~0#1.offset, pvscsi_setup_msg_workqueue_~tmp___0~15#1.base, pvscsi_setup_msg_workqueue_~tmp___0~15#1.offset, pvscsi_setup_msg_workqueue_~#__key___0~0#1.base, pvscsi_setup_msg_workqueue_~#__key___0~0#1.offset, pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.base, pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.offset;pvscsi_setup_msg_workqueue_~adapter#1.base, pvscsi_setup_msg_workqueue_~adapter#1.offset := pvscsi_setup_msg_workqueue_#in~adapter#1.base, pvscsi_setup_msg_workqueue_#in~adapter#1.offset;call pvscsi_setup_msg_workqueue_~#name~0#1.base, pvscsi_setup_msg_workqueue_~#name~0#1.offset := #Ultimate.allocOnStack(32);havoc pvscsi_setup_msg_workqueue_~tmp~44#1;call pvscsi_setup_msg_workqueue_~#__key~1#1.base, pvscsi_setup_msg_workqueue_~#__key~1#1.offset := #Ultimate.allocOnStack(8);havoc pvscsi_setup_msg_workqueue_~__lock_name~0#1.base, pvscsi_setup_msg_workqueue_~__lock_name~0#1.offset;havoc pvscsi_setup_msg_workqueue_~tmp___0~15#1.base, pvscsi_setup_msg_workqueue_~tmp___0~15#1.offset;call pvscsi_setup_msg_workqueue_~#__key___0~0#1.base, pvscsi_setup_msg_workqueue_~#__key___0~0#1.offset := #Ultimate.allocOnStack(8);call pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.base, pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.offset := #Ultimate.allocOnStack(8); {1078#false} is VALID [2022-02-20 22:01:46,898 INFO L290 TraceCheckUtils]: 151: Hoare triple {1078#false} assume 0 == ~pvscsi_use_msg~0 % 256;pvscsi_setup_msg_workqueue_#res#1 := 0;call ULTIMATE.dealloc(pvscsi_setup_msg_workqueue_~#name~0#1.base, pvscsi_setup_msg_workqueue_~#name~0#1.offset);havoc pvscsi_setup_msg_workqueue_~#name~0#1.base, pvscsi_setup_msg_workqueue_~#name~0#1.offset;call ULTIMATE.dealloc(pvscsi_setup_msg_workqueue_~#__key~1#1.base, pvscsi_setup_msg_workqueue_~#__key~1#1.offset);havoc pvscsi_setup_msg_workqueue_~#__key~1#1.base, pvscsi_setup_msg_workqueue_~#__key~1#1.offset;call ULTIMATE.dealloc(pvscsi_setup_msg_workqueue_~#__key___0~0#1.base, pvscsi_setup_msg_workqueue_~#__key___0~0#1.offset);havoc pvscsi_setup_msg_workqueue_~#__key___0~0#1.base, pvscsi_setup_msg_workqueue_~#__key___0~0#1.offset;call ULTIMATE.dealloc(pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.base, pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.offset);havoc pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.base, pvscsi_setup_msg_workqueue_~#__constr_expr_0~0#1.offset; {1078#false} is VALID [2022-02-20 22:01:46,898 INFO L290 TraceCheckUtils]: 152: Hoare triple {1078#false} pvscsi_probe_#t~ret801#1 := pvscsi_setup_msg_workqueue_#res#1;assume { :end_inline_pvscsi_setup_msg_workqueue } true;assume -2147483648 <= pvscsi_probe_#t~ret801#1 && pvscsi_probe_#t~ret801#1 <= 2147483647;pvscsi_probe_~tmp___7~0#1 := pvscsi_probe_#t~ret801#1;havoc pvscsi_probe_#t~ret801#1;call write~int((if 0 == (if 0 != pvscsi_probe_~tmp___7~0#1 then 1 else 0) then 0 else 1), pvscsi_probe_~adapter~8#1.base, 15 + pvscsi_probe_~adapter~8#1.offset, 1);assume { :begin_inline_pvscsi_allocate_rings } true;pvscsi_allocate_rings_#in~adapter#1.base, pvscsi_allocate_rings_#in~adapter#1.offset := pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset;havoc pvscsi_allocate_rings_#res#1;havoc pvscsi_allocate_rings_#t~mem313#1.base, pvscsi_allocate_rings_#t~mem313#1.offset, pvscsi_allocate_rings_#t~ret314#1.base, pvscsi_allocate_rings_#t~ret314#1.offset, pvscsi_allocate_rings_#t~mem315#1.base, pvscsi_allocate_rings_#t~mem315#1.offset, pvscsi_allocate_rings_#t~ite316#1, pvscsi_allocate_rings_#t~mem317#1, pvscsi_allocate_rings_#t~mem318#1.base, pvscsi_allocate_rings_#t~mem318#1.offset, pvscsi_allocate_rings_#t~mem319#1, pvscsi_allocate_rings_#t~ret320#1.base, pvscsi_allocate_rings_#t~ret320#1.offset, pvscsi_allocate_rings_#t~mem321#1.base, pvscsi_allocate_rings_#t~mem321#1.offset, pvscsi_allocate_rings_#t~ite322#1, pvscsi_allocate_rings_#t~mem323#1.base, pvscsi_allocate_rings_#t~mem323#1.offset, pvscsi_allocate_rings_#t~mem324#1, pvscsi_allocate_rings_#t~ret325#1.base, pvscsi_allocate_rings_#t~ret325#1.offset, pvscsi_allocate_rings_#t~mem326#1.base, pvscsi_allocate_rings_#t~mem326#1.offset, pvscsi_allocate_rings_#t~mem327#1, pvscsi_allocate_rings_#t~ret328#1, pvscsi_allocate_rings_#t~mem329#1, pvscsi_allocate_rings_#t~ret330#1, pvscsi_allocate_rings_#t~mem331#1, pvscsi_allocate_rings_#t~ret332#1, pvscsi_allocate_rings_#t~mem333#1, pvscsi_allocate_rings_#t~ite334#1, pvscsi_allocate_rings_#t~mem335#1.base, pvscsi_allocate_rings_#t~mem335#1.offset, pvscsi_allocate_rings_#t~mem336#1, pvscsi_allocate_rings_#t~ret337#1.base, pvscsi_allocate_rings_#t~ret337#1.offset, pvscsi_allocate_rings_#t~mem338#1.base, pvscsi_allocate_rings_#t~mem338#1.offset, pvscsi_allocate_rings_#t~mem339#1, pvscsi_allocate_rings_#t~ret340#1, pvscsi_allocate_rings_~adapter#1.base, pvscsi_allocate_rings_~adapter#1.offset, pvscsi_allocate_rings_~tmp~33#1.base, pvscsi_allocate_rings_~tmp~33#1.offset, pvscsi_allocate_rings_~_min1~0#1, pvscsi_allocate_rings_~_min2~0#1, pvscsi_allocate_rings_~tmp___0~10#1.base, pvscsi_allocate_rings_~tmp___0~10#1.offset, pvscsi_allocate_rings_~_min1___0~0#1, pvscsi_allocate_rings_~_min2___0~0#1, pvscsi_allocate_rings_~tmp___1~4#1.base, pvscsi_allocate_rings_~tmp___1~4#1.offset, pvscsi_allocate_rings_~tmp___2~1#1, pvscsi_allocate_rings_~tmp___3~1#1, pvscsi_allocate_rings_~tmp___4~0#1, pvscsi_allocate_rings_~_min1___1~0#1, pvscsi_allocate_rings_~_min2___1~0#1, pvscsi_allocate_rings_~tmp___5~0#1.base, pvscsi_allocate_rings_~tmp___5~0#1.offset, pvscsi_allocate_rings_~tmp___6~0#1;pvscsi_allocate_rings_~adapter#1.base, pvscsi_allocate_rings_~adapter#1.offset := pvscsi_allocate_rings_#in~adapter#1.base, pvscsi_allocate_rings_#in~adapter#1.offset;havoc pvscsi_allocate_rings_~tmp~33#1.base, pvscsi_allocate_rings_~tmp~33#1.offset;havoc pvscsi_allocate_rings_~_min1~0#1;havoc pvscsi_allocate_rings_~_min2~0#1;havoc pvscsi_allocate_rings_~tmp___0~10#1.base, pvscsi_allocate_rings_~tmp___0~10#1.offset;havoc pvscsi_allocate_rings_~_min1___0~0#1;havoc pvscsi_allocate_rings_~_min2___0~0#1;havoc pvscsi_allocate_rings_~tmp___1~4#1.base, pvscsi_allocate_rings_~tmp___1~4#1.offset;havoc pvscsi_allocate_rings_~tmp___2~1#1;havoc pvscsi_allocate_rings_~tmp___3~1#1;havoc pvscsi_allocate_rings_~tmp___4~0#1;havoc pvscsi_allocate_rings_~_min1___1~0#1;havoc pvscsi_allocate_rings_~_min2___1~0#1;havoc pvscsi_allocate_rings_~tmp___5~0#1.base, pvscsi_allocate_rings_~tmp___5~0#1.offset;havoc pvscsi_allocate_rings_~tmp___6~0#1;call pvscsi_allocate_rings_#t~mem313#1.base, pvscsi_allocate_rings_#t~mem313#1.offset := read~$Pointer$(pvscsi_allocate_rings_~adapter#1.base, 249 + pvscsi_allocate_rings_~adapter#1.offset, 8); {1078#false} is VALID [2022-02-20 22:01:46,898 INFO L272 TraceCheckUtils]: 153: Hoare triple {1078#false} call pvscsi_allocate_rings_#t~ret314#1.base, pvscsi_allocate_rings_#t~ret314#1.offset := pci_alloc_consistent(pvscsi_allocate_rings_#t~mem313#1.base, pvscsi_allocate_rings_#t~mem313#1.offset, 4096, pvscsi_allocate_rings_~adapter#1.base, 241 + pvscsi_allocate_rings_~adapter#1.offset); {1233#(and (= |old(abs_4957)| abs_4957) (= |old(abs_4953)| abs_4953) (= |old(abs_4974)| abs_4974))} is VALID [2022-02-20 22:01:46,898 INFO L290 TraceCheckUtils]: 154: Hoare triple {1233#(and (= |old(abs_4957)| abs_4957) (= |old(abs_4953)| abs_4953) (= |old(abs_4974)| abs_4974))} ~hwdev#1.base, ~hwdev#1.offset := #in~hwdev#1.base, #in~hwdev#1.offset;~size#1 := #in~size#1;~dma_handle#1.base, ~dma_handle#1.offset := #in~dma_handle#1.base, #in~dma_handle#1.offset;havoc ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,899 INFO L290 TraceCheckUtils]: 155: Hoare triple {1077#true} assume 0 != (~hwdev#1.base + ~hwdev#1.offset) % 18446744073709551616;#t~ite202#1.base, #t~ite202#1.offset := ~hwdev#1.base, 147 + ~hwdev#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,899 INFO L290 TraceCheckUtils]: 156: Hoare triple {1077#true} assume { :begin_inline_dma_alloc_attrs } true;dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset, dma_alloc_attrs_#in~size#1, dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset, dma_alloc_attrs_#in~gfp#1, dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset := #t~ite202#1.base, #t~ite202#1.offset, ~size#1, ~dma_handle#1.base, ~dma_handle#1.offset, 32, 0, 0;havoc dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset, dma_alloc_attrs_#t~ret176#1, dma_alloc_attrs_#t~mem177#1.base, dma_alloc_attrs_#t~mem177#1.offset, dma_alloc_attrs_#t~ret178#1, dma_alloc_attrs_#t~mem185#1.base, dma_alloc_attrs_#t~mem185#1.offset, dma_alloc_attrs_#t~ret186#1.base, dma_alloc_attrs_#t~ret186#1.offset, dma_alloc_attrs_#t~mem187#1, dma_alloc_attrs_#t~nondet175#1, dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset, dma_alloc_attrs_~size#1, dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset, dma_alloc_attrs_~gfp#1, dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset, dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset, dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset, dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset, dma_alloc_attrs_~tmp___0~4#1, dma_alloc_attrs_~tmp___1~2#1;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := dma_alloc_attrs_#in~dev#1.base, dma_alloc_attrs_#in~dev#1.offset;dma_alloc_attrs_~size#1 := dma_alloc_attrs_#in~size#1;dma_alloc_attrs_~dma_handle#1.base, dma_alloc_attrs_~dma_handle#1.offset := dma_alloc_attrs_#in~dma_handle#1.base, dma_alloc_attrs_#in~dma_handle#1.offset;dma_alloc_attrs_~gfp#1 := dma_alloc_attrs_#in~gfp#1;dma_alloc_attrs_~attrs#1.base, dma_alloc_attrs_~attrs#1.offset := dma_alloc_attrs_#in~attrs#1.base, dma_alloc_attrs_#in~attrs#1.offset;havoc dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset;havoc dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset;havoc dma_alloc_attrs_~memory~0#1.base, dma_alloc_attrs_~memory~0#1.offset;havoc dma_alloc_attrs_~tmp___0~4#1;havoc dma_alloc_attrs_~tmp___1~2#1; {1077#true} is VALID [2022-02-20 22:01:46,899 INFO L272 TraceCheckUtils]: 157: Hoare triple {1077#true} call dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset := get_dma_ops(dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset); {1077#true} is VALID [2022-02-20 22:01:46,899 INFO L290 TraceCheckUtils]: 158: Hoare triple {1077#true} ~dev.base, ~dev.offset := #in~dev.base, #in~dev.offset;havoc ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,899 INFO L272 TraceCheckUtils]: 159: Hoare triple {1077#true} call #t~ret136 := ldv__builtin_expect((if 0 == (~dev.base + ~dev.offset) % 18446744073709551616 then 1 else 0), 0); {1077#true} is VALID [2022-02-20 22:01:46,900 INFO L290 TraceCheckUtils]: 160: Hoare triple {1077#true} ~exp := #in~exp;~c := #in~c;#res := ~exp; {1077#true} is VALID [2022-02-20 22:01:46,900 INFO L290 TraceCheckUtils]: 161: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,900 INFO L284 TraceCheckUtils]: 162: Hoare quadruple {1077#true} {1077#true} #2575#return; {1077#true} is VALID [2022-02-20 22:01:46,900 INFO L290 TraceCheckUtils]: 163: Hoare triple {1077#true} assume -9223372036854775808 <= #t~ret136 && #t~ret136 <= 9223372036854775807;~tmp~10 := #t~ret136;havoc #t~ret136;#t~short138 := 0 != ~tmp~10; {1077#true} is VALID [2022-02-20 22:01:46,900 INFO L290 TraceCheckUtils]: 164: Hoare triple {1077#true} assume #t~short138; {1077#true} is VALID [2022-02-20 22:01:46,901 INFO L290 TraceCheckUtils]: 165: Hoare triple {1077#true} assume #t~short138;havoc #t~mem137.base, #t~mem137.offset;havoc #t~short138;#res.base, #res.offset := ~dma_ops~0.base, ~dma_ops~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,901 INFO L290 TraceCheckUtils]: 166: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,901 INFO L284 TraceCheckUtils]: 167: Hoare quadruple {1077#true} {1077#true} #2735#return; {1077#true} is VALID [2022-02-20 22:01:46,901 INFO L290 TraceCheckUtils]: 168: Hoare triple {1077#true} dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset := dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;havoc dma_alloc_attrs_#t~ret174#1.base, dma_alloc_attrs_#t~ret174#1.offset;dma_alloc_attrs_~ops~2#1.base, dma_alloc_attrs_~ops~2#1.offset := dma_alloc_attrs_~tmp~14#1.base, dma_alloc_attrs_~tmp~14#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,901 INFO L290 TraceCheckUtils]: 169: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~gfp#1;dma_alloc_attrs_~gfp#1 := 0; {1077#true} is VALID [2022-02-20 22:01:46,902 INFO L290 TraceCheckUtils]: 170: Hoare triple {1077#true} assume 0 == (dma_alloc_attrs_~dev#1.base + dma_alloc_attrs_~dev#1.offset) % 18446744073709551616;dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset := ~#x86_dma_fallback_dev~0.base, ~#x86_dma_fallback_dev~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,902 INFO L290 TraceCheckUtils]: 171: Hoare triple {1077#true} assume { :begin_inline_is_device_dma_capable } true;is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset := dma_alloc_attrs_~dev#1.base, dma_alloc_attrs_~dev#1.offset;havoc is_device_dma_capable_#res#1;havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset, is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, is_device_dma_capable_#t~mem114#1, is_device_dma_capable_#t~short115#1, is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset;is_device_dma_capable_~dev#1.base, is_device_dma_capable_~dev#1.offset := is_device_dma_capable_#in~dev#1.base, is_device_dma_capable_#in~dev#1.offset;call is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != (is_device_dma_capable_#t~mem112#1.base + is_device_dma_capable_#t~mem112#1.offset) % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,902 INFO L290 TraceCheckUtils]: 172: Hoare triple {1077#true} assume is_device_dma_capable_#t~short115#1;call is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset := read~$Pointer$(is_device_dma_capable_~dev#1.base, 1095 + is_device_dma_capable_~dev#1.offset, 8);call is_device_dma_capable_#t~mem114#1 := read~int(is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset, 8);is_device_dma_capable_#t~short115#1 := 0 != is_device_dma_capable_#t~mem114#1 % 18446744073709551616; {1077#true} is VALID [2022-02-20 22:01:46,902 INFO L290 TraceCheckUtils]: 173: Hoare triple {1077#true} is_device_dma_capable_#res#1 := (if is_device_dma_capable_#t~short115#1 then 1 else 0);havoc is_device_dma_capable_#t~mem112#1.base, is_device_dma_capable_#t~mem112#1.offset;havoc is_device_dma_capable_#t~mem113#1.base, is_device_dma_capable_#t~mem113#1.offset;havoc is_device_dma_capable_#t~mem114#1;havoc is_device_dma_capable_#t~short115#1; {1077#true} is VALID [2022-02-20 22:01:46,902 INFO L290 TraceCheckUtils]: 174: Hoare triple {1077#true} dma_alloc_attrs_#t~ret176#1 := is_device_dma_capable_#res#1;assume { :end_inline_is_device_dma_capable } true;assume -2147483648 <= dma_alloc_attrs_#t~ret176#1 && dma_alloc_attrs_#t~ret176#1 <= 2147483647;dma_alloc_attrs_~tmp___0~4#1 := dma_alloc_attrs_#t~ret176#1;havoc dma_alloc_attrs_#t~ret176#1; {1077#true} is VALID [2022-02-20 22:01:46,903 INFO L290 TraceCheckUtils]: 175: Hoare triple {1077#true} assume 0 == dma_alloc_attrs_~tmp___0~4#1;dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset := 0, 0; {1077#true} is VALID [2022-02-20 22:01:46,903 INFO L290 TraceCheckUtils]: 176: Hoare triple {1077#true} #t~ret203#1.base, #t~ret203#1.offset := dma_alloc_attrs_#res#1.base, dma_alloc_attrs_#res#1.offset;assume { :end_inline_dma_alloc_attrs } true;~tmp~17#1.base, ~tmp~17#1.offset := #t~ret203#1.base, #t~ret203#1.offset;havoc #t~ite202#1.base, #t~ite202#1.offset;havoc #t~ret203#1.base, #t~ret203#1.offset;#res#1.base, #res#1.offset := ~tmp~17#1.base, ~tmp~17#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,903 INFO L290 TraceCheckUtils]: 177: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,903 INFO L284 TraceCheckUtils]: 178: Hoare quadruple {1077#true} {1078#false} #2921#return; {1078#false} is VALID [2022-02-20 22:01:46,903 INFO L290 TraceCheckUtils]: 179: Hoare triple {1078#false} pvscsi_allocate_rings_~tmp~33#1.base, pvscsi_allocate_rings_~tmp~33#1.offset := pvscsi_allocate_rings_#t~ret314#1.base, pvscsi_allocate_rings_#t~ret314#1.offset;havoc pvscsi_allocate_rings_#t~mem313#1.base, pvscsi_allocate_rings_#t~mem313#1.offset;havoc pvscsi_allocate_rings_#t~ret314#1.base, pvscsi_allocate_rings_#t~ret314#1.offset;call write~$Pointer$(pvscsi_allocate_rings_~tmp~33#1.base, pvscsi_allocate_rings_~tmp~33#1.offset, pvscsi_allocate_rings_~adapter#1.base, 233 + pvscsi_allocate_rings_~adapter#1.offset, 8);call pvscsi_allocate_rings_#t~mem315#1.base, pvscsi_allocate_rings_#t~mem315#1.offset := read~$Pointer$(pvscsi_allocate_rings_~adapter#1.base, 233 + pvscsi_allocate_rings_~adapter#1.offset, 8); {1078#false} is VALID [2022-02-20 22:01:46,904 INFO L290 TraceCheckUtils]: 180: Hoare triple {1078#false} assume 0 == (pvscsi_allocate_rings_#t~mem315#1.base + pvscsi_allocate_rings_#t~mem315#1.offset) % 18446744073709551616;havoc pvscsi_allocate_rings_#t~mem315#1.base, pvscsi_allocate_rings_#t~mem315#1.offset;pvscsi_allocate_rings_#res#1 := -12; {1078#false} is VALID [2022-02-20 22:01:46,904 INFO L290 TraceCheckUtils]: 181: Hoare triple {1078#false} pvscsi_probe_#t~ret802#1 := pvscsi_allocate_rings_#res#1;assume { :end_inline_pvscsi_allocate_rings } true;assume -2147483648 <= pvscsi_probe_#t~ret802#1 && pvscsi_probe_#t~ret802#1 <= 2147483647;pvscsi_probe_~error~0#1 := pvscsi_probe_#t~ret802#1;havoc pvscsi_probe_#t~ret802#1; {1078#false} is VALID [2022-02-20 22:01:46,904 INFO L290 TraceCheckUtils]: 182: Hoare triple {1078#false} assume !(0 != pvscsi_probe_~error~0#1); {1078#false} is VALID [2022-02-20 22:01:46,904 INFO L272 TraceCheckUtils]: 183: Hoare triple {1078#false} call pvscsi_setup_all_rings(pvscsi_probe_~adapter~8#1.base, pvscsi_probe_~adapter~8#1.offset); {1247#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} is VALID [2022-02-20 22:01:46,904 INFO L290 TraceCheckUtils]: 184: Hoare triple {1247#(and (= |old(#length)| |#length|) (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= |old(#valid)| |#valid|))} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;call ~#cmd~3.base, ~#cmd~3.offset := #Ultimate.allocOnStack(528);havoc ~base~0;havoc ~i~2;call ~#cmd_msg~0.base, ~#cmd_msg~0.offset := #Ultimate.allocOnStack(136);call write~int(0, ~#cmd~3.base, ~#cmd~3.offset, 4);call write~int(0, ~#cmd~3.base, 4 + ~#cmd~3.offset, 4);call write~int(0, ~#cmd~3.base, 8 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 16 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 24 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 32 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 40 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 48 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 56 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 64 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 72 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 80 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 88 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 96 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 104 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 112 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 120 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 128 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 136 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 144 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 152 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 160 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 168 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 176 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 184 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 192 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 200 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 208 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 216 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 224 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 232 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 240 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 248 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 256 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 264 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 272 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 280 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 288 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 296 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 304 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 312 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 320 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 328 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 336 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 344 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 352 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 360 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 368 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 376 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 384 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 392 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 400 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 408 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 416 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 424 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 432 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 440 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 448 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 456 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 464 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 472 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 480 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 488 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 496 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 504 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 512 + ~#cmd~3.offset, 8);call write~int(0, ~#cmd~3.base, 520 + ~#cmd~3.offset, 8);call #t~mem341 := read~int(~adapter.base, 241 + ~adapter.offset, 8);call write~int(#t~mem341 / 4096, ~#cmd~3.base, 8 + ~#cmd~3.offset, 8);havoc #t~mem341;call #t~mem342 := read~int(~adapter.base, 177 + ~adapter.offset, 4);call write~int(#t~mem342, ~#cmd~3.base, ~#cmd~3.offset, 4);havoc #t~mem342;call #t~mem343 := read~int(~adapter.base, 201 + ~adapter.offset, 4);call write~int(#t~mem343, ~#cmd~3.base, 4 + ~#cmd~3.offset, 4);havoc #t~mem343;call #t~mem344 := read~int(~adapter.base, 185 + ~adapter.offset, 8);~base~0 := #t~mem344;havoc #t~mem344;~i~2 := 0; {1077#true} is VALID [2022-02-20 22:01:46,905 INFO L290 TraceCheckUtils]: 185: Hoare triple {1077#true} call #t~mem345 := read~int(~adapter.base, 177 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,905 INFO L290 TraceCheckUtils]: 186: Hoare triple {1077#true} assume !(#t~mem345 % 4294967296 > ~i~2 % 4294967296);havoc #t~mem345;call #t~mem346 := read~int(~adapter.base, 205 + ~adapter.offset, 8);~base~0 := #t~mem346;havoc #t~mem346;~i~2 := 0; {1077#true} is VALID [2022-02-20 22:01:46,905 INFO L290 TraceCheckUtils]: 187: Hoare triple {1077#true} call #t~mem347 := read~int(~adapter.base, 201 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,905 INFO L290 TraceCheckUtils]: 188: Hoare triple {1077#true} assume !(#t~mem347 % 4294967296 > ~i~2 % 4294967296);havoc #t~mem347;call #t~mem348.base, #t~mem348.offset := read~$Pointer$(~adapter.base, 233 + ~adapter.offset, 8); {1077#true} is VALID [2022-02-20 22:01:46,907 INFO L272 TraceCheckUtils]: 189: Hoare triple {1077#true} call #t~memset~res349.base, #t~memset~res349.offset := #Ultimate.C_memset(#t~mem348.base, #t~mem348.offset, 0, 4096); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,907 INFO L290 TraceCheckUtils]: 190: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,907 INFO L290 TraceCheckUtils]: 191: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,907 INFO L290 TraceCheckUtils]: 192: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,907 INFO L284 TraceCheckUtils]: 193: Hoare quadruple {1077#true} {1077#true} #2685#return; {1077#true} is VALID [2022-02-20 22:01:46,908 INFO L290 TraceCheckUtils]: 194: Hoare triple {1077#true} havoc #t~mem348.base, #t~mem348.offset;havoc #t~memset~res349.base, #t~memset~res349.offset;call #t~mem350.base, #t~mem350.offset := read~$Pointer$(~adapter.base, 169 + ~adapter.offset, 8);call #t~mem351 := read~int(~adapter.base, 177 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,909 INFO L272 TraceCheckUtils]: 195: Hoare triple {1077#true} call #t~memset~res352.base, #t~memset~res352.offset := #Ultimate.C_memset(#t~mem350.base, #t~mem350.offset, 0, 4096 * (#t~mem351 % 4294967296)); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,909 INFO L290 TraceCheckUtils]: 196: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,909 INFO L290 TraceCheckUtils]: 197: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,909 INFO L290 TraceCheckUtils]: 198: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,910 INFO L284 TraceCheckUtils]: 199: Hoare quadruple {1077#true} {1077#true} #2687#return; {1077#true} is VALID [2022-02-20 22:01:46,910 INFO L290 TraceCheckUtils]: 200: Hoare triple {1077#true} havoc #t~mem350.base, #t~mem350.offset;havoc #t~mem351;havoc #t~memset~res352.base, #t~memset~res352.offset;call #t~mem353.base, #t~mem353.offset := read~$Pointer$(~adapter.base, 193 + ~adapter.offset, 8);call #t~mem354 := read~int(~adapter.base, 201 + ~adapter.offset, 4); {1077#true} is VALID [2022-02-20 22:01:46,911 INFO L272 TraceCheckUtils]: 201: Hoare triple {1077#true} call #t~memset~res355.base, #t~memset~res355.offset := #Ultimate.C_memset(#t~mem353.base, #t~mem353.offset, 0, 4096 * (#t~mem354 % 4294967296)); {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} is VALID [2022-02-20 22:01:46,911 INFO L290 TraceCheckUtils]: 202: Hoare triple {1231#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))} #t~loopctr913 := 0; {1077#true} is VALID [2022-02-20 22:01:46,911 INFO L290 TraceCheckUtils]: 203: Hoare triple {1077#true} assume !(#t~loopctr913 % 18446744073709551616 < #amount % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,911 INFO L290 TraceCheckUtils]: 204: Hoare triple {1077#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1077#true} is VALID [2022-02-20 22:01:46,912 INFO L284 TraceCheckUtils]: 205: Hoare quadruple {1077#true} {1077#true} #2689#return; {1077#true} is VALID [2022-02-20 22:01:46,912 INFO L290 TraceCheckUtils]: 206: Hoare triple {1077#true} havoc #t~mem353.base, #t~mem353.offset;havoc #t~mem354;havoc #t~memset~res355.base, #t~memset~res355.offset; {1077#true} is VALID [2022-02-20 22:01:46,912 INFO L272 TraceCheckUtils]: 207: Hoare triple {1077#true} call pvscsi_write_cmd_desc(~adapter.base, ~adapter.offset, 3, ~#cmd~3.base, ~#cmd~3.offset, 528); {1077#true} is VALID [2022-02-20 22:01:46,912 INFO L290 TraceCheckUtils]: 208: Hoare triple {1077#true} ~adapter.base, ~adapter.offset := #in~adapter.base, #in~adapter.offset;~cmd := #in~cmd;~desc.base, ~desc.offset := #in~desc.base, #in~desc.offset;~len := #in~len;havoc ~ptr~0.base, ~ptr~0.offset;havoc ~i~0;~ptr~0.base, ~ptr~0.offset := ~desc.base, ~desc.offset;~len := (if ~len % 18446744073709551616 < 0 && 0 != ~len % 18446744073709551616 % 4 then 1 + ~len % 18446744073709551616 / 4 else ~len % 18446744073709551616 / 4); {1077#true} is VALID [2022-02-20 22:01:46,912 INFO L272 TraceCheckUtils]: 209: Hoare triple {1077#true} call pvscsi_reg_write(~adapter.base, ~adapter.offset, 0, ~cmd); {1077#true} is VALID [2022-02-20 22:01:46,913 INFO L290 TraceCheckUtils]: 210: Hoare triple {1077#true} ~adapter#1.base, ~adapter#1.offset := #in~adapter#1.base, #in~adapter#1.offset;~offset#1 := #in~offset#1;~val#1 := #in~val#1;call #t~mem253#1.base, #t~mem253#1.offset := read~$Pointer$(~adapter#1.base, ~adapter#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := ~val#1, #t~mem253#1.base, #t~mem253#1.offset + (if ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 else ~offset#1 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,913 INFO L290 TraceCheckUtils]: 211: Hoare triple {1077#true} assume { :end_inline_writel } true;havoc #t~mem253#1.base, #t~mem253#1.offset; {1077#true} is VALID [2022-02-20 22:01:46,913 INFO L290 TraceCheckUtils]: 212: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,913 INFO L284 TraceCheckUtils]: 213: Hoare quadruple {1077#true} {1077#true} #2657#return; {1077#true} is VALID [2022-02-20 22:01:46,913 INFO L290 TraceCheckUtils]: 214: Hoare triple {1077#true} ~i~0 := 0; {1077#true} is VALID [2022-02-20 22:01:46,914 INFO L290 TraceCheckUtils]: 215: Hoare triple {1077#true} assume !(~i~0 % 18446744073709551616 < ~len % 18446744073709551616); {1077#true} is VALID [2022-02-20 22:01:46,914 INFO L290 TraceCheckUtils]: 216: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,914 INFO L284 TraceCheckUtils]: 217: Hoare quadruple {1077#true} {1077#true} #2691#return; {1077#true} is VALID [2022-02-20 22:01:46,914 INFO L290 TraceCheckUtils]: 218: Hoare triple {1077#true} call #t~mem356 := read~int(~adapter.base, 15 + ~adapter.offset, 1); {1077#true} is VALID [2022-02-20 22:01:46,914 INFO L290 TraceCheckUtils]: 219: Hoare triple {1077#true} assume !(0 != #t~mem356 % 256);havoc #t~mem356; {1077#true} is VALID [2022-02-20 22:01:46,914 INFO L290 TraceCheckUtils]: 220: Hoare triple {1077#true} call ULTIMATE.dealloc(~#cmd~3.base, ~#cmd~3.offset);havoc ~#cmd~3.base, ~#cmd~3.offset;call ULTIMATE.dealloc(~#cmd_msg~0.base, ~#cmd_msg~0.offset);havoc ~#cmd_msg~0.base, ~#cmd_msg~0.offset; {1077#true} is VALID [2022-02-20 22:01:46,915 INFO L290 TraceCheckUtils]: 221: Hoare triple {1077#true} assume true; {1077#true} is VALID [2022-02-20 22:01:46,915 INFO L284 TraceCheckUtils]: 222: Hoare quadruple {1077#true} {1078#false} #2937#return; {1078#false} is VALID [2022-02-20 22:01:46,915 INFO L290 TraceCheckUtils]: 223: Hoare triple {1078#false} call pvscsi_probe_#t~mem804#1 := read~int(pvscsi_probe_~adapter~8#1.base, 181 + pvscsi_probe_~adapter~8#1.offset, 4);assume { :begin_inline_kcalloc } true;kcalloc_#in~n#1, kcalloc_#in~size#1, kcalloc_#in~flags#1 := pvscsi_probe_#t~mem804#1 % 4294967296, 64, 208;havoc kcalloc_#res#1.base, kcalloc_#res#1.offset;havoc kcalloc_#t~ret874#1.base, kcalloc_#t~ret874#1.offset, kcalloc_~n#1, kcalloc_~size#1, kcalloc_~flags#1;kcalloc_~n#1 := kcalloc_#in~n#1;kcalloc_~size#1 := kcalloc_#in~size#1;kcalloc_~flags#1 := kcalloc_#in~flags#1; {1078#false} is VALID [2022-02-20 22:01:46,915 INFO L272 TraceCheckUtils]: 224: Hoare triple {1078#false} call ldv_check_alloc_flags(kcalloc_~flags#1); {1078#false} is VALID [2022-02-20 22:01:46,915 INFO L290 TraceCheckUtils]: 225: Hoare triple {1078#false} ~flags := #in~flags; {1078#false} is VALID [2022-02-20 22:01:46,916 INFO L290 TraceCheckUtils]: 226: Hoare triple {1078#false} assume !(0 == ~ldv_spin~0 || 0 == (if 0 == ~flags then 0 else (if 1 == ~flags then 0 else ~bitwiseAnd(~flags, 16))) % 4294967296); {1078#false} is VALID [2022-02-20 22:01:46,916 INFO L272 TraceCheckUtils]: 227: Hoare triple {1078#false} call ldv_error(); {1078#false} is VALID [2022-02-20 22:01:46,916 INFO L290 TraceCheckUtils]: 228: Hoare triple {1078#false} assume !false; {1078#false} is VALID [2022-02-20 22:01:46,917 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2022-02-20 22:01:46,918 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-20 22:01:46,918 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596326585] [2022-02-20 22:01:46,919 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [596326585] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-20 22:01:46,919 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-20 22:01:46,919 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-02-20 22:01:46,920 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164682903] [2022-02-20 22:01:46,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-20 22:01:46,926 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 16.0) internal successors, (128), 3 states have internal predecessors, (128), 2 states have call successors, (25), 7 states have call predecessors, (25), 1 states have return successors, (23), 2 states have call predecessors, (23), 2 states have call successors, (23) Word has length 229 [2022-02-20 22:01:46,928 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-02-20 22:01:46,931 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 16.0) internal successors, (128), 3 states have internal predecessors, (128), 2 states have call successors, (25), 7 states have call predecessors, (25), 1 states have return successors, (23), 2 states have call predecessors, (23), 2 states have call successors, (23) [2022-02-20 22:01:47,146 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-02-20 22:01:47,146 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-02-20 22:01:47,146 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-20 22:01:47,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-02-20 22:01:47,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-02-20 22:01:47,180 INFO L87 Difference]: Start difference. First operand has 1074 states, 814 states have (on average 1.3722358722358723) internal successors, (1117), 838 states have internal predecessors, (1117), 205 states have call successors, (205), 54 states have call predecessors, (205), 53 states have return successors, (199), 196 states have call predecessors, (199), 199 states have call successors, (199) Second operand has 8 states, 8 states have (on average 16.0) internal successors, (128), 3 states have internal predecessors, (128), 2 states have call successors, (25), 7 states have call predecessors, (25), 1 states have return successors, (23), 2 states have call predecessors, (23), 2 states have call successors, (23) [2022-02-20 22:01:53,343 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 22:01:59,425 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 22:02:04,779 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-02-20 22:02:33,556 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers []